// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

#include "mt7981.dtsi"

/ {
	model = "Livinet ZR-3020";
	compatible = "livinet,zr-3020", "mediatek,mt7981";

	aliases {
		led-boot = &boot_led;
		led-failsafe = &boot_led;
		led-running = &running_led;
		led-upgrade = &upgrade_led;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		reg = <0 0x40000000 0 0x10000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		button-reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
		};

		button-wps {
			label = "wps";
			linux,code = <KEY_WPS_BUTTON>;
			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led-0 {
			label = "red:d8";
			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
		};

		led-1 {
			label = "blue:internet";
			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
		};

		running_led: led-2 {
			label = "blue:running";
			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
		};

		upgrade_led: led-3 {
			label = "green:upgrade";
			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
		};

		boot_led: led-4 {
			label = "red:boot";
			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
		};

		led-6 {
			label = "blue:d7";
			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
		};

		led-7 {
			label = "blue:wlan2g";
			gpios = <&pio 34 GPIO_ACTIVE_LOW>;
		};

		led-8 {
			label = "blue:wlan5g";
			gpios = <&pio 35 GPIO_ACTIVE_LOW>;
		};
	};
};

&eth {
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";

		nvmem-cells = <&macaddr_config_50707 0>;
		nvmem-cell-names = "mac-address";

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};
};

&mdio_bus {
	switch: switch@1f {
		compatible = "mediatek,mt7531";
		reg = <31>;
		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&pio>;
		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_flash_pins>;
	status = "okay";

	spi_nand: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		reg = <0>;

		spi-max-frequency = <52000000>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
		mediatek,nmbm;
		mediatek,bmt-max-ratio = <1>;
		mediatek,bmt-max-reserved-blocks = <64>;

		partitions: partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "BL2";
				reg = <0x00000 0x100000>;
				read-only;
			};

			partition@100000 {
				label = "u-boot-env";
				reg = <0x100000 0x80000>;
			};

			factory: partition@180000 {
				label = "Factory";
				reg = <0x180000 0x200000>;
			};

			partition@380000 {
				label = "FIP";
				reg = <0x380000 0x200000>;
			};

			ubi: partition@580000 {
				label = "ubi";
				reg = <0x580000 0x4000000>;
			};

			partition@4580000 {
				label = "firmware_backup";
				reg = <0x4580000 0x2000000>;
			};

			partition@6580000 {
				label = "zrsave";
				reg = <0x6580000 0x100000>;
			};

			partition@6680000 {
				label = "config2";
				reg = <0x6680000 0x100000>;
				read-only;

				compatible = "nvmem-cells";
				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_config_50707: macaddr@50707 {
						compatible = "mac-base";
						reg = <0x50707 0x11>;
						#nvmem-cell-cells = <1>;
					};

					macaddr_config_50787: macaddr@50787 {
						compatible = "mac-base";
						reg = <0x50787 0x11>;
						#nvmem-cell-cells = <1>;
					};
				};
			};
		};
	};
};

&switch {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			label = "wan";

			nvmem-cells = <&macaddr_config_50787 0>;
			nvmem-cell-names = "mac-address";
		};

		port@2 {
			reg = <2>;
			label = "lan1";
		};

		port@3 {
			reg = <3>;
			label = "lan2";
		};

		port@4 {
			reg = <4>;
			label = "lan3";
		};

		port@6 {
			reg = <6>;
			ethernet = <&gmac0>;
			phy-mode = "2500base-x";

			fixed-link {
				speed = <2500>;
				full-duplex;
				pause;
			};
		};
	};
};

&pio {
	i2c_pins: i2c-pins-g0 {
                mux {
                        function = "i2c";
                        groups = "i2c0_0";
                };
        };

        pcm_pins: pcm-pins-g0 {
                mux {
                        function = "pcm";
                        groups = "pcm";
                };
        };

	pwm0_pin: pwm0-pin-g0 {
		mux {
			function = "pwm";
			groups = "pwm0_0";
		};
	};

	pwm1_pin: pwm1-pin-g0 {
		mux {
			function = "pwm";
			groups = "pwm1_0";
		};
	};

	pwm2_pin: pwm2-pin {
		mux {
			function = "pwm";
			groups = "pwm2";
		};
	};

	spi0_flash_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};

		conf-pu {
			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};

	uart1_pins: uart1-pins-g1 {
		mux {
			function = "uart";
			groups = "uart1_1";
		};
	};

	uart2_pins: uart2-pins-g1 {
		mux {
			function = "uart";
			groups = "uart2_1";
		};
	};
};

&uart0 {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&wifi {
	status = "okay";

	mediatek,mtd-eeprom = <&factory 0x0>;
};
