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mediatek: migrate ABT ASR3000 to fit format

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit 660babe825)
This commit is contained in:
Tianling Shen 2024-07-06 15:30:31 +08:00
parent 344a254c4f
commit 07cdb2e9a0
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
10 changed files with 744 additions and 265 deletions
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13
package/boot/uboot-mediatek/Makefile
View File

@ -202,6 +202,18 @@ define U-Boot/mt7629_rfb
UBOOT_CONFIG:=mt7629_rfb
endef
define U-Boot/mt7981_abt_asr3000
NAME:=ABT ASR3000
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=abt_asr3000
UBOOT_CONFIG:=mt7981_abt_asr3000
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=spim-nand
BL2_SOC:=mt7981
BL2_DDRTYPE:=ddr3
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_cmcc_rax3000m-emmc
NAME:=CMCC RAX3000M
BUILD_SUBTARGET:=filogic
@ -630,6 +642,7 @@ UBOOT_TARGETS := \
mt7628_rfb \
ravpower_rp-wd009 \
mt7629_rfb \
mt7981_abt_asr3000 \
mt7981_cmcc_rax3000m-emmc \
mt7981_cmcc_rax3000m-nand \
mt7981_h3c_magic-nx30-pro \

402
package/boot/uboot-mediatek/patches/455-add-abt_asr3000.patch Normal file
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@ -0,0 +1,402 @@
--- /dev/null
+++ b/configs/mt7981_abt_asr3000_defconfig
@@ -0,0 +1,163 @@
+CONFIG_ARM=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TARGET_MT7981=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt7981-abt-asr3000"
+CONFIG_DEFAULT_ENV_FILE="abt_asr3000_env"
+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-abt-asr3000.dtb"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DEBUG_UART_BASE=0x11002000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_BOOTDELAY=30
+CONFIG_AUTOBOOT_MENU_SHOW=y
+CONFIG_CFB_CONSOLE_ANSI=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_GPIO_HOG=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_FIT=y
+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_LOGLEVEL=7
+CONFIG_LOG=y
+CONFIG_SYS_PROMPT="MT7981> "
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_BOOTP=y
+CONFIG_CMD_BUTTON=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_CPU=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ENV_READMEM=y
+CONFIG_CMD_ERASEENV=y
+# CONFIG_CMD_EXT4 is not set
+# CONFIG_CMD_FAT is not set
+CONFIG_CMD_FDT=y
+# CONFIG_CMD_FS_GENERIC is not set
+# CONFIG_CMD_FS_UUID is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_LED=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_LINK_LOCAL=y
+# CONFIG_CMD_MBR is not set
+CONFIG_CMD_MTD=y
+# CONFIG_CMD_PCI is not set
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_PXE=y
+# CONFIG_CMD_PWM is not set
+CONFIG_CMD_SMC=y
+CONFIG_CMD_TFTPBOOT=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBI_RENAME=y
+CONFIG_CMD_UBIFS=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_SOURCE=y
+CONFIG_CMD_STRINGS=y
+# CONFIG_CMD_USB is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_UUID=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DM_MTD=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_DM_USB is not set
+# CONFIG_DM_PWM is not set
+# CONFIG_PWM_MTK is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_PARTITION_UUIDS=y
+CONFIG_NETCONSOLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+# CONFIG_DM_SCSI is not set
+# CONFIG_AHCI is not set
+CONFIG_PHY=y
+# CONFIG_PHY_MTK_TPHY is not set
+CONFIG_PHY_FIXED=y
+CONFIG_MTK_AHCI=y
+CONFIG_DM_ETH=y
+CONFIG_MEDIATEK_ETH=y
+# CONFIG_PCI is not set
+# CONFIG_MMC is not set
+# CONFIG_DM_MMC is not set
+CONFIG_MTD=y
+CONFIG_MTD_UBI_FASTMAP=y
+# CONFIG_DM_PCI is not set
+# CONFIG_PCIE_MEDIATEK is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7981=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_SPI_NAND=y
+CONFIG_MTK_SPI_NAND_MTD=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_WDT_MTK=y
+CONFIG_LZO=y
+CONFIG_ZSTD=y
+CONFIG_HEXDUMP=y
+CONFIG_RANDOM_UUID=y
+CONFIG_REGEX=y
+# CONFIG_USB is not set
+# CONFIG_USB_HOST is not set
+# CONFIG_USB_XHCI_HCD is not set
+# CONFIG_USB_XHCI_MTK is not set
+# CONFIG_USB_STORAGE is not set
+CONFIG_OF_EMBED=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_UBI_PART="ubi"
+CONFIG_ENV_SIZE=0x1f000
+CONFIG_ENV_SIZE_REDUND=0x1f000
+CONFIG_ENV_UBI_VOLUME="ubootenv"
+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_USE_DEFAULT_ENV_FILE=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTK_SPIM=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_LMB_MAX_REGIONS=64
+CONFIG_USE_IPADDR=y
+CONFIG_IPADDR="192.168.1.1"
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7981-abt-asr3000.dts
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+#include "mt7981.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "ABT ASR3000";
+ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
+
+ chosen {
+ stdout-path = &uart0;
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+
+ button-reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ button-wps {
+ label = "mesh";
+ linux,code = <BTN_9>;
+ linux,input-type = <EV_SW>;
+ gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "red:wan";
+ gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led-1 {
+ label = "green:wan";
+ gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ mesh_led: led-2 {
+ label = "green:mesh";
+ gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led-3 {
+ label = "green:wlan2g";
+ gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led-4 {
+ label = "green:wlan5g";
+ gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "2500base-x";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ };
+};
+
+&pinctrl {
+ spi_flash_pins: spi0-pins-func-1 {
+ mux {
+ function = "flash";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
+ };
+ };
+};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x100000 0x80000>;
+ };
+
+ partition@180000 {
+ label = "art";
+ reg = <0x180000 0x100000>;
+ };
+
+ partition@280000 {
+ label = "factory";
+ reg = <0x280000 0x100000>;
+ };
+
+ partition@380000 {
+ label = "fip";
+ reg = <0x380000 0x0200000>;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x7a80000>;
+ compatible = "linux,ubi";
+ };
+ };
+ };
+};
+
+&uart0 {
+ mediatek,force-highspeed;
+ status = "okay";
+};
+
+&watchdog {
+ status = "disabled";
+};
--- /dev/null
+++ b/abt_asr3000_env
@@ -0,0 +1,54 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
+bootconf=config-1
+bootdelay=0
+bootfile=immortalwrt-mediatek-filogic-abt_asr3000-initramfs-recovery.itb
+bootfile_bl2=immortalwrt-mediatek-filogic-abt_asr3000-preloader.bin
+bootfile_fip=immortalwrt-mediatek-filogic-abt_asr3000-bl31-uboot.fip
+bootfile_upg=immortalwrt-mediatek-filogic-abt_asr3000-squashfs-sysupgrade.itb
+bootled_pwr=green:mesh
+bootled_rec=green:mesh
+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
+bootmenu_default=0
+bootmenu_delay=0
+bootmenu_title= ( ( ( OpenWrt ) ) )
+bootmenu_0=Initialize environment.=run _firstboot
+bootmenu_0d=Run default boot command.=run boot_default
+bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
+bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
+bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
+bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
+bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
+bootmenu_8=Reboot.=reset
+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
+boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
+boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
+boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
+boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
+boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
+boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
+reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
+mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
+mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
+ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
+ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
+ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
+_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
+_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
+_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"

269
target/linux/mediatek/dts/mt7981b-abt-asr3000-ubootmod.dts
View File

@ -1,265 +1,38 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7981.dtsi"
#include "mt7981b-abt-asr3000.dts"
/ {
model = "ABT ASR3000 (custom U-Boot layout)";
compatible = "abt,asr3000-ubootmod", "mediatek,mt7981";
};
aliases {
led-boot = &mesh_led;
led-failsafe = &mesh_led;
led-upgrade = &mesh_led;
label-mac-device = &gmac1;
serial0 = &uart0;
&spi0_flash_pins {
conf-pu {
/delete-property/ mediatek,pull-up-adv;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
button-mesh {
label = "mesh";
linux,code = <BTN_9>;
linux,input-type = <EV_SW>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led-0 {
label = "red:wan";
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
};
led-1 {
label = "green:wan";
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
mesh_led: led-2 {
label = "green:mesh";
gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
};
led-3 {
label = "green:wlan2g";
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
};
led-4 {
label = "green:wlan5g";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
conf-pd {
/delete-property/ mediatek,pull-up-adv;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
&eth {
status = "okay";
&spi_nand {
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_art_0 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cells = <&macaddr_art_0 0>;
nvmem-cell-names = "mac-address";
};
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x100000>;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "art";
reg = <0x180000 0x100000>;
read-only;
compatible = "nvmem-cells";
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
compatible = "mac-base";
reg = <0x0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
factory: partition@280000 {
label = "Factory";
reg = <0x280000 0x100000>;
read-only;
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x6e80000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan3";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan1";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
&ubi {
reg = <0x580000 0x6e80000>;
};

263
target/linux/mediatek/dts/mt7981b-abt-asr3000.dts Normal file
View File

@ -0,0 +1,263 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
model = "ABT ASR3000";
compatible = "abt,asr3000", "mediatek,mt7981";
aliases {
led-boot = &mesh_led;
led-failsafe = &mesh_led;
led-upgrade = &mesh_led;
label-mac-device = &gmac1;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
button-mesh {
label = "mesh";
linux,code = <BTN_9>;
linux,input-type = <EV_SW>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
};
led-1 {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
mesh_led: led-2 {
label = "green:mesh";
gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
};
led-3 {
label = "green:wlan2g";
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
};
led-4 {
label = "green:wlan5g";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_art_0 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cells = <&macaddr_art_0 0>;
nvmem-cell-names = "mac-address";
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x100000>;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "art";
reg = <0x180000 0x100000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
compatible = "mac-base";
reg = <0x0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@280000 {
label = "factory";
reg = <0x280000 0x100000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "fip";
reg = <0x380000 0x200000>;
};
ubi: partition@580000 {
label = "ubi";
reg = <0x580000 0x7a80000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan3";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan1";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
};

2
target/linux/mediatek/dts/mt7981b-h3c-magic-nx30-pro-nmbm.dts
View File

@ -29,6 +29,6 @@
conf-pd {
/delete-property/ mediatek,pull-up-adv;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};

1
target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
View File

@ -6,6 +6,7 @@ board=$(board_name)
board_config_update
case $board in
abt,asr3000|\
abt,asr3000-ubootmod)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
ucidef_set_led_netdev "wlan2g" "WLAN2G" "green:wlan2g" "phy0-ap0"

1
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -8,6 +8,7 @@ mediatek_setup_interfaces()
local board="$1"
case $board in
abt,asr3000|\
abt,asr3000-ubootmod|\
cmcc,rax3000m|\
cmcc,rax3000m-emmc-ubootmod|\

1
target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View File

@ -10,6 +10,7 @@ PHYNBR=${DEVPATH##*/phy}
board=$(board_name)
case "$board" in
abt,asr3000|\
abt,asr3000-ubootmod)
# Originally, phy1 is phy0 mac with LA bit set. However, this would conflict
# addresses on multiple VIFs with the other radio. Use label mac to set LA bit.

33
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
View File

@ -63,6 +63,23 @@ platform_do_upgrade() {
local board=$(board_name)
case "$board" in
abt,asr3000|\
h3c,magic-nx30-pro|\
jcg,q30|\
mediatek,mt7981-rfb|\
netcore,n60|\
nokia,ea0326gmp|\
qihoo,360t7|\
tplink,tl-xdr4288|\
tplink,tl-xdr6086|\
tplink,tl-xdr6088|\
tplink,tl-xtr8488|\
xiaomi,mi-router-ax3000t-ubootmod|\
xiaomi,mi-router-wr30u-ubootmod|\
xiaomi,redmi-router-ax6000-ubootmod)
CI_KERNPART="fit"
nand_do_upgrade "$1"
;;
acer,predator-w6)
CI_KERNPART="kernel"
CI_ROOTPART="rootfs"
@ -119,22 +136,6 @@ platform_do_upgrade() {
cudy,re3000-v1)
default_do_upgrade "$1"
;;
h3c,magic-nx30-pro|\
jcg,q30|\
mediatek,mt7981-rfb|\
netcore,n60|\
nokia,ea0326gmp|\
qihoo,360t7|\
tplink,tl-xdr4288|\
tplink,tl-xdr6086|\
tplink,tl-xdr6088|\
tplink,tl-xtr8488|\
xiaomi,mi-router-ax3000t-ubootmod|\
xiaomi,mi-router-wr30u-ubootmod|\
xiaomi,redmi-router-ax6000-ubootmod)
CI_KERNPART="fit"
nand_do_upgrade "$1"
;;
jdcloud,re-cp-03)
CI_KERNPART="production"
emmc_do_upgrade "$1"

24
target/linux/mediatek/image/filogic.mk
View File

@ -105,6 +105,30 @@ define Build/cetron-header
rm $@.tmp
endef
define Device/abt_asr3000
DEVICE_VENDOR := ABT
DEVICE_MODEL := ASR3000
DEVICE_DTS := mt7981b-abt-asr3000
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
UBOOTENV_IN_UBI := 1
IMAGES := sysupgrade.itb
KERNEL_INITRAMFS_SUFFIX := -recovery.itb
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.itb := append-kernel | \
fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata
ARTIFACTS := preloader.bin bl31-uboot.fip
ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3
ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot abt_asr3000
endef
TARGET_DEVICES += abt_asr3000
define Device/abt_asr3000-ubootmod
DEVICE_VENDOR := ABT
DEVICE_MODEL := ASR3000 (custom U-Boot layout)