diff --git a/include/prereq-build.mk b/include/prereq-build.mk index 6c45327f01..0a023c2c6f 100644 --- a/include/prereq-build.mk +++ b/include/prereq-build.mk @@ -202,7 +202,10 @@ $(STAGING_DIR_HOST)/bin/mkhash: $(SCRIPT_DIR)/mkhash.c mkdir -p $(dir $@) $(CC) -O2 -I$(TOPDIR)/tools/include -o $@ $< -prereq: $(STAGING_DIR_HOST)/bin/mkhash +$(STAGING_DIR_HOST)/bin/xxd: $(SCRIPT_DIR)/xxdi.pl + $(LN) $< $@ + +prereq: $(STAGING_DIR_HOST)/bin/mkhash $(STAGING_DIR_HOST)/bin/xxd # Install ldconfig stub $(eval $(call TestHostCommand,ldconfig-stub,Failed to install stub, \ diff --git a/include/toplevel.mk b/include/toplevel.mk index ce744bc92c..455fc9c4da 100644 --- a/include/toplevel.mk +++ b/include/toplevel.mk @@ -60,6 +60,7 @@ endif SCAN_COOKIE?=$(shell echo $$$$) export SCAN_COOKIE +export STAGING_DIR_HOST=$(TOPDIR)/staging_dir/host SUBMAKE:=umask 022; $(SUBMAKE) diff --git a/package/boot/arm-trusted-firmware-tools/Makefile b/package/boot/arm-trusted-firmware-tools/Makefile index a7112724c0..81c8a99cbc 100644 --- a/package/boot/arm-trusted-firmware-tools/Makefile +++ b/package/boot/arm-trusted-firmware-tools/Makefile @@ -8,9 +8,9 @@ include $(TOPDIR)/rules.mk PKG_NAME:=arm-trusted-firmware-tools -PKG_VERSION:=2.4 +PKG_VERSION:=2.7 PKG_RELEASE:=1 -PKG_HASH:=bf3eb3617a74cddd7fb0e0eacbfe38c3258ee07d4c8ed730deef7a175cc3d55b +PKG_HASH:=53422dc649153838e03820330ba17cb10afe3e330ecde0db11e4d5f1361a33e6 PKG_MAINTAINER:=Daniel Golle PKG_HOST_ONLY:=1 @@ -34,23 +34,17 @@ define Host/Compile $(HOST_BUILD_DIR)/tools/fiptool \ CPPFLAGS="$(HOST_CFLAGS)" \ LDFLAGS="$(HOST_LDFLAGS)" - $(MAKE) -C \ - $(HOST_BUILD_DIR)/tools/sptool \ - CPPFLAGS="$(HOST_CFLAGS)" \ - LDFLAGS="$(HOST_LDFLAGS)" endef define Host/Install $(INSTALL_DIR) $(STAGING_DIR_HOST)/bin/ $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/fiptool/fiptool $(STAGING_DIR_HOST)/bin/ - $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/sptool/sptool $(STAGING_DIR_HOST)/bin/ - $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/sptool/sp_mk_generator.py $(STAGING_DIR_HOST)/bin/ + $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/sptool/sptool.py $(STAGING_DIR_HOST)/bin/ endef define Host/Clean rm -f $(STAGING_DIR_HOST)/bin/fiptool - rm -f $(STAGING_DIR_HOST)/bin/sptool - rm -f $(STAGING_DIR_HOST)/bin/sp_mk_generator.py + rm -f $(STAGING_DIR_HOST)/bin/sptool.py $(STAGING_DIR_HOST)/bin/sptool endef $(eval $(call BuildPackage,arm-trusted-firmware-tools)) diff --git a/package/boot/uboot-envtools/files/ipq40xx b/package/boot/uboot-envtools/files/ipq40xx index 1937f9d1ce..e45e26dcc7 100644 --- a/package/boot/uboot-envtools/files/ipq40xx +++ b/package/boot/uboot-envtools/files/ipq40xx @@ -40,6 +40,7 @@ luma,wrtq-329acn|\ netgear,wac510|\ openmesh,a42|\ openmesh,a62|\ +pakedge,wr-1|\ plasmacloud,pa1200|\ plasmacloud,pa2200) ubootenv_add_uci_config "/dev/mtd5" "0x0" "0x10000" "0x10000" diff --git a/package/devel/strace/Makefile b/package/devel/strace/Makefile index 9d9db65c17..71d7945003 100644 --- a/package/devel/strace/Makefile +++ b/package/devel/strace/Makefile @@ -19,7 +19,7 @@ PKG_HASH:=aa3dc1c8e60e4f6ff3d396514aa247f3c7bf719d8a8dc4dd4fa793be786beca3 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=LGPL-2.1-or-later PKG_LICENSE_FILES:=COPYING -PKG_CPE_ID:=cpe:/a:paul_kranenburg:strace +PKG_CPE_ID:=cpe:/a:strace_project:strace PKG_FIXUP:=autoreconf PKG_INSTALL:=1 diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile index ebd10cd2ec..7b683ef0a2 100644 --- a/package/firmware/ipq-wifi/Makefile +++ b/package/firmware/ipq-wifi/Makefile @@ -29,10 +29,12 @@ ALLWIFIBOARDS:= \ devolo_magic-2-wifi-next \ edgecore_ecw5410 \ edgecore_oap100 \ + extreme-networks_ws-ap3915i \ glinet_gl-ap1300 \ glinet_gl-s1300 \ linksys_ea8300 \ p2w_r619ac \ + pakedge_wr-1 \ qxwlan_e2600ac-c1 \ qxwlan_e2600ac-c2 \ teltonika_rutx @@ -100,10 +102,12 @@ $(eval $(call generate-ipq-wifi-package,aruba_ap-365,Aruba AP-365)) $(eval $(call generate-ipq-wifi-package,devolo_magic-2-wifi-next,devolo Magic 2 WiFi next)) $(eval $(call generate-ipq-wifi-package,edgecore_ecw5410,Edgecore ECW5410)) $(eval $(call generate-ipq-wifi-package,edgecore_oap100,Edgecore OAP100)) +$(eval $(call generate-ipq-wifi-package,extreme-networks_ws-ap3915i,Edgecore OAP100)) $(eval $(call generate-ipq-wifi-package,glinet_gl-ap1300,GL.iNet GL-AP1300)) $(eval $(call generate-ipq-wifi-package,glinet_gl-s1300,GL.iNet GL-S1300)) $(eval $(call generate-ipq-wifi-package,linksys_ea8300,Linksys EA8300)) $(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC)) +$(eval $(call generate-ipq-wifi-package,pakedge_wr-1,Pakedge WR-1)) $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac-c1,Qxwlan E2600AC C1)) $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac-c2,Qxwlan E2600AC C2)) $(eval $(call generate-ipq-wifi-package,teltonika_rutx,Teltonika RUTX)) diff --git a/package/firmware/ipq-wifi/board-extreme-networks_ws-ap3915i.qca4019 b/package/firmware/ipq-wifi/board-extreme-networks_ws-ap3915i.qca4019 new file mode 100644 index 0000000000..8aeedf07cb Binary files /dev/null and b/package/firmware/ipq-wifi/board-extreme-networks_ws-ap3915i.qca4019 differ diff --git a/package/firmware/ipq-wifi/board-pakedge_wr-1.qca4019 b/package/firmware/ipq-wifi/board-pakedge_wr-1.qca4019 new file mode 100644 index 0000000000..967a452580 Binary files /dev/null and b/package/firmware/ipq-wifi/board-pakedge_wr-1.qca4019 differ diff --git a/package/kernel/linux/modules/block.mk b/package/kernel/linux/modules/block.mk index 40a14a9be2..8affa72296 100644 --- a/package/kernel/linux/modules/block.mk +++ b/package/kernel/linux/modules/block.mk @@ -465,7 +465,7 @@ define KernelPackage/loop CONFIG_BLK_DEV_LOOP \ CONFIG_BLK_DEV_CRYPTOLOOP=n FILES:=$(LINUX_DIR)/drivers/block/loop.ko - AUTOLOAD:=$(call AutoLoad,30,loop) + AUTOLOAD:=$(call AutoLoad,30,loop,1) endef define KernelPackage/loop/description diff --git a/package/kernel/linux/modules/fs.mk b/package/kernel/linux/modules/fs.mk index 0e4c0c091a..3ad458286f 100644 --- a/package/kernel/linux/modules/fs.mk +++ b/package/kernel/linux/modules/fs.mk @@ -601,7 +601,7 @@ define KernelPackage/fs-vfat FILES:= \ $(LINUX_DIR)/fs/fat/fat.ko \ $(LINUX_DIR)/fs/fat/vfat.ko - AUTOLOAD:=$(call AutoLoad,30,fat vfat) + AUTOLOAD:=$(call AutoLoad,30,fat vfat,1) $(call AddDepends/nls,cp437 iso8859-1 utf8) endef diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile index ff58d27bc2..998320ac5c 100644 --- a/package/kernel/mt76/Makefile +++ b/package/kernel/mt76/Makefile @@ -8,9 +8,9 @@ PKG_LICENSE_FILES:= PKG_SOURCE_URL:=https://github.com/openwrt/mt76 PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2022-08-26 -PKG_SOURCE_VERSION:=5ec78e1ec43d1e39edfea1efb9fd4541fa004af0 -PKG_MIRROR_HASH:=b96ec5199d423dc27e4fe7f0e94c8d5970f6db812237816235f3b735a5cb216a +PKG_SOURCE_DATE:=2022-09-06 +PKG_SOURCE_VERSION:=d70546462b7b51ebc2bcdd5c534fdf3465be62a4 +PKG_MIRROR_HASH:=3d6b68d70a78c0072ed10ab2548344b6b3a70ad99e4edc258fafa16886f4abf9 PKG_MAINTAINER:=Felix Fietkau PKG_USE_NINJA:=0 diff --git a/package/libs/jansson/Makefile b/package/libs/jansson/Makefile index 6de48c1d86..d8567ed79a 100644 --- a/package/libs/jansson/Makefile +++ b/package/libs/jansson/Makefile @@ -17,6 +17,7 @@ PKG_HASH:=c739578bf6b764aa0752db9a2fdadcfe921c78f1228c7ec0bb47fa804c55d17b PKG_LICENSE:=MIT PKG_LICENSE_FILES:=LICENSE +PKG_CPE_ID:=cpe:/a:jansson_project:jansson include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/cmake.mk diff --git a/package/libs/libcap/Makefile b/package/libs/libcap/Makefile index 0e4ffc6e02..b3ca20fd8a 100644 --- a/package/libs/libcap/Makefile +++ b/package/libs/libcap/Makefile @@ -16,6 +16,7 @@ PKG_HASH:=73e350020cc31fe15360879d19384ffa3395a825f065fcf6bda3a5cdf965bebd PKG_MAINTAINER:=Paul Wassi PKG_LICENSE:=GPL-2.0-only PKG_LICENSE_FILES:=License +PKG_CPE_ID:=cpe:/a:libcap_project:libcap PKG_INSTALL:=1 PKG_BUILD_PARALLEL:=1 diff --git a/package/libs/libmnl/Makefile b/package/libs/libmnl/Makefile index 2632cc2d94..06f79d5384 100644 --- a/package/libs/libmnl/Makefile +++ b/package/libs/libmnl/Makefile @@ -22,6 +22,7 @@ PKG_MAINTAINER:=Jo-Philipp Wich PKG_FIXUP:=autoreconf PKG_INSTALL:=1 PKG_LICENSE:=LGPL-2.1+ +PKG_CPE_ID:=cpe:/a:netfilter:libmnl include $(INCLUDE_DIR)/package.mk diff --git a/package/libs/libnfnetlink/Makefile b/package/libs/libnfnetlink/Makefile index 57bb0cdb98..be1eba6517 100644 --- a/package/libs/libnfnetlink/Makefile +++ b/package/libs/libnfnetlink/Makefile @@ -18,6 +18,7 @@ PKG_SOURCE_URL:= \ PKG_HASH:=b064c7c3d426efb4786e60a8e6859b82ee2f2c5e49ffeea640cfe4fe33cbc376 PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=GPL-2.0+ +PKG_CPE_ID:=cpe:/a:netfilter:libnfnetlink PKG_FIXUP:=autoreconf diff --git a/package/libs/libnl/Makefile b/package/libs/libnl/Makefile index bb7a1e7fb1..71b043a9e5 100644 --- a/package/libs/libnl/Makefile +++ b/package/libs/libnl/Makefile @@ -15,6 +15,7 @@ PKG_HASH:=9fe43ccbeeea72c653bdcf8c93332583135cda46a79507bfd0a483bb57f65939 PKG_LICENSE:=LGPL-2.1 PKG_LICENSE_FILES:=COPYING +PKG_CPE_ID:=cpe:/a:libnl_project:libnl PKG_INSTALL:=1 PKG_FIXUP:=autoreconf diff --git a/package/libs/libselinux/Makefile b/package/libs/libselinux/Makefile index 6bda72b5de..7246d85566 100644 --- a/package/libs/libselinux/Makefile +++ b/package/libs/libselinux/Makefile @@ -17,6 +17,7 @@ HOST_BUILD_DEPENDS:=libsepol/host pcre/host PKG_LICENSE:=libselinux-1.0 PKG_LICENSE_FILES:=LICENSE PKG_MAINTAINER:=Thomas Petazzoni +PKG_CPE_ID:=cpe:/a:selinuxproject:libselinux HOST_BUILD_DEPENDS:=libsepol/host musl-fts/host pcre/host diff --git a/package/libs/libsepol/Makefile b/package/libs/libsepol/Makefile index 87f1ccd917..816b139727 100644 --- a/package/libs/libsepol/Makefile +++ b/package/libs/libsepol/Makefile @@ -14,6 +14,7 @@ PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PK PKG_HASH:=2d97df3eb8466169b389c3660acbb90c54200ac96e452eca9f41a9639f4f238b PKG_MAINTAINER:=Thomas Petazzoni +PKG_CPE_ID:=cpe:/a:selinuxproject:libsepol include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/host-build.mk diff --git a/package/libs/libunwind/Makefile b/package/libs/libunwind/Makefile index f129dafcbf..c676d501bd 100644 --- a/package/libs/libunwind/Makefile +++ b/package/libs/libunwind/Makefile @@ -9,12 +9,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libunwind -PKG_VERSION:=1.5.0 -PKG_RELEASE:=2 +PKG_VERSION:=1.6.2 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=@SAVANNAH/$(PKG_NAME) -PKG_HASH:=90337653d92d4a13de590781371c604f9031cdb50520366aa1e3a91e1efb1017 +PKG_HASH:=4a6aec666991fb45d0889c44aede8ad6eb108071c3554fcdff671f9c94794976 PKG_MAINTAINER:=Yousong Zhou PKG_LICENSE:=X11 diff --git a/package/libs/libunwind/patches/001-Don-t-force-exec_prefix-lib64-libdir-on-ppc64.patch b/package/libs/libunwind/patches/001-Don-t-force-exec_prefix-lib64-libdir-on-ppc64.patch deleted file mode 100644 index d6010ec0ae..0000000000 --- a/package/libs/libunwind/patches/001-Don-t-force-exec_prefix-lib64-libdir-on-ppc64.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 0af7e7a53480ce8e1cf6cfb4e9fe071c1185ef31 Mon Sep 17 00:00:00 2001 -From: Matthias Diener -Date: Fri, 2 Jul 2021 12:36:10 -0500 -Subject: [PATCH] Don't force {exec_prefix}/lib64 libdir on ppc64 - ---- - configure.ac | 6 ------ - 1 file changed, 6 deletions(-) - -diff --git a/configure.ac b/configure.ac -index 9fadc163..0dec4ca6 100644 ---- a/configure.ac -+++ b/configure.ac -@@ -215,12 +215,6 @@ fi - AM_CONDITIONAL(USE_DWARF, [test x$use_dwarf = xyes]) - AC_MSG_RESULT([$use_dwarf]) - --if test x$target_arch = xppc64; then -- libdir='${exec_prefix}/lib64' -- AC_MSG_NOTICE([PowerPC64 detected, lib will be installed ${libdir}]); -- AC_SUBST([libdir]) --fi -- - AC_MSG_CHECKING([whether to restrict build to remote support]) - if test x$target_arch != x$host_arch; then - CPPFLAGS="${CPPFLAGS} -DUNW_REMOTE_ONLY" --- -2.32.0 - diff --git a/package/libs/libusb/Makefile b/package/libs/libusb/Makefile index 5e4046813a..5d89568937 100644 --- a/package/libs/libusb/Makefile +++ b/package/libs/libusb/Makefile @@ -20,6 +20,7 @@ PKG_HASH:=12ce7a61fc9854d1d2a1ffe095f7b5fac19ddba095c259e6067a46500381b5a5 PKG_MAINTAINER:= Felix Fietkau PKG_LICENSE:=LGPL-2.1-or-later PKG_LICENSE_FILES:=COPYING +PKG_CPE_ID:=cpe:/a:libusb:libusb PKG_INSTALL:=1 PKG_BUILD_PARALLEL:=1 diff --git a/package/libs/nettle/Makefile b/package/libs/nettle/Makefile index 8e4b987512..8825da4be7 100644 --- a/package/libs/nettle/Makefile +++ b/package/libs/nettle/Makefile @@ -18,6 +18,7 @@ PKG_HASH:=364f3e2b77cd7dcde83fd7c45219c834e54b0c75e428b6f894a23d12dd41cbfe PKG_LICENSE:=GPL-2.0-or-later PKG_LICENSE_FILES:=COPYING +PKG_CPE_ID:=cpe:/a:nettle_project:nettle PKG_BUILD_PARALLEL:=1 PKG_CONFIG_DEPENDS := CONFIG_LIBNETTLE_MINI diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh index 22dca6cef7..38c8bc9c41 100644 --- a/package/network/services/hostapd/files/hostapd.sh +++ b/package/network/services/hostapd/files/hostapd.sh @@ -364,7 +364,7 @@ hostapd_common_add_bss_config() { config_add_array airtime_sta_weight config_add_int airtime_bss_weight airtime_bss_limit - config_add_boolean multicast_to_unicast proxy_arp per_sta_vif + config_add_boolean multicast_to_unicast multicast_to_unicast_all proxy_arp per_sta_vif config_add_array hostapd_bss_options config_add_boolean default_disabled @@ -550,7 +550,7 @@ hostapd_set_bss_options() { bss_load_update_period chan_util_avg_period sae_require_mfp sae_pwe \ multi_ap multi_ap_backhaul_ssid multi_ap_backhaul_key skip_inactivity_poll \ ppsk airtime_bss_weight airtime_bss_limit airtime_sta_weight \ - multicast_to_unicast proxy_arp per_sta_vif \ + multicast_to_unicast_all proxy_arp per_sta_vif \ eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \ vendor_elements fils ocv @@ -1133,9 +1133,9 @@ hostapd_set_bss_options() { [ -n "$server_id" ] && append bss_conf "server_id=$server_id" "$N" fi - set_default multicast_to_unicast 0 - if [ "$multicast_to_unicast" -gt 0 ]; then - append bss_conf "multicast_to_unicast=$multicast_to_unicast" "$N" + set_default multicast_to_unicast_all 0 + if [ "$multicast_to_unicast_all" -gt 0 ]; then + append bss_conf "multicast_to_unicast=$multicast_to_unicast_all" "$N" fi set_default proxy_arp 0 if [ "$proxy_arp" -gt 0 ]; then diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile index c9c66e8d93..77b226a1e4 100644 --- a/package/network/services/lldpd/Makefile +++ b/package/network/services/lldpd/Makefile @@ -17,6 +17,7 @@ PKG_HASH:=0cb77fd7634401347b8311db1bf64d4fc3890acba90915e2cc2c5f79045ddbf0 PKG_MAINTAINER:=Stijn Tintel PKG_LICENSE:=ISC +PKG_CPE_ID:=cpe:/a:lldpd_project:lldpd PKG_FIXUP:=autoreconf PKG_BUILD_PARALLEL:=1 diff --git a/package/network/utils/ethtool/Makefile b/package/network/utils/ethtool/Makefile index 5e684ceedf..2c75dd19a4 100644 --- a/package/network/utils/ethtool/Makefile +++ b/package/network/utils/ethtool/Makefile @@ -18,6 +18,7 @@ PKG_HASH:=3b752a3329827907ac3812f2831dfecf51c8c41c55d2d69cfb9c53ca06449fc6 PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=COPYING +PKG_CPE_ID:=cpe:/a:kernel:ethtool PKG_FIXUP:=autoreconf PKG_INSTALL:=1 diff --git a/package/network/utils/xdp-tools/Makefile b/package/network/utils/xdp-tools/Makefile index 7d831d0fec..32f302543a 100644 --- a/package/network/utils/xdp-tools/Makefile +++ b/package/network/utils/xdp-tools/Makefile @@ -2,8 +2,8 @@ include $(TOPDIR)/rules.mk PKG_NAME:=xdp-tools PKG_RELEASE:=$(AUTORELEASE) -PKG_VERSION:=1.2.5 -PKG_HASH:=140c9bdffe4f2b15bc2973b5f975d0fa5cc011f5a699c7bcdcb698b724b97d4d +PKG_VERSION:=1.2.6 +PKG_HASH:=e1bead15014adf404c1ae93b5bb24e6625840b4aadef6c1acfb47e0b99039f52 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://codeload.github.com/xdp-project/xdp-tools/tar.gz/v$(PKG_VERSION)? diff --git a/package/utils/f2fs-tools/Makefile b/package/utils/f2fs-tools/Makefile index 60f4b317c7..99d402af6c 100644 --- a/package/utils/f2fs-tools/Makefile +++ b/package/utils/f2fs-tools/Makefile @@ -18,6 +18,7 @@ PKG_HASH:=147d471040b44900283ce2c935f1d35d13d7f40008e7cb8fab2b69f54da01a4f PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=GPL-2.0-only PKG_LICENSE_FILES:=COPYING +PKG_CPE_ID:=cpe:/a:f2fs-tools_project:f2fs-tools PKG_FIXUP:=autoreconf PKG_BUILD_PARALLEL:=1 diff --git a/package/utils/mtd-utils/Makefile b/package/utils/mtd-utils/Makefile index 74380022a5..2f54b3ad0d 100644 --- a/package/utils/mtd-utils/Makefile +++ b/package/utils/mtd-utils/Makefile @@ -24,6 +24,7 @@ PKG_BUILD_DEPENDS:=util-linux PKG_LICENSE:=GPLv2 PKG_LICENSE_FILES:= +PKG_CPE_ID:=cpe:/a:mtd-utils_project:mtd-utils PKG_MAINTAINER:=John Crispin diff --git a/scripts/xxdi.pl b/scripts/xxdi.pl new file mode 100755 index 0000000000..f7bb3c2f9c --- /dev/null +++ b/scripts/xxdi.pl @@ -0,0 +1,66 @@ +#!/usr/bin/env perl +# +# xxdi.pl - perl implementation of 'xxd -i' mode +# +# Copyright 2013 Greg Kroah-Hartman +# Copyright 2013 Linux Foundation +# +# Released under the GPLv2. +# +# Implements the "basic" functionality of 'xxd -i' in perl to keep build +# systems from having to build/install/rely on vim-core, which not all +# distros want to do. But everyone has perl, so use it instead. +# + +use strict; +use warnings; + +my $indata; +my $var_name = "stdin"; +my $full_output = (@ARGV > 0 && $ARGV[0] eq '-i') ? shift @ARGV : undef; + +{ + local $/; + my $fh; + + if (@ARGV) { + $var_name = $ARGV[0]; + open($fh, '<:raw', $var_name) || die("xxdi.pl: Unable to open $var_name: $!\n"); + } elsif (! -t STDIN) { + $fh = \*STDIN; + undef $full_output; + } else { + die "usage: xxdi.pl [-i] [infile]\n"; + } + + $indata = readline $fh; + + close $fh; +} + +my $len_data = length($indata); +my $num_digits_per_line = 12; +my $outdata = ""; + +# Use the variable name of the file we read from, converting '/' and '. +# to '_', or, if this is stdin, just use "stdin" as the name. +$var_name =~ s/\//_/g; +$var_name =~ s/\./_/g; +$var_name = "__$var_name" if $var_name =~ /^\d/; + +$outdata = "unsigned char $var_name\[] = { " if $full_output; + +for (my $key= 0; $key < $len_data; $key++) { + if ($key % $num_digits_per_line == 0) { + $outdata = substr($outdata, 0, -1)."\n "; + } + $outdata .= sprintf("0x%.2x, ", ord(substr($indata, $key, 1))); +} + +$outdata = substr($outdata, 0, -2); +$outdata .= "\n"; + +$outdata .= "};\nunsigned int $var_name\_len = $len_data;\n" if $full_output; + +binmode STDOUT; +print $outdata; diff --git a/target/linux/airoha/Makefile b/target/linux/airoha/Makefile new file mode 100644 index 0000000000..723bec8cd4 --- /dev/null +++ b/target/linux/airoha/Makefile @@ -0,0 +1,15 @@ +include $(TOPDIR)/rules.mk + +ARCH:=arm +BOARD:=airoha +BOARDNAME:=Airoha ARM +CPU_TYPE:=cortex-a7 +FEATURES:=dt squashfs nand ramdisk gpio source-only + +KERNEL_PATCHVER:=5.15 + +include $(INCLUDE_DIR)/target.mk + +KERNELNAME:=Image dtbs + +$(eval $(call BuildTarget)) diff --git a/target/linux/airoha/config-5.15 b/target/linux/airoha/config-5.15 new file mode 100644 index 0000000000..0fbf8a4995 --- /dev/null +++ b/target/linux/airoha/config-5.15 @@ -0,0 +1,271 @@ +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_AIROHA=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +# CONFIG_ARM_HIGHBANK_CPUIDLE is not set +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_PSCI=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_SMMU is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_ATAGS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_CACHE_L2X0=y +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_FROM_BOOTLOADER=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_EN7523=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEBUG_MISC=y +CONFIG_DMA_OPS=y +CONFIG_DMA_REMAP=y +CONFIG_DTC=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_EN7523=y +CONFIG_GPIO_GENERIC=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDENED_USERCOPY=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HW_RANDOM=y +CONFIG_HZ_FIXED=0 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +CONFIG_IOMMU_SUPPORT=y +CONFIG_IO_URING=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NLS=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PARTITION_PERCPU=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_MEDIATEK=y +CONFIG_PCIE_PME=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PINCTRL=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SCSI=y +CONFIG_SCSI_COMMON=y +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_FSL=y +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SGL_ALLOC=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_AIROHA_EN7523=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_STACKTRACE=y +# CONFIG_SWAP is not set +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_PLATFORM is not set +CONFIG_USE_OF=y +# CONFIG_VFP is not set +CONFIG_WATCHDOG_CORE=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/airoha/dts/en7523-evb.dts b/target/linux/airoha/dts/en7523-evb.dts new file mode 100644 index 0000000000..f311c840e0 --- /dev/null +++ b/target/linux/airoha/dts/en7523-evb.dts @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +/* Bootloader installs ATF here */ +/memreserve/ 0x80000000 0x200000; + +#include "en7523.dtsi" + +/ { + model = "Airoha EN7523 Evaluation Board"; + compatible = "airoha,en7523-evb", "airoha,en7523"; + + aliases { + serial0 = &uart1; + }; + + chosen { + bootargs = "console=ttyS0,115200 earlycon"; + stdout-path = "serial0:115200n8"; + linux,usable-memory-range = <0x80200000 0x1fe00000>; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; + +&nand { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x7C000>; + read-only; + }; + + partition@1 { + label = "u-boot-env"; + reg = <0x7C000 0x4000>; + }; + + partition@2 { + label = "art"; + reg = <0x80000 0x40000>; + read-only; + }; + + partition@3 { + label = "firmware"; + reg = <0xC0000 0xDF40000>; + }; + }; +}; diff --git a/target/linux/airoha/dts/en7523.dtsi b/target/linux/airoha/dts/en7523.dtsi new file mode 100644 index 0000000000..72478b225c --- /dev/null +++ b/target/linux/airoha/dts/en7523.dtsi @@ -0,0 +1,219 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +#include +#include +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + npu_binary@84000000 { + no-map; + reg = <0x84000000 0xA00000>; + }; + + npu_flag@84B0000 { + no-map; + reg = <0x84B00000 0x100000>; + }; + + npu_pkt@85000000 { + no-map; + reg = <0x85000000 0x1A00000>; + }; + + npu_phyaddr@86B00000 { + no-map; + reg = <0x86B00000 0x100000>; + }; + + npu_rxdesc@86D00000 { + no-map; + reg = <0x86D00000 0x100000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&L2_0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + scu: system-controller@1fa20000 { + compatible = "airoha,en7523-scu"; + reg = <0x1fa20000 0x400>, + <0x1fb00000 0x1000>; + #clock-cells = <1>; + }; + + gic: interrupt-controller@9000000 { + compatible = "arm,gic-v3"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x09000000 0x20000>, + <0x09080000 0x80000>, + <0x09400000 0x2000>, + <0x09500000 0x2000>, + <0x09600000 0x20000>; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + }; + + uart1: serial@1fbf0000 { + compatible = "ns16550"; + reg = <0x1fbf0000 0x30>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clock-frequency = <1843200>; + status = "okay"; + }; + + gpio0: gpio@1fbf0200 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0204 0x4>, + <0x1fbf0200 0x4>, + <0x1fbf0220 0x4>, + <0x1fbf0214 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio1: gpio@1fbf0270 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0270 0x4>, + <0x1fbf0260 0x4>, + <0x1fbf0264 0x4>, + <0x1fbf0278 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + pcie0: pcie@1fa91000 { + compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0x1fa91000 0x1000>; + reg-names = "port0"; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck0"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + pcie_intc0: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pcie1: pcie@1fa92000 { + compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0x1fa92000 0x1000>; + reg-names = "port1"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck1"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc1 0>, + <0 0 0 2 &pcie_intc1 1>, + <0 0 0 3 &pcie_intc1 2>, + <0 0 0 4 &pcie_intc1 3>; + pcie_intc1: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + spi_ctrl: spi_controller@1fa10000 { + compatible = "airoha,en7523-spi"; + reg = <0x1fa10000 0x140>; + #address-cells = <1>; + #size-cells = <0>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + + nand: nand@0 { + compatible = "spi-nand"; + reg = <0>; + nand-ecc-engine = <&nand>; + }; + }; +}; diff --git a/target/linux/airoha/files/arch/arm/mach-airoha/Makefile b/target/linux/airoha/files/arch/arm/mach-airoha/Makefile new file mode 100644 index 0000000000..a5857d0d02 --- /dev/null +++ b/target/linux/airoha/files/arch/arm/mach-airoha/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += airoha.o diff --git a/target/linux/airoha/files/arch/arm/mach-airoha/airoha.c b/target/linux/airoha/files/arch/arm/mach-airoha/airoha.c new file mode 100644 index 0000000000..ea23b5abb4 --- /dev/null +++ b/target/linux/airoha/files/arch/arm/mach-airoha/airoha.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Device Tree support for Airoha SoCs + * + * Copyright (c) 2022 Felix Fietkau + */ +#include + +static const char * const airoha_board_dt_compat[] = { + "airoha,en7523", + NULL, +}; + +DT_MACHINE_START(MEDIATEK_DT, "Airoha Cortex-A53 (Device Tree)") + .dt_compat = airoha_board_dt_compat, +MACHINE_END diff --git a/target/linux/airoha/files/drivers/clk/clk-en7523.c b/target/linux/airoha/files/drivers/clk/clk-en7523.c new file mode 100644 index 0000000000..29f0126cbd --- /dev/null +++ b/target/linux/airoha/files/drivers/clk/clk-en7523.c @@ -0,0 +1,351 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include + +#define REG_PCI_CONTROL 0x88 +#define REG_PCI_CONTROL_PERSTOUT BIT(29) +#define REG_PCI_CONTROL_PERSTOUT1 BIT(26) +#define REG_PCI_CONTROL_REFCLK_EN1 BIT(22) +#define REG_GSW_CLK_DIV_SEL 0x1b4 +#define REG_EMI_CLK_DIV_SEL 0x1b8 +#define REG_BUS_CLK_DIV_SEL 0x1bc +#define REG_SPI_CLK_DIV_SEL 0x1c4 +#define REG_SPI_CLK_FREQ_SEL 0x1c8 +#define REG_NPU_CLK_DIV_SEL 0x1fc +#define REG_CRYPTO_CLKSRC 0x200 +#define REG_RESET_CONTROL 0x834 +#define REG_RESET_CONTROL_PCIEHB BIT(29) +#define REG_RESET_CONTROL_PCIE1 BIT(27) +#define REG_RESET_CONTROL_PCIE2 BIT(26) + +struct en_clk_desc { + int id; + const char *name; + u32 base_reg; + u8 base_bits; + u8 base_shift; + union { + const unsigned int *base_values; + unsigned int base_value; + }; + size_t n_base_values; + + u16 div_reg; + u8 div_bits; + u8 div_shift; + u16 div_val0; + u8 div_step; +}; + +struct en_clk_gate { + void __iomem *base; + struct clk_hw hw; +}; + +static const u32 gsw_base[] = { 400000000, 500000000 }; +static const u32 emi_base[] = { 333000000, 400000000 }; +static const u32 bus_base[] = { 500000000, 540000000 }; +static const u32 slic_base[] = { 100000000, 3125000 }; +static const u32 npu_base[] = { 333000000, 400000000, 500000000 }; + +static const struct en_clk_desc en7523_base_clks[] = { + { + .id = EN7523_CLK_GSW, + .name = "gsw", + + .base_reg = REG_GSW_CLK_DIV_SEL, + .base_bits = 1, + .base_shift = 8, + .base_values = gsw_base, + .n_base_values = ARRAY_SIZE(gsw_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_EMI, + .name = "emi", + + .base_reg = REG_EMI_CLK_DIV_SEL, + .base_bits = 1, + .base_shift = 8, + .base_values = emi_base, + .n_base_values = ARRAY_SIZE(emi_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_BUS, + .name = "bus", + + .base_reg = REG_BUS_CLK_DIV_SEL, + .base_bits = 1, + .base_shift = 8, + .base_values = bus_base, + .n_base_values = ARRAY_SIZE(bus_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_SLIC, + .name = "slic", + + .base_reg = REG_SPI_CLK_FREQ_SEL, + .base_bits = 1, + .base_shift = 0, + .base_values = slic_base, + .n_base_values = ARRAY_SIZE(slic_base), + + .div_reg = REG_SPI_CLK_DIV_SEL, + .div_bits = 5, + .div_shift = 24, + .div_val0 = 20, + .div_step = 2, + }, { + .id = EN7523_CLK_SPI, + .name = "spi", + + .base_reg = REG_SPI_CLK_DIV_SEL, + + .base_value = 400000000, + + .div_bits = 5, + .div_shift = 8, + .div_val0 = 40, + .div_step = 2, + }, { + .id = EN7523_CLK_NPU, + .name = "npu", + + .base_reg = REG_NPU_CLK_DIV_SEL, + .base_bits = 2, + .base_shift = 8, + .base_values = npu_base, + .n_base_values = ARRAY_SIZE(npu_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_CRYPTO, + .name = "crypto", + + .base_reg = REG_CRYPTO_CLKSRC, + .base_bits = 1, + .base_shift = 8, + .base_values = emi_base, + .n_base_values = ARRAY_SIZE(emi_base), + } +}; + +static const struct of_device_id of_match_clk_en7523[] = { + { .compatible = "airoha,en7523-scu", }, + { /* sentinel */ } +}; + +static unsigned int en7523_get_base_rate(void __iomem *base, unsigned int i) +{ + const struct en_clk_desc *desc = &en7523_base_clks[i]; + u32 val; + + if (!desc->base_bits) + return desc->base_value; + + val = readl(base + desc->base_reg); + val >>= desc->base_shift; + val &= (1 << desc->base_bits) - 1; + + if (val >= desc->n_base_values) + return 0; + + return desc->base_values[val]; +} + +static u32 en7523_get_div(void __iomem *base, int i) +{ + const struct en_clk_desc *desc = &en7523_base_clks[i]; + u32 reg, val; + + if (!desc->div_bits) + return 1; + + reg = desc->div_reg ? desc->div_reg : desc->base_reg; + val = readl(base + reg); + val >>= desc->div_shift; + val &= (1 << desc->div_bits) - 1; + + if (!val && desc->div_val0) + return desc->div_val0; + + return (val + 1) * desc->div_step; +} + +static int en7523_pci_is_enabled(struct clk_hw *hw) +{ + struct en_clk_gate *cg = container_of(hw, struct en_clk_gate, hw); + + return !!(readl(cg->base + REG_PCI_CONTROL) & REG_PCI_CONTROL_REFCLK_EN1); +} + +static int en7523_pci_prepare(struct clk_hw *hw) +{ + struct en_clk_gate *cg = container_of(hw, struct en_clk_gate, hw); + void __iomem *np_base = cg->base; + u32 val, mask; + + /* Need to pull device low before reset */ + val = readl(np_base + REG_PCI_CONTROL); + val &= ~(REG_PCI_CONTROL_PERSTOUT1 | REG_PCI_CONTROL_PERSTOUT); + writel(val, np_base + REG_PCI_CONTROL); + usleep_range(1000, 2000); + + /* Enable PCIe port 1 */ + val |= REG_PCI_CONTROL_REFCLK_EN1; + writel(val, np_base + REG_PCI_CONTROL); + usleep_range(1000, 2000); + + /* Reset to default */ + val = readl(np_base + REG_RESET_CONTROL); + mask = REG_RESET_CONTROL_PCIE1 | REG_RESET_CONTROL_PCIE2 | + REG_RESET_CONTROL_PCIEHB; + writel(val & ~mask, np_base + REG_RESET_CONTROL); + usleep_range(1000, 2000); + writel(val | mask, np_base + REG_RESET_CONTROL); + msleep(100); + writel(val & ~mask, np_base + REG_RESET_CONTROL); + usleep_range(5000, 10000); + + /* Release device */ + mask = REG_PCI_CONTROL_PERSTOUT1 | REG_PCI_CONTROL_PERSTOUT; + val = readl(np_base + REG_PCI_CONTROL); + writel(val & ~mask, np_base + REG_PCI_CONTROL); + usleep_range(1000, 2000); + writel(val | mask, np_base + REG_PCI_CONTROL); + msleep(250); + + return 0; +} + +static void en7523_pci_unprepare(struct clk_hw *hw) +{ + struct en_clk_gate *cg = container_of(hw, struct en_clk_gate, hw); + void __iomem *np_base = cg->base; + u32 val; + + val = readl(np_base + REG_PCI_CONTROL); + val &= ~REG_PCI_CONTROL_REFCLK_EN1; + writel(val, np_base + REG_PCI_CONTROL); +} + +static struct clk_hw *en7523_register_pcie_clk(struct device *dev, + void __iomem *np_base) +{ + static const struct clk_ops pcie_gate_ops = { + .is_enabled = en7523_pci_is_enabled, + .prepare = en7523_pci_prepare, + .unprepare = en7523_pci_unprepare, + }; + struct clk_init_data init = { + .name = "pcie", + .ops = &pcie_gate_ops, + }; + struct en_clk_gate *cg; + + cg = devm_kzalloc(dev, sizeof(*cg), GFP_KERNEL); + if (!cg) + return NULL; + + cg->base = np_base; + cg->hw.init = &init; + en7523_pci_unprepare(&cg->hw); + + if (clk_hw_register(dev, &cg->hw)) + return NULL; + + return &cg->hw; +} + +static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data, + void __iomem *base, void __iomem *np_base) +{ + struct clk_hw *hw; + u32 rate; + int i; + + for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) { + const struct en_clk_desc *desc = &en7523_base_clks[i]; + + rate = en7523_get_base_rate(base, i); + rate /= en7523_get_div(base, i); + + hw = clk_hw_register_fixed_rate(dev, desc->name, NULL, 0, rate); + if (IS_ERR(hw)) { + pr_err("Failed to register clk %s: %ld\n", + desc->name, PTR_ERR(hw)); + continue; + } + + clk_data->hws[desc->id] = hw; + } + + hw = en7523_register_pcie_clk(dev, np_base); + clk_data->hws[EN7523_CLK_PCIE] = hw; + + clk_data->num = EN7523_NUM_CLOCKS; +} + +static int en7523_clk_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + struct clk_hw_onecell_data *clk_data; + void __iomem *base, *np_base; + int r; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + np_base = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(np_base)) + return PTR_ERR(np_base); + + clk_data = devm_kzalloc(&pdev->dev, + struct_size(clk_data, hws, EN7523_NUM_CLOCKS), + GFP_KERNEL); + if (!clk_data) + return -ENOMEM; + + en7523_register_clocks(&pdev->dev, clk_data, base, np_base); + + r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); + if (r) + dev_err(&pdev->dev, + "could not register clock provider: %s: %d\n", + pdev->name, r); + + return r; +} + +static struct platform_driver clk_en7523_drv = { + .probe = en7523_clk_probe, + .driver = { + .name = "clk-en7523", + .of_match_table = of_match_clk_en7523, + .suppress_bind_attrs = true, + }, +}; + +static int __init clk_en7523_init(void) +{ + return platform_driver_register(&clk_en7523_drv); +} + +arch_initcall(clk_en7523_init); diff --git a/target/linux/airoha/files/drivers/gpio/gpio-en7523.c b/target/linux/airoha/files/drivers/gpio/gpio-en7523.c new file mode 100644 index 0000000000..f836a8db4c --- /dev/null +++ b/target/linux/airoha/files/drivers/gpio/gpio-en7523.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include + +#define AIROHA_GPIO_MAX 32 + +/** + * airoha_gpio_ctrl - Airoha GPIO driver data + * @gc: Associated gpio_chip instance. + * @data: The data register. + * @dir0: The direction register for the lower 16 pins. + * @dir1: The direction register for the higher 16 pins. + * @output: The output enable register. + */ +struct airoha_gpio_ctrl { + struct gpio_chip gc; + void __iomem *data; + void __iomem *dir[2]; + void __iomem *output; +}; + +static struct airoha_gpio_ctrl *gc_to_ctrl(struct gpio_chip *gc) +{ + return container_of(gc, struct airoha_gpio_ctrl, gc); +} + +static int airoha_dir_set(struct gpio_chip *gc, unsigned int gpio, + int val, int out) +{ + struct airoha_gpio_ctrl *ctrl = gc_to_ctrl(gc); + u32 dir = ioread32(ctrl->dir[gpio / 16]); + u32 output = ioread32(ctrl->output); + u32 mask = BIT((gpio % 16) * 2); + + if (out) { + dir |= mask; + output |= BIT(gpio); + } else { + dir &= ~mask; + output &= ~BIT(gpio); + } + + iowrite32(dir, ctrl->dir[gpio / 16]); + + if (out) + gc->set(gc, gpio, val); + + iowrite32(output, ctrl->output); + + return 0; +} + +static int airoha_dir_out(struct gpio_chip *gc, unsigned int gpio, + int val) +{ + return airoha_dir_set(gc, gpio, val, 1); +} + +static int airoha_dir_in(struct gpio_chip *gc, unsigned int gpio) +{ + return airoha_dir_set(gc, gpio, 0, 0); +} + +static int airoha_get_dir(struct gpio_chip *gc, unsigned int gpio) +{ + struct airoha_gpio_ctrl *ctrl = gc_to_ctrl(gc); + u32 dir = ioread32(ctrl->dir[gpio / 16]); + u32 mask = BIT((gpio % 16) * 2); + + return (dir & mask) ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN; +} + +static int airoha_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct airoha_gpio_ctrl *ctrl; + int err; + + ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return -ENOMEM; + + ctrl->data = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(ctrl->data)) + return PTR_ERR(ctrl->data); + + ctrl->dir[0] = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(ctrl->dir[0])) + return PTR_ERR(ctrl->dir[0]); + + ctrl->dir[1] = devm_platform_ioremap_resource(pdev, 2); + if (IS_ERR(ctrl->dir[1])) + return PTR_ERR(ctrl->dir[1]); + + ctrl->output = devm_platform_ioremap_resource(pdev, 3); + if (IS_ERR(ctrl->output)) + return PTR_ERR(ctrl->output); + + err = bgpio_init(&ctrl->gc, dev, 4, ctrl->data, NULL, + NULL, NULL, NULL, 0); + if (err) + return dev_err_probe(dev, err, "unable to init generic GPIO"); + + ctrl->gc.ngpio = AIROHA_GPIO_MAX; + ctrl->gc.owner = THIS_MODULE; + ctrl->gc.direction_output = airoha_dir_out; + ctrl->gc.direction_input = airoha_dir_in; + ctrl->gc.get_direction = airoha_get_dir; + + return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl); +} + +static const struct of_device_id airoha_gpio_of_match[] = { + { .compatible = "airoha,en7523-gpio" }, + { } +}; +MODULE_DEVICE_TABLE(of, airoha_gpio_of_match); + +static struct platform_driver airoha_gpio_driver = { + .driver = { + .name = "airoha-gpio", + .of_match_table = airoha_gpio_of_match, + }, + .probe = airoha_gpio_probe, +}; +module_platform_driver(airoha_gpio_driver); + +MODULE_DESCRIPTION("Airoha GPIO support"); +MODULE_AUTHOR("John Crispin "); +MODULE_LICENSE("GPL v2"); diff --git a/target/linux/airoha/files/include/dt-bindings/clock/en7523-clk.h b/target/linux/airoha/files/include/dt-bindings/clock/en7523-clk.h new file mode 100644 index 0000000000..717d23a5e5 --- /dev/null +++ b/target/linux/airoha/files/include/dt-bindings/clock/en7523-clk.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ +#define _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ + +#define EN7523_CLK_GSW 0 +#define EN7523_CLK_EMI 1 +#define EN7523_CLK_BUS 2 +#define EN7523_CLK_SLIC 3 +#define EN7523_CLK_SPI 4 +#define EN7523_CLK_NPU 5 +#define EN7523_CLK_CRYPTO 6 +#define EN7523_CLK_PCIE 7 + +#define EN7523_NUM_CLOCKS 8 + +#endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */ diff --git a/target/linux/airoha/image/Makefile b/target/linux/airoha/image/Makefile new file mode 100644 index 0000000000..c6def5ad65 --- /dev/null +++ b/target/linux/airoha/image/Makefile @@ -0,0 +1,37 @@ +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/image.mk + +KERNEL_LOADADDR := 0x80208000 + +define Target/Description + Build firmware images for Airoha EN7523 ARM based boards. +endef + +# default all platform image(fit) build +define Device/Default + PROFILES = Default $$(DEVICE_NAME) + KERNEL_NAME := Image + KERNEL = kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb + KERNEL_INITRAMFS = kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd + FILESYSTEMS := squashfs + DEVICE_DTS_DIR := $(DTS_DIR) + IMAGES := sysupgrade.bin + IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | \ + pad-rootfs | append-metadata +endef + +define Image/Build + $(call Image/Build/$(1),$(1)) +endef + +define Device/airoha_en7523-evb + DEVICE_VENDOR := Airoha + DEVICE_MODEL := EN7523 Evaluation Board + DEVICE_DTS := en7523-evb + DEVICE_DTS_DIR := ../dts +endef +TARGET_DEVICES += airoha_en7523-evb + +$(eval $(call BuildImage)) diff --git a/target/linux/airoha/image/en7523.mk b/target/linux/airoha/image/en7523.mk new file mode 100644 index 0000000000..e69de29bb2 diff --git a/target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch b/target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch new file mode 100644 index 0000000000..b1f88a6ac7 --- /dev/null +++ b/target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch @@ -0,0 +1,35 @@ +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 66f5d6c3..05cd3385 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -571,6 +571,18 @@ config ARCH_VIRT + select HAVE_ARM_ARCH_TIMER + select ARCH_SUPPORTS_BIG_ENDIAN + ++config ARCH_AIROHA ++ bool "Airoha SoC Support" ++ depends on ARCH_MULTI_V7 ++ select ARM_AMBA ++ select ARM_GIC ++ select ARM_GIC_V3 ++ select ARM_PSCI ++ select HAVE_ARM_ARCH_TIMER ++ select COMMON_CLK ++ help ++ Support for Airoha EN7523 SoCs ++ + # + # This is sorted alphabetically by mach-* pathname. However, plat-* + # Kconfigs may be included either alphabetically (according to the +diff --git a/arch/arm/Makefile b/arch/arm/Makefile +index fa45837b..c34f7463 100644 +--- a/arch/arm/Makefile ++++ b/arch/arm/Makefile +@@ -156,6 +156,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 + # Machine directory name. This list is sorted alphanumerically + # by CONFIG_* macro name. + machine-$(CONFIG_ARCH_ACTIONS) += actions ++machine-$(CONFIG_ARCH_AIROHA) += airoha + machine-$(CONFIG_ARCH_ALPINE) += alpine + machine-$(CONFIG_ARCH_ARTPEC) += artpec + machine-$(CONFIG_ARCH_ASPEED) += aspeed diff --git a/target/linux/airoha/patches-5.15/0002-add-airoha-en7523-clk-driver.patch b/target/linux/airoha/patches-5.15/0002-add-airoha-en7523-clk-driver.patch new file mode 100644 index 0000000000..676e0f40bb --- /dev/null +++ b/target/linux/airoha/patches-5.15/0002-add-airoha-en7523-clk-driver.patch @@ -0,0 +1,32 @@ +diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig +index c5b3dc97..c973ac1a 100644 +--- a/drivers/clk/Kconfig ++++ b/drivers/clk/Kconfig +@@ -192,6 +192,15 @@ config COMMON_CLK_CS2000_CP + help + If you say yes here you get support for the CS2000 clock multiplier. + ++config COMMON_CLK_EN7523 ++ bool "Clock driver for Airoha EN7523 SoC system clocks" ++ depends on OF ++ depends on ARCH_AIROHA || COMPILE_TEST ++ default ARCH_AIROHA ++ help ++ This driver provides the fixed clocks and gates present on Airoha ++ ARM silicon. ++ + config COMMON_CLK_FSL_FLEXSPI + tristate "Clock driver for FlexSPI on Layerscape SoCs" + depends on ARCH_LAYERSCAPE || COMPILE_TEST +diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +index e4231212..be11d88c 100644 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -27,6 +27,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o + obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o + obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o + obj-$(CONFIG_ARCH_SPARX5) += clk-sparx5.o ++obj-$(CONFIG_COMMON_CLK_EN7523) += clk-en7523.o + obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o + obj-$(CONFIG_COMMON_CLK_FSL_FLEXSPI) += clk-fsl-flexspi.o + obj-$(CONFIG_COMMON_CLK_FSL_SAI) += clk-fsl-sai.o diff --git a/target/linux/airoha/patches-5.15/0003-add-airoha-en7523-gpio-driver.patch b/target/linux/airoha/patches-5.15/0003-add-airoha-en7523-gpio-driver.patch new file mode 100644 index 0000000000..1d95e6b2c8 --- /dev/null +++ b/target/linux/airoha/patches-5.15/0003-add-airoha-en7523-gpio-driver.patch @@ -0,0 +1,33 @@ +diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig +index cbfb6f13..b3106df6 100644 +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -247,6 +247,16 @@ config GPIO_EM + help + Say yes here to support GPIO on Renesas Emma Mobile SoCs. + ++config GPIO_EN7523 ++ tristate "Airoha GPIO support" ++ depends on ARCH_AIROHA ++ default ARCH_AIROHA ++ select GPIO_GENERIC ++ select GPIOLIB_IRQCHIP ++ help ++ Say Y or M here to support the GPIO controller block on the ++ Airoha EN7523 SoC. It supports two banks of 32 GPIOs. ++ + config GPIO_EP93XX + def_bool y + depends on ARCH_EP93XX +diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile +index 61202717..4c73ce82 100644 +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -57,6 +57,7 @@ obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o + obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o + obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o + obj-$(CONFIG_GPIO_EM) += gpio-em.o ++obj-$(CONFIG_GPIO_EN7523) += gpio-en7523.o + obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o + obj-$(CONFIG_GPIO_EXAR) += gpio-exar.o + obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o diff --git a/target/linux/airoha/patches-5.15/0004-ARM-9124-1-uncompress-Parse-linux-usable-memory-rang.patch b/target/linux/airoha/patches-5.15/0004-ARM-9124-1-uncompress-Parse-linux-usable-memory-rang.patch new file mode 100644 index 0000000000..f13ab2b0ed --- /dev/null +++ b/target/linux/airoha/patches-5.15/0004-ARM-9124-1-uncompress-Parse-linux-usable-memory-rang.patch @@ -0,0 +1,111 @@ +From 48342ae751c797ac73ac9c894b3f312df18ffd21 Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Wed, 15 Sep 2021 13:46:20 +0100 +Subject: [PATCH] ARM: 9124/1: uncompress: Parse "linux,usable-memory-range" DT + property + +Add support for parsing the "linux,usable-memory-range" DT property. +This property is used to describe the usable memory reserved for the +crash dump kernel, and thus makes the memory reservation explicit. +If present, Linux no longer needs to mask the program counter, and rely +on the "mem=" kernel parameter to obtain the start and size of usable +memory. + +For backwards compatibility, the traditional method to derive the start +of memory is still used if "linux,usable-memory-range" is absent. + +Signed-off-by: Geert Uytterhoeven +Signed-off-by: Russell King (Oracle) +Signed-off-by: Daniel Danzberger +--- + .../arm/boot/compressed/fdt_check_mem_start.c | 48 ++++++++++++++++--- + 1 file changed, 42 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/compressed/fdt_check_mem_start.c b/arch/arm/boot/compressed/fdt_check_mem_start.c +index 62450d824c3c..9291a2661bdf 100644 +--- a/arch/arm/boot/compressed/fdt_check_mem_start.c ++++ b/arch/arm/boot/compressed/fdt_check_mem_start.c +@@ -55,16 +55,17 @@ static uint64_t get_val(const fdt32_t *cells, uint32_t ncells) + * DTB, and, if out-of-range, replace it by the real start address. + * To preserve backwards compatibility (systems reserving a block of memory + * at the start of physical memory, kdump, ...), the traditional method is +- * always used if it yields a valid address. ++ * used if it yields a valid address, unless the "linux,usable-memory-range" ++ * property is present. + * + * Return value: start address of physical memory to use + */ + uint32_t fdt_check_mem_start(uint32_t mem_start, const void *fdt) + { +- uint32_t addr_cells, size_cells, base; ++ uint32_t addr_cells, size_cells, usable_base, base; + uint32_t fdt_mem_start = 0xffffffff; +- const fdt32_t *reg, *endp; +- uint64_t size, end; ++ const fdt32_t *usable, *reg, *endp; ++ uint64_t size, usable_end, end; + const char *type; + int offset, len; + +@@ -80,6 +81,27 @@ uint32_t fdt_check_mem_start(uint32_t mem_start, const void *fdt) + if (addr_cells > 2 || size_cells > 2) + return mem_start; + ++ /* ++ * Usable memory in case of a crash dump kernel ++ * This property describes a limitation: memory within this range is ++ * only valid when also described through another mechanism ++ */ ++ usable = get_prop(fdt, "/chosen", "linux,usable-memory-range", ++ (addr_cells + size_cells) * sizeof(fdt32_t)); ++ if (usable) { ++ size = get_val(usable + addr_cells, size_cells); ++ if (!size) ++ return mem_start; ++ ++ if (addr_cells > 1 && fdt32_ld(usable)) { ++ /* Outside 32-bit address space */ ++ return mem_start; ++ } ++ ++ usable_base = fdt32_ld(usable + addr_cells - 1); ++ usable_end = usable_base + size; ++ } ++ + /* Walk all memory nodes and regions */ + for (offset = fdt_next_node(fdt, -1, NULL); offset >= 0; + offset = fdt_next_node(fdt, offset, NULL)) { +@@ -107,7 +129,20 @@ uint32_t fdt_check_mem_start(uint32_t mem_start, const void *fdt) + + base = fdt32_ld(reg + addr_cells - 1); + end = base + size; +- if (mem_start >= base && mem_start < end) { ++ if (usable) { ++ /* ++ * Clip to usable range, which takes precedence ++ * over mem_start ++ */ ++ if (base < usable_base) ++ base = usable_base; ++ ++ if (end > usable_end) ++ end = usable_end; ++ ++ if (end <= base) ++ continue; ++ } else if (mem_start >= base && mem_start < end) { + /* Calculated address is valid, use it */ + return mem_start; + } +@@ -123,7 +158,8 @@ uint32_t fdt_check_mem_start(uint32_t mem_start, const void *fdt) + } + + /* +- * The calculated address is not usable. ++ * The calculated address is not usable, or was overridden by the ++ * "linux,usable-memory-range" property. + * Use the lowest usable physical memory address from the DTB instead, + * and make sure this is a multiple of 2 MiB for phys/virt patching. + */ +-- +2.35.1 diff --git a/target/linux/airoha/patches-5.15/0005-spi-Add-support-for-the-Airoha-EN7523-SoC-SPI-contro.patch b/target/linux/airoha/patches-5.15/0005-spi-Add-support-for-the-Airoha-EN7523-SoC-SPI-contro.patch new file mode 100644 index 0000000000..e368acc0cf --- /dev/null +++ b/target/linux/airoha/patches-5.15/0005-spi-Add-support-for-the-Airoha-EN7523-SoC-SPI-contro.patch @@ -0,0 +1,346 @@ +diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig +index 83e352b0..5f7defe4 100644 +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -308,6 +308,12 @@ config SPI_DLN2 + This driver can also be built as a module. If so, the module + will be called spi-dln2. + ++config SPI_AIROHA_EN7523 ++ bool "Airoha EN7523 SPI controller support" ++ depends on ARCH_AIROHA ++ help ++ This enables SPI controller support for the Airoha EN7523 SoC. ++ + config SPI_EP93XX + tristate "Cirrus Logic EP93xx SPI controller" + depends on ARCH_EP93XX || COMPILE_TEST +diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile +index 699db95c..6c9460f7 100644 +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -45,6 +45,7 @@ obj-$(CONFIG_SPI_DW_BT1) += spi-dw-bt1.o + obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o + obj-$(CONFIG_SPI_DW_PCI) += spi-dw-pci.o + obj-$(CONFIG_SPI_EP93XX) += spi-ep93xx.o ++obj-$(CONFIG_SPI_AIROHA_EN7523) += spi-en7523.o + obj-$(CONFIG_SPI_FALCON) += spi-falcon.o + obj-$(CONFIG_SPI_FSI) += spi-fsi.o + obj-$(CONFIG_SPI_FSL_CPM) += spi-fsl-cpm.o +diff --git a/drivers/spi/spi-en7523.c b/drivers/spi/spi-en7523.c +new file mode 100644 +index 00000000..322bf2eb +--- /dev/null ++++ b/drivers/spi/spi-en7523.c +@@ -0,0 +1,311 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++#include ++#include ++#include ++#include ++ ++ ++#define ENSPI_READ_IDLE_EN 0x0004 ++#define ENSPI_MTX_MODE_TOG 0x0014 ++#define ENSPI_RDCTL_FSM 0x0018 ++#define ENSPI_MANUAL_EN 0x0020 ++#define ENSPI_MANUAL_OPFIFO_EMPTY 0x0024 ++#define ENSPI_MANUAL_OPFIFO_WDATA 0x0028 ++#define ENSPI_MANUAL_OPFIFO_FULL 0x002C ++#define ENSPI_MANUAL_OPFIFO_WR 0x0030 ++#define ENSPI_MANUAL_DFIFO_FULL 0x0034 ++#define ENSPI_MANUAL_DFIFO_WDATA 0x0038 ++#define ENSPI_MANUAL_DFIFO_EMPTY 0x003C ++#define ENSPI_MANUAL_DFIFO_RD 0x0040 ++#define ENSPI_MANUAL_DFIFO_RDATA 0x0044 ++#define ENSPI_IER 0x0090 ++#define ENSPI_NFI2SPI_EN 0x0130 ++ ++// TODO not in spi block ++#define ENSPI_CLOCK_DIVIDER ((void __iomem *)0x1fa201c4) ++ ++#define OP_CSH 0x00 ++#define OP_CSL 0x01 ++#define OP_CK 0x02 ++#define OP_OUTS 0x08 ++#define OP_OUTD 0x09 ++#define OP_OUTQ 0x0A ++#define OP_INS 0x0C ++#define OP_INS0 0x0D ++#define OP_IND 0x0E ++#define OP_INQ 0x0F ++#define OP_OS2IS 0x10 ++#define OP_OS2ID 0x11 ++#define OP_OS2IQ 0x12 ++#define OP_OD2IS 0x13 ++#define OP_OD2ID 0x14 ++#define OP_OD2IQ 0x15 ++#define OP_OQ2IS 0x16 ++#define OP_OQ2ID 0x17 ++#define OP_OQ2IQ 0x18 ++#define OP_OSNIS 0x19 ++#define OP_ODNID 0x1A ++ ++#define MATRIX_MODE_AUTO 1 ++#define CONF_MTX_MODE_AUTO 0 ++#define MANUALEN_AUTO 0 ++#define MATRIX_MODE_MANUAL 0 ++#define CONF_MTX_MODE_MANUAL 9 ++#define MANUALEN_MANUAL 1 ++ ++#define _ENSPI_MAX_XFER 0x1ff ++ ++#define REG(x) (iobase + x) ++ ++ ++static void __iomem *iobase; ++ ++ ++static void opfifo_write(u32 cmd, u32 len) ++{ ++ u32 tmp = ((cmd & 0x1f) << 9) | (len & 0x1ff); ++ ++ writel(tmp, REG(ENSPI_MANUAL_OPFIFO_WDATA)); ++ ++ /* Wait for room in OPFIFO */ ++ while (readl(REG(ENSPI_MANUAL_OPFIFO_FULL))) ++ ; ++ ++ /* Shift command into OPFIFO */ ++ writel(1, REG(ENSPI_MANUAL_OPFIFO_WR)); ++ ++ /* Wait for command to finish */ ++ while (!readl(REG(ENSPI_MANUAL_OPFIFO_EMPTY))) ++ ; ++} ++ ++static void set_cs(int state) ++{ ++ if (state) ++ opfifo_write(OP_CSH, 1); ++ else ++ opfifo_write(OP_CSL, 1); ++} ++ ++static void manual_begin_cmd(void) ++{ ++ /* Disable read idle state */ ++ writel(0, REG(ENSPI_READ_IDLE_EN)); ++ ++ /* Wait for FSM to reach idle state */ ++ while (readl(REG(ENSPI_RDCTL_FSM))) ++ ; ++ ++ /* Set SPI core to manual mode */ ++ writel(CONF_MTX_MODE_MANUAL, REG(ENSPI_MTX_MODE_TOG)); ++ writel(MANUALEN_MANUAL, REG(ENSPI_MANUAL_EN)); ++} ++ ++static void manual_end_cmd(void) ++{ ++ /* Set SPI core to auto mode */ ++ writel(CONF_MTX_MODE_AUTO, REG(ENSPI_MTX_MODE_TOG)); ++ writel(MANUALEN_AUTO, REG(ENSPI_MANUAL_EN)); ++ ++ /* Enable read idle state */ ++ writel(1, REG(ENSPI_READ_IDLE_EN)); ++} ++ ++static void dfifo_read(u8 *buf, int len) ++{ ++ int i; ++ ++ for (i = 0; i < len; i++) { ++ /* Wait for requested data to show up in DFIFO */ ++ while (readl(REG(ENSPI_MANUAL_DFIFO_EMPTY))) ++ ; ++ buf[i] = readl(REG(ENSPI_MANUAL_DFIFO_RDATA)); ++ /* Queue up next byte */ ++ writel(1, REG(ENSPI_MANUAL_DFIFO_RD)); ++ } ++} ++ ++static void dfifo_write(const u8 *buf, int len) ++{ ++ int i; ++ ++ for (i = 0; i < len; i++) { ++ /* Wait for room in DFIFO */ ++ while (readl(REG(ENSPI_MANUAL_DFIFO_FULL))) ++ ; ++ writel(buf[i], REG(ENSPI_MANUAL_DFIFO_WDATA)); ++ } ++} ++ ++static void set_spi_clock_speed(int freq_mhz) ++{ ++ u32 tmp, val; ++ ++ tmp = readl(ENSPI_CLOCK_DIVIDER); ++ tmp &= 0xffff0000; ++ writel(tmp, ENSPI_CLOCK_DIVIDER); ++ ++ val = (400 / (freq_mhz * 2)); ++ tmp |= (val << 8) | 1; ++ writel(tmp, ENSPI_CLOCK_DIVIDER); ++} ++ ++static void init_hw(void) ++{ ++ /* Disable manual/auto mode clash interrupt */ ++ writel(0, REG(ENSPI_IER)); ++ ++ // TODO via clk framework ++ // set_spi_clock_speed(50); ++ ++ /* Disable DMA */ ++ writel(0, REG(ENSPI_NFI2SPI_EN)); ++} ++ ++static int xfer_read(struct spi_transfer *xfer) ++{ ++ int opcode; ++ uint8_t *buf = xfer->rx_buf; ++ ++ switch (xfer->rx_nbits) { ++ case SPI_NBITS_SINGLE: ++ opcode = OP_INS; ++ break; ++ case SPI_NBITS_DUAL: ++ opcode = OP_IND; ++ break; ++ case SPI_NBITS_QUAD: ++ opcode = OP_INQ; ++ break; ++ } ++ ++ opfifo_write(opcode, xfer->len); ++ dfifo_read(buf, xfer->len); ++ ++ return xfer->len; ++} ++ ++static int xfer_write(struct spi_transfer *xfer, int next_xfer_is_rx) ++{ ++ int opcode; ++ const uint8_t *buf = xfer->tx_buf; ++ ++ if (next_xfer_is_rx) { ++ /* need to use Ox2Ix opcode to set the core to input afterwards */ ++ switch (xfer->tx_nbits) { ++ case SPI_NBITS_SINGLE: ++ opcode = OP_OS2IS; ++ break; ++ case SPI_NBITS_DUAL: ++ opcode = OP_OS2ID; ++ break; ++ case SPI_NBITS_QUAD: ++ opcode = OP_OS2IQ; ++ break; ++ } ++ } else { ++ switch (xfer->tx_nbits) { ++ case SPI_NBITS_SINGLE: ++ opcode = OP_OUTS; ++ break; ++ case SPI_NBITS_DUAL: ++ opcode = OP_OUTD; ++ break; ++ case SPI_NBITS_QUAD: ++ opcode = OP_OUTQ; ++ break; ++ } ++ } ++ ++ opfifo_write(opcode, xfer->len); ++ dfifo_write(buf, xfer->len); ++ ++ return xfer->len; ++} ++ ++size_t max_transfer_size(struct spi_device *spi) ++{ ++ return _ENSPI_MAX_XFER; ++} ++ ++int transfer_one_message(struct spi_controller *ctrl, struct spi_message *msg) ++{ ++ struct spi_transfer *xfer; ++ int next_xfer_is_rx = 0; ++ ++ manual_begin_cmd(); ++ set_cs(0); ++ list_for_each_entry(xfer, &msg->transfers, transfer_list) { ++ if (xfer->tx_buf) { ++ if (!list_is_last(&xfer->transfer_list, &msg->transfers) ++ && list_next_entry(xfer, transfer_list)->rx_buf != NULL) ++ next_xfer_is_rx = 1; ++ else ++ next_xfer_is_rx = 0; ++ msg->actual_length += xfer_write(xfer, next_xfer_is_rx); ++ } else if (xfer->rx_buf) { ++ msg->actual_length += xfer_read(xfer); ++ } ++ } ++ set_cs(1); ++ manual_end_cmd(); ++ ++ msg->status = 0; ++ spi_finalize_current_message(ctrl); ++ ++ return 0; ++} ++ ++static int spi_probe(struct platform_device *pdev) ++{ ++ struct spi_controller *ctrl; ++ int err; ++ ++ ctrl = devm_spi_alloc_master(&pdev->dev, 0); ++ if (!ctrl) { ++ dev_err(&pdev->dev, "Error allocating SPI controller\n"); ++ return -ENOMEM; ++ } ++ ++ iobase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); ++ if (IS_ERR(iobase)) { ++ dev_err(&pdev->dev, "Could not map SPI register address"); ++ return -ENOMEM; ++ } ++ ++ init_hw(); ++ ++ ctrl->dev.of_node = pdev->dev.of_node; ++ ctrl->flags = SPI_CONTROLLER_HALF_DUPLEX; ++ ctrl->mode_bits = SPI_RX_DUAL | SPI_TX_DUAL; ++ ctrl->max_transfer_size = max_transfer_size; ++ ctrl->transfer_one_message = transfer_one_message; ++ err = devm_spi_register_controller(&pdev->dev, ctrl); ++ if (err) { ++ dev_err(&pdev->dev, "Could not register SPI controller\n"); ++ return -ENODEV; ++ } ++ ++ return 0; ++} ++ ++static const struct of_device_id spi_of_ids[] = { ++ { .compatible = "airoha,en7523-spi" }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, spi_of_ids); ++ ++static struct platform_driver spi_driver = { ++ .probe = spi_probe, ++ .driver = { ++ .name = "airoha-en7523-spi", ++ .of_match_table = spi_of_ids, ++ }, ++}; ++ ++module_platform_driver(spi_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Bert Vermeulen "); ++MODULE_DESCRIPTION("Airoha EN7523 SPI driver"); diff --git a/target/linux/airoha/patches-5.15/0006-PCI-mediatek-Allow-building-for-ARCH_AIROHA.patch b/target/linux/airoha/patches-5.15/0006-PCI-mediatek-Allow-building-for-ARCH_AIROHA.patch new file mode 100644 index 0000000000..9f51f281bc --- /dev/null +++ b/target/linux/airoha/patches-5.15/0006-PCI-mediatek-Allow-building-for-ARCH_AIROHA.patch @@ -0,0 +1,35 @@ +From b3b76fc86f0fb4d98918f48c784138bfa950dff6 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Wed, 15 Jun 2022 14:53:34 +0200 +Subject: [PATCH] PCI: mediatek: Allow building for ARCH_AIROHA + +Allow selecting the pcie-mediatek driver if ARCH_AIROHA is set, because the +Airoha EN7523 SoC uses the same controller as MT7622. + +The driver itself is not modified. The PCIe controller DT node should use +mediatek,mt7622-pcie after airoha,en7523-pcie. + +Link: https://lore.kernel.org/r/20220615125335.96089-2-nbd@nbd.name +Signed-off-by: Felix Fietkau +Signed-off-by: Bjorn Helgaas +Acked-by: Lorenzo Pieralisi +Signed-off-by: Daniel Danzberger +--- + drivers/pci/controller/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig +index b8d96d38064d..2f6806dc2a20 100644 +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -237,7 +237,7 @@ config PCIE_ROCKCHIP_EP + + config PCIE_MEDIATEK + tristate "MediaTek PCIe controller" +- depends on ARCH_MEDIATEK || COMPILE_TEST ++ depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST + depends on OF + depends on PCI_MSI_IRQ_DOMAIN + help +-- +2.35.1 diff --git a/target/linux/ath79/Makefile b/target/linux/ath79/Makefile index dd57d9fed9..20dae789af 100644 --- a/target/linux/ath79/Makefile +++ b/target/linux/ath79/Makefile @@ -9,6 +9,7 @@ SUBTARGETS:=generic mikrotik nand tiny FEATURES:=ramdisk squashfs usbgadget KERNEL_PATCHVER:=5.10 +KERNEL_TESTING_PATCHVER:=5.15 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ath79/generic/target.mk b/target/linux/ath79/generic/target.mk index 0c94c15cb1..ca6c2da1e5 100644 --- a/target/linux/ath79/generic/target.mk +++ b/target/linux/ath79/generic/target.mk @@ -2,8 +2,6 @@ BOARDNAME:=Generic DEFAULT_PACKAGES += wpad-basic-openssl -KERNEL_TESTING_PATCHVER:=5.15 - define Target/Description Build firmware images for generic Atheros AR71xx/AR913x/AR934x based boards. endef diff --git a/target/linux/ath79/mikrotik/target.mk b/target/linux/ath79/mikrotik/target.mk index bdd0cb42ff..5618f6cbd7 100644 --- a/target/linux/ath79/mikrotik/target.mk +++ b/target/linux/ath79/mikrotik/target.mk @@ -5,8 +5,6 @@ IMAGES_DIR := ../../.. DEFAULT_PACKAGES += wpad-basic-openssl -KERNEL_TESTING_PATCHVER:=5.15 - define Target/Description Build firmware images for MikroTik devices based on Qualcomm Atheros MIPS SoCs (AR71xx, AR72xx, AR91xx, AR93xx, QCA95xx). diff --git a/target/linux/ath79/nand/target.mk b/target/linux/ath79/nand/target.mk index 9d96e7fe48..52befec039 100644 --- a/target/linux/ath79/nand/target.mk +++ b/target/linux/ath79/nand/target.mk @@ -4,8 +4,6 @@ FEATURES += nand DEFAULT_PACKAGES += wpad-basic-openssl -KERNEL_TESTING_PATCHVER:=5.15 - define Target/Description Firmware for boards using Qualcomm Atheros, MIPS-based SoCs in the ar72xx and subsequent series, with support for NAND flash diff --git a/target/linux/ath79/tiny/target.mk b/target/linux/ath79/tiny/target.mk index 4de6b8a642..b3e23e314c 100644 --- a/target/linux/ath79/tiny/target.mk +++ b/target/linux/ath79/tiny/target.mk @@ -1,5 +1,5 @@ BOARDNAME:=Devices with small flash -FEATURES += small_flash +FEATURES += low_mem small_flash DEFAULT_PACKAGES += wpad-basic-openssl diff --git a/target/linux/bcm4908/config-5.10 b/target/linux/bcm4908/config-5.10 index 866fbaf105..4009f80038 100644 --- a/target/linux/bcm4908/config-5.10 +++ b/target/linux/bcm4908/config-5.10 @@ -1,5 +1,6 @@ CONFIG_64BIT=y CONFIG_ARCH_BCM4908=y +CONFIG_ARCH_BCMBCA=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MMAP_RND_BITS=18 diff --git a/target/linux/bcm4908/image/bootfs-bcm4912.its b/target/linux/bcm4908/image/bootfs-bcm4912.its index 6f4548956c..3d671f9d00 100644 --- a/target/linux/bcm4908/image/bootfs-bcm4912.its +++ b/target/linux/bcm4908/image/bootfs-bcm4912.its @@ -12,9 +12,22 @@ data = /incbin/("${images_dir}/u-boot/u-boot-bcm4912.dtb"); }; - fdt_GTAX6000 { + fdt_uboot_GTAX6000 { description = "dtb"; data = /incbin/("${images_dir}/u-boot/GTAX6000.dtb"); + arch = "arm64"; + type = "flat_dt"; + compression = "none"; + + hash-1 { + algo = "sha256"; + }; + }; + + fdt_linux_GTAX6000 { + description = "dtb"; + data = /incbin/("${dts_dir}/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dtb"); + arch = "arm64"; type = "flat_dt"; compression = "none"; @@ -27,8 +40,26 @@ configurations { conf_ub_GTAX6000 { description = "GTAX6000"; - fdt = "fdt_GTAX6000"; + fdt = "fdt_uboot_GTAX6000"; loadables = "atf", "uboot"; }; + + conf_lx_GTAX6000 { + description = "BRCM 63xxx linux"; + kernel = "kernel"; + fdt = "fdt_linux_GTAX6000"; + }; + + conf_ub_GTAX6000_50991 { + description = "GTAX6000_50991"; + fdt = "fdt_uboot_GTAX6000"; + loadables = "atf", "uboot"; + }; + + conf_lx_GTAX6000_50991 { + description = "BRCM 63xxx linux"; + kernel = "kernel"; + fdt = "fdt_linux_GTAX6000"; + }; }; }; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0011-arm64-bcmbca-add-arch-bcmbca-machine-entry.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0011-arm64-bcmbca-add-arch-bcmbca-machine-entry.patch new file mode 100644 index 0000000000..1b9a32e30a --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/037-v5.20-0011-arm64-bcmbca-add-arch-bcmbca-machine-entry.patch @@ -0,0 +1,31 @@ +From fdcd652ce2b6b819f5c4dc3cead5215c84ee6933 Mon Sep 17 00:00:00 2001 +From: William Zhang +Date: Wed, 1 Jun 2022 15:56:50 -0700 +Subject: [PATCH] arm64: bcmbca: add arch bcmbca machine entry + +Add ARCH_BCMBCA config for Broadcom Broadband SoC chipsets + +Signed-off-by: William Zhang +Signed-off-by: Florian Fainelli +--- + arch/arm64/Kconfig.platforms | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/arch/arm64/Kconfig.platforms ++++ b/arch/arm64/Kconfig.platforms +@@ -59,6 +59,15 @@ config ARCH_BCM_IPROC + help + This enables support for Broadcom iProc based SoCs + ++config ARCH_BCMBCA ++ bool "Broadcom Broadband SoC" ++ help ++ Say Y if you intend to run the kernel on a Broadcom Broadband ARM-based ++ BCA chipset. ++ ++ This enables support for Broadcom BCA ARM-based broadband chipsets, ++ including the DSL, PON and Wireless family of chips. ++ + config ARCH_BERLIN + bool "Marvell Berlin SoC Family" + select DW_APB_ICTL diff --git a/target/linux/generic/backport-5.15/703-00-v5.16-net-convert-users-of-bitmap_foo-to-linkmode_foo.patch b/target/linux/generic/backport-5.15/703-00-v5.16-net-convert-users-of-bitmap_foo-to-linkmode_foo.patch new file mode 100644 index 0000000000..eb1bc50367 --- /dev/null +++ b/target/linux/generic/backport-5.15/703-00-v5.16-net-convert-users-of-bitmap_foo-to-linkmode_foo.patch @@ -0,0 +1,948 @@ +From 4973056cceacc70966396039fae99867dfafd796 Mon Sep 17 00:00:00 2001 +From: Sean Anderson +Date: Fri, 22 Oct 2021 18:41:04 -0400 +Subject: [PATCH] net: convert users of bitmap_foo() to linkmode_foo() + +This converts instances of + bitmap_foo(args..., __ETHTOOL_LINK_MODE_MASK_NBITS) +to + linkmode_foo(args...) + +I manually fixed up some lines to prevent them from being excessively +long. Otherwise, this change was generated with the following semantic +patch: + +// Generated with +// echo linux/linkmode.h > includes +// git grep -Flf includes include/ | cut -f 2- -d / | cat includes - \ +// | sort | uniq | tee new_includes | wc -l && mv new_includes includes +// and repeating until the number stopped going up +@i@ +@@ + +( + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +| + #include +) + +@depends on i@ +expression list args; +@@ + +( +- bitmap_zero(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_zero(args) +| +- bitmap_copy(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_copy(args) +| +- bitmap_and(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_and(args) +| +- bitmap_or(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_or(args) +| +- bitmap_empty(args, ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_empty(args) +| +- bitmap_andnot(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_andnot(args) +| +- bitmap_equal(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_equal(args) +| +- bitmap_intersects(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_intersects(args) +| +- bitmap_subset(args, __ETHTOOL_LINK_MODE_MASK_NBITS) ++ linkmode_subset(args) +) + +Add missing linux/mii.h include to mellanox. -DaveM + +Signed-off-by: Sean Anderson +Signed-off-by: David S. Miller +--- + drivers/net/dsa/b53/b53_common.c | 6 ++---- + drivers/net/dsa/bcm_sf2.c | 8 +++---- + drivers/net/dsa/hirschmann/hellcreek.c | 6 ++---- + drivers/net/dsa/lantiq_gswip.c | 14 ++++++------- + drivers/net/dsa/microchip/ksz8795.c | 8 +++---- + drivers/net/dsa/mv88e6xxx/chip.c | 5 ++--- + drivers/net/dsa/ocelot/felix_vsc9959.c | 8 +++---- + drivers/net/dsa/ocelot/seville_vsc9953.c | 8 +++---- + drivers/net/dsa/qca/ar9331.c | 10 ++++----- + drivers/net/dsa/sja1105/sja1105_main.c | 7 +++---- + drivers/net/dsa/xrs700x/xrs700x.c | 8 +++---- + drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 8 +++---- + drivers/net/ethernet/atheros/ag71xx.c | 8 +++---- + drivers/net/ethernet/cadence/macb_main.c | 11 +++++----- + .../net/ethernet/freescale/enetc/enetc_pf.c | 8 +++---- + .../net/ethernet/huawei/hinic/hinic_ethtool.c | 10 ++++----- + .../net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 5 ++--- + drivers/net/ethernet/marvell/mvneta.c | 10 ++++----- + .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 7 +++---- + .../marvell/octeontx2/nic/otx2_ethtool.c | 5 ++--- + drivers/net/ethernet/marvell/pxa168_eth.c | 3 +-- + .../net/ethernet/mellanox/mlx4/en_ethtool.c | 21 +++++++------------ + .../microchip/sparx5/sparx5_phylink.c | 7 +++---- + drivers/net/ethernet/mscc/ocelot_net.c | 7 +++---- + .../ethernet/pensando/ionic/ionic_ethtool.c | 3 +-- + .../net/ethernet/xilinx/xilinx_axienet_main.c | 8 +++---- + drivers/net/pcs/pcs-xpcs.c | 2 +- + drivers/net/phy/sfp-bus.c | 2 +- + net/ethtool/ioctl.c | 7 +++---- + 29 files changed, 87 insertions(+), 133 deletions(-) + +--- a/drivers/net/dsa/b53/b53_common.c ++++ b/drivers/net/dsa/b53/b53_common.c +@@ -1349,10 +1349,8 @@ void b53_phylink_validate(struct dsa_swi + phylink_set(mask, 100baseT_Full); + } + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + + phylink_helper_basex_speed(state); + } +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -686,7 +686,7 @@ static void bcm_sf2_sw_validate(struct d + state->interface != PHY_INTERFACE_MODE_GMII && + state->interface != PHY_INTERFACE_MODE_INTERNAL && + state->interface != PHY_INTERFACE_MODE_MOCA) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + if (port != core_readl(priv, CORE_IMP0_PRT_ID)) + dev_err(ds->dev, + "Unsupported interface: %d for port %d\n", +@@ -714,10 +714,8 @@ static void bcm_sf2_sw_validate(struct d + phylink_set(mask, 100baseT_Half); + phylink_set(mask, 100baseT_Full); + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void bcm_sf2_sw_mac_config(struct dsa_switch *ds, int port, +--- a/drivers/net/dsa/hirschmann/hellcreek.c ++++ b/drivers/net/dsa/hirschmann/hellcreek.c +@@ -1476,10 +1476,8 @@ static void hellcreek_phylink_validate(s + else + phylink_set(mask, 1000baseT_Full); + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static int +--- a/drivers/net/dsa/lantiq_gswip.c ++++ b/drivers/net/dsa/lantiq_gswip.c +@@ -1452,10 +1452,8 @@ static void gswip_phylink_set_capab(unsi + phylink_set(mask, 100baseT_Half); + phylink_set(mask, 100baseT_Full); + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void gswip_xrx200_phylink_validate(struct dsa_switch *ds, int port, +@@ -1483,7 +1481,7 @@ static void gswip_xrx200_phylink_validat + goto unsupported; + break; + default: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported port: %i\n", port); + return; + } +@@ -1493,7 +1491,7 @@ static void gswip_xrx200_phylink_validat + return; + + unsupported: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported interface '%s' for port %d\n", + phy_modes(state->interface), port); + } +@@ -1523,7 +1521,7 @@ static void gswip_xrx300_phylink_validat + goto unsupported; + break; + default: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported port: %i\n", port); + return; + } +@@ -1533,7 +1531,7 @@ static void gswip_xrx300_phylink_validat + return; + + unsupported: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported interface '%s' for port %d\n", + phy_modes(state->interface), port); + } +--- a/drivers/net/dsa/microchip/ksz8795.c ++++ b/drivers/net/dsa/microchip/ksz8795.c +@@ -1542,15 +1542,13 @@ static void ksz8_validate(struct dsa_swi + phylink_set(mask, 100baseT_Half); + phylink_set(mask, 100baseT_Full); + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + + return; + + unsupported: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported interface: %s, port: %d\n", + phy_modes(state->interface), port); + } +--- a/drivers/net/dsa/mv88e6xxx/chip.c ++++ b/drivers/net/dsa/mv88e6xxx/chip.c +@@ -683,9 +683,8 @@ static void mv88e6xxx_validate(struct ds + if (chip->info->ops->phylink_validate) + chip->info->ops->phylink_validate(chip, port, mask, state); + +- bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + + /* We can only operate at 2500BaseX or 1000BaseX. If requested + * to advertise both, only report advertising at 2500BaseX. +--- a/drivers/net/dsa/ocelot/felix_vsc9959.c ++++ b/drivers/net/dsa/ocelot/felix_vsc9959.c +@@ -944,7 +944,7 @@ static void vsc9959_phylink_validate(str + + if (state->interface != PHY_INTERFACE_MODE_NA && + state->interface != ocelot_port->phy_mode) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + +@@ -966,10 +966,8 @@ static void vsc9959_phylink_validate(str + phylink_set(mask, 2500baseX_Full); + } + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static int vsc9959_prevalidate_phy_mode(struct ocelot *ocelot, int port, +--- a/drivers/net/dsa/ocelot/seville_vsc9953.c ++++ b/drivers/net/dsa/ocelot/seville_vsc9953.c +@@ -1000,7 +1000,7 @@ static void vsc9953_phylink_validate(str + + if (state->interface != PHY_INTERFACE_MODE_NA && + state->interface != ocelot_port->phy_mode) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + +@@ -1019,10 +1019,8 @@ static void vsc9953_phylink_validate(str + phylink_set(mask, 2500baseX_Full); + } + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static int vsc9953_prevalidate_phy_mode(struct ocelot *ocelot, int port, +--- a/drivers/net/dsa/qca/ar9331.c ++++ b/drivers/net/dsa/qca/ar9331.c +@@ -522,7 +522,7 @@ static void ar9331_sw_phylink_validate(s + goto unsupported; + break; + default: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported port: %i\n", port); + return; + } +@@ -536,15 +536,13 @@ static void ar9331_sw_phylink_validate(s + phylink_set(mask, 100baseT_Half); + phylink_set(mask, 100baseT_Full); + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + + return; + + unsupported: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported interface: %d, port: %d\n", + state->interface, port); + } +--- a/drivers/net/dsa/sja1105/sja1105_main.c ++++ b/drivers/net/dsa/sja1105/sja1105_main.c +@@ -1360,7 +1360,7 @@ static void sja1105_phylink_validate(str + */ + if (state->interface != PHY_INTERFACE_MODE_NA && + sja1105_phy_mode_mismatch(priv, port, state->interface)) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + +@@ -1380,9 +1380,8 @@ static void sja1105_phylink_validate(str + phylink_set(mask, 2500baseX_Full); + } + +- bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static int +--- a/drivers/net/dsa/xrs700x/xrs700x.c ++++ b/drivers/net/dsa/xrs700x/xrs700x.c +@@ -456,7 +456,7 @@ static void xrs700x_phylink_validate(str + phylink_set(mask, 1000baseT_Full); + break; + default: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + dev_err(ds->dev, "Unsupported port: %i\n", port); + return; + } +@@ -467,10 +467,8 @@ static void xrs700x_phylink_validate(str + phylink_set(mask, 10baseT_Full); + phylink_set(mask, 100baseT_Full); + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void xrs700x_mac_link_up(struct dsa_switch *ds, int port, +--- a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c +@@ -369,9 +369,8 @@ static int xgbe_set_link_ksettings(struc + __ETHTOOL_LINK_MODE_MASK_NBITS, cmd->link_modes.advertising, + __ETHTOOL_LINK_MODE_MASK_NBITS, lks->link_modes.supported); + +- bitmap_and(advertising, +- cmd->link_modes.advertising, lks->link_modes.supported, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(advertising, cmd->link_modes.advertising, ++ lks->link_modes.supported); + + if ((cmd->base.autoneg == AUTONEG_ENABLE) && + bitmap_empty(advertising, __ETHTOOL_LINK_MODE_MASK_NBITS)) { +@@ -384,8 +383,7 @@ static int xgbe_set_link_ksettings(struc + pdata->phy.autoneg = cmd->base.autoneg; + pdata->phy.speed = speed; + pdata->phy.duplex = cmd->base.duplex; +- bitmap_copy(lks->link_modes.advertising, advertising, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_copy(lks->link_modes.advertising, advertising); + + if (cmd->base.autoneg == AUTONEG_ENABLE) + XGBE_SET_ADV(lks, Autoneg); +--- a/drivers/net/ethernet/atheros/ag71xx.c ++++ b/drivers/net/ethernet/atheros/ag71xx.c +@@ -1082,14 +1082,12 @@ static void ag71xx_mac_validate(struct p + phylink_set(mask, 1000baseX_Full); + } + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + + return; + unsupported: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + } + + static void ag71xx_mac_pcs_get_state(struct phylink_config *config, +--- a/drivers/net/ethernet/cadence/macb_main.c ++++ b/drivers/net/ethernet/cadence/macb_main.c +@@ -523,21 +523,21 @@ static void macb_validate(struct phylink + state->interface != PHY_INTERFACE_MODE_SGMII && + state->interface != PHY_INTERFACE_MODE_10GBASER && + !phy_interface_mode_is_rgmii(state->interface)) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + + if (!macb_is_gem(bp) && + (state->interface == PHY_INTERFACE_MODE_GMII || + phy_interface_mode_is_rgmii(state->interface))) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + + if (state->interface == PHY_INTERFACE_MODE_10GBASER && + !(bp->caps & MACB_CAPS_HIGH_SPEED && + bp->caps & MACB_CAPS_PCS)) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + +@@ -576,9 +576,8 @@ static void macb_validate(struct phylink + phylink_set(mask, 1000baseT_Half); + } + out: +- bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void macb_usx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, +--- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c +@@ -940,7 +940,7 @@ static void enetc_pl_mac_validate(struct + state->interface != PHY_INTERFACE_MODE_2500BASEX && + state->interface != PHY_INTERFACE_MODE_USXGMII && + !phy_interface_mode_is_rgmii(state->interface)) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + +@@ -963,10 +963,8 @@ static void enetc_pl_mac_validate(struct + phylink_set(mask, 2500baseX_Full); + } + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void enetc_pl_mac_config(struct phylink_config *config, +--- a/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c ++++ b/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c +@@ -322,12 +322,10 @@ static int hinic_get_link_ksettings(stru + } + } + +- bitmap_copy(link_ksettings->link_modes.supported, +- (unsigned long *)&settings.supported, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_copy(link_ksettings->link_modes.advertising, +- (unsigned long *)&settings.advertising, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_copy(link_ksettings->link_modes.supported, ++ (unsigned long *)&settings.supported); ++ linkmode_copy(link_ksettings->link_modes.advertising, ++ (unsigned long *)&settings.advertising); + + return 0; + } +--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c ++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c +@@ -467,9 +467,8 @@ static int ixgbe_set_link_ksettings(stru + * this function does not support duplex forcing, but can + * limit the advertising of the adapter to the specified speed + */ +- if (!bitmap_subset(cmd->link_modes.advertising, +- cmd->link_modes.supported, +- __ETHTOOL_LINK_MODE_MASK_NBITS)) ++ if (!linkmode_subset(cmd->link_modes.advertising, ++ cmd->link_modes.supported)) + return -EINVAL; + + /* only allow one speed at a time if no autoneg */ +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -3835,14 +3835,14 @@ static void mvneta_validate(struct phyli + */ + if (phy_interface_mode_is_8023z(state->interface)) { + if (!phylink_test(state->advertising, Autoneg)) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + } else if (state->interface != PHY_INTERFACE_MODE_NA && + state->interface != PHY_INTERFACE_MODE_QSGMII && + state->interface != PHY_INTERFACE_MODE_SGMII && + !phy_interface_mode_is_rgmii(state->interface)) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + +@@ -3871,10 +3871,8 @@ static void mvneta_validate(struct phyli + phylink_set(mask, 100baseT_Full); + } + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + + /* We can only operate at 2500BaseX or 1000BaseX. If requested + * to advertise both, only report advertising at 2500BaseX. +--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c ++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +@@ -6347,15 +6347,14 @@ static void mvpp2_phylink_validate(struc + goto empty_set; + } + +- bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + + phylink_helper_basex_speed(state); + return; + + empty_set: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + } + + static void mvpp2_xlg_config(struct mvpp2_port *port, unsigned int mode, +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c +@@ -1168,9 +1168,8 @@ static int otx2_set_link_ksettings(struc + otx2_get_link_ksettings(netdev, &cur_ks); + + /* Check requested modes against supported modes by hardware */ +- if (!bitmap_subset(cmd->link_modes.advertising, +- cur_ks.link_modes.supported, +- __ETHTOOL_LINK_MODE_MASK_NBITS)) ++ if (!linkmode_subset(cmd->link_modes.advertising, ++ cur_ks.link_modes.supported)) + return -EINVAL; + + mutex_lock(&mbox->lock); +--- a/drivers/net/ethernet/marvell/pxa168_eth.c ++++ b/drivers/net/ethernet/marvell/pxa168_eth.c +@@ -977,8 +977,7 @@ static int pxa168_init_phy(struct net_de + cmd.base.phy_address = pep->phy_addr; + cmd.base.speed = pep->phy_speed; + cmd.base.duplex = pep->phy_duplex; +- bitmap_copy(cmd.link_modes.advertising, PHY_BASIC_FEATURES, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_copy(cmd.link_modes.advertising, PHY_BASIC_FEATURES); + cmd.base.autoneg = AUTONEG_ENABLE; + + if (cmd.base.speed != 0) +--- a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c ++++ b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c +@@ -39,6 +39,7 @@ + #include + #include + #include ++#include + + #include "mlx4_en.h" + #include "en_port.h" +@@ -643,10 +644,8 @@ static unsigned long *ptys2ethtool_link_ + unsigned int i; \ + cfg = &ptys2ethtool_map[reg_]; \ + cfg->speed = speed_; \ +- bitmap_zero(cfg->supported, \ +- __ETHTOOL_LINK_MODE_MASK_NBITS); \ +- bitmap_zero(cfg->advertised, \ +- __ETHTOOL_LINK_MODE_MASK_NBITS); \ ++ linkmode_zero(cfg->supported); \ ++ linkmode_zero(cfg->advertised); \ + for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \ + __set_bit(modes[i], cfg->supported); \ + __set_bit(modes[i], cfg->advertised); \ +@@ -702,10 +701,8 @@ static void ptys2ethtool_update_link_mod + int i; + for (i = 0; i < MLX4_LINK_MODES_SZ; i++) { + if (eth_proto & MLX4_PROT_MASK(i)) +- bitmap_or(link_modes, link_modes, +- ptys2ethtool_link_mode(&ptys2ethtool_map[i], +- report), +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_or(link_modes, link_modes, ++ ptys2ethtool_link_mode(&ptys2ethtool_map[i], report)); + } + } + +@@ -716,11 +713,9 @@ static u32 ethtool2ptys_link_modes(const + u32 ptys_modes = 0; + + for (i = 0; i < MLX4_LINK_MODES_SZ; i++) { +- if (bitmap_intersects( +- ptys2ethtool_link_mode(&ptys2ethtool_map[i], +- report), +- link_modes, +- __ETHTOOL_LINK_MODE_MASK_NBITS)) ++ ulong *map_mode = ptys2ethtool_link_mode(&ptys2ethtool_map[i], ++ report); ++ if (linkmode_intersects(map_mode, link_modes)) + ptys_modes |= 1 << i; + } + return ptys_modes; +--- a/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c ++++ b/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c +@@ -92,12 +92,11 @@ static void sparx5_phylink_validate(stru + } + break; + default: +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } +- bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void sparx5_phylink_mac_config(struct phylink_config *config, +--- a/drivers/net/ethernet/mscc/ocelot_net.c ++++ b/drivers/net/ethernet/mscc/ocelot_net.c +@@ -1509,7 +1509,7 @@ static void vsc7514_phylink_validate(str + + if (state->interface != PHY_INTERFACE_MODE_NA && + state->interface != ocelot_port->phy_mode) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + +@@ -1528,9 +1528,8 @@ static void vsc7514_phylink_validate(str + phylink_set(mask, 2500baseT_Full); + phylink_set(mask, 2500baseX_Full); + +- bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void vsc7514_phylink_mac_config(struct phylink_config *config, +--- a/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c ++++ b/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c +@@ -228,8 +228,7 @@ static int ionic_get_link_ksettings(stru + break; + } + +- bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_copy(ks->link_modes.advertising, ks->link_modes.supported); + + ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); + ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); +--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c ++++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +@@ -1565,7 +1565,7 @@ static void axienet_validate(struct phyl + netdev_warn(ndev, "Cannot use PHY mode %s, supported: %s\n", + phy_modes(state->interface), + phy_modes(lp->phy_mode)); +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(supported); + return; + } + } +@@ -1598,10 +1598,8 @@ static void axienet_validate(struct phyl + break; + } + +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); + } + + static void axienet_mac_pcs_get_state(struct phylink_config *config, +--- a/drivers/net/pcs/pcs-xpcs.c ++++ b/drivers/net/pcs/pcs-xpcs.c +@@ -646,7 +646,7 @@ void xpcs_validate(struct dw_xpcs *xpcs, + if (state->interface == PHY_INTERFACE_MODE_NA) + return; + +- bitmap_zero(xpcs_supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(xpcs_supported); + + compat = xpcs_find_compat(xpcs->id, state->interface); + +--- a/drivers/net/phy/sfp-bus.c ++++ b/drivers/net/phy/sfp-bus.c +@@ -379,7 +379,7 @@ void sfp_parse_support(struct sfp_bus *b + if (bus->sfp_quirk) + bus->sfp_quirk->modes(id, modes); + +- bitmap_or(support, support, modes, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_or(support, support, modes); + + phylink_set(support, Autoneg); + phylink_set(support, Pause); +--- a/net/ethtool/ioctl.c ++++ b/net/ethtool/ioctl.c +@@ -335,7 +335,7 @@ EXPORT_SYMBOL(ethtool_intersect_link_mas + void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst, + u32 legacy_u32) + { +- bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(dst); + dst[0] = legacy_u32; + } + EXPORT_SYMBOL(ethtool_convert_legacy_u32_to_link_mode); +@@ -350,11 +350,10 @@ bool ethtool_convert_link_mode_to_legacy + if (__ETHTOOL_LINK_MODE_MASK_NBITS > 32) { + __ETHTOOL_DECLARE_LINK_MODE_MASK(ext); + +- bitmap_zero(ext, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ linkmode_zero(ext); + bitmap_fill(ext, 32); + bitmap_complement(ext, ext, __ETHTOOL_LINK_MODE_MASK_NBITS); +- if (bitmap_intersects(ext, src, +- __ETHTOOL_LINK_MODE_MASK_NBITS)) { ++ if (linkmode_intersects(ext, src)) { + /* src mask goes beyond bit 31 */ + retval = false; + } diff --git a/target/linux/generic/backport-5.15/703-16-v5.16-net-mvneta-populate-supported_interfaces-member.patch b/target/linux/generic/backport-5.15/703-16-v5.16-net-mvneta-populate-supported_interfaces-member.patch new file mode 100644 index 0000000000..f21fa4b277 --- /dev/null +++ b/target/linux/generic/backport-5.15/703-16-v5.16-net-mvneta-populate-supported_interfaces-member.patch @@ -0,0 +1,48 @@ +From fdedb695e6a8657302341cda81d519ef04f9acaa Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Wed, 27 Oct 2021 10:03:43 +0100 +Subject: [PATCH] net: mvneta: populate supported_interfaces member + +Populate the phy_interface_t bitmap for the Marvell mvneta driver with +interfaces modes supported by the MAC. + +Signed-off-by: Russell King +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -5180,6 +5180,31 @@ static int mvneta_probe(struct platform_ + + pp->phylink_config.dev = &dev->dev; + pp->phylink_config.type = PHYLINK_NETDEV; ++ phy_interface_set_rgmii(pp->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_QSGMII, ++ pp->phylink_config.supported_interfaces); ++ if (comphy) { ++ /* If a COMPHY is present, we can support any of the serdes ++ * modes and switch between them. ++ */ ++ __set_bit(PHY_INTERFACE_MODE_SGMII, ++ pp->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_1000BASEX, ++ pp->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_2500BASEX, ++ pp->phylink_config.supported_interfaces); ++ } else if (phy_mode == PHY_INTERFACE_MODE_2500BASEX) { ++ /* No COMPHY, with only 2500BASE-X mode supported */ ++ __set_bit(PHY_INTERFACE_MODE_2500BASEX, ++ pp->phylink_config.supported_interfaces); ++ } else if (phy_mode == PHY_INTERFACE_MODE_1000BASEX || ++ phy_mode == PHY_INTERFACE_MODE_SGMII) { ++ /* No COMPHY, we can switch between 1000BASE-X and SGMII */ ++ __set_bit(PHY_INTERFACE_MODE_1000BASEX, ++ pp->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_SGMII, ++ pp->phylink_config.supported_interfaces); ++ } + + phylink = phylink_create(&pp->phylink_config, pdev->dev.fwnode, + phy_mode, &mvneta_phylink_ops); diff --git a/target/linux/generic/backport-5.15/703-17-v5.16-net-mvneta-remove-interface-checks-in-mvneta_validat.patch b/target/linux/generic/backport-5.15/703-17-v5.16-net-mvneta-remove-interface-checks-in-mvneta_validat.patch new file mode 100644 index 0000000000..e287e39d6a --- /dev/null +++ b/target/linux/generic/backport-5.15/703-17-v5.16-net-mvneta-remove-interface-checks-in-mvneta_validat.patch @@ -0,0 +1,35 @@ +From d9ca72807ecb236f679b960c70ef5b7d4a5f0222 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Wed, 27 Oct 2021 10:03:48 +0100 +Subject: [PATCH] net: mvneta: remove interface checks in mvneta_validate() + +As phylink checks the interface mode against the supported_interfaces +bitmap, we no longer need to validate the interface mode in the +validation function. Remove this to simplify it. + +Signed-off-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 11 ++--------- + 1 file changed, 2 insertions(+), 9 deletions(-) + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -3833,15 +3833,8 @@ static void mvneta_validate(struct phyli + * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ... + * When = 1 (1000BASE-X) this field must be set to 1." + */ +- if (phy_interface_mode_is_8023z(state->interface)) { +- if (!phylink_test(state->advertising, Autoneg)) { +- linkmode_zero(supported); +- return; +- } +- } else if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_QSGMII && +- state->interface != PHY_INTERFACE_MODE_SGMII && +- !phy_interface_mode_is_rgmii(state->interface)) { ++ if (phy_interface_mode_is_8023z(state->interface) && ++ !phylink_test(state->advertising, Autoneg)) { + linkmode_zero(supported); + return; + } diff --git a/target/linux/generic/backport-5.15/703-18-v5.16-net-mvneta-drop-use-of-phylink_helper_basex_speed.patch b/target/linux/generic/backport-5.15/703-18-v5.16-net-mvneta-drop-use-of-phylink_helper_basex_speed.patch new file mode 100644 index 0000000000..9121612bf8 --- /dev/null +++ b/target/linux/generic/backport-5.15/703-18-v5.16-net-mvneta-drop-use-of-phylink_helper_basex_speed.patch @@ -0,0 +1,55 @@ +From 099cbfa286ab937d8213c2dc5c0b401969b78042 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Wed, 27 Oct 2021 10:03:53 +0100 +Subject: [PATCH] net: mvneta: drop use of phylink_helper_basex_speed() + +Now that we have a better method to select SFP interface modes, we +no longer need to use phylink_helper_basex_speed() in a driver's +validation function, and we can also get rid of our hack to indicate +both 1000base-X and 2500base-X if the comphy is present to make that +work. Remove this hack and use of phylink_helper_basex_speed(). + +Signed-off-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 12 +++--------- + 1 file changed, 3 insertions(+), 9 deletions(-) + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -3824,8 +3824,6 @@ static void mvneta_validate(struct phyli + unsigned long *supported, + struct phylink_link_state *state) + { +- struct net_device *ndev = to_net_dev(config->dev); +- struct mvneta_port *pp = netdev_priv(ndev); + __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; + + /* We only support QSGMII, SGMII, 802.3z and RGMII modes. +@@ -3847,11 +3845,12 @@ static void mvneta_validate(struct phyli + phylink_set(mask, Pause); + + /* Half-duplex at speeds higher than 100Mbit is unsupported */ +- if (pp->comphy || state->interface != PHY_INTERFACE_MODE_2500BASEX) { ++ if (state->interface != PHY_INTERFACE_MODE_2500BASEX) { + phylink_set(mask, 1000baseT_Full); + phylink_set(mask, 1000baseX_Full); + } +- if (pp->comphy || state->interface == PHY_INTERFACE_MODE_2500BASEX) { ++ ++ if (state->interface == PHY_INTERFACE_MODE_2500BASEX) { + phylink_set(mask, 2500baseT_Full); + phylink_set(mask, 2500baseX_Full); + } +@@ -3866,11 +3865,6 @@ static void mvneta_validate(struct phyli + + linkmode_and(supported, supported, mask); + linkmode_and(state->advertising, state->advertising, mask); +- +- /* We can only operate at 2500BaseX or 1000BaseX. If requested +- * to advertise both, only report advertising at 2500BaseX. +- */ +- phylink_helper_basex_speed(state); + } + + static void mvneta_mac_pcs_get_state(struct phylink_config *config, diff --git a/target/linux/generic/backport-5.15/703-19-v5.17-net-mvneta-use-phylink_generic_validate.patch b/target/linux/generic/backport-5.15/703-19-v5.17-net-mvneta-use-phylink_generic_validate.patch new file mode 100644 index 0000000000..209dfbc0de --- /dev/null +++ b/target/linux/generic/backport-5.15/703-19-v5.17-net-mvneta-use-phylink_generic_validate.patch @@ -0,0 +1,72 @@ +From 02a0988b98930491db95966fb8086072e47dabb6 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Mon, 15 Nov 2021 10:00:32 +0000 +Subject: [PATCH] net: mvneta: use phylink_generic_validate() + +Convert mvneta to use phylink_generic_validate() for the bulk of its +validate() implementation. This network adapter has a restriction +that for 802.3z links, autonegotiation must be enabled. + +Signed-off-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 34 ++++----------------------- + 1 file changed, 4 insertions(+), 30 deletions(-) + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -3824,8 +3824,6 @@ static void mvneta_validate(struct phyli + unsigned long *supported, + struct phylink_link_state *state) + { +- __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; +- + /* We only support QSGMII, SGMII, 802.3z and RGMII modes. + * When in 802.3z mode, we must have AN enabled: + * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ... +@@ -3837,34 +3835,7 @@ static void mvneta_validate(struct phyli + return; + } + +- /* Allow all the expected bits */ +- phylink_set(mask, Autoneg); +- phylink_set_port_modes(mask); +- +- /* Asymmetric pause is unsupported */ +- phylink_set(mask, Pause); +- +- /* Half-duplex at speeds higher than 100Mbit is unsupported */ +- if (state->interface != PHY_INTERFACE_MODE_2500BASEX) { +- phylink_set(mask, 1000baseT_Full); +- phylink_set(mask, 1000baseX_Full); +- } +- +- if (state->interface == PHY_INTERFACE_MODE_2500BASEX) { +- phylink_set(mask, 2500baseT_Full); +- phylink_set(mask, 2500baseX_Full); +- } +- +- if (!phy_interface_mode_is_8023z(state->interface)) { +- /* 10M and 100M are only supported in non-802.3z mode */ +- phylink_set(mask, 10baseT_Half); +- phylink_set(mask, 10baseT_Full); +- phylink_set(mask, 100baseT_Half); +- phylink_set(mask, 100baseT_Full); +- } +- +- linkmode_and(supported, supported, mask); +- linkmode_and(state->advertising, state->advertising, mask); ++ phylink_generic_validate(config, supported, state); + } + + static void mvneta_mac_pcs_get_state(struct phylink_config *config, +@@ -5167,6 +5138,9 @@ static int mvneta_probe(struct platform_ + + pp->phylink_config.dev = &dev->dev; + pp->phylink_config.type = PHYLINK_NETDEV; ++ pp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 | ++ MAC_100 | MAC_1000FD | MAC_2500FD; ++ + phy_interface_set_rgmii(pp->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_QSGMII, + pp->phylink_config.supported_interfaces); diff --git a/target/linux/generic/backport-5.15/703-20-v5.17-net-mvneta-mark-as-a-legacy_pre_march2020-driver.patch b/target/linux/generic/backport-5.15/703-20-v5.17-net-mvneta-mark-as-a-legacy_pre_march2020-driver.patch new file mode 100644 index 0000000000..31717565bf --- /dev/null +++ b/target/linux/generic/backport-5.15/703-20-v5.17-net-mvneta-mark-as-a-legacy_pre_march2020-driver.patch @@ -0,0 +1,29 @@ +From 2106be4fdf3223d9c5bd485e6ef094139e3197ba Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Sun, 12 Dec 2021 13:01:21 +0000 +Subject: [PATCH] net: mvneta: mark as a legacy_pre_march2020 driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +mvneta provides mac_an_restart and mac_pcs_get_state methods, so needs +to be marked as a legacy driver. Marek spotted that mvneta had stopped +working in 2500base-X mode - thanks for reporting. + +Reported-by: Marek Behún +Signed-off-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -5138,6 +5138,7 @@ static int mvneta_probe(struct platform_ + + pp->phylink_config.dev = &dev->dev; + pp->phylink_config.type = PHYLINK_NETDEV; ++ pp->phylink_config.legacy_pre_march2020 = true; + pp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 | + MAC_100 | MAC_1000FD | MAC_2500FD; + diff --git a/target/linux/generic/backport-5.15/710-v6.0-net-ethernet-mtk_eth_soc-fix-hw-hash-reporting-for-M.patch b/target/linux/generic/backport-5.15/710-v6.0-net-ethernet-mtk_eth_soc-fix-hw-hash-reporting-for-M.patch new file mode 100644 index 0000000000..87941ef766 --- /dev/null +++ b/target/linux/generic/backport-5.15/710-v6.0-net-ethernet-mtk_eth_soc-fix-hw-hash-reporting-for-M.patch @@ -0,0 +1,74 @@ +From 0cf731f9ebb5bf6f252055bebf4463a5c0bd490b Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 23 Aug 2022 14:24:07 +0200 +Subject: [PATCH] net: ethernet: mtk_eth_soc: fix hw hash reporting for + MTK_NETSYS_V2 + +Properly report hw rx hash for mt7986 chipset accroding to the new dma +descriptor layout. + +Fixes: 197c9e9b17b11 ("net: ethernet: mtk_eth_soc: introduce support for mt7986 chipset") +Signed-off-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/091394ea4e705fbb35f828011d98d0ba33808f69.1661257293.git.lorenzo@kernel.org +Signed-off-by: Paolo Abeni +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 22 +++++++++++---------- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 5 +++++ + 2 files changed, 17 insertions(+), 10 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1469,10 +1469,19 @@ static int mtk_poll_rx(struct napi_struc + skb->dev = netdev; + skb_put(skb, pktlen); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY; ++ if (hash != MTK_RXD5_FOE_ENTRY) ++ skb_set_hash(skb, jhash_1word(hash, 0), ++ PKT_HASH_TYPE_L4); + rxdcsum = &trxd.rxd3; +- else ++ } else { ++ hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY; ++ if (hash != MTK_RXD4_FOE_ENTRY) ++ skb_set_hash(skb, jhash_1word(hash, 0), ++ PKT_HASH_TYPE_L4); + rxdcsum = &trxd.rxd4; ++ } + + if (*rxdcsum & eth->soc->txrx.rx_dma_l4_valid) + skb->ip_summed = CHECKSUM_UNNECESSARY; +@@ -1481,16 +1490,9 @@ static int mtk_poll_rx(struct napi_struc + skb->protocol = eth_type_trans(skb, netdev); + bytes += pktlen; + +- hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY; +- if (hash != MTK_RXD4_FOE_ENTRY) { +- hash = jhash_1word(hash, 0); +- skb_set_hash(skb, hash, PKT_HASH_TYPE_L4); +- } +- + reason = FIELD_GET(MTK_RXD4_PPE_CPU_REASON, trxd.rxd4); + if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) +- mtk_ppe_check_skb(eth->ppe, skb, +- trxd.rxd4 & MTK_RXD4_FOE_ENTRY); ++ mtk_ppe_check_skb(eth->ppe, skb, hash); + + if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) { + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -307,6 +307,11 @@ + #define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */ + #define RX_DMA_SPECIAL_TAG BIT(22) + ++/* PDMA descriptor rxd5 */ ++#define MTK_RXD5_FOE_ENTRY GENMASK(14, 0) ++#define MTK_RXD5_PPE_CPU_REASON GENMASK(22, 18) ++#define MTK_RXD5_SRC_PORT GENMASK(29, 26) ++ + #define RX_DMA_GET_SPORT(x) (((x) >> 19) & 0xf) + #define RX_DMA_GET_SPORT_V2(x) (((x) >> 26) & 0x7) + diff --git a/target/linux/generic/backport-5.15/743-v5.16-0001-net-dsa-b53-Include-all-ports-in-enabled_ports.patch b/target/linux/generic/backport-5.15/743-v5.16-0001-net-dsa-b53-Include-all-ports-in-enabled_ports.patch index eb84b45b5c..dc149a742b 100644 --- a/target/linux/generic/backport-5.15/743-v5.16-0001-net-dsa-b53-Include-all-ports-in-enabled_ports.patch +++ b/target/linux/generic/backport-5.15/743-v5.16-0001-net-dsa-b53-Include-all-ports-in-enabled_ports.patch @@ -22,7 +22,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/b53/b53_common.c +++ b/drivers/net/dsa/b53/b53_common.c -@@ -2302,7 +2302,7 @@ static const struct b53_chip_data b53_sw +@@ -2300,7 +2300,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM5325_DEVICE_ID, .dev_name = "BCM5325", .vlans = 16, @@ -31,7 +31,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 2, .arl_buckets = 1024, .imp_port = 5, -@@ -2313,7 +2313,7 @@ static const struct b53_chip_data b53_sw +@@ -2311,7 +2311,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM5365_DEVICE_ID, .dev_name = "BCM5365", .vlans = 256, @@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 2, .arl_buckets = 1024, .imp_port = 5, -@@ -2324,7 +2324,7 @@ static const struct b53_chip_data b53_sw +@@ -2322,7 +2322,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM5389_DEVICE_ID, .dev_name = "BCM5389", .vlans = 4096, @@ -49,7 +49,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2338,7 +2338,7 @@ static const struct b53_chip_data b53_sw +@@ -2336,7 +2336,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM5395_DEVICE_ID, .dev_name = "BCM5395", .vlans = 4096, @@ -58,7 +58,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2352,7 +2352,7 @@ static const struct b53_chip_data b53_sw +@@ -2350,7 +2350,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM5397_DEVICE_ID, .dev_name = "BCM5397", .vlans = 4096, @@ -67,7 +67,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2366,7 +2366,7 @@ static const struct b53_chip_data b53_sw +@@ -2364,7 +2364,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM5398_DEVICE_ID, .dev_name = "BCM5398", .vlans = 4096, @@ -76,7 +76,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2380,7 +2380,7 @@ static const struct b53_chip_data b53_sw +@@ -2378,7 +2378,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM53115_DEVICE_ID, .dev_name = "BCM53115", .vlans = 4096, @@ -85,7 +85,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .vta_regs = B53_VTA_REGS, -@@ -2394,7 +2394,7 @@ static const struct b53_chip_data b53_sw +@@ -2392,7 +2392,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM53125_DEVICE_ID, .dev_name = "BCM53125", .vlans = 4096, @@ -94,7 +94,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2436,7 +2436,7 @@ static const struct b53_chip_data b53_sw +@@ -2434,7 +2434,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM53010_DEVICE_ID, .dev_name = "BCM53010", .vlans = 4096, @@ -103,7 +103,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2478,7 +2478,7 @@ static const struct b53_chip_data b53_sw +@@ -2476,7 +2476,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM53018_DEVICE_ID, .dev_name = "BCM53018", .vlans = 4096, @@ -112,7 +112,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2492,7 +2492,7 @@ static const struct b53_chip_data b53_sw +@@ -2490,7 +2490,7 @@ static const struct b53_chip_data b53_sw .chip_id = BCM53019_DEVICE_ID, .dev_name = "BCM53019", .vlans = 4096, @@ -121,7 +121,7 @@ Signed-off-by: Jakub Kicinski .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, -@@ -2634,7 +2634,6 @@ static int b53_switch_init(struct b53_de +@@ -2632,7 +2632,6 @@ static int b53_switch_init(struct b53_de dev->cpu_port = 5; } diff --git a/target/linux/generic/backport-5.15/743-v5.16-0004-net-dsa-b53-Drop-unused-cpu_port-field.patch b/target/linux/generic/backport-5.15/743-v5.16-0004-net-dsa-b53-Drop-unused-cpu_port-field.patch index 746a1e3978..07d0ec03cf 100644 --- a/target/linux/generic/backport-5.15/743-v5.16-0004-net-dsa-b53-Drop-unused-cpu_port-field.patch +++ b/target/linux/generic/backport-5.15/743-v5.16-0004-net-dsa-b53-Drop-unused-cpu_port-field.patch @@ -19,7 +19,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/b53/b53_common.c +++ b/drivers/net/dsa/b53/b53_common.c -@@ -2300,7 +2300,6 @@ static const struct b53_chip_data b53_sw +@@ -2298,7 +2298,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 2, .arl_buckets = 1024, .imp_port = 5, @@ -27,7 +27,7 @@ Signed-off-by: Jakub Kicinski .duplex_reg = B53_DUPLEX_STAT_FE, }, { -@@ -2311,7 +2310,6 @@ static const struct b53_chip_data b53_sw +@@ -2309,7 +2308,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 2, .arl_buckets = 1024, .imp_port = 5, @@ -35,7 +35,7 @@ Signed-off-by: Jakub Kicinski .duplex_reg = B53_DUPLEX_STAT_FE, }, { -@@ -2322,7 +2320,6 @@ static const struct b53_chip_data b53_sw +@@ -2320,7 +2318,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -43,7 +43,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2336,7 +2333,6 @@ static const struct b53_chip_data b53_sw +@@ -2334,7 +2331,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -51,7 +51,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2350,7 +2346,6 @@ static const struct b53_chip_data b53_sw +@@ -2348,7 +2344,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -59,7 +59,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS_9798, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2364,7 +2359,6 @@ static const struct b53_chip_data b53_sw +@@ -2362,7 +2357,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -67,7 +67,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS_9798, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2379,7 +2373,6 @@ static const struct b53_chip_data b53_sw +@@ -2377,7 +2371,6 @@ static const struct b53_chip_data b53_sw .arl_buckets = 1024, .vta_regs = B53_VTA_REGS, .imp_port = 8, @@ -75,7 +75,7 @@ Signed-off-by: Jakub Kicinski .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, .jumbo_size_reg = B53_JUMBO_MAX_SIZE, -@@ -2392,7 +2385,6 @@ static const struct b53_chip_data b53_sw +@@ -2390,7 +2383,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -83,7 +83,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2406,7 +2398,6 @@ static const struct b53_chip_data b53_sw +@@ -2404,7 +2396,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -91,7 +91,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2420,7 +2411,6 @@ static const struct b53_chip_data b53_sw +@@ -2418,7 +2409,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS_63XX, .duplex_reg = B53_DUPLEX_STAT_63XX, .jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX, -@@ -2434,7 +2424,6 @@ static const struct b53_chip_data b53_sw +@@ -2432,7 +2422,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2448,7 +2437,6 @@ static const struct b53_chip_data b53_sw +@@ -2446,7 +2435,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -115,7 +115,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2462,7 +2450,6 @@ static const struct b53_chip_data b53_sw +@@ -2460,7 +2448,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -123,7 +123,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2476,7 +2463,6 @@ static const struct b53_chip_data b53_sw +@@ -2474,7 +2461,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -131,7 +131,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2490,7 +2476,6 @@ static const struct b53_chip_data b53_sw +@@ -2488,7 +2474,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -139,7 +139,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2504,7 +2489,6 @@ static const struct b53_chip_data b53_sw +@@ -2502,7 +2487,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -147,7 +147,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2518,7 +2502,6 @@ static const struct b53_chip_data b53_sw +@@ -2516,7 +2500,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -155,7 +155,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2547,7 +2530,6 @@ static const struct b53_chip_data b53_sw +@@ -2545,7 +2528,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 1024, .imp_port = 8, @@ -163,7 +163,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2561,7 +2543,6 @@ static const struct b53_chip_data b53_sw +@@ -2559,7 +2541,6 @@ static const struct b53_chip_data b53_sw .arl_bins = 4, .arl_buckets = 256, .imp_port = 8, @@ -171,7 +171,7 @@ Signed-off-by: Jakub Kicinski .vta_regs = B53_VTA_REGS, .duplex_reg = B53_DUPLEX_STAT_GE, .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -@@ -2587,7 +2568,6 @@ static int b53_switch_init(struct b53_de +@@ -2585,7 +2566,6 @@ static int b53_switch_init(struct b53_de dev->vta_regs[2] = chip->vta_regs[2]; dev->jumbo_pm_reg = chip->jumbo_pm_reg; dev->imp_port = chip->imp_port; @@ -179,7 +179,7 @@ Signed-off-by: Jakub Kicinski dev->num_vlans = chip->vlans; dev->num_arl_bins = chip->arl_bins; dev->num_arl_buckets = chip->arl_buckets; -@@ -2619,13 +2599,6 @@ static int b53_switch_init(struct b53_de +@@ -2617,13 +2597,6 @@ static int b53_switch_init(struct b53_de break; #endif } diff --git a/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch b/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch index 8f2e6e0e0e..ffa44f0960 100644 --- a/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch +++ b/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch @@ -9,7 +9,7 @@ Subject: [PATCH] net/dsa/mv88e6xxx: disable ATU violation --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -2981,6 +2981,9 @@ static int mv88e6xxx_setup_port(struct m +@@ -2980,6 +2980,9 @@ static int mv88e6xxx_setup_port(struct m else reg = 1 << port; diff --git a/target/linux/generic/hack-5.15/790-SFP-GE-T-ignore-TX_FAULT.patch b/target/linux/generic/hack-5.15/790-SFP-GE-T-ignore-TX_FAULT.patch index bfb32d5381..d9835f8896 100644 --- a/target/linux/generic/hack-5.15/790-SFP-GE-T-ignore-TX_FAULT.patch +++ b/target/linux/generic/hack-5.15/790-SFP-GE-T-ignore-TX_FAULT.patch @@ -1,36 +1,54 @@ +From 7cc39a6bedbd85f3ff7e16845f310e4ce8d9833f Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 6 Sep 2022 00:31:19 +0100 +Subject: [PATCH] net: sfp: add quirk for ATS SFP-GE-T 1000Base-TX module +To: netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, + Russell King , + Andrew Lunn , + Heiner Kallweit +Cc: David S. Miller , + Eric Dumazet , + Jakub Kicinski , + Paolo Abeni , + Josef Schlehofer + +This copper module comes with broken TX_FAULT indicator which must be +ignored for it to work. Implement ignoring TX_FAULT state bit also +during reset/insertion and mute the warning telling the user that the +module indicates TX_FAULT. + +Co-authored-by: Josef Schlehofer +Signed-off-by: Daniel Golle +--- + drivers/net/phy/sfp.c | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + --- a/drivers/net/phy/sfp.c +++ b/drivers/net/phy/sfp.c -@@ -1803,6 +1803,7 @@ static int sfp_sm_mod_probe(struct sfp * - struct sfp_eeprom_id id; - bool cotsworks_sfbg; - bool cotsworks; -+ bool oem_ge_t; - u8 check; - int ret; - -@@ -1851,6 +1852,10 @@ static int sfp_sm_mod_probe(struct sfp * - } - } - -+ /* Some cheap SFP-GE-T modules always indicate TX fault */ -+ oem_ge_t = !memcmp(id.base.vendor_name, "OEM ", 16) && -+ !memcmp(id.base.vendor_pn, "SFP-GE-T ", 12); -+ - /* Cotsworks do not seem to update the checksums when they - * do the final programming with the final module part number, - * serial number and date code. -@@ -1946,8 +1951,8 @@ static int sfp_sm_mod_probe(struct sfp * - else - sfp->module_t_start_up = T_START_UP; - -- if (!memcmp(id.base.vendor_name, "HUAWEI ", 16) && -- !memcmp(id.base.vendor_pn, "MA5671A ", 16)) -+ if ((!memcmp(id.base.vendor_name, "HUAWEI ", 16) && -+ !memcmp(id.base.vendor_pn, "MA5671A ", 16)) || oem_ge_t) - sfp->tx_fault_ignore = true; - else - sfp->tx_fault_ignore = false; -@@ -2404,10 +2409,12 @@ static void sfp_check_state(struct sfp * +@@ -369,6 +369,11 @@ static const struct sfp_quirk sfp_quirks + .modes = sfp_quirk_2500basex, + .fixup = sfp_fixup_ignore_tx_fault, + }, { ++ // OEM SFP-GE-T is 1000Base-T module ++ .vendor = "OEM", ++ .part = "SFP-GE-T", ++ .fixup = sfp_fixup_ignore_tx_fault, ++ }, { + // Lantech 8330-262D-E can operate at 2500base-X, but + // incorrectly report 2500MBd NRZ in their EEPROM + .vendor = "Lantech", +@@ -2303,7 +2308,8 @@ static void sfp_sm_main(struct sfp *sfp, + * or t_start_up, so assume there is a fault. + */ + sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT, +- sfp->sm_fault_retries == N_FAULT_INIT); ++ !sfp->tx_fault_ignore && ++ (sfp->sm_fault_retries == N_FAULT_INIT)); + } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { + init_done: + sfp->sm_phy_retries = R_PHY_RETRY; +@@ -2526,10 +2532,12 @@ static void sfp_check_state(struct sfp * mutex_lock(&sfp->st_mutex); state = sfp_get_state(sfp); changed = state ^ sfp->state; diff --git a/target/linux/generic/pending-5.15/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch b/target/linux/generic/pending-5.15/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch new file mode 100644 index 0000000000..c32e15d0c6 --- /dev/null +++ b/target/linux/generic/pending-5.15/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch @@ -0,0 +1,128 @@ +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,3 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0 +-spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o ++spinand-objs := core.o esmt.o etron.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -898,6 +898,7 @@ static const struct nand_ops spinand_ops + static const struct spinand_manufacturer *spinand_manufacturers[] = { + &esmt_c8_spinand_manufacturer, + &gigadevice_spinand_manufacturer, ++ &etron_spinand_manufacturer, + ¯onix_spinand_manufacturer, + µn_spinand_manufacturer, + ¶gon_spinand_manufacturer, +--- /dev/null ++++ b/drivers/mtd/nand/spi/etron.c +@@ -0,0 +1,98 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_ETRON 0xd5 ++ ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int etron_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *oobregion) ++{ ++ if (section) ++ return -ERANGE; ++ ++ oobregion->offset = 72; ++ oobregion->length = 56; ++ ++ return 0; ++} ++ ++static int etron_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *oobregion) ++{ ++ if (section) ++ return -ERANGE; ++ ++ oobregion->offset = 1; ++ oobregion->length = 71; ++ ++ return 0; ++} ++ ++static int etron_ecc_get_status(struct spinand_device *spinand, u8 status) ++{ ++ switch (status & STATUS_ECC_MASK) { ++ case STATUS_ECC_NO_BITFLIPS: ++ return 0; ++ ++ case STATUS_ECC_HAS_BITFLIPS: ++ /* Between 1-7 bitflips were corrected */ ++ return 7; ++ ++ case STATUS_ECC_MASK: ++ /* Maximum bitflips were corrected */ ++ return 8; ++ ++ case STATUS_ECC_UNCOR_ERROR: ++ return -EBADMSG; ++ } ++ ++ return -EINVAL; ++} ++ ++static const struct mtd_ooblayout_ops etron_ooblayout = { ++ .ecc = etron_ooblayout_ecc, ++ .free = etron_ooblayout_free, ++}; ++ ++static const struct spinand_info etron_spinand_table[] = { ++ SPINAND_INFO("EM73D044VCx", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x1f), ++ // bpc, pagesize, oobsize, pagesperblock, bperlun, maxbadplun, ppl, lpt, #t ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&etron_ooblayout, etron_ecc_get_status)), ++}; ++ ++static const struct spinand_manufacturer_ops etron_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer etron_spinand_manufacturer = { ++ .id = SPINAND_MFR_ETRON, ++ .name = "Etron", ++ .chips = etron_spinand_table, ++ .nchips = ARRAY_SIZE(etron_spinand_table), ++ .ops = &etron_spinand_manuf_ops, ++}; +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -261,6 +261,7 @@ struct spinand_manufacturer { + + /* SPI NAND manufacturers */ + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; ++extern const struct spinand_manufacturer etron_spinand_manufacturer; + extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; + extern const struct spinand_manufacturer macronix_spinand_manufacturer; + extern const struct spinand_manufacturer micron_spinand_manufacturer; diff --git a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch index e3e338bd4f..298122375f 100644 --- a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch +++ b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -2381,8 +2381,8 @@ static irqreturn_t mtk_handle_irq_rx(int +@@ -2383,8 +2383,8 @@ static irqreturn_t mtk_handle_irq_rx(int eth->rx_events++; if (likely(napi_schedule_prep(ð->rx_napi))) { @@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau } return IRQ_HANDLED; -@@ -2394,8 +2394,8 @@ static irqreturn_t mtk_handle_irq_tx(int +@@ -2396,8 +2396,8 @@ static irqreturn_t mtk_handle_irq_tx(int eth->tx_events++; if (likely(napi_schedule_prep(ð->tx_napi))) { @@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau } return IRQ_HANDLED; -@@ -3585,6 +3585,8 @@ static int mtk_probe(struct platform_dev +@@ -3587,6 +3587,8 @@ static int mtk_probe(struct platform_dev * for NAPI to work */ init_dummy_netdev(ð->dummy_dev); diff --git a/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch index 662b956e4c..8a718a02f2 100644 --- a/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch +++ b/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch @@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -6320,6 +6320,7 @@ static int mv88e6xxx_register_switch(str +@@ -6319,6 +6319,7 @@ static int mv88e6xxx_register_switch(str ds->ops = &mv88e6xxx_switch_ops; ds->ageing_time_min = chip->info->age_time_coeff; ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; diff --git a/target/linux/generic/pending-5.15/770-net-sfp-move-quirk-handling-into-sfp.c.patch b/target/linux/generic/pending-5.15/770-net-sfp-move-quirk-handling-into-sfp.c.patch new file mode 100644 index 0000000000..8d43ccb3e9 --- /dev/null +++ b/target/linux/generic/pending-5.15/770-net-sfp-move-quirk-handling-into-sfp.c.patch @@ -0,0 +1,290 @@ +From a4648a1957cd79bc389538aa0472db39a56e3df6 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 26 Aug 2022 08:43:30 +0100 +Subject: [PATCH 1/6] net: sfp: move quirk handling into sfp.c + +We need to handle more quirks than just those which affect the link +modes of the module. Move the quirk lookup into sfp.c, and pass the +quirk to sfp-bus.c + +Signed-off-by: Russell King (Oracle) +--- + drivers/net/phy/sfp-bus.c | 98 ++------------------------------------- + drivers/net/phy/sfp.c | 94 ++++++++++++++++++++++++++++++++++++- + drivers/net/phy/sfp.h | 9 +++- + 3 files changed, 104 insertions(+), 97 deletions(-) + +--- a/drivers/net/phy/sfp-bus.c ++++ b/drivers/net/phy/sfp-bus.c +@@ -10,12 +10,6 @@ + + #include "sfp.h" + +-struct sfp_quirk { +- const char *vendor; +- const char *part; +- void (*modes)(const struct sfp_eeprom_id *id, unsigned long *modes); +-}; +- + /** + * struct sfp_bus - internal representation of a sfp bus + */ +@@ -38,93 +32,6 @@ struct sfp_bus { + bool started; + }; + +-static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, +- unsigned long *modes) +-{ +- phylink_set(modes, 2500baseX_Full); +-} +- +-static void sfp_quirk_ubnt_uf_instant(const struct sfp_eeprom_id *id, +- unsigned long *modes) +-{ +- /* Ubiquiti U-Fiber Instant module claims that support all transceiver +- * types including 10G Ethernet which is not truth. So clear all claimed +- * modes and set only one mode which module supports: 1000baseX_Full. +- */ +- phylink_zero(modes); +- phylink_set(modes, 1000baseX_Full); +-} +- +-static const struct sfp_quirk sfp_quirks[] = { +- { +- // Alcatel Lucent G-010S-P can operate at 2500base-X, but +- // incorrectly report 2500MBd NRZ in their EEPROM +- .vendor = "ALCATELLUCENT", +- .part = "G010SP", +- .modes = sfp_quirk_2500basex, +- }, { +- // Alcatel Lucent G-010S-A can operate at 2500base-X, but +- // report 3.2GBd NRZ in their EEPROM +- .vendor = "ALCATELLUCENT", +- .part = "3FE46541AA", +- .modes = sfp_quirk_2500basex, +- }, { +- // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd +- // NRZ in their EEPROM +- .vendor = "HUAWEI", +- .part = "MA5671A", +- .modes = sfp_quirk_2500basex, +- }, { +- // Lantech 8330-262D-E can operate at 2500base-X, but +- // incorrectly report 2500MBd NRZ in their EEPROM +- .vendor = "Lantech", +- .part = "8330-262D-E", +- .modes = sfp_quirk_2500basex, +- }, { +- .vendor = "UBNT", +- .part = "UF-INSTANT", +- .modes = sfp_quirk_ubnt_uf_instant, +- }, +-}; +- +-static size_t sfp_strlen(const char *str, size_t maxlen) +-{ +- size_t size, i; +- +- /* Trailing characters should be filled with space chars */ +- for (i = 0, size = 0; i < maxlen; i++) +- if (str[i] != ' ') +- size = i + 1; +- +- return size; +-} +- +-static bool sfp_match(const char *qs, const char *str, size_t len) +-{ +- if (!qs) +- return true; +- if (strlen(qs) != len) +- return false; +- return !strncmp(qs, str, len); +-} +- +-static const struct sfp_quirk *sfp_lookup_quirk(const struct sfp_eeprom_id *id) +-{ +- const struct sfp_quirk *q; +- unsigned int i; +- size_t vs, ps; +- +- vs = sfp_strlen(id->base.vendor_name, ARRAY_SIZE(id->base.vendor_name)); +- ps = sfp_strlen(id->base.vendor_pn, ARRAY_SIZE(id->base.vendor_pn)); +- +- for (i = 0, q = sfp_quirks; i < ARRAY_SIZE(sfp_quirks); i++, q++) +- if (sfp_match(q->vendor, id->base.vendor_name, vs) && +- sfp_match(q->part, id->base.vendor_pn, ps)) +- return q; +- +- return NULL; +-} +- + /** + * sfp_parse_port() - Parse the EEPROM base ID, setting the port type + * @bus: a pointer to the &struct sfp_bus structure for the sfp module +@@ -786,12 +693,13 @@ void sfp_link_down(struct sfp_bus *bus) + } + EXPORT_SYMBOL_GPL(sfp_link_down); + +-int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id) ++int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id, ++ const struct sfp_quirk *quirk) + { + const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus); + int ret = 0; + +- bus->sfp_quirk = sfp_lookup_quirk(id); ++ bus->sfp_quirk = quirk; + + if (ops && ops->module_insert) + ret = ops->module_insert(bus->upstream, id); +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -252,6 +252,8 @@ struct sfp { + unsigned int module_t_start_up; + bool tx_fault_ignore; + ++ const struct sfp_quirk *quirk; ++ + #if IS_ENABLED(CONFIG_HWMON) + struct sfp_diag diag; + struct delayed_work hwmon_probe; +@@ -308,6 +310,93 @@ static const struct of_device_id sfp_of_ + }; + MODULE_DEVICE_TABLE(of, sfp_of_match); + ++static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, ++ unsigned long *modes) ++{ ++ linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, modes); ++} ++ ++static void sfp_quirk_ubnt_uf_instant(const struct sfp_eeprom_id *id, ++ unsigned long *modes) ++{ ++ /* Ubiquiti U-Fiber Instant module claims that support all transceiver ++ * types including 10G Ethernet which is not truth. So clear all claimed ++ * modes and set only one mode which module supports: 1000baseX_Full. ++ */ ++ linkmode_zero(modes); ++ linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, modes); ++} ++ ++static const struct sfp_quirk sfp_quirks[] = { ++ { ++ // Alcatel Lucent G-010S-P can operate at 2500base-X, but ++ // incorrectly report 2500MBd NRZ in their EEPROM ++ .vendor = "ALCATELLUCENT", ++ .part = "G010SP", ++ .modes = sfp_quirk_2500basex, ++ }, { ++ // Alcatel Lucent G-010S-A can operate at 2500base-X, but ++ // report 3.2GBd NRZ in their EEPROM ++ .vendor = "ALCATELLUCENT", ++ .part = "3FE46541AA", ++ .modes = sfp_quirk_2500basex, ++ }, { ++ // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd ++ // NRZ in their EEPROM ++ .vendor = "HUAWEI", ++ .part = "MA5671A", ++ .modes = sfp_quirk_2500basex, ++ }, { ++ // Lantech 8330-262D-E can operate at 2500base-X, but ++ // incorrectly report 2500MBd NRZ in their EEPROM ++ .vendor = "Lantech", ++ .part = "8330-262D-E", ++ .modes = sfp_quirk_2500basex, ++ }, { ++ .vendor = "UBNT", ++ .part = "UF-INSTANT", ++ .modes = sfp_quirk_ubnt_uf_instant, ++ }, ++}; ++ ++static size_t sfp_strlen(const char *str, size_t maxlen) ++{ ++ size_t size, i; ++ ++ /* Trailing characters should be filled with space chars */ ++ for (i = 0, size = 0; i < maxlen; i++) ++ if (str[i] != ' ') ++ size = i + 1; ++ ++ return size; ++} ++ ++static bool sfp_match(const char *qs, const char *str, size_t len) ++{ ++ if (!qs) ++ return true; ++ if (strlen(qs) != len) ++ return false; ++ return !strncmp(qs, str, len); ++} ++ ++static const struct sfp_quirk *sfp_lookup_quirk(const struct sfp_eeprom_id *id) ++{ ++ const struct sfp_quirk *q; ++ unsigned int i; ++ size_t vs, ps; ++ ++ vs = sfp_strlen(id->base.vendor_name, ARRAY_SIZE(id->base.vendor_name)); ++ ps = sfp_strlen(id->base.vendor_pn, ARRAY_SIZE(id->base.vendor_pn)); ++ ++ for (i = 0, q = sfp_quirks; i < ARRAY_SIZE(sfp_quirks); i++, q++) ++ if (sfp_match(q->vendor, id->base.vendor_name, vs) && ++ sfp_match(q->part, id->base.vendor_pn, ps)) ++ return q; ++ ++ return NULL; ++} ++ + static unsigned long poll_jiffies; + + static unsigned int sfp_gpio_get_state(struct sfp *sfp) +@@ -1952,6 +2041,8 @@ static int sfp_sm_mod_probe(struct sfp * + else + sfp->tx_fault_ignore = false; + ++ sfp->quirk = sfp_lookup_quirk(&id); ++ + return 0; + } + +@@ -2063,7 +2154,8 @@ static void sfp_sm_module(struct sfp *sf + break; + + /* Report the module insertion to the upstream device */ +- err = sfp_module_insert(sfp->sfp_bus, &sfp->id); ++ err = sfp_module_insert(sfp->sfp_bus, &sfp->id, ++ sfp->quirk); + if (err < 0) { + sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); + break; +--- a/drivers/net/phy/sfp.h ++++ b/drivers/net/phy/sfp.h +@@ -6,6 +6,12 @@ + + struct sfp; + ++struct sfp_quirk { ++ const char *vendor; ++ const char *part; ++ void (*modes)(const struct sfp_eeprom_id *id, unsigned long *modes); ++}; ++ + struct sfp_socket_ops { + void (*attach)(struct sfp *sfp); + void (*detach)(struct sfp *sfp); +@@ -23,7 +29,8 @@ int sfp_add_phy(struct sfp_bus *bus, str + void sfp_remove_phy(struct sfp_bus *bus); + void sfp_link_up(struct sfp_bus *bus); + void sfp_link_down(struct sfp_bus *bus); +-int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id); ++int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id, ++ const struct sfp_quirk *quirk); + void sfp_module_remove(struct sfp_bus *bus); + int sfp_module_start(struct sfp_bus *bus); + void sfp_module_stop(struct sfp_bus *bus); diff --git a/target/linux/generic/pending-5.15/771-net-sfp-move-Alcatel-Lucent-3FE46541AA-fixup.patch b/target/linux/generic/pending-5.15/771-net-sfp-move-Alcatel-Lucent-3FE46541AA-fixup.patch new file mode 100644 index 0000000000..f285561ebb --- /dev/null +++ b/target/linux/generic/pending-5.15/771-net-sfp-move-Alcatel-Lucent-3FE46541AA-fixup.patch @@ -0,0 +1,68 @@ +From 21fdd8281de3022aee35dd5bfccc892bd46529a3 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 26 Aug 2022 08:43:35 +0100 +Subject: [PATCH 2/6] net: sfp: move Alcatel Lucent 3FE46541AA fixup + +Add a new fixup mechanism to the SFP quirks, and use it for this +module. + +Signed-off-by: Russell King (Oracle) +--- + drivers/net/phy/sfp.c | 14 +++++++++----- + drivers/net/phy/sfp.h | 1 + + 2 files changed, 10 insertions(+), 5 deletions(-) + +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -310,6 +310,11 @@ static const struct of_device_id sfp_of_ + }; + MODULE_DEVICE_TABLE(of, sfp_of_match); + ++static void sfp_fixup_long_startup(struct sfp *sfp) ++{ ++ sfp->module_t_start_up = T_START_UP_BAD_GPON; ++} ++ + static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, + unsigned long *modes) + { +@@ -340,6 +345,7 @@ static const struct sfp_quirk sfp_quirks + .vendor = "ALCATELLUCENT", + .part = "3FE46541AA", + .modes = sfp_quirk_2500basex, ++ .fixup = sfp_fixup_long_startup, + }, { + // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd + // NRZ in their EEPROM +@@ -2029,11 +2035,7 @@ static int sfp_sm_mod_probe(struct sfp * + if (ret < 0) + return ret; + +- if (!memcmp(id.base.vendor_name, "ALCATELLUCENT ", 16) && +- !memcmp(id.base.vendor_pn, "3FE46541AA ", 16)) +- sfp->module_t_start_up = T_START_UP_BAD_GPON; +- else +- sfp->module_t_start_up = T_START_UP; ++ sfp->module_t_start_up = T_START_UP; + + if (!memcmp(id.base.vendor_name, "HUAWEI ", 16) && + !memcmp(id.base.vendor_pn, "MA5671A ", 16)) +@@ -2042,6 +2044,8 @@ static int sfp_sm_mod_probe(struct sfp * + sfp->tx_fault_ignore = false; + + sfp->quirk = sfp_lookup_quirk(&id); ++ if (sfp->quirk && sfp->quirk->fixup) ++ sfp->quirk->fixup(sfp); + + return 0; + } +--- a/drivers/net/phy/sfp.h ++++ b/drivers/net/phy/sfp.h +@@ -10,6 +10,7 @@ struct sfp_quirk { + const char *vendor; + const char *part; + void (*modes)(const struct sfp_eeprom_id *id, unsigned long *modes); ++ void (*fixup)(struct sfp *sfp); + }; + + struct sfp_socket_ops { diff --git a/target/linux/generic/pending-5.15/772-net-sfp-move-Huawei-MA5671A-fixup.patch b/target/linux/generic/pending-5.15/772-net-sfp-move-Huawei-MA5671A-fixup.patch new file mode 100644 index 0000000000..dfd08af671 --- /dev/null +++ b/target/linux/generic/pending-5.15/772-net-sfp-move-Huawei-MA5671A-fixup.patch @@ -0,0 +1,47 @@ +From 4c9d8c654827ef42da702c5b6c3392e8ac0bc60a Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 26 Aug 2022 08:43:40 +0100 +Subject: [PATCH 3/6] net: sfp: move Huawei MA5671A fixup + +Move this module over to the new fixup mechanism. + +Signed-off-by: Russell King (Oracle) +--- + drivers/net/phy/sfp.c | 12 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -315,6 +315,11 @@ static void sfp_fixup_long_startup(struc + sfp->module_t_start_up = T_START_UP_BAD_GPON; + } + ++static void sfp_fixup_ignore_tx_fault(struct sfp *sfp) ++{ ++ sfp->tx_fault_ignore = true; ++} ++ + static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, + unsigned long *modes) + { +@@ -352,6 +357,7 @@ static const struct sfp_quirk sfp_quirks + .vendor = "HUAWEI", + .part = "MA5671A", + .modes = sfp_quirk_2500basex, ++ .fixup = sfp_fixup_ignore_tx_fault, + }, { + // Lantech 8330-262D-E can operate at 2500base-X, but + // incorrectly report 2500MBd NRZ in their EEPROM +@@ -2037,11 +2043,7 @@ static int sfp_sm_mod_probe(struct sfp * + + sfp->module_t_start_up = T_START_UP; + +- if (!memcmp(id.base.vendor_name, "HUAWEI ", 16) && +- !memcmp(id.base.vendor_pn, "MA5671A ", 16)) +- sfp->tx_fault_ignore = true; +- else +- sfp->tx_fault_ignore = false; ++ sfp->tx_fault_ignore = false; + + sfp->quirk = sfp_lookup_quirk(&id); + if (sfp->quirk && sfp->quirk->fixup) diff --git a/target/linux/generic/pending-5.15/773-net-sfp-add-support-for-HALNy-GPON-SFP.patch b/target/linux/generic/pending-5.15/773-net-sfp-add-support-for-HALNy-GPON-SFP.patch new file mode 100644 index 0000000000..85c1d5b203 --- /dev/null +++ b/target/linux/generic/pending-5.15/773-net-sfp-add-support-for-HALNy-GPON-SFP.patch @@ -0,0 +1,86 @@ +From 43ac680124bc57951a6d0356b41498c2324388bf Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 26 Aug 2022 08:43:45 +0100 +Subject: [PATCH 4/6] net: sfp: add support for HALNy GPON SFP + +Add a quirk for the HALNy HL-GSFP module, which appears to have an +inverted RX_LOS signal, and possibly uses TX_FAULT as an inverted +host-link status signal. As we can't be certain about the modules +use of TX_FAULT, we ignore it. + +Signed-off-by: Russell King (Oracle) +--- + drivers/net/phy/sfp-bus.c | 2 +- + drivers/net/phy/sfp.c | 29 ++++++++++++++++++++++++++--- + 2 files changed, 27 insertions(+), 4 deletions(-) + +--- a/drivers/net/phy/sfp-bus.c ++++ b/drivers/net/phy/sfp-bus.c +@@ -283,7 +283,7 @@ void sfp_parse_support(struct sfp_bus *b + phylink_set(modes, 2500baseX_Full); + } + +- if (bus->sfp_quirk) ++ if (bus->sfp_quirk && bus->sfp_quirk->modes) + bus->sfp_quirk->modes(id, modes); + + linkmode_or(support, support, modes); +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -320,6 +320,23 @@ static void sfp_fixup_ignore_tx_fault(st + sfp->tx_fault_ignore = true; + } + ++static void sfp_fixup_inverted_los(struct sfp *sfp) ++{ ++ const __be16 los_inverted = cpu_to_be16(SFP_OPTIONS_LOS_INVERTED); ++ const __be16 los_normal = cpu_to_be16(SFP_OPTIONS_LOS_NORMAL); ++ ++ sfp->id.ext.options &= ~los_normal; ++ sfp->id.ext.options |= los_inverted; ++} ++ ++static void sfp_fixup_halny_gsfp(struct sfp *sfp) ++{ ++ /* LOS is inverted */ ++ sfp_fixup_inverted_los(sfp); ++ /* TX fault might be inverted, but we don't know for certain. */ ++ sfp_fixup_ignore_tx_fault(sfp); ++} ++ + static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, + unsigned long *modes) + { +@@ -352,6 +369,10 @@ static const struct sfp_quirk sfp_quirks + .modes = sfp_quirk_2500basex, + .fixup = sfp_fixup_long_startup, + }, { ++ .vendor = "HALNy", ++ .part = "HL-GSFP", ++ .fixup = sfp_fixup_halny_gsfp, ++ }, { + // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd + // NRZ in their EEPROM + .vendor = "HUAWEI", +@@ -368,16 +389,18 @@ static const struct sfp_quirk sfp_quirks + .vendor = "UBNT", + .part = "UF-INSTANT", + .modes = sfp_quirk_ubnt_uf_instant, +- }, ++ } + }; + + static size_t sfp_strlen(const char *str, size_t maxlen) + { + size_t size, i; + +- /* Trailing characters should be filled with space chars */ ++ /* Trailing characters should be filled with space chars, but ++ * some manufacturers can't read SFF-8472 and use NUL. ++ */ + for (i = 0, size = 0; i < maxlen; i++) +- if (str[i] != ' ') ++ if (str[i] != ' ' && str[i] != '\0') + size = i + 1; + + return size; diff --git a/target/linux/generic/pending-5.15/774--net-sfp-redo-soft-state-polling.patch b/target/linux/generic/pending-5.15/774--net-sfp-redo-soft-state-polling.patch new file mode 100644 index 0000000000..3aa51deb3c --- /dev/null +++ b/target/linux/generic/pending-5.15/774--net-sfp-redo-soft-state-polling.patch @@ -0,0 +1,79 @@ +From 9a84d699ddde0d4e272aa919ad8fd50271a3f932 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 26 Aug 2022 08:48:20 +0100 +Subject: [PATCH 5/6] net: sfp: redo soft state polling + +Signed-off-by: Russell King (Oracle) +--- + drivers/net/phy/sfp.c | 35 ++++++++++++++++++++++++----------- + 1 file changed, 24 insertions(+), 11 deletions(-) + +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -234,6 +234,7 @@ struct sfp { + bool need_poll; + + struct mutex st_mutex; /* Protects state */ ++ unsigned int state_ignore_hw_mask; + unsigned int state_soft_mask; + unsigned int state; + struct delayed_work poll; +@@ -623,17 +624,18 @@ static void sfp_soft_set_state(struct sf + static void sfp_soft_start_poll(struct sfp *sfp) + { + const struct sfp_eeprom_id *id = &sfp->id; ++ unsigned int mask = 0; + + sfp->state_soft_mask = 0; +- if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_DISABLE && +- !sfp->gpio[GPIO_TX_DISABLE]) +- sfp->state_soft_mask |= SFP_F_TX_DISABLE; +- if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_FAULT && +- !sfp->gpio[GPIO_TX_FAULT]) +- sfp->state_soft_mask |= SFP_F_TX_FAULT; +- if (id->ext.enhopts & SFP_ENHOPTS_SOFT_RX_LOS && +- !sfp->gpio[GPIO_LOS]) +- sfp->state_soft_mask |= SFP_F_LOS; ++ if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_DISABLE) ++ mask |= SFP_F_TX_DISABLE; ++ if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_FAULT) ++ mask |= SFP_F_TX_FAULT; ++ if (id->ext.enhopts & SFP_ENHOPTS_SOFT_RX_LOS) ++ mask |= SFP_F_LOS; ++ ++ // Poll the soft state for hardware pins we want to ignore ++ sfp->state_soft_mask = sfp->state_ignore_hw_mask & mask; + + if (sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT) && + !sfp->need_poll) +@@ -647,10 +649,12 @@ static void sfp_soft_stop_poll(struct sf + + static unsigned int sfp_get_state(struct sfp *sfp) + { ++ unsigned int soft = sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT); + unsigned int state = sfp->get_state(sfp); + +- if (state & SFP_F_PRESENT && +- sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT)) ++ state &= ~sfp->state_ignore_hw_mask; ++ ++ if (state & SFP_F_PRESENT && soft) + state |= sfp_soft_get_state(sfp); + + return state; +@@ -2064,6 +2068,15 @@ static int sfp_sm_mod_probe(struct sfp * + if (ret < 0) + return ret; + ++ /* Initialise state bits to ignore from hardware */ ++ sfp->state_ignore_hw_mask = 0; ++ if (!sfp->gpio[GPIO_TX_DISABLE]) ++ sfp->state_ignore_hw_mask |= SFP_F_TX_DISABLE; ++ if (!sfp->gpio[GPIO_TX_FAULT]) ++ sfp->state_ignore_hw_mask |= SFP_F_TX_FAULT; ++ if (!sfp->gpio[GPIO_LOS]) ++ sfp->state_ignore_hw_mask |= SFP_F_LOS; ++ + sfp->module_t_start_up = T_START_UP; + + sfp->tx_fault_ignore = false; diff --git a/target/linux/generic/pending-5.15/775-net-sfp-change-HALNy-to-ignore-hardware-pins.patch b/target/linux/generic/pending-5.15/775-net-sfp-change-HALNy-to-ignore-hardware-pins.patch new file mode 100644 index 0000000000..7aa29cd722 --- /dev/null +++ b/target/linux/generic/pending-5.15/775-net-sfp-change-HALNy-to-ignore-hardware-pins.patch @@ -0,0 +1,35 @@ +From 32a59a1c5dc8f6fa755bab9a5f9751fdb66bb234 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 26 Aug 2022 08:48:25 +0100 +Subject: [PATCH 6/6] net: sfp: change HALNy to ignore hardware pins + +Signed-off-by: Russell King (Oracle) +--- + drivers/net/phy/sfp.c | 14 +------------- + 1 file changed, 1 insertion(+), 13 deletions(-) + +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -321,21 +321,9 @@ static void sfp_fixup_ignore_tx_fault(st + sfp->tx_fault_ignore = true; + } + +-static void sfp_fixup_inverted_los(struct sfp *sfp) +-{ +- const __be16 los_inverted = cpu_to_be16(SFP_OPTIONS_LOS_INVERTED); +- const __be16 los_normal = cpu_to_be16(SFP_OPTIONS_LOS_NORMAL); +- +- sfp->id.ext.options &= ~los_normal; +- sfp->id.ext.options |= los_inverted; +-} +- + static void sfp_fixup_halny_gsfp(struct sfp *sfp) + { +- /* LOS is inverted */ +- sfp_fixup_inverted_los(sfp); +- /* TX fault might be inverted, but we don't know for certain. */ +- sfp_fixup_ignore_tx_fault(sfp); ++ sfp->state_ignore_hw_mask |= SFP_F_TX_FAULT | SFP_F_LOS; + } + + static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network index a951bfaca3..196ffe97ee 100644 --- a/target/linux/ipq40xx/base-files/etc/board.d/02_network +++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network @@ -28,6 +28,7 @@ ipq40xx_setup_interfaces() dlink,dap-2610 |\ engenius,eap1300|\ engenius,emd1|\ + extreme-networks,ws-ap3915i|\ meraki,mr33|\ meraki,mr74|\ mikrotik,lhgg-60ad|\ @@ -137,6 +138,11 @@ ipq40xx_setup_interfaces() "0u@eth0" "2:lan" "3:lan" "4:lan" ucidef_set_interface_wan "eth1" ;; + pakedge,wr-1) + ucidef_set_interfaces_lan_wan "eth0" "eth1" + ucidef_add_switch "switch0" \ + "0u@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0u@eth1" "5:wan" + ;; qxwlan,e2600ac-c1 |\ qxwlan,e2600ac-c2) ucidef_set_interfaces_lan_wan "eth0" "eth1" @@ -225,6 +231,9 @@ ipq40xx_setup_macs() wan_mac=$(cat /sys/class/net/eth0/address) lan_mac=$(macaddr_add "$wan_mac" 1) ;; + pakedge,wr-1) + wan_mac=$(macaddr_add $(get_mac_label) 1) + ;; esac [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata index 4ce92eb4c2..a5a3cab376 100644 --- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata @@ -107,6 +107,10 @@ case "$FIRMWARE" in caldata_extract "ART" 0x1000 0x2f20 ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 2) ;; + extreme-networks,ws-ap3915i) + caldata_extract "ART" 0x1000 0x2f20 + ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR0) + ;; linksys,ea8300 |\ linksys,mr8300) caldata_extract "ART" 0x1000 0x2f20 @@ -133,6 +137,10 @@ case "$FIRMWARE" in caldata_extract_mmc "0:ART" 0x1000 0x2f20 ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0x0) ;; + pakedge,wr-1) + caldata_extract "0:ART" 0x1000 0x2f20 + ath10k_patch_mac $(macaddr_add $(get_mac_label) 2) + ;; zyxel,nbg6617 |\ zyxel,wre6606) caldata_extract "ART" 0x1000 0x2f20 @@ -189,6 +197,10 @@ case "$FIRMWARE" in caldata_extract "ART" 0x5000 0x2f20 ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 3) ;; + extreme-networks,ws-ap3915i) + caldata_extract "ART" 0x5000 0x2f20 + ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR1) + ;; linksys,ea8300 |\ linksys,mr8300) caldata_extract "ART" 0x5000 0x2f20 @@ -216,6 +228,10 @@ case "$FIRMWARE" in caldata_extract_mmc "0:ART" 0x5000 0x2f20 ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0xc) ;; + pakedge,wr-1) + caldata_extract "0:ART" 0x5000 0x2f20 + ath10k_patch_mac $(macaddr_add $(get_mac_label) 4) + ;; zyxel,nbg6617 |\ zyxel,wre6606) caldata_extract "ART" 0x5000 0x2f20 diff --git a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh index ba1c196398..940af0528d 100644 --- a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh +++ b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh @@ -15,6 +15,9 @@ preinit_set_mac_address() { base_mac=$(cat /sys/class/net/eth0/address) ip link set dev eth1 address $(macaddr_add "$base_mac" 1) ;; + extreme-networks,ws-ap3915i) + ip link set dev eth0 address $(mtd_get_mac_ascii CFG1 ethaddr) + ;; linksys,ea8300|\ linksys,mr8300) base_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr) diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts new file mode 100644 index 0000000000..be2f619b39 --- /dev/null +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts @@ -0,0 +1,268 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Pakedge WR-1"; + compatible = "pakedge,wr-1"; + + aliases { + label-mac-device = &gmac0; + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&key_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power: power { + label = "blue:power"; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_POWER; + }; + + wlan2g { + label = "blue:wlan2g"; + gpios = <&tlmm 1 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "blue:wlan5g"; + gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN; + linux,default-trigger = "phy1tpt"; + }; + }; + + soc { + ess-psgmii@98000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + ess-switch@c000000 { + status = "okay"; + }; + + edma@c080000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0000000 0x0040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x0040000 0x0020000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x0060000 0x0060000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0x00c0000 0x0010000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0x00d0000 0x0010000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0x00e0000 0x0010000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0x00f0000 0x0080000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x0170000 0x0010000>; + read-only; + }; + + partition@180000 { + label = "firmware"; + reg = <0x0180000 0x1e80000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&crypto { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&tlmm { + key_pins: key_pinmux { + mux { + function = "gpio"; + pins = "gpio59"; + bias-pull-up; + }; + }; + + led_pins: led_pinmux { + mux { + function = "gpio"; + pins = "gpio0", "gpio1", "gpio2"; + bias-none; + drive-strength = <2>; + output-low; + }; + }; + + serial_pins: serial_pinmux { + mux { + function = "blsp_uart0"; + pins = "gpio60", "gpio61"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + bias-disable; + drive-strength = <12>; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54"; + bias-disable; + drive-strength = <2>; + output-high; + }; + }; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "Pakedge-WR-1"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "Pakedge-WR-1"; +}; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts new file mode 100644 index 0000000000..c14023559b --- /dev/null +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts @@ -0,0 +1,272 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Extreme Networks WS-AP3915i"; + compatible = "extreme-networks,ws-ap3915i"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_amber; + led-running = &led_system_green; + led-upgrade = &led_system_amber; + label-mac-device = &gmac0; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + ess-switch@c000000 { + status = "okay"; + switch_lan_bmp = <0x20>; + switch_wan_bmp = <0x00>; + }; + + edma@c080000 { + status = "okay"; + qcom,num_gmac = <1>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_system_green: system_green { + label = "green:system"; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + }; + + led_system_amber: system_amber { + label = "amber:system"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + + led_wlan24_green: wlan24_green { + label = "green:wlan24"; + gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led_wlan24_amber: wlan24_amber { + label = "amber:wlan24"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + }; + + led_wlan5_green: wlan5_green { + label = "green:wlan5"; + gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + led_wlan5_amber: wlan5_amber { + label = "amber:wlan5"; + gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; + }; + + iot { + label = "blue:iot"; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + serial_pins: serial_0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Layout for 0x0 - 0xe0000 unknown */ + + partition@e0000 { + label = "CFG1"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "BootBAK"; + reg = <0xf0000 0x70000>; + read-only; + }; + + partition@160000 { + label = "WINGCFG1"; + reg = <0x160000 0x10000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + }; + + partition@180000 { + label = "BootPRI"; + reg = <0x180000 0x70000>; + read-only; + }; + + partition@1f0000 { + label = "WINGCFG2"; + reg = <0x1f0000 0x10000>; + read-only; + }; + + partition@200000 { + label = "FS"; + reg = <0x200000 0x80000>; + read-only; + }; + + partition@280000 { + label = "firmware"; + reg = <0x280000 0x1d60000>; + }; + + partition@1fe0000 { + label = "CFG2"; + reg = <0x1fe0000 0x10000>; + read-only; + }; + }; + }; +}; + +&gmac0 { + qcom,phy_mdio_addr = <4>; + qcom,poll_required = <1>; + qcom,forced_speed = <1000>; + qcom,forced_duplex = <1>; + vlan_tag = <1 0x20>; +}; diff --git a/target/linux/ipq40xx/image/chromium.mk b/target/linux/ipq40xx/image/chromium.mk index 567a5e7ca5..2abd2df02a 100644 --- a/target/linux/ipq40xx/image/chromium.mk +++ b/target/linux/ipq40xx/image/chromium.mk @@ -26,7 +26,7 @@ define Device/google_wifi DEVICE_MODEL := WiFi (Gale) SOC := qcom-ipq4019 KERNEL_SUFFIX := -fit-zImage.itb.vboot - KERNEL = kernel-bin | fit none $$(DTS_DIR)/$$(DEVICE_DTS).dtb | cros-vboot + KERNEL = kernel-bin | fit none $$(KDIR)/image-$$(DEVICE_DTS).dtb | cros-vboot KERNEL_NAME := zImage IMAGES += factory.bin IMAGE/factory.bin := cros-gpt | append-kernel-part | append-rootfs diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk index 792122f7a1..98a40349b2 100644 --- a/target/linux/ipq40xx/image/generic.mk +++ b/target/linux/ipq40xx/image/generic.mk @@ -5,19 +5,19 @@ DEVICE_VARS += WRGG_DEVNAME WRGG_SIGNATURE define Device/FitImage KERNEL_SUFFIX := -fit-uImage.itb - KERNEL = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb + KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb KERNEL_NAME := Image endef define Device/FitImageLzma KERNEL_SUFFIX := -fit-uImage.itb - KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb + KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb KERNEL_NAME := Image endef define Device/FitzImage KERNEL_SUFFIX := -fit-zImage.itb - KERNEL = kernel-bin | fit none $$(DTS_DIR)/$$(DEVICE_DTS).dtb + KERNEL = kernel-bin | fit none $$(KDIR)/image-$$(DEVICE_DTS).dtb KERNEL_NAME := zImage endef @@ -308,8 +308,8 @@ TARGET_DEVICES += buffalo_wtr-m2133hp define Device/cellc_rtl30vw KERNEL_SUFFIX := -fit-zImage.itb - KERNEL_INITRAMFS = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb - KERNEL = kernel-bin | fit none $$(DTS_DIR)/$$(DEVICE_DTS).dtb | uImage lzma | pad-to 2048 + KERNEL_INITRAMFS = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb + KERNEL = kernel-bin | fit none $$(KDIR)/image-$$(DEVICE_DTS).dtb | uImage lzma | pad-to 2048 KERNEL_NAME := zImage KERNEL_IN_UBI := IMAGES := nand-factory.bin nand-sysupgrade.bin @@ -376,7 +376,7 @@ define Device/devolo_magic-2-wifi-next # If the bootloader sees 0xDEADC0DE and this trailer at the 64k boundary of a TFTP image # it will bootm it, just like we want for the initramfs. - KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to 64k |\ + KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to 64k |\ append-string -e '\xDE\xAD\xC0\xDE{"fl_initramfs":""}\x00' IMAGE_SIZE := 26624k @@ -519,6 +519,18 @@ define Device/engenius_ens620ext endef TARGET_DEVICES += engenius_ens620ext +define Device/extreme-networks_ws-ap3915i + $(call Device/FitImage) + DEVICE_VENDOR := Extreme Networks + DEVICE_MODEL := WS-AP3915i + IMAGE_SIZE := 30080k + SOC := qcom-ipq4029 + BLOCKSIZE := 128k + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata + DEVICE_PACKAGES := ipq-wifi-extreme-networks_ws-ap3915i +endef +TARGET_DEVICES += extreme-networks_ws-ap3915i + define Device/ezviz_cs-w3-wd1200g-eup $(call Device/FitImage) DEVICE_VENDOR := EZVIZ @@ -832,7 +844,7 @@ define Device/openmesh_a42 SOC := qcom-ipq4018 DEVICE_DTS_CONFIG := config@om.a42 BLOCKSIZE := 64k - KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) + KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) IMAGE_SIZE := 15616k IMAGES += factory.bin IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A42 @@ -847,7 +859,7 @@ define Device/openmesh_a62 SOC := qcom-ipq4019 DEVICE_DTS_CONFIG := config@om.a62 BLOCKSIZE := 64k - KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) + KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) IMAGE_SIZE := 15552k IMAGES += factory.bin IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A62 @@ -882,6 +894,19 @@ define Device/p2w_r619ac-128m endef TARGET_DEVICES += p2w_r619ac-128m +define Device/pakedge_wr-1 + $(call Device/FitImageLzma) + DEVICE_VENDOR := Pakedge + DEVICE_MODEL := WR-1 + DEVICE_DTS_CONFIG := config@ap.dk01.1-c1 + DEVICE_PACKAGES := ipq-wifi-pakedge_wr-1 + SOC := qcom-ipq4018 + BLOCKSIZE := 64k + IMAGE_SIZE := 31232k + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | append-metadata +endef +TARGET_DEVICES += pakedge_wr-1 + define Device/plasmacloud_pa1200 $(call Device/FitImageLzma) DEVICE_VENDOR := Plasma Cloud @@ -889,7 +914,7 @@ define Device/plasmacloud_pa1200 SOC := qcom-ipq4018 DEVICE_DTS_CONFIG := config@pc.pa1200 BLOCKSIZE := 64k - KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) + KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) IMAGE_SIZE := 15616k IMAGES += factory.bin IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=PA1200 @@ -904,7 +929,7 @@ define Device/plasmacloud_pa2200 SOC := qcom-ipq4019 DEVICE_DTS_CONFIG := config@pc.pa2200 BLOCKSIZE := 64k - KERNEL = kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) + KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb | pad-to $$(BLOCKSIZE) IMAGE_SIZE := 15552k IMAGES += factory.bin IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=PA2200 diff --git a/target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch deleted file mode 100644 index 952092d1f7..0000000000 --- a/target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch +++ /dev/null @@ -1,92 +0,0 @@ -From a10fab12a927e60b7141a602e740d70cb4d09e4a Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 9 Mar 2017 11:03:18 +0100 -Subject: [PATCH] arm: boot: add dts files - -Signed-off-by: John Crispin ---- - arch/arm/boot/dts/Makefile | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -904,11 +904,79 @@ dtb-$(CONFIG_ARCH_QCOM) += \ - qcom-apq8074-dragonboard.dtb \ - qcom-apq8084-ifc6540.dtb \ - qcom-apq8084-mtp.dtb \ -+ qcom-ipq4018-a42.dtb \ -+ qcom-ipq4018-ap120c-ac.dtb \ -+ qcom-ipq4018-dap-2610.dtb \ -+ qcom-ipq4018-cs-w3-wd1200g-eup.dtb \ -+ qcom-ipq4018-magic-2-wifi-next.dtb \ -+ qcom-ipq4018-ea6350v3.dtb \ -+ qcom-ipq4018-eap1300.dtb \ -+ qcom-ipq4018-ecw5211.dtb \ -+ qcom-ipq4018-emd1.dtb \ -+ qcom-ipq4018-emr3500.dtb \ -+ qcom-ipq4018-ens620ext.dtb \ -+ qcom-ipq4018-ex6100v2.dtb \ -+ qcom-ipq4018-ex6150v2.dtb \ -+ qcom-ipq4018-fritzbox-4040.dtb \ -+ qcom-ipq4018-gl-ap1300.dtb \ -+ qcom-ipq4018-jalapeno.dtb \ -+ qcom-ipq4018-meshpoint-one.dtb \ -+ qcom-ipq4018-cap-ac.dtb \ -+ qcom-ipq4018-hap-ac2.dtb \ -+ qcom-ipq4018-sxtsq-5-ac.dtb \ -+ qcom-ipq4018-nbg6617.dtb \ -+ qcom-ipq4019-oap100.dtb \ -+ qcom-ipq4018-pa1200.dtb \ -+ qcom-ipq4018-rt-ac58u.dtb \ -+ qcom-ipq4018-rutx10.dtb \ -+ qcom-ipq4018-wac510.dtb \ -+ qcom-ipq4018-wap-ac.dtb \ -+ qcom-ipq4018-whw01-v1.dtb \ -+ qcom-ipq4018-wre6606.dtb \ -+ qcom-ipq4018-wrtq-329acn.dtb \ - qcom-ipq4019-ap.dk01.1-c1.dtb \ - qcom-ipq4019-ap.dk04.1-c1.dtb \ - qcom-ipq4019-ap.dk04.1-c3.dtb \ - qcom-ipq4019-ap.dk07.1-c1.dtb \ - qcom-ipq4019-ap.dk07.1-c2.dtb \ -+ qcom-ipq4019-a62.dtb \ -+ qcom-ipq4019-cm520-79f.dtb \ -+ qcom-ipq4019-e2600ac-c1.dtb \ -+ qcom-ipq4019-e2600ac-c2.dtb \ -+ qcom-ipq4019-ea8300.dtb \ -+ qcom-ipq4019-eap2200.dtb \ -+ qcom-ipq4019-fritzbox-7530.dtb \ -+ qcom-ipq4019-fritzrepeater-1200.dtb \ -+ qcom-ipq4019-fritzrepeater-3000.dtb \ -+ qcom-ipq4019-habanero-dvk.dtb \ -+ qcom-ipq4019-hap-ac3.dtb \ -+ qcom-ipq4019-map-ac2200.dtb \ -+ qcom-ipq4019-lhgg-60ad.dtb \ -+ qcom-ipq4019-mf286d.dtb \ -+ qcom-ipq4019-mr8300.dtb \ -+ qcom-ipq4019-pa2200.dtb \ -+ qcom-ipq4019-r619ac-64m.dtb \ -+ qcom-ipq4019-r619ac-128m.dtb \ -+ qcom-ipq4019-rbr50.dtb \ -+ qcom-ipq4019-rbs50.dtb \ -+ qcom-ipq4019-rt-ac42u.dtb \ -+ qcom-ipq4019-rtl30vw.dtb \ -+ qcom-ipq4019-srr60.dtb \ -+ qcom-ipq4019-srs60.dtb \ -+ qcom-ipq4019-u4019-32m.dtb \ -+ qcom-ipq4019-wifi.dtb \ -+ qcom-ipq4019-wpj419.dtb \ -+ qcom-ipq4019-wtr-m2133hp.dtb \ -+ qcom-ipq4019-x1pro.dtb \ -+ qcom-ipq4028-wpj428.dtb \ -+ qcom-ipq4029-ap-303.dtb \ -+ qcom-ipq4029-ap-303h.dtb \ -+ qcom-ipq4029-ap-365.dtb \ -+ qcom-ipq4029-gl-b1300.dtb \ -+ qcom-ipq4019-gl-b2200.dtb \ -+ qcom-ipq4029-gl-s1300.dtb \ -+ qcom-ipq4029-mr33.dtb \ -+ qcom-ipq4029-mr74.dtb \ - qcom-ipq8064-ap148.dtb \ - qcom-ipq8064-rb3011.dtb \ - qcom-msm8660-surf.dtb \ diff --git a/target/linux/ipq40xx/patches-5.15/901-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-5.15/901-arm-boot-add-dts-files.patch deleted file mode 100644 index 78b97393d5..0000000000 --- a/target/linux/ipq40xx/patches-5.15/901-arm-boot-add-dts-files.patch +++ /dev/null @@ -1,91 +0,0 @@ -From a10fab12a927e60b7141a602e740d70cb4d09e4a Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 9 Mar 2017 11:03:18 +0100 -Subject: [PATCH] arm: boot: add dts files - -Signed-off-by: John Crispin ---- - arch/arm/boot/dts/Makefile | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -952,11 +952,78 @@ dtb-$(CONFIG_ARCH_QCOM) += \ - qcom-ipq4018-ap120c-ac.dtb \ - qcom-ipq4018-ap120c-ac-bit.dtb \ - qcom-ipq4018-jalapeno.dtb \ -+ qcom-ipq4018-a42.dtb \ -+ qcom-ipq4018-ap120c-ac.dtb \ -+ qcom-ipq4018-dap-2610.dtb \ -+ qcom-ipq4018-cs-w3-wd1200g-eup.dtb \ -+ qcom-ipq4018-magic-2-wifi-next.dtb \ -+ qcom-ipq4018-ea6350v3.dtb \ -+ qcom-ipq4018-eap1300.dtb \ -+ qcom-ipq4018-ecw5211.dtb \ -+ qcom-ipq4018-emd1.dtb \ -+ qcom-ipq4018-emr3500.dtb \ -+ qcom-ipq4018-ens620ext.dtb \ -+ qcom-ipq4018-ex6100v2.dtb \ -+ qcom-ipq4018-ex6150v2.dtb \ -+ qcom-ipq4018-fritzbox-4040.dtb \ -+ qcom-ipq4018-gl-ap1300.dtb \ -+ qcom-ipq4018-meshpoint-one.dtb \ -+ qcom-ipq4018-cap-ac.dtb \ -+ qcom-ipq4018-hap-ac2.dtb \ -+ qcom-ipq4018-sxtsq-5-ac.dtb \ -+ qcom-ipq4018-nbg6617.dtb \ -+ qcom-ipq4019-oap100.dtb \ -+ qcom-ipq4018-pa1200.dtb \ -+ qcom-ipq4018-rt-ac58u.dtb \ -+ qcom-ipq4018-rutx10.dtb \ -+ qcom-ipq4018-wac510.dtb \ -+ qcom-ipq4018-wap-ac.dtb \ -+ qcom-ipq4018-whw01-v1.dtb \ -+ qcom-ipq4018-wre6606.dtb \ -+ qcom-ipq4018-wrtq-329acn.dtb \ - qcom-ipq4019-ap.dk01.1-c1.dtb \ - qcom-ipq4019-ap.dk04.1-c1.dtb \ - qcom-ipq4019-ap.dk04.1-c3.dtb \ - qcom-ipq4019-ap.dk07.1-c1.dtb \ - qcom-ipq4019-ap.dk07.1-c2.dtb \ -+ qcom-ipq4019-a62.dtb \ -+ qcom-ipq4019-cm520-79f.dtb \ -+ qcom-ipq4019-e2600ac-c1.dtb \ -+ qcom-ipq4019-e2600ac-c2.dtb \ -+ qcom-ipq4019-ea8300.dtb \ -+ qcom-ipq4019-eap2200.dtb \ -+ qcom-ipq4019-fritzbox-7530.dtb \ -+ qcom-ipq4019-fritzrepeater-1200.dtb \ -+ qcom-ipq4019-fritzrepeater-3000.dtb \ -+ qcom-ipq4019-habanero-dvk.dtb \ -+ qcom-ipq4019-hap-ac3.dtb \ -+ qcom-ipq4019-map-ac2200.dtb \ -+ qcom-ipq4019-lhgg-60ad.dtb \ -+ qcom-ipq4019-mf286d.dtb \ -+ qcom-ipq4019-mr8300.dtb \ -+ qcom-ipq4019-pa2200.dtb \ -+ qcom-ipq4019-r619ac-64m.dtb \ -+ qcom-ipq4019-r619ac-128m.dtb \ -+ qcom-ipq4019-rbr50.dtb \ -+ qcom-ipq4019-rbs50.dtb \ -+ qcom-ipq4019-rt-ac42u.dtb \ -+ qcom-ipq4019-rtl30vw.dtb \ -+ qcom-ipq4019-srr60.dtb \ -+ qcom-ipq4019-srs60.dtb \ -+ qcom-ipq4019-u4019-32m.dtb \ -+ qcom-ipq4019-wifi.dtb \ -+ qcom-ipq4019-wpj419.dtb \ -+ qcom-ipq4019-wtr-m2133hp.dtb \ -+ qcom-ipq4019-x1pro.dtb \ -+ qcom-ipq4028-wpj428.dtb \ -+ qcom-ipq4029-ap-303.dtb \ -+ qcom-ipq4029-ap-303h.dtb \ -+ qcom-ipq4029-ap-365.dtb \ -+ qcom-ipq4029-gl-b1300.dtb \ -+ qcom-ipq4019-gl-b2200.dtb \ -+ qcom-ipq4029-gl-s1300.dtb \ -+ qcom-ipq4029-mr33.dtb \ -+ qcom-ipq4029-mr74.dtb \ - qcom-ipq8064-ap148.dtb \ - qcom-ipq8064-rb3011.dtb \ - qcom-msm8226-samsung-s3ve3g.dtb \ diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 13b5b64fb6..811e5133f2 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -25,6 +25,7 @@ platform_do_upgrade() { esac ;; *) + nand_do_upgrade "$1" ;; esac } diff --git a/target/linux/mediatek/patches-5.15/120-08-v5.18-mtd-spinand-Delay-a-little-bit-the-dirmap-creation.patch b/target/linux/mediatek/patches-5.15/120-08-v5.18-mtd-spinand-Delay-a-little-bit-the-dirmap-creation.patch index 192b1221ed..0f69b30e94 100644 --- a/target/linux/mediatek/patches-5.15/120-08-v5.18-mtd-spinand-Delay-a-little-bit-the-dirmap-creation.patch +++ b/target/linux/mediatek/patches-5.15/120-08-v5.18-mtd-spinand-Delay-a-little-bit-the-dirmap-creation.patch @@ -18,7 +18,7 @@ Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-8-miquel.raynal@b --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c -@@ -1210,14 +1210,6 @@ static int spinand_init(struct spinand_d +@@ -1211,14 +1211,6 @@ static int spinand_init(struct spinand_d if (ret) goto err_free_bufs; @@ -33,7 +33,7 @@ Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-8-miquel.raynal@b ret = nanddev_init(nand, &spinand_ops, THIS_MODULE); if (ret) goto err_manuf_cleanup; -@@ -1252,6 +1244,14 @@ static int spinand_init(struct spinand_d +@@ -1253,6 +1245,14 @@ static int spinand_init(struct spinand_d mtd->ecc_strength = nanddev_get_ecc_conf(nand)->strength; mtd->ecc_step_size = nanddev_get_ecc_conf(nand)->step_size; diff --git a/target/linux/mediatek/patches-5.15/120-09-v5.18-mtd-spinand-Create-direct-mapping-descriptors-for-EC.patch b/target/linux/mediatek/patches-5.15/120-09-v5.18-mtd-spinand-Create-direct-mapping-descriptors-for-EC.patch index 86df0270d8..1188872bd7 100644 --- a/target/linux/mediatek/patches-5.15/120-09-v5.18-mtd-spinand-Create-direct-mapping-descriptors-for-EC.patch +++ b/target/linux/mediatek/patches-5.15/120-09-v5.18-mtd-spinand-Create-direct-mapping-descriptors-for-EC.patch @@ -87,7 +87,7 @@ Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-9-miquel.raynal@b --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h -@@ -391,6 +391,8 @@ struct spinand_info { +@@ -392,6 +392,8 @@ struct spinand_info { struct spinand_dirmap { struct spi_mem_dirmap_desc *wdesc; struct spi_mem_dirmap_desc *rdesc; diff --git a/target/linux/mediatek/patches-5.15/330-snand-mtk-bmt-support.patch b/target/linux/mediatek/patches-5.15/330-snand-mtk-bmt-support.patch index 48bfb0d358..cd1745dd7a 100644 --- a/target/linux/mediatek/patches-5.15/330-snand-mtk-bmt-support.patch +++ b/target/linux/mediatek/patches-5.15/330-snand-mtk-bmt-support.patch @@ -8,7 +8,7 @@ static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val) { -@@ -1332,6 +1333,7 @@ static int spinand_probe(struct spi_mem +@@ -1333,6 +1334,7 @@ static int spinand_probe(struct spi_mem if (ret) return ret; @@ -16,7 +16,7 @@ ret = mtd_device_register(mtd, NULL, 0); if (ret) goto err_spinand_cleanup; -@@ -1339,6 +1341,7 @@ static int spinand_probe(struct spi_mem +@@ -1340,6 +1342,7 @@ static int spinand_probe(struct spi_mem return 0; err_spinand_cleanup: @@ -24,7 +24,7 @@ spinand_cleanup(spinand); return ret; -@@ -1357,6 +1360,7 @@ static int spinand_remove(struct spi_mem +@@ -1358,6 +1361,7 @@ static int spinand_remove(struct spi_mem if (ret) return ret; diff --git a/target/linux/mediatek/patches-5.15/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch b/target/linux/mediatek/patches-5.15/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch index 4a5d814b3b..823630b3c4 100644 --- a/target/linux/mediatek/patches-5.15/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch +++ b/target/linux/mediatek/patches-5.15/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch @@ -18,8 +18,8 @@ Signed-off-by: Davide Fioravanti +++ b/drivers/mtd/nand/spi/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 --spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o -+spinand-objs := core.o esmt.o fidelix.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o +-spinand-objs := core.o esmt.o etron.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o ++spinand-objs := core.o esmt.o etron.o fidelix.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o obj-$(CONFIG_MTD_SPI_NAND) += spinand.o --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -29,8 +29,8 @@ Signed-off-by: Davide Fioravanti &esmt_c8_spinand_manufacturer, + &fidelix_spinand_manufacturer, &gigadevice_spinand_manufacturer, + &etron_spinand_manufacturer, ¯onix_spinand_manufacturer, - µn_spinand_manufacturer, --- /dev/null +++ b/drivers/mtd/nand/spi/fidelix.c @@ -0,0 +1,76 @@ @@ -112,10 +112,10 @@ Signed-off-by: Davide Fioravanti +}; --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h -@@ -261,6 +261,7 @@ struct spinand_manufacturer { - +@@ -262,6 +262,7 @@ struct spinand_manufacturer { /* SPI NAND manufacturers */ extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; + extern const struct spinand_manufacturer etron_spinand_manufacturer; +extern const struct spinand_manufacturer fidelix_spinand_manufacturer; extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; extern const struct spinand_manufacturer macronix_spinand_manufacturer; diff --git a/target/linux/mediatek/patches-5.15/510-net-mediatek-add-flow-offload-for-mt7623.patch b/target/linux/mediatek/patches-5.15/510-net-mediatek-add-flow-offload-for-mt7623.patch index 4c0d1001e0..9b0d411bba 100644 --- a/target/linux/mediatek/patches-5.15/510-net-mediatek-add-flow-offload-for-mt7623.patch +++ b/target/linux/mediatek/patches-5.15/510-net-mediatek-add-flow-offload-for-mt7623.patch @@ -14,7 +14,7 @@ Signed-off-by: Frank Wunderlich --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -3637,6 +3637,7 @@ static const struct mtk_soc_data mt2701_ +@@ -3639,6 +3639,7 @@ static const struct mtk_soc_data mt2701_ .hw_features = MTK_HW_FEATURES, .required_clks = MT7623_CLKS_BITMAP, .required_pctl = true, diff --git a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch index de1079ffae..7544787701 100644 --- a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch +++ b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch @@ -113,7 +113,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -322,9 +322,12 @@ +@@ -327,9 +327,12 @@ #define PHY_IAC_ADDR_MASK GENMASK(24, 20) #define PHY_IAC_ADDR(x) FIELD_PREP(PHY_IAC_ADDR_MASK, (x)) #define PHY_IAC_CMD_MASK GENMASK(19, 18) diff --git a/target/linux/mediatek/patches-5.15/921-mt7986-add-mmc-support.patch b/target/linux/mediatek/patches-5.15/921-mt7986-add-mmc-support.patch deleted file mode 100644 index 18b6e97d06..0000000000 --- a/target/linux/mediatek/patches-5.15/921-mt7986-add-mmc-support.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 0f8a0dd620b2fb5f9c852844ce5f445bb0bd6d52 Mon Sep 17 00:00:00 2001 -From: Sam Shih -Date: Wed, 4 May 2022 10:27:43 +0800 -Subject: [PATCH 5/5] mediatek: add mt7986a mmc support - -Add mt7986a boot mmc support - -Signed-off-by: Sam Shih ---- - ...-mmc-mediatek-add-mt7986-mmc-support.patch | 31 +++++++++++++++++++ - 1 file changed, 31 insertions(+) - create mode 100644 target/linux/mediatek/patches-5.15/0704-mmc-mediatek-add-mt7986-mmc-support.patch - ---- /dev/null -+++ b/target/linux/mediatek/patches-5.15/0704-mmc-mediatek-add-mt7986-mmc-support.patch -@@ -0,0 +1,31 @@ -+diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c -+index 1ac9201..a32349c 100644 -+--- a/drivers/mmc/host/mtk-sd.c -++++ b/drivers/mmc/host/mtk-sd.c -+@@ -540,6 +540,18 @@ static const struct mtk_mmc_compatible mt7622_compat = { -+ .support_64g = false, -+ }; -+ -++static const struct mtk_mmc_compatible mt7986_compat = { -++ .clk_div_bits = 12, -++ .hs400_tune = false, -++ .pad_tune_reg = MSDC_PAD_TUNE0, -++ .async_fifo = true, -++ .data_tune = true, -++ .busy_check = true, -++ .stop_clk_fix = true, -++ .enhance_rx = true, -++ .support_64g = true, -++}; -++ -+ static const struct mtk_mmc_compatible mt8516_compat = { -+ .clk_div_bits = 12, -+ .recheck_sdio_irq = true, -+@@ -584,6 +596,7 @@ static const struct of_device_id msdc_of_ids[] = { -+ { .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat}, -+ { .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat}, -+ { .compatible = "mediatek,mt7622-mmc", .data = &mt7622_compat}, -++ { .compatible = "mediatek,mt7986-mmc", .data = &mt7986_compat}, -+ { .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat}, -+ { .compatible = "mediatek,mt7620-mmc", .data = &mt7620_compat}, -+ { .compatible = "mediatek,mt6779-mmc", .data = &mt6779_compat}, diff --git a/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch b/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch index 8a39c81e01..43526f3c4a 100644 --- a/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch +++ b/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch @@ -14,7 +14,7 @@ Signed-off-by: René van Dorst --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -3228,6 +3228,7 @@ static const struct net_device_ops mtk_n +@@ -3230,6 +3230,7 @@ static const struct net_device_ops mtk_n static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) { @@ -22,7 +22,7 @@ Signed-off-by: René van Dorst const __be32 *_id = of_get_property(np, "reg", NULL); phy_interface_t phy_mode; struct phylink *phylink; -@@ -3347,6 +3348,9 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -3349,6 +3350,9 @@ static int mtk_add_mac(struct mtk_eth *e else eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN; diff --git a/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch b/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch index 063b317fd5..94e99da015 100644 --- a/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch +++ b/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch @@ -95,7 +95,7 @@ still required by target/linux/ramips/files/drivers/net/ethernet/ralink/mdio.c phydev->mii_ts->link_state(phydev->mii_ts, phydev); --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c -@@ -1315,7 +1315,8 @@ void phylink_destroy(struct phylink *pl) +@@ -1323,7 +1323,8 @@ void phylink_destroy(struct phylink *pl) } EXPORT_SYMBOL_GPL(phylink_destroy); diff --git a/target/linux/realtek/patches-5.10/317-gpio-realtek-otto-clear-spurious-interrups.patch b/target/linux/realtek/patches-5.10/317-gpio-realtek-otto-clear-spurious-interrups.patch deleted file mode 100644 index 6e5957d13e..0000000000 --- a/target/linux/realtek/patches-5.10/317-gpio-realtek-otto-clear-spurious-interrups.patch +++ /dev/null @@ -1,30 +0,0 @@ -realtek: clear spurious GPIO interrupts - -The interrupt controller in the internal GPIO peripheral will sometimes -generate spurious interrupts. If these are not properly acknowledged, the -system will be held busy until reboot. These spurious interrupts are identified -by the fact that there is no system IRQ number associated, since the interrupt -line was never allocated. Although most prevalent on RTL839x, RTL838x SoCs have -also displayed this behaviour. - -Reported-by: Luiz Angelo Daros de Luca # DGS-1210-52 -Reported-by: Birger Koblitz # Netgear GS724TP v2 -Reported-by: Jan Hoffmann # HPE 1920-16G -Signed-off-by: Sander Vanheule ---- - drivers/gpio/gpio-realtek-otto.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/gpio/gpio-realtek-otto.c -+++ b/drivers/gpio/gpio-realtek-otto.c -@@ -251,6 +251,10 @@ static void realtek_gpio_irq_handler(str - port_pin_count = min(gc->ngpio - lines_done, 8U); - for_each_set_bit(offset, &status, port_pin_count) { - irq = irq_find_mapping(gc->irq.domain, offset + lines_done); -+ if (unlikely(!irq)) { -+ realtek_gpio_clear_isr(ctrl, lines_done / 8, BIT(offset)); -+ continue; -+ } - generic_handle_irq(irq); - } - } diff --git a/target/linux/realtek/patches-5.10/317-gpio-realtek-otto-switch-to-32-bit-I-O.patch b/target/linux/realtek/patches-5.10/317-gpio-realtek-otto-switch-to-32-bit-I-O.patch new file mode 100644 index 0000000000..9c043b7126 --- /dev/null +++ b/target/linux/realtek/patches-5.10/317-gpio-realtek-otto-switch-to-32-bit-I-O.patch @@ -0,0 +1,373 @@ +From ee0175b3b44288c74d5292c2a9c2c154f6c0317e Mon Sep 17 00:00:00 2001 +From: Sander Vanheule +Date: Sun, 7 Aug 2022 21:21:15 +0200 +Subject: [PATCH] gpio: realtek-otto: switch to 32-bit I/O + +By using 16-bit I/O on the GPIO peripheral, which is apparently not safe +on MIPS, the IMR can end up containing garbage. This then results in +interrupt triggers for lines that don't have an interrupt handler +associated. The irq_desc lookup fails, and the ISR will not be cleared, +keeping the CPU busy until reboot, or until another IMR operation +restores the correct value. This situation appears to happen very +rarely, for < 0.5% of IMR writes. + +Instead of using 8-bit or 16-bit I/O operations on the 32-bit memory +mapped peripheral registers, switch to using 32-bit I/O only, operating +on the entire bank for all single bit line settings. For 2-bit line +settings, with 16-bit port values, stick to manual (un)packing. + +This issue has been seen on RTL8382M (HPE 1920-16G), RTL8391M (Netgear +GS728TP v2), and RTL8393M (D-Link DGS-1210-52 F3, Zyxel GS1900-48). + +Reported-by: Luiz Angelo Daros de Luca # DGS-1210-52 +Reported-by: Birger Koblitz # GS728TP +Reported-by: Jan Hoffmann # 1920-16G +Fixes: 0d82fb1127fb ("gpio: Add Realtek Otto GPIO support") +Signed-off-by: Sander Vanheule +Cc: Paul Cercueil +Reviewed-by: Linus Walleij +Signed-off-by: Bartosz Golaszewski + +Update patch for missing upstream changes: + - commit a01a40e33499 ("gpio: realtek-otto: Make the irqchip immutable") + - commit dbd1c54fc820 ("gpio: Bulk conversion to generic_handle_domain_irq()") +Signed-off-by: Sander Vanheule + +--- + drivers/gpio/gpio-realtek-otto.c | 166 ++++++++++++++++--------------- + 1 file changed, 85 insertions(+), 81 deletions(-) + +--- a/drivers/gpio/gpio-realtek-otto.c ++++ b/drivers/gpio/gpio-realtek-otto.c +@@ -46,10 +46,20 @@ + * @lock: Lock for accessing the IRQ registers and values + * @intr_mask: Mask for interrupts lines + * @intr_type: Interrupt type selection ++ * @bank_read: Read a bank setting as a single 32-bit value ++ * @bank_write: Write a bank setting as a single 32-bit value ++ * @imr_line_pos: Bit shift of an IRQ line's IMR value. ++ * ++ * The DIR, DATA, and ISR registers consist of four 8-bit port values, packed ++ * into a single 32-bit register. Use @bank_read (@bank_write) to get (assign) ++ * a value from (to) these registers. The IMR register consists of four 16-bit ++ * port values, packed into two 32-bit registers. Use @imr_line_pos to get the ++ * bit shift of the 2-bit field for a line's IMR settings. Shifts larger than ++ * 32 overflow into the second register. + * + * Because the interrupt mask register (IMR) combines the function of IRQ type + * selection and masking, two extra values are stored. @intr_mask is used to +- * mask/unmask the interrupts for a GPIO port, and @intr_type is used to store ++ * mask/unmask the interrupts for a GPIO line, and @intr_type is used to store + * the selected interrupt types. The logical AND of these values is written to + * IMR on changes. + */ +@@ -59,10 +69,11 @@ struct realtek_gpio_ctrl { + void __iomem *cpumask_base; + struct cpumask cpu_irq_maskable; + raw_spinlock_t lock; +- u16 intr_mask[REALTEK_GPIO_PORTS_PER_BANK]; +- u16 intr_type[REALTEK_GPIO_PORTS_PER_BANK]; +- unsigned int (*port_offset_u8)(unsigned int port); +- unsigned int (*port_offset_u16)(unsigned int port); ++ u8 intr_mask[REALTEK_GPIO_MAX]; ++ u8 intr_type[REALTEK_GPIO_MAX]; ++ u32 (*bank_read)(void __iomem *reg); ++ void (*bank_write)(void __iomem *reg, u32 value); ++ unsigned int (*line_imr_pos)(unsigned int line); + }; + + /* Expand with more flags as devices with other quirks are added */ +@@ -101,14 +112,22 @@ static struct realtek_gpio_ctrl *irq_dat + * port. The two interrupt mask registers store two bits per GPIO, so use u16 + * values. + */ +-static unsigned int realtek_gpio_port_offset_u8(unsigned int port) ++static u32 realtek_gpio_bank_read_swapped(void __iomem *reg) ++{ ++ return ioread32be(reg); ++} ++ ++static void realtek_gpio_bank_write_swapped(void __iomem *reg, u32 value) + { +- return port; ++ iowrite32be(value, reg); + } + +-static unsigned int realtek_gpio_port_offset_u16(unsigned int port) ++static unsigned int realtek_gpio_line_imr_pos_swapped(unsigned int line) + { +- return 2 * port; ++ unsigned int port_pin = line % 8; ++ unsigned int port = line / 8; ++ ++ return 2 * (8 * (port ^ 1) + port_pin); + } + + /* +@@ -119,64 +138,65 @@ static unsigned int realtek_gpio_port_of + * per GPIO, so use u16 values. The first register contains ports 1 and 0, the + * second ports 3 and 2. + */ +-static unsigned int realtek_gpio_port_offset_u8_rev(unsigned int port) ++static u32 realtek_gpio_bank_read(void __iomem *reg) + { +- return 3 - port; ++ return ioread32(reg); + } + +-static unsigned int realtek_gpio_port_offset_u16_rev(unsigned int port) ++static void realtek_gpio_bank_write(void __iomem *reg, u32 value) + { +- return 2 * (port ^ 1); ++ iowrite32(value, reg); + } + +-static void realtek_gpio_write_imr(struct realtek_gpio_ctrl *ctrl, +- unsigned int port, u16 irq_type, u16 irq_mask) ++static unsigned int realtek_gpio_line_imr_pos(unsigned int line) + { +- iowrite16(irq_type & irq_mask, +- ctrl->base + REALTEK_GPIO_REG_IMR + ctrl->port_offset_u16(port)); ++ return 2 * line; + } + +-static void realtek_gpio_clear_isr(struct realtek_gpio_ctrl *ctrl, +- unsigned int port, u8 mask) ++static void realtek_gpio_clear_isr(struct realtek_gpio_ctrl *ctrl, u32 mask) + { +- iowrite8(mask, ctrl->base + REALTEK_GPIO_REG_ISR + ctrl->port_offset_u8(port)); ++ ctrl->bank_write(ctrl->base + REALTEK_GPIO_REG_ISR, mask); + } + +-static u8 realtek_gpio_read_isr(struct realtek_gpio_ctrl *ctrl, unsigned int port) ++static u32 realtek_gpio_read_isr(struct realtek_gpio_ctrl *ctrl) + { +- return ioread8(ctrl->base + REALTEK_GPIO_REG_ISR + ctrl->port_offset_u8(port)); ++ return ctrl->bank_read(ctrl->base + REALTEK_GPIO_REG_ISR); + } + +-/* Set the rising and falling edge mask bits for a GPIO port pin */ +-static u16 realtek_gpio_imr_bits(unsigned int pin, u16 value) ++/* Set the rising and falling edge mask bits for a GPIO pin */ ++static void realtek_gpio_update_line_imr(struct realtek_gpio_ctrl *ctrl, unsigned int line) + { +- return (value & REALTEK_GPIO_IMR_LINE_MASK) << 2 * pin; ++ void __iomem *reg = ctrl->base + REALTEK_GPIO_REG_IMR; ++ unsigned int line_shift = ctrl->line_imr_pos(line); ++ unsigned int shift = line_shift % 32; ++ u32 irq_type = ctrl->intr_type[line]; ++ u32 irq_mask = ctrl->intr_mask[line]; ++ u32 reg_val; ++ ++ reg += 4 * (line_shift / 32); ++ reg_val = ioread32(reg); ++ reg_val &= ~(REALTEK_GPIO_IMR_LINE_MASK << shift); ++ reg_val |= (irq_type & irq_mask & REALTEK_GPIO_IMR_LINE_MASK) << shift; ++ iowrite32(reg_val, reg); + } + + static void realtek_gpio_irq_ack(struct irq_data *data) + { + struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data); + irq_hw_number_t line = irqd_to_hwirq(data); +- unsigned int port = line / 8; +- unsigned int port_pin = line % 8; + +- realtek_gpio_clear_isr(ctrl, port, BIT(port_pin)); ++ realtek_gpio_clear_isr(ctrl, BIT(line)); + } + + static void realtek_gpio_irq_unmask(struct irq_data *data) + { + struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data); + unsigned int line = irqd_to_hwirq(data); +- unsigned int port = line / 8; +- unsigned int port_pin = line % 8; + unsigned long flags; +- u16 m; + + raw_spin_lock_irqsave(&ctrl->lock, flags); +- m = ctrl->intr_mask[port]; +- m |= realtek_gpio_imr_bits(port_pin, REALTEK_GPIO_IMR_LINE_MASK); +- ctrl->intr_mask[port] = m; +- realtek_gpio_write_imr(ctrl, port, ctrl->intr_type[port], m); ++ ctrl->intr_mask[line] = REALTEK_GPIO_IMR_LINE_MASK; ++ realtek_gpio_update_line_imr(ctrl, line); + raw_spin_unlock_irqrestore(&ctrl->lock, flags); + } + +@@ -184,16 +204,11 @@ static void realtek_gpio_irq_mask(struct + { + struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data); + unsigned int line = irqd_to_hwirq(data); +- unsigned int port = line / 8; +- unsigned int port_pin = line % 8; + unsigned long flags; +- u16 m; + + raw_spin_lock_irqsave(&ctrl->lock, flags); +- m = ctrl->intr_mask[port]; +- m &= ~realtek_gpio_imr_bits(port_pin, REALTEK_GPIO_IMR_LINE_MASK); +- ctrl->intr_mask[port] = m; +- realtek_gpio_write_imr(ctrl, port, ctrl->intr_type[port], m); ++ ctrl->intr_mask[line] = 0; ++ realtek_gpio_update_line_imr(ctrl, line); + raw_spin_unlock_irqrestore(&ctrl->lock, flags); + } + +@@ -201,10 +216,8 @@ static int realtek_gpio_irq_set_type(str + { + struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data); + unsigned int line = irqd_to_hwirq(data); +- unsigned int port = line / 8; +- unsigned int port_pin = line % 8; + unsigned long flags; +- u16 type, t; ++ u8 type; + + switch (flow_type & IRQ_TYPE_SENSE_MASK) { + case IRQ_TYPE_EDGE_FALLING: +@@ -223,11 +236,8 @@ static int realtek_gpio_irq_set_type(str + irq_set_handler_locked(data, handle_edge_irq); + + raw_spin_lock_irqsave(&ctrl->lock, flags); +- t = ctrl->intr_type[port]; +- t &= ~realtek_gpio_imr_bits(port_pin, REALTEK_GPIO_IMR_LINE_MASK); +- t |= realtek_gpio_imr_bits(port_pin, type); +- ctrl->intr_type[port] = t; +- realtek_gpio_write_imr(ctrl, port, t, ctrl->intr_mask[port]); ++ ctrl->intr_type[line] = type; ++ realtek_gpio_update_line_imr(ctrl, line); + raw_spin_unlock_irqrestore(&ctrl->lock, flags); + + return 0; +@@ -238,31 +248,24 @@ static void realtek_gpio_irq_handler(str + struct gpio_chip *gc = irq_desc_get_handler_data(desc); + struct realtek_gpio_ctrl *ctrl = gpiochip_get_data(gc); + struct irq_chip *irq_chip = irq_desc_get_chip(desc); +- unsigned int lines_done; +- unsigned int port_pin_count; + unsigned int irq; + unsigned long status; + int offset; + + chained_irq_enter(irq_chip, desc); + +- for (lines_done = 0; lines_done < gc->ngpio; lines_done += 8) { +- status = realtek_gpio_read_isr(ctrl, lines_done / 8); +- port_pin_count = min(gc->ngpio - lines_done, 8U); +- for_each_set_bit(offset, &status, port_pin_count) { +- irq = irq_find_mapping(gc->irq.domain, offset + lines_done); +- generic_handle_irq(irq); +- } ++ status = realtek_gpio_read_isr(ctrl); ++ for_each_set_bit(offset, &status, gc->ngpio) { ++ irq = irq_find_mapping(gc->irq.domain, offset); ++ generic_handle_irq(irq); + } + + chained_irq_exit(irq_chip, desc); + } + +-static inline void __iomem *realtek_gpio_irq_cpu_mask(struct realtek_gpio_ctrl *ctrl, +- unsigned int port, int cpu) ++static inline void __iomem *realtek_gpio_irq_cpu_mask(struct realtek_gpio_ctrl *ctrl, int cpu) + { +- return ctrl->cpumask_base + ctrl->port_offset_u8(port) + +- REALTEK_GPIO_PORTS_PER_BANK * cpu; ++ return ctrl->cpumask_base + REALTEK_GPIO_PORTS_PER_BANK * cpu; + } + + static int realtek_gpio_irq_set_affinity(struct irq_data *data, +@@ -270,12 +273,10 @@ static int realtek_gpio_irq_set_affinity + { + struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data); + unsigned int line = irqd_to_hwirq(data); +- unsigned int port = line / 8; +- unsigned int port_pin = line % 8; + void __iomem *irq_cpu_mask; + unsigned long flags; + int cpu; +- u8 v; ++ u32 v; + + if (!ctrl->cpumask_base) + return -ENXIO; +@@ -283,15 +284,15 @@ static int realtek_gpio_irq_set_affinity + raw_spin_lock_irqsave(&ctrl->lock, flags); + + for_each_cpu(cpu, &ctrl->cpu_irq_maskable) { +- irq_cpu_mask = realtek_gpio_irq_cpu_mask(ctrl, port, cpu); +- v = ioread8(irq_cpu_mask); ++ irq_cpu_mask = realtek_gpio_irq_cpu_mask(ctrl, cpu); ++ v = ctrl->bank_read(irq_cpu_mask); + + if (cpumask_test_cpu(cpu, dest)) +- v |= BIT(port_pin); ++ v |= BIT(line); + else +- v &= ~BIT(port_pin); ++ v &= ~BIT(line); + +- iowrite8(v, irq_cpu_mask); ++ ctrl->bank_write(irq_cpu_mask, v); + } + + raw_spin_unlock_irqrestore(&ctrl->lock, flags); +@@ -305,22 +306,23 @@ static int realtek_gpio_irq_init(struct + { + struct realtek_gpio_ctrl *ctrl = gpiochip_get_data(gc); + void __iomem *irq_cpu_mask; +- unsigned int port; ++ u32 mask_all = GENMASK(gc->ngpio - 1, 0); ++ unsigned int line; + int cpu; + +- for (port = 0; (port * 8) < gc->ngpio; port++) { +- realtek_gpio_write_imr(ctrl, port, 0, 0); +- realtek_gpio_clear_isr(ctrl, port, GENMASK(7, 0)); +- +- /* +- * Uniprocessor builds assume a mask always contains one CPU, +- * so only start the loop if we have at least one maskable CPU. +- */ +- if(!cpumask_empty(&ctrl->cpu_irq_maskable)) { +- for_each_cpu(cpu, &ctrl->cpu_irq_maskable) { +- irq_cpu_mask = realtek_gpio_irq_cpu_mask(ctrl, port, cpu); +- iowrite8(GENMASK(7, 0), irq_cpu_mask); +- } ++ for (line = 0; line < gc->ngpio; line++) ++ realtek_gpio_update_line_imr(ctrl, line); ++ ++ realtek_gpio_clear_isr(ctrl, mask_all); ++ ++ /* ++ * Uniprocessor builds assume a mask always contains one CPU, ++ * so only start the loop if we have at least one maskable CPU. ++ */ ++ if(!cpumask_empty(&ctrl->cpu_irq_maskable)) { ++ for_each_cpu(cpu, &ctrl->cpu_irq_maskable) { ++ irq_cpu_mask = realtek_gpio_irq_cpu_mask(ctrl, cpu); ++ ctrl->bank_write(irq_cpu_mask, mask_all); + } + } + +@@ -393,12 +395,14 @@ static int realtek_gpio_probe(struct pla + + if (dev_flags & GPIO_PORTS_REVERSED) { + bgpio_flags = 0; +- ctrl->port_offset_u8 = realtek_gpio_port_offset_u8_rev; +- ctrl->port_offset_u16 = realtek_gpio_port_offset_u16_rev; ++ ctrl->bank_read = realtek_gpio_bank_read; ++ ctrl->bank_write = realtek_gpio_bank_write; ++ ctrl->line_imr_pos = realtek_gpio_line_imr_pos; + } else { + bgpio_flags = BGPIOF_BIG_ENDIAN_BYTE_ORDER; +- ctrl->port_offset_u8 = realtek_gpio_port_offset_u8; +- ctrl->port_offset_u16 = realtek_gpio_port_offset_u16; ++ ctrl->bank_read = realtek_gpio_bank_read_swapped; ++ ctrl->bank_write = realtek_gpio_bank_write_swapped; ++ ctrl->line_imr_pos = realtek_gpio_line_imr_pos_swapped; + } + + err = bgpio_init(&ctrl->gc, dev, 4, diff --git a/tools/Makefile b/tools/Makefile index 3fb5f2b977..660d72efe8 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -25,7 +25,7 @@ tools-y += autoconf autoconf-archive automake bc bison cmake cpio dosfstools tools-y += e2fsprogs fakeroot findutils firmware-utils flex gengetopt tools-y += libressl libtool lzma m4 make-ext4fs meson missing-macros mkimage tools-y += mklibs mtd-utils mtools ninja padjffs2 patch-image -tools-y += patchelf pkgconf quilt squashfskit4 sstrip xxd zip zlib zstd +tools-y += patchelf pkgconf quilt squashfskit4 sstrip zip zlib zstd tools-$(BUILD_B43_TOOLS) += b43-tools tools-$(BUILD_ISL) += isl tools-$(BUILD_TOOLCHAIN) += expat gmp mpc mpfr diff --git a/tools/bc/Makefile b/tools/bc/Makefile index 73dbdab49e..9e1b2ba336 100644 --- a/tools/bc/Makefile +++ b/tools/bc/Makefile @@ -7,16 +7,14 @@ include $(TOPDIR)/rules.mk PKG_NAME:=bc -PKG_VERSION:=1.06.95 +PKG_VERSION:=1.07 -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 -PKG_SOURCE_URL:=https://alpha.gnu.org/gnu/bc \ - https://gnualpha.uib.no/bc/ \ - https://mirrors.fe.up.pt/pub/gnu-alpha/bc/ \ - https://www.nic.funet.fi/pub/gnu/alpha/gnu/bc/ -PKG_HASH:=7ee4abbcfac03d8a6e1a8a3440558a3d239d6b858585063e745c760957725ecc +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz +PKG_SOURCE_URL:=@GNU/bc +PKG_HASH:=55cf1fc33a728d7c3d386cc7b0cb556eb5bacf8e0cb5a3fcca7f109fc61205ad PKG_FIXUP := autoreconf +PKG_CPE_ID:=cpe:/a:gnu:bc include $(INCLUDE_DIR)/host-build.mk diff --git a/tools/bc/patches/001-no_doc.patch b/tools/bc/patches/001-no_doc.patch index 50deee8c89..119f111f49 100644 --- a/tools/bc/patches/001-no_doc.patch +++ b/tools/bc/patches/001-no_doc.patch @@ -1,6 +1,5 @@ -diff -urN bc-1.06.95/Makefile.am bc-1.06.95.new/Makefile.am ---- bc-1.06.95/Makefile.am 2005-05-27 01:05:41.000000000 +0100 -+++ bc-1.06.95.new/Makefile.am 2013-07-09 09:33:31.521490710 +0100 +--- a/Makefile.am ++++ b/Makefile.am @@ -1,6 +1,6 @@ ## Process this file with automake to produce Makefile.in @@ -8,16 +7,15 @@ diff -urN bc-1.06.95/Makefile.am bc-1.06.95.new/Makefile.am +SUBDIRS = lib bc dc MAINTAINERCLEANFILES = aclocal.m4 config.h.in configure Makefile.in \ - stamp-h $(distdir).tar.gz h/number.h depcomp missing -diff -urN bc-1.06.95/Makefile.in bc-1.06.95.new/Makefile.in ---- bc-1.06.95/Makefile.in 2006-09-05 03:39:30.000000000 +0100 -+++ bc-1.06.95.new/Makefile.in 2013-07-09 09:33:28.565490767 +0100 -@@ -149,7 +149,7 @@ - sharedstatedir = @sharedstatedir@ - sysconfdir = @sysconfdir@ - target_alias = @target_alias@ + stamp-h $(distdir).tar.gz h/number.h depcomp missing \ +--- a/Makefile.in ++++ b/Makefile.in +@@ -288,7 +288,7 @@ target_alias = @target_alias@ + top_build_prefix = @top_build_prefix@ + top_builddir = @top_builddir@ + top_srcdir = @top_srcdir@ -SUBDIRS = lib bc dc doc +SUBDIRS = lib bc dc MAINTAINERCLEANFILES = aclocal.m4 config.h.in configure Makefile.in \ - stamp-h $(distdir).tar.gz h/number.h depcomp missing - + stamp-h $(distdir).tar.gz h/number.h depcomp missing \ + bc/libmath.h diff --git a/tools/bc/patches/002-fix-libmath.patch b/tools/bc/patches/002-fix-libmath.patch new file mode 100644 index 0000000000..1a8439542d --- /dev/null +++ b/tools/bc/patches/002-fix-libmath.patch @@ -0,0 +1,32 @@ +--- a/bc/fix-libmath_h ++++ b/bc/fix-libmath_h +@@ -1,9 +1,9 @@ +-ed libmath.h < --- --- a/Utilities/cmcurl/CMakeLists.txt +++ b/Utilities/cmcurl/CMakeLists.txt -@@ -565,6 +565,14 @@ if(CMAKE_USE_OPENSSL) +@@ -594,6 +594,14 @@ if(CURL_USE_OPENSSL) endif() set(SSL_ENABLED ON) set(USE_OPENSSL ON) diff --git a/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch index dd66989c98..2b3ba361bd 100644 --- a/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch +++ b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch @@ -1,6 +1,6 @@ --- a/bootstrap +++ b/bootstrap -@@ -1423,7 +1423,10 @@ int main(){ printf("1%c", (char)0x0a); r +@@ -1441,7 +1441,10 @@ int main(){ printf("1%c", (char)0x0a); r ' > "test.c" cmake_original_make_flags="${cmake_make_flags}" if test "x${cmake_parallel_make}" != "x"; then diff --git a/tools/expat/Makefile b/tools/expat/Makefile index fc339f818a..7079dabcaf 100644 --- a/tools/expat/Makefile +++ b/tools/expat/Makefile @@ -9,10 +9,10 @@ include $(TOPDIR)/rules.mk PKG_NAME:=expat PKG_CPE_ID:=cpe:/a:libexpat:expat -PKG_VERSION:=2.4.7 +PKG_VERSION:=2.4.8 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 -PKG_HASH:=e149bdd8b90254c62b3d195da53a09bd531a4d63a963b0d8a5268d48dd2f6a65 +PKG_HASH:=a247a7f6bbb21cf2ca81ea4cbb916bfb9717ca523631675f99b3d4a5678dcd16 PKG_SOURCE_URL:=https://github.com/libexpat/libexpat/releases/download/R_$(subst .,_,$(PKG_VERSION)) include $(INCLUDE_DIR)/host-build.mk diff --git a/tools/fakeroot/Makefile b/tools/fakeroot/Makefile index c29f51e77f..5d31e19781 100644 --- a/tools/fakeroot/Makefile +++ b/tools/fakeroot/Makefile @@ -5,12 +5,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=fakeroot -PKG_VERSION:=1.28 +PKG_VERSION:=1.29 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)_$(PKG_VERSION).orig.tar.gz PKG_SOURCE_URL:=@DEBIAN/pool/main/f/fakeroot -PKG_HASH:=56d405e36ff685f83879be08fdd654255ab9aa38632b4605a98e896ad63990c2 +PKG_HASH:=8fbbafb780c9173e3ace4a04afbc1d900f337f3216883939f5c7db3431be7c20 PKG_LICENSE:=GPL-3.0-or-later PKG_LICENSE_FILES:=COPYING PKG_FIXUP:=autoreconf diff --git a/tools/fakeroot/patches/400-alpine-libc.musl-fix.patch b/tools/fakeroot/patches/400-alpine-libc.musl-fix.patch index 530c96842e..f740b120a1 100644 --- a/tools/fakeroot/patches/400-alpine-libc.musl-fix.patch +++ b/tools/fakeroot/patches/400-alpine-libc.musl-fix.patch @@ -21,7 +21,7 @@ Error relocating openwrt/staging_dir/host/lib/libfakeroot.so: SEND_GET_XATTR: sy #define SEND_GET_XATTR64(a,b,c) send_get_xattr64(a,b) #endif -@@ -140,8 +142,9 @@ +@@ -142,8 +144,9 @@ /* 10.10 uses id_t in getpriority/setpriority calls, so pretend id_t is used everywhere, just happens to be int on some OSes */ diff --git a/tools/fakeroot/patches/600-macOS.patch b/tools/fakeroot/patches/600-macOS.patch index f9d6d189b2..730367f07c 100644 --- a/tools/fakeroot/patches/600-macOS.patch +++ b/tools/fakeroot/patches/600-macOS.patch @@ -36,7 +36,7 @@ posix_spawn;int;(pid_t * __restrict pid, const char * __restrict path, const posix_spawn_file_actions_t *file_actions, const posix_spawnattr_t * __restrict attrp, char *const argv[ __restrict], char *const envp[ __restrict]);(pid, path, file_actions, attrp, argv, envp) posix_spawnp;int;(pid_t * __restrict pid, const char * __restrict path, const posix_spawn_file_actions_t *file_actions, const posix_spawnattr_t * __restrict attrp, char *const argv[ __restrict], char *const envp[ __restrict]);(pid, path, file_actions, attrp, argv, envp) #endif -@@ -232,7 +234,7 @@ facl;int;(int fd, int cmd, int cnt, void +@@ -229,7 +231,7 @@ facl;int;(int fd, int cmd, int cnt, void #ifdef HAVE_FTS_READ fts_read;FTSENT *;(FTS *ftsp);(ftsp) #ifdef __APPLE__ @@ -45,7 +45,7 @@ fts_read$INODE64;FTSENT *;(FTS *ftsp);(ftsp) #endif #endif /* ifdef __APPLE__ */ -@@ -240,7 +242,7 @@ fts_read$INODE64;FTSENT *;(FTS *ftsp);(f +@@ -237,7 +239,7 @@ fts_read$INODE64;FTSENT *;(FTS *ftsp);(f #ifdef HAVE_FTS_CHILDREN fts_children;FTSENT *;(FTS *ftsp, int options);(ftsp, options) #ifdef __APPLE__ diff --git a/tools/llvm-bpf/Makefile b/tools/llvm-bpf/Makefile index 527b357824..775e1af896 100644 --- a/tools/llvm-bpf/Makefile +++ b/tools/llvm-bpf/Makefile @@ -7,12 +7,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=llvm-project -PKG_VERSION:=13.0.0 +PKG_VERSION:=14.0.6 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).src.tar.xz PKG_SOURCE_URL:=https://github.com/llvm/llvm-project/releases/download/llvmorg-$(PKG_VERSION) -PKG_HASH:=6075ad30f1ac0e15f07c1bf062c1e1268c241d674f11bd32cdf0e040c71f2bf3 +PKG_HASH:=8b3cfd7bc695bd6cea0f37f53f0981f34f87496e79e2529874fd03a2f9dd3a8a HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION).src diff --git a/tools/pkgconf/Makefile b/tools/pkgconf/Makefile index d2f3252b12..b5f241b7dc 100644 --- a/tools/pkgconf/Makefile +++ b/tools/pkgconf/Makefile @@ -7,11 +7,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=pkgconf -PKG_VERSION:=1.8.0 +PKG_VERSION:=1.9.3 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://distfiles.dereferenced.org/pkgconf -PKG_HASH:=ef9c7e61822b7cb8356e6e9e1dca58d9556f3200d78acab35e4347e9d4c2bbaf +PKG_HASH:=5fb355b487d54fb6d341e4f18d4e2f7e813a6622cf03a9e87affa6a40565699d include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/meson.mk diff --git a/tools/xxd/Makefile b/tools/xxd/Makefile deleted file mode 100644 index c3cc6863cc..0000000000 --- a/tools/xxd/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later - -include $(TOPDIR)/rules.mk - -PKG_NAME:=xxd -PKG_VERSION:=1.10 -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=http://grail.cba.csuohio.edu/~somos/ -PKG_HASH:=9bf05c19b9084973e3cc877696a7f9881a5c87fa5a9fa438d9962519726559f9 -PKG_CPE_ID:=cpe:/a:vim:vim - -include $(INCLUDE_DIR)/host-build.mk - -define Host/Install - $(INSTALL_DIR) $(STAGING_DIR_HOST)/bin - $(INSTALL_BIN) $(HOST_BUILD_DIR)/xxd $(STAGING_DIR_HOST)/bin/ -endef - -$(eval $(call HostBuild))