sunxi: fix NanoPi R1 support

This commit is contained in:
CN_SZTL 2020-10-22 13:02:23 +08:00
parent 3ea1ed9408
commit 0980aba2c0
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GPG Key ID: 6850B6345C862176
2 changed files with 71 additions and 61 deletions

View File

@ -0,0 +1,20 @@
#!/bin/sh
. /lib/functions/leds.sh
. /lib/functions/uci-defaults.sh
board=$(board_name)
boardname="${board##*,}"
board_config_update
case $board in
friendlyarm,nanopi-r1)
ucidef_set_led_netdev "wan" "WAN" "nanopi:green:wan" "eth0"
ucidef_set_led_netdev "lan" "LAN" "nanopi:green:lan" "eth1"
;;
esac
board_config_flush
exit 0

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@ -1,3 +1,30 @@
From 5aee0b1272cd5b42933ef629d66b677669e2e8d2 Mon Sep 17 00:00:00 2001
From: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Date: Mon, 12 Oct 2020 05:24:51 +0000
Subject: [PATCH] sunxi: add support for friendlyarm nanopi r1
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
---
.../devicetree/bindings/arm/sunxi.yaml | 5 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 146 ++++++++++++++++++
3 files changed, 152 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -241,6 +241,11 @@ properties:
- const: friendlyarm,nanopi-neo-plus2
- const: allwinner,sun50i-h5
+ - description: FriendlyARM NanoPi R1
+ items:
+ - const: friendlyarm,nanopi-r1
+ - const: allwinner,sun8i-h3
+
- description: Gemei G9 Tablet
items:
- const: gemei,g9
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1109,6 +1109,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
@ -10,31 +37,20 @@
sun8i-h3-orangepi-one.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
@@ -0,0 +1,149 @@
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Igor Pecovnik <igor@armbian.com>
+ * Copyright (C) 2020 Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
+ */
+
+/* NanoPi R1 is based on the NanoPi-H3 design from FriendlyARM */
+#include "sun8i-h3-nanopi.dtsi"
+
+/ {
+ model = "FriendlyARM NanoPi R1";
+ compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
+
+ aliases {
+ serial1 = &uart3;
+ ethernet0 = &emac;
+ ethernet1 = &emac;
+ ethernet2 = &sdio_wifi;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
@ -54,17 +70,23 @@
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ regulator-ramp-delay = <50>;
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
+ };
+
+ leds {
+ /delete-node/ status;
+ pwr {
+ label = "nanopi:red:pwr";
+ /delete-node/ pwr;
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
@ -97,13 +119,20 @@
+ cpu-supply = <&vdd_cpux>;
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ status = "okay";
+};
+
@ -126,7 +155,7 @@
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ };
+};
@ -141,16 +170,11 @@
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+&ohci2 {
+ status = "okay";
+};
+
@ -160,37 +184,3 @@
+ function = "gpio_in";
+ };
+};
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -78,6 +78,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
+ clock-frequency = <1296000000>;
};
cpu1: cpu@1 {
@@ -88,6 +89,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
+ clock-frequency = <1296000000>;
};
cpu2: cpu@2 {
@@ -98,6 +100,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
+ clock-frequency = <1296000000>;
};
cpu3: cpu@3 {
@@ -108,6 +111,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
+ clock-frequency = <1296000000>;
};
};