From e9431a8335658fd8bcb1c01b3c7e59bf0401196d Mon Sep 17 00:00:00 2001 From: Nick Hainke Date: Mon, 18 Apr 2022 15:04:25 +0200 Subject: [PATCH 1/2] ipq40xx: fix ar40xx driver This commit is completely based on the work of adron-s: https://github.com/openwrt/openwrt/pull/4721#issuecomment-1101108651 The commit fixes the data corruption on TX packets. Packets are transmitted, but their contents are replaced with zeros. This error is caused by the lack of guard (50 ms) intervals between calibration phases. This error is treated by adding mdelay(50) to the calibration function code. In the original qca-ssda code [0], these mdelays were existing, but in the ar41xx.c they are gone. Tested on: - Fritz!Box 4040 - Fritz!Box 7530 - Mikrotik SXTsq 5AC - ZyXEL NBG6617 - [0] https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk/-/blob/NHSS.QSDK.11.4/src/init/ssdk_init.c#L2072 Suggested-by: Serhii Serhieiev Reviewed-by: Robert Marko Signed-off-by: Nick Hainke (cherry picked from commit ab7e53e5cce703c7a62efbe1d41fb94c2228a178) [Deleted 5.10 from commit title] Signed-off-by: Nick Hainke --- target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c b/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c index ca7f0ca350..545e3985ae 100644 --- a/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c +++ b/target/linux/ipq40xx/files/drivers/net/phy/ar40xx.c @@ -935,6 +935,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv) */ mdelay(2); } + mdelay(50); /*check malibu psgmii calibration done end..*/ @@ -953,6 +954,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv) /* Polling interval to check PSGMII PLL in ESS is ready */ mdelay(2); } + mdelay(50); /* check dakota psgmii calibration done end..*/ @@ -960,6 +962,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv) mdiobus_write(bus, 5, 0x1a, 0x3230); /* release phy psgmii RX 20bit */ mdiobus_write(bus, 5, 0x0, 0x005f); + mdelay(200); } static void From 13c88950a25726b33bd1d2fb977f0056cc50f2a2 Mon Sep 17 00:00:00 2001 From: Alban Bedel Date: Sat, 30 Apr 2022 10:42:33 +0200 Subject: [PATCH 2/2] ramips: zbt-wg2626: Add the reset gpio for PCIe port 1 The 2.4GHz interface doesn't come up properly with the log showing: mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK) As seen on other MT7621 boards this is caused by a missing reset GPIO. The MT7621 dtsi set GPIO 19 as PCIe reset GPIO, which on this board reset the 5GHz interface on port 0. Add GPIO 8 to the PCIe reset GPIO list to also reset the 2.4GHz interface on port 1. Signed-off-by: Alban Bedel (cherry picked from commit f953a1a4bfba2fa70c12bb80938aa66481a673b6) --- target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts index d0d656ba6d..06c4f1d177 100644 --- a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts +++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts @@ -88,6 +88,9 @@ &pcie { status = "okay"; + + reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>, + <&gpio 8 GPIO_ACTIVE_LOW>; }; &pcie0 {