uboot: update to latest

package/boot/apex/Makefile

@@ -1,62 +0,0 @@
-#
-# Copyright (C) 2006-2011 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=apex
-PKG_VERSION:=1.6.9
-PKG_RELEASE:=1
-
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=https://downloads.openwrt.org/sources/
-PKG_HASH:=1d2bc04c2c6bb3d2d6c1916b6dc559cda2b1ecb045d7801fd49af6af4234abeb
-PKG_TARGETS:=bin
-
-include $(INCLUDE_DIR)/package.mk
-
-export GCC_HONOUR_COPTS=s
-
-define Package/apex
-  SECTION:=boot
-  CATEGORY:=Boot Loaders
-  DEPENDS:=@TARGET_ixp4xx
-  DEFAULT:=y
-  TITLE:=Boot loader for NSLU2, FSG3, NAS100D and others
-endef
-
-define build_apex
-	$(MAKE) -C $(PKG_BUILD_DIR) \
-		ARCH=arm \
-		$(1)_config
-	$(MAKE) -C $(PKG_BUILD_DIR) \
-		$(TARGET_CONFIGURE_OPTS) \
-		KBUILD_HAVE_NLS=no \
-		ARCH=arm \
-		clean all
-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/apex.bin $(PKG_BUILD_DIR)/out/apex-$(2).bin
-endef
-
-define Build/Compile
-	$(INSTALL_DIR) $(PKG_BUILD_DIR)/out
-	$(call build_apex,slugos-nslu2-armeb,nslu2-armeb)
-	$(call build_apex,slugos-nslu2-16mb-armeb,nslu2-16mb-armeb)
-	$(call build_apex,slugos-fsg3-armeb,fsg3-armeb)
-	$(call build_apex,slugos-nas100d-armeb,nas100d-armeb)
-endef
-
-define Package/apex/install
-	$(INSTALL_DIR) $(STAGING_DIR)/apex
-	$(CP) $(PKG_BUILD_DIR)/out/*.bin $(1)/
-endef
-
-define Build/InstallDev
-	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
-	$(CP) $(PKG_BUILD_DIR)/out/*.bin $(STAGING_DIR_IMAGE)/
-endef
-
-$(eval $(call BuildPackage,apex))

package/boot/apex/patches/001-compile_fix.patch

@@ -1,20 +0,0 @@
---- a/Makefile
-+++ b/Makefile
-@@ -444,7 +444,7 @@ ifeq ($(config-targets),1)
- include $(srctree)/src/arch-$(SRCARCH)/Makefile
- export KBUILD_DEFCONFIG
- 
--config %config: scripts_basic outputmakefile FORCE
-+%config: scripts_basic outputmakefile FORCE
- 	$(Q)mkdir -p include/linux include/config
- 	$(Q)$(MAKE) $(build)=scripts/kconfig $@
- 
-@@ -1585,7 +1585,7 @@ endif
- 	$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
- 
- # Modules
--/ %/: prepare scripts FORCE
-+%/: prepare scripts FORCE
- 	$(cmd_crmodverdir)
- 	$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
- 	$(build)=$(build-dir)

package/boot/apex/patches/100-openwrt_nslu2_armeb_config.patch

@@ -1,23 +0,0 @@
---- a/src/mach-ixp42x/slugos-nslu2-armeb_config
-+++ b/src/mach-ixp42x/slugos-nslu2-armeb_config
-@@ -19,7 +19,7 @@ CONFIG_EXPERIMENTAL=y
- #
- # General Setup
- #
--CONFIG_TARGET_DESCRIPTION="SlugOS NSLU2 (bigendian)"
-+CONFIG_TARGET_DESCRIPTION="OpenWrt NSLU2 (8MiB Flash)"
- CONFIG_CROSS_COMPILE=""
- CONFIG_AEABI=y
- # CONFIG_DRIVER_LONG_LONG_SIZE is not set
-@@ -163,9 +163,9 @@ CONFIG_ENV_REGION_KERNEL_ALT="fis://kern
- # Overrides
- #
- CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y
--CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock4 rootfstype=jffs2 console=ttyS0,115200 init=/linuxrc"
-+CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock4 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd"
- CONFIG_ENV_DEFAULT_CMDLINE_ALT_P=y
--CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=jffs2 console=ttyS0,115200 init=/linuxrc"
-+CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd"
- # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set
- # CONFIG_ENV_DEFAULT_STARTUP_ALT_P is not set
- CONFIG_USES_NOR_BOOTFLASH=y

package/boot/apex/patches/120-openwrt_nslu2_16mb_armeb_config.patch

@@ -1,23 +0,0 @@
---- a/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config
-+++ b/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config
-@@ -19,7 +19,7 @@ CONFIG_EXPERIMENTAL=y
- #
- # General Setup
- #
--CONFIG_TARGET_DESCRIPTION="SlugOS NSLU2/BE (16MiB Flash)"
-+CONFIG_TARGET_DESCRIPTION="OpenWrt NSLU2 (16MiB Flash)"
- CONFIG_CROSS_COMPILE=""
- CONFIG_AEABI=y
- # CONFIG_DRIVER_LONG_LONG_SIZE is not set
-@@ -163,9 +163,9 @@ CONFIG_ENV_REGION_KERNEL_ALT="fis://kern
- # Overrides
- #
- CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y
--CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock4 rootfstype=jffs2 console=ttyS0,115200 init=/linuxrc"
-+CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock4 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd"
- CONFIG_ENV_DEFAULT_CMDLINE_ALT_P=y
--CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=jffs2 console=ttyS0,115200 init=/linuxrc"
-+CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd"
- # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set
- # CONFIG_ENV_DEFAULT_STARTUP_ALT_P is not set
- CONFIG_USES_NOR_BOOTFLASH=y

package/boot/apex/patches/140-openwrt_fsg3_armeb_config.patch

@@ -1,23 +0,0 @@
---- a/src/mach-ixp42x/slugos-fsg3-armeb_config
-+++ b/src/mach-ixp42x/slugos-fsg3-armeb_config
-@@ -17,7 +17,7 @@ CONFIG_EXPERIMENTAL=y
- #
- # General Setup
- #
--CONFIG_TARGET_DESCRIPTION="SlugOS FSG3/BE"
-+CONFIG_TARGET_DESCRIPTION="OpenWrt FSG3"
- CONFIG_CROSS_COMPILE=""
- CONFIG_AEABI=y
- CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-@@ -148,9 +148,9 @@ CONFIG_ENV_REGION_KERNEL_ALT="fis://kern
- #    Overrides
- #
- CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y
--CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/sda1 rootdelay=10 console=ttyS0,115200"
-+CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/sda1 rootdelay=10 console=ttyS0,115200 init=/etc/preinit noinitrd"
- CONFIG_ENV_DEFAULT_CMDLINE_ALT_P=y
--CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/sda2 rootdelay=10 console=ttyS0,115200"
-+CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock2 rootfstype=squashfs console=ttyS0,115200 init=/etc/preinit noinitrd"
- # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set
- # CONFIG_ENV_DEFAULT_STARTUP_ALT_P is not set
- CONFIG_USES_NOR_BOOTFLASH=y

package/boot/apex/patches/150-limit_ram_to_64mb.patch

@@ -1,22 +0,0 @@
---- a/src/mach-ixp42x/slugos-nslu2-armeb_config
-+++ b/src/mach-ixp42x/slugos-nslu2-armeb_config
-@@ -137,7 +137,7 @@ CONFIG_AUTOBOOT_DELAY=10
- CONFIG_ENV_STARTUP_KERNEL_COPY=y
- # CONFIG_ENV_REGION_KERNEL_SWAP is not set
- CONFIG_ENV_STARTUP_PREFIX_P=y
--CONFIG_ENV_STARTUP_PREFIX="sdram-init; memscan -u 0+256m"
-+CONFIG_ENV_STARTUP_PREFIX="sdram-init; memscan -u 0+64m"
- 
- #
- #    Regions
---- a/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config
-+++ b/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config
-@@ -137,7 +137,7 @@ CONFIG_AUTOBOOT_DELAY=10
- CONFIG_ENV_STARTUP_KERNEL_COPY=y
- # CONFIG_ENV_REGION_KERNEL_SWAP is not set
- CONFIG_ENV_STARTUP_PREFIX_P=y
--CONFIG_ENV_STARTUP_PREFIX="sdram-init; memscan -u 0+256m"
-+CONFIG_ENV_STARTUP_PREFIX="sdram-init; memscan -u 0+64m"
- 
- #
- #    Regions

package/boot/apex/patches/160-openwrt_nas100d_armeb_config.patch

@@ -1,20 +0,0 @@
---- a/src/mach-ixp42x/slugos-nas100d-armeb_config
-+++ b/src/mach-ixp42x/slugos-nas100d-armeb_config
-@@ -19,7 +19,7 @@ CONFIG_EXPERIMENTAL=y
- #
- # General Setup
- #
--CONFIG_TARGET_DESCRIPTION="SlugOS NAS100D/BE"
-+CONFIG_TARGET_DESCRIPTION="OpenWrt NAS100D"
- CONFIG_CROSS_COMPILE=""
- CONFIG_AEABI=y
- # CONFIG_DRIVER_LONG_LONG_SIZE is not set
-@@ -158,7 +158,7 @@ CONFIG_ENV_REGION_KERNEL="fis://kernel"
- # Overrides
- #
- CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y
--CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock2 rootfstype=jffs2 console=ttyS0,115200 init=/linuxrc"
-+CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd"
- # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set
- CONFIG_USES_NOR_BOOTFLASH=y
- CONFIG_RELOCATE_SIMPLE=y

package/boot/arm-trusted-firmware-mvebu/Makefile

@@ -0,0 +1,112 @@
+#
+# Copyright (C) 2019 Sartura Ltd.
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=arm-trusted-firmware-mvebu
+PKG_VERSION:=2.2
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_RELEASE).tar.xz
+PKG_SOURCE_URL:=https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+PKG_SOURCE_DATE:=2019-10-22
+PKG_SOURCE_VERSION:=a04808c16cfc126d9fe572ae7c4b5a3d39de5796
+PKG_MIRROR_HASH:=ff93aad67227ca96db54e92288f61b4ff3abbaad291fc88ad95c29cd3dd3588c
+
+PKG_MAINTAINER:=Vladimir Vid <vladimir.vid@sartura.hr>
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/arm-trusted-firmware-mvebu
+  SECTION:=boot
+  CATEGORY:=Boot Loaders
+  TITLE:=ARM Trusted Firmware for mvebu devices
+endef
+
+define Package/arm-trusted-firmware-mvebu/uDPU
+$(call Package/arm-trusted-firmware-mvebu)
+  BOARDNAME:=uDPU
+  TITLE:=ARM Trusted Firmware for Methode uDPU
+  DEPENDS:=+u-boot-uDPU
+  UBOOT:=uDPU
+  CLOCKSPRESET:=CPU_1000_DDR_800
+  PLAT:=a3700
+endef
+
+A3700_UTILS_NAME:=a3700-utils
+A3700_UTILS_RELEASE:=18.12.1
+A3700_UTILS_SOURCE=$(A3700_UTILS_NAME)-$(A3700_UTILS_RELEASE).tar.bz2
+
+define Download/a3700-utils
+  FILE:=$(A3700_UTILS_SOURCE)
+  PROTO:=git
+  URL:=https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
+  VERSION:=e6bb176fb9936d9160e53ae09275000dc6440686
+  MIRROR_HASH:=c3edf71cbf1fc2e5482d36e36a34c79d682d2c87fdfb909b4dc6327a171e7bd4
+  SUBDIR:=$(A3700_UTILS_NAME)
+endef
+
+MV_DDR_NAME:=mv-ddr-marvell
+MV_DDR_RELEASE:=mainline
+MV_DDR_SOURCE:=$(MV_DDR_NAME)-$(MV_DDR_RELEASE).tar.bz2
+
+define Download/mv-ddr-marvell
+  FILE:=$(MV_DDR_SOURCE)
+  PROTO:=git
+  URL:=https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
+  VERSION:=a881467ef0f0185e6570dd0483023fde93cbb5f5
+  MIRROR_HASH:=19f34817616c583b2b5f2612705857cf2120f6c2132355217899b1403c3fd336
+  SUBDIR:=$(MV_DDR_NAME)
+endef
+
+LINARO_NAME:=gcc-linaro
+LINARO_RELEASE:=6
+LINARO_VERSION:=5.0-2018.12-$(HOST_ARCH)_arm-linux-gnueabi
+LINARO_SOURCE=$(LINARO_NAME)-$(LINARO_RELEASE).$(LINARO_VERSION).tar.xz
+
+define Download/gcc-linaro
+  FILE:=$(LINARO_SOURCE)
+  URL:=https://releases.linaro.org/components/toolchain/binaries/latest-$(LINARO_RELEASE)/arm-linux-gnueabi/
+  HASH:=2d4a92d6c8b384ae404b2e02c1c412e3ec18f9b714135acf046b2b1b510e9ace
+endef
+
+define Build/Prepare
+	# Download sources
+	$(eval $(call Download,a3700-utils))
+	$(eval $(call Download,mv-ddr-marvell))
+	$(eval $(call Download,gcc-linaro))
+
+	rm -rf $(PKG_BUILD_DIR)
+	$(TAR) -C $(BUILD_DIR) -xf $(DL_DIR)/$(PKG_SOURCE)
+
+	mkdir -p $(STAGING_DIR_IMAGE)
+	$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(A3700_UTILS_SOURCE)
+	$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(MV_DDR_SOURCE)
+	$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(LINARO_SOURCE)
+endef
+
+TARGET_CFLAGS = ""
+
+MAKE_VARS= \
+	CROSS_COMPILE="$(TARGET_CROSS)"
+
+MAKE_FLAGS = \
+	CROSS_CM3=$(STAGING_DIR_IMAGE)/$(LINARO_NAME)-$(LINARO_RELEASE).$(LINARO_VERSION)/bin/arm-linux-gnueabi- \
+	BL33=$(STAGING_DIR_IMAGE)/$(UBOOT)-u-boot.bin \
+	MV_DDR_PATH=$(STAGING_DIR_IMAGE)/$(MV_DDR_NAME) \
+	WTP=$(STAGING_DIR_IMAGE)/$(A3700_UTILS_NAME) \
+	CLOCKSPRESET=$(CLOCKSPRESET) \
+	PLAT=$(PLAT) \
+	all \
+	fip
+
+define Build/InstallDev
+	$(CP) $(PKG_BUILD_DIR)/build/$(PLAT)/release/flash-image.bin $(BIN_DIR)/u-boot-$(BOARDNAME)/
+endef
+
+$(eval $(call BuildPackage,arm-trusted-firmware-mvebu/uDPU))

package/boot/arm-trusted-firmware-sunxi/Makefile

@@ -11,10 +11,10 @@ PKG_NAME:=arm-trusted-firmware-sunxi
 PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_URL=https://github.com/apritzel/arm-trusted-firmware
-PKG_SOURCE_DATE:=2018-02-10
-PKG_SOURCE_VERSION:=c9f55c023164a6c8c49f70f7ac6c68c626839d6f
-PKG_MIRROR_HASH:=94b5338592cf0bcc353b55da5fdd62c91ae8e6263822f73724cb72ecde3dbbf9
+PKG_SOURCE_URL=https://github.com/ARM-software/arm-trusted-firmware
+PKG_SOURCE_DATE:=2018-10-02
+PKG_SOURCE_VERSION:=dbc8d9496ead9ecdd7c2a276b542a4fbbbf64027
+PKG_MIRROR_HASH:=c81521a27b86f606e927b4e346286540b862828c8d49292eae1f5c6adfc24001
 
 PKG_LICENSE:=BSD-3-Clause
 PKG_LICENSE_FILES:=license.md
@@ -37,12 +37,12 @@ MAKE_VARS = \
 	CROSS_COMPILE="$(TARGET_CROSS)"
 
 MAKE_FLAGS += \
-	PLAT=sun50iw1p1 \
+	PLAT=sun50i_a64 \
 	bl31
 
 define Build/InstallDev
 	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
-	$(CP) $(PKG_BUILD_DIR)/build/sun50iw1p1/release/bl31.bin $(STAGING_DIR_IMAGE)/bl31.bin
+	$(CP) $(PKG_BUILD_DIR)/build/sun50i_a64/release/bl31.bin $(STAGING_DIR_IMAGE)/bl31.bin
 endef
 
 define Package/arm-trusted-firmware-sunxi/install

package/boot/at91bootstrap/Makefile

@@ -9,13 +9,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=at91bootstrap
-PKG_VERSION:=v3.8.10
+PKG_VERSION:=v3.8.12
 PKG_RELEASE:=
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL:=https://github.com/linux4sam/at91bootstrap.git
-PKG_SOURCE_VERSION:=04efa5500d60a0211d14b6ee60df7ce0a828704d
-
+PKG_SOURCE_VERSION:=28e15d07e9f24efb04b87bb0baa211a0c5640ef1
 PKG_BUILD_DIR = \
     $(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
 
@@ -28,85 +27,99 @@ define AT91Bootstrap/Default
   AT91BOOTSTRAP_IMAGE:=at91bootstrap.bin
 endef
 
+define AT91Bootstrap/at91sam9x5eknf_uboot
+  NAME:=AT91Bootstrap for AT91SAM9X5-EK board (NandFlash)
+  BUILD_SUBTARGET:=sam9x
+  BUILD_DEVICES:=at91sam9x25ek at91sam9x35ek
+endef
+
+define AT91Bootstrap/at91sam9x5eksd_uboot
+  NAME:=AT91Bootstrap for AT91SAM9X5-EK board (SDcard)
+  BUILD_SUBTARGET:=sam9x
+  BUILD_DEVICES:=at91sam9x25ek at91sam9x35ek
+endef
+
 define AT91Bootstrap/sama5d2_xplaineddf_uboot
   TITLE:=AT91Bootstrap for SAMA5D2 Xplained board (SPI Flash)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_xplained
 endef
 
 define AT91Bootstrap/sama5d2_xplaineddf_qspi_uboot
   TITLE:=AT91Bootstrap for SAMA5D2 Xplained board (QSPI Flash)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_xplained
 endef
 
 define AT91Bootstrap/sama5d2_xplainedsd_uboot
   TITLE:=AT91Bootstrap for SAMA5D2 Xplained board (SDcard/EMMC)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_xplained
 endef
 
 define AT91Bootstrap/sama5d3_xplainednf_uboot
   TITLE:=AT91Bootstrap for SAMA5D3 Xplained board (Nand Flash)
-  BUILD_SUBTARGET:=sama5d3
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d3_xplained
 endef
 
 define AT91Bootstrap/sama5d3_xplainedsd_uboot
   TITLE:=AT91Bootstrap for SAMA5D3 Xplained board (SDcard)
-  BUILD_SUBTARGET:=sama5d3
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d3_xplained
 endef
 
 define AT91Bootstrap/sama5d4_xplainednf_uboot_secure
   TITLE:=AT91Bootstrap for SAMA5D4 Xplained board (Nand Flash)
-  BUILD_SUBTARGET:=sama5d4
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d4_xplained
 endef
 
 define AT91Bootstrap/sama5d4_xplaineddf_uboot_secure
   TITLE:=AT91Bootstrap for SAMA5D4 Xplained board (SPI Flash)
-  BUILD_SUBTARGET:=sama5d4
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d4_xplained
 endef
 
 define AT91Bootstrap/sama5d4_xplainedsd_uboot_secure
   TITLE:=AT91Bootstrap for SAMA5D4 Xplained board (SDcard)
-  BUILD_SUBTARGET:=sama5d4
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d4_xplained
 endef
 
 define AT91Bootstrap/sama5d27_som1_eksd_uboot
   TITLE:=AT91Bootstrap for SAMA5D27 SOM1 Ek (SDcard0)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d27_som1_ek
 endef
 
 define AT91Bootstrap/sama5d27_som1_eksd1_uboot
   TITLE:=AT91Bootstrap for SAMA5D27 SOM1 Ek (SDcard1)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d27_som1_ek
 endef
 
 define AT91Bootstrap/sama5d27_som1_ekqspi_uboot
   TITLE:=AT91Bootstrap for SAMA5D27 SOM1 Ek (QSPI Flash)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d27_som1_ek
 endef
 
 define AT91Bootstrap/sama5d2_ptc_eknf_uboot
   TITLE:=AT91Bootstrap for SAMA5D2 PTC EK (Nand Flash)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_ptc_ek
 endef
 
 define AT91Bootstrap/sama5d2_ptc_eksd_uboot
   TITLE:=AT91Bootstrap for SAMA5D2 PTC EK (SDCard)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_ptc_ek
 endef
 
 AT91BOOTSTRAP_TARGETS := \
+    at91sam9x5eknf_uboot \
+    at91sam9x5eksd_uboot \
     sama5d2_xplaineddf_uboot \
     sama5d2_xplaineddf_qspi_uboot \
     sama5d2_xplainedsd_uboot \
@@ -115,9 +128,9 @@ AT91BOOTSTRAP_TARGETS := \
     sama5d4_xplainednf_uboot_secure \
     sama5d4_xplaineddf_uboot_secure \
     sama5d4_xplainedsd_uboot_secure \
-	sama5d27_som1_eksd_uboot \
-	sama5d27_som1_ekqspi_uboot \
-	sama5d2_ptc_eknf_uboot \
+    sama5d27_som1_eksd1_uboot \
+    sama5d27_som1_ekqspi_uboot \
+    sama5d2_ptc_eknf_uboot \
     sama5d2_ptc_eksd_uboot
 
 define Build/Compile

package/boot/fconfig/Makefile

@@ -30,13 +30,6 @@ define Package/fconfig/description
 	displays and (if writable) also edits the RedBoot configuration.
 endef
 
-define Build/Configure
-endef
-
-define Build/Compile
-	$(call Build/Compile/Default)
-endef
-
 define Package/fconfig/install
 	$(INSTALL_DIR) $(1)/usr/sbin
 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/fconfig $(1)/usr/sbin/

package/boot/grub2/Makefile

@@ -8,34 +8,44 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
+PKG_NAME:=grub
 PKG_CPE_ID:=cpe:/a:gnu:grub2
-PKG_VERSION:=2.02
-PKG_RELEASE:=3
+PKG_VERSION:=2.04
+PKG_RELEASE:=1
 
-PKG_SOURCE:=grub-$(PKG_VERSION).tar.xz
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@GNU/grub
-PKG_HASH:=810b3798d316394f94096ec2797909dbf23c858e48f7b3830826b8daa06b7b0f
+PKG_HASH:=e5292496995ad42dabe843a0192cf2a2c502e7ffcc7479398232b10a472df77d
 
-PKG_FIXUP:=autoreconf
 HOST_BUILD_PARALLEL:=1
+PKG_BUILD_DEPENDS:=grub2/host
 
 PKG_SSP:=0
 
 PKG_FLAGS:=nonshared
 
-PATCH_DIR := ../patches
-HOST_PATCH_DIR := ../patches
-HOST_BUILD_DIR := $(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION)
-
 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/package.mk
 
-define Package/grub2/Default
+define Package/grub2
   CATEGORY:=Boot Loaders
   SECTION:=boot
   TITLE:=GRand Unified Bootloader
   URL:=http://www.gnu.org/software/grub/
-  DEPENDS:=@TARGET_x86||TARGET_x86_64
+  DEPENDS:=@TARGET_x86
+endef
+
+define Package/grub2-editenv
+  CATEGORY:=Utilities
+  SECTION:=utils
+  SUBMENU:=Boot Loaders
+  TITLE:=Grub2 Environment editor
+  URL:=http://www.gnu.org/software/grub/
+  DEPENDS:=@TARGET_x86
+endef
+
+define Package/grub2-editenv/description
+	Edit grub2 environment files.
 endef
 
 HOST_BUILD_PREFIX := $(STAGING_DIR_HOST)
@@ -72,3 +82,11 @@ define Host/Configure
 	$(Host/Configure/Default)
 endef
 
+define Package/grub2-editenv/install
+	$(INSTALL_DIR) $(1)/usr/sbin
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/grub-editenv $(1)/usr/sbin/
+endef
+
+$(eval $(call HostBuild))
+$(eval $(call BuildPackage,grub2))
+$(eval $(call BuildPackage,grub2-editenv))

package/boot/grub2/grub2-efi/Makefile

@@ -1,23 +0,0 @@
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=grub-efi
-
-include ../common.mk
-
-TAR_OPTIONS:= --transform 's/grub-${PKG_VERSION}/${PKG_NAME}-${PKG_VERSION}/' $(TAR_OPTIONS)
-
-PKG_BUILD_DEPENDS:=grub2-efi/host
-
-CONFIGURE_ARGS += --with-platform=efi
-HOST_CONFIGURE_ARGS += --with-platform=efi --program-suffix=-efi
-HOST_BUILD_DIR := $(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION)
-
-define Package/grub2-efi
-$(call Package/grub2/Default)
-HIDDEN:=1
-TITLE += (with EFI support)
-endef
-
-$(eval $(call HostBuild))
-$(eval $(call BuildPackage,grub2-efi))

package/boot/grub2/grub2/Makefile

@@ -1,33 +0,0 @@
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=grub
-
-include ../common.mk
-
-PKG_BUILD_DEPENDS:=grub2/host
-
-define Package/grub2
-$(call Package/grub2/Default)
-endef
-
-define Package/grub2-editenv
-  CATEGORY:=Utilities
-  SECTION:=utils
-  TITLE:=Grub2 Environment editor
-  URL:=http://www.gnu.org/software/grub/
-  DEPENDS:=@TARGET_x86||TARGET_x86_64
-endef
-
-define Package/grub2-editenv/description
-	Edit grub2 environment files.
-endef
-
-define Package/grub2-editenv/install
-	$(INSTALL_DIR) $(1)/usr/sbin
-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/grub-editenv $(1)/usr/sbin/
-endef
-
-$(eval $(call HostBuild))
-$(eval $(call BuildPackage,grub2))
-$(eval $(call BuildPackage,grub2-editenv))

package/boot/grub2/patches/0008-Fix-packed-not-aligned-error-on-GCC-8.patch

@@ -1,71 +0,0 @@
-From 563b1da6e6ae7af46cc8354cadb5dab416989f0a Mon Sep 17 00:00:00 2001
-From: Michael Chang <mchang@suse.com>
-Date: Mon, 26 Mar 2018 16:52:34 +0800
-Subject: Fix packed-not-aligned error on GCC 8
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When building with GCC 8, there are several errors regarding packed-not-aligned.
-
-./include/grub/gpt_partition.h:79:1: error: alignment 1 of ‘struct grub_gpt_partentry’ is less than 8 [-Werror=packed-not-aligned]
-
-This patch fixes the build error by cleaning up the ambiguity of placing
-aligned structure in a packed one. In "struct grub_btrfs_time" and "struct
-grub_gpt_part_type", the aligned attribute seems to be superfluous, and also
-has to be packed, to ensure the structure is bit-to-bit mapped to the format
-laid on disk. I think we could blame to copy and paste error here for the
-mistake. In "struct efi_variable", we have to use grub_efi_packed_guid_t, as
-the name suggests. :)
-
-Signed-off-by: Michael Chang <mchang@suse.com>
-Tested-by: Michael Chang <mchang@suse.com>
-Tested-by: Paul Menzel <paulepanter@users.sourceforge.net>
-Reviewed-by: Daniel Kiper <daniel.kiper@oracle.com>
----
- grub-core/fs/btrfs.c          | 2 +-
- include/grub/efiemu/runtime.h | 2 +-
- include/grub/gpt_partition.h  | 2 +-
- 3 files changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/grub-core/fs/btrfs.c b/grub-core/fs/btrfs.c
-index 4849c1ceb..be195448d 100644
---- a/grub-core/fs/btrfs.c
-+++ b/grub-core/fs/btrfs.c
-@@ -175,7 +175,7 @@ struct grub_btrfs_time
- {
-   grub_int64_t sec;
-   grub_uint32_t nanosec;
--} __attribute__ ((aligned (4)));
-+} GRUB_PACKED;
- 
- struct grub_btrfs_inode
- {
-diff --git a/include/grub/efiemu/runtime.h b/include/grub/efiemu/runtime.h
-index 9b6b729f4..36d2dedf4 100644
---- a/include/grub/efiemu/runtime.h
-+++ b/include/grub/efiemu/runtime.h
-@@ -29,7 +29,7 @@ struct grub_efiemu_ptv_rel
- 
- struct efi_variable
- {
--  grub_efi_guid_t guid;
-+  grub_efi_packed_guid_t guid;
-   grub_uint32_t namelen;
-   grub_uint32_t size;
-   grub_efi_uint32_t attributes;
-diff --git a/include/grub/gpt_partition.h b/include/grub/gpt_partition.h
-index 1b32f6725..9668a68c3 100644
---- a/include/grub/gpt_partition.h
-+++ b/include/grub/gpt_partition.h
-@@ -28,7 +28,7 @@ struct grub_gpt_part_type
-   grub_uint16_t data2;
-   grub_uint16_t data3;
-   grub_uint8_t data4[8];
--} __attribute__ ((aligned(8)));
-+} GRUB_PACKED;
- typedef struct grub_gpt_part_type grub_gpt_part_type_t;
- 
- #define GRUB_GPT_PARTITION_TYPE_EMPTY \
--- 
-cgit v1.1-33-g03f6

package/boot/grub2/patches/001-verifiers-Blocklist-fallout-cleanup.patch

@@ -0,0 +1,31 @@
+From: David Michael <fedora.dm0@gmail.com>
+Date: Fri, 5 Jul 2019 07:45:59 -0400
+Subject: [PATCH] verifiers: Blocklist fallout cleanup
+
+Blocklist fallout cleanup after commit 5c6f9bc15 (generic/blocklist: Fix
+implicit declaration of function grub_file_filter_disable_compression()).
+
+Signed-off-by: David Michael <fedora.dm0@gmail.com>
+Reviewed-by: Daniel Kiper <daniel.kiper@oracle.com>
+---
+
+--- a/grub-core/osdep/generic/blocklist.c
++++ b/grub-core/osdep/generic/blocklist.c
+@@ -59,7 +59,7 @@ grub_install_get_blocklist (grub_device_
+ 
+       grub_disk_cache_invalidate_all ();
+ 
+-      file = grub_file_open (core_path_dev, GRUB_FILE_TYPE_NONE | FILE_TYPE_NO_DECOMPRESS);
++      file = grub_file_open (core_path_dev, GRUB_FILE_TYPE_NONE | GRUB_FILE_TYPE_NO_DECOMPRESS);
+       if (file)
+ 	{
+ 	  if (grub_file_size (file) != core_size)
+@@ -116,7 +116,7 @@ grub_install_get_blocklist (grub_device_
+ 
+   grub_file_t file;
+   /* Now read the core image to determine where the sectors are.  */
+-  file = grub_file_open (core_path_dev, GRUB_FILE_TYPE_NONE | FILE_TYPE_NO_DECOMPRESS);
++  file = grub_file_open (core_path_dev, GRUB_FILE_TYPE_NONE | GRUB_FILE_TYPE_NO_DECOMPRESS);
+   if (! file)
+     grub_util_error ("%s", grub_errmsg);
+ 

package/boot/grub2/patches/100-grub_setup_root.patch

@@ -17,7 +17,7 @@
    int  force;
    int  fs_probe;
    int allow_floppy;
-@@ -178,6 +181,13 @@ argp_parser (int key, char *arg, struct argp_state *state)
+@@ -178,6 +181,13 @@ argp_parser (int key, char *arg, struct
          arguments->dev_map = xstrdup (arg);
          break;
  
@@ -42,7 +42,7 @@
  
 --- a/util/setup.c
 +++ b/util/setup.c
-@@ -247,13 +247,12 @@ identify_partmap (grub_disk_t disk __attribute__ ((unused)),
+@@ -252,13 +252,12 @@ identify_partmap (grub_disk_t disk __att
  void
  SETUP (const char *dir,
         const char *boot_file, const char *core_file,
@@ -55,8 +55,8 @@
    char *boot_img, *core_img, *boot_path;
 -  char *root = 0;
    size_t boot_size, core_size;
- #ifdef GRUB_SETUP_BIOS
    grub_uint16_t core_sectors;
+   grub_device_t root_dev = 0, dest_dev, core_dev;
 @@ -307,7 +306,10 @@ SETUP (const char *dir,
  
    core_dev = dest_dev;
@@ -80,7 +80,7 @@
  	  continue;
 --- a/include/grub/util/install.h
 +++ b/include/grub/util/install.h
-@@ -184,13 +184,13 @@ grub_install_get_image_target (const char *arg);
+@@ -191,13 +191,13 @@ grub_install_get_image_target (const cha
  void
  grub_util_bios_setup (const char *dir,
  		      const char *boot_file, const char *core_file,
@@ -98,7 +98,7 @@
  
 --- a/util/grub-install.c
 +++ b/util/grub-install.c
-@@ -1673,7 +1673,7 @@ main (int argc, char *argv[])
+@@ -1712,7 +1712,7 @@ main (int argc, char *argv[])
  	/*  Now perform the installation.  */
  	if (install_bootsector)
  	  grub_util_bios_setup (platdir, "boot.img", "core.img",
@@ -107,7 +107,7 @@
  				fs_probe, allow_floppy, add_rs_codes);
  	break;
        }
-@@ -1699,7 +1699,7 @@ main (int argc, char *argv[])
+@@ -1738,7 +1738,7 @@ main (int argc, char *argv[])
  	/*  Now perform the installation.  */
  	if (install_bootsector)
  	  grub_util_sparc_setup (platdir, "boot.img", "core.img",

package/boot/grub2/patches/101-disable-gettext-check-macro-version.patch

@@ -1,13 +0,0 @@
-diff --git a/po/Makefile.in.in b/po/Makefile.in.in
-index 3619458..060e0db 100644
---- a/po/Makefile.in.in
-+++ b/po/Makefile.in.in
-@@ -97,7 +97,7 @@ CATALOGS = @CATALOGS@
- 	mv t-$@ $@
- 
- 
--all: check-macro-version all-@USE_NLS@
-+all: all-@USE_NLS@
- 
- all-yes: stamp-po
- all-no:

package/boot/grub2/patches/200-fix-gets-removal.patch

@@ -1,16 +0,0 @@
---- a/grub-core/gnulib/stdio.in.h
-+++ b/grub-core/gnulib/stdio.in.h
-@@ -695,13 +695,6 @@ _GL_WARN_ON_USE (getline, "getline is un
- # endif
- #endif
- 
--/* It is very rare that the developer ever has full control of stdin,
--   so any use of gets warrants an unconditional warning; besides, C11
--   removed it.  */
--#undef gets
--#if HAVE_RAW_DECL_GETS
--#endif
--
- 
- #if @GNULIB_OBSTACK_PRINTF@ || @GNULIB_OBSTACK_PRINTF_POSIX@
- struct obstack;

package/boot/grub2/patches/300-CVE-2015-8370.patch

@@ -33,8 +33,8 @@ Signed-off-by: Ismael Ripoll-Ripoll <iripoll@disca.upv.es>
  	  break;
  	}
  
--      if (key == '\b')
-+      if (key == '\b' && cur_len)
+-      if (key == GRUB_TERM_BACKSPACE)
++      if (key == GRUB_TERM_BACKSPACE && cur_len)
  	{
  	  if (cur_len)
  	    {

package/boot/grub2/patches/400-R_X86_64_PLT32.patch

@@ -1,75 +0,0 @@
-From 02702bdfe14d8a04643a45b03715f734ae34dbac Mon Sep 17 00:00:00 2001
-From: "H.J. Lu" <hjl.tools@gmail.com>
-Date: Sat, 17 Feb 2018 06:47:28 -0800
-Subject: x86-64: Treat R_X86_64_PLT32 as R_X86_64_PC32
-
-Starting from binutils commit bd7ab16b4537788ad53521c45469a1bdae84ad4a:
-
-https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=bd7ab16b4537788ad53521c45469a1bdae84ad4a
-
-x86-64 assembler generates R_X86_64_PLT32, instead of R_X86_64_PC32, for
-32-bit PC-relative branches.  Grub2 should treat R_X86_64_PLT32 as
-R_X86_64_PC32.
-
-Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
-Reviewed-by: Daniel Kiper <daniel.kiper@oracle.com>
-
-Origin: upstream, https://git.savannah.gnu.org/cgit/grub.git/commit/?id=842c390469e2c2e10b5aa36700324cd3bde25875
-Last-Update: 2018-07-30
-
-Patch-Name: R_X86_64_PLT32.patch
----
- grub-core/efiemu/i386/loadcore64.c | 1 +
- grub-core/kern/x86_64/dl.c         | 1 +
- util/grub-mkimagexx.c              | 1 +
- util/grub-module-verifier.c        | 1 +
- 4 files changed, 4 insertions(+)
-
-diff --git a/grub-core/efiemu/i386/loadcore64.c b/grub-core/efiemu/i386/loadcore64.c
-index e49d0b6ff..18facf47f 100644
---- a/grub-core/efiemu/i386/loadcore64.c
-+++ b/grub-core/efiemu/i386/loadcore64.c
-@@ -98,6 +98,7 @@ grub_arch_efiemu_relocate_symbols64 (grub_efiemu_segment_t segs,
- 		    break;
- 
- 		  case R_X86_64_PC32:
-+		  case R_X86_64_PLT32:
- 		    err = grub_efiemu_write_value (addr,
- 						   *addr32 + rel->r_addend
- 						   + sym.off
-diff --git a/grub-core/kern/x86_64/dl.c b/grub-core/kern/x86_64/dl.c
-index 440690673..3a73e6e6c 100644
---- a/grub-core/kern/x86_64/dl.c
-+++ b/grub-core/kern/x86_64/dl.c
-@@ -70,6 +70,7 @@ grub_arch_dl_relocate_symbols (grub_dl_t mod, void *ehdr,
- 	  break;
- 
- 	case R_X86_64_PC32:
-+	case R_X86_64_PLT32:
- 	  {
- 	    grub_int64_t value;
- 	    value = ((grub_int32_t) *addr32) + rel->r_addend + sym->st_value -
-diff --git a/util/grub-mkimagexx.c b/util/grub-mkimagexx.c
-index e63f148e4..f20255a28 100644
---- a/util/grub-mkimagexx.c
-+++ b/util/grub-mkimagexx.c
-@@ -832,6 +832,7 @@ SUFFIX (relocate_addresses) (Elf_Ehdr *e, Elf_Shdr *sections,
- 		  break;
- 
- 		case R_X86_64_PC32:
-+		case R_X86_64_PLT32:
- 		  {
- 		    grub_uint32_t *t32 = (grub_uint32_t *) target;
- 		    *t32 = grub_host_to_target64 (grub_target_to_host32 (*t32)
-diff --git a/util/grub-module-verifier.c b/util/grub-module-verifier.c
-index 9179285a5..a79271f66 100644
---- a/util/grub-module-verifier.c
-+++ b/util/grub-module-verifier.c
-@@ -19,6 +19,7 @@ struct grub_module_verifier_arch archs[] = {
-       -1
-     }, (int[]){
-       R_X86_64_PC32,
-+      R_X86_64_PLT32,
-       -1
-     }
-   },

package/boot/kexec-tools/Makefile

@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=kexec-tools
 PKG_VERSION:=2.0.16
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/utils/kernel/kexec
@@ -25,7 +25,6 @@ define Package/kexec-tools/Default
   SECTION:=utils
   CATEGORY:=Utilities
   URL:=http://kernel.org/pub/linux/kernel/people/horms/kexec-tools/
-  MAINTAINER:=Florian Fainelli <florian@openwrt.org>
 endef
 
 define Package/kexec-tools

package/boot/kexec-tools/files/kdump.init

@@ -1,7 +1,7 @@
 #!/bin/sh /etc/rc.common
 
 START=41
-STOP=98
+STOP=90
 
 EXTRA_COMMANDS="status"
 EXTRA_HELP="        status  Print crashkernel status"

package/boot/rbcfg/Makefile

@@ -21,7 +21,7 @@ define Package/rbcfg
   CATEGORY:=Utilities
   SUBMENU:=Boot Loaders
   TITLE:=RouterBOOT configuration tool
-  DEPENDS:=@TARGET_ar71xx
+  DEPENDS:=@(TARGET_ar71xx||TARGET_ath79)
 endef
 
 define Package/rbcfg/description

package/boot/tfa-layerscape/Makefile

@@ -0,0 +1,161 @@
+#
+# Copyright 2019 NXP
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=tfa-layerscape
+PKG_VERSION:=lsdk-1903
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/atf
+PKG_SOURCE_VERSION:=7e34aebe658c7c3439d2d68b0ce6b9776e8e6996
+PKG_MIRROR_HASH:=9cf0bc32fa589a0ee7c48c87898679e645341f29da1253d0ba5d2e82c6ea074d
+PKG_BUILD_DEPENDS:=uboot-layerscape tfa-layerscape/host
+
+include $(INCLUDE_DIR)/host-build.mk
+include $(INCLUDE_DIR)/package.mk
+
+define Package/tfa-layerscape/Config
+  define Package/tfa-$(1)
+    SECTION:=boot
+    CATEGORY:=Boot Loaders
+    TITLE:=$(2)
+    DEPENDS:=@TARGET_layerscape_armv8_64b +layerscape-rcw-$(1)
+    HIDDEN:=1
+    VARIANT:=$(1)
+    BIN_BL2:=$(3)
+    BIN_FIP:=$(4)
+  endef
+endef
+
+define Package/tfa-layerscape/Install
+  define Package/tfa-$(1)/install
+	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
+	$(CP) $(PKG_BUILD_DIR)/$(BIN_BL2) $(STAGING_DIR_IMAGE)/$(1)-bl2.pbl
+	$(CP) $(PKG_BUILD_DIR)/$(BIN_FIP) $(STAGING_DIR_IMAGE)/$(1)-fip.bin
+  endef
+endef
+
+define Build/Compile
+	$(eval $(Package/tfa-layerscape/$(BUILD_VARIANT))) \
+	$(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE=$(TARGET_CROSS) \
+		fip pbl PLAT=$(PLAT) BOOT_MODE=$(BOOT_MODE) \
+		RCW=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-rcw.bin \
+		BL33=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-uboot.bin \
+		FIPTOOL=$(STAGING_DIR_HOST)/bin/tfa-fiptool \
+		CREATE_PBL=$(STAGING_DIR_HOST)/bin/tfa-create-pbl \
+		BYTE_SWAP=$(STAGING_DIR_HOST)/bin/tfa-byte-swap
+endef
+
+HOST_CFLAGS += -Wall -Werror -pedantic -std=c99
+define Host/Compile
+	$(MAKE) -C \
+		$(HOST_BUILD_DIR)/tools/fiptool \
+		CFLAGS="$(HOST_CFLAGS)" \
+		LDFLAGS="$(HOST_LDFLAGS)"
+	$(MAKE) -C \
+		$(HOST_BUILD_DIR)/plat/nxp/tools \
+		CFLAGS="$(HOST_CFLAGS)"
+endef
+
+define Host/Install
+	$(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/fiptool/fiptool $(STAGING_DIR_HOST)/bin/tfa-fiptool
+	$(INSTALL_BIN) $(HOST_BUILD_DIR)/plat/nxp/tools/create_pbl $(STAGING_DIR_HOST)/bin/tfa-create-pbl
+	$(INSTALL_BIN) $(HOST_BUILD_DIR)/plat/nxp/tools/byte_swap $(STAGING_DIR_HOST)/bin/tfa-byte-swap
+endef
+
+define Package/tfa-layerscape/ls1012ardb
+  TITLE:=NXP LS1012ARDB Trusted Firmware
+  PLAT:=ls1012ardb
+  BOOT_MODE:=qspi
+  BIN_BL2:=build/ls1012ardb/release/bl2_qspi.pbl
+  BIN_FIP:=build/ls1012ardb/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls1012afrwy
+  TITLE:=NXP LS1012AFRWY Trusted Firmware
+  PLAT:=ls1012afrwy
+  BOOT_MODE:=qspi
+  BIN_BL2:=build/ls1012afrwy/release/bl2_qspi.pbl
+  BIN_FIP:=build/ls1012afrwy/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls1043ardb
+  TITLE:=NXP LS1043ARDB Trusted Firmware
+  PLAT:=ls1043ardb
+  BOOT_MODE:=nor
+  BIN_BL2:=build/ls1043ardb/release/bl2_nor.pbl
+  BIN_FIP:=build/ls1043ardb/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls1043ardb-sdboot
+  TITLE:=NXP LS1043ARDB SD Boot Trusted Firmware
+  PLAT:=ls1043ardb
+  BOOT_MODE:=sd
+  BIN_BL2:=build/ls1043ardb/release/bl2_sd.pbl
+  BIN_FIP:=build/ls1043ardb/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls1046ardb
+  TITLE:=NXP LS1046ARDB Trusted Firmware
+  PLAT:=ls1046ardb
+  BOOT_MODE:=qspi
+  BIN_BL2:=build/ls1046ardb/release/bl2_qspi.pbl
+  BIN_FIP:=build/ls1046ardb/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls1046ardb-sdboot
+  TITLE:=NXP LS1046ARDB SD Boot Trusted Firmware
+  PLAT:=ls1046ardb
+  BOOT_MODE:=sd
+  BIN_BL2:=build/ls1046ardb/release/bl2_sd.pbl
+  BIN_FIP:=build/ls1046ardb/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls1088ardb
+  TITLE:=NXP LS1088ARDB Trusted Firmware
+  PLAT:=ls1088ardb
+  BOOT_MODE:=qspi
+  BIN_BL2:=build/ls1088ardb/release/bl2_qspi.pbl
+  BIN_FIP:=build/ls1088ardb/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls1088ardb-sdboot
+  TITLE:=NXP LS1088ARDB SD Boot Trusted Firmware
+  PLAT:=ls1088ardb
+  BOOT_MODE:=sd
+  BIN_BL2:=build/ls1088ardb/release/bl2_sd.pbl
+  BIN_FIP:=build/ls1088ardb/release/fip.bin
+endef
+
+define Package/tfa-layerscape/ls2088ardb
+  TITLE:=NXP LS2088ARDB Trusted Firmware
+  PLAT:=ls2088ardb
+  BOOT_MODE:=nor
+  BIN_BL2:=build/ls2088ardb/release/bl2_nor.pbl
+  BIN_FIP:=build/ls2088ardb/release/fip.bin
+endef
+
+TFAS := \
+  ls1012ardb \
+  ls1012afrwy \
+  ls1043ardb \
+  ls1043ardb-sdboot \
+  ls1046ardb \
+  ls1046ardb-sdboot \
+  ls1088ardb \
+  ls1088ardb-sdboot \
+  ls2088ardb
+
+$(eval $(call HostBuild))
+$(foreach tfa,$(TFAS), \
+	$(eval $(Package/tfa-layerscape/$(tfa))) \
+	$(eval $(call Package/tfa-layerscape/Config,$(tfa),$(TITLE),$(BIN_BL2),$(BIN_FIP))) \
+	$(eval $(call Package/tfa-layerscape/Install,$(tfa))) \
+	$(eval $(call BuildPackage,tfa-$(tfa))) \
+)

package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch

@@ -0,0 +1,71 @@
+--- a/Makefile
++++ b/Makefile
+@@ -448,10 +448,6 @@ endif
+ CRTTOOLPATH		?=	tools/cert_create
+ CRTTOOL			?=	${CRTTOOLPATH}/cert_create${BIN_EXT}
+ 
+-# Variables for use with Firmware Image Package
+-FIPTOOLPATH		?=	tools/fiptool
+-FIPTOOL			?=	${FIPTOOLPATH}/fiptool${BIN_EXT}
+-
+ ################################################################################
+ # Include BL specific makefiles
+ ################################################################################
+@@ -661,14 +657,12 @@ endif
+ clean:
+ 	@echo "  CLEAN"
+ 	$(call SHELL_REMOVE_DIR,${BUILD_PLAT})
+-	${Q}${MAKE} --no-print-directory -C ${FIPTOOLPATH} clean
+ 	${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} clean
+ 
+ realclean distclean:
+ 	@echo "  REALCLEAN"
+ 	$(call SHELL_REMOVE_DIR,${BUILD_BASE})
+ 	$(call SHELL_DELETE_ALL, ${CURDIR}/cscope.*)
+-	${Q}${MAKE} --no-print-directory -C ${FIPTOOLPATH} clean
+ 	${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} clean
+ 
+ checkcodebase:		locate-checkpatch
+@@ -717,7 +711,7 @@ certificates: ${CRT_DEPS} ${CRTTOOL}
+ 	@${ECHO_BLANK_LINE}
+ endif
+ 
+-${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS} ${FIPTOOL}
++${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS}
+ 	${Q}${FIPTOOL} create ${FIP_ARGS} $@
+ 	${Q}${FIPTOOL} info $@
+ 	@${ECHO_BLANK_LINE}
+@@ -733,21 +727,16 @@ fwu_certificates: ${FWU_CRT_DEPS} ${CRTT
+ 	@${ECHO_BLANK_LINE}
+ endif
+ 
+-${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS} ${FIPTOOL}
++${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS}
+ 	${Q}${FIPTOOL} create ${FWU_FIP_ARGS} $@
+ 	${Q}${FIPTOOL} info $@
+ 	@${ECHO_BLANK_LINE}
+ 	@echo "Built $@ successfully"
+ 	@${ECHO_BLANK_LINE}
+ 
+-fiptool: ${FIPTOOL}
+ fip: ${BUILD_PLAT}/${FIP_NAME}
+ fwu_fip: ${BUILD_PLAT}/${FWU_FIP_NAME}
+ 
+-.PHONY: ${FIPTOOL}
+-${FIPTOOL}:
+-	${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${FIPTOOLPATH}
+-
+ cscope:
+ 	@echo "  CSCOPE"
+ 	${Q}find ${CURDIR} -name "*.[chsS]" > cscope.files
+--- a/tools/fiptool/Makefile
++++ b/tools/fiptool/Makefile
+@@ -37,7 +37,7 @@ all: ${PROJECT} fip_create
+ 
+ ${PROJECT}: ${OBJECTS} Makefile
+ 	@echo "  LD      $@"
+-	${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS}
++	${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS} $(LDFLAGS)
+ 	@${ECHO_BLANK_LINE}
+ 	@echo "Built $@ successfully"
+ 	@${ECHO_BLANK_LINE}

package/boot/tfa-layerscape/patches/002-plat-nxp-tools-fix-a-makefile-bug-that-will-use-defa.patch

@@ -0,0 +1,30 @@
+From 65e9a722b44bf28b98fe25b3b174761b47ec7dbd Mon Sep 17 00:00:00 2001
+From: Biwen Li <biwen.li@nxp.com>
+Date: Mon, 1 Apr 2019 13:41:55 +0800
+Subject: [PATCH 2/3] plat/nxp/tools: fix a makefile bug that will use default
+ implicit rules
+
+The patch fix a makefile bug that will use default implicit rules,
+because do not have explicit rules for the destination files.
+
+Signed-off-by: Biwen Li <biwen.li@nxp.com>
+---
+ plat/nxp/tools/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/plat/nxp/tools/Makefile b/plat/nxp/tools/Makefile
+index 2095294b..0082a0be 100644
+--- a/plat/nxp/tools/Makefile
++++ b/plat/nxp/tools/Makefile
+@@ -53,7 +53,7 @@ ${PROJECT_2}: ${OBJECTS_2} Makefile
+ 	@echo "Built $@ successfully"
+ 	@${ECHO_BLANK_LINE}
+ 
+-%.o: %.c %.h Makefile
++%.o: %.c Makefile
+ 	@echo "  CC      $<"
+ 	${Q}${HOSTCC} -c ${CPPFLAGS} ${CFLAGS} ${INCLUDE_PATHS} $< -o $@
+ 
+-- 
+2.17.1
+

package/boot/tfa-layerscape/patches/003-plat-nxp-tools-fix-create_pbl-and-byte_swap-host-bui.patch

@@ -0,0 +1,60 @@
+From 8a458876013991fe2f288bbe4694264b16c3b9e9 Mon Sep 17 00:00:00 2001
+From: Biwen Li <biwen.li@nxp.com>
+Date: Fri, 26 Jul 2019 15:44:10 +0800
+Subject: [PATCH 3/3] plat/nxp/tools: fix create_pbl and byte_swap host build
+
+Not compile create_pbl and byte_swap in the process of cross compilation
+
+Signed-off-by: Biwen Li <biwen.li@nxp.com>
+---
+ plat/nxp/tools/pbl_ch2.mk | 3 ---
+ plat/nxp/tools/pbl_ch3.mk | 5 -----
+ 2 files changed, 8 deletions(-)
+
+diff --git a/plat/nxp/tools/pbl_ch2.mk b/plat/nxp/tools/pbl_ch2.mk
+index afa43520..ff624dd9 100644
+--- a/plat/nxp/tools/pbl_ch2.mk
++++ b/plat/nxp/tools/pbl_ch2.mk
+@@ -20,8 +20,6 @@ ifeq ($(RCW),"")
+ else
+ 	# Generate header for bl2.bin
+ 	$(Q)$(CST_DIR)/create_hdr_isbc --in ${BUILD_PLAT}/bl2.bin --out ${BUILD_PLAT}/hdr_bl2 ${BL2_INPUT_FILE}
+-	# Compile create_pbl tool
+-	${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH};\
+ 	# Add bl2.bin to RCW
+ 	${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE}\
+ 			-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl ;\
+@@ -43,7 +41,6 @@ ifeq ($(RCW),"")
+ 	${Q}echo "Platform ${PLAT} requires rcw file. Please set RCW to point to the right RCW file for boot mode ${BOOT_MODE}"
+ else
+ 	# -a option appends the image for Chassis 3 devices in case of non secure boot
+-	${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH};
+ 	${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE} \
+ 	-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl ;
+ # Swapping of RCW is required for QSPi Chassis 2 devices
+diff --git a/plat/nxp/tools/pbl_ch3.mk b/plat/nxp/tools/pbl_ch3.mk
+index 944ae3bb..9aa8f635 100644
+--- a/plat/nxp/tools/pbl_ch3.mk
++++ b/plat/nxp/tools/pbl_ch3.mk
+@@ -27,9 +27,6 @@ else
+ 	# Generate header for bl2.bin
+ 	$(Q)$(CST_DIR)/create_hdr_isbc --in ${BUILD_PLAT}/bl2.bin --out ${BUILD_PLAT}/hdr_bl2 ${BL2_INPUT_FILE}
+ 
+-	# Compile create_pbl tool
+-	${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH};\
+-
+ 	# Add Block Copy command for bl2.bin to RCW
+ 	${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE}\
+ 			-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl -f ${BL2_SRC_OFFSET};\
+@@ -57,8 +54,6 @@ else  #SECURE_BOOT
+ ifeq ($(RCW),"")
+ 	${Q}echo "Platform ${PLAT} requires rcw file. Please set RCW to point to the right RCW file for boot mode ${BOOT_MODE}"
+ else
+-	${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH};
+-
+ 	# Add Block Copy command and populate boot loc ptrfor bl2.bin to RCW
+ 	${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE} \
+ 	-o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl -f ${BL2_SRC_OFFSET};
+-- 
+2.17.1
+

package/boot/uboot-ar71xx/patches/023-musl-compat.patch

@@ -0,0 +1,13 @@
+--- a/include/compiler.h	2018-08-29
++++ b/include/compiler.h	2018-08-29
+@@ -46,6 +46,10 @@ extern int errno;
+ #ifdef __linux__
+ # include <endian.h>
+ # include <byteswap.h>
++#ifndef __GLIBC__
++typedef unsigned long ulong;
++typedef unsigned int  uint;
++#endif
+ #elif defined(__MACH__) || defined(__FreeBSD__)
+ # include <machine/endian.h>
+ typedef unsigned long ulong;

package/boot/uboot-at91/Makefile

@@ -7,12 +7,12 @@
 
 include $(TOPDIR)/rules.mk
 
-PKG_VERSION:=linux4sam_5.8
+PKG_VERSION:=linux4sam_6.0
 PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL:=https://github.com/linux4sam/u-boot-at91.git
-PKG_SOURCE_VERSION:=59f202622154f82e708a6ca2bf86350a5c1b2d33
+PKG_SOURCE_VERSION:=1e7d2e5973c1fb780e55e28a801c6c574158ac14
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk
@@ -26,13 +26,21 @@ endef
 
 define U-Boot/at91sam9m10g45ek_nandflash
   NAME:=AT91SAM9M10G45-EK board (NandFlash)
-  BUILD_SUBTARGET:=legacy
+  BUILD_SUBTARGET:=sam9x
   BUILD_DEVICES:=at91sam9m10g45ek
 endef
 
 define U-Boot/at91sam9x5ek_nandflash
   NAME:=AT91SAM9X5-EK board (NandFlash)
-  BUILD_SUBTARGET:=legacy
+  BUILD_SUBTARGET:=sam9x
+  BUILD_DEVICES:=at91sam9g15ek at91sam9g25ek \
+                 at91sam9g35ek at91sam9x25ek \
+				 at91sam9x35ek
+endef
+
+define U-Boot/at91sam9x5ek_mmc
+  NAME:=AT91SAM9X5-EK board (SDcard)
+  BUILD_SUBTARGET:=sam9x
   BUILD_DEVICES:=at91sam9g15ek at91sam9g25ek \
                  at91sam9g35ek at91sam9x25ek \
 				 at91sam9x35ek
@@ -40,73 +48,74 @@ endef
 
 define U-Boot/sama5d3_xplained_nandflash
   NAME:=SAMA5D3 Xplained board (NandFlash)
-  BUILD_SUBTARGET:=sama5d3
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d3_xplained
 endef
 
 define U-Boot/sama5d3_xplained_mmc
   NAME:=SAMA5D3 Xplained board (SDcard)
-  BUILD_SUBTARGET:=sama5d3
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d3_xplained
 endef
 
 define U-Boot/sama5d2_xplained_spiflash
   NAME:=SAMA5D2 Xplained board (SPI Flash)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_xplained
 endef
 
 define U-Boot/sama5d2_xplained_mmc
   NAME:=SAMA5D2 Xplained board (SDcard/EMMC)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_xplained
 endef
 
 define U-Boot/sama5d4_xplained_spiflash
   NAME:=SAMA5D4 Xplained board (SPI Flash)
-  BUILD_SUBTARGET:=sama5d4
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d4_xplained
 endef
 
 define U-Boot/sama5d4_xplained_mmc
   NAME:=SAMA5D4 Xplained board (SDcard)
-  BUILD_SUBTARGET:=sama5d4
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d4_xplained
 endef
 
 define U-Boot/sama5d4_xplained_nandflash
   NAME:=SAMA5D4 Xplained board (NandFlash)
-  BUILD_SUBTARGET:=sama5d4
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d4_xplained
 endef
 
-define U-Boot/sama5d27_som1_ek_mmc
-  NAME:=SAMA5D27 SOM1 Ek (SDCard)
-  BUILD_SUBTARGET:=sama5d2
+define U-Boot/sama5d27_som1_ek_mmc1
+  NAME:=SAMA5D27 SOM1 Ek (SDCard1)
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d27_som1_ek
 endef
 
-define U-Boot/sama5d27_som1_ek_spiflash
+define U-Boot/sama5d27_som1_ek_qspiflash
   NAME:=SAMA5D27 SOM1 Ek (QSPI Flash)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d27_som1_ek
 endef
 
 define U-Boot/sama5d2_ptc_ek_nandflash
   NAME:=SAMA5D2 PTC Ek (Nand Flash)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_ptc_ek
 endef
 
 define U-Boot/sama5d2_ptc_ek_mmc
   NAME:=SAMA5D2 PTC Ek (SDCard)
-  BUILD_SUBTARGET:=sama5d2
+  BUILD_SUBTARGET:=sama5
   BUILD_DEVICES:=at91-sama5d2_ptc_ek
 endef
 
 UBOOT_TARGETS := \
 	at91sam9m10g45ek_nandflash \
 	at91sam9x5ek_nandflash \
+	at91sam9x5ek_mmc \
 	sama5d3_xplained_nandflash \
 	sama5d3_xplained_mmc \
 	sama5d2_xplained_mmc \
@@ -114,15 +123,15 @@ UBOOT_TARGETS := \
 	sama5d4_xplained_mmc \
 	sama5d4_xplained_spiflash \
 	sama5d4_xplained_nandflash\
-    sama5d27_som1_ek_mmc \
-    sama5d27_som1_ek_spiflash \
+	sama5d27_som1_ek_mmc1 \
+	sama5d27_som1_ek_qspiflash \
 	sama5d2_ptc_ek_nandflash \
 	sama5d2_ptc_ek_mmc
 
 define Build/Compile
   +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \
      CROSS_COMPILE=$(TARGET_CROSS) \
-	 DTC=$(LINUX_DIR)/scripts/dtc/dtc \
+	 DTC=$(PKG_BUILD_DIR)/scripts/dtc/dtc \
      KCFLAGS="$(filter-out -fstack-protector \
       -mfloat-abi=hard, $(TARGET_CFLAGS)) -mfloat-abi=soft"
 endef

package/boot/uboot-at91/patches/001-fix-Wformat-security.patch

@@ -0,0 +1,13 @@
+diff --git a/cmd/version.c b/cmd/version.c
+index b2fffe9..bcbbeb1 100644
+--- a/cmd/version.c
++++ b/cmd/version.c
+@@ -18,7 +18,7 @@ static int do_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+ {
+	char buf[DISPLAY_OPTIONS_BANNER_LENGTH];
+
+-	printf(display_options_get_banner(false, buf, sizeof(buf)));
++	printf("%s",display_options_get_banner(false, buf, sizeof(buf)));
+ #ifdef CC_VERSION_STRING
+	puts(CC_VERSION_STRING "\n");
+ #endif

package/boot/uboot-envtools/Makefile

@@ -9,16 +9,16 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=uboot-envtools
 PKG_DISTNAME:=u-boot
-PKG_VERSION:=2018.03
-PKG_RELEASE:=3
+PKG_VERSION:=2019.07
+PKG_RELEASE:=2
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE:=$(PKG_DISTNAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_SUBDIR:=$(PKG_DISTNAME)-$(PKG_VERSION)
 PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_DISTNAME)-$(PKG_VERSION)
 PKG_SOURCE_URL:=https://git.denx.de/u-boot.git
-PKG_SOURCE_VERSION:=f95ab1fb6e37f0601f397091bb011edf7a98b890
-PKG_MIRROR_HASH:=b50d8b6fe0d90b92c8c147457b1b4c2ed1cdb03191085cfc57fdad77c0bfffab
+PKG_SOURCE_VERSION:=e5aee22e4be75e75a854ab64503fc80598bc2004
+PKG_MIRROR_HASH:=58c1ecaf901b6bf65c5e872b5449b642694ae5acebf61f91f0d4bc20b4c654b7
 
 PKG_BUILD_DEPENDS:=fstools
 

package/boot/uboot-envtools/files/ar71xx

@@ -85,6 +85,11 @@ dr342|\
 dr531)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0xf800" "0x10000"
 	;;
+gl-ar150|\
+gl-domino|\
+gl-mifi)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x8000" "0x10000"
+	;;
 rambutan)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
 	ubootenv_add_uci_config "/dev/mtd1" "0x100000" "0x20000" "0x20000"

package/boot/uboot-envtools/files/ath79

@@ -13,16 +13,25 @@ touch /etc/config/ubootenv
 board=$(board_name)
 
 case "$board" in
-buffalo,wzr-hp-ag300h)
-        ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x10000" "0x10000"
-        ;;
+alfa-network,ap121f|\
 buffalo,bhr-4grv2|\
 engenius,ecb1750|\
+etactica,eg200|\
+glinet,gl-ar300m-lite|\
 glinet,gl-ar300m-nand|\
 glinet,gl-ar300m-nor|\
+glinet,gl-ar300m16|\
+glinet,gl-ar750s-nor|\
+glinet,gl-ar750s-nor-nand|\
 librerouter,librerouter-v1|\
 netgear,ex6400|\
 netgear,ex7300|\
+netgear,wndr4300-v2|\
+netgear,wndr4500-v3|\
+netgear,wnr1000-v2|\
+netgear,wnr2000-v3|\
+netgear,wnr2200-8m|\
+netgear,wnr2200-16m|\
 netgear,wnr612-v2|\
 ocedo,koala|\
 ocedo,raccoon|\
@@ -32,9 +41,23 @@ yuncore,a782|\
 yuncore,xd4200)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
 	;;
-netgear,wndr3700)
+buffalo,wzr-hp-ag300h)
+	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x10000" "0x10000"
+	;;
+glinet,gl-ar150)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x8000" "0x10000"
+	;;
+netgear,wndr3700|\
+netgear,wndr3700-v2)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x10000"
 	;;
+netgear,wndr3700-v4|\
+netgear,wndr4300)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x20000"
+	;;
+qihoo,c301)
+	ubootenv_add_uci_config "/dev/mtd9" "0x0" "0x10000" "0x10000"
+	;;
 esac
 
 config_load ubootenv

package/boot/uboot-envtools/files/imx6

@@ -24,8 +24,8 @@ apalis*)
 		ubootenv_add_uci_config /dev/mtd1 0x80000 0x20000 0x40000
 	else
 		# board boots from microSD
-		ubootenv_add_uci_config /dev/mmcblk0 0xb1400 0x20000 0x20000
-		ubootenv_add_uci_config /dev/mmcblk0 0xd1400 0x20000 0x20000
+		ubootenv_add_uci_config /dev/mmcblk0 0xb1400 0x20000
+		ubootenv_add_uci_config /dev/mmcblk0 0xd1400 0x20000
 	fi
 	;;
 wandboard)

package/boot/uboot-envtools/files/mvebu

@@ -36,6 +36,9 @@ linksys,rango|\
 linksys,venom)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
 	;;
+methode,udpu)
+	ubootenv_add_uci_config "/dev/mtd0" "0x180000" "0x10000" "0x10000"
+	;;
 esac
 
 config_load ubootenv

package/boot/uboot-envtools/files/ramips

@@ -20,17 +20,17 @@ alfa-network,r36m-e4g|\
 alfa-network,tube-e4g)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x1000"
 	;;
-all0256n-4M|\
-all0256n-8M|\
-all5002)
+allnet,all0256n-4m|\
+allnet,all0256n-8m|\
+allnet,all5002)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
 	;;
-linkits7688|\
-miwifi-nano|\
-sk-wb8|\
-wsr-1166|\
-wsr-600|\
-zbt-wg2626)
+buffalo,wsr-1166dhp|\
+buffalo,wsr-600dhp|\
+mediatek,linkit-smart-7688|\
+samknows,whitebox-v8|\
+xiaomi,miwifi-nano|\
+zbtlink,zbt-wg2626)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
 	;;
 xiaomi,mir3p|\

package/boot/uboot-envtools/files/uboot-envtools.sh

@@ -31,6 +31,6 @@ ubootenv_add_app_config() {
 	config_get envsize "$1" envsize
 	config_get secsize "$1" secsize
 	config_get numsec "$1" numsec
-	echo "$dev $offset $envsize $secsize $numsec" >>/etc/fw_env.config
+	grep -q "^[[:space:]]*${dev}[[:space:]]*${offset}" /etc/fw_env.config || echo "$dev $offset $envsize $secsize $numsec" >>/etc/fw_env.config
 }
 

package/boot/uboot-envtools/patches/001-compile.patch

@@ -1,6 +1,6 @@
 --- a/tools/env/Makefile
 +++ b/tools/env/Makefile
-@@ -10,6 +10,13 @@
+@@ -8,6 +8,13 @@
  # with "CC" here for the maximum code reuse of scripts/Makefile.host.
  override HOSTCC = $(CC)
  
@@ -12,5 +12,5 @@
 +endif
 +
  # Compile for a hosted environment on the target
- HOST_EXTRACFLAGS  = $(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \
- 		-idirafter $(srctree)/tools/env \
+ HOST_EXTRACFLAGS  = -I$(srctree)/tools \
+ 		$(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \

package/boot/uboot-fritz4040/Makefile

@@ -10,9 +10,9 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_SOURCE_URL:=https://github.com/chunkeey/FritzBox-4040-UBOOT
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_VERSION:=5da78cca60814ea31065a50376d9c905425b03a1
-PKG_SOURCE_DATE:=2018-12-09
-PKG_MIRROR_HASH:=ff7bc2498de1066dde24d7ef68e440c3847244a5b8bb35ce4275e3918f230aa3
+PKG_SOURCE_VERSION:=f92be9d783b1210c020d5d6129e210a94bb7e290
+PKG_SOURCE_DATE:=2019-10-19
+PKG_MIRROR_HASH:=e40a7f624b1758b276f81c765ef1da568c595b8bd54568b9cceca7d170ebc612
 
 PKG_RELEASE:=1
 
@@ -21,11 +21,29 @@ include $(INCLUDE_DIR)/package.mk
 
 define U-Boot/Default
   BUILD_TARGET:=ipq40xx
-  UBOOT_IMAGE:=uboot-fritz4040.bin
+  BUILD_SUBTARGET:=generic
+  UBOOT_BOARD:=$(1)
+  UBOOT_IMAGE:=uboot-$(1).bin
+endef
+
+define U-Boot/fritz1200
+  NAME:=FritzRepeater 1200
+  BUILD_DEVICES:=avm_fritzrepeater-1200
+endef
+
+define U-Boot/fritz3000
+  NAME:=FritzRepeater 3000
+  BUILD_DEVICES:=avm_fritzrepeater-3000
 endef
 
 define U-Boot/fritz4040
   NAME:=FritzBox 4040
+  BUILD_DEVICES:=avm_fritzbox-4040
+endef
+
+define U-Boot/fritz7530
+  NAME:=FritzBox 7530
+  BUILD_DEVICES:=avm_fritzbox-7530
 endef
 
 UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
@@ -34,14 +52,19 @@ export DTC
 
 define Build/Configure
 	$(Build/Configure/U-Boot)
-	$(HOSTCC) -o $(PKG_BUILD_DIR)/fritz/lzma2eva $(PKG_BUILD_DIR)/fritz/src/lzma2eva.c
-	$(HOSTCC) -o $(PKG_BUILD_DIR)/fritz/tichksum $(PKG_BUILD_DIR)/fritz/src/tichksum.c
+	$(HOSTCC) $(HOST_CFLAGS) $(HOST_LDFLAGS) -o $(PKG_BUILD_DIR)/fritz/lzma2eva $(PKG_BUILD_DIR)/fritz/src/lzma2eva.c -lz
+	$(HOSTCC) $(HOST_CFLAGS) $(HOST_LDFLAGS) -o $(PKG_BUILD_DIR)/fritz/tichksum $(PKG_BUILD_DIR)/fritz/src/tichksum.c
 	ln -sf $(STAGING_DIR_HOST)/bin/lzma $(PKG_BUILD_DIR)/fritz
 endef
 
 define Build/Compile
 	$(Build/Compile/U-Boot)
-	(cd $(PKG_BUILD_DIR); ./fritz/fritzcreator.sh;)
+	(cd $(PKG_BUILD_DIR); ./fritz/fritzcreator.sh $(UBOOT_BOARD);)
+endef
+
+define Build/InstallDev
+	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
+	$(CP) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(UBOOT_IMAGE)
 endef
 
 define Package/u-boot/install
@@ -49,6 +72,6 @@ define Package/u-boot/install
 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/upload-to-f4040.sh $(1)/
 endef
 
-UBOOT_TARGETS := fritz4040
+UBOOT_TARGETS := fritz1200 fritz3000 fritz4040 fritz7530
 
 $(eval $(call BuildPackage/U-Boot))

package/boot/uboot-imx6/Makefile

@@ -7,10 +7,10 @@
 
 include $(TOPDIR)/rules.mk
 
-PKG_VERSION:=2018.03
+PKG_VERSION:=2019.04
 PKG_RELEASE:=1
 
-PKG_HASH:=7e7477534409d5368eb1371ffde6820f0f79780a1a1f676161c48442cb303dfd
+PKG_HASH:=76b7772d156b3ddd7644c8a1736081e55b78828537ff714065d21dbade229bef
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk
@@ -20,6 +20,12 @@ define U-Boot/Default
   UBOOT_IMAGE:=u-boot.imx
 endef
 
+define U-Boot/apalis_imx6
+  NAME:=Toradex Apalis
+  UBOOT_IMAGE:=SPL u-boot.img u-boot-with-spl.imx
+  UBOOT_MAKE_FLAGS:=SPL u-boot.img u-boot-with-spl.imx
+endef
+
 define U-Boot/mx6cuboxi
    NAME:=SolidRun Cubox-i boards
    UBOOT_IMAGE:=SPL u-boot.img
@@ -62,6 +68,7 @@ define U-Boot/wandboard
 endef
 
 UBOOT_TARGETS := \
+	apalis_imx6 \
 	mx6cuboxi \
 	mx6sabresd \
 	nitrogen6dl \

package/boot/uboot-imx6/patches/0001-imx6-apalis-Make-the-boot-process-more-generic.patch

@@ -0,0 +1,123 @@
+From 42cc2cffb6d550fbb21dad033d2564d4da571015 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
+Date: Sat, 1 Dec 2018 12:46:37 +0100
+Subject: [PATCH] imx6: apalis: Make the boot process more generic
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+I'm preparing support for Apalis imx6 boards in OpenWrt and I've ended
+up with quite huge patchset against upstream U-Boot 2018.03, so I'm
+trying to propose more generic way of boot process handling.
+
+In OpenWrt we usually have kernel, dtbs and U-Boot boot script in boot
+partition with ext4fs, so for some use cases it would be handy to be
+able to replace some of the files in the boot partion, that's why I've
+added write support to the ext4.
+
+I've added `set_blkcnt` environment variable which is needed for every
+`mmc write` command as we need to always specify size in block count.
+This is copy&pasted from official Toradex's flashing scripts, so all the
+credits for this work belongs to them.
+
+Currently the rootfs location is passed via mmcblk number and the
+problem with this approach is that the mmcblk number for the boot device
+changes depending on the kernel version and imx6 SoC type.  In order to
+avoid such issues, use the UUID method to specify the rootfs location.
+
+I've added new boot sequence, where we first try to load and run boot
+script defined in the new `script` variable, so the boot process could
+be more generic and overridden by the distro. When the boot script isn't
+loaded, it will use the previous boot sequence so it should be backward
+compatible.
+
+For the recovery purposes and better end user experience I've added boot
+from SDP as the last boot command if every other boot option fails. I
+plan to use SDP as official flashing/recovery procedure in OpenWrt for
+Apalis imx6 boards.
+
+I've copy&pasted almost everything from the `f086812a mx6sxsabresd: Use
+PARTUUID to specify the rootfs location` commit, so credits for the rest
+of this patch belongs to Fabio.
+
+Cc: Stefan Agner <stefan.agner@toradex.com>
+Cc: Max Krummenacher <max.krummenacher@toradex.com>
+Signed-off-by: Petr Štetiar <ynezz@true.cz>
+---
+ configs/apalis_imx6_defconfig |  2 ++
+ include/configs/apalis_imx6.h | 26 +++++++++++++++++++++-----
+ 2 files changed, 23 insertions(+), 5 deletions(-)
+
+--- a/configs/apalis_imx6_defconfig
++++ b/configs/apalis_imx6_defconfig
+@@ -40,6 +40,7 @@ CONFIG_CMD_DFU=y
+ CONFIG_CMD_GPIO=y
+ CONFIG_CMD_I2C=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_PART=y
+ CONFIG_CMD_USB=y
+ CONFIG_CMD_USB_SDP=y
+ CONFIG_CMD_USB_MASS_STORAGE=y
+@@ -49,6 +50,7 @@ CONFIG_CMD_PING=y
+ CONFIG_CMD_BMP=y
+ CONFIG_CMD_CACHE=y
+ CONFIG_CMD_EXT4=y
++CONFIG_CMD_EXT4_WRITE=y
+ CONFIG_CMD_FAT=y
+ CONFIG_CMD_FS_GENERIC=y
+ CONFIG_ENV_IS_IN_MMC=y
+--- a/include/configs/apalis_imx6.h
++++ b/include/configs/apalis_imx6.h
+@@ -138,9 +138,9 @@
+ 	"imx6q-colibri-cam-eval-v3.dtb fat 0 1"
+ 
+ #define EMMC_BOOTCMD \
+-	"emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext3 " \
++	"emmcargs=ip=off root=PARTUUID=${uuid} rw,noatime rootfstype=ext3 " \
+ 		"rootwait\0" \
+-	"emmcboot=run setup; " \
++	"emmcboot=run setup; run finduuid;" \
+ 		"setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \
+ 		"${vidargs}; echo Booting from internal eMMC chip...; "	\
+ 		"run emmcdtbload; load mmc 0:1 ${kernel_addr_r} " \
+@@ -197,10 +197,17 @@
+ #define FDT_FILE "imx6q-apalis_v1_0-eval.dtb"
+ #endif
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+-	"bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \
++	"script=boot.scr\0" \
++	"finduuid=part uuid mmc 0:2 uuid\0" \
++	"loadbootscript=" \
++		"load mmc 0:1 ${loadaddr} ${script};\0" \
++	"bootscript=echo Running bootscript from mmc ...; " \
++		"source\0" \
++	"bootcmd_default=run emmcboot ; echo ; echo emmcboot failed ; " \
+ 		"run nfsboot ; echo ; echo nfsboot failed ; " \
+ 		"usb start ;" \
+-		"setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \
++		"setenv stdout serial,vga ; setenv stdin serial,usbkbd;" \
++		"sdp 0\0" \
+ 	"boot_file=uImage\0" \
+ 	"console=ttymxc0\0" \
+ 	"defargs=enable_wait_mode=off vmalloc=400M\0" \
+@@ -228,7 +235,16 @@
+ 	"vidargs=mxc_hdmi.only_cea=1 " \
+ 		"video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24 " \
+ 		"video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off " \
+-		"fbmem=32M\0 "
++		"fbmem=32M\0 " \
++	"set_blkcnt=setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200\0"
++
++#define CONFIG_BOOTCOMMAND \
++	   "mmc dev 0;" \
++	   "if run loadbootscript; then " \
++		   "run bootscript; " \
++	   "else " \
++		   "run bootcmd_default; " \
++	   "fi; "
+ 
+ /* Miscellaneous configurable options */
+ #undef CONFIG_SYS_CBSIZE
+-- 
+1.9.1
+

package/boot/uboot-imx6/patches/100-wandboard-enable-fit.patch

@@ -1,6 +1,6 @@
 --- a/configs/wandboard_defconfig
 +++ b/configs/wandboard_defconfig
-@@ -27,7 +27,7 @@ CONFIG_CMD_I2C=y
+@@ -30,7 +30,7 @@ CONFIG_CMD_I2C=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_SATA=y
  CONFIG_CMD_USB=y
@@ -8,8 +8,8 @@
 +# CONFIG_CMD_CACHE is not set
  CONFIG_CMD_EXT4_WRITE=y
  CONFIG_ENV_IS_IN_MMC=y
- CONFIG_DM=y
-@@ -39,3 +39,5 @@ CONFIG_USB_STORAGE=y
+ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+@@ -44,3 +44,5 @@ CONFIG_USB=y
  CONFIG_VIDEO=y
  # CONFIG_VIDEO_SW_CURSOR is not set
  CONFIG_OF_LIBFDT=y

package/boot/uboot-imx6/patches/110-mx6cuboxi-mmc-fallback.patch

@@ -1,7 +1,7 @@
 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
 +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
-@@ -334,6 +334,12 @@ int board_init(void)
- 	return ret;
+@@ -290,6 +290,12 @@ static void setup_iomux_enet(void)
+ 	udelay(100);
  }
  
 +void board_boot_order(u32 *spl_boot_list)
@@ -10,12 +10,12 @@
 +	spl_boot_list[1] = BOOT_DEVICE_MMC1;
 +}
 +
- static bool is_hummingboard(void)
+ int board_phy_config(struct phy_device *phydev)
  {
- 	int val1, val2;
+ 	if (phydev->drv->config)
 --- a/arch/arm/mach-imx/spl.c
 +++ b/arch/arm/mach-imx/spl.c
-@@ -136,7 +136,7 @@ int g_dnl_bind_fixup(struct usb_device_d
+@@ -176,7 +176,7 @@ int g_dnl_bind_fixup(struct usb_device_d
  /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
  u32 spl_boot_mode(const u32 boot_device)
  {

package/boot/uboot-kirkwood/Makefile

@@ -7,10 +7,10 @@
 
 include $(TOPDIR)/rules.mk
 
-PKG_VERSION:=2018.03
+PKG_VERSION:=2019.01
 PKG_RELEASE:=1
 
-PKG_HASH:=7e7477534409d5368eb1371ffde6820f0f79780a1a1f676161c48442cb303dfd
+PKG_HASH:=50bd7e5a466ab828914d080d5f6a432345b500e8fba1ad3b7b61e95e60d51c22
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk

package/boot/uboot-kirkwood/patches/007-nsa310-uboot-generic.patch

@@ -35,14 +35,14 @@ NOTE: this patch is ready for upstream, LEDE-specific parts are in
  config TARGET_NSA310S
  	bool "Zyxel NSA310S"
 
-@@ -80,6 +83,7 @@ source "board/raidsonic/ib62x0/Kconfig"
+@@ -86,6 +89,7 @@ source "board/raidsonic/ib62x0/Kconfig"
  source "board/Seagate/dockstar/Kconfig"
  source "board/Seagate/goflexhome/Kconfig"
  source "board/Seagate/nas220/Kconfig"
 +source "board/zyxel/nsa310/Kconfig"
  source "board/zyxel/nsa310s/Kconfig"
-
- endif
+ source "board/alliedtelesis/SBx81LIFKW/Kconfig"
+ source "board/alliedtelesis/SBx81LIFXCAT/Kconfig"
 --- /dev/null
 +++ b/board/zyxel/nsa310/Kconfig
 @@ -0,0 +1,12 @@
@@ -505,16 +505,19 @@ NOTE: this patch is ready for upstream, LEDE-specific parts are in
 +#endif /* __NSA310_H */
 --- /dev/null
 +++ b/configs/nsa310_defconfig
-@@ -0,0 +1,37 @@
+@@ -0,0 +1,40 @@
 +CONFIG_ARM=y
 +CONFIG_KIRKWOOD=y
 +CONFIG_SYS_TEXT_BASE=0x600000
 +CONFIG_TARGET_NSA310=y
 +CONFIG_IDENT_STRING="\nZyXEL NSA310 1-Bay Power Media Server"
++CONFIG_NR_DRAM_BANKS=2
 +CONFIG_BOOTDELAY=3
 +CONFIG_SYS_PROMPT="NSA310> "
 +# CONFIG_CMD_IMLS is not set
 +# CONFIG_CMD_FLASH is not set
++CONFIG_MVGBE=y
++CONFIG_MII=y
 +CONFIG_SYS_NS16550=y
 +CONFIG_CMD_FDT=y
 +CONFIG_OF_LIBFDT=y
@@ -545,7 +548,7 @@ NOTE: this patch is ready for upstream, LEDE-specific parts are in
 +CONFIG_SYS_LONGHELP=y
 --- /dev/null
 +++ b/include/configs/nsa310.h
-@@ -0,0 +1,119 @@
+@@ -0,0 +1,117 @@
 +/* Copyright (C) 2015-2016 bodhi <mibodhi@gmail.com>
 + *
 + * Based on
@@ -654,8 +657,6 @@ NOTE: this patch is ready for upstream, LEDE-specific parts are in
 + */
 +#define CONFIG_JFFS2_NAND
 +#define CONFIG_JFFS2_LZO
-+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
-+#define CONFIG_MTD_PARTITIONS
 +
 +/*
 + *  Date Time

package/boot/uboot-kirkwood/patches/008-nsa325-uboot-generic.patch

@@ -1,22 +1,23 @@
 --- a/arch/arm/mach-kirkwood/Kconfig
 +++ b/arch/arm/mach-kirkwood/Kconfig
-@@ -62,6 +62,9 @@ config TARGET_NSA310
- config TARGET_NSA310S
- 	bool "Zyxel NSA310S"
-
+@@ -68,6 +68,9 @@ config TARGET_SBx81LIFKW
+ config TARGET_SBx81LIFXCAT
+ 	bool "Allied Telesis SBx81GP24/SBx81GT24"
+ 
 +config TARGET_NSA325
 +	bool "Zyxel NSA325 board"
 +
  endchoice
-
+ 
  config SYS_SOC
-@@ -85,5 +88,6 @@ source "board/Seagate/goflexhome/Kconfig
+@@ -91,6 +94,7 @@ source "board/Seagate/goflexhome/Kconfig
  source "board/Seagate/nas220/Kconfig"
  source "board/zyxel/nsa310/Kconfig"
  source "board/zyxel/nsa310s/Kconfig"
 +source "board/zyxel/nsa325/Kconfig"
-
- endif
+ source "board/alliedtelesis/SBx81LIFKW/Kconfig"
+ source "board/alliedtelesis/SBx81LIFXCAT/Kconfig"
+ 
 --- /dev/null
 +++ b/board/zyxel/nsa325/Kconfig
 @@ -0,0 +1,12 @@
@@ -488,16 +489,19 @@
 +#endif /* __NSA325_H */
 --- /dev/null
 +++ b/configs/nsa325_defconfig
-@@ -0,0 +1,37 @@
+@@ -0,0 +1,40 @@
 +CONFIG_ARM=y
 +CONFIG_KIRKWOOD=y
 +CONFIG_SYS_TEXT_BASE=0x600000
 +CONFIG_TARGET_NSA325=y
 +CONFIG_IDENT_STRING="\nZyXEL NSA325 2-Bay Power Media Server"
++CONFIG_NR_DRAM_BANKS=2
 +CONFIG_BOOTDELAY=3
 +CONFIG_SYS_PROMPT="NSA325> "
 +# CONFIG_CMD_IMLS is not set
 +# CONFIG_CMD_FLASH is not set
++CONFIG_MVGBE=y
++CONFIG_MII=y
 +CONFIG_SYS_NS16550=y
 +CONFIG_CMD_FDT=y
 +CONFIG_OF_LIBFDT=y
@@ -528,7 +532,7 @@
 +CONFIG_SYS_LONGHELP=y
 --- /dev/null
 +++ b/include/configs/nsa325.h
-@@ -0,0 +1,122 @@
+@@ -0,0 +1,120 @@
 +/*
 + * (C) Copyright 2016 bodhi <mibodhi@gmail.com>
 + *
@@ -638,8 +642,6 @@
 + */
 +#define CONFIG_JFFS2_NAND
 +#define CONFIG_JFFS2_LZO
-+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
-+#define CONFIG_MTD_PARTITIONS
 +
 +/*
 + *  Date Time

package/boot/uboot-kirkwood/patches/010-pogoplug_v4.patch

@@ -10,7 +10,7 @@
  config TARGET_DNS325
  	bool "dns325 Board"
 
-@@ -77,6 +80,7 @@ source "board/Marvell/guruplug/Kconfig"
+@@ -83,6 +86,7 @@ source "board/Marvell/guruplug/Kconfig"
  source "board/Marvell/sheevaplug/Kconfig"
  source "board/buffalo/lsxl/Kconfig"
  source "board/cloudengines/pogo_e02/Kconfig"
@@ -20,7 +20,7 @@
  source "board/keymile/km_arm/Kconfig"
 --- a/arch/arm/mach-kirkwood/include/mach/kw88f6192.h
 +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6192.h
-@@ -16,6 +16,6 @@
+@@ -15,6 +15,6 @@
  #define KW_REGS_PHY_BASE		KW88F6192_REGS_PHYS_BASE
 
  /* TCLK Core Clock defination */
@@ -30,7 +30,7 @@
  #endif /* _CONFIG_KW88F6192_H */
 --- a/arch/arm/mach-kirkwood/include/mach/mpp.h
 +++ b/arch/arm/mach-kirkwood/include/mach/mpp.h
-@@ -217,10 +217,12 @@
+@@ -216,10 +216,12 @@
  #define MPP33_GPIO		MPP( 33, 0x0, 1, 1, 0,   1,   1,   1    )
  #define MPP33_TDM_DTX		MPP( 33, 0x2, 0, 1, 0,   0,   1,   1    )
  #define MPP33_GE1_13		MPP( 33, 0x3, 0, 0, 0,   1,   1,   1    )
@@ -532,16 +532,19 @@
 +#endif /* __POGOPLUGV4_H */
 --- /dev/null
 +++ b/configs/pogoplugv4_defconfig
-@@ -0,0 +1,40 @@
+@@ -0,0 +1,43 @@
 +CONFIG_ARM=y
 +CONFIG_KIRKWOOD=y
 +CONFIG_SYS_TEXT_BASE=0x600000
 +CONFIG_TARGET_POGOPLUGV4=y
 +CONFIG_SYS_PROMPT="pogoplugv4> "
 +CONFIG_IDENT_STRING="\nPogoplug V4"
++CONFIG_NR_DRAM_BANKS=2
 +CONFIG_BOOTDELAY=3
 +# CONFIG_CMD_IMLS is not set
 +# CONFIG_CMD_FLASH is not set
++CONFIG_MVGBE=y
++CONFIG_MII=y
 +CONFIG_SYS_NS16550=y
 +CONFIG_CMD_FDT=y
 +CONFIG_OF_LIBFDT=y
@@ -575,7 +578,7 @@
 +CONFIG_SYS_LONGHELP=y
 --- a/drivers/gpio/kw_gpio.c
 +++ b/drivers/gpio/kw_gpio.c
-@@ -148,3 +148,36 @@ void kw_gpio_set_blink(unsigned pin, int
+@@ -147,3 +147,36 @@ void kw_gpio_set_blink(unsigned pin, int
  	/* Set blinking. */
  	__set_blinking(pin, blink);
  }
@@ -621,7 +624,7 @@
 +obj-$(CONFIG_KIRKWOOD_MMC)		+= kirkwood_mmc.o
 
  obj-$(CONFIG_MMC_SUNXI)			+= sunxi_mmc.o
- obj-$(CONFIG_MMC_UNIPHIER)		+= uniphier-sd.o
+ obj-$(CONFIG_MMC_UNIPHIER)		+= tmio-common.o uniphier-sd.o
 --- /dev/null
 +++ b/drivers/mmc/kirkwood_mmc.c
 @@ -0,0 +1,482 @@
@@ -1109,8 +1112,8 @@
 +}
 --- a/include/configs/mv-common.h
 +++ b/include/configs/mv-common.h
-@@ -117,4 +117,10 @@
- #define CONFIG_MTD_PARTITIONS
+@@ -77,4 +77,10 @@
+ #define CONFIG_SYS_MAX_NAND_DEVICE     1
  #endif
 
 +/*
@@ -1122,7 +1125,7 @@
  #endif /* _MV_COMMON_H */
 --- /dev/null
 +++ b/include/configs/pogoplugv4.h
-@@ -0,0 +1,129 @@
+@@ -0,0 +1,127 @@
 +/*
 + * Copyright (C) 2014-2016 bodhi <mibodhi@gmail.com>
 + * Based on
@@ -1229,8 +1232,6 @@
 + */
 +#define CONFIG_JFFS2_NAND
 +#define CONFIG_JFFS2_LZO
-+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
-+#define CONFIG_MTD_PARTITIONS
 +
 +/*
 + * SATA

package/boot/uboot-kirkwood/patches/110-dockstar.patch

@@ -1,6 +1,6 @@
 --- a/include/configs/dockstar.h
 +++ b/include/configs/dockstar.h
-@@ -18,6 +18,7 @@
+@@ -17,6 +17,7 @@
  #define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
  #define CONFIG_KW88F6281	1	/* SOC Name */
  #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
@@ -8,7 +8,7 @@
 
  /*
   * mv-common.h should be defined after CMD configs since it used them
-@@ -36,27 +37,22 @@
+@@ -35,27 +36,22 @@
   * it has to be rounded to sector size
   */
  #define CONFIG_ENV_SIZE			0x20000	/* 128k */
@@ -46,12 +46,12 @@
   * Ethernet Driver configuration
 --- a/configs/dockstar_defconfig
 +++ b/configs/dockstar_defconfig
-@@ -16,7 +16,7 @@ CONFIG_CMD_PING=y
- CONFIG_CMD_EXT2=y
+@@ -18,7 +18,7 @@ CONFIG_CMD_PING=y
  CONFIG_CMD_FAT=y
  CONFIG_CMD_JFFS2=y
+ CONFIG_CMD_MTDPARTS=y
 -CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),-(root)"
 +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)"
  CONFIG_CMD_UBI=y
  CONFIG_ISO_PARTITION=y
- CONFIG_ENV_IS_IN_NAND=y
+ CONFIG_OF_CONTROL=y

package/boot/uboot-kirkwood/patches/120-iconnect.patch

@@ -1,6 +1,6 @@
 --- a/include/configs/iconnect.h
 +++ b/include/configs/iconnect.h
-@@ -44,24 +44,22 @@
+@@ -42,24 +42,22 @@
  #define CONFIG_ENV_SECT_SIZE	0x20000
  #endif
  #define CONFIG_ENV_SIZE		0x20000
@@ -32,7 +32,7 @@
   * Ethernet driver configuration
 --- a/configs/iconnect_defconfig
 +++ b/configs/iconnect_defconfig
-@@ -10,12 +10,13 @@ CONFIG_SYS_PROMPT="iconnect => "
+@@ -11,13 +11,14 @@ CONFIG_SYS_PROMPT="iconnect => "
  CONFIG_CMD_NAND=y
  CONFIG_CMD_USB=y
  # CONFIG_CMD_SETEXPR is not set
@@ -42,8 +42,9 @@
  CONFIG_CMD_EXT2=y
  CONFIG_CMD_FAT=y
  CONFIG_CMD_JFFS2=y
+ CONFIG_CMD_MTDPARTS=y
 -CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x80000@0x0(uboot),0x20000@0x80000(uboot_env),-@0xa0000(rootfs)"
 +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)"
  CONFIG_CMD_UBI=y
  CONFIG_ISO_PARTITION=y
- CONFIG_ENV_IS_IN_NAND=y
+ CONFIG_OF_CONTROL=y

package/boot/uboot-kirkwood/patches/130-ib62x0.patch

@@ -1,6 +1,6 @@
 --- a/include/configs/ib62x0.h
 +++ b/include/configs/ib62x0.h
-@@ -49,21 +49,15 @@
+@@ -47,21 +47,15 @@
   */
  #define CONFIG_BOOTCOMMAND \
  	"setenv bootargs ${console} ${mtdparts} ${bootargs_root}; "	\
@@ -29,12 +29,12 @@
   * Ethernet driver configuration
 --- a/configs/ib62x0_defconfig
 +++ b/configs/ib62x0_defconfig
-@@ -19,7 +19,7 @@ CONFIG_CMD_PING=y
- CONFIG_CMD_EXT2=y
+@@ -21,7 +21,7 @@ CONFIG_CMD_PING=y
  CONFIG_CMD_FAT=y
  CONFIG_CMD_JFFS2=y
+ CONFIG_CMD_MTDPARTS=y
 -CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),-@0x100000(root)"
 +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)"
  CONFIG_CMD_UBI=y
  CONFIG_ISO_PARTITION=y
- CONFIG_ENV_IS_IN_NAND=y
+ CONFIG_OF_CONTROL=y

package/boot/uboot-kirkwood/patches/140-pogoplug_e02.patch

@@ -1,6 +1,6 @@
 --- a/include/configs/pogo_e02.h
 +++ b/include/configs/pogo_e02.h
-@@ -44,23 +44,23 @@
+@@ -42,23 +42,23 @@
  #endif
 
  #define CONFIG_ENV_SIZE			0x20000	/* 128k */
@@ -36,11 +36,11 @@
   * Ethernet Driver configuration
 --- a/configs/pogo_e02_defconfig
 +++ b/configs/pogo_e02_defconfig
-@@ -16,6 +16,7 @@ CONFIG_CMD_PING=y
- CONFIG_CMD_EXT2=y
+@@ -18,6 +18,7 @@ CONFIG_CMD_PING=y
  CONFIG_CMD_FAT=y
  CONFIG_CMD_JFFS2=y
+ CONFIG_CMD_MTDPARTS=y
 +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)"
  CONFIG_CMD_UBI=y
  CONFIG_ISO_PARTITION=y
- CONFIG_ENV_IS_IN_NAND=y
+ CONFIG_OF_CONTROL=y

package/boot/uboot-kirkwood/patches/150-goflexhome.patch

@@ -1,6 +1,6 @@
 --- a/include/configs/goflexhome.h
 +++ b/include/configs/goflexhome.h
-@@ -69,17 +69,15 @@
+@@ -66,17 +66,15 @@
   */
  #define CONFIG_BOOTCOMMAND \
  	"setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \
@@ -24,12 +24,12 @@
   * Ethernet Driver configuration
 --- a/configs/goflexhome_defconfig
 +++ b/configs/goflexhome_defconfig
-@@ -21,7 +21,7 @@ CONFIG_CMD_EXT4=y
- CONFIG_CMD_FAT=y
+@@ -23,7 +23,7 @@ CONFIG_CMD_EXT4=y
  CONFIG_CMD_JFFS2=y
+ CONFIG_CMD_MTDPARTS=y
  CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
 -CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),6M(uImage),-(root)"
 +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),255m(ubi)"
  CONFIG_CMD_UBI=y
  CONFIG_ISO_PARTITION=y
- CONFIG_ENV_IS_IN_NAND=y
+ CONFIG_OF_CONTROL=y

package/boot/uboot-kirkwood/patches/200-openwrt-config.patch

@@ -1,8 +1,8 @@
 --- a/arch/arm/mach-kirkwood/Kconfig
 +++ b/arch/arm/mach-kirkwood/Kconfig
-@@ -94,4 +94,7 @@ source "board/zyxel/nsa310/Kconfig"
- source "board/zyxel/nsa310s/Kconfig"
- source "board/zyxel/nsa325/Kconfig"
+@@ -102,4 +102,7 @@ source "board/zyxel/nsa310/Kconfig"
+ source "board/alliedtelesis/SBx81LIFKW/Kconfig"
+ source "board/alliedtelesis/SBx81LIFXCAT/Kconfig"
  
 +config SECOND_STAGE
 +	bool "OpenWrt second stage hack"
@@ -10,16 +10,16 @@
  endif
 --- a/include/configs/dockstar.h
 +++ b/include/configs/dockstar.h
-@@ -68,4 +68,6 @@
- #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
- #define CONFIG_MTD_PARTITIONS
+@@ -65,4 +65,6 @@
+  * File system
+  */
  
 +#include "openwrt-kirkwood-common.h"
 +
  #endif /* _CONFIG_DOCKSTAR_H */
 --- a/include/configs/ib62x0.h
 +++ b/include/configs/ib62x0.h
-@@ -87,4 +87,6 @@
+@@ -85,4 +85,6 @@
  #define CONFIG_RTC_MV
  #endif /* CONFIG_CMD_DATE */
  
@@ -28,9 +28,9 @@
  #endif /* _CONFIG_IB62x0_H */
 --- a/include/configs/iconnect.h
 +++ b/include/configs/iconnect.h
-@@ -76,4 +76,6 @@
- #define CONFIG_MTD_DEVICE
- #define CONFIG_MTD_PARTITIONS
+@@ -72,4 +72,6 @@
+  * File system
+  */
  
 +#include "openwrt-kirkwood-common.h"
 +
@@ -71,25 +71,25 @@
 +#endif /* __OPENWRT_KIRKWOOD_COMMON_H */
 --- a/include/configs/pogo_e02.h
 +++ b/include/configs/pogo_e02.h
-@@ -76,4 +76,6 @@
- #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
- #define CONFIG_MTD_PARTITIONS
+@@ -72,4 +72,6 @@
+  * File system
+  */
  
 +#include "openwrt-kirkwood-common.h"
 +
  #endif /* _CONFIG_POGO_E02_H */
 --- a/include/configs/goflexhome.h
 +++ b/include/configs/goflexhome.h
-@@ -101,4 +101,6 @@
- #define CONFIG_RTC_MV
- #endif /* CONFIG_CMD_DATE */
+@@ -91,4 +91,6 @@
+ #define CONFIG_SYS_ATA_IDE0_OFFSET      MV_SATA_PORT0_OFFSET
+ #endif /*CONFIG_MVSATA_IDE*/
  
 +#include "openwrt-kirkwood-common.h"
 +
  #endif /* _CONFIG_GOFLEXHOME_H */
 --- a/include/configs/nsa310.h
 +++ b/include/configs/nsa310.h
-@@ -116,4 +116,6 @@
+@@ -114,4 +114,6 @@
  #define CONFIG_RTC_MV
  #endif /* CONFIG_CMD_DATE */
  
@@ -98,10 +98,10 @@
  #endif /* _CONFIG_NSA310_H */
 --- a/configs/dockstar_defconfig
 +++ b/configs/dockstar_defconfig
-@@ -26,3 +26,8 @@ CONFIG_USB=y
+@@ -31,3 +31,8 @@ CONFIG_USB=y
+ CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_STORAGE=y
- CONFIG_OF_LIBFDT=y
 +CONFIG_CMD_BOOTZ=y
 +CONFIG_FIT=y
 +CONFIG_FIT_VERBOSE=y
@@ -109,10 +109,10 @@
 +CONFIG_LZO=y
 --- a/configs/goflexhome_defconfig
 +++ b/configs/goflexhome_defconfig
-@@ -32,3 +32,8 @@ CONFIG_USB=y
+@@ -40,3 +40,8 @@ CONFIG_USB=y
+ CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_STORAGE=y
- CONFIG_OF_LIBFDT=y
 +CONFIG_CMD_BOOTZ=y
 +CONFIG_FIT=y
 +CONFIG_FIT_VERBOSE=y
@@ -120,24 +120,22 @@
 +CONFIG_LZO=y
 --- a/configs/ib62x0_defconfig
 +++ b/configs/ib62x0_defconfig
-@@ -29,5 +29,8 @@ CONFIG_SYS_NS16550=y
+@@ -35,4 +35,7 @@ CONFIG_SYS_NS16550=y
  CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_STORAGE=y
 -CONFIG_LZMA=y
- CONFIG_OF_LIBFDT=y
 +CONFIG_FIT=y
 +CONFIG_FIT_VERBOSE=y
 +CONFIG_LZMA=y
 +CONFIG_LZO=y
 --- a/configs/iconnect_defconfig
 +++ b/configs/iconnect_defconfig
-@@ -25,5 +25,9 @@ CONFIG_SYS_NS16550=y
+@@ -31,4 +31,8 @@ CONFIG_SYS_NS16550=y
  CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_STORAGE=y
 -CONFIG_LZMA=y
- CONFIG_OF_LIBFDT=y
 +CONFIG_CMD_BOOTZ=y
 +CONFIG_FIT=y
 +CONFIG_FIT_VERBOSE=y
@@ -145,7 +143,7 @@
 +CONFIG_LZO=y
 --- a/configs/nsa310_defconfig
 +++ b/configs/nsa310_defconfig
-@@ -32,6 +32,9 @@ CONFIG_CMD_UBI=y
+@@ -35,6 +35,9 @@ CONFIG_CMD_UBI=y
  CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_STORAGE=y
@@ -157,10 +155,10 @@
  CONFIG_SYS_LONGHELP=y
 --- a/configs/pogo_e02_defconfig
 +++ b/configs/pogo_e02_defconfig
-@@ -26,3 +26,8 @@ CONFIG_USB=y
+@@ -31,3 +31,8 @@ CONFIG_USB=y
+ CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_STORAGE=y
- CONFIG_OF_LIBFDT=y
 +CONFIG_CMD_BOOTZ=y
 +CONFIG_FIT=y
 +CONFIG_FIT_VERBOSE=y

package/boot/uboot-layerscape-armv8_32b/Makefile

@@ -1,84 +0,0 @@
-#
-# Copyright (C) 2016 Jiang Yutang <jiangyutang1978@gmail.com>
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-include $(TOPDIR)/rules.mk
-
-PKG_NAME:=uboot-layerscape-armv8_32b
-PKG_VERSION:=lsdk-1806
-PKG_RELEASE:=1
-
-# Layerscape ARMv8 platforms use 64-bit u-boot to support both 32-bit and 64-bit
-# kernel/rootfs. Since OpenWrt could only provide 32-bit toolchain for 32-bit targets,
-# 64-bit u-boot images git tree is provided here whose source code actually is
-# uboot-layerscape's source code.
-PKG_SOURCE_PROTO:=git
-PKG_SOURCE_URL:=https://github.com/yangbolu1991/u-boot-lede.git
-PKG_SOURCE_VERSION:=a2a01facee0918bf724b4f0aec6746e2f1271519
-PKG_MIRROR_HASH:=5fcb58c14cdc934793ff315e178ad1d9d2ff55fcaac394b48ec116d1b11ca324
-
-include $(INCLUDE_DIR)/package.mk
-
-define Package/uboot-layerscape-armv8_32b/Config
-  define Package/u-boot-$(1)-image
-    SECTION:=boot
-    CATEGORY:=Boot Loaders
-    TITLE:=$(2)
-    DEPENDS:=@TARGET_layerscape_armv8_32b
-    CONFIG:=$(3)
-    ENV_SIZE:=$(4)
-  endef
-endef
-
-define Package/uboot-layerscape-armv8_32b/ls1012ardb
-  TITLE:=U-Boot image for NXP LS1012ARDB
-  CONFIG:=ls1012ardb-uboot.bin
-  ENV_SIZE:=0x40000
-endef
-
-define Package/uboot-layerscape-armv8_32b/ls1012afrwy
-  TITLE:=U-Boot image for NXP LS1012FRWY
-  CONFIG:=ls1012afrwy-uboot.bin
-  ENV_SIZE:=0x10000
-endef
-
-define Package/uboot-layerscape-armv8_32b/ls1043ardb
-  TITLE:=U-Boot image for NXP LS1043ARDB
-  CONFIG:=ls1043ardb-uboot.bin
-  ENV_SIZE:=0x20000
-endef
-
-define Package/uboot-layerscape-armv8_32b/ls1046ardb
-  TITLE:=U-Boot image for NXP LS1046ARDB
-  CONFIG:=ls1046ardb-uboot.bin
-  ENV_SIZE:=0x2000
-endef
-
-define Build/Compile
-endef
-
-define Package/uboot-layerscape-armv8_32b/Install
-  define Package/u-boot-$(1)-image/install
-	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
-	$(CP) $(PKG_BUILD_DIR)/$(CONFIG) $(STAGING_DIR_IMAGE)/
-	$(PKG_BUILD_DIR)/tools/mkenvimage -s $(ENV_SIZE) \
-		-o $(STAGING_DIR_IMAGE)/$(1)-uboot-env.bin \
-		../uboot-layerscape/files/$(1)-uEnv.txt
-  endef
-endef
-
-UBOOTS := \
-  ls1012ardb \
-  ls1012afrwy \
-  ls1043ardb \
-  ls1046ardb
-
-$(foreach u,$(UBOOTS), \
-	$(eval $(Package/uboot-layerscape-armv8_32b/$(u))) \
-	$(eval $(call Package/uboot-layerscape-armv8_32b/Config,$(u),$(TITLE),$(CONFIG),$(ENV_SIZE))) \
-	$(eval $(call Package/uboot-layerscape-armv8_32b/Install,$(u))) \
-	$(eval $(call BuildPackage,u-boot-$(u)-image)) \
-)

package/boot/uboot-layerscape/Makefile

@@ -8,13 +8,13 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=uboot-layerscape
-PKG_VERSION:=lsdk-1806
+PKG_VERSION:=lsdk-1903
 PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot
-PKG_SOURCE_VERSION:=b3f98d438eefd1b355efdec0b50af5813ff8d0e1
-PKG_MIRROR_HASH:=59e35957055658e7fdefb16b92f954356985a8191942d93f254861c75c47b32b
+PKG_SOURCE_VERSION:=80b2d2bc4cab0a8363c9b7eba8064b1795f12670
+PKG_MIRROR_HASH:=5c467af40b4479f0ea16697ab54602bed815a23212293184943dca8a3a406d5c
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk
@@ -29,52 +29,52 @@ endef
 
 define U-Boot/ls1012ardb
   NAME:=NXP LS1012ARDB
-  UBOOT_CONFIG:=ls1012ardb_qspi
+  UBOOT_CONFIG:=ls1012ardb_tfa
   ENV_SIZE:=0x40000
 endef
 
 define U-Boot/ls1012afrwy
   NAME:=NXP LS1012AFRWY
-  UBOOT_CONFIG:=ls1012afrwy_qspi
+  UBOOT_CONFIG:=ls1012afrwy_tfa
   ENV_SIZE:=0x10000
 endef
 
 define U-Boot/ls1043ardb
   NAME:=NXP LS1043ARDB
-  ENV_SIZE:=0x20000
+  UBOOT_CONFIG:=ls1043ardb_tfa
 endef
 
 define U-Boot/ls1043ardb-sdboot
   NAME:=NXP LS1043ARDB SD Card Boot
-  UBOOT_CONFIG:=ls1043ardb_sdcard
-  UBOOT_IMAGE:=u-boot-with-spl-pbl.bin
+  UBOOT_CONFIG:=ls1043ardb_tfa
 endef
 
+
 define U-Boot/ls1046ardb
   NAME:=NXP LS1046ARDB
-  UBOOT_CONFIG:=ls1046ardb_qspi
+  UBOOT_CONFIG:=ls1046ardb_tfa
 endef
 
 define U-Boot/ls1046ardb-sdboot
   NAME:=NXP LS1046ARDB SD Card Boot
-  UBOOT_CONFIG:=ls1046ardb_sdcard
-  UBOOT_IMAGE:=u-boot-with-spl-pbl.bin
+  UBOOT_CONFIG:=ls1046ardb_tfa
 endef
 
+
 define U-Boot/ls1088ardb
   NAME:=NXP LS1088ARDB
-  UBOOT_CONFIG:=ls1088ardb_qspi
+  UBOOT_CONFIG:=ls1088ardb_tfa
 endef
 
+
 define U-Boot/ls1088ardb-sdboot
   NAME:=NXP LS1088ARDB SD Card Boot
-  UBOOT_CONFIG:=ls1088ardb_sdcard_qspi
-  UBOOT_IMAGE:=u-boot-with-spl.bin
+  UBOOT_CONFIG:=ls1088ardb_tfa
 endef
 
 define U-Boot/ls2088ardb
   NAME:=NXP LS2088ARDB
-  UBOOT_CONFIG:=ls2080ardb
+  UBOOT_CONFIG:=ls2088ardb_tfa
 endef
 
 define U-Boot/ls1021atwr

package/boot/uboot-layerscape/files/ls1012ardb-uEnv.txt

@@ -3,6 +3,6 @@ loadaddr=0x81000000
 fdt_high=0xffffffffffffffff
 initrd_high=0xffffffffffffffff
 qspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr
-bootargs=ubi.mtd=9 root=ubi0:rootfs rw rootfstype=ubifs noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=1550000.quadspi:1m(rcw),2m(u-boot),1m(u-boot-env),2m(ppa),4m(reserved-1),3m(pfe),2m(reserved-2),1m(dtb),16m(kernel),32m(ubifs)
+bootargs=ubi.mtd=8 root=ubi0:rootfs rw rootfstype=ubifs noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=1550000.quadspi:1m(bl2),4m(fip),1m(u-boot-env),4m(reserved-1),3m(pfe),2m(reserved-2),1m(dtb),16m(kernel),32m(ubifs)
 bootcmd=echo starting openwrt ...;pfe stop;run qspi_boot
 bootdelay=3

package/boot/uboot-layerscape/files/ls1043ardb-uEnv.txt

@@ -4,6 +4,6 @@ fdt_high=0xffffffffffffffff
 initrd_high=0xffffffffffffffff
 hwconfig=fsl_ddr:bank_intlv=auto
 nor_boot=cp.b 60f00000 $fdtaddr 100000;cp.b 61000000 $loadaddr 1000000;bootm $loadaddr - $fdtaddr
-bootargs=root=/dev/mtdblock9 rootfstype=squashfs,jffs2 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=60000000.nor:1m(rcw),2m(u-boot),1m(u-boot-env),2m(ppa),3m(reserved-1),256k(fman),5888k(reserved-2),1m(dtb),16m(kernel),32m(rootfs)
+bootargs=root=/dev/mtdblock8 rootfstype=squashfs,jffs2 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=60000000.nor:1m(bl2),4m(fip),1m(u-boot-env),3m(reserved-1),256k(fman),5888k(reserved-2),1m(dtb),16m(kernel),32m(rootfs)
 bootcmd=echo starting openwrt ...;run nor_boot
 bootdelay=3

package/boot/uboot-layerscape/files/ls1046ardb-uEnv.txt

@@ -4,6 +4,6 @@ fdt_high=0xffffffffffffffff
 initrd_high=0xffffffffffffffff
 hwconfig=fsl_ddr:bank_intlv=auto
 qspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr
-bootargs=ubi.mtd=10 root=ubi0:rootfs rw rootfstype=ubifs noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=1550000.quadspi:1m(rcw),2m(u-boot),1m(u-boot-env),2m(ppa),3m(reserved-1),256k(fman),5888k(reserved-2),1m(dtb),16m(kernel),32m(ubifs)
+bootargs=ubi.mtd=9 root=ubi0:rootfs rw rootfstype=ubifs noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=1550000.quadspi:1m(bl2),4m(fip),1m(u-boot-env),3m(reserved-1),256k(fman),5888k(reserved-2),1m(dtb),16m(kernel),32m(ubifs)
 bootcmd=echo starting openwrt ...;run qspi_boot
 bootdelay=3

package/boot/uboot-layerscape/files/ls1088ardb-uEnv.txt

@@ -5,6 +5,6 @@ initrd_high=0xffffffffffffffff
 hwconfig=fsl_ddr:bank_intlv=auto
 mc_init=sf probe 0:0;sf read 80000000 a00000 300000;sf read 80300000 e00000 100000;fsl_mc start mc 80000000 80300000;sf read 80400000 d00000 100000;fsl_mc apply dpl 80400000
 qspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr
-bootargs=ubi.mtd=11 root=ubi0:rootfs rw rootfstype=ubifs noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=20c0000.quadspi:1m(rcw),2m(u-boot),1m(u-boot-env),2m(ppa),4m(reserved-1),3m(mc),1m(dpl),1m(dpc),1m(dtb),16m(kernel),32m(ubifs)
+bootargs=ubi.mtd=10 root=ubi0:rootfs rw rootfstype=ubifs noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=20c0000.quadspi:1m(bl2),4m(fip),1m(u-boot-env),4m(reserved-1),3m(mc),1m(dpl),1m(dpc),1m(dtb),16m(kernel),32m(ubifs)
 bootcmd=echo starting openwrt ...;run mc_init;run qspi_boot
 bootdelay=3

package/boot/uboot-layerscape/files/ls2088ardb-uEnv.txt

@@ -5,6 +5,6 @@ initrd_high=0xffffffffffffffff
 hwconfig=fsl_ddr:bank_intlv=auto
 mc_init=fsl_mc start mc 580a00000 580e00000;fsl_mc apply dpl 580d00000
 nor_boot=cp.b 580f00000 $fdtaddr 100000;cp.b 581000000 $loadaddr 1000000;bootm $loadaddr - $fdtaddr
-bootargs=root=/dev/mtdblock10 rootfstype=squashfs,jffs2 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS1,115200 mtdparts=580000000.nor:1m(rcw),2m(u-boot),1m(u-boot-env),2m(ppa),4m(reserved-1),3m(mc),1m(dpl),1m(dpc),1m(dtb),16m(kernel),32m(rootfs)
+bootargs=root=/dev/mtdblock9 rootfstype=squashfs,jffs2 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS1,115200 mtdparts=580000000.nor:1m(bl2),4m(fip),1m(u-boot-env),4m(reserved-1),3m(mc),1m(dpl),1m(dpc),1m(dtb),16m(kernel),32m(rootfs)
 bootcmd=echo starting openwrt ...;run mc_init;run nor_boot
 bootdelay=3

package/boot/uboot-layerscape/patches/0001-modify-macro-QSPI_NOR_BOOTCOMMAND-of-ls1046ardb-for-.patch

@@ -0,0 +1,28 @@
+From 51f860f8293d834497c6f7f810fa4650cd82f9ac Mon Sep 17 00:00:00 2001
+From: Biwen Li <biwen.li@nxp.com>
+Date: Sat, 13 Apr 2019 14:21:47 +0800
+Subject: [PATCH] modify macro QSPI_NOR_BOOTCOMMAND of ls1046ardb for openwrt
+
+Signed-off-by: Biwen Li <biwen.li@nxp.com>
+---
+ include/configs/ls1046ardb.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
+index cc1f5f5f55..925e717e4b 100644
+--- a/include/configs/ls1046ardb.h
++++ b/include/configs/ls1046ardb.h
+@@ -217,8 +217,8 @@
+ #ifndef SPL_NO_MISC
+ #undef CONFIG_BOOTCOMMAND
+ #ifdef CONFIG_TFABOOT
+-#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "	\
+-			   "env exists secureboot && esbc_halt;;"
++#define QSPI_NOR_BOOTCOMMAND "echo (from QSPI_NOR_BOOTCOMMAND) starting openwrt; "	\
++			   "run qspi_boot;"
+ #define SD_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; "	\
+ 			   "env exists secureboot && esbc_halt;"
+ #else
+-- 
+2.17.1
+

package/boot/uboot-layerscape/patches/0002-modify-macro-QSPI_NOR_BOOTCOMMAND-of-ls1012afrwy-for.patch

@@ -0,0 +1,28 @@
+From 2999d128bef554da5ca7a553dfe1c31061df9c5c Mon Sep 17 00:00:00 2001
+From: Biwen Li <biwen.li@nxp.com>
+Date: Sun, 14 Apr 2019 13:36:52 +0800
+Subject: [PATCH] modify macro QSPI_NOR_BOOTCOMMAND of ls1012afrwy for openwrt
+
+Signed-off-by: Biwen Li <biwen.li@nxp.com>
+---
+ include/configs/ls1012afrwy.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
+index 12e6437a05..900752970e 100644
+--- a/include/configs/ls1012afrwy.h
++++ b/include/configs/ls1012afrwy.h
+@@ -122,8 +122,8 @@
+ #undef CONFIG_BOOTCOMMAND
+ #ifdef CONFIG_TFABOOT
+ #undef QSPI_NOR_BOOTCOMMAND
+-#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\
+-			     "env exists secureboot && esbc_halt;"
++#define QSPI_NOR_BOOTCOMMAND "echo (from QSPI_NOR_BOOTCOMMAND) starting openwrt ...; "\
++			     "pfe stop; run sd_boot;"
+ #else
+ #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\
+ 			   "env exists secureboot && esbc_halt;"
+-- 
+2.17.1
+

package/boot/uboot-layerscape/patches/0003-modify-macro-QSPI_NOR_BOOTCOMMAND-of-ls1012ardb-for-.patch

@@ -0,0 +1,28 @@
+From 805c60e930a946560b52dfa83dd8e5fbdf2da15b Mon Sep 17 00:00:00 2001
+From: Biwen Li <biwen.li@nxp.com>
+Date: Sun, 14 Apr 2019 13:39:13 +0800
+Subject: [PATCH] modify macro QSPI_NOR_BOOTCOMMAND of ls1012ardb for openwrt
+
+Signed-off-by: Biwen Li <biwen.li@nxp.com>
+---
+ include/configs/ls1012ardb.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
+index f6640fa499..51a2192c56 100644
+--- a/include/configs/ls1012ardb.h
++++ b/include/configs/ls1012ardb.h
+@@ -115,8 +115,8 @@
+ #undef CONFIG_BOOTCOMMAND
+ #ifdef CONFIG_TFABOOT
+ #undef QSPI_NOR_BOOTCOMMAND
+-#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
+-			     "env exists secureboot && esbc_halt;"
++#define QSPI_NOR_BOOTCOMMAND "echo (from QSPI_NOR_BOOTCOMMAND) starting openwrt ...; "\
++			     "pfe stop; run qspi_boot;"
+ #else
+ #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
+ 			   "env exists secureboot && esbc_halt;"
+-- 
+2.17.1
+

package/boot/uboot-mvebu/Makefile

@@ -8,10 +8,10 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2018.03
+PKG_VERSION:=2019.04
 PKG_RELEASE:=1
 
-PKG_HASH:=7e7477534409d5368eb1371ffde6820f0f79780a1a1f676161c48442cb303dfd
+PKG_HASH:=76b7772d156b3ddd7644c8a1736081e55b78828537ff714065d21dbade229bef
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk
@@ -24,13 +24,20 @@ endef
 
 define U-Boot/clearfog
   NAME:=SolidRun ClearFog A1
-  BUILD_DEVICES:=armada-388-clearfog-base armada-388-clearfog-pro
+  BUILD_DEVICES:=solidrun_clearfog-base-a1 solidrun_clearfog-pro-a1
   BUILD_SUBTARGET:=cortexa9
   UBOOT_IMAGE:=u-boot-spl.kwb
 endef
 
+define U-Boot/uDPU
+  NAME:=Methode uDPU
+  BUILD_DEVICES:=methode_udpu
+  BUILD_SUBTARGET:=cortexa53
+endef
+
 UBOOT_TARGETS:= \
-	clearfog
+	clearfog \
+	uDPU
 
 Build/Exports:=$(Host/Exports)
 
@@ -44,7 +51,7 @@ endef
 
 define Build/InstallDev
 	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
-	$(CP) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot-spl.kwb
+	$(CP) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)
 endef
 
 $(eval $(call BuildPackage/U-Boot))

package/boot/uboot-mvebu/patches/100-add_support_for_macronix_mx25u12835f.patch

@@ -0,0 +1,10 @@
+--- a/drivers/mtd/spi/spi-nor-ids.c
++++ b/drivers/mtd/spi/spi-nor-ids.c
+@@ -136,6 +136,7 @@ const struct flash_info spi_nor_ids[] =
+ 	{ INFO("mx25u1635e",  0xc22535, 0, 64 * 1024,  32, SECT_4K) },
+ 	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
+ 	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) },
++	{ INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) },
+ 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
+ 	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ 	{ INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },

package/boot/uboot-mvebu/patches/120-mvebu_armada-37xx.h_increase_max_gunzip_size.patch

@@ -0,0 +1,13 @@
+Increase max gunzip size in mvebu_armada-37xx.h.
+This is required in order to boot itb images.
+
+--- a/include/configs/mvebu_armada-37xx.h
++++ b/include/configs/mvebu_armada-37xx.h
+@@ -12,6 +12,7 @@
+ 
+ /* additions for new ARM relocation support */
+ #define CONFIG_SYS_SDRAM_BASE	0x00000000
++#define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
+ 
+ #define CONFIG_NR_DRAM_BANKS	1
+ 

package/boot/uboot-mxs/Makefile

@@ -8,10 +8,10 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2018.09
+PKG_VERSION:=2019.10
 PKG_RELEASE:=1
 
-PKG_HASH:=839bf23cfe8ce613a77e583a60375179d0ad324e92c82fbdd07bebf0fd142268
+PKG_HASH:=8d6d6070739522dd236cba7055b8736bfe92b4fac0ea18ad809829ca79667014
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk

package/boot/uboot-mxs/patches/001-add-i2se-duckbill.patch

@@ -1,6 +1,6 @@
-From 7b919a74c562ca33ae28c9214f225a79b57209e4 Mon Sep 17 00:00:00 2001
+From 821d083ae4cfb795eab385eda43a20cdc8c3cacd Mon Sep 17 00:00:00 2001
 From: Michael Heimpold <mhei@heimpold.de>
-Date: Thu, 13 Sep 2018 21:40:19 +0200
+Date: Sun, 3 Nov 2019 00:50:21 +0100
 Subject: [PATCH] arm: mxs: add support for I2SE's Duckbill boards
 
 The Duckbill devices are small, pen-drive sized boards based on
@@ -32,9 +32,9 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
  board/i2se/duckbill/Makefile    |  10 ++
  board/i2se/duckbill/duckbill.c  | 186 ++++++++++++++++++++++++++++++++
  board/i2se/duckbill/iomux.c     | 156 +++++++++++++++++++++++++++
- configs/duckbill_defconfig      |  38 +++++++
+ configs/duckbill_defconfig      |  40 +++++++
  include/configs/duckbill.h      | 179 ++++++++++++++++++++++++++++++
- 8 files changed, 595 insertions(+)
+ 8 files changed, 597 insertions(+)
  create mode 100644 board/i2se/duckbill/Kconfig
  create mode 100644 board/i2se/duckbill/MAINTAINERS
  create mode 100644 board/i2se/duckbill/Makefile
@@ -43,6 +43,8 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
  create mode 100644 configs/duckbill_defconfig
  create mode 100644 include/configs/duckbill.h
 
+diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig
+index 68072d5a1f..82aaa3ef76 100644
 --- a/arch/arm/mach-imx/mxs/Kconfig
 +++ b/arch/arm/mach-imx/mxs/Kconfig
 @@ -50,6 +50,10 @@ config TARGET_APX4DEVKIT
@@ -64,6 +66,9 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
  source "board/ppcag/bg0900/Kconfig"
  source "board/schulercontrol/sc_sps_1/Kconfig"
  source "board/technologic/ts4600/Kconfig"
+diff --git a/board/i2se/duckbill/Kconfig b/board/i2se/duckbill/Kconfig
+new file mode 100644
+index 0000000000..98c1e4689f
 --- /dev/null
 +++ b/board/i2se/duckbill/Kconfig
 @@ -0,0 +1,15 @@
@@ -82,6 +87,9 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +	default "duckbill"
 +
 +endif
+diff --git a/board/i2se/duckbill/MAINTAINERS b/board/i2se/duckbill/MAINTAINERS
+new file mode 100644
+index 0000000000..5496baa330
 --- /dev/null
 +++ b/board/i2se/duckbill/MAINTAINERS
 @@ -0,0 +1,6 @@
@@ -91,12 +99,15 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +F:	board/i2se/duckbill/
 +F:	include/configs/duckbill.h
 +F:	configs/duckbill_defconfig
+diff --git a/board/i2se/duckbill/Makefile b/board/i2se/duckbill/Makefile
+new file mode 100644
+index 0000000000..0079eb413c
 --- /dev/null
 +++ b/board/i2se/duckbill/Makefile
 @@ -0,0 +1,10 @@
 +# SPDX-License-Identifier: GPL-2.0+
 +#
-+# (C) Copyright 2014-2018
++# (C) Copyright 2014-2019
 +# Michael Heimpold, mhei@heimpold.de.
 +
 +ifndef	CONFIG_SPL_BUILD
@@ -104,6 +115,9 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +else
 +obj-y	:= iomux.o
 +endif
+diff --git a/board/i2se/duckbill/duckbill.c b/board/i2se/duckbill/duckbill.c
+new file mode 100644
+index 0000000000..f93c372611
 --- /dev/null
 +++ b/board/i2se/duckbill/duckbill.c
 @@ -0,0 +1,186 @@
@@ -111,7 +125,7 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +/*
 + * I2SE Duckbill board
 + *
-+ * (C) Copyright 2014-2018 Michael Heimpold <mhei@heimpold.de>
++ * (C) Copyright 2014-2019 Michael Heimpold <mhei@heimpold.de>
 + */
 +
 +#include <common.h>
@@ -293,6 +307,9 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +
 +	return 0;
 +}
+diff --git a/board/i2se/duckbill/iomux.c b/board/i2se/duckbill/iomux.c
+new file mode 100644
+index 0000000000..1db3c52c34
 --- /dev/null
 +++ b/board/i2se/duckbill/iomux.c
 @@ -0,0 +1,156 @@
@@ -300,7 +317,7 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +/*
 + * I2SE Duckbill IOMUX setup
 + *
-+ * Copyright (C) 2013-2018 Michael Heimpold <mhei@heimpold.de>
++ * Copyright (C) 2013-2019 Michael Heimpold <mhei@heimpold.de>
 + */
 +
 +#include <common.h>
@@ -452,9 +469,12 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +	else
 +		mxs_iomux_setup_multiple_pads(iomux_setup_v1, ARRAY_SIZE(iomux_setup_v1));
 +}
+diff --git a/configs/duckbill_defconfig b/configs/duckbill_defconfig
+new file mode 100644
+index 0000000000..5a8c561b4e
 --- /dev/null
 +++ b/configs/duckbill_defconfig
-@@ -0,0 +1,38 @@
+@@ -0,0 +1,40 @@
 +CONFIG_ARM=y
 +CONFIG_ARCH_MX28=y
 +CONFIG_SYS_TEXT_BASE=0x40002000
@@ -463,8 +483,9 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
 +CONFIG_TARGET_DUCKBILL=y
 +CONFIG_SPL_SERIAL_SUPPORT=y
-+CONFIG_SPL=y
 +CONFIG_NR_DRAM_BANKS=1
++CONFIG_SPL=y
++CONFIG_SPL_TEXT_BASE=0x00001000
 +CONFIG_BOOTDELAY=1
 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 +CONFIG_VERSION_VARIABLE=y
@@ -488,17 +509,21 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +CONFIG_CMD_FS_GENERIC=y
 +CONFIG_DOS_PARTITION=y
 +CONFIG_ENV_IS_IN_MMC=y
++CONFIG_MXS_GPIO=y
 +CONFIG_MMC_MXS=y
 +CONFIG_MII=y
 +CONFIG_CONS_INDEX=0
 +CONFIG_OF_LIBFDT=y
 +# CONFIG_EFI_LOADER is not set
+diff --git a/include/configs/duckbill.h b/include/configs/duckbill.h
+new file mode 100644
+index 0000000000..e7fce8843e
 --- /dev/null
 +++ b/include/configs/duckbill.h
 @@ -0,0 +1,179 @@
 +/* SPDX-License-Identifier: GPL-2.0+ */
 +/*
-+ * Copyright (C) 2014-2018 Michael Heimpold <mhei@heimpold.de>
++ * Copyright (C) 2014-2019 Michael Heimpold <mhei@heimpold.de>
 + *
 + */
 +#ifndef __CONFIGS_DUCKBILL_H__
@@ -613,7 +638,7 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +	"mmcroot=/dev/mmcblk0p2\0" \
 +	"mmcargs=setenv bootargs console=${console},${baudrate} " \
 +		"root=${mmcroot} " \
-+		"rootwait bootsys=${bootsys} panic=1\0" \
++		"rootwait bootsys=${bootsys} panic=1 ${extraargs}\0" \
 +	"loadimage=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${image}\0" \
 +	"loadfdt=ext4load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/${fdt_file}\0" \
 +	"mmcboot=echo Booting from mmc ...; " \
@@ -636,7 +661,7 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +	"nfsroot=/\0" \
 +	"netargs=setenv bootargs console=${console},${baudrate} " \
 +		"root=/dev/nfs " \
-+		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
++		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp ${extraargs}\0" \
 +	"netboot=echo Booting from net ...; " \
 +		"run netargs; "	\
 +		"if test ${ip_dyn} = yes; then " \
@@ -675,3 +700,6 @@ Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
 +#include <configs/mxs.h>
 +
 +#endif /* __CONFIGS_DUCKBILL_H__ */
+-- 
+2.17.1
+

package/boot/uboot-omap/Makefile

@@ -8,10 +8,10 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2017.01
-PKG_RELEASE:=3
+PKG_VERSION:=2019.10
+PKG_RELEASE:=1
 
-PKG_HASH:=6c425175f93a4bcf2ec9faf5658ef279633dbd7856a293d95bd1ff516528ecf2
+PKG_HASH:=8d6d6070739522dd236cba7055b8736bfe92b4fac0ea18ad809829ca79667014
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk
@@ -19,7 +19,6 @@ include $(INCLUDE_DIR)/package.mk
 define U-Boot/Default
   BUILD_TARGET:=omap
   UBOOT_IMAGE:=u-boot.img MLO
-  UENV:=default
 endef
 
 define U-Boot/omap4_panda
@@ -27,14 +26,9 @@ define U-Boot/omap4_panda
   BUILD_DEVICES:=ti_omap4-panda
 endef
 
-define U-Boot/am335x_boneblack
-  NAME:=TI AM335x BeagleBone Black
-  BUILD_DEVICES:=ti_am335x-bone-black
-endef
-
 define U-Boot/am335x_evm
   NAME:=AM335x EVM
-  BUILD_DEVICES:=ti_am335x-evm
+  BUILD_DEVICES:=ti_am335x-evm ti_am335x-bone-black
 endef
 
 define U-Boot/omap3_overo
@@ -46,12 +40,19 @@ define U-Boot/omap3_beagle
   BUILD_DEVICES:=ti_omap3-beagle
 endef
 
-UBOOT_TARGETS:=omap4_panda am335x_evm omap3_overo omap3_beagle am335x_boneblack
+UBOOT_TARGETS:=omap4_panda am335x_evm omap3_overo omap3_beagle
 
 define Build/InstallDev
-	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)
-	$(CP) $(patsubst %,$(PKG_BUILD_DIR)/%,$(UBOOT_IMAGE)) $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)/
-	$(CP) ./files/uEnv-$(UENV).txt $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)/uEnv.txt
+	$(foreach device,$(BUILD_DEVICES), \
+		$(INSTALL_DIR) $(STAGING_DIR_IMAGE)/$(device)
+	)
+	$(foreach device,$(BUILD_DEVICES), \
+		$(CP) $(patsubst %,$(PKG_BUILD_DIR)/%,$(UBOOT_IMAGE)) $(STAGING_DIR_IMAGE)/$(device)/
+	)
+	$(foreach device,$(BUILD_DEVICES), \
+		mkimage -C none -A arm -T script -d ./files/boot.scr.txt \
+			$(STAGING_DIR_IMAGE)/$(device)/boot.scr
+	)
 endef
 
 $(eval $(call BuildPackage/U-Boot))

package/boot/uboot-omap/files/boot.scr.txt

@@ -0,0 +1,9 @@
+if test -z "${devnum}"; then
+	setenv devnum 0
+fi
+
+setenv bootargs console=${console} root=/dev/mmcblk${devnum}p2 rootwait
+
+load mmc ${devnum}:1 ${loadaddr} /zImage \
+&& load mmc ${devnum}:1 ${fdtaddr} /dtbs/${fdtfile} \
+&& bootz ${loadaddr} - ${fdtaddr}

package/boot/uboot-omap/files/uEnv-default.txt

@@ -1,8 +0,0 @@
-bootpart=0:1
-bootdir=/
-bootfile=zImage
-fdtdir=/dtbs
-uenvcmd=run loadfdt; run loadimage; run uenvbootargs ; bootz ${loadaddr} - ${fdtaddr}
-loadfdt=load mmc ${bootpart} ${fdtaddr} ${fdtdir}/${fdtfile}
-devtype=mmc
-uenvbootargs=setenv bootargs console=${console} root=/dev/mmcblk0p2

package/boot/uboot-omap/patches/101-disable-thumb-omap3.patch

@@ -1,14 +0,0 @@
-Index: u-boot-2017.01/include/configs/ti_omap3_common.h
-===================================================================
---- u-boot-2017.01.orig/include/configs/ti_omap3_common.h
-+++ u-boot-2017.01/include/configs/ti_omap3_common.h
-@@ -80,4 +80,9 @@
- /* Now bring in the rest of the common code. */
- #include <configs/ti_armv7_omap.h>
- 
-+/* beagleboard doesnt boot with thumb */
-+#ifdef CONFIG_SYS_THUMB_BUILD
-+#undef CONFIG_SYS_THUMB_BUILD
-+#endif
-+
- #endif	/* __CONFIG_TI_OMAP3_COMMON_H__ */

package/boot/uboot-omap/patches/102-minify-spl.patch

@@ -1,44 +0,0 @@
-Index: u-boot-2017.01/configs/omap3_beagle_defconfig
-===================================================================
---- u-boot-2017.01.orig/configs/omap3_beagle_defconfig
-+++ u-boot-2017.01/configs/omap3_beagle_defconfig
-@@ -7,7 +7,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
- CONFIG_VERSION_VARIABLE=y
- CONFIG_SPL=y
- CONFIG_SPL_MTD_SUPPORT=y
--CONFIG_SPL_OS_BOOT=y
-+# CONFIG_SPL_EXT_SUPPORT is not set
- # CONFIG_CMD_IMLS is not set
- CONFIG_CMD_ASKENV=y
- # CONFIG_CMD_FLASH is not set
-Index: u-boot-2017.01/common/Makefile
-===================================================================
---- u-boot-2017.01.orig/common/Makefile
-+++ u-boot-2017.01/common/Makefile
-@@ -174,8 +174,11 @@ obj-$(CONFIG_CMDLINE) += cli_simple.o
- obj-y += cli.o
- obj-$(CONFIG_CMDLINE) += cli_readline.o
- obj-$(CONFIG_CMD_DFU) += dfu.o
-+
-+ifndef CONFIG_SPL_BUILD
- obj-y += command.o
- obj-y += s_record.o
- obj-y += xyzModem.o
-+endif
- 
- CFLAGS_env_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools/envcrc 2>/dev/null)
-Index: u-boot-2017.01/cmd/Makefile
-===================================================================
---- u-boot-2017.01.orig/cmd/Makefile
-+++ u-boot-2017.01/cmd/Makefile
-@@ -161,7 +161,10 @@ endif # !CONFIG_SPL_BUILD
- 
- obj-$(CONFIG_CMD_BLOB) += blob.o
- 
-+
-+# ifndef CONFIG_SPL_BUILD
- # core command
- obj-y += nvedit.o
-+# endif # !CONFIG_SPL_BUILD
- 
- obj-$(CONFIG_ARCH_MVEBU) += mvebu/

package/boot/uboot-omap/patches/103-disable-fat-write-spl.patch

@@ -1,27 +0,0 @@
-Index: u-boot-2017.01/fs/fat/Makefile
-===================================================================
---- u-boot-2017.01.orig/fs/fat/Makefile
-+++ u-boot-2017.01/fs/fat/Makefile
-@@ -4,8 +4,8 @@
- #
- 
- obj-$(CONFIG_FS_FAT)	:= fat.o
--obj-$(CONFIG_FAT_WRITE):= fat_write.o
- 
- ifndef CONFIG_SPL_BUILD
-+obj-$(CONFIG_FAT_WRITE):= fat_write.o
- obj-$(CONFIG_FS_FAT)	+= file.o
- endif
-Index: u-boot-2017.01/fs/fat/fat.c
-===================================================================
---- u-boot-2017.01.orig/fs/fat/fat.c
-+++ u-boot-2017.01/fs/fat/fat.c
-@@ -163,7 +163,7 @@ static void get_name(dir_entry *dirent,
- }
- 
- static int flush_dirty_fat_buffer(fsdata *mydata);
--#if !defined(CONFIG_FAT_WRITE)
-+#if !defined(CONFIG_FAT_WRITE) || defined(CONFIG_SPL_BUILD)
- /* Stub for read only operation */
- int flush_dirty_fat_buffer(fsdata *mydata)
- {

package/boot/uboot-omap/patches/104-omap3-overo-enable-thumb.patch

@@ -1,18 +0,0 @@
-Index: u-boot-2017.01/include/configs/omap3_overo.h
-===================================================================
---- u-boot-2017.01.orig/include/configs/omap3_overo.h
-+++ u-boot-2017.01/include/configs/omap3_overo.h
-@@ -11,6 +11,13 @@
- #define CONFIG_NAND
- 
- #include <configs/ti_omap3_common.h>
-+
-+/* try to enable thumb - unknown if it's working
-+ * but otherwise it's too big for spl */
-+#ifndef CONFIG_SYS_THUMB_BUILD
-+#define CONFIG_SYS_THUMB_BUILD
-+#endif
-+
- /*
-  * We are only ever GP parts and will utilize all of the "downloaded image"
-  * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).

package/boot/uboot-omap/patches/105-serial-ns16550-bugfix-ns16550-fifo-not-enabled.patch

@@ -1,309 +0,0 @@
-From 17fa032671f7981628fe16b30399638842a4b1bb Mon Sep 17 00:00:00 2001
-From: Heiko Schocher <hs@denx.de>
-Date: Wed, 18 Jan 2017 08:05:49 +0100
-Subject: [PATCH] serial, ns16550: bugfix: ns16550 fifo not enabled
-
-commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor"
-breaks u-boot commandline working with long commands
-sending to the board.
-
-Since the above patch, you have to setup the fcr register.
-
-For board/archs which enable OF_PLATDATA, the new field
-fcr in struct ns16550_platdata is not filled with a
-default value ...
-
-This leads in not setting up the uarts fifo, which ends
-in problems, when you send long commands to u-boots
-commandline.
-
-Detected this issue with automated tbot tests on am335x
-based shc board.
-
-The error does not popup, if you type commands. You need
-to copy&paste a long command to u-boots commandshell
-(or send a long command with tbot)
-
-Possible boards/plattforms with problems:
-./arch/arm/cpu/arm926ejs/lpc32xx/devices.c
-./arch/arm/mach-tegra/board.c
-./board/overo/overo.c
-./board/quipos/cairo/cairo.c
-./board/logicpd/omap3som/omap3logic.c
-./board/logicpd/zoom1/zoom1.c
-./board/timll/devkit8000/devkit8000.c
-./board/lg/sniper/sniper.c
-./board/ti/beagle/beagle.c
-./drivers/serial/serial_rockchip.c
-
-Signed-off-by: Heiko Schocher <hs@denx.de>
-Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
-Tested-by: Adam Ford <aford173@gmail.com>
-Reviewed-by: Tom Rini <trini@konsulko.com>
----
- arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 12 ++++++++----
- arch/arm/mach-omap2/am33xx/board.c       | 18 ++++++++++++------
- arch/arm/mach-tegra/board.c              |  1 +
- board/isee/igep00x0/igep00x0.c           |  3 ++-
- board/lg/sniper/sniper.c                 |  3 ++-
- board/logicpd/omap3som/omap3logic.c      |  3 ++-
- board/logicpd/zoom1/zoom1.c              |  3 ++-
- board/overo/overo.c                      |  3 ++-
- board/quipos/cairo/cairo.c               |  3 ++-
- board/ti/beagle/beagle.c                 |  3 ++-
- board/timll/devkit8000/devkit8000.c      |  3 ++-
- drivers/serial/ns16550.c                 |  9 +++------
- drivers/serial/serial_rockchip.c         |  1 +
- include/ns16550.h                        |  5 +++++
- 14 files changed, 46 insertions(+), 24 deletions(-)
-
-diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
-index 399b07c5420a..f744398ca7ad 100644
---- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
-+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
-@@ -45,10 +45,14 @@ void lpc32xx_uart_init(unsigned int uart_id)
- 
- #if !CONFIG_IS_ENABLED(OF_CONTROL)
- static const struct ns16550_platdata lpc32xx_uart[] = {
--	{ .base = UART3_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
--	{ .base = UART4_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
--	{ .base = UART5_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
--	{ .base = UART6_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-+	{ .base = UART3_BASE, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-+	{ .base = UART4_BASE, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-+	{ .base = UART5_BASE, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-+	{ .base = UART6_BASE, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
- };
- 
- #if defined(CONFIG_LPC32XX_HSUART)
-diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
-index 73824df18fa7..190310fd0079 100644
---- a/arch/arm/mach-omap2/am33xx/board.c
-+++ b/arch/arm/mach-omap2/am33xx/board.c
-@@ -40,14 +40,20 @@ DECLARE_GLOBAL_DATA_PTR;
- 
- #if !CONFIG_IS_ENABLED(OF_CONTROL)
- static const struct ns16550_platdata am33xx_serial[] = {
--	{ .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-+	{ .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
- # ifdef CONFIG_SYS_NS16550_COM2
--	{ .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-+	{ .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
- #  ifdef CONFIG_SYS_NS16550_COM3
--	{ .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
--	{ .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
--	{ .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
--	{ .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-+	{ .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-+	{ .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-+	{ .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
-+	{ .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2,
-+	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
- #  endif
- # endif
- };
-diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
-index 3d1d26d13d13..b3a041b539af 100644
---- a/arch/arm/mach-tegra/board.c
-+++ b/arch/arm/mach-tegra/board.c
-@@ -219,6 +219,7 @@ static struct ns16550_platdata ns16550_com1_pdata = {
- 	.base = CONFIG_SYS_NS16550_COM1,
- 	.reg_shift = 2,
- 	.clock = CONFIG_SYS_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(ns16550_com1) = {
-diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
-index ae7959b1eb6e..5a3498f570a6 100644
---- a/board/isee/igep00x0/igep00x0.c
-+++ b/board/isee/igep00x0/igep00x0.c
-@@ -32,7 +32,8 @@ DECLARE_GLOBAL_DATA_PTR;
- static const struct ns16550_platdata igep_serial = {
- 	.base = OMAP34XX_UART3,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(igep_uart) = {
-diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c
-index 0662449c3875..b2b8f8861f11 100644
---- a/board/lg/sniper/sniper.c
-+++ b/board/lg/sniper/sniper.c
-@@ -31,7 +31,8 @@ const omap3_sysinfo sysinfo = {
- static const struct ns16550_platdata serial_omap_platdata = {
- 	.base = OMAP34XX_UART3,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(sniper_serial) = {
-diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
-index 21b3fdcf49cf..b2fcc28f8b4b 100644
---- a/board/logicpd/omap3som/omap3logic.c
-+++ b/board/logicpd/omap3som/omap3logic.c
-@@ -49,7 +49,8 @@ DECLARE_GLOBAL_DATA_PTR;
- static const struct ns16550_platdata omap3logic_serial = {
- 	.base = OMAP34XX_UART1,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(omap3logic_uart) = {
-diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c
-index 2821ee22674f..0fad23af62f6 100644
---- a/board/logicpd/zoom1/zoom1.c
-+++ b/board/logicpd/zoom1/zoom1.c
-@@ -47,7 +47,8 @@ static const u32 gpmc_lab_enet[] = {
- static const struct ns16550_platdata zoom1_serial = {
- 	.base = OMAP34XX_UART3,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(zoom1_uart) = {
-diff --git a/board/overo/overo.c b/board/overo/overo.c
-index 40f13e5876cc..5e447262bcfd 100644
---- a/board/overo/overo.c
-+++ b/board/overo/overo.c
-@@ -70,7 +70,8 @@ static struct {
- static const struct ns16550_platdata overo_serial = {
- 	.base = OMAP34XX_UART3,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(overo_uart) = {
-diff --git a/board/quipos/cairo/cairo.c b/board/quipos/cairo/cairo.c
-index 77e4482906f0..793aa9023150 100644
---- a/board/quipos/cairo/cairo.c
-+++ b/board/quipos/cairo/cairo.c
-@@ -93,7 +93,8 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
- static const struct ns16550_platdata cairo_serial = {
- 	.base = OMAP34XX_UART2,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(cairo_uart) = {
-diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
-index cfdab3e34253..23c79333a223 100644
---- a/board/ti/beagle/beagle.c
-+++ b/board/ti/beagle/beagle.c
-@@ -75,7 +75,8 @@ static struct {
- static const struct ns16550_platdata beagle_serial = {
- 	.base = OMAP34XX_UART3,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(beagle_uart) = {
-diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
-index f785dbe6d732..b2f060b2ddbf 100644
---- a/board/timll/devkit8000/devkit8000.c
-+++ b/board/timll/devkit8000/devkit8000.c
-@@ -48,7 +48,8 @@ static u32 gpmc_net_config[GPMC_MAX_REG] = {
- static const struct ns16550_platdata devkit8000_serial = {
- 	.base = OMAP34XX_UART3,
- 	.reg_shift = 2,
--	.clock = V_NS16550_CLK
-+	.clock = V_NS16550_CLK,
-+	.fcr = UART_FCR_DEFVAL,
- };
- 
- U_BOOT_DEVICE(devkit8000_uart) = {
-diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
-index 9b423a591d8a..2df4a1f04fe5 100644
---- a/drivers/serial/ns16550.c
-+++ b/drivers/serial/ns16550.c
-@@ -20,9 +20,6 @@ DECLARE_GLOBAL_DATA_PTR;
- #define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
- #define UART_MCRVAL (UART_MCR_DTR | \
- 		     UART_MCR_RTS)		/* RTS/DTR */
--#define UART_FCRVAL (UART_FCR_FIFO_EN |	\
--		     UART_FCR_RXSR |	\
--		     UART_FCR_TXSR)		/* Clear & enable FIFOs */
- 
- #ifndef CONFIG_DM_SERIAL
- #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
-@@ -138,7 +135,7 @@ static u32 ns16550_getfcr(NS16550_t port)
- #else
- static u32 ns16550_getfcr(NS16550_t port)
- {
--	return UART_FCRVAL;
-+	return UART_FCR_DEFVAL;
- }
- #endif
- 
-@@ -275,7 +272,7 @@ static inline void _debug_uart_init(void)
- 					    CONFIG_BAUDRATE);
- 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
- 	serial_dout(&com_port->mcr, UART_MCRVAL);
--	serial_dout(&com_port->fcr, UART_FCRVAL);
-+	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
- 
- 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
- 	serial_dout(&com_port->dll, baud_divisor & 0xff);
-@@ -440,7 +437,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
- 		return -EINVAL;
- 	}
- 
--	plat->fcr = UART_FCRVAL;
-+	plat->fcr = UART_FCR_DEFVAL;
- 	if (port_type == PORT_JZ4780)
- 		plat->fcr |= UART_FCR_UME;
- 
-diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
-index 6bac95a414ce..c06afc58f7ea 100644
---- a/drivers/serial/serial_rockchip.c
-+++ b/drivers/serial/serial_rockchip.c
-@@ -27,6 +27,7 @@ static int rockchip_serial_probe(struct udevice *dev)
- 	plat->plat.base = plat->dtplat.reg[0];
- 	plat->plat.reg_shift = plat->dtplat.reg_shift;
- 	plat->plat.clock = plat->dtplat.clock_frequency;
-+	plat->plat.fcr = UART_FCR_DEFVAL;
- 	dev->platdata = &plat->plat;
- 
- 	return ns16550_serial_probe(dev);
-diff --git a/include/ns16550.h b/include/ns16550.h
-index 7c9703683109..5fcbcd2e74e3 100644
---- a/include/ns16550.h
-+++ b/include/ns16550.h
-@@ -121,6 +121,11 @@ typedef struct NS16550 *NS16550_t;
- /* Ingenic JZ47xx specific UART-enable bit. */
- #define UART_FCR_UME		0x10
- 
-+/* Clear & enable FIFOs */
-+#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | \
-+			UART_FCR_RXSR |	\
-+			UART_FCR_TXSR)
-+
- /*
-  * These are the definitions for the Modem Control Register
-  */
--- 
-2.17.0
-

package/boot/uboot-oxnas/src/tools/mkox820crc.c

@@ -84,6 +84,7 @@ int main(int argc, char **argv)
 
 	if (status != file_length) {
 		printf("Failed to load image\n");
+		free(executable);
 		return -ENOENT;
 	}
 
@@ -111,6 +112,7 @@ int main(int argc, char **argv)
 	status = lseek(in_file, 0, SEEK_SET);
 	if (status != 0) {
 		printf("failed to rewind\n");
+		free(executable);
 		return 1;
 	}
 	len = write(in_file, &img_header, sizeof(img_header));
@@ -118,6 +120,7 @@ int main(int argc, char **argv)
 	len = write(in_file, executable, file_length);
 	assert(len == file_length);
 	close(in_file);
+	free(executable);
 
 	return 0;
 }

package/boot/uboot-sunxi/Makefile

@@ -9,9 +9,9 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2018.05
+PKG_VERSION:=2019.01
 
-PKG_HASH:=4da13c2a6139a78cc08608f21fd4741db27eda336cfad7ab8264fda923b9c048
+PKG_HASH:=50bd7e5a466ab828914d080d5f6a432345b500e8fba1ad3b7b61e95e60d51c22
 
 PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>
 
@@ -28,67 +28,67 @@ endef
 define U-Boot/A10-OLinuXino-Lime
   BUILD_SUBTARGET:=cortexa8
   NAME:=A10 OLinuXino LIME
-  BUILD_DEVICES:=sun4i-a10-olinuxino-lime
+  BUILD_DEVICES:=olimex_a10-olinuxino-lime
 endef
 
 define U-Boot/A13-OLinuXino
   BUILD_SUBTARGET:=cortexa8
   NAME:=A13 OlinuXino
-  BUILD_DEVICES:=sun5i-a13-olinuxino
+  BUILD_DEVICES:=olimex_a13-olinuxino
 endef
 
 define U-Boot/A20-OLinuXino-Lime
   BUILD_SUBTARGET:=cortexa7
   NAME:=A20 OLinuXino LIME
-  BUILD_DEVICES:=sun7i-a20-olinuxino-lime
+  BUILD_DEVICES:=olimex_a20-olinuxino-lime
 endef
 
 define U-Boot/A20-OLinuXino-Lime2
   BUILD_SUBTARGET:=cortexa7
   NAME:=A20 OLinuXino LIME2
-  BUILD_DEVICES:=sun7i-a20-olinuxino-lime2
+  BUILD_DEVICES:=olimex_a20-olinuxino-lime2
 endef
 
 define U-Boot/A20-OLinuXino-Lime2-eMMC
   BUILD_SUBTARGET:=cortexa7
   NAME:=A20 OLinuXino LIME2 eMMC
-  BUILD_DEVICES:=sun7i-a20-olinuxino-lime2-emmc
+  BUILD_DEVICES:=olimex_a20-olinuxino-lime2-emmc
 endef
 
 define U-Boot/A20-OLinuXino_MICRO
   BUILD_SUBTARGET:=cortexa7
   NAME:=A20 OLinuXino MICRO
-  BUILD_DEVICES:=sun7i-a20-olinuxino-micro
+  BUILD_DEVICES:=olimex_a20-olinuxino-micro
 endef
 
 define U-Boot/Bananapi
   BUILD_SUBTARGET:=cortexa7
   NAME:=Bananapi
-  BUILD_DEVICES:=sun7i-a20-bananapi
+  BUILD_DEVICES:=lemaker_bananapi
 endef
 
 define U-Boot/Bananapro
   BUILD_SUBTARGET:=cortexa7
   NAME:=Bananapro
-  BUILD_DEVICES:=sun7i-a20-bananapro
+  BUILD_DEVICES:=lemaker_bananapro
 endef
 
 define U-Boot/Cubieboard
   BUILD_SUBTARGET:=cortexa8
   NAME:=Cubieboard
-  BUILD_DEVICES:=sun4i-a10-cubieboard
+  BUILD_DEVICES:=cubietech_a10-cubieboard
 endef
 
 define U-Boot/Cubieboard2
   BUILD_SUBTARGET:=cortexa7
   NAME:=Cubieboard2
-  BUILD_DEVICES:=sun7i-a20-cubieboard2
+  BUILD_DEVICES:=cubietech_cubieboard2
 endef
 
 define U-Boot/Cubietruck
   BUILD_SUBTARGET:=cortexa7
   NAME:=Cubietruck
-  BUILD_DEVICES:=sun7i-a20-cubietruck
+  BUILD_DEVICES:=cubietech_cubietruck
 endef
 
 define U-Boot/Hummingbird_A31
@@ -99,79 +99,97 @@ endef
 define U-Boot/Marsboard_A10
   BUILD_SUBTARGET:=cortexa8
   NAME:=Marsboard
-  BUILD_DEVICES:=sun4i-a10-marsboard
+  BUILD_DEVICES:=marsboard_a10-marsboard
 endef
 
 define U-Boot/Mele_M9
   BUILD_SUBTARGET:=cortexa7
   NAME:=Mele M9 (A31)
-  BUILD_DEVICES:=sun6i-a31-m9
+  BUILD_DEVICES:=mele_m9
 endef
 
 define U-Boot/OLIMEX_A13_SOM
   BUILD_SUBTARGET:=cortexa8
   NAME:=Olimex A13 SOM
-  BUILD_DEVICES:=sun5i-a13-olimex-som
+  BUILD_DEVICES:=olimex_a13-olimex-som
 endef
 
 define U-Boot/Linksprite_pcDuino
   BUILD_SUBTARGET:=cortexa8
   NAME:=Linksprite pcDuino
-  BUILD_DEVICES:=sun4i-a10-pcduino
+  BUILD_DEVICES:=linksprite_a10-pcduino
 endef
 
 define U-Boot/Linksprite_pcDuino3
   BUILD_SUBTARGET:=cortexa7
   NAME:=Linksprite pcDuino3
-  BUILD_DEVICES:=sun7i-a20-pcduino3
+  BUILD_DEVICES:=linksprite_pcduino3
 endef
 
 define U-Boot/Lamobo_R1
   BUILD_SUBTARGET:=cortexa7
   NAME:=Lamobo R1
-  BUILD_DEVICES:=sun7i-a20-lamobo-r1
+  BUILD_DEVICES:=lamobo_lamobo-r1
 endef
 
 define U-Boot/nanopi_m1_plus
   BUILD_SUBTARGET:=cortexa7
   NAME:=NanoPi M1 Plus (H3)
-  BUILD_DEVICES:=sun8i-h3-nanopi-m1-plus
+  BUILD_DEVICES:=friendlyarm_nanopi-m1-plus
+endef
+
+define U-Boot/nanopi_neo_air
+  BUILD_SUBTARGET:=cortexa7
+  NAME:=U-Boot for NanoPi NEO Air (H3)
+  BUILD_DEVICES:=friendlyarm_nanopi-neo-air
 endef
 
 define U-Boot/nanopi_neo
   BUILD_SUBTARGET:=cortexa7
   NAME:=U-Boot for NanoPi NEO (H3)
-  BUILD_DEVICES:=sun8i-h3-nanopi-neo
+  BUILD_DEVICES:=friendlyarm_nanopi-neo
 endef
 
 define U-Boot/orangepi_r1
   BUILD_SUBTARGET:=cortexa7
   NAME:=Orange Pi R1 (H2+)
-  BUILD_DEVICES:=sun8i-h2-plus-orangepi-r1
+  BUILD_DEVICES:=xunlong_orangepi-r1
 endef
 
 define U-Boot/orangepi_zero
   BUILD_SUBTARGET:=cortexa7
   NAME:=Orange Pi Zero (H2+)
-  BUILD_DEVICES:=sun8i-h2-plus-orangepi-zero
+  BUILD_DEVICES:=xunlong_orangepi-zero
+endef
+
+define U-Boot/orangepi_one
+  BUILD_SUBTARGET:=cortexa7
+  NAME:=Orange Pi One (H3)
+  BUILD_DEVICES:=xunlong_orangepi-one
 endef
 
 define U-Boot/orangepi_pc
   BUILD_SUBTARGET:=cortexa7
   NAME:=Orange Pi PC (H3)
-  BUILD_DEVICES:=sun8i-h3-orangepi-pc
+  BUILD_DEVICES:=xunlong_orangepi-pc
+endef
+
+define U-Boot/orangepi_pc_plus
+  BUILD_SUBTARGET:=cortexa7
+  NAME:=Orange Pi PC Plus (H3)
+  BUILD_DEVICES:=xunlong_orangepi-pc-plus
 endef
 
 define U-Boot/orangepi_plus
   BUILD_SUBTARGET:=cortexa7
   NAME:=Orange Pi Plus (H3)
-  BUILD_DEVICES:=sun8i-h3-orangepi-plus
+  BUILD_DEVICES:=xunlong_orangepi-plus
 endef
 
 define U-Boot/orangepi_2
   BUILD_SUBTARGET:=cortexa7
   NAME:=Orange Pi 2 (H3)
-  BUILD_DEVICES:=sun8i-h3-orangepi-2
+  BUILD_DEVICES:=xunlong_orangepi-2
 endef
 
 define U-Boot/pangolin
@@ -183,7 +201,7 @@ endef
 define U-Boot/nanopi_neo_plus2
   BUILD_SUBTARGET:=cortexa53
   NAME:=NanoPi NEO Plus2 (H5)
-  BUILD_DEVICES:=sun50i-h5-nanopi-neo-plus2
+  BUILD_DEVICES:=friendlyarm_nanopi-neo-plus2
   DEPENDS:=+PACKAGE_u-boot-nanopi_neo_plus2:arm-trusted-firmware-sunxi
   UENV:=a64
 endef
@@ -191,7 +209,7 @@ endef
 define U-Boot/nanopi_neo2
   BUILD_SUBTARGET:=cortexa53
   NAME:=NanoPi NEO2 (H5)
-  BUILD_DEVICES:=sun50i-h5-nanopi-neo2
+  BUILD_DEVICES:=friendlyarm_nanopi-neo2
   DEPENDS:=+PACKAGE_u-boot-nanopi_neo2:arm-trusted-firmware-sunxi
   UENV:=a64
 endef
@@ -199,15 +217,21 @@ endef
 define U-Boot/pine64_plus
   BUILD_SUBTARGET:=cortexa53
   NAME:=Pine64 Plus A64
-  BUILD_DEVICES:=sun50i-a64-pine64-plus
+  BUILD_DEVICES:=pine64_pine64-plus
   DEPENDS:=+PACKAGE_u-boot-pine64_plus:arm-trusted-firmware-sunxi
   UENV:=a64
 endef
 
+define U-Boot/Sinovoip_BPI_M2_Plus
+  BUILD_SUBTARGET:=cortexa7
+  NAME:=Bananapi M2 Plus
+  BUILD_DEVICES:=sinovoip_bananapi-m2-plus
+endef
+
 define U-Boot/sopine_baseboard
   BUILD_SUBTARGET:=cortexa53
   NAME:=Sopine Baseboard
-  BUILD_DEVICES:=sun50i-a64-sopine-baseboard
+  BUILD_DEVICES:=pine64_sopine-baseboard
   DEPENDS:=+PACKAGE_u-boot-sopine_baseboard:arm-trusted-firmware-sunxi
   UENV:=a64
 endef
@@ -216,7 +240,7 @@ endef
 define U-Boot/orangepi_zero_plus
   BUILD_SUBTARGET:=cortexa53
   NAME:=Xunlong Orange Pi Zero Plus
-  BUILD_DEVICES:=sun50i-h5-orangepi-zero-plus
+  BUILD_DEVICES:=xunlong_orangepi-zero-plus
   DEPENDS:=+PACKAGE_u-boot-orangepi_zero_plus:arm-trusted-firmware-sunxi
   UENV:=a64
 endef
@@ -224,11 +248,17 @@ endef
 define U-Boot/orangepi_pc2
   BUILD_SUBTARGET:=cortexa53
   NAME:=Xunlong Orange Pi PC2
-  BUILD_DEVICES:=sun50i-h5-orangepi-pc2
+  BUILD_DEVICES:=xunlong_orangepi-pc2
   DEPENDS:=+PACKAGE_u-boot-orangepi_pc2:arm-trusted-firmware-sunxi
   UENV:=a64
 endef
 
+define U-Boot/Sinovoip_BPI_M2_Ultra
+  BUILD_SUBTARGET:=cortexa7
+  NAME:=Bananapi M2 Ultra
+  BUILD_DEVICES:=lemaker_bananapi-m2-ultra
+endef
+
 UBOOT_TARGETS := \
 	A10-OLinuXino-Lime \
 	A13-OLinuXino \
@@ -250,16 +280,21 @@ UBOOT_TARGETS := \
 	Lamobo_R1 \
 	nanopi_m1_plus \
 	nanopi_neo \
+	nanopi_neo_air \
 	nanopi_neo_plus2 \
 	nanopi_neo2 \
 	orangepi_zero \
 	orangepi_r1 \
+	orangepi_one \
 	orangepi_pc \
+	orangepi_pc_plus \
 	orangepi_plus \
 	orangepi_2 \
 	orangepi_pc2 \
 	pangolin \
 	pine64_plus \
+	Sinovoip_BPI_M2_Plus \
+	Sinovoip_BPI_M2_Ultra \
 	sopine_baseboard \
 	orangepi_zero_plus
 

package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch

@@ -1,6 +1,6 @@
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -290,6 +290,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
+@@ -313,6 +313,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
  	sun6i-a31-m9.dtb \
  	sun6i-a31-mele-a1000g-quad.dtb \
  	sun6i-a31-mixtile-loftq.dtb \
@@ -10,19 +10,17 @@
  	sun6i-a31s-inet-q972.dtb \
 --- a/arch/arm/dts/sun6i-a31.dtsi
 +++ b/arch/arm/dts/sun6i-a31.dtsi
-@@ -679,6 +679,13 @@
- 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+@@ -641,6 +641,11 @@
+ 				function = "lcd0";
  			};
  
 +			i2c3_pins_a: i2c3@0 {
 +				allwinner,pins = "PB5", "PB6";
 +				allwinner,function = "i2c3";
-+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 +			};
 +
  			mmc0_pins_a: mmc0@0 {
- 				allwinner,pins = "PF0", "PF1", "PF2",
+ 				pins = "PF0", "PF1", "PF2",
  						 "PF3", "PF4", "PF5";
 --- /dev/null
 +++ b/arch/arm/dts/sun6i-a31-pangolin.dts
@@ -360,7 +358,7 @@
 +CONFIG_SUNXI_SPI=y
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -836,6 +836,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
+@@ -875,6 +875,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
  	Set the SCL pin for the LCD i2c interface. This takes a string in the
  	format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
  

package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch

@@ -2,11 +2,11 @@
 
 --- a/configs/A20-OLinuXino-Lime2_defconfig
 +++ b/configs/A20-OLinuXino-Lime2_defconfig
-@@ -22,6 +22,7 @@ CONFIG_DFU_RAM=y
- CONFIG_ETH_DESIGNWARE=y
+@@ -25,6 +25,7 @@ CONFIG_ETH_DESIGNWARE=y
  CONFIG_RGMII=y
+ CONFIG_MII=y
  CONFIG_SUN7I_GMAC=y
 +CONFIG_GMAC_TX_DELAY=1
  CONFIG_AXP_ALDO3_VOLT=2800
- CONFIG_AXP_ALDO4_VOLT=2800
- CONFIG_SCSI=y
+ CONFIG_AXP_ALDO3_VOLT_SLOPE_08=y
+ CONFIG_AXP_ALDO3_INRUSH_QUIRK=y

package/boot/uboot-sunxi/patches/063-fix-lime2-revK-add-micrel-PHY.patch

@@ -0,0 +1,44 @@
+--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
++++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+@@ -8,6 +8,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+ CONFIG_USB0_VBUS_PIN="PC17"
+ CONFIG_USB0_VBUS_DET="PH5"
+ CONFIG_I2C1_ENABLE=y
++CONFIG_PHY_MICREL=y
++CONFIG_PHY_MICREL_KSZ90X1=y
+ CONFIG_SATAPWR="PC3"
+ CONFIG_AHCI=y
+ CONFIG_NR_DRAM_BANKS=1
+--- a/configs/A20-OLinuXino-Lime2_defconfig
++++ b/configs/A20-OLinuXino-Lime2_defconfig
+@@ -7,6 +7,8 @@ CONFIG_MMC0_CD_PIN="PH1"
+ CONFIG_USB0_VBUS_PIN="PC17"
+ CONFIG_USB0_VBUS_DET="PH5"
+ CONFIG_I2C1_ENABLE=y
++CONFIG_PHY_MICREL=y
++CONFIG_PHY_MICREL_KSZ90X1=y
+ CONFIG_SATAPWR="PC3"
+ CONFIG_AHCI=y
+ CONFIG_NR_DRAM_BANKS=1
+--- a/drivers/net/phy/micrel_ksz90x1.c
++++ b/drivers/net/phy/micrel_ksz90x1.c
+@@ -13,6 +13,8 @@
+ #include <errno.h>
+ #include <micrel.h>
+ #include <phy.h>
++#include <asm/io.h>
++#include <asm/arch/clock.h>
+ 
+ /*
+  * KSZ9021 - KSZ9031 common
+@@ -329,6 +331,10 @@ static int ksz9031_phy_extwrite(struct p
+ static int ksz9031_config(struct phy_device *phydev)
+ {
+ 	int ret;
++	struct sunxi_ccm_reg *const ccm =
++		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
++
++	setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_DELAY(4));
+ 
+ 	ret = ksz9031_of_config(phydev);
+ 	if (ret)

package/boot/uboot-sunxi/patches/100-sun6i-alternate-on-UART2.patch

@@ -6,7 +6,7 @@ Subject: sun6i: define alternate-function for UART2 on GPG
 
 --- a/arch/arm/include/asm/arch-sunxi/gpio.h
 +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
-@@ -185,6 +185,7 @@ enum sunxi_gpio_number {
+@@ -186,6 +186,7 @@ enum sunxi_gpio_number {
  #define SUN6I_GPG_SDC1		2
  #define SUN8I_GPG_SDC1		2
  #define SUN6I_GPG_TWI3		2

package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch

@@ -6,7 +6,7 @@ Subject: ARM: sun6i: Support console on UART2 (GPG6/GPG7)
 
 --- a/arch/arm/mach-sunxi/board.c
 +++ b/arch/arm/mach-sunxi/board.c
-@@ -123,6 +123,10 @@ static int gpio_init(void)
+@@ -127,6 +127,10 @@ static int gpio_init(void)
  	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
  	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
  	sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
@@ -19,7 +19,7 @@ Subject: ARM: sun6i: Support console on UART2 (GPG6/GPG7)
  	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
 --- a/include/configs/sunxi-common.h
 +++ b/include/configs/sunxi-common.h
-@@ -256,6 +256,8 @@ extern int soft_i2c_gpio_scl;
+@@ -258,6 +258,8 @@ extern int soft_i2c_gpio_scl;
  #endif
  #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
  #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"

package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch

@@ -6,7 +6,7 @@ Subject: ARM: sunxi: Make CONS_INDEX configurable
 
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -500,6 +500,14 @@ config SYS_BOARD
+@@ -538,6 +538,14 @@ config SYS_BOARD
  config SYS_SOC
  	default "sunxi"
  

package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch

@@ -17,7 +17,7 @@ Cc: Simon Glass <sjg@chromium.org>
 
 --- a/tools/fit_image.c
 +++ b/tools/fit_image.c
-@@ -649,9 +649,14 @@ static int fit_handle_file(struct image_
+@@ -656,9 +656,14 @@ static int fit_handle_file(struct image_
  		}
  		*cmd = '\0';
  	} else if (params->datafile) {

package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch

@@ -12,7 +12,7 @@ old way of generating images.
 
 --- a/Makefile
 +++ b/Makefile
-@@ -1215,8 +1215,10 @@ endif
+@@ -1344,8 +1344,10 @@ endif
  
  ifneq ($(CONFIG_ARCH_SUNXI),)
  ifeq ($(CONFIG_ARM64),)
@@ -27,7 +27,7 @@ old way of generating images.
  	$(call if_changed,cat)
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -711,7 +711,6 @@ config ARCH_SOCFPGA
+@@ -842,7 +842,6 @@ config ARCH_SOCFPGA
  
  config ARCH_SUNXI
  	bool "Support sunxi (Allwinner) SoCs"

package/boot/uboot-sunxi/patches/221-compatible-old-dtc.patch

@@ -7,7 +7,7 @@ dtc from kernel 4.9.
 
 --- a/scripts/Kbuild.include
 +++ b/scripts/Kbuild.include
-@@ -172,6 +172,11 @@ ld-version = $(shell $(LD) --version | $
+@@ -173,6 +173,11 @@ ld-version = $(shell $(LD) --version | $
  # Usage:  $(call ld-ifversion, -ge, 22252, y)
  ld-ifversion = $(shell [ $(ld-version) $(1) $(2) ] && echo $(3) || echo $(4))
  

package/boot/uboot-sunxi/patches/230-disable-axp209-on-a13-olinuxino.diff

@@ -0,0 +1,19 @@
+--- a/configs/A13-OLinuXino_defconfig
++++ b/configs/A13-OLinuXino_defconfig
+@@ -7,7 +7,6 @@ CONFIG_DRAM_EMR1=0
+ CONFIG_MMC0_CD_PIN="PG0"
+ CONFIG_USB0_VBUS_DET="PG1"
+ CONFIG_USB1_VBUS_PIN="PG11"
+-CONFIG_AXP_GPIO=y
+ # CONFIG_VIDEO_HDMI is not set
+ CONFIG_VIDEO_VGA_VIA_LCD=y
+ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
+@@ -24,7 +23,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
+ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
+ CONFIG_DFU_RAM=y
+ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+-CONFIG_AXP_ALDO3_VOLT=3300
++CONFIG_SUNXI_NO_PMIC=y
+ CONFIG_CONS_INDEX=2
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_MUSB_GADGET=y

package/boot/uboot-sunxi/patches/240-sun50i-h5-Orange-Pi-Zero-Plus-Fix-SdCard-detection.patch

@@ -0,0 +1,28 @@
+From ad320d4d6ad03af5ff730546113d53a47ef6a22e Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sun, 13 Jan 2019 17:05:09 +0100
+Subject: [PATCH] sun50i: h5: Orange Pi Zero Plus: Fix SdCard detection
+
+The Detection pin is at PF6 and not at PH13 like defined before. I
+checked the schematics and now I am am not seeing this error message any
+more:
+Loading Environment from FAT... Card did not respond to voltage select!
+
+Fixes: 76d69eb01de ("sun50i: h5: Add initial Orange Pi Zero Plus support")
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ configs/orangepi_zero_plus_defconfig | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/configs/orangepi_zero_plus_defconfig
++++ b/configs/orangepi_zero_plus_defconfig
+@@ -4,8 +4,7 @@ CONFIG_SPL=y
+ CONFIG_MACH_SUN50I_H5=y
+ CONFIG_DRAM_CLK=624
+ CONFIG_DRAM_ZQ=3881977
+-CONFIG_MMC0_CD_PIN="PH13"
+-CONFIG_MMC_SUNXI_SLOT_EXTRA=2
++CONFIG_MMC0_CD_PIN="PF6"
+ CONFIG_NR_DRAM_BANKS=1
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+ # CONFIG_CMD_FLASH is not set

package/boot/uboot-sunxi/patches/250-Sinovoip-BPI-M2-Ultra-defconfig.patch

@@ -0,0 +1,25 @@
+--- /dev/null
++++ b/configs/Sinovoip_BPI_M2_Ultra_defconfig
+@@ -0,0 +1,22 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_SPL=y
++CONFIG_MACH_SUN8I_R40=y
++CONFIG_DRAM_CLK=576
++CONFIG_DRAM_ZQ=3881979
++CONFIG_MACPWR="PA17"
++CONFIG_MMC0_CD_PIN="PH13"
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
++CONFIG_AHCI=y
++CONFIG_NR_DRAM_BANKS=1
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_SPL_I2C_SUPPORT=y
++# CONFIG_CMD_FLASH is not set
++CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra"
++CONFIG_SCSI_AHCI=y
++CONFIG_RGMII=y
++CONFIG_SUN8I_EMAC=y
++CONFIG_AXP_DLDO4_VOLT=2500
++CONFIG_AXP_ELDO3_VOLT=1200
++CONFIG_SCSI=y
++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

package/boot/uboot-sunxi/patches/310-sunxi-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch

@@ -1,63 +0,0 @@
-From 96c04aab58e351fa9ed7e95783018d6dbf60768f Mon Sep 17 00:00:00 2001
-From: Jun Nie <jun.nie@linaro.org>
-Date: Mon, 7 May 2018 13:03:40 +0530
-Subject: sunxi: h3: Sync OTG and HCI nodes from Linux DT
-
-Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
-or MUSB controller.
-
-Signed-off-by: Jun Nie <jun.nie@linaro.org>
-Reviewed-by: Jagan Teki <jagan@openedev.com>
-Acked-by: Jun Nie <jun.nie@linaro.org>
----
- arch/arm/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
---- a/arch/arm/dts/sun8i-h3.dtsi
-+++ b/arch/arm/dts/sun8i-h3.dtsi
-@@ -219,6 +219,19 @@
- 			#size-cells = <0>;
- 		};
- 
-+		usb_otg: usb@1c19000 {
-+			compatible = "allwinner,sun8i-h3-musb";
-+			reg = <0x01c19000 0x400>;
-+			clocks = <&ccu CLK_BUS_OTG>;
-+			resets = <&ccu RST_BUS_OTG>;
-+			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "mc";
-+			phys = <&usbphy 0>;
-+			phy-names = "usb";
-+			extcon = <&usbphy 0>;
-+			status = "disabled";
-+		};
-+
- 		usbphy: phy@01c19400 {
- 			compatible = "allwinner,sun8i-h3-usb-phy";
- 			reg = <0x01c19400 0x2c>,
-@@ -251,6 +264,25 @@
- 			#phy-cells = <1>;
- 		};
- 
-+		ehci0: usb@1c1a000 {
-+			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
-+			reg = <0x01c1a000 0x100>;
-+			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
-+			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
-+			status = "disabled";
-+		};
-+
-+		ohci0: usb@1c1a400 {
-+			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
-+			reg = <0x01c1a400 0x100>;
-+			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
-+				 <&ccu CLK_USB_OHCI0>;
-+			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
-+			status = "disabled";
-+		};
-+
- 		ehci1: usb@01c1b000 {
- 			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
- 			reg = <0x01c1b000 0x100>;

package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch

@@ -1,179 +0,0 @@
-From fd3736abbe57a819312c8df96d14ec396b074581 Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Tue, 26 Sep 2017 22:16:59 +0200
-Subject: sun8i: h2: Add initial Orange Pi R1
-
-Orange Pi R1 is an open-source single-board computer using the
-Allwinner H2+ SOC.
-
-H2+ Orange Pi R1 has
- - Quad-core Cortex-A7
- - 256MB DDR3
- - micrSD slot
- - 128MBit SPI Nor flash
- - Debug TTL UART
- - 100MBit/s Ethernet (H2+)
- - 100MBit/s Ethernet (RTL8152B)
- - Wifi (RTL8189ETV)
- - USB 2.0 OTG + power supply
-This board is very similar to the Orange Pi Zero.
-
-The device tree file is copied from the Linux kernel 4.18.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
----
- arch/arm/dts/Makefile                      |   1 +
- arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 101 +++++++++++++++++++++++++++++
- board/sunxi/MAINTAINERS                    |   5 ++
- configs/orangepi_r1_defconfig              |  16 +++++
- 4 files changed, 123 insertions(+)
- create mode 100644 arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
- create mode 100644 configs/orangepi_r1_defconfig
-
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -350,6 +350,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
- 	sun8i-a83t-cubietruck-plus.dtb \
- 	sun8i-a83t-tbs-a711.dts
- dtb-$(CONFIG_MACH_SUN8I_H3) += \
-+	sun8i-h2-plus-orangepi-r1.dtb \
- 	sun8i-h2-plus-orangepi-zero.dtb \
- 	sun8i-h3-bananapi-m2-plus.dtb \
- 	sun8i-h3-libretech-all-h3-cc.dtb \
---- /dev/null
-+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
-@@ -0,0 +1,101 @@
-+/*
-+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This file is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/* Orange Pi R1 is based on Orange Pi Zero design */
-+#include "sun8i-h2-plus-orangepi-zero.dts"
-+
-+/ {
-+	model = "Xunlong Orange Pi R1";
-+	compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus";
-+
-+	/delete-node/ reg_vcc_wifi;
-+
-+	/*
-+	 * Ths pin of this regulator is the same with the Wi-Fi extra
-+	 * regulator on the original Zero. However it's used for USB
-+	 * Ethernet rather than the Wi-Fi now.
-+	 */
-+	reg_vcc_usb_eth: reg-vcc-usb-ethernet {
-+		compatible = "regulator-fixed";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-name = "vcc-usb-ethernet";
-+		enable-active-high;
-+		gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
-+	};
-+
-+	aliases {
-+		ethernet1 = &rtl8189etv;
-+	};
-+};
-+
-+/*
-+&spi0 {
-+	status = "okay";
-+
-+	flash@0 {
-+		compatible = "mxicy,mx25l12805d", "jedec,spi-nor";
-+	};
-+};
-+*/
-+
-+&ohci1 {
-+	/*
-+	 * RTL8152B USB-Ethernet adapter is connected to USB1,
-+	 * and it's a USB 2.0 device. So the OHCI1 controller
-+	 * can be left disabled.
-+	 */
-+	status = "disabled";
-+};
-+
-+&mmc1 {
-+	vmmc-supply = <&reg_vcc3v3>;
-+	vqmmc-supply = <&reg_vcc3v3>;
-+
-+	rtl8189etv: sdio_wifi@1 {
-+		reg = <1>;
-+	};
-+};
-+
-+&usbphy {
-+	usb1_vbus-supply = <&reg_vcc_usb_eth>;
-+};
---- a/board/sunxi/MAINTAINERS
-+++ b/board/sunxi/MAINTAINERS
-@@ -342,6 +342,11 @@ M:	Jagan Teki <jagan@amarulasolutions.co
- S:	Maintained
- F:	configs/orangepi_prime_defconfig
- 
-+ORANGEPI R1 BOARD
-+M:	Hauke Mehrtens <hauke@hauke-m.de>
-+S:	Maintained
-+F:	configs/orangepi_r1_defconfig
-+
- PINE64 BOARDS
- M:	Andre Przywara <andre.przywara@arm.com>
- S:	Maintained
---- /dev/null
-+++ b/configs/orangepi_r1_defconfig
-@@ -0,0 +1,16 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN8I_H3=y
-+CONFIG_DRAM_CLK=624
-+CONFIG_DRAM_ZQ=3881979
-+CONFIG_DRAM_ODT_EN=y
-+# CONFIG_VIDEO_DE2 is not set
-+CONFIG_SPL_SPI_SUNXI=y
-+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1"
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_CONSOLE_MUX=y
-+# CONFIG_CMD_FLASH is not set
-+CONFIG_SUN8I_EMAC=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

package/boot/uboot-sunxi/patches/400-ARM-dts-orange-pi-zero-plus.patch

@@ -1,222 +0,0 @@
-From fd576a3c594ee2356b50a0738403e5cef094935a Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sat, 9 Jun 2018 15:16:42 +0200
-Subject: sun50i: h5: Add initial Orange Pi Zero Plus support
-
-Orange Pi Zero Plus is an open-source single-board computer
-using the Allwinner H5 SOC.
-
-H5 Orangepi Zero Plus has
- - Quad-core Cortex-A53
- - 512MB DDR3
- - micrSD slot
- - 16MBit SPI Nor flash
- - Debug TTL UART
- - 1GBit/s Ethernet (RTL8211E)
- - Wifi (RTL8189FTV)
- - USB 2.0 Host
- - USB 2.0 OTG + power supply
-
-The device tree file is copied from the Linux kernel 4.18.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
----
- arch/arm/dts/Makefile                         |   1 +
- arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 145 ++++++++++++++++++++++++++
- board/sunxi/MAINTAINERS                       |   5 +
- configs/orangepi_zero_plus_defconfig          |  16 +++
- 4 files changed, 167 insertions(+)
- create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
- create mode 100644 configs/orangepi_zero_plus_defconfig
-
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -372,6 +372,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
- dtb-$(CONFIG_MACH_SUN50I_H5) += \
- 	sun50i-h5-nanopi-neo2.dtb \
- 	sun50i-h5-nanopi-neo-plus2.dtb \
-+	sun50i-h5-orangepi-zero-plus.dtb \
- 	sun50i-h5-orangepi-pc2.dtb \
- 	sun50i-h5-orangepi-prime.dtb \
- 	sun50i-h5-orangepi-zero-plus2.dtb
---- /dev/null
-+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-@@ -0,0 +1,145 @@
-+/*
-+ * Copyright (C) 2016 ARM Ltd.
-+ * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
-+ *
-+ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
-+ */
-+
-+/dts-v1/;
-+#include "sun50i-h5.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/pinctrl/sun4i-a10.h>
-+
-+/ {
-+	model = "Xunlong Orange Pi Zero Plus";
-+	compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
-+
-+	reg_vcc3v3: vcc3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc3v3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	aliases {
-+		ethernet0 = &emac;
-+		ethernet1 = &rtl8189ftv;
-+		serial0 = &uart0;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		pwr {
-+			label = "orangepi:green:pwr";
-+			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
-+			default-state = "on";
-+		};
-+
-+		status {
-+			label = "orangepi:red:status";
-+			gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
-+		};
-+	};
-+
-+	reg_gmac_3v3: gmac-3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "gmac-3v3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		startup-delay-us = <100000>;
-+		enable-active-high;
-+		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
-+	};
-+};
-+
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ehci1 {
-+	status = "okay";
-+};
-+
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii";
-+	status = "okay";
-+};
-+
-+&external_mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-+
-+&mmc0 {
-+	vmmc-supply = <&reg_vcc3v3>;
-+	bus-width = <4>;
-+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-+	status = "okay";
-+};
-+
-+&mmc1 {
-+	vmmc-supply = <&reg_vcc3v3>;
-+	bus-width = <4>;
-+	non-removable;
-+	status = "okay";
-+
-+	/*
-+	 * Explicitly define the sdio device, so that we can add an ethernet
-+	 * alias for it (which e.g. makes u-boot set a mac-address).
-+	 */
-+	rtl8189ftv: sdio_wifi@1 {
-+		reg = <1>;
-+	};
-+};
-+
-+/*
-+&spi0  {
-+	status = "okay";
-+
-+	flash@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "mxicy,mx25l1606e", "winbond,w25q128";
-+		reg = <0>;
-+		spi-max-frequency = <40000000>;
-+	};
-+};
-+*/
-+
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&ohci1 {
-+	status = "okay";
-+};
-+
-+&uart0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart0_pins_a>;
-+	status = "okay";
-+};
-+
-+&usb_otg {
-+	dr_mode = "peripheral";
-+	status = "okay";
-+};
-+
-+&usbphy {
-+	/* USB Type-A ports' VBUS is always on */
-+	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
-+	status = "okay";
-+};
---- a/board/sunxi/MAINTAINERS
-+++ b/board/sunxi/MAINTAINERS
-@@ -327,6 +327,11 @@ M:	Icenowy Zheng <icenowy@aosc.xyz>
- S:	Maintained
- F:	configs/orangepi_zero_defconfig
- 
-+ORANGEPI ZERO PLUS BOARD
-+M:	Hauke Mehrtens <hauke@hauke-m.de>
-+S:	Maintained
-+F:	configs/orangepi_zero_plus_defconfig
-+
- ORANGEPI ZERO PLUS 2 BOARD
- M:	Jagan Teki <jagan@amarulasolutions.com>
- S:	Maintained
---- /dev/null
-+++ b/configs/orangepi_zero_plus_defconfig
-@@ -0,0 +1,16 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN50I_H5=y
-+CONFIG_DRAM_CLK=624
-+CONFIG_DRAM_ZQ=3881977
-+CONFIG_MMC0_CD_PIN="PH13"
-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
-+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+# CONFIG_CMD_FLASH is not set
-+# CONFIG_SPL_DOS_PARTITION is not set
-+# CONFIG_SPL_EFI_PARTITION is not set
-+CONFIG_SUN8I_EMAC=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

package/boot/uboot-xburst/Makefile

@@ -1,88 +0,0 @@
-#
-# Copyright (C) 2010 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=u-boot
-PKG_VERSION:=2012.10-rc2
-PKG_RELEASE:=1
-
-PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
-PKG_SOURCE_URL:= \
-	http://mirror2.openwrt.org/sources \
-	ftp://ftp.denx.de/pub/u-boot
-PKG_HASH:=6d094cafa7ecea8b671fbdcd21130b6a4f5744fc47dd263e101ed5d3629dffd4
-PKG_TARGETS:=bin
-
-PKG_LICENSE:=GPL-2.0 GPL-2.0+
-PKG_LICENSE_FILES:=Licenses/README
-
-include $(INCLUDE_DIR)/package.mk
-
-define uboot/Default
-  TITLE:=
-  CONFIG:=
-  IMAGE:=
-endef
-
-define uboot/qi_lb60
-  TITLE:=U-boot for the qi_lb60 board
-endef
-
-UBOOTS:=qi_lb60
-
-define Package/uboot/template
-define Package/uboot-xburst-$(1)
-  SECTION:=boot
-  CATEGORY:=Boot Loaders
-  DEPENDS:=@TARGET_xburst
-  TITLE:=$(2)
-  URL:=http://www.denx.de/wiki/UBoot/WebHome
-  VARIANT:=$(1)
-endef
-endef
-
-define BuildUbootPackage
-	$(eval $(uboot/Default))
-	$(eval $(uboot/$(1)))
-	$(call Package/uboot/template,$(1),$(TITLE))
-endef
-
-
-ifdef BUILD_VARIANT
-$(eval $(call uboot/$(BUILD_VARIANT)))
-UBOOT_CONFIG:=$(if $(CONFIG),$(CONFIG),$(BUILD_VARIANT))
-UBOOT_IMAGE:=$(if $(IMAGE),$(IMAGE),openwrt-$(BOARD)-$(BUILD_VARIANT)-u-boot.bin)
-endif
-
-define Build/Configure
-	$(MAKE) -C $(PKG_BUILD_DIR) \
-		$(UBOOT_CONFIG)_config
-endef
-
-define Build/Compile
-	$(MAKE) -C $(PKG_BUILD_DIR) \
-		CROSS_COMPILE=$(TARGET_CROSS)
-endef
-
-define Package/uboot/install/template
-define Package/uboot-xburst-$(1)/install
-	$(CP) $(PKG_BUILD_DIR)/u-boot-xburst.bin $(BIN_DIR)/$(2)
-	rmdir $$(1)
-endef
-endef
-
-$(foreach u,$(UBOOTS), \
-	$(eval $(call Package/uboot/install/template,$(u),openwrt-$(BOARD)-$(u)-u-boot.bin)) \
-)
-
-$(foreach u,$(UBOOTS), \
-	$(eval $(call BuildUbootPackage,$(u))) \
-	$(eval $(call BuildPackage,uboot-xburst-$(u))) \
-)

package/boot/uboot-xburst/patches/0001-qi_lb60-add-nand-spl-support.patch

@@ -1,894 +0,0 @@
-From 0329cf7965956a5a7044827e0ce88ae8d5150e54 Mon Sep 17 00:00:00 2001
-From: Xiangfu <xiangfu@openmobilefree.net>
-Date: Fri, 12 Oct 2012 09:46:58 +0800
-Subject: [PATCH 1/6] qi_lb60: add nand spl support
-
-  The JZ4740 CPU can load 8KB from two different addresses:
-   1. the normal area up to 8KB starting from NAND flash address 0x00000000
-   2. the backup area up to 8KB starting from NAND flash address 0x00002000
-
-Signed-off-by: Xiangfu <xiangfu@openmobilefree.net>
----
- Makefile                          |   12 +++
- arch/mips/cpu/xburst/Makefile     |    7 +-
- arch/mips/cpu/xburst/cpu.c        |    4 +
- arch/mips/cpu/xburst/jz4740.c     |   82 +++++++----------
- arch/mips/cpu/xburst/spl/Makefile |   47 ++++++++++
- arch/mips/cpu/xburst/spl/start.S  |   63 +++++++++++++
- board/qi/qi_lb60/Makefile         |    4 +
- board/qi/qi_lb60/qi_lb60-spl.c    |   30 +++++++
- board/qi/qi_lb60/qi_lb60.c        |    8 +-
- board/qi/qi_lb60/u-boot-spl.lds   |   61 +++++++++++++
- drivers/mtd/nand/jz4740_nand.c    |   39 ++++++++-
- include/configs/qi_lb60.h         |  175 ++++++++++++++++++-------------------
- 12 files changed, 386 insertions(+), 146 deletions(-)
- create mode 100644 arch/mips/cpu/xburst/spl/Makefile
- create mode 100644 arch/mips/cpu/xburst/spl/start.S
- create mode 100644 board/qi/qi_lb60/qi_lb60-spl.c
- create mode 100644 board/qi/qi_lb60/u-boot-spl.lds
-
-diff --git a/Makefile b/Makefile
-index 34d9075..a22778e 100644
---- a/Makefile
-+++ b/Makefile
-@@ -393,6 +393,10 @@ ALL-y += $(obj)u-boot-nodtb-tegra.bin
- endif
- endif
- 
-+ifeq ($(CPU),xburst)
-+ALL-y += $(obj)u-boot-xburst.bin
-+endif
-+
- all:		$(ALL-y) $(SUBDIR_EXAMPLES)
- 
- $(obj)u-boot.dtb:	$(obj)u-boot
-@@ -506,6 +510,14 @@ $(obj)u-boot-nodtb-tegra.bin:	$(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- endif
- endif
- 
-+ifeq ($(CPU),xburst)
-+$(obj)u-boot-xburst.bin:	$(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-+	        dd if=$(obj)spl/u-boot-spl.bin of=$(obj)spl/u-boot-pad.bin conv=sync bs=8192 count=1
-+		dd if=$(obj)spl/u-boot-spl.bin of=$(obj)spl/u-boot-pad.bin conv=sync,notrunc oflag=append bs=8192 count=1
-+	        tr '\0' '\377' < /dev/zero | dd of=$(obj)spl/u-boot-pad.bin conv=sync,notrunc oflag=append bs=16384 count=1
-+	        cat $(obj)spl/u-boot-pad.bin u-boot.bin > $@
-+endif
-+
- ifeq ($(CONFIG_SANDBOX),y)
- GEN_UBOOT = \
- 		cd $(LNDIR) && $(CC) $(SYMS) -T $(obj)u-boot.lds \
-diff --git a/arch/mips/cpu/xburst/Makefile b/arch/mips/cpu/xburst/Makefile
-index b1f2ae4..ec35e55 100644
---- a/arch/mips/cpu/xburst/Makefile
-+++ b/arch/mips/cpu/xburst/Makefile
-@@ -24,9 +24,12 @@ include $(TOPDIR)/config.mk
- 
- LIB	= $(obj)lib$(CPU).o
- 
-+COBJS-y	= cpu.o jz_serial.o
-+
-+ifneq ($(CONFIG_SPL_BUILD),y)
- START	= start.o
--SOBJS-y	=
--COBJS-y	= cpu.o timer.o jz_serial.o
-+COBJS-y += timer.o
-+endif
- 
- COBJS-$(CONFIG_JZ4740) += jz4740.o
- 
-diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
-index ddcbfaa..1432838 100644
---- a/arch/mips/cpu/xburst/cpu.c
-+++ b/arch/mips/cpu/xburst/cpu.c
-@@ -42,6 +42,8 @@
- 		:			\
- 		: "i" (op), "R" (*(unsigned char *)(addr)))
- 
-+#ifndef CONFIG_SPL_BUILD
-+
- void __attribute__((weak)) _machine_restart(void)
- {
- 	struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE;
-@@ -109,6 +111,8 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
- 		cache_op(Hit_Invalidate_D, addr);
- }
- 
-+#endif
-+
- void flush_icache_all(void)
- {
- 	u32 addr, t = 0;
-diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
-index c0b9817..8816aa3 100644
---- a/arch/mips/cpu/xburst/jz4740.c
-+++ b/arch/mips/cpu/xburst/jz4740.c
-@@ -32,31 +32,19 @@ int disable_interrupts(void)
- 	return 0;
- }
- 
--/*
-- * PLL output clock = EXTAL * NF / (NR * NO)
-- * NF = FD + 2, NR = RD + 2
-- * NO = 1 (if OD = 0), NO = 2 (if OD = 1 or 2), NO = 4 (if OD = 3)
-- */
- void pll_init(void)
- {
- 	struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE;
- 
--	register unsigned int cfcr, plcr1;
--	int n2FR[33] = {
--		0, 0, 1, 2, 3, 0, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0,
--		7, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,
--		9
--	};
--	int div[5] = {1, 3, 3, 3, 3}; /* divisors of I:S:P:L:M */
--	int nf, pllout2;
-+	register unsigned int cfcr, plcr;
-+	unsigned int nf, pllout2;
- 
- 	cfcr =	CPM_CPCCR_CLKOEN |
--		CPM_CPCCR_PCS |
--		(n2FR[div[0]] << CPM_CPCCR_CDIV_BIT) |
--		(n2FR[div[1]] << CPM_CPCCR_HDIV_BIT) |
--		(n2FR[div[2]] << CPM_CPCCR_PDIV_BIT) |
--		(n2FR[div[3]] << CPM_CPCCR_MDIV_BIT) |
--		(n2FR[div[4]] << CPM_CPCCR_LDIV_BIT);
-+		(0 << CPM_CPCCR_CDIV_BIT) |
-+		(2 << CPM_CPCCR_HDIV_BIT) |
-+		(2 << CPM_CPCCR_PDIV_BIT) |
-+		(2 << CPM_CPCCR_MDIV_BIT) |
-+		(2 << CPM_CPCCR_LDIV_BIT);
- 
- 	pllout2 = (cfcr & CPM_CPCCR_PCS) ?
- 		CONFIG_SYS_CPU_SPEED : (CONFIG_SYS_CPU_SPEED / 2);
-@@ -65,15 +53,18 @@ void pll_init(void)
- 	writel(pllout2 / 48000000 - 1, &cpm->uhccdr);
- 
- 	nf = CONFIG_SYS_CPU_SPEED * 2 / CONFIG_SYS_EXTAL;
--	plcr1 = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | /* FD */
-+	plcr = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | /* FD */
- 		(0 << CPM_CPPCR_PLLN_BIT) |	/* RD=0, NR=2 */
- 		(0 << CPM_CPPCR_PLLOD_BIT) |	/* OD=0, NO=1 */
--		(0x20 << CPM_CPPCR_PLLST_BIT) |	/* PLL stable time */
-+		(0x32 << CPM_CPPCR_PLLST_BIT) |	/* PLL stable time */
- 		CPM_CPPCR_PLLEN;		/* enable PLL */
- 
- 	/* init PLL */
- 	writel(cfcr, &cpm->cpccr);
--	writel(plcr1, &cpm->cppcr);
-+	writel(plcr, &cpm->cppcr);
-+
-+	while (!(readl(&cpm->cppcr) & CPM_CPPCR_PLLS))
-+		;
- }
- 
- void sdram_init(void)
-@@ -92,26 +83,12 @@ void sdram_init(void)
- 		2 << EMC_DMCR_TCL_BIT	/* CAS latency is 3 */
- 	};
- 
--	int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
--
- 	cpu_clk = CONFIG_SYS_CPU_SPEED;
--	mem_clk = cpu_clk * div[__cpm_get_cdiv()] / div[__cpm_get_mdiv()];
-+	mem_clk = 84000000;
- 
- 	writel(0, &emc->bcr);	/* Disable bus release */
- 	writew(0, &emc->rtcsr);	/* Disable clock for counting */
- 
--	/* Fault DMCR value for mode register setting*/
--#define SDRAM_ROW0	11
--#define SDRAM_COL0	8
--#define SDRAM_BANK40	0
--
--	dmcr0 = ((SDRAM_ROW0 - 11) << EMC_DMCR_RA_BIT) |
--		((SDRAM_COL0 - 8) << EMC_DMCR_CA_BIT) |
--		(SDRAM_BANK40 << EMC_DMCR_BA_BIT) |
--		(SDRAM_BW16 << EMC_DMCR_BW_BIT) |
--		EMC_DMCR_EPIN |
--		cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)];
--
- 	/* Basic DMCR value */
- 	dmcr = ((SDRAM_ROW - 11) << EMC_DMCR_RA_BIT) |
- 		((SDRAM_COL - 8) << EMC_DMCR_CA_BIT) |
-@@ -128,31 +105,31 @@ void sdram_init(void)
- 	if (tmp > 11)
- 		tmp = 11;
- 	dmcr |= (tmp - 4) << EMC_DMCR_TRAS_BIT;
--	tmp = SDRAM_RCD / ns;
- 
-+	tmp = SDRAM_RCD / ns;
- 	if (tmp > 3)
- 		tmp = 3;
- 	dmcr |= tmp << EMC_DMCR_RCD_BIT;
--	tmp = SDRAM_TPC / ns;
- 
-+	tmp = SDRAM_TPC / ns;
- 	if (tmp > 7)
- 		tmp = 7;
- 	dmcr |= tmp << EMC_DMCR_TPC_BIT;
--	tmp = SDRAM_TRWL / ns;
- 
-+	tmp = SDRAM_TRWL / ns;
- 	if (tmp > 3)
- 		tmp = 3;
- 	dmcr |= tmp << EMC_DMCR_TRWL_BIT;
--	tmp = (SDRAM_TRAS + SDRAM_TPC) / ns;
- 
-+	tmp = (SDRAM_TRAS + SDRAM_TPC) / ns;
- 	if (tmp > 14)
- 		tmp = 14;
- 	dmcr |= ((tmp + 1) >> 1) << EMC_DMCR_TRC_BIT;
- 
- 	/* SDRAM mode value */
--	sdmode = EMC_SDMR_BT_SEQ |
--		 EMC_SDMR_OM_NORMAL |
--		 EMC_SDMR_BL_4 |
-+	sdmode = EMC_SDMR_BT_SEQ	|
-+		 EMC_SDMR_OM_NORMAL	|
-+		 EMC_SDMR_BL_4		|
- 		 cas_latency_sdmr[((SDRAM_CASL == 3) ? 1 : 0)];
- 
- 	/* Stage 1. Precharge all banks by writing SDMR with DMCR.MRSET=0 */
-@@ -172,8 +149,8 @@ void sdram_init(void)
- 	if (tmp > 0xff)
- 		tmp = 0xff;
- 	writew(tmp, &emc->rtcor);
-+
- 	writew(0, &emc->rtcnt);
--	/* Divisor is 64, CKO/64 */
- 	writew(EMC_RTCSR_CKS_64, &emc->rtcsr);
- 
- 	/* Wait for number of auto-refresh cycles */
-@@ -182,13 +159,17 @@ void sdram_init(void)
- 		;
- 
- 	/* Stage 3. Mode Register Set */
-+	dmcr0 = (11 << EMC_DMCR_RA_BIT)	|
-+		(8 << EMC_DMCR_CA_BIT)	|
-+		(0 << EMC_DMCR_BA_BIT)	|
-+		EMC_DMCR_EPIN		|
-+		(SDRAM_BW16 << EMC_DMCR_BW_BIT) |
-+		cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)];
- 	writel(dmcr0 | EMC_DMCR_RFSH | EMC_DMCR_MRSET, &emc->dmcr);
- 	writeb(0, JZ4740_EMC_SDMR0 | sdmode);
- 
- 	/* Set back to basic DMCR value */
- 	writel(dmcr | EMC_DMCR_RFSH | EMC_DMCR_MRSET, &emc->dmcr);
--
--	/* everything is ok now */
- }
- 
- DECLARE_GLOBAL_DATA_PTR;
-@@ -232,9 +213,10 @@ void rtc_init(void)
- phys_size_t initdram(int board_type)
- {
- 	struct jz4740_emc *emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
--	u32 dmcr;
--	u32 rows, cols, dw, banks;
--	ulong size;
-+
-+	unsigned int dmcr;
-+	unsigned int rows, cols, dw, banks;
-+	unsigned long size;
- 
- 	dmcr = readl(&emc->dmcr);
- 	rows = 11 + ((dmcr & EMC_DMCR_RA_MASK) >> EMC_DMCR_RA_BIT);
-diff --git a/arch/mips/cpu/xburst/spl/Makefile b/arch/mips/cpu/xburst/spl/Makefile
-new file mode 100644
-index 0000000..f45e8c8
---- /dev/null
-+++ b/arch/mips/cpu/xburst/spl/Makefile
-@@ -0,0 +1,47 @@
-+#
-+# Copyright (C) 2011 Xiangfu Liu <xiangfu@openmobilefree.net>
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB	= $(obj)lib$(CPU).o
-+
-+START	= start.o
-+SOBJS-y	=
-+COBJS-y	=
-+
-+SRCS	:= $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-+OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-+START	:= $(addprefix $(obj),$(START))
-+
-+all:	$(obj).depend $(START) $(LIB)
-+
-+$(LIB):	$(OBJS)
-+	$(call cmd_link_o_target, $(OBJS))
-+
-+#########################################################################
-+
-+# defines $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
-diff --git a/arch/mips/cpu/xburst/spl/start.S b/arch/mips/cpu/xburst/spl/start.S
-new file mode 100644
-index 0000000..e31c4c8
---- /dev/null
-+++ b/arch/mips/cpu/xburst/spl/start.S
-@@ -0,0 +1,63 @@
-+/*
-+ * Copyright (c) 2010 Xiangfu Liu <xiangfu@openmobilefree.net>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 3 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <config.h>
-+#include <version.h>
-+#include <asm/regdef.h>
-+#include <asm/mipsregs.h>
-+#include <asm/addrspace.h>
-+#include <asm/cacheops.h>
-+
-+#include <asm/jz4740.h>
-+
-+	.set noreorder
-+
-+	.globl _start
-+	.text
-+_start:
-+	.word JZ4740_NANDBOOT_CFG /* fetched during NAND Boot */
-+reset:
-+	/*
-+	 * STATUS register
-+	 * CU0=UM=EXL=IE=0, BEV=ERL=1, IP2~7=1
-+	 */
-+	li	t0, 0x0040FC04
-+	mtc0	t0, CP0_STATUS
-+	/*
-+	 * CAUSE register
-+	 * IV=1, use the specical interrupt vector (0x200)
-+	 */
-+	li	t1, 0x00800000
-+	mtc0	t1, CP0_CAUSE
-+
-+	bal     1f
-+	 nop
-+	.word   _GLOBAL_OFFSET_TABLE_
-+1:
-+	move    gp, ra
-+	lw      t1, 0(ra)
-+	move	gp, t1
-+
-+	la	sp, 0x80004000
-+	la	t9, nand_spl_boot
-+	j	t9
-+	nop
-diff --git a/board/qi/qi_lb60/Makefile b/board/qi/qi_lb60/Makefile
-index 5dae11b..e399246 100644
---- a/board/qi/qi_lb60/Makefile
-+++ b/board/qi/qi_lb60/Makefile
-@@ -22,7 +22,11 @@ include $(TOPDIR)/config.mk
- 
- LIB	= $(obj)lib$(BOARD).o
- 
-+ifeq ($(CONFIG_SPL_BUILD),y)
-+COBJS	:= $(BOARD)-spl.o
-+else
- COBJS	:= $(BOARD).o
-+endif
- 
- SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
- OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-diff --git a/board/qi/qi_lb60/qi_lb60-spl.c b/board/qi/qi_lb60/qi_lb60-spl.c
-new file mode 100644
-index 0000000..3fe3fa3
---- /dev/null
-+++ b/board/qi/qi_lb60/qi_lb60-spl.c
-@@ -0,0 +1,30 @@
-+/*
-+ * Authors: Xiangfu Liu <xiangfu@openmobilefree.cc>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 3 of the License, or (at your option) any later version.
-+ */
-+
-+#include <common.h>
-+#include <nand.h>
-+#include <asm/io.h>
-+#include <asm/jz4740.h>
-+
-+void nand_spl_boot(void)
-+{
-+	__gpio_as_sdram_16bit_4720();
-+	__gpio_as_uart0();
-+	__gpio_jtag_to_uart0();
-+
-+	serial_init();
-+
-+	pll_init();
-+	sdram_init();
-+
-+	nand_init();
-+
-+	puts("\nQi LB60 SPL: Starting U-Boot ...\n");
-+	nand_boot();
-+}
-diff --git a/board/qi/qi_lb60/qi_lb60.c b/board/qi/qi_lb60/qi_lb60.c
-index d975209..3bd4e2f 100644
---- a/board/qi/qi_lb60/qi_lb60.c
-+++ b/board/qi/qi_lb60/qi_lb60.c
-@@ -1,5 +1,5 @@
- /*
-- * Authors: Xiangfu Liu <xiangfu@sharism.cc>
-+ * Authors: Xiangfu Liu <xiangfu@openmobilefree.net>
-  *
-  * This program is free software; you can redistribute it and/or
-  * modify it under the terms of the GNU General Public License
-@@ -97,8 +97,10 @@ int board_early_init_f(void)
- /* U-Boot common routines */
- int checkboard(void)
- {
--	printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC, Speed %ld MHz)\n",
--	       gd->cpu_clk / 1000000);
-+	printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC)\n");
-+	printf(" CPU: %ld\n", gd->cpu_clk);
-+	printf(" MEM: %ld\n", gd->mem_clk);
-+	printf(" DEV: %ld\n", gd->dev_clk);
- 
- 	return 0;
- }
-diff --git a/board/qi/qi_lb60/u-boot-spl.lds b/board/qi/qi_lb60/u-boot-spl.lds
-new file mode 100644
-index 0000000..930537f
---- /dev/null
-+++ b/board/qi/qi_lb60/u-boot-spl.lds
-@@ -0,0 +1,61 @@
-+/*
-+ * (C) Copyright 2012 Xiangfu Liu <xiangfu@openmobilefree.net>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
-+
-+OUTPUT_ARCH(mips)
-+ENTRY(_start)
-+SECTIONS
-+{
-+	. = 0x80000000;
-+	. = ALIGN(4);
-+	.text :
-+	{
-+	  *(.text)
-+	}
-+
-+	. = ALIGN(4);
-+	.rodata  : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-+
-+	. = ALIGN(4);
-+	.data  : { *(.data) }
-+
-+	. = ALIGN(4);
-+	.sdata  : { *(.sdata) }
-+
-+	_gp = ALIGN(16);
-+
-+	__got_start = .;
-+	.got  : { *(.got) }
-+	__got_end = .;
-+
-+	. = .;
-+	__u_boot_cmd_start = .;
-+	.u_boot_cmd : { *(.u_boot_cmd) }
-+	__u_boot_cmd_end = .;
-+
-+	uboot_end_data = .;
-+	num_got_entries = (__got_end - __got_start) >> 2;
-+
-+	. = ALIGN(4);
-+	.sbss  : { *(.sbss) }
-+	.bss  : { *(.bss) }
-+	uboot_end = .;
-+}
-+ASSERT(uboot_end <= 0x80002000, "NAND bootstrap too big");
-diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
-index 3ec34f3..24a4921 100644
---- a/drivers/mtd/nand/jz4740_nand.c
-+++ b/drivers/mtd/nand/jz4740_nand.c
-@@ -15,6 +15,9 @@
- #include <asm/io.h>
- #include <asm/jz4740.h>
- 
-+#ifdef CONFIG_SPL_BUILD
-+#define printf(s) puts(s)
-+#endif
- #define JZ_NAND_DATA_ADDR ((void __iomem *)0xB8000000)
- #define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
- #define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x10000)
-@@ -176,7 +179,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
- 		for (k = 0; k < 9; k++)
- 			writeb(read_ecc[k], &emc->nfpar[k]);
- 	}
--	/* Set PRDY */
-+
- 	writel(readl(&emc->nfecr) | EMC_NFECR_PRDY, &emc->nfecr);
- 
- 	/* Wait for completion */
-@@ -184,7 +187,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
- 		status = readl(&emc->nfints);
- 	} while (!(status & EMC_NFINTS_DECF));
- 
--	/* disable ecc */
-+	/* Disable ECC */
- 	writel(readl(&emc->nfecr) & ~EMC_NFECR_ECCE, &emc->nfecr);
- 
- 	/* Check decoding */
-@@ -192,7 +195,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
- 		return 0;
- 
- 	if (status & EMC_NFINTS_UNCOR) {
--		printf("uncorrectable ecc\n");
-+		printf("JZ4740 uncorrectable ECC\n");
- 		return -1;
- 	}
- 
-@@ -230,6 +233,32 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
- 	return errcnt;
- }
- 
-+#ifdef CONFIG_SPL_BUILD
-+static void jz_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
-+{
-+	int i;
-+	struct nand_chip *this = mtd->priv;
-+
-+#if (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R3) || \
-+	(JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R2)
-+	for (i = 0; i < len; i += 2)
-+		buf[i] = readw(this->IO_ADDR_R);
-+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R3) || \
-+	(JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R2)
-+	for (i = 0; i < len; i++)
-+		buf[i] = readb(this->IO_ADDR_R);
-+#else
-+	#error JZ4740_NANDBOOT_CFG not defined or wrong
-+#endif
-+}
-+
-+static uint8_t jz_nand_read_byte(struct mtd_info *mtd)
-+{
-+	struct nand_chip *this = mtd->priv;
-+	return readb(this->IO_ADDR_R);
-+}
-+#endif
-+
- /*
-  * Main initialization routine
-  */
-@@ -254,6 +283,10 @@ int board_nand_init(struct nand_chip *nand)
- 	nand->ecc.size		= CONFIG_SYS_NAND_ECCSIZE;
- 	nand->ecc.bytes		= CONFIG_SYS_NAND_ECCBYTES;
- 	nand->ecc.layout	= &qi_lb60_ecclayout_2gb;
-+#ifdef CONFIG_SPL_BUILD
-+	nand->read_byte		= jz_nand_read_byte;
-+	nand->read_buf		= jz_nand_read_buf;
-+#endif
- 	nand->chip_delay	= 50;
- 	nand->options		= NAND_USE_FLASH_BBT;
- 
-diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h
-index 4bb5bbc..7bff444 100644
---- a/include/configs/qi_lb60.h
-+++ b/include/configs/qi_lb60.h
-@@ -1,5 +1,5 @@
- /*
-- * Authors: Xiangfu Liu <xiangfu.z@gmail.com>
-+ * Authors: Xiangfu Liu <xiangfu@openmobilefree.net>
-  *
-  * This program is free software; you can redistribute it and/or
-  * modify it under the terms of the GNU General Public License
-@@ -14,7 +14,6 @@
- #define CONFIG_SYS_LITTLE_ENDIAN
- #define CONFIG_JZSOC		/* Jz SoC */
- #define CONFIG_JZ4740		/* Jz4740 SoC */
--#define CONFIG_NAND_JZ4740
- 
- #define CONFIG_SYS_CPU_SPEED	336000000	/* CPU clock: 336 MHz */
- #define CONFIG_SYS_EXTAL	12000000	/* EXTAL freq: 12 MHz */
-@@ -24,24 +23,43 @@
- #define CONFIG_SYS_UART_BASE	JZ4740_UART0_BASE /* Base of the UART channel */
- #define CONFIG_BAUDRATE		57600
- 
-+#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAUL)
-+#define CONFIG_BOOTDELAY	0
-+#define CONFIG_BOOTARGS "mem=32M console=tty0 console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
-+#define CONFIG_BOOTCOMMAND	"nand read 0x80600000 0x400000 0x280000;bootm"
-+
-+/*
-+ * Miscellaneous configurable options
-+ */
-+#define CONFIG_SYS_SDRAM_BASE		0x80000000	/* Cached addr */
-+#define CONFIG_SYS_INIT_SP_OFFSET	0x400000
-+#define CONFIG_SYS_LOAD_ADDR		0x80600000
-+#define CONFIG_SYS_MEMTEST_START	0x80100000
-+#define CONFIG_SYS_MEMTEST_END		0x80A00000
-+#define CONFIG_SYS_TEXT_BASE		0x80100000
-+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
-+
-+#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
-+#define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
-+
-+#define CONFIG_SYS_CBSIZE	256 /* Console I/O Buffer Size */
-+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-+
-+#define CONFIG_SYS_LONGHELP
-+#define CONFIG_SYS_MAXARGS	16
-+#define CONFIG_SYS_PROMPT	"NanoNote# "
-+
- #define CONFIG_SKIP_LOWLEVEL_INIT
- #define CONFIG_BOARD_EARLY_INIT_F
- #define CONFIG_SYS_NO_FLASH
- #define CONFIG_SYS_FLASH_BASE	0 /* init flash_base as 0 */
--#define CONFIG_ENV_OVERWRITE
--
--#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAUL)
--#define CONFIG_BOOTDELAY	0
--#define CONFIG_BOOTARGS		"mem=32M console=tty0 console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
--#define CONFIG_BOOTCOMMAND	"nand read 0x80600000 0x400000 0x200000;bootm"
- 
- /*
-- * Command line configuration.
-+ * Command line configuration
-  */
- #define CONFIG_CMD_BOOTD	/* bootd			*/
- #define CONFIG_CMD_CONSOLE	/* coninfo			*/
- #define CONFIG_CMD_ECHO		/* echo arguments		*/
--
- #define CONFIG_CMD_LOADB	/* loadb			*/
- #define CONFIG_CMD_LOADS	/* loads			*/
- #define CONFIG_CMD_MEMORY	/* md mm nm mw cp cmp crc base loop mtest */
-@@ -58,45 +76,16 @@
- #define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
- 
- /*
-- * Miscellaneous configurable options
-- */
--#define CONFIG_SYS_MAXARGS 16
--#define CONFIG_SYS_LONGHELP
--#define CONFIG_SYS_PROMPT "NanoNote# "
--#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
--#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
--
--#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
--#define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
--
--#define CONFIG_SYS_SDRAM_BASE		0x80000000	/* Cached addr */
--#define CONFIG_SYS_INIT_SP_OFFSET	0x400000
--#define CONFIG_SYS_LOAD_ADDR		0x80600000
--#define CONFIG_SYS_MEMTEST_START	0x80100000
--#define CONFIG_SYS_MEMTEST_END		0x80800000
--
--/*
-- * Environment
-+ * NAND driver configuration
-  */
--#define CONFIG_ENV_IS_IN_NAND		/* use NAND for environment vars */
--
--#define CONFIG_SYS_NAND_5_ADDR_CYCLE
--/*
-- * if board nand flash is 1GB, set to 1
-- * if board nand flash is 2GB, set to 2
-- * for change the PAGE_SIZE and BLOCK_SIZE
-- * will delete when there is no 1GB flash
-- */
--#define NANONOTE_NAND_SIZE	2
--
--#define CONFIG_SYS_NAND_PAGE_SIZE	(2048 * NANONOTE_NAND_SIZE)
--#define CONFIG_SYS_NAND_BLOCK_SIZE	(256 * NANONOTE_NAND_SIZE << 10)
--/* nand bad block was marked at this page in a block, start from 0 */
-+#define CONFIG_NAND_JZ4740
-+#define CONFIG_SYS_NAND_PAGE_SIZE	4096
-+#define CONFIG_SYS_NAND_BLOCK_SIZE	(512 << 10)
-+/* NAND bad block was marked at this page in a block, start from 0 */
- #define CONFIG_SYS_NAND_BADBLOCK_PAGE	127
- #define CONFIG_SYS_NAND_PAGE_COUNT	128
- #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
--/* ECC offset position in oob area, default value is 6 if it isn't defined */
--#define CONFIG_SYS_NAND_ECC_POS		(6 * NANONOTE_NAND_SIZE)
-+#define CONFIG_SYS_NAND_ECC_POS		12
- #define CONFIG_SYS_NAND_ECCSIZE		512
- #define CONFIG_SYS_NAND_ECCBYTES	9
- #define CONFIG_SYS_NAND_ECCPOS		\
-@@ -115,10 +104,9 @@
- #define CONFIG_SYS_ONENAND_BASE		CONFIG_SYS_NAND_BASE
- #define CONFIG_SYS_MAX_NAND_DEVICE	1
- #define CONFIG_SYS_NAND_SELECT_DEVICE	1 /* nand driver supports mutipl.*/
--#define CONFIG_NAND_SPL_TEXT_BASE	0x80000000
- 
- /*
-- * IPL (Initial Program Loader, integrated inside CPU)
-+ * IPL (Initial Program Loader, integrated inside Ingenic Xburst JZ4740 CPU)
-  * Will load first 8k from NAND (SPL) into cache and execute it from there.
-  *
-  * SPL (Secondary Program Loader)
-@@ -130,77 +118,88 @@
-  * NUB (NAND U-Boot)
-  * This NAND U-Boot (NUB) is a special U-Boot version which can be started
-  * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
-- *
-  */
-+
-+/*
-+ * NAND SPL configuration
-+ */
-+#define CONFIG_SPL
-+#define CONFIG_SPL_LIBGENERIC_SUPPORT
-+#define CONFIG_SPL_LIBCOMMON_SUPPORT
-+#define CONFIG_SPL_NAND_LOAD
-+#define CONFIG_SPL_NAND_SIMPLE
-+#define CONFIG_SPL_NAND_SUPPORT
-+#define CONFIG_SPL_TEXT_BASE	0x80000000
-+#define CONFIG_SPL_START_S_PATH	"arch/mips/cpu/xburst/spl"
-+
-+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-+#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
-+#define JZ4740_NANDBOOT_CFG		JZ4740_NANDBOOT_B8R3
-+
- #define CONFIG_SYS_NAND_U_BOOT_DST	0x80100000 /* Load NUB to this addr */
- #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
--/* Start NUB from this addr*/
-+					/* Start NUB from this addr */
-+#define CONFIG_SYS_NAND_U_BOOT_OFFS (32  << 10) /* Offset of NUB */
-+#define CONFIG_SYS_NAND_U_BOOT_SIZE (256 << 10) /* Size of NUB */
- 
- /*
-- * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
-+ * Environment configuration
-  */
--#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) /* Offset to RAM U-Boot image */
--#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) /* Size of RAM U-Boot image */
--
-+#define CONFIG_ENV_OVERWRITE
-+#define CONFIG_ENV_IS_IN_NAND
- #define CONFIG_ENV_SIZE		(4 << 10)
- #define CONFIG_ENV_OFFSET	\
- 	(CONFIG_SYS_NAND_BLOCK_SIZE + CONFIG_SYS_NAND_U_BOOT_SIZE)
- #define CONFIG_ENV_OFFSET_REDUND \
- 	(CONFIG_ENV_OFFSET  + CONFIG_SYS_NAND_BLOCK_SIZE)
- 
--#define CONFIG_SYS_TEXT_BASE	0x80100000
--#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
--
- /*
-- * SDRAM Info.
-+ * CPU cache configuration
-  */
--#define CONFIG_NR_DRAM_BANKS	1
-+#define CONFIG_SYS_DCACHE_SIZE		16384
-+#define CONFIG_SYS_ICACHE_SIZE		16384
-+#define CONFIG_SYS_CACHELINE_SIZE	32
- 
- /*
-- * Cache Configuration
-+ * SDRAM configuration
-  */
--#define CONFIG_SYS_DCACHE_SIZE	16384
--#define CONFIG_SYS_ICACHE_SIZE	16384
--#define CONFIG_SYS_CACHELINE_SIZE	32
-+#define CONFIG_NR_DRAM_BANKS	1
-+
-+#define SDRAM_BW16		1	/* Data bus width: 0-32bit, 1-16bit */
-+#define SDRAM_BANK4		1	/* Banks each chip: 0-2bank, 1-4bank */
-+#define SDRAM_ROW		13	/* Row address: 11 to 13 */
-+#define SDRAM_COL		9	/* Column address: 8 to 12 */
-+#define SDRAM_CASL		2	/* CAS latency: 2 or 3 */
-+#define SDRAM_TRAS		45	/* RAS# Active Time */
-+#define SDRAM_RCD		20	/* RAS# to CAS# Delay */
-+#define SDRAM_TPC		20	/* RAS# Precharge Time */
-+#define SDRAM_TRWL		7	/* Write Latency Time */
-+#define SDRAM_TREF		15625	/* Refresh period: 8192 cycles/64ms */
- 
- /*
-- * GPIO definition
-+ * GPIO configuration
-  */
--#define GPIO_LCD_CS	(2 * 32 + 21)
--#define GPIO_AMP_EN	(3 * 32 + 4)
-+#define GPIO_LCD_CS		(2 * 32 + 21)
-+#define GPIO_AMP_EN		(3 * 32 + 4)
- 
--#define GPIO_SDPW_EN	(3 * 32 + 2)
--#define GPIO_SD_DETECT	(3 * 32 + 0)
-+#define GPIO_SDPW_EN		(3 * 32 + 2)
-+#define GPIO_SD_DETECT		(3 * 32 + 0)
- 
--#define GPIO_BUZZ_PWM	(3 * 32 + 27)
--#define GPIO_USB_DETECT	(3 * 32 + 28)
-+#define GPIO_BUZZ_PWM		(3 * 32 + 27)
-+#define GPIO_USB_DETECT		(3 * 32 + 28)
- 
--#define GPIO_AUDIO_POP	(1 * 32 + 29)
--#define GPIO_COB_TEST	(1 * 32 + 30)
-+#define GPIO_AUDIO_POP		(1 * 32 + 29)
-+#define GPIO_COB_TEST		(1 * 32 + 30)
- 
- #define GPIO_KEYOUT_BASE	(2 * 32 + 10)
--#define GPIO_KEYIN_BASE	(3 * 32 + 18)
--#define GPIO_KEYIN_8	(3 * 32 + 26)
-+#define GPIO_KEYIN_BASE		(3 * 32 + 18)
-+#define GPIO_KEYIN_8		(3 * 32 + 26)
- 
--#define GPIO_SD_CD_N	GPIO_SD_DETECT		/* SD Card insert detect */
-+#define GPIO_SD_CD_N		GPIO_SD_DETECT	/* SD Card insert detect */
- #define GPIO_SD_VCC_EN_N	GPIO_SDPW_EN	/* SD Card Power Enable */
- 
- #define SPEN	GPIO_LCD_CS	/* LCDCS :Serial command enable      */
- #define SPDA	(2 * 32 + 22)	/* LCDSCL:Serial command clock input */
- #define SPCK	(2 * 32 + 23)	/* LCDSDA:Serial command data input  */
- 
--/* SDRAM paramters */
--#define SDRAM_BW16		1	/* Data bus width: 0-32bit, 1-16bit */
--#define SDRAM_BANK4		1	/* Banks each chip: 0-2bank, 1-4bank */
--#define SDRAM_ROW		13	/* Row address: 11 to 13 */
--#define SDRAM_COL		9	/* Column address: 8 to 12 */
--#define SDRAM_CASL		2	/* CAS latency: 2 or 3 */
--
--/* SDRAM Timings, unit: ns */
--#define SDRAM_TRAS		45	/* RAS# Active Time */
--#define SDRAM_RCD		20	/* RAS# to CAS# Delay */
--#define SDRAM_TPC		20	/* RAS# Precharge Time */
--#define SDRAM_TRWL		7	/* Write Latency Time */
--#define SDRAM_TREF		15625	/* Refresh period: 8192 cycles/64ms */
--
- #endif
--- 
-1.7.9.5
-

package/boot/uboot-xburst/patches/0002-qi_lb60-add-software-usbboot-support.patch

@@ -1,916 +0,0 @@
-From fa51192b912d296b8eec10f7d44c6c17eb1dd368 Mon Sep 17 00:00:00 2001
-From: Xiangfu <xiangfu@openmobilefree.net>
-Date: Fri, 12 Oct 2012 09:47:39 +0800
-Subject: [PATCH 2/6] qi_lb60: add software usbboot support
-
-  JZ4740 CPU have a internal ROM have such kind of code, that make
-  JZ4740 can boot from USB
-
-  usbboot.S can downloads user program from the USB port to internal
-  SRAM and branches to the internal SRAM to execute the program
-
-Signed-off-by: Xiangfu <xiangfu@openmobilefree.net>
----
- board/qi/qi_lb60/Makefile      |    1 +
- board/qi/qi_lb60/qi_lb60-spl.c |   20 +
- board/qi/qi_lb60/usbboot.S     |  838 ++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 859 insertions(+)
- create mode 100644 board/qi/qi_lb60/usbboot.S
-
-diff --git a/board/qi/qi_lb60/Makefile b/board/qi/qi_lb60/Makefile
-index e399246..6dd8c6f 100644
---- a/board/qi/qi_lb60/Makefile
-+++ b/board/qi/qi_lb60/Makefile
-@@ -23,6 +23,7 @@ include $(TOPDIR)/config.mk
- LIB	= $(obj)lib$(BOARD).o
- 
- ifeq ($(CONFIG_SPL_BUILD),y)
-+SOBJS	:= usbboot.o
- COBJS	:= $(BOARD)-spl.o
- else
- COBJS	:= $(BOARD).o
-diff --git a/board/qi/qi_lb60/qi_lb60-spl.c b/board/qi/qi_lb60/qi_lb60-spl.c
-index 3fe3fa3..aea459c 100644
---- a/board/qi/qi_lb60/qi_lb60-spl.c
-+++ b/board/qi/qi_lb60/qi_lb60-spl.c
-@@ -12,6 +12,24 @@
- #include <asm/io.h>
- #include <asm/jz4740.h>
- 
-+#define KEY_U_OUT       (32 * 2 + 16)
-+#define KEY_U_IN        (32 * 3 + 19)
-+
-+extern void usb_boot(void);
-+
-+static void check_usb_boot(void)
-+{
-+	__gpio_as_input(KEY_U_IN);
-+	__gpio_enable_pull(KEY_U_IN);
-+	__gpio_as_output(KEY_U_OUT);
-+	__gpio_clear_pin(KEY_U_OUT);
-+
-+	if (!__gpio_get_pin(KEY_U_IN)) {
-+		puts("[U] pressed, goto USBBOOT mode\n");
-+		usb_boot();
-+	}
-+}
-+
- void nand_spl_boot(void)
- {
- 	__gpio_as_sdram_16bit_4720();
-@@ -23,6 +41,8 @@ void nand_spl_boot(void)
- 	pll_init();
- 	sdram_init();
- 
-+	check_usb_boot();
-+
- 	nand_init();
- 
- 	puts("\nQi LB60 SPL: Starting U-Boot ...\n");
-diff --git a/board/qi/qi_lb60/usbboot.S b/board/qi/qi_lb60/usbboot.S
-new file mode 100644
-index 0000000..c872266
---- /dev/null
-+++ b/board/qi/qi_lb60/usbboot.S
-@@ -0,0 +1,838 @@
-+/*
-+ *  for jz4740 usb boot
-+ *
-+ *  Copyright (c) 2009 Author: <jlwei@ingenic.cn>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+    .set noreorder
-+    .globl usb_boot
-+    .text
-+
-+/*
-+ * Both NAND and USB boot load data to D-Cache first, then transfer
-+ * data from D-Cache to I-Cache, and jump to execute the code in I-Cache.
-+ * So init caches first and then dispatch to a proper boot routine.
-+ */
-+
-+.macro load_addr reg addr
-+	li \reg, 0x80000000
-+	addiu \reg, \reg, \addr
-+	la $2, usbboot_begin
-+	subu \reg, \reg, $2
-+.endm
-+
-+usb_boot:
-+	/* Initialize PLL: set ICLK to 84MHz and HCLK to 42MHz. */
-+	la	$9, 0xB0000000		/* CPCCR: Clock Control Register */
-+	la	$8, 0x42041110		/* I:S:M:P=1:2:2:2 */
-+	sw	$8, 0($9)
-+
-+	la	$9, 0xB0000010		/* CPPCR: PLL Control Register */
-+	la	$8, 0x06000120		/* M=12 N=0 D=0 CLK=12*(M+2)/(N+2) */
-+	sw	$8, 0($9)
-+
-+	mtc0	$0, $26		/* CP0_ERRCTL, restore WST reset state */
-+	nop
-+
-+	mtc0	$0, $16			/* CP0_CONFIG */
-+	nop
-+
-+	/* Relocate code to beginning of the ram */
-+
-+	la $2, usbboot_begin
-+	la $3, usbboot_end
-+	li $4, 0x80000000
-+
-+1:
-+	lw $5, 0($2)
-+	sw $5, 0($4)
-+	addiu $2, $2, 4
-+	bne $2, $3, 1b
-+	addiu $4, $4, 4
-+
-+	li $2, 0x80000000
-+	ori $3, $2, 0
-+	addiu $3, $3, usbboot_end
-+	la $4, usbboot_begin
-+	subu $3, $3, $4
-+
-+
-+2:
-+	cache	0x0, 0($2)		/* Index_Invalidate_I */
-+	cache	0x1, 0($2)		/* Index_Writeback_Inv_D */
-+	addiu	$2, $2, 32
-+	subu $4, $3, $2
-+	bgtz	$4, 2b
-+	nop
-+
-+	load_addr $3, usb_boot_return
-+
-+	jr $3
-+
-+usbboot_begin:
-+
-+init_caches:
-+	li	$2, 3			/* cacheable for kseg0 access */
-+	mtc0	$2, $16			/* CP0_CONFIG */
-+	nop
-+
-+	li	$2, 0x20000000		/* enable idx-store-data cache insn */
-+	mtc0	$2, $26			/* CP0_ERRCTL */
-+
-+	ori	$2, $28, 0		/* start address */
-+	ori	$3, $2, 0x3fe0		/* end address, total 16KB */
-+	mtc0	$0, $28, 0		/* CP0_TAGLO */
-+	mtc0	$0, $28, 1		/* CP0_DATALO */
-+cache_clear_a_line:
-+	cache	0x8, 0($2)		/* Index_Store_Tag_I */
-+	cache	0x9, 0($2)		/* Index_Store_Tag_D */
-+	bne	$2, $3, cache_clear_a_line
-+	addiu	$2, $2, 32		/* increment CACHE_LINE_SIZE */
-+
-+	ori	$2, $28, 0		/* start address */
-+	ori	$3, $2, 0x3fe0		/* end address, total 16KB */
-+	la	$4, 0x1ffff000		/* physical address and 4KB page mask */
-+cache_alloc_a_line:
-+	and	$5, $2, $4
-+	ori	$5, $5, 1		/* V bit of the physical tag */
-+	mtc0	$5, $28, 0		/* CP0_TAGLO */
-+	cache	0x8, 0($2)		/* Index_Store_Tag_I */
-+	cache	0x9, 0($2)		/* Index_Store_Tag_D */
-+	bne	$2, $3, cache_alloc_a_line
-+	addiu	$2, $2, 32		/* increment CACHE_LINE_SIZE */
-+
-+	nop
-+	nop
-+	nop
-+	/*
-+	 * Transfer data from dcache to icache, then jump to icache.
-+	 * Input parameters:
-+	 * $19: data length in bytes
-+	 * $20: jump target address
-+	 */
-+xfer_d2i:
-+
-+	ori	$8, $20, 0
-+	addu	$9, $8, $19		/* total 16KB */
-+
-+1:
-+	cache	0x0, 0($8)		/* Index_Invalidate_I */
-+	cache	0x1, 0($8)		/* Index_Writeback_Inv_D */
-+	bne	$8, $9, 1b
-+	addiu	$8, $8, 32
-+
-+	/* flush write-buffer */
-+	sync
-+
-+	/* Invalidate BTB */
-+	mfc0	$8, $16, 7		/* CP0_CONFIG */
-+	nop
-+	ori	$8, 2
-+	mtc0	$8, $16, 7
-+	nop
-+
-+	/* Overwrite config to disable ram initalisation */
-+	li $2, 0xff
-+	sb $2, 20($20)
-+
-+	jalr	$20
-+	nop
-+
-+icache_return:
-+	/* User code can return to here after executing itself in
-+	  icache, by jumping to $31. */
-+	b	usb_boot_return
-+	nop
-+
-+
-+usb_boot_return:
-+	/* Enable the USB PHY */
-+	la	$9, 0xB0000024		/* CPM_SCR */
-+	lw	$8, 0($9)
-+	ori	$8, 0x40		/* USBPHY_ENABLE */
-+	sw	$8, 0($9)
-+
-+	/* Initialize USB registers */
-+	la	$27, 0xb3040000	/* USB registers base address */
-+
-+	sb	$0, 0x0b($27)	/* INTRUSBE: disable common USB interrupts */
-+	sh	$0, 0x06($27)	/* INTRINE: disable EPIN interrutps */
-+	sh	$0, 0x08($27)	/* INTROUTE: disable EPOUT interrutps */
-+
-+	li	$9, 0x61
-+	sb	$9, 0x01($27)	/* POWER: HSENAB | SUSPENDM | SOFTCONN */
-+
-+	/* Initialize USB states */
-+	li	$22, 0			/* set EP0 to IDLE state */
-+	li	$23, 1			/* no data stage */
-+
-+	/* Main loop of polling the usb commands */
-+usb_command_loop:
-+	lbu	$9, 0x0a($27)		/* read INTRUSB */
-+	andi	$9, 0x04		/* check USB_INTR_RESET */
-+	beqz	$9, check_intr_ep0in
-+	nop
-+
-+ 	/* 1. Handle USB reset interrupt */
-+handle_reset_intr:
-+	lbu	$9, 0x01($27)		/* read POWER */
-+	andi	$9, 0x10		/* test HS_MODE */
-+	bnez	$9, _usb_set_maxpktsize
-+	li	$9, 512			/* max packet size of HS mode */
-+	li	$9, 64			/* max packet size of FS mode */
-+
-+_usb_set_maxpktsize:
-+	li	$8, 1
-+	sb	$8, 0x0e($27)		/* set INDEX 1 */
-+
-+	sh	$9, 0x10($27)		/* INMAXP */
-+	sb	$0, 0x13($27)		/* INCSRH */
-+	sh	$9, 0x14($27)		/* OUTMAXP */
-+	sb	$0, 0x17($27)		/* OUTCSRH */
-+
-+_usb_flush_fifo:
-+	li	$8, 0x48		/* INCSR_CDT && INCSR_FF */
-+	sb	$8, 0x12($27)		/* INCSR */
-+	li	$8, 0x90		/* OUTCSR_CDT && OUTCSR_FF */
-+	sb	$8, 0x16($27)		/* OUTCSR */
-+
-+	li	$22, 0			/* set EP0 to IDLE state */
-+	li	$23, 1			/* no data stage */
-+
-+	/* 2. Check and handle EP0 interrupt */
-+check_intr_ep0in:
-+	lhu	$10, 0x02($27)		/* read INTRIN */
-+	andi	$9, $10, 0x1		/* check EP0 interrupt */
-+	beqz	$9, check_intr_ep1in
-+	nop
-+
-+handle_ep0_intr:
-+	sb	$0, 0x0e($27)		/* set INDEX 0 */
-+	lbu	$11, 0x12($27)		/* read CSR0 */
-+
-+	andi	$9, $11, 0x04		/* check SENTSTALL */
-+	beqz	$9, _ep0_setupend
-+	nop
-+
-+_ep0_sentstall:
-+	andi	$9, $11, 0xdb
-+	sb	$9, 0x12($27)		/* clear SENDSTALL and SENTSTALL */
-+	li	$22, 0			/* set EP0 to IDLE state */
-+
-+_ep0_setupend:
-+	andi	$9, $11, 0x10		/* check SETUPEND */
-+	beqz	$9, ep0_idle_state
-+	nop
-+
-+	ori	$9, $11, 0x80
-+	sb	$9, 0x12($27)		/* set SVDSETUPEND */
-+	li	$22, 0			/* set EP0 to IDLE state */
-+
-+ep0_idle_state:
-+	bnez	$22, ep0_tx_state
-+	nop
-+
-+	/* 2.1 Handle EP0 IDLE state interrupt */
-+	andi	$9, $11, 0x01		/* check OUTPKTRDY */
-+	beqz	$9, check_intr_ep1in
-+	nop
-+
-+	/* Read 8-bytes setup packet from the FIFO */
-+	lw	$25, 0x20($27)		/* first word of setup packet */
-+	lw	$26, 0x20($27)		/* second word of setup packet */
-+
-+	andi	$9, $25, 0x60		/* bRequestType & USB_TYPE_MASK */
-+	beqz	$9, _ep0_std_req
-+	nop
-+
-+	/* 2.1.1 Vendor-specific setup request */
-+_ep0_vend_req:
-+	li	$22, 0			/* set EP0 to IDLE state */
-+	li	$23, 1			/* NoData = 1 */
-+
-+	andi	$9, $25, 0xff00		/* check bRequest */
-+	srl	$9, $9, 8
-+	beqz	$9, __ep0_get_cpu_info
-+	sub	$8, $9, 0x1
-+	beqz	$8, __ep0_set_data_address
-+	sub	$8, $9, 0x2
-+	beqz	$8, __ep0_set_data_length
-+	sub	$8, $9, 0x3
-+	beqz	$8, __ep0_flush_caches
-+	sub	$8, $9, 0x4
-+	beqz	$8, __ep0_prog_start1
-+	sub	$8, $9, 0x5
-+	beqz	$8, __ep0_prog_start2
-+	nop
-+	b	_ep0_idle_state_fini	/* invalid request */
-+	nop
-+
-+__ep0_get_cpu_info:
-+	load_addr $20, cpu_info_data	/* data pointer to transfer */
-+	li	$21, 8			/* bytes left to transfer */
-+	li	$22, 1			/* set EP0 to TX state */
-+	li	$23, 0			/* NoData = 0 */
-+
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+__ep0_set_data_address:
-+	li	$9, 0xffff0000
-+	and	$9, $25, $9
-+	andi	$8, $26, 0xffff
-+	or	$20, $9, $8		/* data address of next transfer */
-+
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+__ep0_set_data_length:
-+	li	$9, 0xffff0000
-+	and	$9, $25, $9
-+	andi	$8, $26, 0xffff
-+	or	$21, $9, $8		/* data length of next transfer */
-+
-+	li	$9, 0x48		/* SVDOUTPKTRDY and DATAEND */
-+	sb	$9, 0x12($27)		/* CSR0 */
-+
-+	/* We must write packet to FIFO before EP1-IN interrupt here. */
-+	b	handle_epin1_intr
-+	nop
-+
-+__ep0_flush_caches:
-+	/* Flush dcache and invalidate icache. */
-+	li	$8, 0x80000000
-+	addi	$9, $8, 0x3fe0		/* total 16KB */
-+
-+1:
-+	cache	0x0, 0($8)		/* Index_Invalidate_I */
-+	cache	0x1, 0($8)		/* Index_Writeback_Inv_D */
-+	bne	$8, $9, 1b
-+	addiu	$8, $8, 32
-+
-+	/* flush write-buffer */
-+	sync
-+
-+	/* Invalidate BTB */
-+	mfc0	$8, $16, 7		/* CP0_CONFIG */
-+	nop
-+	ori	$8, 2
-+	mtc0	$8, $16, 7
-+	nop
-+
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+__ep0_prog_start1:
-+	li	$9, 0x48		/* SVDOUTPKTRDY and DATAEND */
-+	sb	$9, 0x12($27)		/* CSR0 */
-+
-+	li	$9, 0xffff0000
-+	and	$9, $25, $9
-+	andi	$8, $26, 0xffff
-+	or	$20, $9, $8		/* target address */
-+
-+	b	xfer_d2i
-+	li	$19, 0x2000		/* 16KB data length */
-+
-+__ep0_prog_start2:
-+	li	$9, 0x48		/* SVDOUTPKTRDY and DATAEND */
-+	sb	$9, 0x12($27)		/* CSR0 */
-+
-+	li	$9, 0xffff0000
-+	and	$9, $25, $9
-+	andi	$8, $26, 0xffff
-+	or	$20, $9, $8		/* target address */
-+
-+	jalr	$20		/* jump, and place the return address in $31 */
-+	nop
-+
-+__ep0_prog_start2_return:
-+/* User code can return to here after executing itself, by jumping to $31 */
-+	b	usb_boot_return
-+	nop
-+
-+	/* 2.1.2 Standard setup request */
-+_ep0_std_req:
-+	andi	$12, $25, 0xff00	/* check bRequest */
-+	srl	$12, $12, 8
-+	sub	$9, $12, 0x05		/* check USB_REQ_SET_ADDRESS */
-+	bnez	$9, __ep0_req_set_config
-+	nop
-+
-+	/* Handle USB_REQ_SET_ADDRESS */
-+__ep0_req_set_addr:
-+	srl	$9, $25, 16		/* get wValue */
-+	sb	$9, 0x0($27)		/* set FADDR */
-+	li	$23, 1			/* NoData = 1 */
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+__ep0_req_set_config:
-+	sub	$9, $12, 0x09		/* check USB_REQ_SET_CONFIGURATION */
-+	bnez	$9, __ep0_req_get_desc
-+	nop
-+
-+	/* Handle USB_REQ_SET_CONFIGURATION */
-+	li	$23, 1			/* NoData = 1 */
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+__ep0_req_get_desc:
-+	sub	$9, $12, 0x06		/* check USB_REQ_GET_DESCRIPTOR */
-+	bnez	$9, _ep0_idle_state_fini
-+	li	$23, 1			/* NoData = 1 */
-+
-+	/* Handle USB_REQ_GET_DESCRIPTOR */
-+	li	$23, 0			/* NoData = 0 */
-+
-+	srl	$9, $25, 24		/* wValue >> 8 */
-+	sub	$8, $9, 0x01		/* check USB_DT_DEVICE */
-+	beqz	$8, ___ep0_get_dev_desc
-+	srl	$21, $26, 16		/* get wLength */
-+	sub	$8, $9, 0x02		/* check USB_DT_CONFIG */
-+	beqz	$8, ___ep0_get_conf_desc
-+	sub	$8, $9, 0x03		/* check USB_DT_STRING */
-+	beqz	$8, ___ep0_get_string_desc
-+	sub	$8, $9, 0x06		/* check USB_DT_DEVICE_QUALIFIER */
-+	beqz	$8, ___ep0_get_dev_qualifier
-+	nop
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+___ep0_get_dev_desc:
-+	load_addr	$20, device_desc	/* data pointer */
-+	li	$22, 1			/* set EP0 to TX state */
-+	sub	$8, $21, 18
-+	blez	$8, _ep0_idle_state_fini /* wLength <= 18 */
-+	nop
-+	li	$21, 18			/* max length of device_desc */
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+___ep0_get_dev_qualifier:
-+	load_addr	$20, dev_qualifier	/* data pointer */
-+	li	$22, 1			/* set EP0 to TX state */
-+	sub	$8, $21, 10
-+	blez	$8, _ep0_idle_state_fini /* wLength <= 10 */
-+	nop
-+	li	$21, 10			/* max length of dev_qualifier */
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+___ep0_get_conf_desc:
-+	load_addr	$20, config_desc_fs	/* data pointer of FS mode */
-+	lbu	$8, 0x01($27)		/* read POWER */
-+	andi	$8, 0x10		/* test HS_MODE */
-+	beqz	$8, ___ep0_get_conf_desc2
-+	nop
-+	load_addr $20, config_desc_hs	/* data pointer of HS mode */
-+
-+___ep0_get_conf_desc2:
-+	li	$22, 1			/* set EP0 to TX state */
-+	sub	$8, $21, 32
-+	blez	$8, _ep0_idle_state_fini /* wLength <= 32 */
-+	nop
-+	li	$21, 32			/* max length of config_desc */
-+	b	_ep0_idle_state_fini
-+	nop
-+
-+___ep0_get_string_desc:
-+	li	$22, 1			/* set EP0 to TX state */
-+
-+	srl	$9, $25, 16		/* wValue & 0xff */
-+	andi	$9, 0xff
-+
-+	sub	$8, $9, 1
-+	beqz	$8, ___ep0_get_string_manufacture
-+	sub	$8, $9, 2
-+	beqz	$8, ___ep0_get_string_product
-+	nop
-+
-+___ep0_get_string_lang_ids:
-+	load_addr	$20, string_lang_ids	/* data pointer */
-+	b	_ep0_idle_state_fini
-+	li	$21, 4			/* data length */
-+
-+___ep0_get_string_manufacture:
-+	load_addr	$20, string_manufacture	/* data pointer */
-+	b	_ep0_idle_state_fini
-+	li	$21, 16			/* data length */
-+
-+___ep0_get_string_product:
-+	load_addr	$20, string_product	/* data pointer */
-+	b	_ep0_idle_state_fini
-+	li	$21, 46			/* data length */
-+
-+_ep0_idle_state_fini:
-+	li	$9, 0x40		/* SVDOUTPKTRDY */
-+	beqz	$23, _ep0_idle_state_fini2
-+	nop
-+	ori	$9, $9, 0x08		/* DATAEND */
-+_ep0_idle_state_fini2:
-+	sb	$9, 0x12($27)		/* CSR0 */
-+	beqz	$22, check_intr_ep1in
-+	nop
-+
-+	/* 2.2 Handle EP0 TX state interrupt */
-+ep0_tx_state:
-+	sub	$9, $22, 1
-+	bnez	$9, check_intr_ep1in
-+	nop
-+
-+	sub	$9, $21, 64		/* max packetsize */
-+	blez	$9, _ep0_tx_state2	/* data count <= 64 */
-+	ori	$19, $21, 0
-+	li	$19, 64
-+
-+_ep0_tx_state2:
-+	beqz	$19, _ep0_tx_state3	/* send ZLP */
-+	ori	$18, $19, 0		/* record bytes to be transferred */
-+	sub	$21, $21, $19		/* decrement data count */
-+
-+_ep0_fifo_write_loop:
-+	lbu	$9, 0($20)		/* read data */
-+	sb	$9, 0x20($27)		/* load FIFO */
-+	sub	$19, $19, 1		/* decrement counter */
-+	bnez	$19, _ep0_fifo_write_loop
-+	addi	$20, $20, 1		/* increment data pointer */
-+
-+	sub	$9, $18, 64		/* max packetsize */
-+	beqz	$9, _ep0_tx_state4
-+	nop
-+
-+_ep0_tx_state3:
-+	/* transferred bytes < max packetsize */
-+	li	$9, 0x0a		/* set INPKTRDY and DATAEND */
-+	sb	$9, 0x12($27)		/* CSR0 */
-+	li	$22, 0			/* set EP0 to IDLE state */
-+	b	check_intr_ep1in
-+	nop
-+
-+_ep0_tx_state4:
-+	/* transferred bytes == max packetsize */
-+	li	$9, 0x02		/* set INPKTRDY */
-+	sb	$9, 0x12($27)		/* CSR0 */
-+	b	check_intr_ep1in
-+	nop
-+
-+	/* 3. Check and handle EP1 BULK-IN interrupt */
-+check_intr_ep1in:
-+	andi	$9, $10, 0x2		/* check EP1 IN interrupt */
-+	beqz	$9, check_intr_ep1out
-+	nop
-+
-+handle_epin1_intr:
-+	li	$9, 1
-+	sb	$9, 0x0e($27)		/* set INDEX 1 */
-+	lbu	$9, 0x12($27)		/* read INCSR */
-+
-+	andi	$8, $9, 0x2		/* check INCSR_FFNOTEMPT */
-+	bnez	$8, _epin1_tx_state4
-+	nop
-+
-+_epin1_write_fifo:
-+	lhu	$9, 0x10($27)		/* get INMAXP */
-+	sub	$8, $21, $9
-+	blez	$8, _epin1_tx_state1	/* bytes left <= INMAXP */
-+	ori	$19, $21, 0
-+	ori	$19, $9, 0
-+
-+_epin1_tx_state1:
-+	beqz	$19, _epin1_tx_state4	/* No data */
-+	nop
-+
-+	sub	$21, $21, $19		/* decrement data count */
-+
-+	srl	$5, $19, 2		/* # of word */
-+	andi	$6, $19, 0x3		/* # of byte */
-+	beqz	$5, _epin1_tx_state2
-+	nop
-+
-+_epin1_fifo_write_word:
-+	lw	$9, 0($20)		/* read data from source address */
-+	sw	$9, 0x24($27)		/* write FIFO */
-+	sub	$5, $5, 1		/* decrement counter */
-+	bnez	$5, _epin1_fifo_write_word
-+	addiu	$20, $20, 4		/* increment dest address */
-+
-+_epin1_tx_state2:
-+	beqz	$6, _epin1_tx_state3
-+	nop
-+
-+_epin1_fifo_write_byte:
-+	lbu	$9, 0($20)		/* read data from source address */
-+	sb	$9, 0x24($27)		/* write FIFO */
-+	sub	$6, $6, 1		/* decrement counter */
-+	bnez	$6, _epin1_fifo_write_byte
-+	addiu	$20, $20, 1		/* increment dest address */
-+
-+_epin1_tx_state3:
-+	li	$9, 0x1
-+	sb	$9, 0x12($27)		/* INCSR, set INPKTRDY */
-+
-+_epin1_tx_state4:
-+	/* 4. Check and handle EP1 BULK-OUT interrupt */
-+check_intr_ep1out:
-+	lhu	$9, 0x04($27)		/* read INTROUT */
-+	andi	$9, 0x2
-+	beqz	$9, check_status_next
-+	nop
-+
-+handle_epout1_intr:
-+	li	$9, 1
-+	sb	$9, 0x0e($27)		/* set INDEX 1 */
-+
-+	lbu	$9, 0x16($27)		/* read OUTCSR */
-+	andi	$9, 0x1			/* check OUTPKTRDY */
-+	beqz	$9, check_status_next
-+	nop
-+
-+_epout1_read_fifo:
-+	lhu	$19, 0x18($27)		/* read OUTCOUNT */
-+	srl	$5, $19, 2		/* # of word */
-+	andi	$6, $19, 0x3		/* # of byte */
-+	beqz	$5, _epout1_rx_state1
-+	nop
-+
-+_epout1_fifo_read_word:
-+	lw	$9, 0x24($27)		/* read FIFO */
-+	sw	$9, 0($20)		/* store to dest address */
-+	sub	$5, $5, 1		/* decrement counter */
-+	bnez	$5, _epout1_fifo_read_word
-+	addiu	$20, $20, 4		/* increment dest address */
-+
-+_epout1_rx_state1:
-+	beqz	$6, _epout1_rx_state2
-+	nop
-+
-+_epout1_fifo_read_byte:
-+	lbu	$9, 0x24($27)		/* read FIFO */
-+	sb	$9, 0($20)		/* store to dest address */
-+	sub	$6, $6, 1		/* decrement counter */
-+	bnez	$6, _epout1_fifo_read_byte
-+	addiu	$20, $20, 1		/* increment dest address */
-+
-+_epout1_rx_state2:
-+	sb	$0, 0x16($27)		/* clear OUTPKTRDY */
-+
-+check_status_next:
-+	b	usb_command_loop
-+	nop
-+
-+/* Device/Configuration/Interface/Endpoint/String Descriptors */
-+
-+	.align	2
-+device_desc:
-+	.byte	0x12		/* bLength */
-+	.byte	0x01		/* bDescriptorType */
-+	.byte	0x00		/* bcdUSB */
-+	.byte	0x02		/* bcdUSB */
-+	.byte	0x00		/* bDeviceClass */
-+	.byte	0x00		/* bDeviceSubClass */
-+	.byte	0x00		/* bDeviceProtocol */
-+	.byte	0x40		/* bMaxPacketSize0 */
-+	.byte	0x1a		/* idVendor */
-+	.byte	0x60		/* idVendor */
-+	.byte	0x40		/* idProduct */
-+	.byte	0x47		/* idProduct */
-+	.byte	0x00		/* bcdDevice */
-+	.byte	0x01		/* bcdDevice */
-+	.byte	0x01		/* iManufacturer */
-+	.byte	0x02		/* iProduct */
-+	.byte	0x00		/* iSerialNumber */
-+	.byte	0x01		/* bNumConfigurations */
-+
-+	.align	2
-+dev_qualifier:
-+	.byte	0x0a		/* bLength */
-+	.byte	0x06		/* bDescriptorType */
-+	.byte	0x00		/* bcdUSB */
-+	.byte	0x02		/* bcdUSB */
-+	.byte	0x00		/* bDeviceClass */
-+	.byte	0x00		/* bDeviceSubClass */
-+	.byte	0x00		/* bDeviceProtocol */
-+	.byte	0x40		/* bMaxPacketSize0 */
-+	.byte	0x01		/* bNumConfigurations */
-+	.byte	0x00		/* bRESERVED */
-+
-+	.align	2
-+config_desc_hs:
-+	.byte	0x09		/* bLength */
-+	.byte	0x02		/* bDescriptorType */
-+	.byte	0x20		/* wTotalLength */
-+	.byte	0x00		/* wTotalLength */
-+	.byte	0x01		/* bNumInterfaces */
-+	.byte	0x01		/* bConfigurationValue */
-+	.byte	0x00		/* iConfiguration */
-+	.byte	0xc0		/* bmAttributes */
-+	.byte	0x01		/* MaxPower */
-+intf_desc_hs:
-+	.byte	0x09		/* bLength */
-+	.byte	0x04		/* bDescriptorType */
-+	.byte	0x00		/* bInterfaceNumber */
-+	.byte	0x00		/* bAlternateSetting */
-+	.byte	0x02		/* bNumEndpoints */
-+	.byte	0xff		/* bInterfaceClass */
-+	.byte	0x00		/* bInterfaceSubClass */
-+	.byte	0x50		/* bInterfaceProtocol */
-+	.byte	0x00		/* iInterface */
-+ep1_desc_hs:
-+	.byte	0x07		/* bLength */
-+	.byte	0x05		/* bDescriptorType */
-+	.byte	0x01		/* bEndpointAddress */
-+	.byte	0x02		/* bmAttributes */
-+	.byte	0x00		/* wMaxPacketSize */
-+	.byte	0x02		/* wMaxPacketSize */
-+	.byte	0x00		/* bInterval */
-+ep2_desc_hs:
-+	.byte	0x07		/* bLength */
-+	.byte	0x05		/* bDescriptorType */
-+	.byte	0x81		/* bEndpointAddress */
-+	.byte	0x02		/* bmAttributes */
-+	.byte	0x00		/* wMaxPacketSize */
-+	.byte	0x02		/* wMaxPacketSize */
-+	.byte	0x00		/* bInterval */
-+
-+	.align	2
-+config_desc_fs:
-+	.byte	0x09		/* bLength */
-+	.byte	0x02		/* bDescriptorType */
-+	.byte	0x20		/* wTotalLength */
-+	.byte	0x00		/* wTotalLength */
-+	.byte	0x01		/* bNumInterfaces */
-+	.byte	0x01		/* bConfigurationValue */
-+	.byte	0x00		/* iConfiguration */
-+	.byte	0xc0		/* bmAttributes */
-+	.byte	0x01		/* MaxPower */
-+intf_desc_fs:
-+	.byte	0x09		/* bLength */
-+	.byte	0x04		/* bDescriptorType */
-+	.byte	0x00		/* bInterfaceNumber */
-+	.byte	0x00		/* bAlternateSetting */
-+	.byte	0x02		/* bNumEndpoints */
-+	.byte	0xff		/* bInterfaceClass */
-+	.byte	0x00		/* bInterfaceSubClass */
-+	.byte	0x50		/* bInterfaceProtocol */
-+	.byte	0x00		/* iInterface */
-+ep1_desc_fs:
-+	.byte	0x07		/* bLength */
-+	.byte	0x05		/* bDescriptorType */
-+	.byte	0x01		/* bEndpointAddress */
-+	.byte	0x02		/* bmAttributes */
-+	.byte	0x40		/* wMaxPacketSize */
-+	.byte	0x00		/* wMaxPacketSize */
-+	.byte	0x00		/* bInterval */
-+ep2_desc_fs:
-+	.byte	0x07		/* bLength */
-+	.byte	0x05		/* bDescriptorType */
-+	.byte	0x81		/* bEndpointAddress */
-+	.byte	0x02		/* bmAttributes */
-+	.byte	0x40		/* wMaxPacketSize */
-+	.byte	0x00		/* wMaxPacketSize */
-+	.byte	0x00		/* bInterval */
-+
-+	.align	2
-+string_lang_ids:
-+	.byte	0x04
-+	.byte	0x03
-+	.byte	0x09
-+	.byte	0x04
-+
-+	.align	2
-+string_manufacture:
-+	.byte	0x10
-+	.byte	0x03
-+	.byte	0x49
-+	.byte	0x00
-+	.byte	0x6e
-+	.byte	0x00
-+	.byte	0x67
-+	.byte	0x00
-+	.byte	0x65
-+	.byte	0x00
-+	.byte	0x6e
-+	.byte	0x00
-+	.byte	0x69
-+	.byte	0x00
-+	.byte	0x63
-+	.byte	0x00
-+
-+	.align	2
-+string_product:
-+	.byte	0x2e
-+	.byte	0x03
-+	.byte	0x4a
-+	.byte	0x00
-+	.byte	0x5a
-+	.byte	0x00
-+	.byte	0x34
-+	.byte	0x00
-+	.byte	0x37
-+	.byte	0x00
-+	.byte	0x34
-+	.byte	0x00
-+	.byte	0x30
-+	.byte	0x00
-+	.byte	0x20
-+	.byte	0x00
-+	.byte	0x55
-+	.byte	0x00
-+	.byte	0x53
-+	.byte	0x00
-+	.byte	0x42
-+	.byte	0x00
-+	.byte	0x20
-+	.byte	0x00
-+	.byte	0x42
-+	.byte	0x00
-+	.byte	0x6f
-+	.byte	0x00
-+	.byte	0x6f
-+	.byte	0x00
-+	.byte	0x74
-+	.byte	0x00
-+	.byte	0x20
-+	.byte	0x00
-+	.byte	0x44
-+	.byte	0x00
-+	.byte	0x65
-+	.byte	0x00
-+	.byte	0x76
-+	.byte	0x00
-+	.byte	0x69
-+	.byte	0x00
-+	.byte	0x63
-+	.byte	0x00
-+	.byte	0x65
-+	.byte	0x00
-+
-+	.align	2
-+cpu_info_data:
-+	.byte	0x4a
-+	.byte	0x5a
-+	.byte	0x34
-+	.byte	0x37
-+	.byte	0x34
-+	.byte	0x30
-+	.byte	0x56
-+	.byte	0x31
-+usbboot_end:
-+
-+    .set reorder
--- 
-1.7.9.5
-

package/boot/uboot-xburst/patches/0004-add-more-boot-options-F1-F2-F3-F4-M-S.patch

@@ -1,200 +0,0 @@
-From c52b6168979d03fc31205444c3278c537787472a Mon Sep 17 00:00:00 2001
-From: Xiangfu <xiangfu@openmobilefree.net>
-Date: Wed, 10 Oct 2012 18:39:55 +0800
-Subject: [PATCH 4/6] add more boot options(F1/F2/F3/F4/M/S)
-
----
- arch/mips/include/asm/global_data.h |    3 +++
- arch/mips/lib/bootm.c               |   17 ++++++++++++++++-
- board/qi/qi_lb60/qi_lb60.c          |   26 +++++++++++++++++++++++---
- common/main.c                       |   21 +++++++++++++++++++--
- include/configs/qi_lb60.h           |   32 ++++++++++++++++++++++++++++++++
- 5 files changed, 93 insertions(+), 6 deletions(-)
-
-diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
-index 6e2cdc7..cd03d7e 100644
---- a/arch/mips/include/asm/global_data.h
-+++ b/arch/mips/include/asm/global_data.h
-@@ -59,6 +59,9 @@ typedef	struct	global_data {
- 	unsigned long	env_valid;	/* Checksum of Environment valid? */
- 	void		**jt;		/* jump table */
- 	char		env_buf[32];	/* buffer for getenv() before reloc. */
-+#if defined(CONFIG_NANONOTE)
-+        unsigned long   boot_option;
-+#endif
- } gd_t;
- 
- #include <asm-generic/global_data_flags.h>
-diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
-index 608c1a7..e00416b 100644
---- a/arch/mips/lib/bootm.c
-+++ b/arch/mips/lib/bootm.c
-@@ -47,10 +47,25 @@ int do_bootm_linux(int flag, int argc, char * const argv[],
- 			bootm_headers_t *images)
- {
- 	void (*theKernel) (int, char **, char **, int *);
--	char *commandline = getenv("bootargs");
-+	char *commandline;
- 	char env_buf[12];
- 	char *cp;
- 
-+#if defined(CONFIG_NANONOTE)
-+        if (gd->boot_option & BOOT_FROM_MEMCARD)
-+                commandline = getenv ("bootargsfromsd");
-+        else if (gd->boot_option & BOOT_WITH_F1)
-+                commandline = getenv ("bootargsf1");
-+        else if (gd->boot_option & BOOT_WITH_F2)
-+                commandline = getenv ("bootargsf2");
-+        else if (gd->boot_option & BOOT_WITH_F3)
-+                commandline = getenv ("bootargsf3");
-+        else if (gd->boot_option & BOOT_WITH_F4)
-+                commandline = getenv ("bootargsf4");
-+        else
-+#endif
-+                commandline = getenv ("bootargs");
-+
- 	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- 		return 1;
- 
-diff --git a/board/qi/qi_lb60/qi_lb60.c b/board/qi/qi_lb60/qi_lb60.c
-index a2ba648..d622219 100644
---- a/board/qi/qi_lb60/qi_lb60.c
-+++ b/board/qi/qi_lb60/qi_lb60.c
-@@ -15,7 +15,7 @@ DECLARE_GLOBAL_DATA_PTR;
- 
- static void gpio_init(void)
- {
--	unsigned int i;
-+	unsigned int i, j;
- 
- 	/* Initialize NAND Flash Pins */
- 	__gpio_as_nand();
-@@ -42,14 +42,34 @@ static void gpio_init(void)
- 
- 	if (__gpio_get_pin(GPIO_KEYIN_BASE + 2) == 0){
- 		printf("[S] pressed, enable UART0\n");
-+		gd->boot_option |= BOOT_WITH_ENABLE_UART;
- 		__gpio_as_uart0();
- 	} else {
- 		__gpio_as_input(GPIO_KEYIN_8);
- 		__gpio_enable_pull(GPIO_KEYIN_8);
- 	}
- 
--	/* enable the TP4, TP5 as UART0 */
--	__gpio_jtag_to_uart0();
-+	if (__gpio_get_pin(GPIO_KEYIN_BASE + 3) == 0) {
-+		printf("[M] pressed, boot from memory card\n");
-+		gd->boot_option |= BOOT_FROM_MEMCARD;
-+		__gpio_jtag_to_uart0();
-+	}
-+
-+	for (j = 0; j < 4; j++) {
-+		for (i = 0; i < 4; i++)
-+			__gpio_set_pin(GPIO_KEYOUT_BASE + i);
-+
-+		__gpio_clear_pin(GPIO_KEYOUT_BASE + j);
-+
-+		if (__gpio_get_pin(GPIO_KEYIN_BASE) == 0) {
-+			printf("[F%d] pressed", (j + 1));
-+			gd->boot_option |= (1 << (j + 2));
-+			/* BOOT_WITH_F1	(1 << 2) */
-+			/* BOOT_WITH_F2	(1 << 3) */
-+			/* BOOT_WITH_F3	(1 << 4) */
-+			/* BOOT_WITH_F4	(1 << 5) */
-+		}
-+	}
- 
- 	__gpio_as_output(GPIO_AUDIO_POP);
- 	__gpio_set_pin(GPIO_AUDIO_POP);
-diff --git a/common/main.c b/common/main.c
-index 9507cec..dbfb7ca 100644
---- a/common/main.c
-+++ b/common/main.c
-@@ -355,7 +355,11 @@ void main_loop (void)
- #if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0)
- 	s = getenv ("bootdelay");
- 	bootdelay = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
--
-+#if defined(CONFIG_NANONOTE)
-+	DECLARE_GLOBAL_DATA_PTR;
-+	if (gd->boot_option & BOOT_WITH_ENABLE_UART)
-+		bootdelay = 3;
-+# endif
- 	debug ("### main_loop entered: bootdelay=%d\n\n", bootdelay);
- 
- #if defined(CONFIG_MENU_SHOW)
-@@ -379,7 +383,20 @@ void main_loop (void)
- 	}
- 	else
- #endif /* CONFIG_BOOTCOUNT_LIMIT */
--		s = getenv ("bootcmd");
-+#if defined(CONFIG_NANONOTE)
-+		if (gd->boot_option & BOOT_FROM_MEMCARD)
-+			s = getenv ("bootcmdfromsd");
-+		else if (gd->boot_option & BOOT_WITH_F1)
-+			s = getenv ("bootcmdf1");
-+		else if (gd->boot_option & BOOT_WITH_F2)
-+			s = getenv ("bootcmdf2");
-+		else if (gd->boot_option & BOOT_WITH_F3)
-+			s = getenv ("bootcmdf3");
-+		else if (gd->boot_option & BOOT_WITH_F4)
-+			s = getenv ("bootcmdf4");
-+		else
-+#endif
-+			s = getenv ("bootcmd");
- 
- 	debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
- 
-diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h
-index 7b33be0..52b370c 100644
---- a/include/configs/qi_lb60.h
-+++ b/include/configs/qi_lb60.h
-@@ -31,6 +31,7 @@
- /*
-  * Miscellaneous configurable options
-  */
-+#define CONFIG_NANONOTE
- #define CONFIG_JZ4740_MMC
- #define CONFIG_MMC      	1
- #define CONFIG_FAT      	1
-@@ -39,6 +40,37 @@
- #define CONFIG_CMD_FAT
- #define CONFIG_CMD_EXT2
- 
-+#define CONFIG_CMD_UBIFS
-+#define CONFIG_CMD_UBI
-+#define CONFIG_MTD_PARTITIONS
-+#define CONFIG_MTD_DEVICE
-+#define CONFIG_CMD_MTDPARTS
-+#define CONFIG_CMD_UBI
-+#define CONFIG_CMD_UBIFS
-+#define CONFIG_LZO
-+#define CONFIG_RBTREE
-+
-+#define MTDIDS_DEFAULT		"nand0=jz4740-nand"
-+#define MTDPARTS_DEFAULT	"mtdparts=jz4740-nand:4M@0(uboot)ro,4M@4M(kernel)ro,512M@8M(rootfs)ro,-(data)ro"
-+
-+#define BOOT_FROM_MEMCARD	1
-+#define BOOT_WITH_ENABLE_UART	(1 << 1)	/* Vaule for global_data.h gd->boot_option */
-+#define BOOT_WITH_F1		(1 << 2)
-+#define BOOT_WITH_F2		(1 << 3)
-+#define BOOT_WITH_F3		(1 << 4)
-+#define BOOT_WITH_F4		(1 << 5)
-+
-+#define CONFIG_EXTRA_ENV_SETTINGS \
-+	"bootcmdfromsd=mmc init; ext2load mmc 0 0x80600000 /boot/uImage; bootm;\0" \
-+	"bootargsfromsd=mem=32M console=tty0 console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p1 rw rootwait\0" \
-+	"bootcmdf1=mmc init; ext2load mmc 0:1 0x80600000 /boot/uImage; bootm;\0" \
-+	"bootargsf1=mem=32M console=tty0 console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p1 rw rootwait\0" \
-+	"bootcmdf2=mmc init; ext2load mmc 0:2 0x80600000 /boot/uImage; bootm;\0" \
-+	"bootargsf2=mem=32M console=tty0 console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p2 rw rootwait\0" \
-+	"bootcmdf3=mmc init; ext2load mmc 0:3 0x80600000 /boot/uImage; bootm;\0" \
-+	"bootargsf3=mem=32M console=tty0 console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p3 rw rootwait\0" \
-+	"bootcmdf4=mtdparts default;ubi part rootfs;ubifsmount rootfs;ubifsload 0x80600000 /boot/uImage; bootm;\0" \
-+	"bootargsf4=mem=32M console=tty0 console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
- 
- #define CONFIG_SYS_SDRAM_BASE		0x80000000	/* Cached addr */
- #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
--- 
-1.7.9.5
-

package/boot/uboot-xburst/patches/0005-add-nanonote-lcd-support.patch

@@ -1,847 +0,0 @@
-From ca8c5216cfd3ad3fda9867ed2d157ae5a209834b Mon Sep 17 00:00:00 2001
-From: Xiangfu <xiangfu@openmobilefree.net>
-Date: Wed, 10 Oct 2012 22:05:27 +0800
-Subject: [PATCH 5/6] add nanonote lcd support
-
----
- arch/mips/include/asm/global_data.h |    1 +
- arch/mips/include/asm/jz4740.h      |   90 ++++++++
- arch/mips/lib/board.c               |    6 +
- common/lcd.c                        |    9 +-
- drivers/video/Makefile              |    1 +
- drivers/video/nanonote_gpm940b0.c   |  400 +++++++++++++++++++++++++++++++++++
- drivers/video/nanonote_gpm940b0.h   |  135 ++++++++++++
- include/configs/qi_lb60.h           |    7 +
- include/lcd.h                       |   52 ++++-
- 9 files changed, 697 insertions(+), 4 deletions(-)
- create mode 100644 drivers/video/nanonote_gpm940b0.c
- create mode 100644 drivers/video/nanonote_gpm940b0.h
-
-diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
-index cd03d7e..7cec2de 100644
---- a/arch/mips/include/asm/global_data.h
-+++ b/arch/mips/include/asm/global_data.h
-@@ -44,6 +44,7 @@ typedef	struct	global_data {
- 	unsigned long	per_clk;	/* Peripheral bus clock */
- 	unsigned long	mem_clk;	/* Memory bus clock */
- 	unsigned long	dev_clk;	/* Device clock */
-+        unsigned long   fb_base;        /* base address of framebuffer */
- 	/* "static data" needed by most of timer.c */
- 	unsigned long	tbl;
- 	unsigned long	lastinc;
-diff --git a/arch/mips/include/asm/jz4740.h b/arch/mips/include/asm/jz4740.h
-index 68287fb..13724a2 100644
---- a/arch/mips/include/asm/jz4740.h
-+++ b/arch/mips/include/asm/jz4740.h
-@@ -1312,5 +1312,95 @@ do { 								\
-  	while (REG_MSC_STAT & MSC_STAT_IS_RESETTING);		\
- } while (0)
- 
-+/*************************************************************************
-+ * LCD (LCD Controller)
-+ *************************************************************************/
-+#define REG32(addr)	*((volatile u32 *)(addr))
-+
-+#define	CPM_BASE	0xB0000000
-+#define CPM_CPCCR	(CPM_BASE+0x00)
-+#define REG_CPM_CPCCR	REG32(CPM_CPCCR)
-+
-+#define	LCD_BASE	0xB3050000
-+#define LCD_CFG		(LCD_BASE + 0x00) /* LCD Configure Register */
-+#define LCD_VSYNC	(LCD_BASE + 0x04) /* Vertical Synchronize Register */
-+#define LCD_HSYNC	(LCD_BASE + 0x08) /* Horizontal Synchronize Register */
-+#define LCD_VAT		(LCD_BASE + 0x0c) /* Virtual Area Setting Register */
-+#define LCD_DAH		(LCD_BASE + 0x10) /* Display Area Horizontal Start/End Point */
-+#define LCD_DAV		(LCD_BASE + 0x14) /* Display Area Vertical Start/End Point */
-+#define LCD_PS		(LCD_BASE + 0x18) /* PS Signal Setting */
-+#define LCD_CLS		(LCD_BASE + 0x1c) /* CLS Signal Setting */
-+#define LCD_SPL		(LCD_BASE + 0x20) /* SPL Signal Setting */
-+#define LCD_REV		(LCD_BASE + 0x24) /* REV Signal Setting */
-+#define LCD_CTRL	(LCD_BASE + 0x30) /* LCD Control Register */
-+#define LCD_STATE	(LCD_BASE + 0x34) /* LCD Status Register */
-+#define LCD_IID		(LCD_BASE + 0x38) /* Interrupt ID Register */
-+#define LCD_DA0		(LCD_BASE + 0x40) /* Descriptor Address Register 0 */
-+#define LCD_SA0		(LCD_BASE + 0x44) /* Source Address Register 0 */
-+#define LCD_FID0	(LCD_BASE + 0x48) /* Frame ID Register 0 */
-+#define LCD_CMD0	(LCD_BASE + 0x4c) /* DMA Command Register 0 */
-+#define LCD_DA1		(LCD_BASE + 0x50) /* Descriptor Address Register 1 */
-+#define LCD_SA1		(LCD_BASE + 0x54) /* Source Address Register 1 */
-+#define LCD_FID1	(LCD_BASE + 0x58) /* Frame ID Register 1 */
-+#define LCD_CMD1	(LCD_BASE + 0x5c) /* DMA Command Register 1 */
-+
-+#define REG_LCD_CFG	REG32(LCD_CFG)
-+#define REG_LCD_VSYNC	REG32(LCD_VSYNC)
-+#define REG_LCD_HSYNC	REG32(LCD_HSYNC)
-+#define REG_LCD_VAT	REG32(LCD_VAT)
-+#define REG_LCD_DAH	REG32(LCD_DAH)
-+#define REG_LCD_DAV	REG32(LCD_DAV)
-+#define REG_LCD_PS	REG32(LCD_PS)
-+#define REG_LCD_CLS	REG32(LCD_CLS)
-+#define REG_LCD_SPL	REG32(LCD_SPL)
-+#define REG_LCD_REV	REG32(LCD_REV)
-+#define REG_LCD_CTRL	REG32(LCD_CTRL)
-+#define REG_LCD_STATE	REG32(LCD_STATE)
-+#define REG_LCD_IID	REG32(LCD_IID)
-+#define REG_LCD_DA0	REG32(LCD_DA0)
-+#define REG_LCD_SA0	REG32(LCD_SA0)
-+#define REG_LCD_FID0	REG32(LCD_FID0)
-+#define REG_LCD_CMD0	REG32(LCD_CMD0)
-+#define REG_LCD_DA1	REG32(LCD_DA1)
-+#define REG_LCD_SA1	REG32(LCD_SA1)
-+#define REG_LCD_FID1	REG32(LCD_FID1)
-+#define REG_LCD_CMD1	REG32(LCD_CMD1)
-+
-+#define LCD_CTRL_BPP_BIT	0  /* Bits Per Pixel */
-+#define LCD_CTRL_BPP_MASK	(0x07 << LCD_CTRL_BPP_BIT)
-+  #define LCD_CTRL_BPP_1	(0 << LCD_CTRL_BPP_BIT) /* 1 bpp */
-+  #define LCD_CTRL_BPP_2	(1 << LCD_CTRL_BPP_BIT) /* 2 bpp */
-+  #define LCD_CTRL_BPP_4	(2 << LCD_CTRL_BPP_BIT) /* 4 bpp */
-+  #define LCD_CTRL_BPP_8	(3 << LCD_CTRL_BPP_BIT) /* 8 bpp */
-+  #define LCD_CTRL_BPP_16	(4 << LCD_CTRL_BPP_BIT) /* 15/16 bpp */
-+  #define LCD_CTRL_BPP_18_24	(5 << LCD_CTRL_BPP_BIT) /* 18/24/32 bpp */
-+
-+#define LCD_CTRL_BST_BIT	28  /* Burst Length Selection */
-+#define LCD_CTRL_BST_MASK	(0x03 << LCD_CTRL_BST_BIT)
-+  #define LCD_CTRL_BST_4	(0 << LCD_CTRL_BST_BIT) /* 4-word */
-+  #define LCD_CTRL_BST_8	(1 << LCD_CTRL_BST_BIT) /* 8-word */
-+  #define LCD_CTRL_BST_16	(2 << LCD_CTRL_BST_BIT) /* 16-word */
-+#define LCD_CTRL_RGB565		(0 << 27) /* RGB565 mode */
-+#define LCD_CTRL_RGB555		(1 << 27) /* RGB555 mode */
-+#define LCD_CTRL_OFUP		(1 << 26) /* Output FIFO underrun protection enable */
-+#define LCD_CTRL_FRC_BIT	24  /* STN FRC Algorithm Selection */
-+#define LCD_CTRL_FRC_MASK	(0x03 << LCD_CTRL_FRC_BIT)
-+  #define LCD_CTRL_FRC_16	(0 << LCD_CTRL_FRC_BIT) /* 16 grayscale */
-+  #define LCD_CTRL_FRC_4	(1 << LCD_CTRL_FRC_BIT) /* 4 grayscale */
-+  #define LCD_CTRL_FRC_2	(2 << LCD_CTRL_FRC_BIT) /* 2 grayscale */
-+
-+#define CPM_LPCDR	(CPM_BASE+0x64)
-+#define CPM_CLKGR	(CPM_BASE+0x20)
-+#define REG_CPM_LPCDR	REG32(CPM_LPCDR)
-+#define REG_CPM_CLKGR	REG32(CPM_CLKGR)
-+
-+#define __cpm_start_tcu()	(REG_CPM_CLKGR &= ~CPM_CLKGR_TCU)
-+#define __cpm_stop_lcd()	(REG_CPM_CLKGR |= CPM_CLKGR_LCD)
-+#define __cpm_set_pixdiv(v) \
-+	(REG_CPM_LPCDR = (REG_CPM_LPCDR & ~CPM_LPCDR_PIXDIV_MASK) | ((v) << (CPM_LPCDR_PIXDIV_BIT)))
-+#define __cpm_set_ldiv(v) \
-+	(REG_CPM_CPCCR = (REG_CPM_CPCCR & ~CPM_CPCCR_LDIV_MASK) | ((v) << (CPM_CPCCR_LDIV_BIT)))
-+#define __cpm_start_lcd()	(REG_CPM_CLKGR &= ~CPM_CLKGR_LCD)
-+
- #endif	/* !__ASSEMBLY__ */
- #endif	/* __JZ4740_H__ */
-diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
-index b14b33e..c2e64d9 100644
---- a/arch/mips/lib/board.c
-+++ b/arch/mips/lib/board.c
-@@ -172,6 +172,12 @@ void board_init_f(ulong bootflag)
- 	addr &= ~(4096 - 1);
- 	debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
- 
-+#ifdef CONFIG_LCD
-+        /* reserve memory for LCD display (always full pages) */
-+        addr = lcd_setmem (addr);
-+        gd->fb_base = addr;
-+#endif /* CONFIG_LCD */
-+
- 	/* Reserve memory for U-Boot code, data & bss
- 	 * round down to next 16 kB limit
- 	 */
-diff --git a/common/lcd.c b/common/lcd.c
-index b6be800..af1281a 100644
---- a/common/lcd.c
-+++ b/common/lcd.c
-@@ -263,6 +263,13 @@ static void lcd_drawchars(ushort x, ushort y, uchar *str, int count)
- 						lcd_color_fg : lcd_color_bg;
- 				bits <<= 1;
- 			}
-+#elif LCD_BPP == LCD_COLOR32
-+                       uint *m = (uint *)d;
-+                       for (c=0; c<32; ++c) {
-+                               *m++ = (bits & 0x80) ?
-+				       lcd_color_fg : lcd_color_bg;
-+                               bits <<= 1;
-+                       }
- #endif
- 		}
- #if LCD_BPP == LCD_MONOCHROME
-@@ -509,7 +516,7 @@ static inline ushort *configuration_get_cmap(void)
- 	return (ushort *)&(cp->lcd_cmap[255 * sizeof(ushort)]);
- #elif defined(CONFIG_ATMEL_LCD)
- 	return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0));
--#elif !defined(CONFIG_ATMEL_HLCD) && !defined(CONFIG_EXYNOS_FB)
-+#elif !defined(CONFIG_ATMEL_HLCD) && !defined(CONFIG_EXYNOS_FB) && !defined(CONFIG_VIDEO_GPM940B0)
- 	return panel_info.cmap;
- #else
- #if defined(CONFIG_LCD_LOGO)
-diff --git a/drivers/video/Makefile b/drivers/video/Makefile
-index ebb6da8..03625bc 100644
---- a/drivers/video/Makefile
-+++ b/drivers/video/Makefile
-@@ -50,6 +50,7 @@ COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
- COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
- COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
- COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
-+COBJS-$(CONFIG_VIDEO_GPM940B0) += nanonote_gpm940b0.o
- 
- COBJS	:= $(sort $(COBJS-y))
- SRCS	:= $(COBJS:.o=.c)
-diff --git a/drivers/video/nanonote_gpm940b0.c b/drivers/video/nanonote_gpm940b0.c
-new file mode 100644
-index 0000000..11efb72
---- /dev/null
-+++ b/drivers/video/nanonote_gpm940b0.c
-@@ -0,0 +1,400 @@
-+/*
-+ * JzRISC lcd controller
-+ *
-+ * Xiangfu Liu <xiangfu@sharism.cc>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <config.h>
-+#include <common.h>
-+#include <lcd.h>
-+
-+#include <asm/io.h>               /* virt_to_phys() */
-+#include <asm/jz4740.h>
-+
-+#include "nanonote_gpm940b0.h"
-+
-+#define align2(n) (n)=((((n)+1)>>1)<<1)
-+#define align4(n) (n)=((((n)+3)>>2)<<2)
-+#define align8(n) (n)=((((n)+7)>>3)<<3)
-+
-+struct jzfb_info {
-+	unsigned int cfg;	/* panel mode and pin usage etc. */
-+	unsigned int w;
-+	unsigned int h;
-+	unsigned int bpp;	/* bit per pixel */
-+	unsigned int fclk;	/* frame clk */
-+	unsigned int hsw;	/* hsync width, in pclk */
-+	unsigned int vsw;	/* vsync width, in line count */
-+	unsigned int elw;	/* end of line, in pclk */
-+	unsigned int blw;	/* begin of line, in pclk */
-+	unsigned int efw;	/* end of frame, in line count */
-+	unsigned int bfw;	/* begin of frame, in line count */
-+};
-+
-+static struct jzfb_info jzfb = {
-+	MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
-+	320, 240, 32, 70, 1, 1, 273, 140, 1, 20
-+};
-+
-+vidinfo_t panel_info = {
-+	320, 240, LCD_BPP,
-+};
-+
-+void *lcd_base;
-+void *lcd_console_address;
-+int lcd_line_length;
-+int lcd_color_fg;
-+int lcd_color_bg;
-+short console_col;
-+short console_row;
-+
-+static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
-+{
-+	u_long palette_mem_size;
-+	struct jz_fb_info *fbi = &vid->jz_fb;
-+	int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8;
-+
-+	fbi->screen = (u_long)lcdbase;
-+	fbi->palette_size = 256;
-+	palette_mem_size = fbi->palette_size * sizeof(u16);
-+
-+	debug("jz_lcd.c palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
-+	/* locate palette and descs at end of page following fb */
-+	fbi->palette = (u_long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size;
-+
-+	return 0;
-+}
-+
-+static void jz_lcd_desc_init(vidinfo_t *vid)
-+{
-+	struct jz_fb_info * fbi;
-+	fbi = &vid->jz_fb;
-+	fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
-+	fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 2*16);
-+	fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);
-+
-+	#define BYTES_PER_PANEL	 (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)
-+
-+	/* populate descriptors */
-+	fbi->dmadesc_fblow->fdadr = virt_to_phys(fbi->dmadesc_fblow);
-+	fbi->dmadesc_fblow->fsadr = virt_to_phys((void *)(fbi->screen + BYTES_PER_PANEL));
-+	fbi->dmadesc_fblow->fidr  = 0;
-+	fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL / 4 ;
-+
-+	fbi->fdadr1 = virt_to_phys(fbi->dmadesc_fblow); /* only used in dual-panel mode */
-+
-+	fbi->dmadesc_fbhigh->fsadr = virt_to_phys((void *)fbi->screen);
-+	fbi->dmadesc_fbhigh->fidr = 0;
-+	fbi->dmadesc_fbhigh->ldcmd =  BYTES_PER_PANEL / 4; /* length in word */
-+
-+	fbi->dmadesc_palette->fsadr = virt_to_phys((void *)fbi->palette);
-+	fbi->dmadesc_palette->fidr  = 0;
-+	fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2)/4 | (1<<28);
-+
-+	if(NBITS(vid->vl_bpix) < 12) {
-+		/* assume any mode with <12 bpp is palette driven */
-+		fbi->dmadesc_palette->fdadr = virt_to_phys(fbi->dmadesc_fbhigh);
-+		fbi->dmadesc_fbhigh->fdadr = virt_to_phys(fbi->dmadesc_palette);
-+		/* flips back and forth between pal and fbhigh */
-+		fbi->fdadr0 = virt_to_phys(fbi->dmadesc_palette);
-+	} else {
-+		/* palette shouldn't be loaded in true-color mode */
-+		fbi->dmadesc_fbhigh->fdadr = virt_to_phys((void *)fbi->dmadesc_fbhigh);
-+		fbi->fdadr0 = virt_to_phys(fbi->dmadesc_fbhigh); /* no pal just fbhigh */
-+	}
-+}
-+
-+static int  jz_lcd_hw_init(vidinfo_t *vid)
-+{
-+	struct jz_fb_info *fbi = &vid->jz_fb;
-+	unsigned int val = 0;
-+	unsigned int pclk;
-+	unsigned int stnH;
-+	int pll_div;
-+
-+	/* Setting Control register */
-+	switch (jzfb.bpp) {
-+	case 1:
-+		val |= LCD_CTRL_BPP_1;
-+		break;
-+	case 2:
-+		val |= LCD_CTRL_BPP_2;
-+		break;
-+	case 4:
-+		val |= LCD_CTRL_BPP_4;
-+		break;
-+	case 8:
-+		val |= LCD_CTRL_BPP_8;
-+		break;
-+	case 15:
-+		val |= LCD_CTRL_RGB555;
-+	case 16:
-+		val |= LCD_CTRL_BPP_16;
-+		break;
-+	case 17 ... 32:
-+		val |= LCD_CTRL_BPP_18_24;	/* target is 4bytes/pixel */
-+		break;
-+
-+	default:
-+		printf("jz_lcd.c The BPP %d is not supported\n", jzfb.bpp);
-+		val |= LCD_CTRL_BPP_16;
-+		break;
-+	}
-+
-+	switch (jzfb.cfg & MODE_MASK) {
-+	case MODE_STN_MONO_DUAL:
-+	case MODE_STN_COLOR_DUAL:
-+	case MODE_STN_MONO_SINGLE:
-+	case MODE_STN_COLOR_SINGLE:
-+		switch (jzfb.bpp) {
-+		case 1:
-+			/* val |= LCD_CTRL_PEDN; */
-+		case 2:
-+			val |= LCD_CTRL_FRC_2;
-+			break;
-+		case 4:
-+			val |= LCD_CTRL_FRC_4;
-+			break;
-+		case 8:
-+		default:
-+			val |= LCD_CTRL_FRC_16;
-+			break;
-+		}
-+		break;
-+	}
-+
-+	val |= LCD_CTRL_BST_16;		/* Burst Length is 16WORD=64Byte */
-+	val |= LCD_CTRL_OFUP;		/* OutFIFO underrun protect */
-+
-+	switch (jzfb.cfg & MODE_MASK) {
-+	case MODE_STN_MONO_DUAL:
-+	case MODE_STN_COLOR_DUAL:
-+	case MODE_STN_MONO_SINGLE:
-+	case MODE_STN_COLOR_SINGLE:
-+		switch (jzfb.cfg & STN_DAT_PINMASK) {
-+		case STN_DAT_PIN1:
-+			/* Do not adjust the hori-param value. */
-+			break;
-+		case STN_DAT_PIN2:
-+			align2(jzfb.hsw);
-+			align2(jzfb.elw);
-+			align2(jzfb.blw);
-+			break;
-+		case STN_DAT_PIN4:
-+			align4(jzfb.hsw);
-+			align4(jzfb.elw);
-+			align4(jzfb.blw);
-+			break;
-+		case STN_DAT_PIN8:
-+			align8(jzfb.hsw);
-+			align8(jzfb.elw);
-+			align8(jzfb.blw);
-+			break;
-+		}
-+		break;
-+	}
-+
-+	REG_LCD_CTRL = val;
-+
-+	switch (jzfb.cfg & MODE_MASK) {
-+	case MODE_STN_MONO_DUAL:
-+	case MODE_STN_COLOR_DUAL:
-+	case MODE_STN_MONO_SINGLE:
-+	case MODE_STN_COLOR_SINGLE:
-+		if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
-+		    ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
-+			stnH = jzfb.h >> 1;
-+		else
-+			stnH = jzfb.h;
-+
-+		REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
-+		REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
-+
-+		/* Screen setting */
-+		REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
-+		REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
-+		REG_LCD_DAV = (0 << 16) | (stnH);
-+
-+		/* AC BIAs signal */
-+		REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
-+
-+		break;
-+
-+	case MODE_TFT_GEN:
-+	case MODE_TFT_SHARP:
-+	case MODE_TFT_CASIO:
-+	case MODE_TFT_SAMSUNG:
-+	case MODE_8BIT_SERIAL_TFT:
-+	case MODE_TFT_18BIT:
-+		REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
-+		REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
-+		REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
-+		REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
-+		REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
-+			| (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
-+		break;
-+	}
-+
-+	switch (jzfb.cfg & MODE_MASK) {
-+	case MODE_TFT_SAMSUNG:
-+	{
-+		unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
-+		unsigned int rev_s, rev_e, inv_s, inv_e;
-+
-+		pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
-+			(jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
-+
-+		total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
-+		tp_s = jzfb.blw + jzfb.w + 1;
-+		tp_e = tp_s + 1;
-+		ckv_s = tp_s - pclk/(1000000000/4100);
-+		ckv_e = tp_s + total;
-+		rev_s = tp_s - 11;	/* -11.5 clk */
-+		rev_e = rev_s + total;
-+		inv_s = tp_s;
-+		inv_e = inv_s + total;
-+		REG_LCD_CLS = (tp_s << 16) | tp_e;
-+		REG_LCD_PS = (ckv_s << 16) | ckv_e;
-+		REG_LCD_SPL = (rev_s << 16) | rev_e;
-+		REG_LCD_REV = (inv_s << 16) | inv_e;
-+		jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
-+		break;
-+	}
-+	case MODE_TFT_SHARP:
-+	{
-+		unsigned int total, cls_s, cls_e, ps_s, ps_e;
-+		unsigned int spl_s, spl_e, rev_s, rev_e;
-+		total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
-+		spl_s = 1;
-+		spl_e = spl_s + 1;
-+		cls_s = 0;
-+		cls_e = total - 60;	/* > 4us (pclk = 80ns) */
-+		ps_s = cls_s;
-+		ps_e = cls_e;
-+		rev_s = total - 40;	/* > 3us (pclk = 80ns) */
-+		rev_e = rev_s + total;
-+		jzfb.cfg |= STFT_PSHI; 
-+		REG_LCD_SPL = (spl_s << 16) | spl_e;
-+		REG_LCD_CLS = (cls_s << 16) | cls_e;
-+		REG_LCD_PS = (ps_s << 16) | ps_e;
-+		REG_LCD_REV = (rev_s << 16) | rev_e;
-+		break;
-+	}
-+	case MODE_TFT_CASIO:
-+		break;
-+	}
-+
-+	/* Configure the LCD panel */
-+	REG_LCD_CFG = jzfb.cfg;
-+
-+	/* Timing setting */
-+	__cpm_stop_lcd();
-+
-+	val = jzfb.fclk; /* frame clk */
-+	if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) {
-+		pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
-+			(jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
-+	} else {
-+		/* serial mode: Hsync period = 3*Width_Pixel */
-+		pclk = val * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) *
-+			(jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
-+	}
-+
-+	if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
-+	    ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
-+		pclk = (pclk * 3);
-+
-+	if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
-+	    ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
-+	    ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) ||
-+	    ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
-+		pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4);
-+
-+	if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
-+	    ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
-+		pclk >>= 1;
-+
-+	pll_div = (REG_CPM_CPCCR & CPM_CPCCR_PCS); /* clock source,0:pllout/2 1: pllout */
-+	pll_div = pll_div ? 1 : 2;
-+	val = (__cpm_get_pllout() / pll_div) / pclk;
-+	val--;
-+	if (val > 0x1ff) {
-+		printf("CPM_LPCDR too large, set it to 0x1ff\n");
-+		val = 0x1ff;
-+	}
-+	__cpm_set_pixdiv(val);
-+
-+	val = pclk * 3 ;	/* LCDClock > 2.5*Pixclock */
-+	if (val > 150000000) {
-+		printf("Warning: LCDClock=%d\n, LCDClock must less or equal to 150MHz.\n", val);
-+		printf("Change LCDClock to 150MHz\n");
-+		val = 150000000;
-+	}
-+	val = (__cpm_get_pllout() / pll_div) / val;
-+	val--;
-+	if (val > 0x1f) {
-+		printf("CPM_CPCCR.LDIV too large, set it to 0x1f\n");
-+		val = 0x1f;
-+	}
-+	__cpm_set_ldiv( val );
-+	REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */
-+
-+	__cpm_start_lcd();
-+	udelay(1000);
-+
-+	REG_LCD_DA0 = fbi->fdadr0; /* frame descripter*/
-+
-+	if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
-+	    ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
-+		REG_LCD_DA1 = fbi->fdadr1; /* frame descripter*/
-+
-+	return 0;
-+}
-+
-+void lcd_ctrl_init (void *lcdbase)
-+{
-+	__lcd_display_pin_init();
-+	__lcd_display_on() ;
-+
-+	jz_lcd_init_mem(lcdbase, &panel_info);
-+	jz_lcd_desc_init(&panel_info);
-+	jz_lcd_hw_init(&panel_info);
-+
-+}
-+
-+/*
-+ * Before enabled lcd controller, lcd registers should be configured correctly.
-+ */
-+void lcd_enable (void)
-+{
-+	REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */
-+	REG_LCD_CTRL |= 1<<3;    /* LCDCTRL.ENA*/
-+}
-+
-+void lcd_disable (void)
-+{
-+	REG_LCD_CTRL |= (1<<4);
-+}
-+
-+void lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
-+{
-+}
-+
-+void lcd_initcolregs (void)
-+{
-+}
-diff --git a/drivers/video/nanonote_gpm940b0.h b/drivers/video/nanonote_gpm940b0.h
-new file mode 100644
-index 0000000..efe491e
---- /dev/null
-+++ b/drivers/video/nanonote_gpm940b0.h
-@@ -0,0 +1,135 @@
-+/*
-+ * JzRISC lcd controller
-+ *
-+ * Xiangfu Liu <xiangfu@sharism.cc>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __QI_LB60_GPM940B0_H__
-+#define __QI_LB60_GPM940B0_H__
-+
-+struct lcd_desc{
-+	unsigned int next_desc; /* LCDDAx */
-+	unsigned int databuf;   /* LCDSAx */
-+	unsigned int frame_id;  /* LCDFIDx */ 
-+	unsigned int cmd;       /* LCDCMDx */
-+};
-+
-+#define MODE_MASK		0x0f
-+#define MODE_TFT_GEN		0x00
-+#define MODE_TFT_SHARP		0x01
-+#define MODE_TFT_CASIO		0x02
-+#define MODE_TFT_SAMSUNG	0x03
-+#define MODE_CCIR656_NONINT	0x04
-+#define MODE_CCIR656_INT	0x05
-+#define MODE_STN_COLOR_SINGLE	0x08
-+#define MODE_STN_MONO_SINGLE	0x09
-+#define MODE_STN_COLOR_DUAL	0x0a
-+#define MODE_STN_MONO_DUAL	0x0b
-+#define MODE_8BIT_SERIAL_TFT    0x0c
-+
-+#define MODE_TFT_18BIT          (1<<7)
-+
-+#define STN_DAT_PIN1	(0x00 << 4)
-+#define STN_DAT_PIN2	(0x01 << 4)
-+#define STN_DAT_PIN4	(0x02 << 4)
-+#define STN_DAT_PIN8	(0x03 << 4)
-+#define STN_DAT_PINMASK	STN_DAT_PIN8
-+
-+#define STFT_PSHI	(1 << 15)
-+#define STFT_CLSHI	(1 << 14)
-+#define STFT_SPLHI	(1 << 13)
-+#define STFT_REVHI	(1 << 12)
-+
-+#define SYNC_MASTER	(0 << 16)
-+#define SYNC_SLAVE	(1 << 16)
-+
-+#define DE_P		(0 << 9)
-+#define DE_N		(1 << 9)
-+
-+#define PCLK_P		(0 << 10)
-+#define PCLK_N		(1 << 10)
-+
-+#define HSYNC_P		(0 << 11)
-+#define HSYNC_N		(1 << 11)
-+
-+#define VSYNC_P		(0 << 8)
-+#define VSYNC_N		(1 << 8)
-+
-+#define DATA_NORMAL	(0 << 17)
-+#define DATA_INVERSE	(1 << 17)
-+
-+
-+/* Jz LCDFB supported I/O controls. */
-+#define FBIOSETBACKLIGHT	0x4688
-+#define FBIODISPON		0x4689
-+#define FBIODISPOFF		0x468a
-+#define FBIORESET		0x468b
-+#define FBIOPRINT_REG		0x468c
-+
-+/*
-+ * LCD panel specific definition
-+ */
-+#define MODE	(0xc9)		/* 8bit serial RGB */
-+
-+#define __spi_write_reg1(reg, val)		\
-+do {						\
-+	unsigned char no;			\
-+	unsigned short value;			\
-+	unsigned char a=reg;			\
-+	unsigned char b=val;			\
-+	__gpio_set_pin(SPEN);			\
-+	__gpio_set_pin(SPCK);			\
-+	__gpio_clear_pin(SPDA);			\
-+	__gpio_clear_pin(SPEN);			\
-+	value=((a<<8)|(b&0xFF));		\
-+	for(no=0;no<16;no++)			\
-+	{					\
-+		__gpio_clear_pin(SPCK);		\
-+		if((value&0x8000)==0x8000)	\
-+			__gpio_set_pin(SPDA);	\
-+		else				\
-+			__gpio_clear_pin(SPDA);	\
-+		__gpio_set_pin(SPCK);		\
-+		value=(value<<1);		\
-+	}					\
-+	__gpio_set_pin(SPEN);			\
-+} while (0)
-+
-+#define __lcd_display_pin_init()		\
-+do {						\
-+	__cpm_start_tcu();			\
-+	__gpio_as_output(SPEN); /* use SPDA */	\
-+	__gpio_as_output(SPCK); /* use SPCK */	\
-+	__gpio_as_output(SPDA); /* use SPDA */	\
-+} while (0)
-+
-+#define __lcd_display_on()			\
-+do {						\
-+	__spi_write_reg1(0x05, 0x1e);		\
-+	__spi_write_reg1(0x05, 0x5e);		\
-+	__spi_write_reg1(0x07, 0x8d);		\
-+	__spi_write_reg1(0x13, 0x01);		\
-+	__spi_write_reg1(0x05, 0x5f);		\
-+} while (0)
-+
-+#define __lcd_display_off()			\
-+do {						\
-+	__spi_write_reg1(0x05, 0x5e);		\
-+} while (0)
-+
-+#endif /* __QI_LB60_GPM940B0_H__ */
-diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h
-index 52b370c..d3e78ad 100644
---- a/include/configs/qi_lb60.h
-+++ b/include/configs/qi_lb60.h
-@@ -32,6 +32,13 @@
-  * Miscellaneous configurable options
-  */
- #define CONFIG_NANONOTE
-+
-+#define CONFIG_LCD
-+#define CONFIG_SYS_WHITE_ON_BLACK
-+#define LCD_BPP			LCD_COLOR32
-+#define CONFIG_VIDEO_GPM940B0
-+
-+
- #define CONFIG_JZ4740_MMC
- #define CONFIG_MMC      	1
- #define CONFIG_FAT      	1
-diff --git a/include/lcd.h b/include/lcd.h
-index 42070d7..6de5482 100644
---- a/include/lcd.h
-+++ b/include/lcd.h
-@@ -263,8 +263,44 @@ typedef struct vidinfo {
- 
- void init_panel_info(vidinfo_t *vid);
- 
--#else
-+#elif defined(CONFIG_JZSOC)
-+/*
-+ * LCD controller stucture for JZSOC: JZ4740
-+ */
-+struct jz_fb_dma_descriptor {
-+       u_long  fdadr;          /* Frame descriptor address register */
-+       u_long  fsadr;          /* Frame source address register */
-+       u_long  fidr;           /* Frame ID register */
-+       u_long  ldcmd;          /* Command register */
-+};
-+
-+/*
-+ * Jz LCD info
-+ */
-+struct jz_fb_info {
-+
-+       u_long  fdadr0; /* physical address of frame/palette descriptor */
-+       u_long  fdadr1; /* physical address of frame descriptor */
-+
-+       /* DMA descriptors */
-+       struct  jz_fb_dma_descriptor *  dmadesc_fblow;
-+       struct  jz_fb_dma_descriptor *  dmadesc_fbhigh;
-+       struct  jz_fb_dma_descriptor *  dmadesc_palette;
-+       u_long  screen;         /* address of frame buffer */
-+       u_long  palette;        /* address of palette memory */
-+       u_int   palette_size;
-+};
-+typedef struct vidinfo {
-+       ushort  vl_col;         /* Number of columns (i.e. 640) */
-+       ushort  vl_row;         /* Number of rows (i.e. 480) */
-+       u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
-+
-+       struct jz_fb_info jz_fb;
-+} vidinfo_t;
-+
-+extern vidinfo_t panel_info;
- 
-+#else
- typedef struct vidinfo {
- 	ushort	vl_col;		/* Number of columns (i.e. 160) */
- 	ushort	vl_row;		/* Number of rows (i.e. 100) */
-@@ -318,6 +354,7 @@ void lcd_show_board_info(void);
- #define LCD_COLOR4	2
- #define LCD_COLOR8	3
- #define LCD_COLOR16	4
-+#define LCD_COLOR32	5
- 
- /*----------------------------------------------------------------------*/
- #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
-@@ -369,7 +406,7 @@ void lcd_show_board_info(void);
- # define CONSOLE_COLOR_GREY	14
- # define CONSOLE_COLOR_WHITE	15	/* Must remain last / highest	*/
- 
--#else
-+#elif LCD_BPP == LCD_COLOR16
- 
- /*
-  * 16bpp color definitions
-@@ -377,6 +414,15 @@ void lcd_show_board_info(void);
- # define CONSOLE_COLOR_BLACK	0x0000
- # define CONSOLE_COLOR_WHITE	0xffff	/* Must remain last / highest	*/
- 
-+#elif LCD_BPP == LCD_COLOR32
-+/*
-+ * 18,24,32 bpp color definitions
-+ */
-+# define CONSOLE_COLOR_BLACK   0x00000000
-+# define CONSOLE_COLOR_WHITE   0xffffffff /* Must remain last / highest */
-+
-+#else
-+
- #endif /* color definitions */
- 
- /************************************************************************/
-@@ -406,7 +452,7 @@ void lcd_show_board_info(void);
- #if LCD_BPP == LCD_MONOCHROME
- # define COLOR_MASK(c)		((c)	  | (c) << 1 | (c) << 2 | (c) << 3 | \
- 				 (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
--#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
-+#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16) || (LCD_BPP == LCD_COLOR32)
- # define COLOR_MASK(c)		(c)
- #else
- # error Unsupported LCD BPP.
--- 
-1.7.9.5
-