diff --git a/include/kernel-5.15 b/include/kernel-5.15 index ddb9b7a875..733a8edf78 100644 --- a/include/kernel-5.15 +++ b/include/kernel-5.15 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.15 = .112 -LINUX_KERNEL_HASH-5.15.112 = b0e8ebdba38e0c369f64ec4dc2a69ec59ffe87a64b82f940dbdf8e752b6ad651 +LINUX_VERSION-5.15 = .113 +LINUX_KERNEL_HASH-5.15.113 = 4a4e98d21149d781867a6d44855f708b02f03cfe233d8026a0af9c9841b3b9ca diff --git a/package/boot/arm-trusted-firmware-mediatek/Makefile b/package/boot/arm-trusted-firmware-mediatek/Makefile index 2f879f9a57..2098d0835f 100644 --- a/package/boot/arm-trusted-firmware-mediatek/Makefile +++ b/package/boot/arm-trusted-firmware-mediatek/Makefile @@ -30,6 +30,7 @@ define Trusted-Firmware-A/Default DDR3_FLYBY:= DDR_TYPE:= NAND_TYPE:= + BOARD_QFN:= endef define Trusted-Firmware-A/mt7622-nor-1ddr @@ -92,6 +93,46 @@ define Trusted-Firmware-A/mt7622-sdmmc-2ddr DDR3_FLYBY:=1 endef +define Trusted-Firmware-A/mt7981-nor-ddr3 + NAME:=MediaTek MT7981 (SPI-NOR, DDR3) + BOOT_DEVICE:=nor + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr3 +endef + +define Trusted-Firmware-A/mt7981-emmc-ddr3 + NAME:=MediaTek MT7981 (eMMC, DDR3) + BOOT_DEVICE:=emmc + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr3 +endef + +define Trusted-Firmware-A/mt7981-sdmmc-ddr3 + NAME:=MediaTek MT7981 (SD card, DDR3) + BOOT_DEVICE:=sdmmc + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr3 +endef + +define Trusted-Firmware-A/mt7986-snand-ddr3 + NAME:=MediaTek MT7981 (SPI-NAND via SNFI, DDR3) + BOOT_DEVICE:=snand + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr3 +endef + +define Trusted-Firmware-A/mt7981-spim-nand-ddr3 + NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR3) + BOOT_DEVICE:=spim-nand + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr3 +endef + define Trusted-Firmware-A/mt7986-nor-ddr4 NAME:=MediaTek MT7986 (SPI-NOR, DDR4) BOOT_DEVICE:=nor @@ -182,6 +223,11 @@ TFA_TARGETS:= \ mt7622-emmc-2ddr \ mt7622-sdmmc-1ddr \ mt7622-sdmmc-2ddr \ + mt7981-emmc-ddr3 \ + mt7981-nor-ddr3 \ + mt7981-sdmmc-ddr3 \ + mt7986-snand-ddr3 \ + mt7981-spim-nand-ddr3 \ mt7986-emmc-ddr3 \ mt7986-nor-ddr3 \ mt7986-sdmmc-ddr3 \ @@ -197,6 +243,7 @@ TFA_MAKE_FLAGS += \ BOOT_DEVICE=$(BOOT_DEVICE) \ USE_MKIMAGE=1 MKIMAGE=$(STAGING_DIR_HOST)/bin/mkimage \ $(if $(findstring ddr4,$(DDR_TYPE)),DRAM_USE_DDR4=1) \ + $(if $(BOARD_QFN),BOARD_QFN=1,BOARD_BGA=1) \ $(if $(NAND_TYPE),NAND_TYPE=$(NAND_TYPE)) \ HAVE_DRAM_OBJ_FILE=yes \ $(if $(DDR3_FLYBY),DDR3_FLYBY=1) \ diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index 6ae6978561..d1098f5215 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -47,6 +47,7 @@ xiaomi,redmi-router-ax6000-stock) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x20000" ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x10000" "0x20000" ;; +qihoo,360t7|\ tplink,tl-xdr4288|\ tplink,tl-xdr6086|\ tplink,tl-xdr6088|\ diff --git a/package/boot/uboot-layerscape/files/fsl_ls1012a-frwy-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1012a-frwy-sdboot-uEnv.txt index 592158955e..18efdc1bc3 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1012a-frwy-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1012a-frwy-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0x8fffffff initrd_high=0xffffffffffffffff sd_boot=ext4load mmc 0:1 $loadaddr fitImage;bootm $loadaddr diff --git a/package/boot/uboot-layerscape/files/fsl_ls1012a-rdb-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1012a-rdb-uEnv.txt index 8d57d51ece..0898354e77 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1012a-rdb-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1012a-rdb-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 qspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr bootargs=root=/dev/mtdblock8 rootfstype=squashfs,jffs2 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=1550000.spi:1m(bl2),4m(fip),1m(u-boot-env),4m(reserved-1),3m(pfe),2m(reserved-2),1m(dtb),16m(kernel),32m(rootfs),49m@0xf00000(firmware) diff --git a/package/boot/uboot-layerscape/files/fsl_ls1021a-iot-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1021a-iot-sdboot-uEnv.txt index ae0d6a6f96..f8ec2c10fe 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1021a-iot-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1021a-iot-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0x8fffffff initrd_high=0xffffffff sd_boot=ext4load mmc 0:1 ${loadaddr} fitImage;bootm ${loadaddr} diff --git a/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-sdboot-uEnv.txt index 55620d6725..d7f67e78ec 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0x8fffffff initrd_high=0xffffffff sd_boot=ext4load mmc 0:1 $loadaddr fitImage;bootm $loadaddr diff --git a/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-uEnv.txt index 6d4647b1fd..26fb3e9207 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1021a-twr-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 nor_boot=cp.b 60f00000 $fdtaddr 100000;cp.b 61000000 $loadaddr 1000000;bootm $loadaddr - $fdtaddr bootargs=root=/dev/mtdblock6 rootfstype=squashfs,jffs2 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=60000000.nor:1m(rcw),2m(u-boot),1m(u-boot-env),11m(reserved-1),1m(dtb),16m(kernel),32m(rootfs),49m@0xf00000(firmware) cma=64M@0x0-0xb0000000 diff --git a/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-sdboot-uEnv.txt index 3c39c2263d..591210eea7 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0x8fffffff initrd_high=0xffffffffffffffff hwconfig=fsl_ddr:bank_intlv=auto diff --git a/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-uEnv.txt index acb61ca00a..c601cab92f 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1043a-rdb-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 hwconfig=fsl_ddr:bank_intlv=auto nor_boot=cp.b 60f00000 $fdtaddr 100000;cp.b 61000000 $loadaddr 1000000;bootm $loadaddr - $fdtaddr diff --git a/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt index 303157cb80..e69332efac 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 hwconfig=fsl_ddr:bank_intlv=auto sd_boot=ext4load mmc 0:1 ${loadaddr} fitImage;bootm ${loadaddr} diff --git a/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt index 5461bba9b6..ad5cc77841 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 hwconfig=fsl_ddr:bank_intlv=auto qspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr diff --git a/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-sdboot-uEnv.txt index 3c39c2263d..591210eea7 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0x8fffffff initrd_high=0xffffffffffffffff hwconfig=fsl_ddr:bank_intlv=auto diff --git a/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-uEnv.txt index e52e48802b..dab8faaf13 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1046a-rdb-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 hwconfig=fsl_ddr:bank_intlv=auto qspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr diff --git a/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-sdboot-uEnv.txt index f616cb1398..5b23537844 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0xa0000000 initrd_high=0xffffffffffffffff hwconfig=fsl_ddr:bank_intlv=auto diff --git a/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-uEnv.txt index 210c18721d..a15717bcb8 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls1088a-rdb-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0xa0000000 initrd_high=0xffffffffffffffff hwconfig=fsl_ddr:bank_intlv=auto diff --git a/package/boot/uboot-layerscape/files/fsl_ls2088a-rdb-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls2088a-rdb-uEnv.txt index 946029d1f1..646aed4427 100644 --- a/package/boot/uboot-layerscape/files/fsl_ls2088a-rdb-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_ls2088a-rdb-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 fdt_high=0xa0000000 initrd_high=0xffffffffffffffff hwconfig=fsl_ddr:bank_intlv=auto diff --git a/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt index d137319915..2d8043d7b1 100644 --- a/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 hwconfig=fsl_ddr:bank_intlv=auto mc_init=mmc read 80000000 5000 1800;mmc read 80300000 7000 800;fsl_mc start mc 80000000 80300000;mmc read 80400000 6800 800;fsl_mc apply dpl 80400000 diff --git a/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt index 41fde35c88..16f905afc6 100644 --- a/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt +++ b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt @@ -1,5 +1,5 @@ fdtaddr=0x8f000000 -loadaddr=0x81000000 +loadaddr=0x88000000 bootm_size=0x10000000 hwconfig=fsl_ddr:bank_intlv=auto mc_init=sf probe 0:0;sf read 80000000 a00000 300000;sf read 80300000 e00000 100000;fsl_mc start mc 80000000 80300000;sf read 80400000 d00000 100000;fsl_mc apply dpl 80400000 diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index 12c305617b..8ea05b9159 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -176,6 +176,18 @@ define U-Boot/mt7629_rfb UBOOT_CONFIG:=mt7629_rfb endef +define U-Boot/mt7981_qihoo_360t7 + NAME:=Qihoo 360T7 + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=qihoo_360t7 + UBOOT_CONFIG:=mt7981_qihoo-360t7 + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=spim-nand + BL2_SOC:=mt7981 + BL2_DDRTYPE:=ddr3 + DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3 +endef + define U-Boot/mt7986_rfb NAME:=MT7986 Reference Board BUILD_SUBTARGET:=filogic @@ -301,6 +313,7 @@ UBOOT_TARGETS := \ mt7628_rfb \ ravpower_rp-wd009 \ mt7629_rfb \ + mt7981_qihoo_360t7 \ mt7986_bananapi_bpi-r3-emmc \ mt7986_bananapi_bpi-r3-sdmmc \ mt7986_bananapi_bpi-r3-snand \ diff --git a/package/boot/uboot-mediatek/patches/052-mt7981-enable-pstore.patch b/package/boot/uboot-mediatek/patches/052-mt7981-enable-pstore.patch new file mode 100644 index 0000000000..9bfea8f737 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/052-mt7981-enable-pstore.patch @@ -0,0 +1,38 @@ +--- a/arch/arm/dts/mt7981.dtsi ++++ b/arch/arm/dts/mt7981.dtsi +@@ -32,6 +32,35 @@ + }; + }; + ++ psci { ++ compatible = "arm,psci-0.2"; ++ method = "smc"; ++ }; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ /* 64 KiB reserved for ramoops/pstore */ ++ ramoops@42ff0000 { ++ compatible = "ramoops"; ++ reg = <0 0x42ff0000 0 0x10000>; ++ record-size = <0x1000>; ++ }; ++ ++ /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ ++ secmon_reserved: secmon@43000000 { ++ reg = <0 0x43000000 0 0x30000>; ++ no-map; ++ }; ++ ++ wmcpu_emi: wmcpu-reserved@4fc00000 { ++ no-map; ++ reg = <0 0x4fc00000 0 0x00100000>; ++ }; ++ }; ++ + gpt_clk: gpt_dummy20m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; diff --git a/package/boot/uboot-mediatek/patches/304-mt7981-generic-reset-button-ignore-env.patch b/package/boot/uboot-mediatek/patches/304-mt7981-generic-reset-button-ignore-env.patch new file mode 100644 index 0000000000..fc44334982 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/304-mt7981-generic-reset-button-ignore-env.patch @@ -0,0 +1,43 @@ +--- a/board/mediatek/mt7981/mt7981_rfb.c ++++ b/board/mediatek/mt7981/mt7981_rfb.c +@@ -6,9 +6,16 @@ + + #include + #include ++#include ++#include + #include + #include + #include ++#include ++ ++#ifndef CONFIG_RESET_BUTTON_LABEL ++#define CONFIG_RESET_BUTTON_LABEL "reset" ++#endif + + #include + #include +@@ -24,7 +31,22 @@ int board_init(void) + + int board_late_init(void) + { +- gd->env_valid = 1; //to load environment variable from persistent store ++ struct udevice *dev; ++ ++ gd->env_valid = ENV_VALID; ++ if (!button_get_by_label(CONFIG_RESET_BUTTON_LABEL, &dev)) { ++ puts("reset button found\n"); ++#ifdef CONFIG_RESET_BUTTON_SETTLE_DELAY ++ if (CONFIG_RESET_BUTTON_SETTLE_DELAY > 0) { ++ button_get_state(dev); ++ mdelay(CONFIG_RESET_BUTTON_SETTLE_DELAY); ++ } ++#endif ++ if (button_get_state(dev) == BUTTON_ON) { ++ puts("button pushed, resetting environment\n"); ++ gd->env_valid = ENV_INVALID; ++ } ++ } + env_relocate(); + return 0; + } diff --git a/package/boot/uboot-mediatek/patches/433-add-qihoo_360t7.patch b/package/boot/uboot-mediatek/patches/433-add-qihoo_360t7.patch new file mode 100644 index 0000000000..2be7e18c6e --- /dev/null +++ b/package/boot/uboot-mediatek/patches/433-add-qihoo_360t7.patch @@ -0,0 +1,420 @@ +--- /dev/null ++++ b/configs/mt7981_qihoo-360t7_defconfig +@@ -0,0 +1,175 @@ ++CONFIG_ARM=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TARGET_MT7981=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEFAULT_DEVICE_TREE="mt7981_qihoo-360t7" ++CONFIG_DEFAULT_ENV_FILE="qihoo-360t7_env" ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_qihoo-360t7.dtb" ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_DEBUG_UART=y ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_SMBIOS_PRODUCT_NAME="" ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_BOOTDELAY=30 ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_CFB_CONSOLE_ANSI=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_GPIO_HOG=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_FIT=y ++CONFIG_FIT_ENABLE_SHA256_SUPPORT=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++CONFIG_LOGLEVEL=7 ++CONFIG_LOG=y ++CONFIG_SYS_PROMPT="MT7981> " ++CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_BOOTP=y ++CONFIG_CMD_BUTTON=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_CPU=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_ECHO=y ++CONFIG_CMD_ENV_READMEM=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FDT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_ITEST=y ++CONFIG_CMD_LED=y ++CONFIG_CMD_LICENSE=y ++CONFIG_CMD_LINK_LOCAL=y ++# CONFIG_CMD_MBR is not set ++CONFIG_CMD_PCI=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_TFTPBOOT=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_UBI=y ++CONFIG_CMD_UBI_RENAME=y ++CONFIG_CMD_UBIFS=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_SETEXPR=y ++CONFIG_CMD_SLEEP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_SOURCE=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_UUID=y ++CONFIG_DISPLAY_CPUINFO=y ++CONFIG_DM_MTD=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_MTK=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_VERSION_VARIABLE=y ++CONFIG_PARTITION_UUIDS=y ++CONFIG_NETCONSOLE=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_SCSI=y ++CONFIG_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_SCSI_AHCI=y ++CONFIG_SCSI=y ++CONFIG_CMD_SCSI=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_PHY_FIXED=y ++CONFIG_MTK_AHCI=y ++CONFIG_DM_ETH=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PCI=y ++# CONFIG_MMC is not set ++# CONFIG_DM_MMC is not set ++CONFIG_MTD=y ++CONFIG_MTD_UBI_FASTMAP=y ++CONFIG_DM_PCI=y ++CONFIG_PCIE_MEDIATEK=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7622=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_RAM=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MTK_SPI_NAND=y ++CONFIG_MTK_SPI_NAND_MTD=y ++CONFIG_SYSRESET_WATCHDOG=y ++CONFIG_WDT_MTK=y ++CONFIG_LZO=y ++CONFIG_ZSTD=y ++CONFIG_HEXDUMP=y ++CONFIG_RANDOM_UUID=y ++CONFIG_REGEX=y ++CONFIG_OF_EMBED=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_UBI=y ++CONFIG_ENV_UBI_PART="ubi" ++CONFIG_ENV_SIZE=0x1f000 ++CONFIG_ENV_SIZE_REDUND=0x1f000 ++CONFIG_ENV_UBI_VOLUME="ubootenv" ++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK=y ++CONFIG_PHY_FIXED=y ++CONFIG_DM_ETH=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7981=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_HEXDUMP=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_MTD_SPI_NAND=y ++CONFIG_MTK_SPIM=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_NAND=y ++CONFIG_CMD_NAND_TRIMFFS=y ++CONFIG_LMB_MAX_REGIONS=64 ++CONFIG_USE_IPADDR=y ++CONFIG_IPADDR="192.168.1.1" ++CONFIG_USE_SERVERIP=y ++CONFIG_SERVERIP="192.168.1.254" +--- /dev/null ++++ b/arch/arm/dts/mt7981_qihoo-360t7.dts +@@ -0,0 +1,180 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2022 MediaTek Inc. ++ * Author: Sam Shih ++ */ ++ ++/dts-v1/; ++#include "mt7981.dtsi" ++#include ++#include ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ model = "Qihoo 360T7"; ++ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb"; ++ ++ chosen { ++ stdout-path = &uart0; ++ tick-timer = &timer0; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ ++ factory { ++ label = "reset"; ++ linux,code = ; ++ gpios = <&gpio 1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wps { ++ label = "wps"; ++ linux,code = ; ++ gpios = <&gpio 0 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ status_red { ++ label = "red:status"; ++ gpios = <&gpio 3 GPIO_ACTIVE_LOW>; ++ }; ++ ++ status_green { ++ label = "green:status"; ++ gpios = <&gpio 7 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&uart0 { ++ mediatek,force-highspeed; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "disabled"; ++}; ++ ++ð { ++ status = "okay"; ++ mediatek,gmac-id = <0>; ++ phy-mode = "sgmii"; ++ mediatek,switch = "mt7531"; ++ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++}; ++ ++&pinctrl { ++ spi_flash_pins: spi0-pins-func-1 { ++ mux { ++ function = "flash"; ++ groups = "spi0", "spi0_wp_hold"; ++ }; ++ ++ conf-pu { ++ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ ++ conf-pd { ++ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; ++ drive-strength = ; ++ bias-pull-down = ; ++ }; ++ }; ++ ++ spic_pins: spi1-pins-func-1 { ++ mux { ++ function = "spi"; ++ groups = "spi1_1"; ++ }; ++ }; ++ ++ uart1_pins: spi1-pins-func-3 { ++ mux { ++ function = "uart"; ++ groups = "uart1_2"; ++ }; ++ }; ++ ++ pwm_pins: pwm0-pins-func-1 { ++ mux { ++ function = "pwm"; ++ groups = "pwm0_1", "pwm1_0"; ++ }; ++ }; ++}; ++ ++&pwm { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm_pins>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi_flash_pins>; ++ status = "okay"; ++ must_tx; ++ enhance_timing; ++ dma_ext; ++ ipm_design; ++ support_quad; ++ tick_dly = <2>; ++ sample_sel = <0>; ++ ++ spi_nand@0 { ++ compatible = "spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <52000000>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "bl2"; ++ reg = <0x0 0x100000>; ++ }; ++ ++ partition@100000 { ++ label = "orig-env"; ++ reg = <0x100000 0x80000>; ++ }; ++ ++ partition@160000 { ++ label = "factory"; ++ reg = <0x180000 0x200000>; ++ }; ++ ++ partition@380000 { ++ label = "fip"; ++ reg = <0x380000 0x200000>; ++ }; ++ ++ partition@580000 { ++ label = "ubi"; ++ reg = <0x580000 0x6c00000>; ++ }; ++ }; ++ }; ++}; ++ ++&watchdog { ++ status = "disabled"; ++}; +--- /dev/null ++++ b/qihoo-360t7_env +@@ -0,0 +1,56 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0 ++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi ++bootconf=config-1 ++bootdelay=0 ++bootfile=openwrt-mediatek-filogic-qihoo_360t7-initramfs-recovery.itb ++bootfile_bl2=openwrt-mediatek-filogic-qihoo_360t7-preloader.bin ++bootfile_fip=openwrt-mediatek-filogic-qihoo_360t7-bl31-uboot.fip ++bootfile_upg=openwrt-mediatek-filogic-qihoo_360t7-squashfs-sysupgrade.itb ++bootled_pwr=green:status ++bootled_rec=red:status ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= ( ( ( OpenWrt ) ) ) ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_8=Reboot.=reset ++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu ++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever ++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off ++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off ++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever ++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2 ++part_default=production ++part_recovery=recovery ++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800 ++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr ++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr ++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format ++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset ++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi ++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs ++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery ++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data ++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize ++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize ++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv ++_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" diff --git a/target/linux/bcm27xx/patches-5.15/950-0144-bcmgenet-Better-coalescing-parameter-defaults.patch b/target/linux/bcm27xx/patches-5.15/950-0144-bcmgenet-Better-coalescing-parameter-defaults.patch index 243605680b..69e99c5f99 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0144-bcmgenet-Better-coalescing-parameter-defaults.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0144-bcmgenet-Better-coalescing-parameter-defaults.patch @@ -27,7 +27,7 @@ Signed-off-by: Phil Elwell /* Disable rate control for now */ bcmgenet_tdma_ring_writel(priv, index, flow_period_val, TDMA_FLOW_PERIOD); -@@ -4083,9 +4083,12 @@ static int bcmgenet_probe(struct platfor +@@ -4084,9 +4084,12 @@ static int bcmgenet_probe(struct platfor netif_set_real_num_rx_queues(priv->dev, priv->hw_params->rx_queues + 1); /* Set default coalescing parameters */ diff --git a/target/linux/bcm27xx/patches-5.15/950-0292-net-bcmgenet-Reset-RBUF-on-first-open.patch b/target/linux/bcm27xx/patches-5.15/950-0292-net-bcmgenet-Reset-RBUF-on-first-open.patch index cd50ba1802..254376ee05 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0292-net-bcmgenet-Reset-RBUF-on-first-open.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0292-net-bcmgenet-Reset-RBUF-on-first-open.patch @@ -59,7 +59,7 @@ Signed-off-by: Phil Elwell /* Reinitialize TDMA and RDMA and SW housekeeping */ ret = bcmgenet_init_dma(priv); -@@ -4212,7 +4220,7 @@ static int bcmgenet_resume(struct device +@@ -4213,7 +4221,7 @@ static int bcmgenet_resume(struct device bcmgenet_hfb_create_rxnfc_filter(priv, rule); /* Disable RX/TX DMA and flush TX queues */ diff --git a/target/linux/bcm27xx/patches-5.15/950-0468-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch b/target/linux/bcm27xx/patches-5.15/950-0468-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch index f9e24ab3ea..974094cebf 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0468-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0468-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch @@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -677,9 +677,9 @@ deq_found: +@@ -697,9 +697,9 @@ deq_found: } if ((ep->ep_state & SET_DEQ_PENDING)) { diff --git a/target/linux/bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch b/target/linux/bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch index 3ef184fd78..cf9e3f512e 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -296,6 +296,7 @@ static void xhci_pci_quirks(struct devic +@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct devic if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; @@ -32,7 +32,7 @@ Signed-off-by: Jonathan Bell if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -667,6 +667,15 @@ static int xhci_move_dequeue_past_td(str +@@ -687,6 +687,15 @@ static int xhci_move_dequeue_past_td(str } while (!cycle_found || !td_last_trb_found); deq_found: diff --git a/target/linux/bcm27xx/patches-5.15/950-0601-xhci-correct-room_on_ring-for-cases-where-there-is-a.patch b/target/linux/bcm27xx/patches-5.15/950-0601-xhci-correct-room_on_ring-for-cases-where-there-is-a.patch index 26e4f7ae78..49db546b3d 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0601-xhci-correct-room_on_ring-for-cases-where-there-is-a.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0601-xhci-correct-room_on_ring-for-cases-where-there-is-a.patch @@ -14,7 +14,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -289,6 +289,12 @@ static inline int room_on_ring(struct xh +@@ -309,6 +309,12 @@ static inline int room_on_ring(struct xh return 0; if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) { diff --git a/target/linux/bcm27xx/patches-5.15/950-0605-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch b/target/linux/bcm27xx/patches-5.15/950-0605-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch index a26619d1cc..4cb33c7529 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0605-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0605-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch @@ -205,7 +205,7 @@ Signed-off-by: Jonathan Bell xhci_err(xhci, "Tried to move enqueue past ring segment\n"); return; } -@@ -3162,7 +3165,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd +@@ -3189,7 +3192,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd * that clears the EHB. */ while (xhci_handle_event(xhci) > 0) { @@ -214,7 +214,7 @@ Signed-off-by: Jonathan Bell continue; xhci_update_erst_dequeue(xhci, event_ring_deq); event_ring_deq = xhci->event_ring->dequeue; -@@ -3304,7 +3307,8 @@ static int prepare_ring(struct xhci_hcd +@@ -3331,7 +3334,8 @@ static int prepare_ring(struct xhci_hcd } } diff --git a/target/linux/bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch b/target/linux/bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch index b27f505e32..2b0030bd91 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch @@ -53,7 +53,7 @@ Signed-off-by: Jonathan Bell cycle_state, type, max_packet, flags); --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct devic +@@ -298,6 +298,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; diff --git a/target/linux/bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch b/target/linux/bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch index ef95a78b3e..5771cfb3d4 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch @@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -298,6 +298,7 @@ static void xhci_pci_quirks(struct devic +@@ -299,6 +299,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; @@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3617,14 +3617,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3644,14 +3644,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd * unsigned int num_trbs; unsigned int start_cycle, num_sgs = 0; unsigned int enqd_len, block_len, trb_buff_len, full_len; @@ -54,7 +54,7 @@ Signed-off-by: Jonathan Bell full_len = urb->transfer_buffer_length; /* If we have scatter/gather list, we use it. */ if (urb->num_sgs && !(urb->transfer_flags & URB_DMA_MAP_SINGLE)) { -@@ -3661,6 +3662,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3688,6 +3689,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd * start_cycle = ring->cycle_state; send_addr = addr; @@ -72,7 +72,7 @@ Signed-off-by: Jonathan Bell /* Queue the TRBs, even if they are zero-length */ for (enqd_len = 0; first_trb || enqd_len < full_len; enqd_len += trb_buff_len) { -@@ -3673,6 +3685,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3700,6 +3712,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd * if (enqd_len + trb_buff_len > full_len) trb_buff_len = full_len - enqd_len; diff --git a/target/linux/bcm27xx/patches-5.15/950-0747-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch b/target/linux/bcm27xx/patches-5.15/950-0747-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch index 49638b3a05..526fa29bcc 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0747-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0747-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch @@ -13,7 +13,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3617,7 +3617,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3644,7 +3644,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * unsigned int num_trbs; unsigned int start_cycle, num_sgs = 0; unsigned int enqd_len, block_len, trb_buff_len, full_len; @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell u32 field, length_field, remainder, maxpacket; u64 addr, send_addr; -@@ -3663,14 +3663,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3690,14 +3690,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd * send_addr = addr; if (xhci->quirks & XHCI_VLI_SS_BULK_OUT_BUG && @@ -40,7 +40,7 @@ Signed-off-by: Jonathan Bell } /* Queue the TRBs, even if they are zero-length */ -@@ -3685,7 +3680,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3712,7 +3707,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * if (enqd_len + trb_buff_len > full_len) trb_buff_len = full_len - enqd_len; diff --git a/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch b/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch index dbdb141c6d..2593f7c0fc 100644 --- a/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch +++ b/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch @@ -116,7 +116,7 @@ Signed-off-by: Felix Fietkau help --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -3590,6 +3590,11 @@ static int xmit_one(struct sk_buff *skb, +@@ -3592,6 +3592,11 @@ static int xmit_one(struct sk_buff *skb, if (dev_nit_active(dev)) dev_queue_xmit_nit(skb, dev); diff --git a/target/linux/generic/pending-5.15/630-packet_socket_type.patch b/target/linux/generic/pending-5.15/630-packet_socket_type.patch index 2d2c7b6cc5..b95ceebac7 100644 --- a/target/linux/generic/pending-5.15/630-packet_socket_type.patch +++ b/target/linux/generic/pending-5.15/630-packet_socket_type.patch @@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau goto out; if (!net_eq(dev_net(dev), sock_net(sk))) -@@ -2093,12 +2095,12 @@ static int packet_rcv(struct sk_buff *sk +@@ -2091,12 +2093,12 @@ static int packet_rcv(struct sk_buff *sk unsigned int snaplen, res; bool is_drop_n_account = false; @@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau if (!net_eq(dev_net(dev), sock_net(sk))) goto drop; -@@ -2224,12 +2226,12 @@ static int tpacket_rcv(struct sk_buff *s +@@ -2222,12 +2224,12 @@ static int tpacket_rcv(struct sk_buff *s BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32); BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48); @@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau if (!net_eq(dev_net(dev), sock_net(sk))) goto drop; -@@ -3342,6 +3344,7 @@ static int packet_create(struct net *net +@@ -3340,6 +3342,7 @@ static int packet_create(struct net *net mutex_init(&po->pg_vec_lock); po->rollover = NULL; po->prot_hook.func = packet_rcv; @@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau if (sock->type == SOCK_PACKET) po->prot_hook.func = packet_rcv_spkt; -@@ -3979,6 +3982,16 @@ packet_setsockopt(struct socket *sock, i +@@ -3977,6 +3980,16 @@ packet_setsockopt(struct socket *sock, i WRITE_ONCE(po->xmit, val ? packet_direct_xmit : dev_queue_xmit); return 0; } @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau default: return -ENOPROTOOPT; } -@@ -4035,6 +4048,13 @@ static int packet_getsockopt(struct sock +@@ -4033,6 +4046,13 @@ static int packet_getsockopt(struct sock case PACKET_VNET_HDR: val = po->has_vnet_hdr; break; diff --git a/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch index 091e65f31e..e56fd32512 100644 --- a/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ b/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch @@ -32,7 +32,7 @@ Signed-off-by: Felix Fietkau __u8 inner_protocol_type:1; --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -6065,6 +6065,9 @@ static enum gro_result dev_gro_receive(s +@@ -6067,6 +6067,9 @@ static enum gro_result dev_gro_receive(s int same_flow; int grow; @@ -42,7 +42,7 @@ Signed-off-by: Felix Fietkau if (netif_elide_gro(skb->dev)) goto normal; -@@ -8079,6 +8082,48 @@ static void __netdev_adjacent_dev_unlink +@@ -8081,6 +8084,48 @@ static void __netdev_adjacent_dev_unlink &upper_dev->adj_list.lower); } @@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau static int __netdev_upper_dev_link(struct net_device *dev, struct net_device *upper_dev, bool master, void *upper_priv, void *upper_info, -@@ -8130,6 +8175,7 @@ static int __netdev_upper_dev_link(struc +@@ -8132,6 +8177,7 @@ static int __netdev_upper_dev_link(struc if (ret) return ret; @@ -99,7 +99,7 @@ Signed-off-by: Felix Fietkau ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, &changeupper_info.info); ret = notifier_to_errno(ret); -@@ -8226,6 +8272,7 @@ static void __netdev_upper_dev_unlink(st +@@ -8228,6 +8274,7 @@ static void __netdev_upper_dev_unlink(st __netdev_adjacent_dev_unlink_neighbour(dev, upper_dev); @@ -107,7 +107,7 @@ Signed-off-by: Felix Fietkau call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, &changeupper_info.info); -@@ -9045,6 +9092,7 @@ int dev_set_mac_address(struct net_devic +@@ -9047,6 +9094,7 @@ int dev_set_mac_address(struct net_devic if (err) return err; dev->addr_assign_type = NET_ADDR_SET; diff --git a/target/linux/generic/pending-5.15/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch b/target/linux/generic/pending-5.15/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch index 68170b6614..0185bed089 100644 --- a/target/linux/generic/pending-5.15/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch +++ b/target/linux/generic/pending-5.15/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch @@ -1,23 +1,40 @@ -From 20ac14fedba025b6b336a821ea60660afe2d46cd Mon Sep 17 00:00:00 2001 +From 3d833ad2cfc1ab503d9aae2967b7f10811bb3c9c Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Wed, 1 Mar 2023 11:56:04 +0000 -Subject: [PATCH 7/7] net: ethernet: mtk_eth_soc: add paths and SerDes modes +Subject: [PATCH 7/7] net: ethernet: mtk_eth_soc: add paths and SerDes modes for MT7988 -MT7988 comes with a built-in 2.5G PHY as well as USXGMII or 10Base-KR -compatible SerDes lanes for external PHYs. +MT7988 comes with a built-in 2.5G PHY as well as +USXGMII/10GBase-KR/5GBase-KR compatible SerDes lanes for external PHYs. Add support for configuring the MAC and SerDes parts for the new paths. Signed-off-by: Daniel Golle --- - drivers/net/ethernet/mediatek/Makefile | 2 +- - drivers/net/ethernet/mediatek/mtk_eth_path.c | 154 ++++- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 291 +++++++- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 162 ++++- - drivers/net/ethernet/mediatek/mtk_usxgmii.c | 659 +++++++++++++++++++ - 5 files changed, 1236 insertions(+), 32 deletions(-) + drivers/net/ethernet/mediatek/Kconfig | 7 + + drivers/net/ethernet/mediatek/Makefile | 1 + + drivers/net/ethernet/mediatek/mtk_eth_path.c | 154 +++- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 270 +++++- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 194 ++++- + drivers/net/ethernet/mediatek/mtk_usxgmii.c | 835 +++++++++++++++++++ + 6 files changed, 1428 insertions(+), 33 deletions(-) create mode 100644 drivers/net/ethernet/mediatek/mtk_usxgmii.c +--- a/drivers/net/ethernet/mediatek/Kconfig ++++ b/drivers/net/ethernet/mediatek/Kconfig +@@ -24,6 +24,13 @@ config NET_MEDIATEK_SOC + This driver supports the gigabit ethernet MACs in the + MediaTek SoC family. + ++config NET_MEDIATEK_SOC_USXGMII ++ bool "Support USXGMII SerDes on MT7988" ++ depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST ++ def_bool NET_MEDIATEK_SOC != n ++ help ++ Include support for 10G SerDes which can be found on MT7988. ++ + config NET_MEDIATEK_STAR_EMAC + tristate "MediaTek STAR Ethernet MAC support" + select PHYLIB --- a/drivers/net/ethernet/mediatek/Makefile +++ b/drivers/net/ethernet/mediatek/Makefile @@ -5,6 +5,7 @@ @@ -291,7 +308,20 @@ Signed-off-by: Daniel Golle static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, phy_interface_t interface) { -@@ -462,7 +479,7 @@ static void mtk_mac_config(struct phylin +@@ -451,6 +468,12 @@ static struct phylink_pcs *mtk_mac_selec + 0 : mac->id; + + return eth->sgmii_pcs[sid]; ++ } else if ((interface == PHY_INTERFACE_MODE_USXGMII || ++ interface == PHY_INTERFACE_MODE_10GKR || ++ interface == PHY_INTERFACE_MODE_5GBASER) && ++ MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && ++ mac->id != MTK_GMAC1_ID) { ++ return mtk_usxgmii_select_pcs(eth, mac->id); + } + + return NULL; +@@ -462,7 +485,7 @@ static void mtk_mac_config(struct phylin struct mtk_mac *mac = container_of(config, struct mtk_mac, phylink_config); struct mtk_eth *eth = mac->hw; @@ -300,7 +330,7 @@ Signed-off-by: Daniel Golle u32 i; /* MT76x8 has no hardware settings between for the MAC */ -@@ -506,6 +523,23 @@ static void mtk_mac_config(struct phylin +@@ -506,6 +529,23 @@ static void mtk_mac_config(struct phylin goto init_err; } break; @@ -324,7 +354,7 @@ Signed-off-by: Daniel Golle default: goto err_phy; } -@@ -584,14 +618,92 @@ static void mtk_mac_config(struct phylin +@@ -584,14 +624,78 @@ static void mtk_mac_config(struct phylin SYSCFG0_SGMII_MASK, ~(u32)SYSCFG0_SGMII_MASK); @@ -338,26 +368,14 @@ Signed-off-by: Daniel Golle + } /* Save the syscfg0 value for mac_finish */ mac->syscfg0 = val; -+ } else if (state->interface == PHY_INTERFACE_MODE_USXGMII || -+ state->interface == PHY_INTERFACE_MODE_10GKR || -+ state->interface == PHY_INTERFACE_MODE_5GBASER) { -+ -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ err = -EINVAL; -+ goto init_err; -+ } -+ if (phylink_autoneg_inband(mode)) -+ err = mtk_usxgmii_setup_mode_force(eth, mac->id, -+ state); -+ else -+ err = mtk_usxgmii_setup_mode_an(eth, mac->id, -+ SPEED_10000); -+ -+ if (err) -+ goto init_err; - } else if (phylink_autoneg_inband(mode)) { +- } else if (phylink_autoneg_inband(mode)) { ++ } else if (state->interface != PHY_INTERFACE_MODE_USXGMII && ++ state->interface != PHY_INTERFACE_MODE_10GKR && ++ state->interface != PHY_INTERFACE_MODE_5GBASER && ++ phylink_autoneg_inband(mode)) { dev_err(eth->dev, - "In-band mode not supported in non SGMII mode!\n"); +- "In-band mode not supported in non SGMII mode!\n"); ++ "In-band mode not supported in non-SerDes modes!\n"); return; } @@ -417,7 +435,7 @@ Signed-off-by: Daniel Golle return; err_phy: -@@ -632,11 +744,37 @@ static int mtk_mac_finish(struct phylink +@@ -632,11 +736,40 @@ static int mtk_mac_finish(struct phylink return 0; } @@ -430,7 +448,12 @@ Signed-off-by: Daniel Golle + if (mac->id == MTK_GMAC2_ID) + sts = sts >> 16; + -+ state->duplex = 1; ++ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, sts); ++ if (!state->link) ++ return; ++ ++ state->duplex = DUPLEX_FULL; ++ state->interface = mac->interface; + + switch (FIELD_GET(MTK_USXGMII_PCS_MODE, sts)) { + case 0: @@ -446,8 +469,6 @@ Signed-off-by: Daniel Golle + state->speed = SPEED_1000; + break; + } -+ -+ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, sts); +} + +static void mtk_gdm_pcs_get_state(struct mtk_mac *mac, @@ -458,7 +479,7 @@ Signed-off-by: Daniel Golle u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id)); state->link = (pmsr & MAC_MSR_LINK); -@@ -664,15 +802,35 @@ static void mtk_mac_pcs_get_state(struct +@@ -664,15 +797,35 @@ static void mtk_mac_pcs_get_state(struct state->pause |= MLO_PAUSE_TX; } @@ -497,7 +518,7 @@ Signed-off-by: Daniel Golle } static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx, -@@ -744,13 +902,11 @@ static void mtk_set_queue_speed(struct m +@@ -744,13 +897,11 @@ static void mtk_set_queue_speed(struct m mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); } @@ -515,7 +536,7 @@ Signed-off-by: Daniel Golle u32 mcr; mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -@@ -784,6 +940,47 @@ static void mtk_mac_link_up(struct phyli +@@ -784,6 +935,47 @@ static void mtk_mac_link_up(struct phyli mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); } @@ -563,7 +584,7 @@ Signed-off-by: Daniel Golle static const struct phylink_mac_ops mtk_phylink_ops = { .validate = phylink_generic_validate, .mac_select_pcs = mtk_mac_select_pcs, -@@ -836,10 +1033,21 @@ static int mtk_mdio_init(struct mtk_eth +@@ -836,10 +1028,21 @@ static int mtk_mdio_init(struct mtk_eth } divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63); @@ -586,7 +607,7 @@ Signed-off-by: Daniel Golle mtk_w32(eth, val, MTK_PPSC); dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider); -@@ -4433,8 +4641,8 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4433,8 +4636,8 @@ static int mtk_add_mac(struct mtk_eth *e const __be32 *_id = of_get_property(np, "reg", NULL); phy_interface_t phy_mode; struct phylink *phylink; @@ -596,7 +617,7 @@ Signed-off-by: Daniel Golle int txqs = 1; if (!_id) { -@@ -4525,6 +4733,32 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4525,6 +4728,32 @@ static int mtk_add_mac(struct mtk_eth *e mac->phylink_config.supported_interfaces); } @@ -629,40 +650,20 @@ Signed-off-by: Daniel Golle phylink = phylink_create(&mac->phylink_config, of_fwnode_handle(mac->of_node), phy_mode, &mtk_phylink_ops); -@@ -4714,6 +4948,33 @@ static int mtk_probe(struct platform_dev - return err; - } +@@ -4712,6 +4941,13 @@ static int mtk_probe(struct platform_dev -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { -+ eth->xgmii = devm_kzalloc(eth->dev, sizeof(*eth->xgmii), GFP_KERNEL); -+ err = mtk_usxgmii_init(eth); -+ if (err) { -+ dev_err(&pdev->dev, "usxgmii init failed\n"); -+ return err; -+ } -+ -+ err = mtk_xfi_pextp_init(eth); -+ if (err) { -+ dev_err(&pdev->dev, "pextp init failed\n"); -+ return err; -+ } -+ -+ err = mtk_xfi_pll_init(eth); -+ if (err) { -+ dev_err(&pdev->dev, "xfi pll init failed\n"); -+ return err; -+ } -+ -+ err = mtk_toprgu_init(eth); -+ if (err) { -+ dev_err(&pdev->dev, "toprgu init failed\n"); -+ return err; -+ } + if (err) + return err; + } + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { ++ err = mtk_usxgmii_init(eth); ++ ++ if (err) ++ return err; + } + if (eth->soc->required_pctl) { - eth->pctl = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, - "mediatek,pctl"); --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -126,6 +126,11 @@ @@ -743,34 +744,54 @@ Signed-off-by: Daniel Golle /* ethernet subsystem clock register */ -@@ -506,16 +548,69 @@ +@@ -506,16 +548,91 @@ #define ETHSYS_DMA_AG_MAP_QDMA BIT(1) #define ETHSYS_DMA_AG_MAP_PPE BIT(2) +/* USXGMII subsystem config registers */ +/* Register to control speed */ +#define RG_PHY_TOP_SPEED_CTRL1 0x80C -+#define RG_USXGMII_RATE_UPDATE_MODE BIT(31) -+#define RG_MAC_CK_GATED BIT(29) -+#define RG_IF_FORCE_EN BIT(28) -+#define RG_RATE_ADAPT_MODE GENMASK(10, 8) -+#define RG_RATE_ADAPT_MODE_X1 0 -+#define RG_RATE_ADAPT_MODE_X2 1 -+#define RG_RATE_ADAPT_MODE_X4 2 -+#define RG_RATE_ADAPT_MODE_X10 3 -+#define RG_RATE_ADAPT_MODE_X100 4 -+#define RG_RATE_ADAPT_MODE_X5 5 -+#define RG_RATE_ADAPT_MODE_X50 6 -+#define RG_XFI_RX_MODE GENMASK(6, 4) -+#define RG_XFI_RX_MODE_10G 0 -+#define RG_XFI_RX_MODE_5G 1 -+#define RG_XFI_TX_MODE GENMASK(2, 0) -+#define RG_XFI_TX_MODE_10G 0 -+#define RG_XFI_TX_MODE_5G 1 ++#define USXGMII_RATE_UPDATE_MODE BIT(31) ++#define USXGMII_MAC_CK_GATED BIT(29) ++#define USXGMII_IF_FORCE_EN BIT(28) ++#define USXGMII_RATE_ADAPT_MODE GENMASK(10, 8) ++#define USXGMII_RATE_ADAPT_MODE_X1 0 ++#define USXGMII_RATE_ADAPT_MODE_X2 1 ++#define USXGMII_RATE_ADAPT_MODE_X4 2 ++#define USXGMII_RATE_ADAPT_MODE_X10 3 ++#define USXGMII_RATE_ADAPT_MODE_X100 4 ++#define USXGMII_RATE_ADAPT_MODE_X5 5 ++#define USXGMII_RATE_ADAPT_MODE_X50 6 ++#define USXGMII_XFI_RX_MODE GENMASK(6, 4) ++#define USXGMII_XFI_RX_MODE_10G 0 ++#define USXGMII_XFI_RX_MODE_5G 1 ++#define USXGMII_XFI_TX_MODE GENMASK(2, 0) ++#define USXGMII_XFI_TX_MODE_10G 0 ++#define USXGMII_XFI_TX_MODE_5G 1 + +/* Register to control PCS AN */ +#define RG_PCS_AN_CTRL0 0x810 -+#define RG_AN_ENABLE BIT(0) ++#define USXGMII_AN_RESTART BIT(31) ++#define USXGMII_AN_SYNC_CNT GENMASK(30, 11) ++#define USXGMII_AN_ENABLE BIT(0) ++ ++#define RG_PCS_AN_CTRL2 0x818 ++#define USXGMII_LINK_TIMER_IDLE_DETECT GENMASK(29, 20) ++#define USXGMII_LINK_TIMER_COMP_ACK_DETECT GENMASK(19, 10) ++#define USXGMII_LINK_TIMER_AN_RESTART GENMASK(9, 0) ++ ++/* Register to read PCS AN status */ ++#define RG_PCS_AN_STS0 0x81c ++#define USXGMII_LPA_SPEED_MASK GENMASK(11, 9) ++#define USXGMII_LPA_SPEED_10 0 ++#define USXGMII_LPA_SPEED_100 1 ++#define USXGMII_LPA_SPEED_1000 2 ++#define USXGMII_LPA_SPEED_10000 3 ++#define USXGMII_LPA_SPEED_2500 4 ++#define USXGMII_LPA_SPEED_5000 5 ++#define USXGMII_LPA_DUPLEX BIT(12) ++#define USXGMII_LPA_LINK BIT(15) ++#define USXGMII_LPA_LATCH BIT(31) + +/* Register to control USXGMII XFI PLL digital */ +#define XFI_PLL_DIG_GLB8 0x08 @@ -791,6 +812,8 @@ Signed-off-by: Daniel Golle +#define SWSYSRST_XFI_PLL_GRST BIT(16) +#define SWSYSRST_XFI_PEXPT1_GRST BIT(15) +#define SWSYSRST_XFI_PEXPT0_GRST BIT(14) ++#define SWSYSRST_XFI1_GRST BIT(13) ++#define SWSYSRST_XFI0_GRST BIT(12) +#define SWSYSRST_SGMII1_GRST BIT(2) +#define SWSYSRST_SGMII0_GRST BIT(1) +#define TOPRGU_SWSYSRST_EN 0xFC @@ -813,7 +836,7 @@ Signed-off-by: Daniel Golle /* MT7628/88 specific stuff */ #define MT7628_PDMA_OFFSET 0x0800 #define MT7628_SDM_OFFSET 0x0c00 -@@ -809,13 +904,6 @@ enum mtk_gmac_id { +@@ -809,13 +926,6 @@ enum mtk_gmac_id { MTK_GMAC_ID_MAX }; @@ -827,7 +850,7 @@ Signed-off-by: Daniel Golle enum mtk_tx_buf_type { MTK_TYPE_SKB, MTK_TYPE_XDP_TX, -@@ -902,6 +990,7 @@ enum mkt_eth_capabilities { +@@ -902,6 +1012,7 @@ enum mkt_eth_capabilities { MTK_TRGMII_BIT, MTK_SGMII_BIT, MTK_USXGMII_BIT, @@ -835,7 +858,7 @@ Signed-off-by: Daniel Golle MTK_ESW_BIT, MTK_GEPHY_BIT, MTK_MUX_BIT, -@@ -922,6 +1011,7 @@ enum mkt_eth_capabilities { +@@ -922,6 +1033,7 @@ enum mkt_eth_capabilities { MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT, MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, @@ -843,7 +866,7 @@ Signed-off-by: Daniel Golle MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT, MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT, MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT, -@@ -933,6 +1023,7 @@ enum mkt_eth_capabilities { +@@ -933,6 +1045,7 @@ enum mkt_eth_capabilities { MTK_ETH_PATH_GMAC1_SGMII_BIT, MTK_ETH_PATH_GMAC2_RGMII_BIT, MTK_ETH_PATH_GMAC2_SGMII_BIT, @@ -851,7 +874,7 @@ Signed-off-by: Daniel Golle MTK_ETH_PATH_GMAC2_GEPHY_BIT, MTK_ETH_PATH_GMAC3_SGMII_BIT, MTK_ETH_PATH_GDM1_ESW_BIT, -@@ -946,6 +1037,7 @@ enum mkt_eth_capabilities { +@@ -946,6 +1059,7 @@ enum mkt_eth_capabilities { #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT) #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT) #define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT) @@ -859,7 +882,7 @@ Signed-off-by: Daniel Golle #define MTK_ESW BIT_ULL(MTK_ESW_BIT) #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) #define MTK_MUX BIT_ULL(MTK_MUX_BIT) -@@ -968,6 +1060,8 @@ enum mkt_eth_capabilities { +@@ -968,6 +1082,8 @@ enum mkt_eth_capabilities { BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT) #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \ BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT) @@ -868,7 +891,7 @@ Signed-off-by: Daniel Golle #define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \ BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT) #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \ -@@ -983,6 +1077,7 @@ enum mkt_eth_capabilities { +@@ -983,6 +1099,7 @@ enum mkt_eth_capabilities { #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT) #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) @@ -876,7 +899,7 @@ Signed-off-by: Daniel Golle #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT) #define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT) #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT) -@@ -996,6 +1091,7 @@ enum mkt_eth_capabilities { +@@ -996,6 +1113,7 @@ enum mkt_eth_capabilities { #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) @@ -884,7 +907,7 @@ Signed-off-by: Daniel Golle #define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII) #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW) #define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII) -@@ -1019,6 +1115,10 @@ enum mkt_eth_capabilities { +@@ -1019,6 +1137,10 @@ enum mkt_eth_capabilities { (MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \ MTK_SHARED_SGMII) @@ -895,7 +918,7 @@ Signed-off-by: Daniel Golle /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */ #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) -@@ -1077,7 +1177,8 @@ enum mkt_eth_capabilities { +@@ -1077,7 +1199,8 @@ enum mkt_eth_capabilities { MTK_MUX_GMAC123_TO_GEPHY_SGMII | \ MTK_NETSYS_V3 | MTK_RSTCTRL_PPE1 | \ MTK_GMAC1_USXGMII | MTK_GMAC2_USXGMII | \ @@ -905,37 +928,54 @@ Signed-off-by: Daniel Golle struct mtk_tx_dma_desc_info { dma_addr_t addr; -@@ -1183,6 +1284,19 @@ struct mtk_soc_data { +@@ -1183,6 +1306,22 @@ struct mtk_soc_data { #define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) -+/* struct mtk_xgmii - This is the structure holding sgmii/usxgmii regmap and -+ * its characteristics -+ * @regmap: The register map pointing at the range used to setup -+ * SGMII/USXGMII modes -+ * @flags: The enum refers to which mode the sgmii wants to run on -+ * @ana_rgc3: The offset refers to register ANA_RGC3 related to regmap ++/* struct mtk_usxgmii_pcs - This structure holds each usxgmii regmap and ++ * associated data ++ * @regmap: The register map pointing at the range used to setup ++ * USXGMII modes ++ * @interface: Currently selected interface mode ++ * @id: The element is used to record the index of PCS ++ * @pcs: Phylink PCS structure + */ -+struct mtk_xgmii { -+ struct regmap **regmap_usxgmii; -+ struct regmap **regmap_pextp; -+ struct regmap *regmap_pll; ++struct mtk_usxgmii_pcs { ++ struct mtk_eth *eth; ++ struct regmap *regmap; ++ phy_interface_t interface; ++ u8 id; ++ struct phylink_pcs pcs; +}; + /* struct mtk_eth - This is the main datasructure for holding the state * of the driver * @dev: The device pointer -@@ -1244,7 +1358,9 @@ struct mtk_eth { +@@ -1203,6 +1342,11 @@ struct mtk_soc_data { + * @infra: The register map pointing at the range used to setup + * SGMII and GePHY path + * @sgmii_pcs: Pointers to mtk-pcs-lynxi phylink_pcs instances ++ * @usxgmii_pll: The register map pointing at the range used to control ++ * the USXGMII SerDes PLL ++ * @regmap_pextp: The register map pointing at the range used to setup ++ * PHYA ++ * @usxgmii_pcs: Pointer to array of pointers to struct for USXGMII PCS + * @pctl: The register map pointing at the range used to setup + * GMAC port drive/slew values + * @dma_refcnt: track how many netdevs are using the DMA engine +@@ -1244,7 +1388,11 @@ struct mtk_eth { unsigned long sysclk; struct regmap *ethsys; struct regmap *infra; + struct regmap *toprgu; struct phylink_pcs **sgmii_pcs; -+ struct mtk_xgmii *xgmii; ++ struct regmap *usxgmii_pll; ++ struct regmap **regmap_pextp; ++ struct mtk_usxgmii_pcs **usxgmii_pcs; struct regmap *pctl; bool hwlro; refcount_t dma_refcnt; -@@ -1400,6 +1516,19 @@ static inline u32 mtk_get_ib2_multicast_ +@@ -1400,6 +1548,19 @@ static inline u32 mtk_get_ib2_multicast_ return MTK_FOE_IB2_MULTICAST; } @@ -955,7 +995,7 @@ Signed-off-by: Daniel Golle /* read the hardware status register */ void mtk_stats_update_mac(struct mtk_mac *mac); -@@ -1407,8 +1536,10 @@ void mtk_w32(struct mtk_eth *eth, u32 va +@@ -1407,8 +1568,10 @@ void mtk_w32(struct mtk_eth *eth, u32 va u32 mtk_r32(struct mtk_eth *eth, unsigned reg); int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); @@ -966,50 +1006,35 @@ Signed-off-by: Daniel Golle int mtk_eth_offload_init(struct mtk_eth *eth); int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, -@@ -1418,5 +1549,36 @@ int mtk_flow_offload_cmd(struct mtk_eth +@@ -1418,5 +1581,20 @@ int mtk_flow_offload_cmd(struct mtk_eth void mtk_flow_offload_cleanup(struct mtk_eth *eth, struct list_head *list); void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev); +#ifdef CONFIG_NET_MEDIATEK_SOC_USXGMII ++struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id); +int mtk_usxgmii_init(struct mtk_eth *eth); -+int mtk_xfi_pextp_init(struct mtk_eth *eth); -+int mtk_xfi_pll_init(struct mtk_eth *eth); -+int mtk_toprgu_init(struct mtk_eth *eth); +int mtk_xfi_pll_enable(struct mtk_eth *eth); -+int mtk_usxgmii_setup_mode_an(struct mtk_eth *eth, int mac_id, -+ int max_speed); -+int mtk_usxgmii_setup_mode_force(struct mtk_eth *eth, int mac_id, -+ const struct phylink_link_state *state); -+void mtk_usxgmii_setup_phya_an_10000(struct mtk_eth *eth, int mac_id); -+void mtk_usxgmii_reset(struct mtk_eth *eth, int mac_id); +void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id); +void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id); +void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id); +#else -+static inline int mtk_usxgmii_init(struct mtk_eth *eth) { return 0; }; -+static inline int mtk_xfi_pextp_init(struct mtk_eth *eth) { return 0; }; -+static inline int mtk_xfi_pll_init(struct mtk_eth *eth) { return 0; }; -+static inline int mtk_toprgu_init(struct mtk_eth *eth) { return 0; }; -+static inline int mtk_xfi_pll_enable(struct mtk_eth *eth) { return 0; }; -+static inline int mtk_usxgmii_setup_mode_an(struct mtk_eth *eth, int mac_id, -+ int max_speed) { return 0; }; -+static inline int mtk_usxgmii_setup_mode_force(struct mtk_eth *eth, int mac_id, -+ const struct phylink_link_state *state) { return 0; }; -+static inline void mtk_usxgmii_setup_phya_an_10000(struct mtk_eth *eth, int mac_id) { }; -+static inline void mtk_usxgmii_reset(struct mtk_eth *eth, int mac_id) { }; -+static inline void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) { }; -+static inline void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) { }; -+static inline void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id) { }; -+#endif ++static inline struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id) { return NULL; } ++static inline int mtk_usxgmii_init(struct mtk_eth *eth) { return 0; } ++static inline int mtk_xfi_pll_enable(struct mtk_eth *eth) { return 0; } ++static inline void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) { } ++static inline void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) { } ++static inline void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id) { } ++#endif /* NET_MEDIATEK_SOC_USXGMII */ #endif /* MTK_ETH_H */ --- /dev/null +++ b/drivers/net/ethernet/mediatek/mtk_usxgmii.c -@@ -0,0 +1,646 @@ +@@ -0,0 +1,835 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (c) 2022 MediaTek Inc. + * Author: Henry Yen ++ * Daniel Golle + */ + +#include @@ -1017,43 +1042,20 @@ Signed-off-by: Daniel Golle +#include +#include "mtk_eth_soc.h" + -+int mtk_usxgmii_init(struct mtk_eth *eth) ++static struct mtk_usxgmii_pcs *pcs_to_mtk_usxgmii_pcs(struct phylink_pcs *pcs) +{ -+ struct device_node *r = eth->dev->of_node; -+ struct mtk_xgmii *xs = eth->xgmii; -+ struct device *dev = eth->dev; -+ struct device_node *np; -+ int i; -+ -+ xs->regmap_usxgmii = devm_kzalloc(dev, sizeof(*xs->regmap_usxgmii) * -+ eth->soc->num_devs, GFP_KERNEL); -+ if (!xs->regmap_usxgmii) -+ return -ENOMEM; -+ -+ for (i = 0; i < eth->soc->num_devs; i++) { -+ np = of_parse_phandle(r, "mediatek,usxgmiisys", i); -+ if (!np) -+ break; -+ -+ xs->regmap_usxgmii[i] = syscon_node_to_regmap(np); -+ if (IS_ERR(xs->regmap_usxgmii[i])) -+ return PTR_ERR(xs->regmap_usxgmii[i]); -+ } -+ -+ return 0; ++ return container_of(pcs, struct mtk_usxgmii_pcs, pcs); +} + -+int mtk_xfi_pextp_init(struct mtk_eth *eth) ++static int mtk_xfi_pextp_init(struct mtk_eth *eth) +{ + struct device *dev = eth->dev; + struct device_node *r = dev->of_node; -+ struct mtk_xgmii *xs = eth->xgmii; + struct device_node *np; + int i; + -+ xs->regmap_pextp = devm_kzalloc(dev, sizeof(*xs->regmap_pextp) * -+ eth->soc->num_devs, GFP_KERNEL); -+ if (!xs->regmap_pextp) ++ eth->regmap_pextp = devm_kcalloc(dev, eth->soc->num_devs, sizeof(eth->regmap_pextp), GFP_KERNEL); ++ if (!eth->regmap_pextp) + return -ENOMEM; + + for (i = 0; i < eth->soc->num_devs; i++) { @@ -1061,32 +1063,31 @@ Signed-off-by: Daniel Golle + if (!np) + break; + -+ xs->regmap_pextp[i] = syscon_node_to_regmap(np); -+ if (IS_ERR(xs->regmap_pextp[i])) -+ return PTR_ERR(xs->regmap_pextp[i]); ++ eth->regmap_pextp[i] = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->regmap_pextp[i])) ++ return PTR_ERR(eth->regmap_pextp[i]); + } + + return 0; +} + -+int mtk_xfi_pll_init(struct mtk_eth *eth) ++static int mtk_xfi_pll_init(struct mtk_eth *eth) +{ + struct device_node *r = eth->dev->of_node; -+ struct mtk_xgmii *xs = eth->xgmii; + struct device_node *np; + + np = of_parse_phandle(r, "mediatek,xfi_pll", 0); + if (!np) + return -1; + -+ xs->regmap_pll = syscon_node_to_regmap(np); -+ if (IS_ERR(xs->regmap_pll)) -+ return PTR_ERR(xs->regmap_pll); ++ eth->usxgmii_pll = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->usxgmii_pll)) ++ return PTR_ERR(eth->usxgmii_pll); + + return 0; +} + -+int mtk_toprgu_init(struct mtk_eth *eth) ++static int mtk_toprgu_init(struct mtk_eth *eth) +{ + struct device_node *r = eth->dev->of_node; + struct device_node *np; @@ -1104,18 +1105,17 @@ Signed-off-by: Daniel Golle + +int mtk_xfi_pll_enable(struct mtk_eth *eth) +{ -+ struct mtk_xgmii *xs = eth->xgmii; + u32 val = 0; + -+ if (!xs->regmap_pll) ++ if (!eth->usxgmii_pll) + return -EINVAL; + + /* Add software workaround for USXGMII PLL TCL issue */ -+ regmap_write(xs->regmap_pll, XFI_PLL_ANA_GLB8, RG_XFI_PLL_ANA_SWWA); ++ regmap_write(eth->usxgmii_pll, XFI_PLL_ANA_GLB8, RG_XFI_PLL_ANA_SWWA); + -+ regmap_read(xs->regmap_pll, XFI_PLL_DIG_GLB8, &val); ++ regmap_read(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, &val); + val |= RG_XFI_PLL_EN; -+ regmap_write(xs->regmap_pll, XFI_PLL_DIG_GLB8, val); ++ regmap_write(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, val); + + return 0; +} @@ -1141,531 +1141,727 @@ Signed-off-by: Daniel Golle + return xgmii_id; +} + -+void mtk_usxgmii_setup_phya_an_10000(struct mtk_eth *eth, int mac_id) ++static int mtk_xgmii2mac_id(struct mtk_eth *eth, int xgmii_id) +{ -+ struct mtk_xgmii *xs = eth->xgmii; -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); ++ int mac_id = xgmii_id; + -+ if (id >= eth->soc->num_devs || -+ !xs->regmap_usxgmii[id] || !xs->regmap_pextp[id]) ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { ++ switch (xgmii_id) { ++ case 0: ++ mac_id = 2; ++ break; ++ case 1: ++ mac_id = 1; ++ break; ++ default: ++ mac_id = -1; ++ } ++ } ++ ++ return mac_id; ++} ++ ++ ++static void mtk_usxgmii_setup_phya_usxgmii(struct mtk_usxgmii_pcs *mpcs) ++{ ++ struct regmap *pextp; ++ ++ if (!mpcs->eth) + return; + -+ regmap_write(xs->regmap_usxgmii[id], RG_PCS_AN_CTRL0, 0x000FFE6D); -+ regmap_write(xs->regmap_usxgmii[id], 0x818, 0x07B1EC7B); -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, 0x30000000); -+ ndelay(1020); -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, 0x10000000); -+ ndelay(1020); -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, 0x00000000); ++ pextp = mpcs->eth->regmap_pextp[mpcs->id]; ++ if (!pextp) ++ return; + -+ regmap_write(xs->regmap_pextp[id], 0x9024, 0x00C9071C); -+ regmap_write(xs->regmap_pextp[id], 0x2020, 0xAA8585AA); -+ regmap_write(xs->regmap_pextp[id], 0x2030, 0x0C020707); -+ regmap_write(xs->regmap_pextp[id], 0x2034, 0x0E050F0F); -+ regmap_write(xs->regmap_pextp[id], 0x2040, 0x00140032); -+ regmap_write(xs->regmap_pextp[id], 0x50F0, 0x00C014AA); -+ regmap_write(xs->regmap_pextp[id], 0x50E0, 0x3777C12B); -+ regmap_write(xs->regmap_pextp[id], 0x506C, 0x005F9CFF); -+ regmap_write(xs->regmap_pextp[id], 0x5070, 0x9D9DFAFA); -+ regmap_write(xs->regmap_pextp[id], 0x5074, 0x27273F3F); -+ regmap_write(xs->regmap_pextp[id], 0x5078, 0xA7883C68); -+ regmap_write(xs->regmap_pextp[id], 0x507C, 0x11661166); -+ regmap_write(xs->regmap_pextp[id], 0x5080, 0x0E000AAF); -+ regmap_write(xs->regmap_pextp[id], 0x5084, 0x08080D0D); -+ regmap_write(xs->regmap_pextp[id], 0x5088, 0x02030909); -+ regmap_write(xs->regmap_pextp[id], 0x50E4, 0x0C0C0000); -+ regmap_write(xs->regmap_pextp[id], 0x50E8, 0x04040000); -+ regmap_write(xs->regmap_pextp[id], 0x50EC, 0x0F0F0C06); -+ regmap_write(xs->regmap_pextp[id], 0x50A8, 0x506E8C8C); -+ regmap_write(xs->regmap_pextp[id], 0x6004, 0x18190000); -+ regmap_write(xs->regmap_pextp[id], 0x00F8, 0x01423342); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F20); -+ regmap_write(xs->regmap_pextp[id], 0x0030, 0x00050C00); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x02002800); ++ /* Setup operation mode */ ++ regmap_write(pextp, 0x9024, 0x00C9071C); ++ regmap_write(pextp, 0x2020, 0xAA8585AA); ++ regmap_write(pextp, 0x2030, 0x0C020707); ++ regmap_write(pextp, 0x2034, 0x0E050F0F); ++ regmap_write(pextp, 0x2040, 0x00140032); ++ regmap_write(pextp, 0x50F0, 0x00C014AA); ++ regmap_write(pextp, 0x50E0, 0x3777C12B); ++ regmap_write(pextp, 0x506C, 0x005F9CFF); ++ regmap_write(pextp, 0x5070, 0x9D9DFAFA); ++ regmap_write(pextp, 0x5074, 0x27273F3F); ++ regmap_write(pextp, 0x5078, 0xA7883C68); ++ regmap_write(pextp, 0x507C, 0x11661166); ++ regmap_write(pextp, 0x5080, 0x0E000AAF); ++ regmap_write(pextp, 0x5084, 0x08080D0D); ++ regmap_write(pextp, 0x5088, 0x02030909); ++ regmap_write(pextp, 0x50E4, 0x0C0C0000); ++ regmap_write(pextp, 0x50E8, 0x04040000); ++ regmap_write(pextp, 0x50EC, 0x0F0F0C06); ++ regmap_write(pextp, 0x50A8, 0x506E8C8C); ++ regmap_write(pextp, 0x6004, 0x18190000); ++ regmap_write(pextp, 0x00F8, 0x01423342); ++ /* Force SGDT_OUT off and select PCS */ ++ regmap_write(pextp, 0x00F4, 0x80201F20); ++ /* Force GLB_CKDET_OUT */ ++ regmap_write(pextp, 0x0030, 0x00050C00); ++ /* Force AEQ on */ ++ regmap_write(pextp, 0x0070, 0x02002800); + ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000020); -+ regmap_write(xs->regmap_pextp[id], 0x3028, 0x00008A01); -+ regmap_write(xs->regmap_pextp[id], 0x302C, 0x0000A884); -+ regmap_write(xs->regmap_pextp[id], 0x3024, 0x00083002); -+ regmap_write(xs->regmap_pextp[id], 0x3010, 0x00022220); -+ regmap_write(xs->regmap_pextp[id], 0x5064, 0x0F020A01); -+ regmap_write(xs->regmap_pextp[id], 0x50B4, 0x06100600); -+ regmap_write(xs->regmap_pextp[id], 0x3048, 0x40704000); -+ regmap_write(xs->regmap_pextp[id], 0x3050, 0xA8000000); -+ regmap_write(xs->regmap_pextp[id], 0x3054, 0x000000AA); -+ regmap_write(xs->regmap_pextp[id], 0x306C, 0x00000F00); -+ regmap_write(xs->regmap_pextp[id], 0xA060, 0x00040000); -+ regmap_write(xs->regmap_pextp[id], 0x90D0, 0x00000001); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200E800); ++ /* Setup DA default value */ ++ regmap_write(pextp, 0x30B0, 0x00000020); ++ regmap_write(pextp, 0x3028, 0x00008A01); ++ regmap_write(pextp, 0x302C, 0x0000A884); ++ regmap_write(pextp, 0x3024, 0x00083002); ++ regmap_write(pextp, 0x3010, 0x00022220); ++ regmap_write(pextp, 0x5064, 0x0F020A01); ++ regmap_write(pextp, 0x50B4, 0x06100600); ++ regmap_write(pextp, 0x3048, 0x40704000); ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ regmap_write(pextp, 0x306C, 0x00000F00); ++ regmap_write(pextp, 0xA060, 0x00040000); ++ regmap_write(pextp, 0x90D0, 0x00000001); ++ /* Release reset */ ++ regmap_write(pextp, 0x0070, 0x0200E800); + udelay(150); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C111); ++ /* Switch to P0 */ ++ regmap_write(pextp, 0x0070, 0x0200C111); + ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C101); ++ regmap_write(pextp, 0x0070, 0x0200C101); + udelay(15); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0202C111); ++ /* Switch to Gen3 */ ++ regmap_write(pextp, 0x0070, 0x0202C111); + ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0202C101); ++ regmap_write(pextp, 0x0070, 0x0202C101); + udelay(100); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000030); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F00); -+ regmap_write(xs->regmap_pextp[id], 0x3040, 0x30000000); ++ regmap_write(pextp, 0x30B0, 0x00000030); ++ regmap_write(pextp, 0x00F4, 0x80201F00); ++ regmap_write(pextp, 0x3040, 0x30000000); + udelay(400); +} + -+void mtk_usxgmii_setup_phya_force_5000(struct mtk_eth *eth, int mac_id) ++static void mtk_usxgmii_setup_phya_5gbaser(struct mtk_usxgmii_pcs *mpcs) +{ -+ unsigned int val; -+ struct mtk_xgmii *xs = eth->xgmii; -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); ++ struct regmap *pextp; + -+ if (id >= eth->soc->num_devs || -+ !xs->regmap_usxgmii[id] || !xs->regmap_pextp[id]) ++ if (!mpcs->eth) + return; + -+ /* Setup USXGMII speed */ -+ val = FIELD_PREP(RG_XFI_RX_MODE, RG_XFI_RX_MODE_5G) | -+ FIELD_PREP(RG_XFI_TX_MODE, RG_XFI_TX_MODE_5G); -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); -+ -+ /* Disable USXGMII AN mode */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PCS_AN_CTRL0, &val); -+ val &= ~RG_AN_ENABLE; -+ regmap_write(xs->regmap_usxgmii[id], RG_PCS_AN_CTRL0, val); -+ -+ /* Gated USXGMII */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, &val); -+ val |= RG_MAC_CK_GATED; -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); ++ pextp = mpcs->eth->regmap_pextp[mpcs->id]; ++ if (!pextp) ++ return; + ++ /* Setup operation mode */ ++ regmap_write(pextp, 0x9024, 0x00D9071C); ++ regmap_write(pextp, 0x2020, 0xAAA5A5AA); ++ regmap_write(pextp, 0x2030, 0x0C020707); ++ regmap_write(pextp, 0x2034, 0x0E050F0F); ++ regmap_write(pextp, 0x2040, 0x00140032); ++ regmap_write(pextp, 0x50F0, 0x00C018AA); ++ regmap_write(pextp, 0x50E0, 0x3777812B); ++ regmap_write(pextp, 0x506C, 0x005C9CFF); ++ regmap_write(pextp, 0x5070, 0x9DFAFAFA); ++ regmap_write(pextp, 0x5074, 0x273F3F3F); ++ regmap_write(pextp, 0x5078, 0xA8883868); ++ regmap_write(pextp, 0x507C, 0x14661466); ++ regmap_write(pextp, 0x5080, 0x0E001ABF); ++ regmap_write(pextp, 0x5084, 0x080B0D0D); ++ regmap_write(pextp, 0x5088, 0x02050909); ++ regmap_write(pextp, 0x50E4, 0x0C000000); ++ regmap_write(pextp, 0x50E8, 0x04000000); ++ regmap_write(pextp, 0x50EC, 0x0F0F0C06); ++ regmap_write(pextp, 0x50A8, 0x50808C8C); ++ regmap_write(pextp, 0x6004, 0x18000000); ++ regmap_write(pextp, 0x00F8, 0x00A132A1); ++ /* Force SGDT_OUT off and select PCS */ ++ regmap_write(pextp, 0x00F4, 0x80201F20); ++ /* Force GLB_CKDET_OUT */ ++ regmap_write(pextp, 0x0030, 0x00050C00); ++ /* Force AEQ on */ ++ regmap_write(pextp, 0x0070, 0x02002800); + ndelay(1020); -+ -+ /* USXGMII force mode setting */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, &val); -+ val |= RG_USXGMII_RATE_UPDATE_MODE; -+ val |= RG_IF_FORCE_EN; -+ val |= FIELD_PREP(RG_RATE_ADAPT_MODE, RG_RATE_ADAPT_MODE_X1); -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); -+ -+ /* Un-gated USXGMII */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, &val); -+ val &= ~RG_MAC_CK_GATED; -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); -+ -+ ndelay(1020); -+ -+ regmap_write(xs->regmap_pextp[id], 0x9024, 0x00D9071C); -+ regmap_write(xs->regmap_pextp[id], 0x2020, 0xAAA5A5AA); -+ regmap_write(xs->regmap_pextp[id], 0x2030, 0x0C020707); -+ regmap_write(xs->regmap_pextp[id], 0x2034, 0x0E050F0F); -+ regmap_write(xs->regmap_pextp[id], 0x2040, 0x00140032); -+ regmap_write(xs->regmap_pextp[id], 0x50F0, 0x00C018AA); -+ regmap_write(xs->regmap_pextp[id], 0x50E0, 0x3777812B); -+ regmap_write(xs->regmap_pextp[id], 0x506C, 0x005C9CFF); -+ regmap_write(xs->regmap_pextp[id], 0x5070, 0x9DFAFAFA); -+ regmap_write(xs->regmap_pextp[id], 0x5074, 0x273F3F3F); -+ regmap_write(xs->regmap_pextp[id], 0x5078, 0xA8883868); -+ regmap_write(xs->regmap_pextp[id], 0x507C, 0x14661466); -+ regmap_write(xs->regmap_pextp[id], 0x5080, 0x0E001ABF); -+ regmap_write(xs->regmap_pextp[id], 0x5084, 0x080B0D0D); -+ regmap_write(xs->regmap_pextp[id], 0x5088, 0x02050909); -+ regmap_write(xs->regmap_pextp[id], 0x50E4, 0x0C000000); -+ regmap_write(xs->regmap_pextp[id], 0x50E8, 0x04000000); -+ regmap_write(xs->regmap_pextp[id], 0x50EC, 0x0F0F0C06); -+ regmap_write(xs->regmap_pextp[id], 0x50A8, 0x50808C8C); -+ regmap_write(xs->regmap_pextp[id], 0x6004, 0x18000000); -+ regmap_write(xs->regmap_pextp[id], 0x00F8, 0x00A132A1); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F20); -+ regmap_write(xs->regmap_pextp[id], 0x0030, 0x00050C00); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x02002800); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000020); -+ regmap_write(xs->regmap_pextp[id], 0x3028, 0x00008A01); -+ regmap_write(xs->regmap_pextp[id], 0x302C, 0x0000A884); -+ regmap_write(xs->regmap_pextp[id], 0x3024, 0x00083002); -+ regmap_write(xs->regmap_pextp[id], 0x3010, 0x00022220); -+ regmap_write(xs->regmap_pextp[id], 0x5064, 0x0F020A01); -+ regmap_write(xs->regmap_pextp[id], 0x50B4, 0x06100600); -+ regmap_write(xs->regmap_pextp[id], 0x3048, 0x40704000); -+ regmap_write(xs->regmap_pextp[id], 0x3050, 0xA8000000); -+ regmap_write(xs->regmap_pextp[id], 0x3054, 0x000000AA); -+ regmap_write(xs->regmap_pextp[id], 0x306C, 0x00000F00); -+ regmap_write(xs->regmap_pextp[id], 0xA060, 0x00040000); -+ regmap_write(xs->regmap_pextp[id], 0x90D0, 0x00000003); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200E800); ++ /* Setup DA default value */ ++ regmap_write(pextp, 0x30B0, 0x00000020); ++ regmap_write(pextp, 0x3028, 0x00008A01); ++ regmap_write(pextp, 0x302C, 0x0000A884); ++ regmap_write(pextp, 0x3024, 0x00083002); ++ regmap_write(pextp, 0x3010, 0x00022220); ++ regmap_write(pextp, 0x5064, 0x0F020A01); ++ regmap_write(pextp, 0x50B4, 0x06100600); ++ regmap_write(pextp, 0x3048, 0x40704000); ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ regmap_write(pextp, 0x306C, 0x00000F00); ++ regmap_write(pextp, 0xA060, 0x00040000); ++ regmap_write(pextp, 0x90D0, 0x00000003); ++ /* Release reset */ ++ regmap_write(pextp, 0x0070, 0x0200E800); + udelay(150); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C111); ++ /* Switch to P0 */ ++ regmap_write(pextp, 0x0070, 0x0200C111); + ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C101); ++ regmap_write(pextp, 0x0070, 0x0200C101); + udelay(15); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0202C111); ++ /* Switch to Gen3 */ ++ regmap_write(pextp, 0x0070, 0x0202C111); + ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0202C101); ++ regmap_write(pextp, 0x0070, 0x0202C101); + udelay(100); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000030); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F00); -+ regmap_write(xs->regmap_pextp[id], 0x3040, 0x30000000); ++ regmap_write(pextp, 0x30B0, 0x00000030); ++ regmap_write(pextp, 0x00F4, 0x80201F00); ++ regmap_write(pextp, 0x3040, 0x30000000); + udelay(400); +} + -+void mtk_usxgmii_setup_phya_force_10000(struct mtk_eth *eth, int mac_id) ++static void mtk_usxgmii_setup_phya_10gbaser(struct mtk_usxgmii_pcs *mpcs) +{ -+ struct mtk_xgmii *xs = eth->xgmii; -+ unsigned int val; -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); ++ struct regmap *pextp; + -+ if (id >= eth->soc->num_devs || -+ !xs->regmap_usxgmii[id] || !xs->regmap_pextp[id]) ++ if (!mpcs->eth) + return; + -+ /* Setup USXGMII speed */ -+ val = FIELD_PREP(RG_XFI_RX_MODE, RG_XFI_RX_MODE_10G) | -+ FIELD_PREP(RG_XFI_TX_MODE, RG_XFI_TX_MODE_10G); -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); -+ -+ /* Disable USXGMII AN mode */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PCS_AN_CTRL0, &val); -+ val &= ~RG_AN_ENABLE; -+ regmap_write(xs->regmap_usxgmii[id], RG_PCS_AN_CTRL0, val); -+ -+ /* Gated USXGMII */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, &val); -+ val |= RG_MAC_CK_GATED; -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); ++ pextp = mpcs->eth->regmap_pextp[mpcs->id]; ++ if (!pextp) ++ return; + ++ /* Setup operation mode */ ++ regmap_write(pextp, 0x9024, 0x00C9071C); ++ regmap_write(pextp, 0x2020, 0xAA8585AA); ++ regmap_write(pextp, 0x2030, 0x0C020707); ++ regmap_write(pextp, 0x2034, 0x0E050F0F); ++ regmap_write(pextp, 0x2040, 0x00140032); ++ regmap_write(pextp, 0x50F0, 0x00C014AA); ++ regmap_write(pextp, 0x50E0, 0x3777C12B); ++ regmap_write(pextp, 0x506C, 0x005F9CFF); ++ regmap_write(pextp, 0x5070, 0x9D9DFAFA); ++ regmap_write(pextp, 0x5074, 0x27273F3F); ++ regmap_write(pextp, 0x5078, 0xA7883C68); ++ regmap_write(pextp, 0x507C, 0x11661166); ++ regmap_write(pextp, 0x5080, 0x0E000AAF); ++ regmap_write(pextp, 0x5084, 0x08080D0D); ++ regmap_write(pextp, 0x5088, 0x02030909); ++ regmap_write(pextp, 0x50E4, 0x0C0C0000); ++ regmap_write(pextp, 0x50E8, 0x04040000); ++ regmap_write(pextp, 0x50EC, 0x0F0F0C06); ++ regmap_write(pextp, 0x50A8, 0x506E8C8C); ++ regmap_write(pextp, 0x6004, 0x18190000); ++ regmap_write(pextp, 0x00F8, 0x01423342); ++ /* Force SGDT_OUT off and select PCS */ ++ regmap_write(pextp, 0x00F4, 0x80201F20); ++ /* Force GLB_CKDET_OUT */ ++ regmap_write(pextp, 0x0030, 0x00050C00); ++ /* Force AEQ on */ ++ regmap_write(pextp, 0x0070, 0x02002800); + ndelay(1020); ++ /* Setup DA default value */ ++ regmap_write(pextp, 0x30B0, 0x00000020); ++ regmap_write(pextp, 0x3028, 0x00008A01); ++ regmap_write(pextp, 0x302C, 0x0000A884); ++ regmap_write(pextp, 0x3024, 0x00083002); ++ regmap_write(pextp, 0x3010, 0x00022220); ++ regmap_write(pextp, 0x5064, 0x0F020A01); ++ regmap_write(pextp, 0x50B4, 0x06100600); ++ regmap_write(pextp, 0x3048, 0x47684100); ++ regmap_write(pextp, 0x3050, 0x00000000); ++ regmap_write(pextp, 0x3054, 0x00000000); ++ regmap_write(pextp, 0x306C, 0x00000F00); ++ if (mpcs->id == 0) ++ regmap_write(pextp, 0xA008, 0x0007B400); + -+ /* USXGMII force mode setting */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, &val); -+ val |= RG_USXGMII_RATE_UPDATE_MODE; -+ val |= RG_IF_FORCE_EN; -+ val |= FIELD_PREP(RG_RATE_ADAPT_MODE, RG_RATE_ADAPT_MODE_X1); -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); -+ -+ /* Un-gated USXGMII */ -+ regmap_read(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, &val); -+ val &= ~RG_MAC_CK_GATED; -+ regmap_write(xs->regmap_usxgmii[id], RG_PHY_TOP_SPEED_CTRL1, val); -+ -+ ndelay(1020); -+ -+ regmap_write(xs->regmap_pextp[id], 0x9024, 0x00C9071C); -+ regmap_write(xs->regmap_pextp[id], 0x2020, 0xAA8585AA); -+ regmap_write(xs->regmap_pextp[id], 0x2030, 0x0C020707); -+ regmap_write(xs->regmap_pextp[id], 0x2034, 0x0E050F0F); -+ regmap_write(xs->regmap_pextp[id], 0x2040, 0x00140032); -+ regmap_write(xs->regmap_pextp[id], 0x50F0, 0x00C014AA); -+ regmap_write(xs->regmap_pextp[id], 0x50E0, 0x3777C12B); -+ regmap_write(xs->regmap_pextp[id], 0x506C, 0x005F9CFF); -+ regmap_write(xs->regmap_pextp[id], 0x5070, 0x9D9DFAFA); -+ regmap_write(xs->regmap_pextp[id], 0x5074, 0x27273F3F); -+ regmap_write(xs->regmap_pextp[id], 0x5078, 0xA7883C68); -+ regmap_write(xs->regmap_pextp[id], 0x507C, 0x11661166); -+ regmap_write(xs->regmap_pextp[id], 0x5080, 0x0E000AAF); -+ regmap_write(xs->regmap_pextp[id], 0x5084, 0x08080D0D); -+ regmap_write(xs->regmap_pextp[id], 0x5088, 0x02030909); -+ regmap_write(xs->regmap_pextp[id], 0x50E4, 0x0C0C0000); -+ regmap_write(xs->regmap_pextp[id], 0x50E8, 0x04040000); -+ regmap_write(xs->regmap_pextp[id], 0x50EC, 0x0F0F0C06); -+ regmap_write(xs->regmap_pextp[id], 0x50A8, 0x506E8C8C); -+ regmap_write(xs->regmap_pextp[id], 0x6004, 0x18190000); -+ regmap_write(xs->regmap_pextp[id], 0x00F8, 0x01423342); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F20); -+ regmap_write(xs->regmap_pextp[id], 0x0030, 0x00050C00); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x02002800); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000020); -+ regmap_write(xs->regmap_pextp[id], 0x3028, 0x00008A01); -+ regmap_write(xs->regmap_pextp[id], 0x302C, 0x0000A884); -+ regmap_write(xs->regmap_pextp[id], 0x3024, 0x00083002); -+ regmap_write(xs->regmap_pextp[id], 0x3010, 0x00022220); -+ regmap_write(xs->regmap_pextp[id], 0x5064, 0x0F020A01); -+ regmap_write(xs->regmap_pextp[id], 0x50B4, 0x06100600); -+ regmap_write(xs->regmap_pextp[id], 0x3048, 0x49664100); -+ regmap_write(xs->regmap_pextp[id], 0x3050, 0x00000000); -+ regmap_write(xs->regmap_pextp[id], 0x3054, 0x00000000); -+ regmap_write(xs->regmap_pextp[id], 0x306C, 0x00000F00); -+ regmap_write(xs->regmap_pextp[id], 0xA060, 0x00040000); -+ regmap_write(xs->regmap_pextp[id], 0x90D0, 0x00000001); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200E800); ++ regmap_write(pextp, 0xA060, 0x00040000); ++ regmap_write(pextp, 0x90D0, 0x00000001); ++ /* Release reset */ ++ regmap_write(pextp, 0x0070, 0x0200E800); + udelay(150); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C111); ++ /* Switch to P0 */ ++ regmap_write(pextp, 0x0070, 0x0200C111); + ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C101); ++ regmap_write(pextp, 0x0070, 0x0200C101); + udelay(15); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0202C111); ++ /* Switch to Gen3 */ ++ regmap_write(pextp, 0x0070, 0x0202C111); + ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0202C101); ++ regmap_write(pextp, 0x0070, 0x0202C101); + udelay(100); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000030); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F00); -+ regmap_write(xs->regmap_pextp[id], 0x3040, 0x30000000); ++ regmap_write(pextp, 0x30B0, 0x00000030); ++ regmap_write(pextp, 0x00F4, 0x80201F00); ++ regmap_write(pextp, 0x3040, 0x30000000); + udelay(400); +} + -+void mtk_usxgmii_reset(struct mtk_eth *eth, int mac_id) ++void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) +{ + u32 id = mtk_mac2xgmii_id(eth, mac_id); ++ struct regmap *pextp; ++ ++ if (id >= eth->soc->num_devs) ++ return; ++ ++ pextp = eth->regmap_pextp[id]; ++ if (!pextp) ++ return; ++ ++ /* Setup operation mode */ ++ regmap_write(pextp, 0x9024, 0x00D9071C); ++ regmap_write(pextp, 0x2020, 0xAA8585AA); ++ regmap_write(pextp, 0x2030, 0x0C020207); ++ regmap_write(pextp, 0x2034, 0x0E05050F); ++ regmap_write(pextp, 0x2040, 0x00200032); ++ regmap_write(pextp, 0x50F0, 0x00C014BA); ++ regmap_write(pextp, 0x50E0, 0x3777C12B); ++ regmap_write(pextp, 0x506C, 0x005F9CFF); ++ regmap_write(pextp, 0x5070, 0x9D9DFAFA); ++ regmap_write(pextp, 0x5074, 0x27273F3F); ++ regmap_write(pextp, 0x5078, 0xA7883C68); ++ regmap_write(pextp, 0x507C, 0x11661166); ++ regmap_write(pextp, 0x5080, 0x0E000EAF); ++ regmap_write(pextp, 0x5084, 0x08080E0D); ++ regmap_write(pextp, 0x5088, 0x02030B09); ++ regmap_write(pextp, 0x50E4, 0x0C0C0000); ++ regmap_write(pextp, 0x50E8, 0x04040000); ++ regmap_write(pextp, 0x50EC, 0x0F0F0606); ++ regmap_write(pextp, 0x50A8, 0x506E8C8C); ++ regmap_write(pextp, 0x6004, 0x18190000); ++ regmap_write(pextp, 0x00F8, 0x00FA32FA); ++ /* Force SGDT_OUT off and select PCS */ ++ regmap_write(pextp, 0x00F4, 0x80201F21); ++ /* Force GLB_CKDET_OUT */ ++ regmap_write(pextp, 0x0030, 0x00050C00); ++ /* Force AEQ on */ ++ regmap_write(pextp, 0x0070, 0x02002800); ++ ndelay(1020); ++ /* Setup DA default value */ ++ regmap_write(pextp, 0x30B0, 0x00000020); ++ regmap_write(pextp, 0x3028, 0x00008A01); ++ regmap_write(pextp, 0x302C, 0x0000A884); ++ regmap_write(pextp, 0x3024, 0x00083002); ++ regmap_write(pextp, 0x3010, 0x00011110); ++ regmap_write(pextp, 0x3048, 0x40704000); ++ regmap_write(pextp, 0x3064, 0x0000C000); ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ regmap_write(pextp, 0x306C, 0x20200F00); ++ regmap_write(pextp, 0xA060, 0x00050000); ++ regmap_write(pextp, 0x90D0, 0x00000007); ++ /* Release reset */ ++ regmap_write(pextp, 0x0070, 0x0200E800); ++ udelay(150); ++ /* Switch to P0 */ ++ regmap_write(pextp, 0x0070, 0x0200C111); ++ ndelay(1020); ++ regmap_write(pextp, 0x0070, 0x0200C101); ++ udelay(15); ++ /* Switch to Gen2 */ ++ regmap_write(pextp, 0x0070, 0x0201C111); ++ ndelay(1020); ++ regmap_write(pextp, 0x0070, 0x0201C101); ++ udelay(100); ++ regmap_write(pextp, 0x30B0, 0x00000030); ++ regmap_write(pextp, 0x00F4, 0x80201F01); ++ regmap_write(pextp, 0x3040, 0x30000000); ++ udelay(400); ++} ++ ++void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) ++{ ++ u32 id = mtk_mac2xgmii_id(eth, mac_id); ++ struct regmap *pextp; ++ ++ if (id >= eth->soc->num_devs) ++ return; ++ ++ pextp = eth->regmap_pextp[id]; ++ if (!pextp) ++ return; ++ ++ /* Setup operation mode */ ++ regmap_write(pextp, 0x9024, 0x00D9071C); ++ regmap_write(pextp, 0x2020, 0xAA8585AA); ++ regmap_write(pextp, 0x2030, 0x0C020707); ++ regmap_write(pextp, 0x2034, 0x0E050F0F); ++ regmap_write(pextp, 0x2040, 0x00140032); ++ regmap_write(pextp, 0x50F0, 0x00C014AA); ++ regmap_write(pextp, 0x50E0, 0x3777C12B); ++ regmap_write(pextp, 0x506C, 0x005F9CFF); ++ regmap_write(pextp, 0x5070, 0x9D9DFAFA); ++ regmap_write(pextp, 0x5074, 0x27273F3F); ++ regmap_write(pextp, 0x5078, 0xA7883C68); ++ regmap_write(pextp, 0x507C, 0x11661166); ++ regmap_write(pextp, 0x5080, 0x0E000AAF); ++ regmap_write(pextp, 0x5084, 0x08080D0D); ++ regmap_write(pextp, 0x5088, 0x02030909); ++ regmap_write(pextp, 0x50E4, 0x0C0C0000); ++ regmap_write(pextp, 0x50E8, 0x04040000); ++ regmap_write(pextp, 0x50EC, 0x0F0F0C06); ++ regmap_write(pextp, 0x50A8, 0x506E8C8C); ++ regmap_write(pextp, 0x6004, 0x18190000); ++ regmap_write(pextp, 0x00F8, 0x009C329C); ++ /* Force SGDT_OUT off and select PCS */ ++ regmap_write(pextp, 0x00F4, 0x80201F21); ++ /* Force GLB_CKDET_OUT */ ++ regmap_write(pextp, 0x0030, 0x00050C00); ++ /* Force AEQ on */ ++ regmap_write(pextp, 0x0070, 0x02002800); ++ ndelay(1020); ++ /* Setup DA default value */ ++ regmap_write(pextp, 0x30B0, 0x00000020); ++ regmap_write(pextp, 0x3028, 0x00008A01); ++ regmap_write(pextp, 0x302C, 0x0000A884); ++ regmap_write(pextp, 0x3024, 0x00083002); ++ regmap_write(pextp, 0x3010, 0x00011110); ++ regmap_write(pextp, 0x3048, 0x40704000); ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ regmap_write(pextp, 0x306C, 0x22000F00); ++ regmap_write(pextp, 0xA060, 0x00050000); ++ regmap_write(pextp, 0x90D0, 0x00000005); ++ /* Release reset */ ++ regmap_write(pextp, 0x0070, 0x0200E800); ++ udelay(150); ++ /* Switch to P0 */ ++ regmap_write(pextp, 0x0070, 0x0200C111); ++ ndelay(1020); ++ regmap_write(pextp, 0x0070, 0x0200C101); ++ udelay(15); ++ /* Switch to Gen2 */ ++ regmap_write(pextp, 0x0070, 0x0201C111); ++ ndelay(1020); ++ regmap_write(pextp, 0x0070, 0x0201C101); ++ udelay(100); ++ regmap_write(pextp, 0x30B0, 0x00000030); ++ regmap_write(pextp, 0x00F4, 0x80201F01); ++ regmap_write(pextp, 0x3040, 0x30000000); ++ udelay(400); ++} ++ ++static void mtk_usxgmii_reset(struct mtk_eth *eth, int id) ++{ ++ u32 val = 0; + + if (id >= eth->soc->num_devs || !eth->toprgu) + return; + -+ switch (mac_id) { -+ case MTK_GMAC2_ID: -+ regmap_write(eth->toprgu, 0xFC, 0x0000A004); -+ regmap_write(eth->toprgu, 0x18, 0x88F0A004); -+ regmap_write(eth->toprgu, 0xFC, 0x00000000); -+ regmap_write(eth->toprgu, 0x18, 0x88F00000); -+ regmap_write(eth->toprgu, 0x18, 0x00F00000); ++ switch (id) { ++ case 0: ++ /* Enable software reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); ++ val |= SWSYSRST_XFI_PEXPT0_GRST | ++ SWSYSRST_XFI0_GRST; ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); ++ ++ /* Assert USXGMII reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); ++ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | ++ SWSYSRST_XFI_PEXPT0_GRST | ++ SWSYSRST_XFI0_GRST; ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++ ++ udelay(100); ++ ++ /* De-assert USXGMII reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); ++ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); ++ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | ++ SWSYSRST_XFI0_GRST); ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++ ++ /* Disable software reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); ++ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | ++ SWSYSRST_XFI0_GRST); ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); + break; -+ case MTK_GMAC3_ID: -+ regmap_write(eth->toprgu, 0xFC, 0x00005002); -+ regmap_write(eth->toprgu, 0x18, 0x88F05002); -+ regmap_write(eth->toprgu, 0xFC, 0x00000000); -+ regmap_write(eth->toprgu, 0x18, 0x88F00000); -+ regmap_write(eth->toprgu, 0x18, 0x00F00000); ++ case 1: ++ /* Enable software reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); ++ val |= SWSYSRST_XFI_PEXPT1_GRST | ++ SWSYSRST_XFI1_GRST; ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); ++ ++ /* Assert USXGMII reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); ++ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | ++ SWSYSRST_XFI_PEXPT1_GRST | ++ SWSYSRST_XFI1_GRST; ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++ ++ udelay(100); ++ ++ /* De-assert USXGMII reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); ++ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); ++ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | ++ SWSYSRST_XFI1_GRST); ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++ ++ /* Disable software reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); ++ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | ++ SWSYSRST_XFI1_GRST); ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); + break; + } + + mdelay(10); +} + -+int mtk_usxgmii_setup_mode_an(struct mtk_eth *eth, int mac_id, int max_speed) -+{ -+ if (mac_id < 0 || mac_id >= eth->soc->num_devs) -+ return -EINVAL; -+ -+ if ((max_speed != SPEED_10000) && (max_speed != SPEED_5000)) -+ return -EINVAL; -+ -+ mtk_xfi_pll_enable(eth); -+ mtk_usxgmii_reset(eth, mac_id); -+ mtk_usxgmii_setup_phya_an_10000(eth, mac_id); -+ -+ return 0; -+} -+ -+int mtk_usxgmii_setup_mode_force(struct mtk_eth *eth, int mac_id, -+ const struct phylink_link_state *state) -+{ -+ if (mac_id < 0 || mac_id >= eth->soc->num_devs) -+ return -EINVAL; -+ -+ mtk_xfi_pll_enable(eth); -+ mtk_usxgmii_reset(eth, mac_id); -+ if (state->interface == PHY_INTERFACE_MODE_5GBASER) -+ mtk_usxgmii_setup_phya_force_5000(eth, mac_id); -+ else -+ mtk_usxgmii_setup_phya_force_10000(eth, mac_id); -+ -+ return 0; -+} -+ -+void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) -+{ -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); -+ struct mtk_xgmii *xs = eth->xgmii; -+ -+ if (id >= eth->soc->num_devs || !xs->regmap_pextp[id]) -+ return; -+ -+ regmap_write(xs->regmap_pextp[id], 0x9024, 0x00D9071C); -+ regmap_write(xs->regmap_pextp[id], 0x2020, 0xAA8585AA); -+ regmap_write(xs->regmap_pextp[id], 0x2030, 0x0C020207); -+ regmap_write(xs->regmap_pextp[id], 0x2034, 0x0E05050F); -+ regmap_write(xs->regmap_pextp[id], 0x2040, 0x00200032); -+ regmap_write(xs->regmap_pextp[id], 0x50F0, 0x00C014BA); -+ regmap_write(xs->regmap_pextp[id], 0x50E0, 0x3777C12B); -+ regmap_write(xs->regmap_pextp[id], 0x506C, 0x005F9CFF); -+ regmap_write(xs->regmap_pextp[id], 0x5070, 0x9D9DFAFA); -+ regmap_write(xs->regmap_pextp[id], 0x5074, 0x27273F3F); -+ regmap_write(xs->regmap_pextp[id], 0x5078, 0xA7883C68); -+ regmap_write(xs->regmap_pextp[id], 0x507C, 0x11661166); -+ regmap_write(xs->regmap_pextp[id], 0x5080, 0x0E000EAF); -+ regmap_write(xs->regmap_pextp[id], 0x5084, 0x08080E0D); -+ regmap_write(xs->regmap_pextp[id], 0x5088, 0x02030B09); -+ regmap_write(xs->regmap_pextp[id], 0x50E4, 0x0C0C0000); -+ regmap_write(xs->regmap_pextp[id], 0x50E8, 0x04040000); -+ regmap_write(xs->regmap_pextp[id], 0x50EC, 0x0F0F0606); -+ regmap_write(xs->regmap_pextp[id], 0x50A8, 0x506E8C8C); -+ regmap_write(xs->regmap_pextp[id], 0x6004, 0x18190000); -+ regmap_write(xs->regmap_pextp[id], 0x00F8, 0x00FA32FA); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F21); -+ regmap_write(xs->regmap_pextp[id], 0x0030, 0x00050C00); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x02002800); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000020); -+ regmap_write(xs->regmap_pextp[id], 0x3028, 0x00008A01); -+ regmap_write(xs->regmap_pextp[id], 0x302C, 0x0000A884); -+ regmap_write(xs->regmap_pextp[id], 0x3024, 0x00083002); -+ regmap_write(xs->regmap_pextp[id], 0x3010, 0x00011110); -+ regmap_write(xs->regmap_pextp[id], 0x3048, 0x40704000); -+ regmap_write(xs->regmap_pextp[id], 0x3064, 0x0000C000); -+ regmap_write(xs->regmap_pextp[id], 0x3050, 0xA8000000); -+ regmap_write(xs->regmap_pextp[id], 0x3054, 0x000000AA); -+ regmap_write(xs->regmap_pextp[id], 0x306C, 0x20200F00); -+ regmap_write(xs->regmap_pextp[id], 0xA060, 0x00050000); -+ regmap_write(xs->regmap_pextp[id], 0x90D0, 0x00000007); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200E800); -+ udelay(150); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C101); -+ udelay(15); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0201C111); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0201C101); -+ udelay(100); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000030); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F01); -+ regmap_write(xs->regmap_pextp[id], 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) -+{ -+ struct mtk_xgmii *xs = eth->xgmii; -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); -+ -+ if (id >= eth->soc->num_devs || !xs->regmap_pextp[id]) -+ return; -+ -+ regmap_write(xs->regmap_pextp[id], 0x9024, 0x00D9071C); -+ regmap_write(xs->regmap_pextp[id], 0x2020, 0xAA8585AA); -+ regmap_write(xs->regmap_pextp[id], 0x2030, 0x0C020707); -+ regmap_write(xs->regmap_pextp[id], 0x2034, 0x0E050F0F); -+ regmap_write(xs->regmap_pextp[id], 0x2040, 0x00140032); -+ regmap_write(xs->regmap_pextp[id], 0x50F0, 0x00C014AA); -+ regmap_write(xs->regmap_pextp[id], 0x50E0, 0x3777C12B); -+ regmap_write(xs->regmap_pextp[id], 0x506C, 0x005F9CFF); -+ regmap_write(xs->regmap_pextp[id], 0x5070, 0x9D9DFAFA); -+ regmap_write(xs->regmap_pextp[id], 0x5074, 0x27273F3F); -+ regmap_write(xs->regmap_pextp[id], 0x5078, 0xA7883C68); -+ regmap_write(xs->regmap_pextp[id], 0x507C, 0x11661166); -+ regmap_write(xs->regmap_pextp[id], 0x5080, 0x0E000AAF); -+ regmap_write(xs->regmap_pextp[id], 0x5084, 0x08080D0D); -+ regmap_write(xs->regmap_pextp[id], 0x5088, 0x02030909); -+ regmap_write(xs->regmap_pextp[id], 0x50E4, 0x0C0C0000); -+ regmap_write(xs->regmap_pextp[id], 0x50E8, 0x04040000); -+ regmap_write(xs->regmap_pextp[id], 0x50EC, 0x0F0F0C06); -+ regmap_write(xs->regmap_pextp[id], 0x50A8, 0x506E8C8C); -+ regmap_write(xs->regmap_pextp[id], 0x6004, 0x18190000); -+ regmap_write(xs->regmap_pextp[id], 0x00F8, 0x009C329C); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F21); -+ regmap_write(xs->regmap_pextp[id], 0x0030, 0x00050C00); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x02002800); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000020); -+ regmap_write(xs->regmap_pextp[id], 0x3028, 0x00008A01); -+ regmap_write(xs->regmap_pextp[id], 0x302C, 0x0000A884); -+ regmap_write(xs->regmap_pextp[id], 0x3024, 0x00083002); -+ regmap_write(xs->regmap_pextp[id], 0x3010, 0x00011110); -+ regmap_write(xs->regmap_pextp[id], 0x3048, 0x40704000); -+ regmap_write(xs->regmap_pextp[id], 0x3050, 0xA8000000); -+ regmap_write(xs->regmap_pextp[id], 0x3054, 0x000000AA); -+ regmap_write(xs->regmap_pextp[id], 0x306C, 0x22000F00); -+ regmap_write(xs->regmap_pextp[id], 0xA060, 0x00050000); -+ regmap_write(xs->regmap_pextp[id], 0x90D0, 0x00000005); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200E800); -+ udelay(150); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0200C101); -+ udelay(15); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0201C111); -+ ndelay(1020); -+ regmap_write(xs->regmap_pextp[id], 0x0070, 0x0201C101); -+ udelay(100); -+ regmap_write(xs->regmap_pextp[id], 0x30B0, 0x00000030); -+ regmap_write(xs->regmap_pextp[id], 0x00F4, 0x80201F01); -+ regmap_write(xs->regmap_pextp[id], 0x3040, 0x30000000); -+ udelay(400); -+} -+ +void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id) +{ -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); -+ u32 val = 0; ++ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); + -+ if (id >= eth->soc->num_devs || !eth->toprgu) -+ return; ++ mtk_usxgmii_reset(eth, xgmii_id); ++} + -+ switch (mac_id) { -+ case MTK_GMAC2_ID: -+ /* Enable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val |= SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_SGMII1_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); + -+ /* Assert SGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | -+ SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_SGMII1_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode, ++ phy_interface_t interface, ++ const unsigned long *advertising, ++ bool permit_pause_to_mac) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ struct mtk_eth *eth = mpcs->eth; ++ unsigned int an_ctrl = 0, link_timer = 0, xfi_mode = 0, adapt_mode = 0; ++ bool mode_changed = false; + -+ udelay(100); ++ if (interface == PHY_INTERFACE_MODE_USXGMII) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF) | ++ USXGMII_AN_ENABLE; ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); ++ } else if (interface == PHY_INTERFACE_MODE_10GKR) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF); ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); ++ adapt_mode = USXGMII_RATE_UPDATE_MODE; ++ } else if (interface == PHY_INTERFACE_MODE_5GBASER) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0xFF); ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x3D) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x3D) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x3D); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_5G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_5G); ++ adapt_mode = USXGMII_RATE_UPDATE_MODE; ++ } else ++ return -EINVAL; + -+ /* De-assert SGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); -+ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_SGMII1_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++ adapt_mode |= FIELD_PREP(USXGMII_RATE_ADAPT_MODE, USXGMII_RATE_ADAPT_MODE_X1); + -+ /* Disable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_SGMII1_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ break; -+ case MTK_GMAC3_ID: -+ /* Enable Software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val |= SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_SGMII0_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ -+ /* Assert SGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | -+ SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_SGMII0_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ udelay(100); -+ -+ /* De-assert SGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); -+ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_SGMII0_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ /* Disable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_SGMII0_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ break; ++ if (mpcs->interface != interface) { ++ mpcs->interface = interface; ++ mode_changed = true; + } + -+ mdelay(1); -+} ---- a/drivers/net/ethernet/mediatek/Kconfig -+++ b/drivers/net/ethernet/mediatek/Kconfig -@@ -11,6 +11,14 @@ config NET_MEDIATEK_SOC_WED - depends on ARCH_MEDIATEK || COMPILE_TEST - def_bool NET_MEDIATEK_SOC != n - -+config NET_MEDIATEK_SOC_USXGMII -+ bool "Support USXGMII SerDes on MT7988" -+ depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST -+ def_bool NET_MEDIATEK_SOC != n -+ help -+ Include support for 10G USXGMII SerDes unit which can -+ be found on MT7988. ++ mtk_xfi_pll_enable(eth); ++ mtk_usxgmii_reset(eth, mpcs->id); + - config NET_MEDIATEK_SOC - tristate "MediaTek SoC Gigabit Ethernet support" - depends on NET_DSA || !NET_DSA ++ /* Setup USXGMII AN ctrl */ ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL0, ++ USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE, ++ an_ctrl); ++ ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL2, ++ USXGMII_LINK_TIMER_IDLE_DETECT | ++ USXGMII_LINK_TIMER_COMP_ACK_DETECT | ++ USXGMII_LINK_TIMER_AN_RESTART, ++ link_timer); ++ ++ /* Gated MAC CK */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_MAC_CK_GATED, USXGMII_MAC_CK_GATED); ++ ++ /* Enable interface force mode */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_IF_FORCE_EN, USXGMII_IF_FORCE_EN); ++ ++ /* Setup USXGMII adapt mode */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_RATE_UPDATE_MODE | USXGMII_RATE_ADAPT_MODE, ++ adapt_mode); ++ ++ /* Setup USXGMII speed */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_XFI_RX_MODE | USXGMII_XFI_TX_MODE, ++ xfi_mode); ++ ++ udelay(1); ++ ++ /* Un-gated MAC CK */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_MAC_CK_GATED, 0); ++ ++ udelay(1); ++ ++ /* Disable interface force mode for the AN mode */ ++ if (an_ctrl & USXGMII_AN_ENABLE) ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_IF_FORCE_EN, 0); ++ ++ /* Setup USXGMIISYS with the determined property */ ++ if (interface == PHY_INTERFACE_MODE_USXGMII) ++ mtk_usxgmii_setup_phya_usxgmii(mpcs); ++ else if (interface == PHY_INTERFACE_MODE_10GKR) ++ mtk_usxgmii_setup_phya_10gbaser(mpcs); ++ else if (interface == PHY_INTERFACE_MODE_5GBASER) ++ mtk_usxgmii_setup_phya_5gbaser(mpcs); ++ ++ return mode_changed; ++} ++ ++static void mtk_usxgmii_pcs_get_state(struct phylink_pcs *pcs, ++ struct phylink_link_state *state) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ struct mtk_eth *eth = mpcs->eth; ++ struct mtk_mac *mac = eth->mac[mtk_xgmii2mac_id(eth, mpcs->id)]; ++ u32 val = 0; ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); ++ if (FIELD_GET(USXGMII_AN_ENABLE, val)) { ++ /* Refresh LPA by inverting LPA_LATCH */ ++ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_STS0, ++ USXGMII_LPA_LATCH, ++ !(val & USXGMII_LPA_LATCH)); ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); ++ ++ state->interface = mpcs->interface; ++ state->link = FIELD_GET(USXGMII_LPA_LINK, val); ++ state->duplex = FIELD_GET(USXGMII_LPA_DUPLEX, val); ++ ++ switch (FIELD_GET(USXGMII_LPA_SPEED_MASK, val)) { ++ case USXGMII_LPA_SPEED_10: ++ state->speed = SPEED_10; ++ break; ++ case USXGMII_LPA_SPEED_100: ++ state->speed = SPEED_100; ++ break; ++ case USXGMII_LPA_SPEED_1000: ++ state->speed = SPEED_1000; ++ break; ++ case USXGMII_LPA_SPEED_2500: ++ state->speed = SPEED_2500; ++ break; ++ case USXGMII_LPA_SPEED_5000: ++ state->speed = SPEED_5000; ++ break; ++ case USXGMII_LPA_SPEED_10000: ++ state->speed = SPEED_10000; ++ break; ++ } ++ } else { ++ val = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id)); ++ ++ if (mac->id == MTK_GMAC2_ID) ++ val = val >> 16; ++ ++ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, val)) { ++ case 0: ++ state->speed = SPEED_10000; ++ break; ++ case 1: ++ state->speed = SPEED_5000; ++ break; ++ case 2: ++ state->speed = SPEED_2500; ++ break; ++ case 3: ++ state->speed = SPEED_1000; ++ break; ++ } ++ ++ state->interface = mpcs->interface; ++ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, val); ++ state->duplex = DUPLEX_FULL; ++ } ++ ++ if (state->link == 0) ++ mtk_usxgmii_pcs_config(pcs, MLO_AN_INBAND, ++ state->interface, NULL, false); ++} ++ ++static void mtk_usxgmii_pcs_restart_an(struct phylink_pcs *pcs) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ unsigned int val = 0; ++ ++ if (!mpcs->regmap) ++ return; ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); ++ val |= USXGMII_AN_RESTART; ++ regmap_write(mpcs->regmap, RG_PCS_AN_CTRL0, val); ++} ++ ++static void mtk_usxgmii_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, ++ phy_interface_t interface, ++ int speed, int duplex) ++{ ++ /* Reconfiguring USXGMII to ensure the quality of the RX signal ++ * after the line side link up. ++ */ ++ mtk_usxgmii_pcs_config(pcs, mode, ++ interface, NULL, false); ++} ++ ++static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = { ++ .pcs_config = mtk_usxgmii_pcs_config, ++ .pcs_get_state = mtk_usxgmii_pcs_get_state, ++ .pcs_an_restart = mtk_usxgmii_pcs_restart_an, ++ .pcs_link_up = mtk_usxgmii_pcs_link_up, ++}; ++ ++int mtk_usxgmii_init(struct mtk_eth *eth) ++{ ++ struct device_node *r = eth->dev->of_node; ++ struct device *dev = eth->dev; ++ struct device_node *np; ++ int i, ret; ++ ++ eth->usxgmii_pcs = devm_kcalloc(dev, eth->soc->num_devs, sizeof(eth->usxgmii_pcs), GFP_KERNEL); ++ if (!eth->usxgmii_pcs) ++ return -ENOMEM; ++ ++ for (i = 0; i < eth->soc->num_devs; i++) { ++ np = of_parse_phandle(r, "mediatek,usxgmiisys", i); ++ if (!np) ++ break; ++ ++ eth->usxgmii_pcs[i] = devm_kzalloc(dev, sizeof(*eth->usxgmii_pcs), GFP_KERNEL); ++ if (!eth->usxgmii_pcs[i]) ++ return -ENOMEM; ++ ++ eth->usxgmii_pcs[i]->id = i; ++ eth->usxgmii_pcs[i]->eth = eth; ++ eth->usxgmii_pcs[i]->regmap = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->usxgmii_pcs[i]->regmap)) ++ return PTR_ERR(eth->usxgmii_pcs[i]->regmap); ++ ++ eth->usxgmii_pcs[i]->pcs.ops = &mtk_usxgmii_pcs_ops; ++ eth->usxgmii_pcs[i]->pcs.poll = true; ++ eth->usxgmii_pcs[i]->interface = PHY_INTERFACE_MODE_NA; ++ ++ of_node_put(np); ++ } ++ ++ ret = mtk_xfi_pextp_init(eth); ++ if (ret) ++ return ret; ++ ++ ret = mtk_xfi_pll_init(eth); ++ if (ret) ++ return ret; ++ ++ return mtk_toprgu_init(eth); ++} ++ ++struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int mac_id) ++{ ++ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); ++ ++ if (!eth->usxgmii_pcs[xgmii_id]->regmap) ++ return NULL; ++ ++ return ð->usxgmii_pcs[xgmii_id]->pcs; ++} diff --git a/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch b/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch index fc83416b2a..67e9d6419b 100644 --- a/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch +++ b/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch @@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau #endif --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -4574,7 +4574,7 @@ static int rps_ipi_queued(struct softnet +@@ -4576,7 +4576,7 @@ static int rps_ipi_queued(struct softnet #ifdef CONFIG_RPS struct softnet_data *mysd = this_cpu_ptr(&softnet_data); @@ -39,7 +39,7 @@ Signed-off-by: Felix Fietkau sd->rps_ipi_next = mysd->rps_ipi_list; mysd->rps_ipi_list = sd; -@@ -5755,6 +5755,8 @@ static DEFINE_PER_CPU(struct work_struct +@@ -5757,6 +5757,8 @@ static DEFINE_PER_CPU(struct work_struct /* Network device is going away, flush any packets still pending */ static void flush_backlog(struct work_struct *work) { @@ -48,7 +48,7 @@ Signed-off-by: Felix Fietkau struct sk_buff *skb, *tmp; struct softnet_data *sd; -@@ -5770,9 +5772,18 @@ static void flush_backlog(struct work_st +@@ -5772,9 +5774,18 @@ static void flush_backlog(struct work_st input_queue_head_incr(sd); } } @@ -67,7 +67,7 @@ Signed-off-by: Felix Fietkau skb_queue_walk_safe(&sd->process_queue, skb, tmp) { if (skb->dev->reg_state == NETREG_UNREGISTERING) { __skb_unlink(skb, &sd->process_queue); -@@ -5780,7 +5791,18 @@ static void flush_backlog(struct work_st +@@ -5782,7 +5793,18 @@ static void flush_backlog(struct work_st input_queue_head_incr(sd); } } @@ -86,7 +86,7 @@ Signed-off-by: Felix Fietkau } static bool flush_required(int cpu) -@@ -6463,6 +6485,7 @@ static int process_backlog(struct napi_s +@@ -6465,6 +6487,7 @@ static int process_backlog(struct napi_s local_irq_disable(); rps_lock(sd); @@ -94,7 +94,7 @@ Signed-off-by: Felix Fietkau if (skb_queue_empty(&sd->input_pkt_queue)) { /* * Inline a custom version of __napi_complete(). -@@ -6472,7 +6495,8 @@ static int process_backlog(struct napi_s +@@ -6474,7 +6497,8 @@ static int process_backlog(struct napi_s * We can use a plain write instead of clear_bit(), * and we dont need an smp_mb() memory barrier. */ @@ -104,7 +104,7 @@ Signed-off-by: Felix Fietkau again = false; } else { skb_queue_splice_tail_init(&sd->input_pkt_queue, -@@ -6889,6 +6913,57 @@ int dev_set_threaded(struct net_device * +@@ -6891,6 +6915,57 @@ int dev_set_threaded(struct net_device * } EXPORT_SYMBOL(dev_set_threaded); @@ -162,7 +162,7 @@ Signed-off-by: Felix Fietkau void netif_napi_add(struct net_device *dev, struct napi_struct *napi, int (*poll)(struct napi_struct *, int), int weight) { -@@ -11367,6 +11442,9 @@ static int dev_cpu_dead(unsigned int old +@@ -11369,6 +11444,9 @@ static int dev_cpu_dead(unsigned int old raise_softirq_irqoff(NET_TX_SOFTIRQ); local_irq_enable(); @@ -172,7 +172,7 @@ Signed-off-by: Felix Fietkau #ifdef CONFIG_RPS remsd = oldsd->rps_ipi_list; oldsd->rps_ipi_list = NULL; -@@ -11706,6 +11784,7 @@ static int __init net_dev_init(void) +@@ -11708,6 +11786,7 @@ static int __init net_dev_init(void) sd->cpu = i; #endif diff --git a/target/linux/layerscape/armv8_64b/config-5.15 b/target/linux/layerscape/armv8_64b/config-5.15 index df0a3fd849..b4510b7d34 100644 --- a/target/linux/layerscape/armv8_64b/config-5.15 +++ b/target/linux/layerscape/armv8_64b/config-5.15 @@ -291,7 +291,7 @@ CONFIG_FSL_GUTS=y CONFIG_FSL_IFC=y CONFIG_FSL_MC_BUS=y CONFIG_FSL_MC_DPIO=y -# CONFIG_FSL_MC_UAPI_SUPPORT is not set +CONFIG_FSL_MC_UAPI_SUPPORT=y # CONFIG_FSL_PPFE is not set # CONFIG_FSL_PPFE_UTIL_DISABLED is not set # CONFIG_FSL_QMAN_TEST is not set diff --git a/target/linux/mediatek/dts/mt7981b-qihoo-360t7.dts b/target/linux/mediatek/dts/mt7981b-qihoo-360t7.dts new file mode 100644 index 0000000000..87076d255c --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-qihoo-360t7.dts @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include + +#include "mt7981.dtsi" + +/ { + model = "Qihoo 360T7"; + compatible = "qihoo,360t7", "mediatek,mt7981"; + + aliases { + serial0 = &uart0; + led-boot = &led_status_red; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_green; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x10000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&pio 0 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: red { + label = "red:status"; + gpios = <&pio 3 GPIO_ACTIVE_LOW>; + }; + + led_status_green: green { + label = "green:status"; + gpios = <&pio 7 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; +}; + +&mdio_bus { + switch: switch@0 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand@0 { + compatible = "spi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x0000000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x0180000 0x0200000>; + read-only; + }; + + partition@380000 { + label = "fip"; + reg = <0x0380000 0x0200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x0580000 0x6c00000>; + }; + + partition@7180000 { + label = "config"; + reg = <0x7180000 0x0100000>; + read-only; + }; + + partition@7280000 { + label = "factory"; + reg = <0x7280000 0x0080000>; + read-only; + }; + + partition@7300000 { + label = "log"; + reg = <0x7300000 0x0700000>; + read-only; + }; + }; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan3"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@3 { + reg = <3>; + label = "wan"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981.dtsi index 95b548143b..17038a2484 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981.dtsi +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981.dtsi @@ -164,6 +164,13 @@ #size-cells = <2>; ranges; + /* 64 KiB reserved for ramoops/pstore */ + ramoops@42ff0000 { + compatible = "ramoops"; + reg = <0 0x42ff0000 0 0x10000>; + record-size = <0x1000>; + }; + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ secmon_reserved: secmon@43000000 { reg = <0 0x43000000 0 0x30000>; @@ -317,8 +324,10 @@ interrupts = ; clock-div = <1>; clocks = <&infracfg CLK_INFRA_I2C0_CK>, - <&infracfg CLK_INFRA_AP_DMA_CK>; - clock-names = "main", "dma"; + <&infracfg CLK_INFRA_AP_DMA_CK>, + <&infracfg CLK_INFRA_I2C_MCK_CK>, + <&infracfg CLK_INFRA_I2C_PCK_CK>; + clock-names = "main", "dma", "mck", "pck"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 91de552e4b..fcd0319716 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -34,6 +34,9 @@ mediatek_setup_interfaces() mediatek,mt7988a-dsa-10g-spim-snand) ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "eth1 eth2" ;; + qihoo,360t7) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan + ;; tplink,tl-xdr4288|\ tplink,tl-xdr6088) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" eth1 @@ -69,6 +72,11 @@ mediatek_setup_macs() bananapi,bpi-r3) wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1) ;; + qihoo,360t7) + lan_mac=$(mtd_get_mac_ascii factory lanMac) + wan_mac=$(macaddr_add "$lan_mac" 1) + label_mac=$wan_mac + ;; xiaomi,redmi-router-ax6000|\ xiaomi,redmi-router-ax6000-stock|\ xiaomi,redmi-router-ax6000-ubootmod) diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index 1b487c6ce7..7235230fe2 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -41,6 +41,11 @@ case "$board" in addr=$(macaddr_add $(cat /sys/class/net/eth0/address) 2) [ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress ;; + qihoo,360t7) + addr=$(mtd_get_mac_ascii factory lanMac) + [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress + ;; tplink,tl-xdr4288|\ tplink,tl-xdr6086|\ tplink,tl-xdr6088) diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 9a7a5aaffb..5b624bc551 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -70,6 +70,7 @@ platform_do_upgrade() { cudy,wr3000-v1) default_do_upgrade "$1" ;; + qihoo,360t7|\ tplink,tl-xdr4288|\ tplink,tl-xdr6086|\ tplink,tl-xdr6088|\ diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index e32b75d01c..7af832aaf8 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -6,11 +6,19 @@ define Image/Prepare echo -ne '\xde\xad\xc0\xde' > $(KDIR)/ubi_mark endef -define Build/bl2 +define Build/mt7981-bl2 + cat $(STAGING_DIR_IMAGE)/mt7981-$1-bl2.img >> $@ +endef + +define Build/mt7981-bl31-uboot + cat $(STAGING_DIR_IMAGE)/mt7981_$1-u-boot.fip >> $@ +endef + +define Build/mt7986-bl2 cat $(STAGING_DIR_IMAGE)/mt7986-$1-bl2.img >> $@ endef -define Build/bl31-uboot +define Build/mt7986-bl31-uboot cat $(STAGING_DIR_IMAGE)/mt7986_$1-u-boot.fip >> $@ endef @@ -99,28 +107,29 @@ define Device/bananapi_bpi-r3 nor-preloader.bin nor-bl31-uboot.fip \ sdcard.img.gz \ snand-preloader.bin snand-bl31-uboot.fip - ARTIFACT/emmc-preloader.bin := bl2 emmc-ddr4 - ARTIFACT/emmc-bl31-uboot.fip := bl31-uboot bananapi_bpi-r3-emmc - ARTIFACT/nor-preloader.bin := bl2 nor-ddr4 - ARTIFACT/nor-bl31-uboot.fip := bl31-uboot bananapi_bpi-r3-nor - ARTIFACT/snand-preloader.bin := bl2 spim-nand-ddr4 - ARTIFACT/snand-bl31-uboot.fip := bl31-uboot bananapi_bpi-r3-snand + ARTIFACT/emmc-preloader.bin := mt7986-bl2 emmc-ddr4 + ARTIFACT/emmc-bl31-uboot.fip := mt7986-bl31-uboot bananapi_bpi-r3-emmc + ARTIFACT/nor-preloader.bin := mt7986-bl2 nor-ddr4 + ARTIFACT/nor-bl31-uboot.fip := mt7986-bl31-uboot bananapi_bpi-r3-nor + ARTIFACT/snand-preloader.bin := mt7986-bl2 spim-nand-ddr4 + ARTIFACT/snand-bl31-uboot.fip := mt7986-bl31-uboot bananapi_bpi-r3-snand ARTIFACT/sdcard.img.gz := mt7986-gpt sdmmc |\ - pad-to 17k | bl2 sdmmc-ddr4 |\ - pad-to 6656k | bl31-uboot bananapi_bpi-r3-sdmmc |\ + pad-to 17k | mt7986-bl2 sdmmc-ddr4 |\ + pad-to 6656k | mt7986-bl31-uboot bananapi_bpi-r3-sdmmc |\ $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\ pad-to 12M | append-image-stage initramfs-recovery.itb | check-size 44m |\ ) \ - pad-to 44M | bl2 spim-nand-ddr4 |\ - pad-to 45M | bl31-uboot bananapi_bpi-r3-snand |\ - pad-to 49M | bl2 nor-ddr4 |\ - pad-to 50M | bl31-uboot bananapi_bpi-r3-nor |\ - pad-to 51M | bl2 emmc-ddr4 |\ - pad-to 52M | bl31-uboot bananapi_bpi-r3-emmc |\ + pad-to 44M | mt7986-bl2 spim-nand-ddr4 |\ + pad-to 45M | mt7986-bl31-uboot bananapi_bpi-r3-snand |\ + pad-to 49M | mt7986-bl2 nor-ddr4 |\ + pad-to 50M | mt7986-bl31-uboot bananapi_bpi-r3-nor |\ + pad-to 51M | mt7986-bl2 emmc-ddr4 |\ + pad-to 52M | mt7986-bl31-uboot bananapi_bpi-r3-emmc |\ pad-to 56M | mt7986-gpt emmc |\ $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\ - pad-to 64M | append-image squashfs-sysupgrade.itb | check-size | gzip \ - ) + pad-to 64M | append-image squashfs-sysupgrade.itb | check-size |\ + ) \ + gzip IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m KERNEL := kernel-bin | gzip KERNEL_INITRAMFS := kernel-bin | lzma | \ @@ -277,6 +286,30 @@ define Device/qihoo_360-t7-ubootmod endef TARGET_DEVICES += qihoo_360-t7-ubootmod +define Device/qihoo_360t7 + DEVICE_VENDOR := Qihoo + DEVICE_MODEL := 360 T7 (OpenWrt U-Boot layout) + DEVICE_DTS := mt7981b-qihoo-360t7 + DEVICE_DTS_DIR := ../dts + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_IN_UBI := 1 + UBOOTENV_IN_UBI := 1 + IMAGES := sysupgrade.itb + KERNEL_INITRAMFS_SUFFIX := -recovery.itb + KERNEL := kernel-bin | gzip + KERNEL_INITRAMFS := kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k + IMAGE/sysupgrade.itb := append-kernel | \ + fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware + ARTIFACTS := preloader.bin bl31-uboot.fip + ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3 + ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot qihoo_360t7 +endef +TARGET_DEVICES += qihoo_360t7 + define Device/tplink_tl-xdr-common DEVICE_VENDOR := TP-Link DEVICE_DTS_DIR := ../dts @@ -294,13 +327,13 @@ define Device/tplink_tl-xdr-common fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata DEVICE_PACKAGES := kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware ARTIFACTS := preloader.bin bl31-uboot.fip - ARTIFACT/preloader.bin := bl2 spim-nand-ddr3 + ARTIFACT/preloader.bin := mt7986-bl2 spim-nand-ddr3 endef define Device/tplink_tl-xdr4288 DEVICE_MODEL := TL-XDR4288 DEVICE_DTS := mt7986a-tplink-tl-xdr4288 - ARTIFACT/bl31-uboot.fip := bl31-uboot tplink_tl-xdr4288 + ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot tplink_tl-xdr4288 $(call Device/tplink_tl-xdr-common) endef TARGET_DEVICES += tplink_tl-xdr4288 @@ -308,7 +341,7 @@ TARGET_DEVICES += tplink_tl-xdr4288 define Device/tplink_tl-xdr6086 DEVICE_MODEL := TL-XDR6086 DEVICE_DTS := mt7986a-tplink-tl-xdr6086 - ARTIFACT/bl31-uboot.fip := bl31-uboot tplink_tl-xdr6086 + ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot tplink_tl-xdr6086 $(call Device/tplink_tl-xdr-common) endef TARGET_DEVICES += tplink_tl-xdr6086 @@ -316,14 +349,14 @@ TARGET_DEVICES += tplink_tl-xdr6086 define Device/tplink_tl-xdr6088 DEVICE_MODEL := TL-XDR6088 DEVICE_DTS := mt7986a-tplink-tl-xdr6088 - ARTIFACT/bl31-uboot.fip := bl31-uboot tplink_tl-xdr6088 + ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot tplink_tl-xdr6088 $(call Device/tplink_tl-xdr-common) endef TARGET_DEVICES += tplink_tl-xdr6088 define Device/xiaomi_redmi-router-ax6000 DEVICE_VENDOR := Xiaomi - DEVICE_MODEL := Redmi Router AX6000 + DEVICE_MODEL := Redmi Router AX6000 (modified U-Boot layout) DEVICE_DTS := mt7986a-xiaomi-redmi-router-ax6000 DEVICE_DTS_DIR := ../dts DEVICE_PACKAGES := kmod-leds-ws2812b @@ -372,11 +405,34 @@ define Device/xiaomi_redmi-router-ax6000-ubootmod IMAGE/sysupgrade.itb := append-kernel | \ fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata ARTIFACTS := preloader.bin bl31-uboot.fip - ARTIFACT/preloader.bin := bl2 spim-nand-ddr4 - ARTIFACT/bl31-uboot.fip := bl31-uboot xiaomi_redmi-router-ax6000 + ARTIFACT/preloader.bin := mt7986-bl2 spim-nand-ddr4 + ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot xiaomi_redmi-router-ax6000 ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),) ARTIFACTS += initramfs-factory.ubi ARTIFACT/initramfs-factory.ubi := append-image-stage initramfs-recovery.itb | ubinize-kernel endif endef TARGET_DEVICES += xiaomi_redmi-router-ax6000-ubootmod + +define Device/zyxel_ex5601-t0-stock + DEVICE_VENDOR := Zyxel + DEVICE_MODEL := EX5601-T0 (stock layout) + DEVICE_DTS := mt7986a-zyxel-ex5601-t0-stock + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-mt7986-firmware mt7986-wo-firmware + SUPPORTED_DEVICES := mediatek,mt7986a-rfb-snand + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 256k + PAGESIZE := 4096 + IMAGE_SIZE := 65536k + KERNEL_IN_UBI := 1 + IMAGES += factory.bin + IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + KERNEL = kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb + KERNEL_INITRAMFS = kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd + DTC_FLAGS += -@ --space 32768 +endef +TARGET_DEVICES += zyxel_ex5601-t0-stock diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk index 12e819ed54..92824ff24a 100644 --- a/target/linux/mediatek/image/mt7622.mk +++ b/target/linux/mediatek/image/mt7622.mk @@ -88,9 +88,10 @@ define Device/bananapi_bpi-r64 pad-to 40960k | bl31-uboot bananapi_bpi-r64-emmc |\ pad-to 43008k | bl2 snand-2ddr |\ pad-to 43520k | bl31-uboot bananapi_bpi-r64-snand |\ - $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\ - pad-to 46080k | append-image squashfs-sysupgrade.itb | check-size | gzip \ - ) + $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS), \ + pad-to 46080k | append-image squashfs-sysupgrade.itb | check-size |\ + ) \ + gzip IMAGE_SIZE := $$(shell expr 45 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m KERNEL := kernel-bin | gzip KERNEL_INITRAMFS := kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb with-initrd | pad-to 128k diff --git a/target/linux/mediatek/image/mt7623.mk b/target/linux/mediatek/image/mt7623.mk index 1645ecd545..5828c4d763 100644 --- a/target/linux/mediatek/image/mt7623.mk +++ b/target/linux/mediatek/image/mt7623.mk @@ -96,6 +96,7 @@ define Device/bananapi_bpi-r2 KERNEL := kernel-bin | gzip KERNEL_INITRAMFS_SUFFIX := -recovery.itb KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb with-initrd + IMAGE_SIZE := $$(shell expr 48 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb external-static-with-rootfs | append-metadata ARTIFACT/preloader.bin := mt7623-mbr emmc |\ pad-to 2k | append-preloader $$(UBOOT_TARGET) @@ -105,10 +106,10 @@ define Device/bananapi_bpi-r2 pad-to $$(UBOOT_OFFSET) | append-bootloader $$(UBOOT_TARGET) |\ pad-to 4092k | mt7623-mbr emmc |\ $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\ - pad-to 4M | append-image-stage initramfs-recovery.itb |\ + pad-to 4M | append-image-stage initramfs-recovery.itb | check-size 48m |\ ) \ $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\ - pad-to 48M | append-image squashfs-sysupgrade.itb |\ + pad-to 48M | append-image squashfs-sysupgrade.itb | check-size |\ ) \ gzip ARTIFACTS := u-boot.bin preloader.bin sdcard.img.gz @@ -129,6 +130,7 @@ define Device/unielec_u7623-02 UBOOT_TARGET := mt7623a_unielec_u7623 UBOOT_IMAGE := u-boot-mtk.bin UBOOT_PATH := $(STAGING_DIR_IMAGE)/$$(UBOOT_TARGET)-$$(UBOOT_IMAGE) + IMAGE_SIZE := $$(shell expr 48 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m IMAGES := sysupgrade.itb KERNEL := kernel-bin | gzip KERNEL_INITRAMFS_SUFFIX := -recovery.itb @@ -140,10 +142,10 @@ define Device/unielec_u7623-02 ARTIFACT/emmc.img.gz := mt7623-mbr sdmmc |\ pad-to $$(UBOOT_OFFSET) | append-bootloader $$(UBOOT_TARGET) |\ $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\ - pad-to 4M | append-image-stage initramfs-recovery.itb |\ + pad-to 4M | append-image-stage initramfs-recovery.itb | check-size 48m |\ ) \ $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\ - pad-to 48M | append-image squashfs-sysupgrade.itb |\ + pad-to 48M | append-image squashfs-sysupgrade.itb | check-size |\ ) \ gzip | append-metadata ARTIFACT/scatter.txt := scatterfile emmc.img.gz diff --git a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch index 04ca80c213..84718d300b 100644 --- a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch +++ b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch @@ -103,7 +103,7 @@ Signed-off-by: David S. Miller ret = mtk_mdio_busy_wait(eth); if (ret < 0) -@@ -1018,6 +1061,7 @@ static int mtk_mdio_init(struct mtk_eth +@@ -1013,6 +1056,7 @@ static int mtk_mdio_init(struct mtk_eth eth->mii_bus->name = "mdio"; eth->mii_bus->read = mtk_mdio_read; eth->mii_bus->write = mtk_mdio_write; diff --git a/target/linux/mediatek/patches-5.15/810-i2c-mediatek-add-support-for-MT7981-SoC.patch b/target/linux/mediatek/patches-5.15/810-i2c-mediatek-add-support-for-MT7981-SoC.patch deleted file mode 100644 index f9ad79c443..0000000000 --- a/target/linux/mediatek/patches-5.15/810-i2c-mediatek-add-support-for-MT7981-SoC.patch +++ /dev/null @@ -1,74 +0,0 @@ -From bd4f7dae6a1f2fd65bb2112783c92ffe0839bc77 Mon Sep 17 00:00:00 2001 -From: Daniel Golle -Date: Tue, 28 Feb 2023 23:53:56 +0000 -Subject: [PATCH] i2c: mediatek: add support for MT7981 SoC - -Signed-off-by: Daniel Golle ---- - drivers/i2c/busses/i2c-mt65xx.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/drivers/i2c/busses/i2c-mt65xx.c -+++ b/drivers/i2c/busses/i2c-mt65xx.c -@@ -202,6 +202,34 @@ static const u16 mt_i2c_regs_v2[] = { - [OFFSET_DCM_EN] = 0xf88, - }; - -+static const u16 mt_i2c_regs_v3[] = { -+ [OFFSET_DATA_PORT] = 0x0, -+ [OFFSET_INTR_MASK] = 0x8, -+ [OFFSET_INTR_STAT] = 0xc, -+ [OFFSET_CONTROL] = 0x10, -+ [OFFSET_TRANSFER_LEN] = 0x14, -+ [OFFSET_TRANSAC_LEN] = 0x18, -+ [OFFSET_DELAY_LEN] = 0x1c, -+ [OFFSET_TIMING] = 0x20, -+ [OFFSET_START] = 0x24, -+ [OFFSET_EXT_CONF] = 0x28, -+ [OFFSET_LTIMING] = 0x2c, -+ [OFFSET_HS] = 0x30, -+ [OFFSET_IO_CONFIG] = 0x34, -+ [OFFSET_FIFO_ADDR_CLR] = 0x38, -+ [OFFSET_SDA_TIMING] = 0x3c, -+ [OFFSET_TRANSFER_LEN_AUX] = 0x44, -+ [OFFSET_CLOCK_DIV] = 0x48, -+ [OFFSET_SOFTRESET] = 0x50, -+ [OFFSET_SCL_MIS_COMP_POINT] = 0x90, -+ [OFFSET_SLAVE_ADDR] = 0x94, -+ [OFFSET_DEBUGSTAT] = 0xe4, -+ [OFFSET_DEBUGCTRL] = 0xe8, -+ [OFFSET_FIFO_STAT] = 0xf4, -+ [OFFSET_FIFO_THRESH] = 0xf8, -+ [OFFSET_DCM_EN] = 0xf88, -+}; -+ - struct mtk_i2c_compatible { - const struct i2c_adapter_quirks *quirks; - const u16 *regs; -@@ -365,6 +393,18 @@ static const struct mtk_i2c_compatible m - .max_dma_support = 32, - }; - -+static const struct mtk_i2c_compatible mt7981_compat = { -+ .regs = mt_i2c_regs_v3, -+ .pmic_i2c = 0, -+ .dcm = 0, -+ .auto_restart = 1, -+ .aux_len_reg = 1, -+ .timing_adjust = 1, -+ .dma_sync = 1, -+ .ltiming_adjust = 1, -+ .max_dma_support = 33 -+}; -+ - static const struct mtk_i2c_compatible mt7986_compat = { - .quirks = &mt7622_i2c_quirks, - .regs = mt_i2c_regs_v1, -@@ -424,6 +464,7 @@ static const struct of_device_id mtk_i2c - { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat }, - { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat }, - { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat }, -+ { .compatible = "mediatek,mt7981-i2c", .data = &mt7981_compat }, - { .compatible = "mediatek,mt7986-i2c", .data = &mt7986_compat }, - { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat }, - { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat }, diff --git a/target/linux/mediatek/patches-5.15/840-v5.16-i2c-mediatek-Reset-the-handshake-signal-between-i2c-.patch b/target/linux/mediatek/patches-5.15/840-v5.16-i2c-mediatek-Reset-the-handshake-signal-between-i2c-.patch new file mode 100644 index 0000000000..8b01196409 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/840-v5.16-i2c-mediatek-Reset-the-handshake-signal-between-i2c-.patch @@ -0,0 +1,74 @@ +From 95e4dfbf33dc0a0843ba20db811f7ea271235e1e Mon Sep 17 00:00:00 2001 +From: Kewei Xu +Date: Sun, 10 Oct 2021 15:05:12 +0800 +Subject: [PATCH 01/16] i2c: mediatek: Reset the handshake signal between i2c + and dma + +Due to changes in the hardware design of the handshaking signal +between i2c and dma, it is necessary to reset the handshaking +signal before each transfer to ensure that the multi-msgs can +be transferred correctly. + +Signed-off-by: Kewei Xu +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -49,6 +50,8 @@ + #define I2C_RD_TRANAC_VALUE 0x0001 + #define I2C_SCL_MIS_COMP_VALUE 0x0000 + #define I2C_CHN_CLR_FLAG 0x0000 ++#define I2C_RELIABILITY 0x0010 ++#define I2C_DMAACK_ENABLE 0x0008 + + #define I2C_DMA_CON_TX 0x0000 + #define I2C_DMA_CON_RX 0x0001 +@@ -851,6 +854,7 @@ static int mtk_i2c_do_transfer(struct mt + u16 restart_flag = 0; + u16 dma_sync = 0; + u32 reg_4g_mode; ++ u32 reg_dma_reset; + u8 *dma_rd_buf = NULL; + u8 *dma_wr_buf = NULL; + dma_addr_t rpaddr = 0; +@@ -864,6 +868,28 @@ static int mtk_i2c_do_transfer(struct mt + + reinit_completion(&i2c->msg_complete); + ++ if (i2c->dev_comp->apdma_sync && ++ i2c->op != I2C_MASTER_WRRD && num > 1) { ++ mtk_i2c_writew(i2c, 0x00, OFFSET_DEBUGCTRL); ++ writel(I2C_DMA_HANDSHAKE_RST | I2C_DMA_WARM_RST, ++ i2c->pdmabase + OFFSET_RST); ++ ++ ret = readw_poll_timeout(i2c->pdmabase + OFFSET_RST, ++ reg_dma_reset, ++ !(reg_dma_reset & I2C_DMA_WARM_RST), ++ 0, 100); ++ if (ret) { ++ dev_err(i2c->dev, "DMA warm reset timeout\n"); ++ return -ETIMEDOUT; ++ } ++ ++ writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); ++ mtk_i2c_writew(i2c, I2C_HANDSHAKE_RST, OFFSET_SOFTRESET); ++ mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_SOFTRESET); ++ mtk_i2c_writew(i2c, I2C_RELIABILITY | I2C_DMAACK_ENABLE, ++ OFFSET_DEBUGCTRL); ++ } ++ + control_reg = mtk_i2c_readw(i2c, OFFSET_CONTROL) & + ~(I2C_CONTROL_DIR_CHANGE | I2C_CONTROL_RS); + if ((i2c->speed_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) || (left_num >= 1)) diff --git a/target/linux/mediatek/patches-5.15/841-v5.16-i2c-mediatek-Dump-i2c-dma-register-when-a-timeout-oc.patch b/target/linux/mediatek/patches-5.15/841-v5.16-i2c-mediatek-Dump-i2c-dma-register-when-a-timeout-oc.patch new file mode 100644 index 0000000000..a2d2521c77 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/841-v5.16-i2c-mediatek-Dump-i2c-dma-register-when-a-timeout-oc.patch @@ -0,0 +1,102 @@ +From 5b8e29e566e086ef9b5b9ea0d054370a295e1d05 Mon Sep 17 00:00:00 2001 +From: Kewei Xu +Date: Sun, 10 Oct 2021 15:05:13 +0800 +Subject: [PATCH 02/16] i2c: mediatek: Dump i2c/dma register when a timeout + occurs + +When a timeout error occurs in i2c transter, it is usually related +to the i2c/dma IP hardware configuration. Therefore, the purpose of +this patch is to dump the key register values of i2c/dma when a +timeout occurs in i2c for debugging. + +Signed-off-by: Kewei Xu +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 54 +++++++++++++++++++++++++++++++++ + 1 file changed, 54 insertions(+) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -130,6 +130,7 @@ enum I2C_REGS_OFFSET { + OFFSET_HS, + OFFSET_SOFTRESET, + OFFSET_DCM_EN, ++ OFFSET_MULTI_DMA, + OFFSET_PATH_DIR, + OFFSET_DEBUGSTAT, + OFFSET_DEBUGCTRL, +@@ -197,6 +198,7 @@ static const u16 mt_i2c_regs_v2[] = { + [OFFSET_TRANSFER_LEN_AUX] = 0x44, + [OFFSET_CLOCK_DIV] = 0x48, + [OFFSET_SOFTRESET] = 0x50, ++ [OFFSET_MULTI_DMA] = 0x8c, + [OFFSET_SCL_MIS_COMP_POINT] = 0x90, + [OFFSET_DEBUGSTAT] = 0xe4, + [OFFSET_DEBUGCTRL] = 0xe8, +@@ -845,6 +847,57 @@ static int mtk_i2c_set_speed(struct mtk_ + return 0; + } + ++static void i2c_dump_register(struct mtk_i2c *i2c) ++{ ++ dev_dbg(i2c->dev, "SLAVE_ADDR: 0x%x, INTR_MASK: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_SLAVE_ADDR), ++ mtk_i2c_readw(i2c, OFFSET_INTR_MASK)); ++ dev_dbg(i2c->dev, "INTR_STAT: 0x%x, CONTROL: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_INTR_STAT), ++ mtk_i2c_readw(i2c, OFFSET_CONTROL)); ++ dev_dbg(i2c->dev, "TRANSFER_LEN: 0x%x, TRANSAC_LEN: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_TRANSFER_LEN), ++ mtk_i2c_readw(i2c, OFFSET_TRANSAC_LEN)); ++ dev_dbg(i2c->dev, "DELAY_LEN: 0x%x, HTIMING: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_DELAY_LEN), ++ mtk_i2c_readw(i2c, OFFSET_TIMING)); ++ dev_dbg(i2c->dev, "START: 0x%x, EXT_CONF: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_START), ++ mtk_i2c_readw(i2c, OFFSET_EXT_CONF)); ++ dev_dbg(i2c->dev, "HS: 0x%x, IO_CONFIG: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_HS), ++ mtk_i2c_readw(i2c, OFFSET_IO_CONFIG)); ++ dev_dbg(i2c->dev, "DCM_EN: 0x%x, TRANSFER_LEN_AUX: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_DCM_EN), ++ mtk_i2c_readw(i2c, OFFSET_TRANSFER_LEN_AUX)); ++ dev_dbg(i2c->dev, "CLOCK_DIV: 0x%x, FIFO_STAT: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_CLOCK_DIV), ++ mtk_i2c_readw(i2c, OFFSET_FIFO_STAT)); ++ dev_dbg(i2c->dev, "DEBUGCTRL : 0x%x, DEBUGSTAT: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_DEBUGCTRL), ++ mtk_i2c_readw(i2c, OFFSET_DEBUGSTAT)); ++ if (i2c->dev_comp->regs == mt_i2c_regs_v2) { ++ dev_dbg(i2c->dev, "LTIMING: 0x%x, MULTI_DMA: 0x%x\n", ++ mtk_i2c_readw(i2c, OFFSET_LTIMING), ++ mtk_i2c_readw(i2c, OFFSET_MULTI_DMA)); ++ } ++ dev_dbg(i2c->dev, "\nDMA_INT_FLAG: 0x%x, DMA_INT_EN: 0x%x\n", ++ readl(i2c->pdmabase + OFFSET_INT_FLAG), ++ readl(i2c->pdmabase + OFFSET_INT_EN)); ++ dev_dbg(i2c->dev, "DMA_EN: 0x%x, DMA_CON: 0x%x\n", ++ readl(i2c->pdmabase + OFFSET_EN), ++ readl(i2c->pdmabase + OFFSET_CON)); ++ dev_dbg(i2c->dev, "DMA_TX_MEM_ADDR: 0x%x, DMA_RX_MEM_ADDR: 0x%x\n", ++ readl(i2c->pdmabase + OFFSET_TX_MEM_ADDR), ++ readl(i2c->pdmabase + OFFSET_RX_MEM_ADDR)); ++ dev_dbg(i2c->dev, "DMA_TX_LEN: 0x%x, DMA_RX_LEN: 0x%x\n", ++ readl(i2c->pdmabase + OFFSET_TX_LEN), ++ readl(i2c->pdmabase + OFFSET_RX_LEN)); ++ dev_dbg(i2c->dev, "DMA_TX_4G_MODE: 0x%x, DMA_RX_4G_MODE: 0x%x", ++ readl(i2c->pdmabase + OFFSET_TX_4G_MODE), ++ readl(i2c->pdmabase + OFFSET_RX_4G_MODE)); ++} ++ + static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs, + int num, int left_num) + { +@@ -1075,6 +1128,7 @@ static int mtk_i2c_do_transfer(struct mt + + if (ret == 0) { + dev_dbg(i2c->dev, "addr: %x, transfer timeout\n", msgs->addr); ++ i2c_dump_register(i2c); + mtk_i2c_init_hw(i2c); + return -ETIMEDOUT; + } diff --git a/target/linux/mediatek/patches-5.15/842-v5.18-i2c-mediatek-Add-i2c-compatible-for-Mediatek-MT8186.patch b/target/linux/mediatek/patches-5.15/842-v5.18-i2c-mediatek-Add-i2c-compatible-for-Mediatek-MT8186.patch new file mode 100644 index 0000000000..184fe94ff8 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/842-v5.18-i2c-mediatek-Add-i2c-compatible-for-Mediatek-MT8186.patch @@ -0,0 +1,45 @@ +From 83630e3c6147bf7bb18a18f3d5a99462464f450b Mon Sep 17 00:00:00 2001 +From: Kewei Xu +Date: Tue, 25 Jan 2022 19:04:13 +0800 +Subject: [PATCH 03/16] i2c: mediatek: Add i2c compatible for Mediatek MT8186 + +Add i2c compatible for MT8186. Compare to MT8192 i2c controller, +MT8186 doesn't need handshake signal witch apdma. + +Signed-off-by: Kewei Xu +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -397,6 +397,19 @@ static const struct mtk_i2c_compatible m + .max_dma_support = 33, + }; + ++static const struct mtk_i2c_compatible mt8186_compat = { ++ .regs = mt_i2c_regs_v2, ++ .pmic_i2c = 0, ++ .dcm = 0, ++ .auto_restart = 1, ++ .aux_len_reg = 1, ++ .timing_adjust = 1, ++ .dma_sync = 0, ++ .ltiming_adjust = 1, ++ .apdma_sync = 0, ++ .max_dma_support = 36, ++}; ++ + static const struct mtk_i2c_compatible mt8192_compat = { + .quirks = &mt8183_i2c_quirks, + .regs = mt_i2c_regs_v2, +@@ -418,6 +431,7 @@ static const struct of_device_id mtk_i2c + { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat }, + { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat }, + { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat }, ++ { .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat }, + { .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat }, + {} + }; diff --git a/target/linux/mediatek/patches-5.15/843-v5.18-i2c-mediatek-modify-bus-speed-calculation-formula.patch b/target/linux/mediatek/patches-5.15/843-v5.18-i2c-mediatek-modify-bus-speed-calculation-formula.patch new file mode 100644 index 0000000000..0ace4a6701 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/843-v5.18-i2c-mediatek-modify-bus-speed-calculation-formula.patch @@ -0,0 +1,132 @@ +From f606aab3f1a49d723d66e14e545f6ca45005bda6 Mon Sep 17 00:00:00 2001 +From: Kewei Xu +Date: Thu, 17 Feb 2022 20:22:43 +0800 +Subject: [PATCH 04/16] i2c: mediatek: modify bus speed calculation formula + +When clock-div is 0 or greater than 1, the bus speed +calculated by the old speed calculation formula will be +larger than the target speed. So we update the formula. + +Signed-off-by: Kewei Xu +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 51 ++++++++++++++++++++++++++------- + 1 file changed, 41 insertions(+), 10 deletions(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -67,11 +67,12 @@ + + #define MAX_SAMPLE_CNT_DIV 8 + #define MAX_STEP_CNT_DIV 64 +-#define MAX_CLOCK_DIV 256 ++#define MAX_CLOCK_DIV_8BITS 256 ++#define MAX_CLOCK_DIV_5BITS 32 + #define MAX_HS_STEP_CNT_DIV 8 +-#define I2C_STANDARD_MODE_BUFFER (1000 / 2) +-#define I2C_FAST_MODE_BUFFER (300 / 2) +-#define I2C_FAST_MODE_PLUS_BUFFER (20 / 2) ++#define I2C_STANDARD_MODE_BUFFER (1000 / 3) ++#define I2C_FAST_MODE_BUFFER (300 / 3) ++#define I2C_FAST_MODE_PLUS_BUFFER (20 / 3) + + #define I2C_CONTROL_RS (0x1 << 1) + #define I2C_CONTROL_DMA_EN (0x1 << 2) +@@ -604,6 +605,31 @@ static int mtk_i2c_max_step_cnt(unsigned + return MAX_STEP_CNT_DIV; + } + ++static int mtk_i2c_get_clk_div_restri(struct mtk_i2c *i2c, ++ unsigned int sample_cnt) ++{ ++ int clk_div_restri = 0; ++ ++ if (i2c->dev_comp->ltiming_adjust == 0) ++ return 0; ++ ++ if (sample_cnt == 1) { ++ if (i2c->ac_timing.inter_clk_div == 0) ++ clk_div_restri = 0; ++ else ++ clk_div_restri = 1; ++ } else { ++ if (i2c->ac_timing.inter_clk_div == 0) ++ clk_div_restri = -1; ++ else if (i2c->ac_timing.inter_clk_div == 1) ++ clk_div_restri = 0; ++ else ++ clk_div_restri = 1; ++ } ++ ++ return clk_div_restri; ++} ++ + /* + * Check and Calculate i2c ac-timing + * +@@ -732,6 +758,7 @@ static int mtk_i2c_calculate_speed(struc + unsigned int best_mul; + unsigned int cnt_mul; + int ret = -EINVAL; ++ int clk_div_restri = 0; + + if (target_speed > I2C_MAX_HIGH_SPEED_MODE_FREQ) + target_speed = I2C_MAX_HIGH_SPEED_MODE_FREQ; +@@ -749,7 +776,8 @@ static int mtk_i2c_calculate_speed(struc + * optimizing for sample_cnt * step_cnt being minimal + */ + for (sample_cnt = 1; sample_cnt <= MAX_SAMPLE_CNT_DIV; sample_cnt++) { +- step_cnt = DIV_ROUND_UP(opt_div, sample_cnt); ++ clk_div_restri = mtk_i2c_get_clk_div_restri(i2c, sample_cnt); ++ step_cnt = DIV_ROUND_UP(opt_div + clk_div_restri, sample_cnt); + cnt_mul = step_cnt * sample_cnt; + if (step_cnt > max_step_cnt) + continue; +@@ -763,7 +791,7 @@ static int mtk_i2c_calculate_speed(struc + best_mul = cnt_mul; + base_sample_cnt = sample_cnt; + base_step_cnt = step_cnt; +- if (best_mul == opt_div) ++ if (best_mul == (opt_div + clk_div_restri)) + break; + } + } +@@ -774,7 +802,8 @@ static int mtk_i2c_calculate_speed(struc + sample_cnt = base_sample_cnt; + step_cnt = base_step_cnt; + +- if ((clk_src / (2 * sample_cnt * step_cnt)) > target_speed) { ++ if ((clk_src / (2 * (sample_cnt * step_cnt - clk_div_restri))) > ++ target_speed) { + /* In this case, hardware can't support such + * low i2c_bus_freq + */ +@@ -803,13 +832,16 @@ static int mtk_i2c_set_speed(struct mtk_ + target_speed = i2c->speed_hz; + parent_clk /= i2c->clk_src_div; + +- if (i2c->dev_comp->timing_adjust) +- max_clk_div = MAX_CLOCK_DIV; ++ if (i2c->dev_comp->timing_adjust && i2c->dev_comp->ltiming_adjust) ++ max_clk_div = MAX_CLOCK_DIV_5BITS; ++ else if (i2c->dev_comp->timing_adjust) ++ max_clk_div = MAX_CLOCK_DIV_8BITS; + else + max_clk_div = 1; + + for (clk_div = 1; clk_div <= max_clk_div; clk_div++) { + clk_src = parent_clk / clk_div; ++ i2c->ac_timing.inter_clk_div = clk_div - 1; + + if (target_speed > I2C_MAX_FAST_MODE_PLUS_FREQ) { + /* Set master code speed register */ +@@ -856,7 +888,6 @@ static int mtk_i2c_set_speed(struct mtk_ + break; + } + +- i2c->ac_timing.inter_clk_div = clk_div - 1; + + return 0; + } diff --git a/target/linux/mediatek/patches-5.15/844-v5.18-i2c-mediatek-remove-redundant-null-check.patch b/target/linux/mediatek/patches-5.15/844-v5.18-i2c-mediatek-remove-redundant-null-check.patch new file mode 100644 index 0000000000..8f3c965a8d --- /dev/null +++ b/target/linux/mediatek/patches-5.15/844-v5.18-i2c-mediatek-remove-redundant-null-check.patch @@ -0,0 +1,41 @@ +From eb4a2ae019815946f574cd9f8209e12bdcd8fd34 Mon Sep 17 00:00:00 2001 +From: Xu Wang +Date: Wed, 30 Sep 2020 08:42:33 +0000 +Subject: [PATCH 05/16] i2c: mediatek: remove redundant null check + +Because clk_disable_unprepare already checked NULL clock parameter, +so the additional checks are unnecessary, just remove it + +Signed-off-by: Xu Wang +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -476,8 +476,7 @@ static int mtk_i2c_clock_enable(struct m + return 0; + + err_arb: +- if (i2c->have_pmic) +- clk_disable_unprepare(i2c->clk_pmic); ++ clk_disable_unprepare(i2c->clk_pmic); + err_pmic: + clk_disable_unprepare(i2c->clk_main); + err_main: +@@ -488,11 +487,9 @@ err_main: + + static void mtk_i2c_clock_disable(struct mtk_i2c *i2c) + { +- if (i2c->clk_arb) +- clk_disable_unprepare(i2c->clk_arb); ++ clk_disable_unprepare(i2c->clk_arb); + +- if (i2c->have_pmic) +- clk_disable_unprepare(i2c->clk_pmic); ++ clk_disable_unprepare(i2c->clk_pmic); + + clk_disable_unprepare(i2c->clk_main); + clk_disable_unprepare(i2c->clk_dma); diff --git a/target/linux/mediatek/patches-5.15/845-v5.18-i2c-mt65xx-Simplify-with-clk-bulk.patch b/target/linux/mediatek/patches-5.15/845-v5.18-i2c-mt65xx-Simplify-with-clk-bulk.patch new file mode 100644 index 0000000000..71d083f31a --- /dev/null +++ b/target/linux/mediatek/patches-5.15/845-v5.18-i2c-mt65xx-Simplify-with-clk-bulk.patch @@ -0,0 +1,234 @@ +From cc6faa5e0772296d815fd298c231277d47308a6a Mon Sep 17 00:00:00 2001 +From: AngeloGioacchino Del Regno +Date: Thu, 3 Mar 2022 10:15:47 +0100 +Subject: [PATCH 06/16] i2c: mt65xx: Simplify with clk-bulk + +Since depending on the SoC or specific bus functionality some clocks +may be optional, we cannot get the benefit of using devm_clk_bulk_get() +but, by migrating to clk-bulk, we are able to remove the custom functions +mtk_i2c_clock_enable() and mtk_i2c_clock_disable(), increasing common +APIs usage, hence (lightly) decreasing kernel footprint. + +Signed-off-by: AngeloGioacchino Del Regno +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 124 +++++++++++++------------------- + 1 file changed, 51 insertions(+), 73 deletions(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -86,6 +86,27 @@ + + #define I2C_DRV_NAME "i2c-mt65xx" + ++/** ++ * enum i2c_mt65xx_clks - Clocks enumeration for MT65XX I2C ++ * ++ * @I2C_MT65XX_CLK_MAIN: main clock for i2c bus ++ * @I2C_MT65XX_CLK_DMA: DMA clock for i2c via DMA ++ * @I2C_MT65XX_CLK_PMIC: PMIC clock for i2c from PMIC ++ * @I2C_MT65XX_CLK_ARB: Arbitrator clock for i2c ++ * @I2C_MT65XX_CLK_MAX: Number of supported clocks ++ */ ++enum i2c_mt65xx_clks { ++ I2C_MT65XX_CLK_MAIN = 0, ++ I2C_MT65XX_CLK_DMA, ++ I2C_MT65XX_CLK_PMIC, ++ I2C_MT65XX_CLK_ARB, ++ I2C_MT65XX_CLK_MAX ++}; ++ ++static const char * const i2c_mt65xx_clk_ids[I2C_MT65XX_CLK_MAX] = { ++ "main", "dma", "pmic", "arb" ++}; ++ + enum DMA_REGS_OFFSET { + OFFSET_INT_FLAG = 0x0, + OFFSET_INT_EN = 0x04, +@@ -244,10 +265,7 @@ struct mtk_i2c { + /* set in i2c probe */ + void __iomem *base; /* i2c base addr */ + void __iomem *pdmabase; /* dma base address*/ +- struct clk *clk_main; /* main clock for i2c bus */ +- struct clk *clk_dma; /* DMA clock for i2c via DMA */ +- struct clk *clk_pmic; /* PMIC clock for i2c from PMIC */ +- struct clk *clk_arb; /* Arbitrator clock for i2c */ ++ struct clk_bulk_data clocks[I2C_MT65XX_CLK_MAX]; /* clocks for i2c */ + bool have_pmic; /* can use i2c pins from PMIC */ + bool use_push_pull; /* IO config push-pull mode */ + +@@ -449,52 +467,6 @@ static void mtk_i2c_writew(struct mtk_i2 + writew(val, i2c->base + i2c->dev_comp->regs[reg]); + } + +-static int mtk_i2c_clock_enable(struct mtk_i2c *i2c) +-{ +- int ret; +- +- ret = clk_prepare_enable(i2c->clk_dma); +- if (ret) +- return ret; +- +- ret = clk_prepare_enable(i2c->clk_main); +- if (ret) +- goto err_main; +- +- if (i2c->have_pmic) { +- ret = clk_prepare_enable(i2c->clk_pmic); +- if (ret) +- goto err_pmic; +- } +- +- if (i2c->clk_arb) { +- ret = clk_prepare_enable(i2c->clk_arb); +- if (ret) +- goto err_arb; +- } +- +- return 0; +- +-err_arb: +- clk_disable_unprepare(i2c->clk_pmic); +-err_pmic: +- clk_disable_unprepare(i2c->clk_main); +-err_main: +- clk_disable_unprepare(i2c->clk_dma); +- +- return ret; +-} +- +-static void mtk_i2c_clock_disable(struct mtk_i2c *i2c) +-{ +- clk_disable_unprepare(i2c->clk_arb); +- +- clk_disable_unprepare(i2c->clk_pmic); +- +- clk_disable_unprepare(i2c->clk_main); +- clk_disable_unprepare(i2c->clk_dma); +-} +- + static void mtk_i2c_init_hw(struct mtk_i2c *i2c) + { + u16 control_reg; +@@ -1191,7 +1163,7 @@ static int mtk_i2c_transfer(struct i2c_a + int left_num = num; + struct mtk_i2c *i2c = i2c_get_adapdata(adap); + +- ret = mtk_i2c_clock_enable(i2c); ++ ret = clk_bulk_prepare_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); + if (ret) + return ret; + +@@ -1245,7 +1217,7 @@ static int mtk_i2c_transfer(struct i2c_a + ret = num; + + err_exit: +- mtk_i2c_clock_disable(i2c); ++ clk_bulk_disable_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); + return ret; + } + +@@ -1323,9 +1295,8 @@ static int mtk_i2c_probe(struct platform + { + int ret = 0; + struct mtk_i2c *i2c; +- struct clk *clk; + struct resource *res; +- int irq; ++ int i, irq, speed_clk; + + i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); + if (!i2c) +@@ -1371,35 +1342,42 @@ static int mtk_i2c_probe(struct platform + if (i2c->have_pmic && !i2c->dev_comp->pmic_i2c) + return -EINVAL; + +- i2c->clk_main = devm_clk_get(&pdev->dev, "main"); +- if (IS_ERR(i2c->clk_main)) { ++ /* Fill in clk-bulk IDs */ ++ for (i = 0; i < I2C_MT65XX_CLK_MAX; i++) ++ i2c->clocks[i].id = i2c_mt65xx_clk_ids[i]; ++ ++ /* Get clocks one by one, some may be optional */ ++ i2c->clocks[I2C_MT65XX_CLK_MAIN].clk = devm_clk_get(&pdev->dev, "main"); ++ if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_MAIN].clk)) { + dev_err(&pdev->dev, "cannot get main clock\n"); +- return PTR_ERR(i2c->clk_main); ++ return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_MAIN].clk); + } + +- i2c->clk_dma = devm_clk_get(&pdev->dev, "dma"); +- if (IS_ERR(i2c->clk_dma)) { ++ i2c->clocks[I2C_MT65XX_CLK_DMA].clk = devm_clk_get(&pdev->dev, "dma"); ++ if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_DMA].clk)) { + dev_err(&pdev->dev, "cannot get dma clock\n"); +- return PTR_ERR(i2c->clk_dma); ++ return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_DMA].clk); + } + +- i2c->clk_arb = devm_clk_get(&pdev->dev, "arb"); +- if (IS_ERR(i2c->clk_arb)) +- i2c->clk_arb = NULL; ++ i2c->clocks[I2C_MT65XX_CLK_ARB].clk = devm_clk_get_optional(&pdev->dev, "arb"); ++ if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_ARB].clk)) ++ return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_ARB].clk); + +- clk = i2c->clk_main; + if (i2c->have_pmic) { +- i2c->clk_pmic = devm_clk_get(&pdev->dev, "pmic"); +- if (IS_ERR(i2c->clk_pmic)) { ++ i2c->clocks[I2C_MT65XX_CLK_PMIC].clk = devm_clk_get(&pdev->dev, "pmic"); ++ if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_PMIC].clk)) { + dev_err(&pdev->dev, "cannot get pmic clock\n"); +- return PTR_ERR(i2c->clk_pmic); ++ return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_PMIC].clk); + } +- clk = i2c->clk_pmic; ++ speed_clk = I2C_MT65XX_CLK_PMIC; ++ } else { ++ i2c->clocks[I2C_MT65XX_CLK_PMIC].clk = NULL; ++ speed_clk = I2C_MT65XX_CLK_MAIN; + } + + strlcpy(i2c->adap.name, I2C_DRV_NAME, sizeof(i2c->adap.name)); + +- ret = mtk_i2c_set_speed(i2c, clk_get_rate(clk)); ++ ret = mtk_i2c_set_speed(i2c, clk_get_rate(i2c->clocks[speed_clk].clk)); + if (ret) { + dev_err(&pdev->dev, "Failed to set the speed.\n"); + return -EINVAL; +@@ -1414,13 +1392,13 @@ static int mtk_i2c_probe(struct platform + } + } + +- ret = mtk_i2c_clock_enable(i2c); ++ ret = clk_bulk_prepare_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); + if (ret) { + dev_err(&pdev->dev, "clock enable failed!\n"); + return ret; + } + mtk_i2c_init_hw(i2c); +- mtk_i2c_clock_disable(i2c); ++ clk_bulk_disable_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); + + ret = devm_request_irq(&pdev->dev, irq, mtk_i2c_irq, + IRQF_NO_SUSPEND | IRQF_TRIGGER_NONE, +@@ -1465,7 +1443,7 @@ static int mtk_i2c_resume_noirq(struct d + int ret; + struct mtk_i2c *i2c = dev_get_drvdata(dev); + +- ret = mtk_i2c_clock_enable(i2c); ++ ret = clk_bulk_prepare_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); + if (ret) { + dev_err(dev, "clock enable failed!\n"); + return ret; +@@ -1473,7 +1451,7 @@ static int mtk_i2c_resume_noirq(struct d + + mtk_i2c_init_hw(i2c); + +- mtk_i2c_clock_disable(i2c); ++ clk_bulk_disable_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); + + i2c_mark_adapter_resumed(&i2c->adap); + diff --git a/target/linux/mediatek/patches-5.15/846-v5.18-i2c-mediatek-Add-i2c-compatible-for-Mediatek-MT8168.patch b/target/linux/mediatek/patches-5.15/846-v5.18-i2c-mediatek-Add-i2c-compatible-for-Mediatek-MT8168.patch new file mode 100644 index 0000000000..fe5be94fca --- /dev/null +++ b/target/linux/mediatek/patches-5.15/846-v5.18-i2c-mediatek-Add-i2c-compatible-for-Mediatek-MT8168.patch @@ -0,0 +1,46 @@ +From de054c03f90b3ea22bc346fbf78ac716df192b2d Mon Sep 17 00:00:00 2001 +From: Kewei Xu +Date: Mon, 7 Mar 2022 11:36:49 +0800 +Subject: [PATCH 07/16] i2c: mediatek: Add i2c compatible for Mediatek MT8168 + +Add i2c compatible for MT8168. Compare to MT2712 i2c controller, +MT8168 need to synchronize signal with dma. + +Signed-off-by: Kewei Xu +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -389,6 +389,19 @@ static const struct mtk_i2c_compatible m + .max_dma_support = 32, + }; + ++static const struct mtk_i2c_compatible mt8168_compat = { ++ .regs = mt_i2c_regs_v1, ++ .pmic_i2c = 0, ++ .dcm = 1, ++ .auto_restart = 1, ++ .aux_len_reg = 1, ++ .timing_adjust = 1, ++ .dma_sync = 1, ++ .ltiming_adjust = 0, ++ .apdma_sync = 0, ++ .max_dma_support = 33, ++}; ++ + static const struct mtk_i2c_compatible mt8173_compat = { + .regs = mt_i2c_regs_v1, + .pmic_i2c = 0, +@@ -448,6 +461,7 @@ static const struct of_device_id mtk_i2c + { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat }, + { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat }, + { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat }, ++ { .compatible = "mediatek,mt8168-i2c", .data = &mt8168_compat }, + { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat }, + { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat }, + { .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat }, diff --git a/target/linux/mediatek/patches-5.15/847-v5.19-i2c-mediatek-Optimize-master_xfer-and-avoid-circular.patch b/target/linux/mediatek/patches-5.15/847-v5.19-i2c-mediatek-Optimize-master_xfer-and-avoid-circular.patch new file mode 100644 index 0000000000..5c4ce40765 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/847-v5.19-i2c-mediatek-Optimize-master_xfer-and-avoid-circular.patch @@ -0,0 +1,101 @@ +From 2831f9a53ec3a16012d2d23590e3ebad6084b763 Mon Sep 17 00:00:00 2001 +From: AngeloGioacchino Del Regno +Date: Mon, 11 Apr 2022 15:21:07 +0200 +Subject: [PATCH 08/16] i2c: mediatek: Optimize master_xfer() and avoid + circular locking +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Especially (but not only) during probe, it may happen that multiple +devices are communicating via i2c (or multiple i2c busses) and +sometimes while others are probing asynchronously. +For example, a Cr50 TPM may be filling entropy (or userspace may be +reading random data) while the rt5682 (i2c) codec driver reads/sets +some registers, like while getting/setting a clock's rate, which +happens both during probe and during system operation. + +In this driver, the mtk_i2c_transfer() function (which is the i2c +.master_xfer() callback) was granularly managing the clocks by +performing a clk_bulk_prepare_enable() to start them and its inverse. +This is not only creating possible circular locking dependencies in +the some cases (like former explanation), but it's also suboptimal, +as clk_core prepare/unprepare operations are using mutex locking, +which creates a bit of unwanted overhead (for example, i2c trackpads +will call master_xfer() every few milliseconds!). + +With this commit, we avoid both the circular locking and additional +overhead by changing how we handle the clocks in this driver: +- Prepare the clocks during probe (and PM resume) +- Enable/disable clocks in mtk_i2c_transfer() +- Unprepare the clocks only for driver removal (and PM suspend) + +For the sake of providing a full explanation: during probe, the +clocks are not only prepared but also enabled, as this is needed +for some hardware initialization but, after that, we are disabling +but not unpreparing them, leaving an expected state for the +aforementioned clock handling strategy. + +Signed-off-by: AngeloGioacchino Del Regno +Tested-by: Nícolas F. R. A. Prado +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -1177,7 +1177,7 @@ static int mtk_i2c_transfer(struct i2c_a + int left_num = num; + struct mtk_i2c *i2c = i2c_get_adapdata(adap); + +- ret = clk_bulk_prepare_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); ++ ret = clk_bulk_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); + if (ret) + return ret; + +@@ -1231,7 +1231,7 @@ static int mtk_i2c_transfer(struct i2c_a + ret = num; + + err_exit: +- clk_bulk_disable_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); ++ clk_bulk_disable(I2C_MT65XX_CLK_MAX, i2c->clocks); + return ret; + } + +@@ -1412,7 +1412,7 @@ static int mtk_i2c_probe(struct platform + return ret; + } + mtk_i2c_init_hw(i2c); +- clk_bulk_disable_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); ++ clk_bulk_disable(I2C_MT65XX_CLK_MAX, i2c->clocks); + + ret = devm_request_irq(&pdev->dev, irq, mtk_i2c_irq, + IRQF_NO_SUSPEND | IRQF_TRIGGER_NONE, +@@ -1439,6 +1439,8 @@ static int mtk_i2c_remove(struct platfor + + i2c_del_adapter(&i2c->adap); + ++ clk_bulk_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); ++ + return 0; + } + +@@ -1448,6 +1450,7 @@ static int mtk_i2c_suspend_noirq(struct + struct mtk_i2c *i2c = dev_get_drvdata(dev); + + i2c_mark_adapter_suspended(&i2c->adap); ++ clk_bulk_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); + + return 0; + } +@@ -1465,7 +1468,7 @@ static int mtk_i2c_resume_noirq(struct d + + mtk_i2c_init_hw(i2c); + +- clk_bulk_disable_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); ++ clk_bulk_disable(I2C_MT65XX_CLK_MAX, i2c->clocks); + + i2c_mark_adapter_resumed(&i2c->adap); + diff --git a/target/linux/mediatek/patches-5.15/848-v5.19-i2c-mediatek-Fix-an-error-handling-path-in-mtk_i2c_p.patch b/target/linux/mediatek/patches-5.15/848-v5.19-i2c-mediatek-Fix-an-error-handling-path-in-mtk_i2c_p.patch new file mode 100644 index 0000000000..354f12e214 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/848-v5.19-i2c-mediatek-Fix-an-error-handling-path-in-mtk_i2c_p.patch @@ -0,0 +1,48 @@ +From 6f3a5814c7aaea4176e0ac8b1ec6dc0a65aa2808 Mon Sep 17 00:00:00 2001 +From: Christophe JAILLET +Date: Sun, 22 May 2022 14:22:07 +0200 +Subject: [PATCH 09/16] i2c: mediatek: Fix an error handling path in + mtk_i2c_probe() + +The clsk are prepared, enabled, then disabled. So if an error occurs after +the disable step, they are still prepared. + +Add an error handling path to unprepare the clks in such a case, as already +done in the .remove function. + +Fixes: 8b4fc246c3ff ("i2c: mediatek: Optimize master_xfer() and avoid circular locking") +Signed-off-by: Christophe JAILLET +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -1420,17 +1420,22 @@ static int mtk_i2c_probe(struct platform + if (ret < 0) { + dev_err(&pdev->dev, + "Request I2C IRQ %d fail\n", irq); +- return ret; ++ goto err_bulk_unprepare; + } + + i2c_set_adapdata(&i2c->adap, i2c); + ret = i2c_add_adapter(&i2c->adap); + if (ret) +- return ret; ++ goto err_bulk_unprepare; + + platform_set_drvdata(pdev, i2c); + + return 0; ++ ++err_bulk_unprepare: ++ clk_bulk_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); ++ ++ return ret; + } + + static int mtk_i2c_remove(struct platform_device *pdev) diff --git a/target/linux/mediatek/patches-5.15/849-v6.0-i2c-mediatek-add-i2c-compatible-for-MT8188.patch b/target/linux/mediatek/patches-5.15/849-v6.0-i2c-mediatek-add-i2c-compatible-for-MT8188.patch new file mode 100644 index 0000000000..744aa96ed0 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/849-v6.0-i2c-mediatek-add-i2c-compatible-for-MT8188.patch @@ -0,0 +1,82 @@ +From 94c7f8af2c0a399c8aa66f2522b60c5784b5be6c Mon Sep 17 00:00:00 2001 +From: Kewei Xu +Date: Sat, 6 Aug 2022 18:02:49 +0800 +Subject: [PATCH 10/16] i2c: mediatek: add i2c compatible for MT8188 + +Add i2c compatible for MT8188 and added mt_i2c_regs_v3[], since +MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94. + +Signed-off-by: Kewei Xu +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: Qii Wang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 43 +++++++++++++++++++++++++++++++++ + 1 file changed, 43 insertions(+) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -229,6 +229,35 @@ static const u16 mt_i2c_regs_v2[] = { + [OFFSET_DCM_EN] = 0xf88, + }; + ++static const u16 mt_i2c_regs_v3[] = { ++ [OFFSET_DATA_PORT] = 0x0, ++ [OFFSET_INTR_MASK] = 0x8, ++ [OFFSET_INTR_STAT] = 0xc, ++ [OFFSET_CONTROL] = 0x10, ++ [OFFSET_TRANSFER_LEN] = 0x14, ++ [OFFSET_TRANSAC_LEN] = 0x18, ++ [OFFSET_DELAY_LEN] = 0x1c, ++ [OFFSET_TIMING] = 0x20, ++ [OFFSET_START] = 0x24, ++ [OFFSET_EXT_CONF] = 0x28, ++ [OFFSET_LTIMING] = 0x2c, ++ [OFFSET_HS] = 0x30, ++ [OFFSET_IO_CONFIG] = 0x34, ++ [OFFSET_FIFO_ADDR_CLR] = 0x38, ++ [OFFSET_SDA_TIMING] = 0x3c, ++ [OFFSET_TRANSFER_LEN_AUX] = 0x44, ++ [OFFSET_CLOCK_DIV] = 0x48, ++ [OFFSET_SOFTRESET] = 0x50, ++ [OFFSET_MULTI_DMA] = 0x8c, ++ [OFFSET_SCL_MIS_COMP_POINT] = 0x90, ++ [OFFSET_SLAVE_ADDR] = 0x94, ++ [OFFSET_DEBUGSTAT] = 0xe4, ++ [OFFSET_DEBUGCTRL] = 0xe8, ++ [OFFSET_FIFO_STAT] = 0xf4, ++ [OFFSET_FIFO_THRESH] = 0xf8, ++ [OFFSET_DCM_EN] = 0xf88, ++}; ++ + struct mtk_i2c_compatible { + const struct i2c_adapter_quirks *quirks; + const u16 *regs; +@@ -442,6 +471,19 @@ static const struct mtk_i2c_compatible m + .max_dma_support = 36, + }; + ++static const struct mtk_i2c_compatible mt8188_compat = { ++ .regs = mt_i2c_regs_v3, ++ .pmic_i2c = 0, ++ .dcm = 0, ++ .auto_restart = 1, ++ .aux_len_reg = 1, ++ .timing_adjust = 1, ++ .dma_sync = 0, ++ .ltiming_adjust = 1, ++ .apdma_sync = 1, ++ .max_dma_support = 36, ++}; ++ + static const struct mtk_i2c_compatible mt8192_compat = { + .quirks = &mt8183_i2c_quirks, + .regs = mt_i2c_regs_v2, +@@ -465,6 +507,7 @@ static const struct of_device_id mtk_i2c + { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat }, + { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat }, + { .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat }, ++ { .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat }, + { .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat }, + {} + }; diff --git a/target/linux/mediatek/patches-5.15/850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch b/target/linux/mediatek/patches-5.15/850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch new file mode 100644 index 0000000000..506689965d --- /dev/null +++ b/target/linux/mediatek/patches-5.15/850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch @@ -0,0 +1,579 @@ +From 2f4ca256a98cc19787b7c861109dd1150a21b0bf Mon Sep 17 00:00:00 2001 +From: Wolfram Sang +Date: Thu, 11 Aug 2022 09:10:30 +0200 +Subject: [PATCH 11/16] i2c: move drivers from strlcpy to strscpy + +Follow the advice of the below link and prefer 'strscpy'. Conversion is +easy because no driver used the return value and has been done with a +simple sed invocation. + +Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ +Signed-off-by: Wolfram Sang +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-altera.c | 2 +- + drivers/i2c/busses/i2c-aspeed.c | 2 +- + drivers/i2c/busses/i2c-au1550.c | 2 +- + drivers/i2c/busses/i2c-axxia.c | 2 +- + drivers/i2c/busses/i2c-bcm-kona.c | 2 +- + drivers/i2c/busses/i2c-cbus-gpio.c | 2 +- + drivers/i2c/busses/i2c-cht-wc.c | 2 +- + drivers/i2c/busses/i2c-cros-ec-tunnel.c | 2 +- + drivers/i2c/busses/i2c-davinci.c | 2 +- + drivers/i2c/busses/i2c-digicolor.c | 2 +- + drivers/i2c/busses/i2c-eg20t.c | 2 +- + drivers/i2c/busses/i2c-emev2.c | 2 +- + drivers/i2c/busses/i2c-exynos5.c | 2 +- + drivers/i2c/busses/i2c-gpio.c | 2 +- + drivers/i2c/busses/i2c-highlander.c | 2 +- + drivers/i2c/busses/i2c-hix5hd2.c | 2 +- + drivers/i2c/busses/i2c-i801.c | 4 ++-- + drivers/i2c/busses/i2c-ibm_iic.c | 2 +- + drivers/i2c/busses/i2c-icy.c | 2 +- + drivers/i2c/busses/i2c-imx-lpi2c.c | 2 +- + drivers/i2c/busses/i2c-lpc2k.c | 2 +- + drivers/i2c/busses/i2c-meson.c | 2 +- + drivers/i2c/busses/i2c-mt65xx.c | 2 +- + drivers/i2c/busses/i2c-mt7621.c | 2 +- + drivers/i2c/busses/i2c-mv64xxx.c | 2 +- + drivers/i2c/busses/i2c-mxs.c | 2 +- + drivers/i2c/busses/i2c-nvidia-gpu.c | 2 +- + drivers/i2c/busses/i2c-omap.c | 2 +- + drivers/i2c/busses/i2c-opal.c | 4 ++-- + drivers/i2c/busses/i2c-parport.c | 2 +- + drivers/i2c/busses/i2c-pxa.c | 2 +- + drivers/i2c/busses/i2c-qcom-geni.c | 2 +- + drivers/i2c/busses/i2c-qup.c | 2 +- + drivers/i2c/busses/i2c-rcar.c | 2 +- + drivers/i2c/busses/i2c-riic.c | 2 +- + drivers/i2c/busses/i2c-rk3x.c | 2 +- + drivers/i2c/busses/i2c-s3c2410.c | 2 +- + drivers/i2c/busses/i2c-sh_mobile.c | 2 +- + drivers/i2c/busses/i2c-simtec.c | 2 +- + drivers/i2c/busses/i2c-taos-evm.c | 2 +- + drivers/i2c/busses/i2c-tegra-bpmp.c | 2 +- + drivers/i2c/busses/i2c-tegra.c | 2 +- + drivers/i2c/busses/i2c-uniphier-f.c | 2 +- + drivers/i2c/busses/i2c-uniphier.c | 2 +- + drivers/i2c/busses/i2c-versatile.c | 2 +- + drivers/i2c/busses/i2c-wmt.c | 2 +- + 46 files changed, 48 insertions(+), 48 deletions(-) + +--- a/drivers/i2c/busses/i2c-altera.c ++++ b/drivers/i2c/busses/i2c-altera.c +@@ -447,7 +447,7 @@ static int altr_i2c_probe(struct platfor + mutex_unlock(&idev->isr_mutex); + + i2c_set_adapdata(&idev->adapter, idev); +- strlcpy(idev->adapter.name, pdev->name, sizeof(idev->adapter.name)); ++ strscpy(idev->adapter.name, pdev->name, sizeof(idev->adapter.name)); + idev->adapter.owner = THIS_MODULE; + idev->adapter.algo = &altr_i2c_algo; + idev->adapter.dev.parent = &pdev->dev; +--- a/drivers/i2c/busses/i2c-aspeed.c ++++ b/drivers/i2c/busses/i2c-aspeed.c +@@ -1024,7 +1024,7 @@ static int aspeed_i2c_probe_bus(struct p + bus->adap.algo = &aspeed_i2c_algo; + bus->adap.dev.parent = &pdev->dev; + bus->adap.dev.of_node = pdev->dev.of_node; +- strlcpy(bus->adap.name, pdev->name, sizeof(bus->adap.name)); ++ strscpy(bus->adap.name, pdev->name, sizeof(bus->adap.name)); + i2c_set_adapdata(&bus->adap, bus); + + bus->dev = &pdev->dev; +--- a/drivers/i2c/busses/i2c-au1550.c ++++ b/drivers/i2c/busses/i2c-au1550.c +@@ -321,7 +321,7 @@ i2c_au1550_probe(struct platform_device + priv->adap.algo = &au1550_algo; + priv->adap.algo_data = priv; + priv->adap.dev.parent = &pdev->dev; +- strlcpy(priv->adap.name, "Au1xxx PSC I2C", sizeof(priv->adap.name)); ++ strscpy(priv->adap.name, "Au1xxx PSC I2C", sizeof(priv->adap.name)); + + /* Now, set up the PSC for SMBus PIO mode. */ + i2c_au1550_setup(priv); +--- a/drivers/i2c/busses/i2c-axxia.c ++++ b/drivers/i2c/busses/i2c-axxia.c +@@ -783,7 +783,7 @@ static int axxia_i2c_probe(struct platfo + } + + i2c_set_adapdata(&idev->adapter, idev); +- strlcpy(idev->adapter.name, pdev->name, sizeof(idev->adapter.name)); ++ strscpy(idev->adapter.name, pdev->name, sizeof(idev->adapter.name)); + idev->adapter.owner = THIS_MODULE; + idev->adapter.algo = &axxia_i2c_algo; + idev->adapter.bus_recovery_info = &axxia_i2c_recovery_info; +--- a/drivers/i2c/busses/i2c-bcm-kona.c ++++ b/drivers/i2c/busses/i2c-bcm-kona.c +@@ -849,7 +849,7 @@ static int bcm_kona_i2c_probe(struct pla + adap = &dev->adapter; + i2c_set_adapdata(adap, dev); + adap->owner = THIS_MODULE; +- strlcpy(adap->name, "Broadcom I2C adapter", sizeof(adap->name)); ++ strscpy(adap->name, "Broadcom I2C adapter", sizeof(adap->name)); + adap->algo = &bcm_algo; + adap->dev.parent = &pdev->dev; + adap->dev.of_node = pdev->dev.of_node; +--- a/drivers/i2c/busses/i2c-cbus-gpio.c ++++ b/drivers/i2c/busses/i2c-cbus-gpio.c +@@ -245,7 +245,7 @@ static int cbus_i2c_probe(struct platfor + adapter->nr = pdev->id; + adapter->timeout = HZ; + adapter->algo = &cbus_i2c_algo; +- strlcpy(adapter->name, "CBUS I2C adapter", sizeof(adapter->name)); ++ strscpy(adapter->name, "CBUS I2C adapter", sizeof(adapter->name)); + + spin_lock_init(&chost->lock); + chost->dev = &pdev->dev; +--- a/drivers/i2c/busses/i2c-cht-wc.c ++++ b/drivers/i2c/busses/i2c-cht-wc.c +@@ -334,7 +334,7 @@ static int cht_wc_i2c_adap_i2c_probe(str + adap->adapter.class = I2C_CLASS_HWMON; + adap->adapter.algo = &cht_wc_i2c_adap_algo; + adap->adapter.lock_ops = &cht_wc_i2c_adap_lock_ops; +- strlcpy(adap->adapter.name, "PMIC I2C Adapter", ++ strscpy(adap->adapter.name, "PMIC I2C Adapter", + sizeof(adap->adapter.name)); + adap->adapter.dev.parent = &pdev->dev; + +--- a/drivers/i2c/busses/i2c-cros-ec-tunnel.c ++++ b/drivers/i2c/busses/i2c-cros-ec-tunnel.c +@@ -267,7 +267,7 @@ static int ec_i2c_probe(struct platform_ + bus->dev = dev; + + bus->adap.owner = THIS_MODULE; +- strlcpy(bus->adap.name, "cros-ec-i2c-tunnel", sizeof(bus->adap.name)); ++ strscpy(bus->adap.name, "cros-ec-i2c-tunnel", sizeof(bus->adap.name)); + bus->adap.algo = &ec_i2c_algorithm; + bus->adap.algo_data = bus; + bus->adap.dev.parent = &pdev->dev; +--- a/drivers/i2c/busses/i2c-davinci.c ++++ b/drivers/i2c/busses/i2c-davinci.c +@@ -847,7 +847,7 @@ static int davinci_i2c_probe(struct plat + i2c_set_adapdata(adap, dev); + adap->owner = THIS_MODULE; + adap->class = I2C_CLASS_DEPRECATED; +- strlcpy(adap->name, "DaVinci I2C adapter", sizeof(adap->name)); ++ strscpy(adap->name, "DaVinci I2C adapter", sizeof(adap->name)); + adap->algo = &i2c_davinci_algo; + adap->dev.parent = &pdev->dev; + adap->timeout = DAVINCI_I2C_TIMEOUT; +--- a/drivers/i2c/busses/i2c-digicolor.c ++++ b/drivers/i2c/busses/i2c-digicolor.c +@@ -322,7 +322,7 @@ static int dc_i2c_probe(struct platform_ + if (ret < 0) + return ret; + +- strlcpy(i2c->adap.name, "Conexant Digicolor I2C adapter", ++ strscpy(i2c->adap.name, "Conexant Digicolor I2C adapter", + sizeof(i2c->adap.name)); + i2c->adap.owner = THIS_MODULE; + i2c->adap.algo = &dc_i2c_algorithm; +--- a/drivers/i2c/busses/i2c-eg20t.c ++++ b/drivers/i2c/busses/i2c-eg20t.c +@@ -773,7 +773,7 @@ static int pch_i2c_probe(struct pci_dev + + pch_adap->owner = THIS_MODULE; + pch_adap->class = I2C_CLASS_HWMON; +- strlcpy(pch_adap->name, KBUILD_MODNAME, sizeof(pch_adap->name)); ++ strscpy(pch_adap->name, KBUILD_MODNAME, sizeof(pch_adap->name)); + pch_adap->algo = &pch_algorithm; + pch_adap->algo_data = &adap_info->pch_data[i]; + +--- a/drivers/i2c/busses/i2c-emev2.c ++++ b/drivers/i2c/busses/i2c-emev2.c +@@ -371,7 +371,7 @@ static int em_i2c_probe(struct platform_ + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + +- strlcpy(priv->adap.name, "EMEV2 I2C", sizeof(priv->adap.name)); ++ strscpy(priv->adap.name, "EMEV2 I2C", sizeof(priv->adap.name)); + + priv->sclk = devm_clk_get(&pdev->dev, "sclk"); + if (IS_ERR(priv->sclk)) +--- a/drivers/i2c/busses/i2c-exynos5.c ++++ b/drivers/i2c/busses/i2c-exynos5.c +@@ -751,7 +751,7 @@ static int exynos5_i2c_probe(struct plat + if (of_property_read_u32(np, "clock-frequency", &i2c->op_clock)) + i2c->op_clock = I2C_MAX_STANDARD_MODE_FREQ; + +- strlcpy(i2c->adap.name, "exynos5-i2c", sizeof(i2c->adap.name)); ++ strscpy(i2c->adap.name, "exynos5-i2c", sizeof(i2c->adap.name)); + i2c->adap.owner = THIS_MODULE; + i2c->adap.algo = &exynos5_i2c_algorithm; + i2c->adap.retries = 3; +--- a/drivers/i2c/busses/i2c-gpio.c ++++ b/drivers/i2c/busses/i2c-gpio.c +@@ -436,7 +436,7 @@ static int i2c_gpio_probe(struct platfor + + adap->owner = THIS_MODULE; + if (np) +- strlcpy(adap->name, dev_name(dev), sizeof(adap->name)); ++ strscpy(adap->name, dev_name(dev), sizeof(adap->name)); + else + snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id); + +--- a/drivers/i2c/busses/i2c-highlander.c ++++ b/drivers/i2c/busses/i2c-highlander.c +@@ -402,7 +402,7 @@ static int highlander_i2c_probe(struct p + i2c_set_adapdata(adap, dev); + adap->owner = THIS_MODULE; + adap->class = I2C_CLASS_HWMON; +- strlcpy(adap->name, "HL FPGA I2C adapter", sizeof(adap->name)); ++ strscpy(adap->name, "HL FPGA I2C adapter", sizeof(adap->name)); + adap->algo = &highlander_i2c_algo; + adap->dev.parent = &pdev->dev; + adap->nr = pdev->id; +--- a/drivers/i2c/busses/i2c-hix5hd2.c ++++ b/drivers/i2c/busses/i2c-hix5hd2.c +@@ -423,7 +423,7 @@ static int hix5hd2_i2c_probe(struct plat + } + clk_prepare_enable(priv->clk); + +- strlcpy(priv->adap.name, "hix5hd2-i2c", sizeof(priv->adap.name)); ++ strscpy(priv->adap.name, "hix5hd2-i2c", sizeof(priv->adap.name)); + priv->dev = &pdev->dev; + priv->adap.owner = THIS_MODULE; + priv->adap.algo = &hix5hd2_i2c_algorithm; +--- a/drivers/i2c/busses/i2c-i801.c ++++ b/drivers/i2c/busses/i2c-i801.c +@@ -1111,7 +1111,7 @@ static void dmi_check_onboard_device(u8 + + memset(&info, 0, sizeof(struct i2c_board_info)); + info.addr = dmi_devices[i].i2c_addr; +- strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE); ++ strscpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE); + i2c_new_client_device(adap, &info); + break; + } +@@ -1267,7 +1267,7 @@ static void register_dell_lis3lv02d_i2c_ + + memset(&info, 0, sizeof(struct i2c_board_info)); + info.addr = dell_lis3lv02d_devices[i].i2c_addr; +- strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE); ++ strscpy(info.type, "lis3lv02d", I2C_NAME_SIZE); + i2c_new_client_device(&priv->adapter, &info); + } + +--- a/drivers/i2c/busses/i2c-ibm_iic.c ++++ b/drivers/i2c/busses/i2c-ibm_iic.c +@@ -738,7 +738,7 @@ static int iic_probe(struct platform_dev + adap = &dev->adap; + adap->dev.parent = &ofdev->dev; + adap->dev.of_node = of_node_get(np); +- strlcpy(adap->name, "IBM IIC", sizeof(adap->name)); ++ strscpy(adap->name, "IBM IIC", sizeof(adap->name)); + i2c_set_adapdata(adap, dev); + adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + adap->algo = &iic_algo; +--- a/drivers/i2c/busses/i2c-icy.c ++++ b/drivers/i2c/busses/i2c-icy.c +@@ -141,7 +141,7 @@ static int icy_probe(struct zorro_dev *z + i2c->adapter.owner = THIS_MODULE; + /* i2c->adapter.algo assigned by i2c_pcf_add_bus() */ + i2c->adapter.algo_data = algo_data; +- strlcpy(i2c->adapter.name, "ICY I2C Zorro adapter", ++ strscpy(i2c->adapter.name, "ICY I2C Zorro adapter", + sizeof(i2c->adapter.name)); + + if (!devm_request_mem_region(&z->dev, +--- a/drivers/i2c/busses/i2c-imx-lpi2c.c ++++ b/drivers/i2c/busses/i2c-imx-lpi2c.c +@@ -564,7 +564,7 @@ static int lpi2c_imx_probe(struct platfo + lpi2c_imx->adapter.algo = &lpi2c_imx_algo; + lpi2c_imx->adapter.dev.parent = &pdev->dev; + lpi2c_imx->adapter.dev.of_node = pdev->dev.of_node; +- strlcpy(lpi2c_imx->adapter.name, pdev->name, ++ strscpy(lpi2c_imx->adapter.name, pdev->name, + sizeof(lpi2c_imx->adapter.name)); + + lpi2c_imx->clk = devm_clk_get(&pdev->dev, NULL); +--- a/drivers/i2c/busses/i2c-lpc2k.c ++++ b/drivers/i2c/busses/i2c-lpc2k.c +@@ -417,7 +417,7 @@ static int i2c_lpc2k_probe(struct platfo + + i2c_set_adapdata(&i2c->adap, i2c); + i2c->adap.owner = THIS_MODULE; +- strlcpy(i2c->adap.name, "LPC2K I2C adapter", sizeof(i2c->adap.name)); ++ strscpy(i2c->adap.name, "LPC2K I2C adapter", sizeof(i2c->adap.name)); + i2c->adap.algo = &i2c_lpc2k_algorithm; + i2c->adap.dev.parent = &pdev->dev; + i2c->adap.dev.of_node = pdev->dev.of_node; +--- a/drivers/i2c/busses/i2c-meson.c ++++ b/drivers/i2c/busses/i2c-meson.c +@@ -451,7 +451,7 @@ static int meson_i2c_probe(struct platfo + return ret; + } + +- strlcpy(i2c->adap.name, "Meson I2C adapter", ++ strscpy(i2c->adap.name, "Meson I2C adapter", + sizeof(i2c->adap.name)); + i2c->adap.owner = THIS_MODULE; + i2c->adap.algo = &meson_i2c_algorithm; +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -1432,7 +1432,7 @@ static int mtk_i2c_probe(struct platform + speed_clk = I2C_MT65XX_CLK_MAIN; + } + +- strlcpy(i2c->adap.name, I2C_DRV_NAME, sizeof(i2c->adap.name)); ++ strscpy(i2c->adap.name, I2C_DRV_NAME, sizeof(i2c->adap.name)); + + ret = mtk_i2c_set_speed(i2c, clk_get_rate(i2c->clocks[speed_clk].clk)); + if (ret) { +--- a/drivers/i2c/busses/i2c-mt7621.c ++++ b/drivers/i2c/busses/i2c-mt7621.c +@@ -315,7 +315,7 @@ static int mtk_i2c_probe(struct platform + adap->dev.parent = &pdev->dev; + i2c_set_adapdata(adap, i2c); + adap->dev.of_node = pdev->dev.of_node; +- strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name)); ++ strscpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name)); + + platform_set_drvdata(pdev, i2c); + +--- a/drivers/i2c/busses/i2c-mv64xxx.c ++++ b/drivers/i2c/busses/i2c-mv64xxx.c +@@ -989,7 +989,7 @@ mv64xxx_i2c_probe(struct platform_device + if (IS_ERR(drv_data->reg_base)) + return PTR_ERR(drv_data->reg_base); + +- strlcpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter", ++ strscpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter", + sizeof(drv_data->adapter.name)); + + init_waitqueue_head(&drv_data->waitq); +--- a/drivers/i2c/busses/i2c-mxs.c ++++ b/drivers/i2c/busses/i2c-mxs.c +@@ -838,7 +838,7 @@ static int mxs_i2c_probe(struct platform + return err; + + adap = &i2c->adapter; +- strlcpy(adap->name, "MXS I2C adapter", sizeof(adap->name)); ++ strscpy(adap->name, "MXS I2C adapter", sizeof(adap->name)); + adap->owner = THIS_MODULE; + adap->algo = &mxs_i2c_algo; + adap->quirks = &mxs_i2c_quirks; +--- a/drivers/i2c/busses/i2c-nvidia-gpu.c ++++ b/drivers/i2c/busses/i2c-nvidia-gpu.c +@@ -319,7 +319,7 @@ static int gpu_i2c_probe(struct pci_dev + + i2c_set_adapdata(&i2cd->adapter, i2cd); + i2cd->adapter.owner = THIS_MODULE; +- strlcpy(i2cd->adapter.name, "NVIDIA GPU I2C adapter", ++ strscpy(i2cd->adapter.name, "NVIDIA GPU I2C adapter", + sizeof(i2cd->adapter.name)); + i2cd->adapter.algo = &gpu_i2c_algorithm; + i2cd->adapter.quirks = &gpu_i2c_quirks; +--- a/drivers/i2c/busses/i2c-omap.c ++++ b/drivers/i2c/busses/i2c-omap.c +@@ -1488,7 +1488,7 @@ omap_i2c_probe(struct platform_device *p + i2c_set_adapdata(adap, omap); + adap->owner = THIS_MODULE; + adap->class = I2C_CLASS_DEPRECATED; +- strlcpy(adap->name, "OMAP I2C adapter", sizeof(adap->name)); ++ strscpy(adap->name, "OMAP I2C adapter", sizeof(adap->name)); + adap->algo = &omap_i2c_algo; + adap->quirks = &omap_i2c_quirks; + adap->dev.parent = &pdev->dev; +--- a/drivers/i2c/busses/i2c-opal.c ++++ b/drivers/i2c/busses/i2c-opal.c +@@ -220,9 +220,9 @@ static int i2c_opal_probe(struct platfor + adapter->dev.of_node = of_node_get(pdev->dev.of_node); + pname = of_get_property(pdev->dev.of_node, "ibm,port-name", NULL); + if (pname) +- strlcpy(adapter->name, pname, sizeof(adapter->name)); ++ strscpy(adapter->name, pname, sizeof(adapter->name)); + else +- strlcpy(adapter->name, "opal", sizeof(adapter->name)); ++ strscpy(adapter->name, "opal", sizeof(adapter->name)); + + platform_set_drvdata(pdev, adapter); + rc = i2c_add_adapter(adapter); +--- a/drivers/i2c/busses/i2c-parport.c ++++ b/drivers/i2c/busses/i2c-parport.c +@@ -308,7 +308,7 @@ static void i2c_parport_attach(struct pa + /* Fill the rest of the structure */ + adapter->adapter.owner = THIS_MODULE; + adapter->adapter.class = I2C_CLASS_HWMON; +- strlcpy(adapter->adapter.name, "Parallel port adapter", ++ strscpy(adapter->adapter.name, "Parallel port adapter", + sizeof(adapter->adapter.name)); + adapter->algo_data = parport_algo_data; + /* Slow down if we can't sense SCL */ +--- a/drivers/i2c/busses/i2c-pxa.c ++++ b/drivers/i2c/busses/i2c-pxa.c +@@ -1403,7 +1403,7 @@ static int i2c_pxa_probe(struct platform + spin_lock_init(&i2c->lock); + init_waitqueue_head(&i2c->wait); + +- strlcpy(i2c->adap.name, "pxa_i2c-i2c", sizeof(i2c->adap.name)); ++ strscpy(i2c->adap.name, "pxa_i2c-i2c", sizeof(i2c->adap.name)); + + i2c->clk = devm_clk_get(&dev->dev, NULL); + if (IS_ERR(i2c->clk)) { +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -577,7 +577,7 @@ static int geni_i2c_probe(struct platfor + i2c_set_adapdata(&gi2c->adap, gi2c); + gi2c->adap.dev.parent = dev; + gi2c->adap.dev.of_node = dev->of_node; +- strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name)); ++ strscpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name)); + + ret = geni_icc_get(&gi2c->se, "qup-memory"); + if (ret) +--- a/drivers/i2c/busses/i2c-qup.c ++++ b/drivers/i2c/busses/i2c-qup.c +@@ -1878,7 +1878,7 @@ nodma: + qup->adap.dev.of_node = pdev->dev.of_node; + qup->is_last = true; + +- strlcpy(qup->adap.name, "QUP I2C adapter", sizeof(qup->adap.name)); ++ strscpy(qup->adap.name, "QUP I2C adapter", sizeof(qup->adap.name)); + + pm_runtime_set_autosuspend_delay(qup->dev, MSEC_PER_SEC); + pm_runtime_use_autosuspend(qup->dev); +--- a/drivers/i2c/busses/i2c-rcar.c ++++ b/drivers/i2c/busses/i2c-rcar.c +@@ -1059,7 +1059,7 @@ static int rcar_i2c_probe(struct platfor + adap->bus_recovery_info = &rcar_i2c_bri; + adap->quirks = &rcar_i2c_quirks; + i2c_set_adapdata(adap, priv); +- strlcpy(adap->name, pdev->name, sizeof(adap->name)); ++ strscpy(adap->name, pdev->name, sizeof(adap->name)); + + /* Init DMA */ + sg_init_table(&priv->sg, 1); +--- a/drivers/i2c/busses/i2c-riic.c ++++ b/drivers/i2c/busses/i2c-riic.c +@@ -447,7 +447,7 @@ static int riic_i2c_probe(struct platfor + + adap = &riic->adapter; + i2c_set_adapdata(adap, riic); +- strlcpy(adap->name, "Renesas RIIC adapter", sizeof(adap->name)); ++ strscpy(adap->name, "Renesas RIIC adapter", sizeof(adap->name)); + adap->owner = THIS_MODULE; + adap->algo = &riic_algo; + adap->dev.parent = &pdev->dev; +--- a/drivers/i2c/busses/i2c-rk3x.c ++++ b/drivers/i2c/busses/i2c-rk3x.c +@@ -1240,7 +1240,7 @@ static int rk3x_i2c_probe(struct platfor + /* use common interface to get I2C timing properties */ + i2c_parse_fw_timings(&pdev->dev, &i2c->t, true); + +- strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name)); ++ strscpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name)); + i2c->adap.owner = THIS_MODULE; + i2c->adap.algo = &rk3x_i2c_algorithm; + i2c->adap.retries = 3; +--- a/drivers/i2c/busses/i2c-s3c2410.c ++++ b/drivers/i2c/busses/i2c-s3c2410.c +@@ -1076,7 +1076,7 @@ static int s3c24xx_i2c_probe(struct plat + else + s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c); + +- strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); ++ strscpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); + i2c->adap.owner = THIS_MODULE; + i2c->adap.algo = &s3c24xx_i2c_algorithm; + i2c->adap.retries = 2; +--- a/drivers/i2c/busses/i2c-sh_mobile.c ++++ b/drivers/i2c/busses/i2c-sh_mobile.c +@@ -930,7 +930,7 @@ static int sh_mobile_i2c_probe(struct pl + adap->nr = dev->id; + adap->dev.of_node = dev->dev.of_node; + +- strlcpy(adap->name, dev->name, sizeof(adap->name)); ++ strscpy(adap->name, dev->name, sizeof(adap->name)); + + spin_lock_init(&pd->lock); + init_waitqueue_head(&pd->wait); +--- a/drivers/i2c/busses/i2c-simtec.c ++++ b/drivers/i2c/busses/i2c-simtec.c +@@ -99,7 +99,7 @@ static int simtec_i2c_probe(struct platf + pd->adap.algo_data = &pd->bit; + pd->adap.dev.parent = &dev->dev; + +- strlcpy(pd->adap.name, "Simtec I2C", sizeof(pd->adap.name)); ++ strscpy(pd->adap.name, "Simtec I2C", sizeof(pd->adap.name)); + + pd->bit.data = pd; + pd->bit.setsda = simtec_i2c_setsda; +--- a/drivers/i2c/busses/i2c-taos-evm.c ++++ b/drivers/i2c/busses/i2c-taos-evm.c +@@ -239,7 +239,7 @@ static int taos_connect(struct serio *se + dev_err(&serio->dev, "TAOS EVM identification failed\n"); + goto exit_close; + } +- strlcpy(adapter->name, name, sizeof(adapter->name)); ++ strscpy(adapter->name, name, sizeof(adapter->name)); + + /* Turn echo off for better performance */ + taos->state = TAOS_STATE_EOFF; +--- a/drivers/i2c/busses/i2c-tegra-bpmp.c ++++ b/drivers/i2c/busses/i2c-tegra-bpmp.c +@@ -305,7 +305,7 @@ static int tegra_bpmp_i2c_probe(struct p + + i2c_set_adapdata(&i2c->adapter, i2c); + i2c->adapter.owner = THIS_MODULE; +- strlcpy(i2c->adapter.name, "Tegra BPMP I2C adapter", ++ strscpy(i2c->adapter.name, "Tegra BPMP I2C adapter", + sizeof(i2c->adapter.name)); + i2c->adapter.algo = &tegra_bpmp_i2c_algo; + i2c->adapter.dev.parent = &pdev->dev; +--- a/drivers/i2c/busses/i2c-tegra.c ++++ b/drivers/i2c/busses/i2c-tegra.c +@@ -1799,7 +1799,7 @@ static int tegra_i2c_probe(struct platfo + if (i2c_dev->hw->supports_bus_clear) + i2c_dev->adapter.bus_recovery_info = &tegra_i2c_recovery_info; + +- strlcpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), ++ strscpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), + sizeof(i2c_dev->adapter.name)); + + err = i2c_add_numbered_adapter(&i2c_dev->adapter); +--- a/drivers/i2c/busses/i2c-uniphier-f.c ++++ b/drivers/i2c/busses/i2c-uniphier-f.c +@@ -564,7 +564,7 @@ static int uniphier_fi2c_probe(struct pl + priv->adap.algo = &uniphier_fi2c_algo; + priv->adap.dev.parent = dev; + priv->adap.dev.of_node = dev->of_node; +- strlcpy(priv->adap.name, "UniPhier FI2C", sizeof(priv->adap.name)); ++ strscpy(priv->adap.name, "UniPhier FI2C", sizeof(priv->adap.name)); + priv->adap.bus_recovery_info = &uniphier_fi2c_bus_recovery_info; + i2c_set_adapdata(&priv->adap, priv); + platform_set_drvdata(pdev, priv); +--- a/drivers/i2c/busses/i2c-uniphier.c ++++ b/drivers/i2c/busses/i2c-uniphier.c +@@ -358,7 +358,7 @@ static int uniphier_i2c_probe(struct pla + priv->adap.algo = &uniphier_i2c_algo; + priv->adap.dev.parent = dev; + priv->adap.dev.of_node = dev->of_node; +- strlcpy(priv->adap.name, "UniPhier I2C", sizeof(priv->adap.name)); ++ strscpy(priv->adap.name, "UniPhier I2C", sizeof(priv->adap.name)); + priv->adap.bus_recovery_info = &uniphier_i2c_bus_recovery_info; + i2c_set_adapdata(&priv->adap, priv); + platform_set_drvdata(pdev, priv); +--- a/drivers/i2c/busses/i2c-versatile.c ++++ b/drivers/i2c/busses/i2c-versatile.c +@@ -79,7 +79,7 @@ static int i2c_versatile_probe(struct pl + writel(SCL | SDA, i2c->base + I2C_CONTROLS); + + i2c->adap.owner = THIS_MODULE; +- strlcpy(i2c->adap.name, "Versatile I2C adapter", sizeof(i2c->adap.name)); ++ strscpy(i2c->adap.name, "Versatile I2C adapter", sizeof(i2c->adap.name)); + i2c->adap.algo_data = &i2c->algo; + i2c->adap.dev.parent = &dev->dev; + i2c->adap.dev.of_node = dev->dev.of_node; +--- a/drivers/i2c/busses/i2c-wmt.c ++++ b/drivers/i2c/busses/i2c-wmt.c +@@ -413,7 +413,7 @@ static int wmt_i2c_probe(struct platform + + adap = &i2c_dev->adapter; + i2c_set_adapdata(adap, i2c_dev); +- strlcpy(adap->name, "WMT I2C adapter", sizeof(adap->name)); ++ strscpy(adap->name, "WMT I2C adapter", sizeof(adap->name)); + adap->owner = THIS_MODULE; + adap->algo = &wmt_i2c_algo; + adap->dev.parent = &pdev->dev; diff --git a/target/linux/mediatek/patches-5.15/803-i2c-busses-add-mt7986-support.patch b/target/linux/mediatek/patches-5.15/851-v6.2-i2c-mediatek-add-mt7986-support.patch similarity index 54% rename from target/linux/mediatek/patches-5.15/803-i2c-busses-add-mt7986-support.patch rename to target/linux/mediatek/patches-5.15/851-v6.2-i2c-mediatek-add-mt7986-support.patch index 1860a6da01..4c398c59f9 100644 --- a/target/linux/mediatek/patches-5.15/803-i2c-busses-add-mt7986-support.patch +++ b/target/linux/mediatek/patches-5.15/851-v6.2-i2c-mediatek-add-mt7986-support.patch @@ -1,7 +1,21 @@ +From 11f9a0f4e51887ad7b4a2898a368fcd0c2984e89 Mon Sep 17 00:00:00 2001 +From: Frank Wunderlich +Date: Sun, 9 Oct 2022 12:16:31 +0200 +Subject: [PATCH 12/16] i2c: mediatek: add mt7986 support + +Add i2c support for MT7986 SoC. + +Signed-off-by: Frank Wunderlich +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c -@@ -365,6 +365,19 @@ static const struct mtk_i2c_compatible m - .max_dma_support = 32, +@@ -431,6 +431,19 @@ static const struct mtk_i2c_compatible m + .max_dma_support = 33, }; +static const struct mtk_i2c_compatible mt7986_compat = { @@ -11,20 +25,20 @@ + .dcm = 1, + .auto_restart = 1, + .aux_len_reg = 1, -+ .max_dma_support = 32, + .timing_adjust = 0, + .dma_sync = 1, + .ltiming_adjust = 0, ++ .max_dma_support = 32, +}; + static const struct mtk_i2c_compatible mt8173_compat = { .regs = mt_i2c_regs_v1, .pmic_i2c = 0, -@@ -411,6 +424,7 @@ static const struct of_device_id mtk_i2c +@@ -503,6 +516,7 @@ static const struct of_device_id mtk_i2c { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat }, { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat }, { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat }, + { .compatible = "mediatek,mt7986-i2c", .data = &mt7986_compat }, + { .compatible = "mediatek,mt8168-i2c", .data = &mt8168_compat }, { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat }, { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat }, - { .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat }, diff --git a/target/linux/mediatek/patches-5.15/852-v6.3-i2c-mt65xx-Use-devm_platform_get_and_ioremap_resourc.patch b/target/linux/mediatek/patches-5.15/852-v6.3-i2c-mt65xx-Use-devm_platform_get_and_ioremap_resourc.patch new file mode 100644 index 0000000000..18c66cdac5 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/852-v6.3-i2c-mt65xx-Use-devm_platform_get_and_ioremap_resourc.patch @@ -0,0 +1,42 @@ +From 98204ccafd45a8a6109ff2d60e2c179b95d92578 Mon Sep 17 00:00:00 2001 +From: ye xingchen +Date: Thu, 19 Jan 2023 17:19:58 +0800 +Subject: [PATCH 13/16] i2c: mt65xx: Use + devm_platform_get_and_ioremap_resource() + +Convert platform_get_resource(), devm_ioremap_resource() to a single +call to devm_platform_get_and_ioremap_resource(), as this is exactly +what this function does. + +Signed-off-by: ye xingchen +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -1366,20 +1366,17 @@ static int mtk_i2c_probe(struct platform + { + int ret = 0; + struct mtk_i2c *i2c; +- struct resource *res; + int i, irq, speed_clk; + + i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); + if (!i2c) + return -ENOMEM; + +- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- i2c->base = devm_ioremap_resource(&pdev->dev, res); ++ i2c->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); + if (IS_ERR(i2c->base)) + return PTR_ERR(i2c->base); + +- res = platform_get_resource(pdev, IORESOURCE_MEM, 1); +- i2c->pdmabase = devm_ioremap_resource(&pdev->dev, res); ++ i2c->pdmabase = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); + if (IS_ERR(i2c->pdmabase)) + return PTR_ERR(i2c->pdmabase); + diff --git a/target/linux/mediatek/patches-5.15/853-v6.3-i2c-mt65xx-drop-of_match_ptr-for-ID-table.patch b/target/linux/mediatek/patches-5.15/853-v6.3-i2c-mt65xx-drop-of_match_ptr-for-ID-table.patch new file mode 100644 index 0000000000..d000d53522 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/853-v6.3-i2c-mt65xx-drop-of_match_ptr-for-ID-table.patch @@ -0,0 +1,33 @@ +From 8106fa2e0ae6082833fe1df97829c46c0183eaea Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Sat, 11 Mar 2023 12:16:54 +0100 +Subject: [PATCH 14/16] i2c: mt65xx: drop of_match_ptr for ID table +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The driver can match only via the DT table so the table should be always +used and the of_match_ptr does not have any sense (this also allows ACPI +matching via PRP0001, even though it might not be relevant here). + + drivers/i2c/busses/i2c-mt65xx.c:514:34: error: ‘mtk_i2c_of_match’ defined but not used [-Werror=unused-const-variable=] + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Guenter Roeck +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -1546,7 +1546,7 @@ static struct platform_driver mtk_i2c_dr + .driver = { + .name = I2C_DRV_NAME, + .pm = &mtk_i2c_pm, +- .of_match_table = of_match_ptr(mtk_i2c_of_match), ++ .of_match_table = mtk_i2c_of_match, + }, + }; + diff --git a/target/linux/mediatek/patches-5.15/854-v6.4-i2c-mediatek-add-support-for-MT7981-SoC.patch b/target/linux/mediatek/patches-5.15/854-v6.4-i2c-mediatek-add-support-for-MT7981-SoC.patch new file mode 100644 index 0000000000..e0973741e2 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/854-v6.4-i2c-mediatek-add-support-for-MT7981-SoC.patch @@ -0,0 +1,47 @@ +From f69f3d662ba3bf999c36d9ac1e684540c4487bc3 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Mon, 10 Apr 2023 17:19:38 +0100 +Subject: [PATCH 15/16] i2c: mediatek: add support for MT7981 SoC + +Add support for the I2C units found in the MediaTek MT7981 and MT7988 +SoCs. Just like other recent MediaTek I2C units that also uses v3 +register offsets (which differ from v2 only by OFFSET_SLAVE_ADDR being +0x94 instead of 0x4). + +Signed-off-by: Daniel Golle +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: Alexandre Mergnat +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-mt65xx.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -431,6 +431,18 @@ static const struct mtk_i2c_compatible m + .max_dma_support = 33, + }; + ++static const struct mtk_i2c_compatible mt7981_compat = { ++ .regs = mt_i2c_regs_v3, ++ .pmic_i2c = 0, ++ .dcm = 0, ++ .auto_restart = 1, ++ .aux_len_reg = 1, ++ .timing_adjust = 1, ++ .dma_sync = 1, ++ .ltiming_adjust = 1, ++ .max_dma_support = 33 ++}; ++ + static const struct mtk_i2c_compatible mt7986_compat = { + .quirks = &mt7622_i2c_quirks, + .regs = mt_i2c_regs_v1, +@@ -516,6 +528,7 @@ static const struct of_device_id mtk_i2c + { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat }, + { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat }, + { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat }, ++ { .compatible = "mediatek,mt7981-i2c", .data = &mt7981_compat }, + { .compatible = "mediatek,mt7986-i2c", .data = &mt7986_compat }, + { .compatible = "mediatek,mt8168-i2c", .data = &mt8168_compat }, + { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat }, diff --git a/target/linux/mediatek/patches-5.15/855-pending-i2c-mt65xx-add-additional-clocks.patch b/target/linux/mediatek/patches-5.15/855-pending-i2c-mt65xx-add-additional-clocks.patch new file mode 100644 index 0000000000..1ed8d1a96a --- /dev/null +++ b/target/linux/mediatek/patches-5.15/855-pending-i2c-mt65xx-add-additional-clocks.patch @@ -0,0 +1,55 @@ +From 94bf61df9201195d6d8ce82e299fb231b31fbaae Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Fri, 26 May 2023 10:29:45 +0100 +Subject: [PATCH] i2c: mt65xx: add additional clocks + +On MT7981 additional clocks are required when accessing I2C registers. +Add MCK and PCK optional clocks to i2c-mt65xx driver so we don't have +to always have them enabled, but really only if I2C is used. + +Signed-off-by: Daniel Golle +--- + drivers/i2c/busses/i2c-mt65xx.c | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -93,6 +93,8 @@ + * @I2C_MT65XX_CLK_DMA: DMA clock for i2c via DMA + * @I2C_MT65XX_CLK_PMIC: PMIC clock for i2c from PMIC + * @I2C_MT65XX_CLK_ARB: Arbitrator clock for i2c ++ * @I2C_MT65XX_CLK_MCK: MCK clock for i2c ++ * @I2C_MT65XX_CLK_PCK: PCK clock for i2c + * @I2C_MT65XX_CLK_MAX: Number of supported clocks + */ + enum i2c_mt65xx_clks { +@@ -100,11 +102,13 @@ enum i2c_mt65xx_clks { + I2C_MT65XX_CLK_DMA, + I2C_MT65XX_CLK_PMIC, + I2C_MT65XX_CLK_ARB, ++ I2C_MT65XX_CLK_MCK, ++ I2C_MT65XX_CLK_PCK, + I2C_MT65XX_CLK_MAX + }; + + static const char * const i2c_mt65xx_clk_ids[I2C_MT65XX_CLK_MAX] = { +- "main", "dma", "pmic", "arb" ++ "main", "dma", "pmic", "arb", "mck", "pck" + }; + + enum DMA_REGS_OFFSET { +@@ -1444,6 +1448,14 @@ static int mtk_i2c_probe(struct platform + if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_ARB].clk)) + return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_ARB].clk); + ++ i2c->clocks[I2C_MT65XX_CLK_MCK].clk = devm_clk_get_optional(&pdev->dev, "mck"); ++ if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_MCK].clk)) ++ return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_MCK].clk); ++ ++ i2c->clocks[I2C_MT65XX_CLK_PCK].clk = devm_clk_get_optional(&pdev->dev, "pck"); ++ if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_PCK].clk)) ++ return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_PCK].clk); ++ + if (i2c->have_pmic) { + i2c->clocks[I2C_MT65XX_CLK_PMIC].clk = devm_clk_get(&pdev->dev, "pmic"); + if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_PMIC].clk)) { diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c index f3a81ee4e2..89cc7e2624 100644 --- a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c +++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c @@ -1006,7 +1006,7 @@ static int mt7621_nfc_read_page_hwecc(struct nand_chip *nand, uint8_t *buf, { struct mt7621_nfc *nfc = nand_get_controller_data(nand); struct mtd_info *mtd = nand_to_mtd(nand); - int bitflips = 0; + int bitflips = 0, ret = 0; int rc, i; nand_read_page_op(nand, page, 0, NULL, 0); @@ -1031,7 +1031,7 @@ static int mt7621_nfc_read_page_hwecc(struct nand_chip *nand, uint8_t *buf, mt7621_nfc_read_sector_fdm(nfc, i); if (rc < 0) { - bitflips = -EIO; + ret = -EIO; continue; } @@ -1043,10 +1043,11 @@ static int mt7621_nfc_read_page_hwecc(struct nand_chip *nand, uint8_t *buf, dev_dbg(nfc->dev, "Uncorrectable ECC error at page %d.%d\n", page, i); - bitflips = -EBADMSG; + bitflips = nand->ecc.strength + 1; mtd->ecc_stats.failed++; - } else if (bitflips >= 0) { - bitflips += rc; + } else { + if (rc > bitflips) + bitflips = rc; mtd->ecc_stats.corrected += rc; } } @@ -1055,6 +1056,9 @@ static int mt7621_nfc_read_page_hwecc(struct nand_chip *nand, uint8_t *buf, nfi_write16(nfc, NFI_CON, 0); + if (ret < 0) + return ret; + return bitflips; } diff --git a/target/linux/ramips/patches-5.15/100-PCI-mt7621-Add-MediaTek-MT7621-PCIe-host-controller-.patch b/target/linux/ramips/patches-5.15/100-v5.16-PCI-mt7621-Add-MediaTek-MT7621-PCIe-host-controller-.patch similarity index 100% rename from target/linux/ramips/patches-5.15/100-PCI-mt7621-Add-MediaTek-MT7621-PCIe-host-controller-.patch rename to target/linux/ramips/patches-5.15/100-v5.16-PCI-mt7621-Add-MediaTek-MT7621-PCIe-host-controller-.patch diff --git a/target/linux/ramips/patches-5.15/101-PCI-mt7621-Rename-mt7621_pci_-to-mt7621_pcie_.patch b/target/linux/ramips/patches-5.15/101-v5.17-PCI-mt7621-Rename-mt7621_pci_-to-mt7621_pcie_.patch similarity index 100% rename from target/linux/ramips/patches-5.15/101-PCI-mt7621-Rename-mt7621_pci_-to-mt7621_pcie_.patch rename to target/linux/ramips/patches-5.15/101-v5.17-PCI-mt7621-Rename-mt7621_pci_-to-mt7621_pcie_.patch diff --git a/target/linux/ramips/patches-5.15/102-PCI-mt7621-Declare-mt7621_pci_ops-static.patch b/target/linux/ramips/patches-5.15/102-v5.17-PCI-mt7621-Declare-mt7621_pci_ops-static.patch similarity index 100% rename from target/linux/ramips/patches-5.15/102-PCI-mt7621-Declare-mt7621_pci_ops-static.patch rename to target/linux/ramips/patches-5.15/102-v5.17-PCI-mt7621-Declare-mt7621_pci_ops-static.patch diff --git a/target/linux/ramips/patches-5.15/103-PCI-mt7621-Move-MIPS-setup-to-pcibios_root_bridge_pr.patch b/target/linux/ramips/patches-5.15/103-v5.17-PCI-mt7621-Move-MIPS-setup-to-pcibios_root_bridge_pr.patch similarity index 100% rename from target/linux/ramips/patches-5.15/103-PCI-mt7621-Move-MIPS-setup-to-pcibios_root_bridge_pr.patch rename to target/linux/ramips/patches-5.15/103-v5.17-PCI-mt7621-Move-MIPS-setup-to-pcibios_root_bridge_pr.patch diff --git a/target/linux/ramips/patches-5.15/104-PCI-mt7621-Drop-of_match_ptr-to-avoid-unused-variabl.patch b/target/linux/ramips/patches-5.15/104-v5.17-PCI-mt7621-Drop-of_match_ptr-to-avoid-unused-variabl.patch similarity index 100% rename from target/linux/ramips/patches-5.15/104-PCI-mt7621-Drop-of_match_ptr-to-avoid-unused-variabl.patch rename to target/linux/ramips/patches-5.15/104-v5.17-PCI-mt7621-Drop-of_match_ptr-to-avoid-unused-variabl.patch diff --git a/target/linux/ramips/patches-5.15/105-PCI-mt7621-Remove-unused-function-pcie_rmw.patch b/target/linux/ramips/patches-5.15/105-v5.17-PCI-mt7621-Remove-unused-function-pcie_rmw.patch similarity index 100% rename from target/linux/ramips/patches-5.15/105-PCI-mt7621-Remove-unused-function-pcie_rmw.patch rename to target/linux/ramips/patches-5.15/105-v5.17-PCI-mt7621-Remove-unused-function-pcie_rmw.patch diff --git a/target/linux/ramips/patches-5.15/106-PCI-Let-pcibios_root_bridge_prepare-access-bridge-wi.patch b/target/linux/ramips/patches-5.15/106-v5.17-PCI-Let-pcibios_root_bridge_prepare-access-bridge-wi.patch similarity index 100% rename from target/linux/ramips/patches-5.15/106-PCI-Let-pcibios_root_bridge_prepare-access-bridge-wi.patch rename to target/linux/ramips/patches-5.15/106-v5.17-PCI-Let-pcibios_root_bridge_prepare-access-bridge-wi.patch diff --git a/target/linux/ramips/patches-5.15/107-PCI-mt7621-Add-sentinel-to-quirks-table.patch b/target/linux/ramips/patches-5.15/107-v6.2-PCI-mt7621-Add-sentinel-to-quirks-table.patch similarity index 100% rename from target/linux/ramips/patches-5.15/107-PCI-mt7621-Add-sentinel-to-quirks-table.patch rename to target/linux/ramips/patches-5.15/107-v6.2-PCI-mt7621-Add-sentinel-to-quirks-table.patch diff --git a/target/linux/ramips/patches-5.15/108-PCI-mt7621-Delay-phy-ports-initialization.patch b/target/linux/ramips/patches-5.15/108-v6.3-PCI-mt7621-Delay-phy-ports-initialization.patch similarity index 100% rename from target/linux/ramips/patches-5.15/108-PCI-mt7621-Delay-phy-ports-initialization.patch rename to target/linux/ramips/patches-5.15/108-v6.3-PCI-mt7621-Delay-phy-ports-initialization.patch diff --git a/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch b/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch index a613803ee6..e57e6fa83b 100644 --- a/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch +++ b/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch @@ -14,7 +14,7 @@ Signed-off-by: René van Dorst --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4638,6 +4638,7 @@ static const struct net_device_ops mtk_n +@@ -4633,6 +4633,7 @@ static const struct net_device_ops mtk_n static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) { @@ -22,7 +22,7 @@ Signed-off-by: René van Dorst const __be32 *_id = of_get_property(np, "reg", NULL); phy_interface_t phy_mode; struct phylink *phylink; -@@ -4796,6 +4797,9 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4791,6 +4792,9 @@ static int mtk_add_mac(struct mtk_eth *e register_netdevice_notifier(&mac->device_notifier); } diff --git a/target/linux/realtek/patches-5.15/302-clocksource-add-otto-driver.patch b/target/linux/realtek/patches-5.15/302-clocksource-add-otto-driver.patch index 8f2f4c0c4a..63a5050ebb 100644 --- a/target/linux/realtek/patches-5.15/302-clocksource-add-otto-driver.patch +++ b/target/linux/realtek/patches-5.15/302-clocksource-add-otto-driver.patch @@ -83,7 +83,7 @@ Signed-off-by: Sander Vanheule obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h -@@ -177,6 +177,7 @@ enum cpuhp_state { +@@ -176,6 +176,7 @@ enum cpuhp_state { CPUHP_AP_MARCO_TIMER_STARTING, CPUHP_AP_MIPS_GIC_TIMER_STARTING, CPUHP_AP_ARC_TIMER_STARTING, diff --git a/target/linux/x86/base-files/etc/board.d/01_leds b/target/linux/x86/base-files/etc/board.d/01_leds index e41c78e62b..efc5460df3 100644 --- a/target/linux/x86/base-files/etc/board.d/01_leds +++ b/target/linux/x86/base-files/etc/board.d/01_leds @@ -19,7 +19,7 @@ pc-engines-apu1|pc-engines-apu2|pc-engines-apu3|pc-engines-apu4|pc-engines-apu5| sophos-sg-105wr1|sophos-sg-125wr1|sophos-sg-135wr1|sophos-xg-105wr1|sophos-xg-125wr1|sophos-xg-135wr1) ucidef_set_led_netdev "wlan" "WiFi" "ath9k-phy0" "phy0tpt" ;; -sophos-sg-105wr2|sophos-sg-125wr2|sophos-sg-135wr2|sophos-xg-105wr2|sophos-xg-125wr2|sophos-xg-135wr2| +sophos-sg-105wr2|sophos-sg-125wr2|sophos-sg-135wr2|sophos-xg-105wr2|sophos-xg-125wr2|sophos-xg-135wr2|\ sophos-sg-105wr3|sophos-sg-125wr3|sophos-sg-135wr3|sophos-xg-105wr3|sophos-xg-125wr3|sophos-xg-135wr3) ucidef_set_led_netdev "wlan" "WiFi" "ath10k-phy0" "phy0tpt" ;; diff --git a/target/linux/x86/config-5.15 b/target/linux/x86/config-5.15 index bc38b6bc70..53719a793a 100644 --- a/target/linux/x86/config-5.15 +++ b/target/linux/x86/config-5.15 @@ -419,6 +419,7 @@ CONFIG_X86_MSR=y CONFIG_X86_PAT=y CONFIG_X86_PLATFORM_DEVICES=y # CONFIG_X86_PLATFORM_DRIVERS_DELL is not set +# CONFIG_X86_PLATFORM_DRIVERS_HP is not set # CONFIG_X86_POWERNOW_K6 is not set # CONFIG_X86_POWERNOW_K7 is not set # CONFIG_X86_REBOOTFIXUPS is not set diff --git a/target/linux/x86/patches-5.15/103-pcengines_apu6_platform.patch b/target/linux/x86/patches-5.15/103-pcengines_apu6_platform.patch index 03cb33acbf..9ec0a33c31 100644 --- a/target/linux/x86/patches-5.15/103-pcengines_apu6_platform.patch +++ b/target/linux/x86/patches-5.15/103-pcengines_apu6_platform.patch @@ -63,7 +63,7 @@ Sighed-off-by: Philip Prindeville --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig -@@ -701,7 +701,7 @@ config XO1_RFKILL +@@ -661,7 +661,7 @@ config XO1_RFKILL laptop. config PCENGINES_APU2 @@ -72,7 +72,7 @@ Sighed-off-by: Philip Prindeville depends on INPUT && INPUT_KEYBOARD && GPIOLIB depends on LEDS_CLASS select GPIO_AMD_FCH -@@ -709,7 +709,7 @@ config PCENGINES_APU2 +@@ -669,7 +669,7 @@ config PCENGINES_APU2 select LEDS_GPIO help This driver provides support for the front button and LEDs on