From 1151a336eece9441dde2a8379b4bc4c9ac9c5337 Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Wed, 30 Aug 2023 18:41:39 +0800 Subject: [PATCH] mediatek: add CMCC RAX3000M NAND version support Signed-off-by: Tianling Shen (cherry picked from commit 5078ac877739ae31ee175947f873a720cb24ad02) --- .../mt7981b-cmcc-rax3000m-nand-ubootmod.dts | 246 ++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 1 + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 3 + target/linux/mediatek/image/filogic.mk | 22 ++ 4 files changed, 272 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts new file mode 100644 index 0000000000..e515658aa4 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include + +#include "mt7981.dtsi" + +/ { + model = "CMCC RAX3000M NAND version (custom U-Boot layout)"; + compatible = "cmcc,rax3000m-nand-ubootmod", "mediatek,mt7981"; + + aliases { + led-boot = &red_led; + led-failsafe = &red_led; + led-running = &green_led; + led-upgrade = &green_led; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x10000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + button-mesh { + label = "mesh"; + linux,code = ; + linux,input-type = ; + gpios = <&pio 0 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + green_led: led-0 { + label = "green:status"; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + + led-1 { + label = "blue:status"; + gpios = <&pio 12 GPIO_ACTIVE_LOW>; + }; + + red_led: led-2 { + label = "red:status"; + gpios = <&pio 35 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + nvmem-cells = <&macaddr_factory_2a>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&int_gbe_phy>; + + nvmem-cells = <&macaddr_factory_24>; + nvmem-cell-names = "mac-address"; + }; +}; + +&mdio_bus { + switch: switch@0 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + partitions: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x00000 0x100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x100000 0x80000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x180000 0x200000>; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_24: macaddr@24 { + reg = <0x24 0x6>; + }; + + macaddr_factory_2a: macaddr@2a { + reg = <0x2a 0x6>; + }; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x200000>; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0x7200000>; + }; + }; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan3"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan1"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = ; + bias-pull-up = ; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = ; + bias-pull-down = ; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; + +&xhci { + status = "okay"; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 0c10e2ce95..0b82b5fde3 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -33,6 +33,7 @@ mediatek_setup_interfaces() glinet,gl-mt3000) ucidef_set_interfaces_lan_wan eth1 eth0 ;; + cmcc,rax3000m-nand-ubootmod|\ h3c,magic-nx30-pro|\ h3c,magic-nx30-pro-nmbm|\ imou,lc-hx3001-ubootmod) diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index b928f6c2d5..3759ef3fe8 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -35,6 +35,9 @@ case "$board" in [ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress ;; + cmcc,rax3000m-nand-ubootmod) + [ "$PHYNBR" = "1" ] && mtd_get_mac_binary Factory 0xa > /sys${DEVPATH}/macaddress + ;; cudy,wr3000-v1) addr=$(mtd_get_mac_binary bdinfo 0xde00) # Originally, phy0 is phy1 mac with LA bit set. However, this would conflict diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 30fb66733f..5d6f3c6156 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -185,6 +185,28 @@ define Device/cetron_ct3003-ubootmod endef TARGET_DEVICES += cetron_ct3003-ubootmod +define Device/cmcc_rax3000m-nand-ubootmod + DEVICE_VENDOR := CMCC + DEVICE_MODEL := RAX3000M NAND version (custom U-Boot layout) + DEVICE_DTS := mt7981b-cmcc-rax3000m-nand-ubootmod + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware \ + kmod-usb3 automount + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 116736k + KERNEL_IN_UBI := 1 + IMAGES += factory.bin + IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + KERNEL = kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb + KERNEL_INITRAMFS = kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd +endef +TARGET_DEVICES += cmcc_rax3000m-nand-ubootmod + define Device/cudy_wr3000-v1 DEVICE_VENDOR := Cudy DEVICE_MODEL := WR3000