From 13ad229155925db097cb952e91430f31335bd512 Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Fri, 28 Apr 2023 12:37:07 +0800
Subject: [PATCH] uboot-rockchip: update fastrhino dts

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
 .../arch/arm/dts/rk3568-fastrhino-r66s.dtsi   | 13 ++++------
 .../arch/arm/dts/rk3568-fastrhino-r68s.dts    | 24 +++++++++----------
 .../dts/rockchip/rk3568-fastrhino-r66s.dtsi   |  6 +++--
 .../dts/rockchip/rk3568-fastrhino-r68s.dts    |  6 ++---
 4 files changed, 21 insertions(+), 28 deletions(-)

diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi
index 2fc53a2acf..41c713eb4a 100644
--- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi
+++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi
@@ -9,13 +9,6 @@
 #include "rk3568.dtsi"
 
 / {
-	aliases {
-		led-boot = &status_led;
-		led-failsafe = &status_led;
-		led-running = &status_led;
-		led-upgrade = &status_led;
-	};
-
 	chosen: chosen {
 		stdout-path = "serial2:1500000n8";
 	};
@@ -39,7 +32,9 @@
 		pinctrl-0 = <&status_led_pin>;
 
 		status_led: led-status {
-			label = "blue:status";
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+			linux,default-trigger = "heartbeat";
 			gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -394,7 +389,7 @@
 	};
 
 	pmic {
-		pmic_int: pmic_int {
+		pmic_int: pmic-int {
 			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts
index ddc9b6cd4e..6e972796f6 100644
--- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts
+++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-#include "rk3568-fastrhino-r6xs.dtsi"
+#include "rk3568-fastrhino-r66s.dtsi"
 
 / {
 	model = "Lunzn FastRhino R68S";
@@ -9,8 +9,6 @@
 	aliases {
 		ethernet0 = &gmac0;
 		ethernet1 = &gmac1;
-		ethernet2 = &rtl8125_1;
-		ethernet3 = &rtl8125_2;
 		mmc0 = &sdhci;
 	};
 
@@ -41,6 +39,10 @@
 		     &gmac0_rx_bus2
 		     &gmac0_rgmii_clk
 		     &gmac0_rgmii_bus>;
+	snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 15ms, 50ms for rtl8211f */
+	snps,reset-delays-us = <0 15000 50000>;
 	tx_delay = <0x3c>;
 	rx_delay = <0x2f>;
 	status = "okay";
@@ -59,6 +61,10 @@
 		     &gmac1m1_rx_bus2
 		     &gmac1m1_rgmii_clk
 		     &gmac1m1_rgmii_bus>;
+	snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 15ms, 50ms for rtl8211f */
+	snps,reset-delays-us = <0 15000 50000>;
 	tx_delay = <0x4f>;
 	rx_delay = <0x26>;
 	status = "okay";
@@ -66,27 +72,19 @@
 
 &mdio0 {
 	rgmii_phy0: ethernet-phy@0 {
-		compatible = "ethernet-phy-id001c.c916",
-			     "ethernet-phy-ieee802.3-c22";
+		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <0>;
 		pinctrl-0 = <&eth_phy0_reset_pin>;
 		pinctrl-names = "default";
-		reset-assert-us = <10000>;
-		reset-deassert-us = <50000>;
-		reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
 	};
 };
 
 &mdio1 {
 	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-id001c.c916",
-			     "ethernet-phy-ieee802.3-c22";
+		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <0>;
 		pinctrl-0 = <&eth_phy1_reset_pin>;
 		pinctrl-names = "default";
-		reset-assert-us = <10000>;
-		reset-deassert-us = <50000>;
-		reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
 	};
 };
 
diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi
index 8bef725575..4260facf4d 100644
--- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi
+++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi
@@ -39,7 +39,9 @@
 		pinctrl-0 = <&status_led_pin>;
 
 		status_led: led-status {
-			label = "blue:status";
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+			linux,default-trigger = "heartbeat";
 			gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -394,7 +396,7 @@
 	};
 
 	pmic {
-		pmic_int: pmic_int {
+		pmic_int: pmic-int {
 			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts
index 06cf7a43a0..6e972796f6 100644
--- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts
+++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts
@@ -72,8 +72,7 @@
 
 &mdio0 {
 	rgmii_phy0: ethernet-phy@0 {
-		compatible = "ethernet-phy-id001c.c916",
-			     "ethernet-phy-ieee802.3-c22";
+		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <0>;
 		pinctrl-0 = <&eth_phy0_reset_pin>;
 		pinctrl-names = "default";
@@ -82,8 +81,7 @@
 
 &mdio1 {
 	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-id001c.c916",
-			     "ethernet-phy-ieee802.3-c22";
+		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <0>;
 		pinctrl-0 = <&eth_phy1_reset_pin>;
 		pinctrl-names = "default";