diff --git a/target/linux/rockchip/patches-5.15/027-v6.8-arm64-dts-rockchip-configure-eth-pad-driver-strength-for-.patch b/target/linux/rockchip/patches-5.15/027-v6.8-arm64-dts-rockchip-configure-eth-pad-driver-strength-for-.patch new file mode 100644 index 0000000000..01efaa3a9d --- /dev/null +++ b/target/linux/rockchip/patches-5.15/027-v6.8-arm64-dts-rockchip-configure-eth-pad-driver-strength-for-.patch @@ -0,0 +1,33 @@ +From fc5a80a432607d05e85bba37971712405f75c546 Mon Sep 17 00:00:00 2001 +From: Tianling Shen +Date: Sat, 16 Dec 2023 12:07:23 +0800 +Subject: [PATCH] arm64: dts: rockchip: configure eth pad driver strength + for orangepi r1 plus lts + +The default strength is not enough to provide stable connection +under 3.3v LDO voltage. + +Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS") +Cc: stable@vger.kernel.org # 6.6+ +Signed-off-by: Tianling Shen +Link: https://lore.kernel.org/r/20231216040723.17864-1-cnsztl@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +@@ -26,9 +26,11 @@ + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + ++ motorcomm,auto-sleep-disabled; + motorcomm,clk-out-frequency-hz = <125000000>; + motorcomm,keep-pll-enabled; +- motorcomm,auto-sleep-disabled; ++ motorcomm,rx-clk-drv-microamp = <5020>; ++ motorcomm,rx-data-drv-microamp = <5020>; + + pinctrl-0 = <ð_phy_reset_pin>; + pinctrl-names = "default"; diff --git a/target/linux/rockchip/patches-5.15/108-fix-io-power-domain-for-orangepi-r1-plus-lts.patch b/target/linux/rockchip/patches-5.15/108-fix-io-power-domain-for-orangepi-r1-plus-lts.patch deleted file mode 100644 index aac8310121..0000000000 --- a/target/linux/rockchip/patches-5.15/108-fix-io-power-domain-for-orangepi-r1-plus-lts.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -38,3 +38,7 @@ - }; - }; - }; -+ -+&io_domains { -+ vccio4-supply = <&vcc_18>; -+}; diff --git a/target/linux/rockchip/patches-5.15/610-arm64-rockchip-add-OF-node-for-eth.patch b/target/linux/rockchip/patches-5.15/610-arm64-rockchip-add-OF-node-for-eth.patch index cb254d2e85..798f29a7cf 100644 --- a/target/linux/rockchip/patches-5.15/610-arm64-rockchip-add-OF-node-for-eth.patch +++ b/target/linux/rockchip/patches-5.15/610-arm64-rockchip-add-OF-node-for-eth.patch @@ -64,17 +64,17 @@ Signed-off-by: David Bauer --- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -29,6 +29,7 @@ - motorcomm,clk-out-frequency-hz = <125000000>; +@@ -31,6 +31,7 @@ motorcomm,keep-pll-enabled; - motorcomm,auto-sleep-disabled; + motorcomm,rx-clk-drv-microamp = <5020>; + motorcomm,rx-data-drv-microamp = <5020>; + motorcomm,led-data = <0xe004 0x0 0x2600 0x0070 0x000a>; pinctrl-0 = <ð_phy_reset_pin>; pinctrl-names = "default"; -@@ -42,3 +43,7 @@ - &io_domains { - vccio4-supply = <&vcc_18>; +@@ -40,3 +41,7 @@ + }; + }; }; + +&rtl8153 {