sunxi: backport h616 thermal sensor support
Backport H616 thermal sensor support from linux-next. Tested on the Orange Pi Zero 3 (H618 SoC). Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
This commit is contained in:
Chukun Pan
Tianling Shen
parent
95f1ad1126
commit
15450525b3
@ -1,47 +1,39 @@
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From 898d96c5464b69af44f6407c5de81ebc349d574b Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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To: Vasily Khoruzhick <anarsoul@gmail.com>,
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Yangtao Li <tiny.windzz@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
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Jernej Skrabec <jernej.skrabec@gmail.com>,
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Samuel Holland <samuel@sholland.org>
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Cc: "Rafael J . Wysocki" <rafael@kernel.org>,
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Daniel Lezcano <daniel.lezcano@linaro.org>,
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Zhang Rui <rui.zhang@intel.com>,
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Lukasz Luba <lukasz.luba@arm.com>,
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Rob Herring <robh+dt@kernel.org>,
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Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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Conor Dooley <conor+dt@kernel.org>,
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Martin Botka <martin.botka@somainline.org>,
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Maksim Kiselev <bigunclemax@gmail.com>,
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Bob McChesney <bob@electricworry.net>,
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linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
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linux-arm-kernel@lists.infradead.org,
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linux-sunxi@lists.linux.dev
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Subject: [PATCH v4 1/7] soc: sunxi: sram: export register 0 for THS on H616
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Date: Fri, 9 Feb 2024 14:42:15 +0000 [thread overview]
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Message-ID: <20240209144221.3602382-2-andre.przywara@arm.com> (raw)
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In-Reply-To: <20240209144221.3602382-1-andre.przywara@arm.com>
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Date: Mon, 19 Feb 2024 15:36:33 +0000
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Subject: [PATCH] soc: sunxi: sram: export register 0 for THS on H616
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The Allwinner H616 SoC contains a mysterious bit at register offset 0x0
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in the SRAM control block. If bit 16 is set (the reset value), the
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temperature readings of the THS are way off, leading to reports about
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200C, at normal ambient temperatures. Clearing this bits brings the
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reported values down to reasonable ranges.
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reported values down to the expected values.
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The BSP code clears this bit in firmware (U-Boot), and has an explicit
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comment about this, but offers no real explanation.
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Experiments in U-Boot show that register 0x0 has no effect on the SRAM C
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visibility: all tested bit settings still allow full read and write
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access by the CPU to the whole of SRAM C. Only bit 24 of the register at
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offset 0x4 makes all of SRAM C inaccessible by the CPU. So modelling
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the THS switch functionality as an SRAM region would not reflect reality.
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Since we should not rely on firmware settings, allow other code (the THS
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driver) to access this register, by exporting it through the already
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existing regmap. This mimics what we already do for the LDO control and
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the EMAC register.
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Since this bit is in the very same register as the actual SRAM switch,
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we need to change the regmap lock to the SRAM lock. Fortunately regmap
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has provisions for that, so we just need to hook in there.
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To avoid concurrent accesses to the same register at the same time, by
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the SRAM switch code and the regmap code, use the same lock to protect
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the access. The regmap subsystem allows to use an existing lock, so we
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just need to hook in there.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Link: https://lore.kernel.org/r/20240219153639.179814-2-andre.przywara@arm.com
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---
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drivers/soc/sunxi/sunxi_sram.c | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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drivers/soc/sunxi/sunxi_sram.c | 22 ++++++++++++++++++++++
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1 file changed, 22 insertions(+)
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--- a/drivers/soc/sunxi/sunxi_sram.c
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+++ b/drivers/soc/sunxi/sunxi_sram.c
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@ -73,11 +65,10 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG &&
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reg < SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4)
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return true;
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@@ -324,6 +329,21 @@ static bool sunxi_sram_regmap_accessible
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@@ -324,6 +329,20 @@ static bool sunxi_sram_regmap_accessible
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return false;
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}
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+
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+static void sunxi_sram_lock(void *_lock)
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+{
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+ spinlock_t *lock = _lock;
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@ -95,7 +86,7 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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static struct regmap_config sunxi_sram_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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@@ -333,6 +353,9 @@ static struct regmap_config sunxi_sram_r
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@@ -333,6 +352,9 @@ static struct regmap_config sunxi_sram_r
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/* other devices have no business accessing other registers */
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.readable_reg = sunxi_sram_regmap_accessible_reg,
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.writeable_reg = sunxi_sram_regmap_accessible_reg,
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@ -0,0 +1,47 @@
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From ebbf19e36d021f253425344b4d4b987f3b7d9be5 Mon Sep 17 00:00:00 2001
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From: Maxim Kiselev <bigunclemax@gmail.com>
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Date: Mon, 18 Dec 2023 00:06:23 +0300
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Subject: [PATCH] thermal/drivers/sun8i: Add D1/T113s THS controller support
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This patch adds a thermal sensor controller support for the D1/T113s,
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which is similar to the one on H6, but with only one sensor and
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different scale and offset values.
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Signed-off-by: Maxim Kiselev <bigunclemax@gmail.com>
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Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Link: https://lore.kernel.org/r/20231217210629.131486-3-bigunclemax@gmail.com
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---
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drivers/thermal/sun8i_thermal.c | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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--- a/drivers/thermal/sun8i_thermal.c
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+++ b/drivers/thermal/sun8i_thermal.c
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@@ -610,6 +610,18 @@ static const struct ths_thermal_chip sun
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.calc_temp = sun8i_ths_calc_temp,
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};
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+static const struct ths_thermal_chip sun20i_d1_ths = {
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+ .sensor_num = 1,
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+ .has_bus_clk_reset = true,
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+ .offset = 188552,
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+ .scale = 673,
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+ .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
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+ .calibrate = sun50i_h6_ths_calibrate,
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+ .init = sun50i_h6_thermal_init,
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+ .irq_ack = sun50i_h6_irq_ack,
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+ .calc_temp = sun8i_ths_calc_temp,
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+};
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+
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static const struct of_device_id of_ths_match[] = {
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{ .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
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{ .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
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@@ -618,6 +630,7 @@ static const struct of_device_id of_ths_
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{ .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths },
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{ .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths },
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{ .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },
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+ { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, of_ths_match);
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@ -1,25 +1,7 @@
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From 14f118aa50fe7c7c7330f56d007ecacca487cea8 Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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To: Vasily Khoruzhick <anarsoul@gmail.com>,
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Yangtao Li <tiny.windzz@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
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Jernej Skrabec <jernej.skrabec@gmail.com>,
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Samuel Holland <samuel@sholland.org>
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Cc: "Rafael J . Wysocki" <rafael@kernel.org>,
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Daniel Lezcano <daniel.lezcano@linaro.org>,
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Zhang Rui <rui.zhang@intel.com>,
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Lukasz Luba <lukasz.luba@arm.com>,
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Rob Herring <robh+dt@kernel.org>,
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Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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Conor Dooley <conor+dt@kernel.org>,
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Martin Botka <martin.botka@somainline.org>,
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Maksim Kiselev <bigunclemax@gmail.com>,
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Bob McChesney <bob@electricworry.net>,
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linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
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linux-arm-kernel@lists.infradead.org,
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linux-sunxi@lists.linux.dev
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Subject: [PATCH v4 3/7] thermal: sun8i: explain unknown H6 register value
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Date: Fri, 9 Feb 2024 14:42:17 +0000 [thread overview]
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Message-ID: <20240209144221.3602382-4-andre.przywara@arm.com> (raw)
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In-Reply-To: <20240209144221.3602382-1-andre.przywara@arm.com>
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Date: Mon, 19 Feb 2024 15:36:35 +0000
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Subject: [PATCH] thermal/drivers/sun8i: Explain unknown H6 register value
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So far we were ORing in some "unknown" value into the THS control
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register on the Allwinner H6. This part of the register is not explained
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@ -35,6 +17,10 @@ according to its explanation in the H616 manual.
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No functional change, just a macro rename and adjustment.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Link: https://lore.kernel.org/r/20240219153639.179814-4-andre.przywara@arm.com
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---
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drivers/thermal/sun8i_thermal.c | 29 ++++++++++++++++-------------
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1 file changed, 16 insertions(+), 13 deletions(-)
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@ -1,27 +1,8 @@
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From: Andre Przywara <andre.przywara@arm.com>
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To: Vasily Khoruzhick <anarsoul@gmail.com>,
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Yangtao Li <tiny.windzz@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
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Jernej Skrabec <jernej.skrabec@gmail.com>,
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Samuel Holland <samuel@sholland.org>
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Cc: "Rafael J . Wysocki" <rafael@kernel.org>,
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Daniel Lezcano <daniel.lezcano@linaro.org>,
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Zhang Rui <rui.zhang@intel.com>,
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Lukasz Luba <lukasz.luba@arm.com>,
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Rob Herring <robh+dt@kernel.org>,
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Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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Conor Dooley <conor+dt@kernel.org>,
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Martin Botka <martin.botka@somainline.org>,
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Maksim Kiselev <bigunclemax@gmail.com>,
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Bob McChesney <bob@electricworry.net>,
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linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
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linux-arm-kernel@lists.infradead.org,
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linux-sunxi@lists.linux.dev
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Subject: [PATCH v4 4/7] thermal: sun8i: extend H6 calibration to support 4 sensors
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Date: Fri, 9 Feb 2024 14:42:18 +0000 [thread overview]
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Message-ID: <20240209144221.3602382-5-andre.przywara@arm.com> (raw)
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In-Reply-To: <20240209144221.3602382-1-andre.przywara@arm.com>
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From 6c04a419a4c5fb18edefc44dd676fb95c7f6c55d Mon Sep 17 00:00:00 2001
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From: Maksim Kiselev <bigunclemax@gmail.com>
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Date: Mon, 19 Feb 2024 15:36:36 +0000
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Subject: [PATCH] thermal/drivers/sun8i: Extend H6 calibration to support 4
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sensors
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The H616 SoC resembles the H6 thermal sensor controller, with a few
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changes like four sensors.
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@ -29,10 +10,15 @@ changes like four sensors.
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Extend sun50i_h6_ths_calibrate() function to support calibration of
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these sensors.
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Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
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Co-developed-by: Martin Botka <martin.botka@somainline.org>
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Signed-off-by: Martin Botka <martin.botka@somainline.org>
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Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
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Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Link: https://lore.kernel.org/r/20240219153639.179814-5-andre.przywara@arm.com
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---
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drivers/thermal/sun8i_thermal.c | 28 ++++++++++++++++++++--------
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1 file changed, 20 insertions(+), 8 deletions(-)
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@ -1,25 +1,7 @@
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From f8b54d1120b81ed57bed96cc8e814ba08886d1e5 Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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To: Vasily Khoruzhick <anarsoul@gmail.com>,
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Yangtao Li <tiny.windzz@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
|
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Jernej Skrabec <jernej.skrabec@gmail.com>,
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Samuel Holland <samuel@sholland.org>
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Cc: "Rafael J . Wysocki" <rafael@kernel.org>,
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Daniel Lezcano <daniel.lezcano@linaro.org>,
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Zhang Rui <rui.zhang@intel.com>,
|
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Lukasz Luba <lukasz.luba@arm.com>,
|
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Rob Herring <robh+dt@kernel.org>,
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Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
|
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Conor Dooley <conor+dt@kernel.org>,
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Martin Botka <martin.botka@somainline.org>,
|
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Maksim Kiselev <bigunclemax@gmail.com>,
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Bob McChesney <bob@electricworry.net>,
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linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
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linux-arm-kernel@lists.infradead.org,
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linux-sunxi@lists.linux.dev
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Subject: [PATCH v4 5/7] thermal: sun8i: add SRAM register access code
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Date: Fri, 9 Feb 2024 14:42:19 +0000 [thread overview]
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Message-ID: <20240209144221.3602382-6-andre.przywara@arm.com> (raw)
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In-Reply-To: <20240209144221.3602382-1-andre.przywara@arm.com>
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Date: Mon, 19 Feb 2024 15:36:37 +0000
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Subject: [PATCH] thermal/drivers/sun8i: Add SRAM register access code
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The Allwinner H616 SoC needs to clear a bit in one register in the SRAM
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controller, to report reasonable temperature values. On reset, bit 16 in
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@ -34,9 +16,12 @@ the SRAM controller device via a DT phandle link, then clear just this
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single bit.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Link: https://lore.kernel.org/r/20240219153639.179814-6-andre.przywara@arm.com
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---
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drivers/thermal/sun8i_thermal.c | 50 +++++++++++++++++++++++++++++++++
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1 file changed, 50 insertions(+)
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drivers/thermal/sun8i_thermal.c | 51 +++++++++++++++++++++++++++++++++
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1 file changed, 51 insertions(+)
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--- a/drivers/thermal/sun8i_thermal.c
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+++ b/drivers/thermal/sun8i_thermal.c
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@ -56,7 +41,7 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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int sensor_num;
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int offset;
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int scale;
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@@ -85,6 +87,7 @@ struct ths_device {
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@@ -85,12 +87,16 @@ struct ths_device {
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const struct ths_thermal_chip *chip;
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struct device *dev;
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struct regmap *regmap;
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@ -64,7 +49,16 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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struct reset_control *reset;
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struct clk *bus_clk;
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struct clk *mod_clk;
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@@ -337,6 +340,34 @@ static void sun8i_ths_reset_control_asse
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struct tsensor sensor[MAX_SENSOR_NUM];
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};
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+/* The H616 needs to have a bit 16 in the SRAM control register cleared. */
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+static const struct reg_field sun8i_ths_sram_reg_field = REG_FIELD(0x0, 16, 16);
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+
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/* Temp Unit: millidegree Celsius */
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static int sun8i_ths_calc_temp(struct ths_device *tmdev,
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int id, int reg)
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@@ -337,6 +343,34 @@ static void sun8i_ths_reset_control_asse
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reset_control_assert(data);
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}
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@ -99,13 +93,11 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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static int sun8i_ths_resource_init(struct ths_device *tmdev)
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{
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struct device *dev = tmdev->dev;
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@@ -381,6 +412,21 @@ static int sun8i_ths_resource_init(struc
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@@ -381,6 +415,19 @@ static int sun8i_ths_resource_init(struc
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if (ret)
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return ret;
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+ if (tmdev->chip->needs_sram) {
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+ const struct reg_field sun8i_sram_reg_field =
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+ REG_FIELD(0x0, 16, 16);
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+ struct regmap *regmap;
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+
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+ regmap = sun8i_ths_get_sram_regmap(dev->of_node);
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@ -113,7 +105,7 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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+ return PTR_ERR(regmap);
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+ tmdev->sram_regmap_field = devm_regmap_field_alloc(dev,
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+ regmap,
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+ sun8i_sram_reg_field);
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+ sun8i_ths_sram_reg_field);
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+ if (IS_ERR(tmdev->sram_regmap_field))
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+ return PTR_ERR(tmdev->sram_regmap_field);
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+ }
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@ -121,7 +113,7 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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ret = sun8i_ths_calibrate(tmdev);
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if (ret)
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return ret;
|
||||
@@ -427,6 +473,10 @@ static int sun50i_h6_thermal_init(struct
|
||||
@@ -427,6 +474,10 @@ static int sun50i_h6_thermal_init(struct
|
||||
{
|
||||
int val;
|
||||
|
||||
@ -1,27 +1,7 @@
|
||||
From: Andre Przywara <andre.przywara@arm.com>
|
||||
To: Vasily Khoruzhick <anarsoul@gmail.com>,
|
||||
Yangtao Li <tiny.windzz@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
|
||||
Jernej Skrabec <jernej.skrabec@gmail.com>,
|
||||
Samuel Holland <samuel@sholland.org>
|
||||
Cc: "Rafael J . Wysocki" <rafael@kernel.org>,
|
||||
Daniel Lezcano <daniel.lezcano@linaro.org>,
|
||||
Zhang Rui <rui.zhang@intel.com>,
|
||||
Lukasz Luba <lukasz.luba@arm.com>,
|
||||
Rob Herring <robh+dt@kernel.org>,
|
||||
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
|
||||
Conor Dooley <conor+dt@kernel.org>,
|
||||
Martin Botka <martin.botka@somainline.org>,
|
||||
Maksim Kiselev <bigunclemax@gmail.com>,
|
||||
Bob McChesney <bob@electricworry.net>,
|
||||
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
|
||||
linux-arm-kernel@lists.infradead.org,
|
||||
linux-sunxi@lists.linux.dev
|
||||
Subject: [PATCH v4 6/7] thermal: sun8i: add support for H616 THS controller
|
||||
Date: Fri, 9 Feb 2024 14:42:20 +0000 [thread overview]
|
||||
Message-ID: <20240209144221.3602382-7-andre.przywara@arm.com> (raw)
|
||||
In-Reply-To: <20240209144221.3602382-1-andre.przywara@arm.com>
|
||||
|
||||
From e7dbfa19572a1440a2e67ef70f94ff204849a0a8 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Botka <martin.botka@somainline.org>
|
||||
Date: Mon, 19 Feb 2024 15:36:38 +0000
|
||||
Subject: [PATCH] thermal/drivers/sun8i: Add support for H616 THS controller
|
||||
|
||||
Add support for the thermal sensor found in H616 SoCs, is the same as
|
||||
the H6 thermal sensor controller, but with four sensors.
|
||||
@ -30,13 +10,16 @@ register cleared, so set exercise the SRAM regmap to take care of that.
|
||||
|
||||
Signed-off-by: Martin Botka <martin.botka@somainline.org>
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
|
||||
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
Link: https://lore.kernel.org/r/20240219153639.179814-7-andre.przywara@arm.com
|
||||
---
|
||||
drivers/thermal/sun8i_thermal.c | 15 +++++++++++++++
|
||||
1 file changed, 15 insertions(+)
|
||||
|
||||
--- a/drivers/thermal/sun8i_thermal.c
|
||||
+++ b/drivers/thermal/sun8i_thermal.c
|
||||
@@ -675,6 +675,20 @@ static const struct ths_thermal_chip sun
|
||||
@@ -688,6 +688,20 @@ static const struct ths_thermal_chip sun
|
||||
.calc_temp = sun8i_ths_calc_temp,
|
||||
};
|
||||
|
||||
@ -57,10 +40,10 @@ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
static const struct of_device_id of_ths_match[] = {
|
||||
{ .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
|
||||
{ .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
|
||||
@@ -683,6 +697,7 @@ static const struct of_device_id of_ths_
|
||||
{ .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths },
|
||||
@@ -697,6 +711,7 @@ static const struct of_device_id of_ths_
|
||||
{ .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths },
|
||||
{ .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },
|
||||
{ .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths },
|
||||
+ { .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths },
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
@ -0,0 +1,68 @@
|
||||
From 9ac53d5532cc4bb595bbee86ccba2172ccc336c3 Mon Sep 17 00:00:00 2001
|
||||
From: Mark Brown <broonie@kernel.org>
|
||||
Date: Tue, 23 Jan 2024 23:33:07 +0000
|
||||
Subject: [PATCH] thermal/drivers/sun8i: Don't fail probe due to zone
|
||||
registration failure
|
||||
|
||||
Currently the sun8i thermal driver will fail to probe if any of the
|
||||
thermal zones it is registering fails to register with the thermal core.
|
||||
Since we currently do not define any trip points for the GPU thermal
|
||||
zones on at least A64 or H5 this means that we have no thermal support
|
||||
on these platforms:
|
||||
|
||||
[ 1.698703] thermal_sys: Failed to find 'trips' node
|
||||
[ 1.698707] thermal_sys: Failed to find trip points for thermal-sensor id=1
|
||||
|
||||
even though the main CPU thermal zone on both SoCs is fully configured.
|
||||
This does not seem ideal, while we may not be able to use all the zones
|
||||
it seems better to have those zones which are usable be operational.
|
||||
Instead just carry on registering zones if we get any non-deferral
|
||||
error, allowing use of those zones which are usable.
|
||||
|
||||
This means that we also need to update the interrupt handler to not
|
||||
attempt to notify the core for events on zones which we have not
|
||||
registered, I didn't see an ability to mask individual interrupts and
|
||||
I would expect that interrupts would still be indicated in the ISR even
|
||||
if they were masked.
|
||||
|
||||
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
|
||||
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Signed-off-by: Mark Brown <broonie@kernel.org>
|
||||
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
Link: https://lore.kernel.org/r/20240123-thermal-sun8i-registration-v3-1-3e5771b1bbdd@kernel.org
|
||||
---
|
||||
drivers/thermal/sun8i_thermal.c | 16 ++++++++++++++--
|
||||
1 file changed, 14 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/thermal/sun8i_thermal.c
|
||||
+++ b/drivers/thermal/sun8i_thermal.c
|
||||
@@ -197,6 +197,9 @@ static irqreturn_t sun8i_irq_thread(int
|
||||
int i;
|
||||
|
||||
for_each_set_bit(i, &irq_bitmap, tmdev->chip->sensor_num) {
|
||||
+ /* We allow some zones to not register. */
|
||||
+ if (IS_ERR(tmdev->sensor[i].tzd))
|
||||
+ continue;
|
||||
thermal_zone_device_update(tmdev->sensor[i].tzd,
|
||||
THERMAL_EVENT_UNSPECIFIED);
|
||||
}
|
||||
@@ -531,8 +534,17 @@ static int sun8i_ths_register(struct ths
|
||||
i,
|
||||
&tmdev->sensor[i],
|
||||
&ths_ops);
|
||||
- if (IS_ERR(tmdev->sensor[i].tzd))
|
||||
- return PTR_ERR(tmdev->sensor[i].tzd);
|
||||
+
|
||||
+ /*
|
||||
+ * If an individual zone fails to register for reasons
|
||||
+ * other than probe deferral (eg, a bad DT) then carry
|
||||
+ * on, other zones might register successfully.
|
||||
+ */
|
||||
+ if (IS_ERR(tmdev->sensor[i].tzd)) {
|
||||
+ if (PTR_ERR(tmdev->sensor[i].tzd) == -EPROBE_DEFER)
|
||||
+ return PTR_ERR(tmdev->sensor[i].tzd);
|
||||
+ continue;
|
||||
+ }
|
||||
|
||||
if (devm_thermal_add_hwmon_sysfs(tmdev->sensor[i].tzd))
|
||||
dev_warn(tmdev->dev,
|
||||
@ -1,27 +1,7 @@
|
||||
From: Andre Przywara <andre.przywara@arm.com>
|
||||
To: Vasily Khoruzhick <anarsoul@gmail.com>,
|
||||
Yangtao Li <tiny.windzz@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
|
||||
Jernej Skrabec <jernej.skrabec@gmail.com>,
|
||||
Samuel Holland <samuel@sholland.org>
|
||||
Cc: "Rafael J . Wysocki" <rafael@kernel.org>,
|
||||
Daniel Lezcano <daniel.lezcano@linaro.org>,
|
||||
Zhang Rui <rui.zhang@intel.com>,
|
||||
Lukasz Luba <lukasz.luba@arm.com>,
|
||||
Rob Herring <robh+dt@kernel.org>,
|
||||
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
|
||||
Conor Dooley <conor+dt@kernel.org>,
|
||||
Martin Botka <martin.botka@somainline.org>,
|
||||
Maksim Kiselev <bigunclemax@gmail.com>,
|
||||
Bob McChesney <bob@electricworry.net>,
|
||||
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
|
||||
linux-arm-kernel@lists.infradead.org,
|
||||
linux-sunxi@lists.linux.dev
|
||||
Subject: [PATCH v4 7/7] arm64: dts: allwinner: h616: Add thermal sensor and zones
|
||||
Date: Fri, 9 Feb 2024 14:42:21 +0000 [thread overview]
|
||||
Message-ID: <20240209144221.3602382-8-andre.przywara@arm.com> (raw)
|
||||
In-Reply-To: <20240209144221.3602382-1-andre.przywara@arm.com>
|
||||
|
||||
From f4318af40544b8e7ff5a6b667ede60e6cf808262 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Botka <martin.botka@somainline.org>
|
||||
Date: Mon, 19 Feb 2024 15:36:39 +0000
|
||||
Subject: [PATCH] arm64: dts: allwinner: h616: Add thermal sensor and zones
|
||||
|
||||
There are four thermal sensors:
|
||||
- CPU
|
||||
@ -33,6 +13,9 @@ Add the thermal sensor configuration and the thermal zones.
|
||||
|
||||
Signed-off-by: Martin Botka <martin.botka@somainline.org>
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Link: https://lore.kernel.org/r/20240219153639.179814-8-andre.przywara@arm.com
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 88 +++++++++++++++++++
|
||||
1 file changed, 88 insertions(+)
|
||||
Loading…
Reference in New Issue
Block a user