From 16c32483844583b39f07be59f6eac6b1fc86502c Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Fri, 18 Oct 2024 19:21:16 +0800 Subject: [PATCH] rockchip: backport latest rk3588 clk updates Signed-off-by: Tianling Shen --- ...chip-Add-new-pll-type-pll_rk3588_ddr.patch | 51 +++++++++++++++++++ ...lk-rockchip-rk3588-drop-unused-code.patch} | 24 ++------- ...chip-fix-finding-of-maximum-clock-ID.patch | 29 +++++++++++ ...kchip-expose-rockchip_clk_set_lookup.patch | 2 +- ...-implement-linked-gate-clock-support.patch | 10 ++-- ...setting-ddr-clock-via-SIP-Version-2-.patch | 2 +- 6 files changed, 92 insertions(+), 26 deletions(-) create mode 100644 target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch rename target/linux/rockchip/patches-6.6/{111-01-clk-rockchip-rk3588-drop-unused-code.patch => 030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch} (65%) create mode 100644 target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch diff --git a/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch b/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch new file mode 100644 index 0000000000..0d68f687fa --- /dev/null +++ b/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch @@ -0,0 +1,51 @@ +From e781bffc296766b55dbd048890d558655031e8d1 Mon Sep 17 00:00:00 2001 +From: Elaine Zhang +Date: Wed, 28 Aug 2024 15:42:52 +0000 +Subject: [PATCH] clk: rockchip: Add new pll type pll_rk3588_ddr + +That PLL type is similar to the other rk3588 pll types but the actual +rate is twice the configured rate. +Therefore, the returned calculated rate must be multiplied by two. + +Signed-off-by: Elaine Zhang +Signed-off-by: Detlev Casanova +Acked-by: Dragan Simic +Link: https://lore.kernel.org/r/0102019199a76ec4-9d5846d4-d76a-4e69-a241-c88c2983d607-000000@eu-west-1.amazonses.com +Signed-off-by: Heiko Stuebner +--- + drivers/clk/rockchip/clk-pll.c | 6 +++++- + drivers/clk/rockchip/clk.h | 1 + + 2 files changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/clk/rockchip/clk-pll.c ++++ b/drivers/clk/rockchip/clk-pll.c +@@ -914,7 +914,10 @@ static unsigned long rockchip_rk3588_pll + } + rate64 = rate64 >> cur.s; + +- return (unsigned long)rate64; ++ if (pll->type == pll_rk3588_ddr) ++ return (unsigned long)rate64 * 2; ++ else ++ return (unsigned long)rate64; + } + + static int rockchip_rk3588_pll_set_params(struct rockchip_clk_pll *pll, +@@ -1167,6 +1170,7 @@ struct clk *rockchip_clk_register_pll(st + break; + case pll_rk3588: + case pll_rk3588_core: ++ case pll_rk3588_ddr: + if (!pll->rate_table) + init.ops = &rockchip_rk3588_pll_clk_norate_ops; + else +--- a/drivers/clk/rockchip/clk.h ++++ b/drivers/clk/rockchip/clk.h +@@ -287,6 +287,7 @@ enum rockchip_pll_type { + pll_rk3399, + pll_rk3588, + pll_rk3588_core, ++ pll_rk3588_ddr, + }; + + #define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1, \ diff --git a/target/linux/rockchip/patches-6.6/111-01-clk-rockchip-rk3588-drop-unused-code.patch b/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch similarity index 65% rename from target/linux/rockchip/patches-6.6/111-01-clk-rockchip-rk3588-drop-unused-code.patch rename to target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch index 54ccef8410..0164bf26e5 100644 --- a/target/linux/rockchip/patches-6.6/111-01-clk-rockchip-rk3588-drop-unused-code.patch +++ b/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch @@ -1,23 +1,7 @@ +From 2e7b3daa8cb1ebd17e6a7f417ef5e6553203035c Mon Sep 17 00:00:00 2001 From: Sebastian Reichel -To: Michael Turquette , - Stephen Boyd , - linux-clk@vger.kernel.org -Cc: Elaine Zhang , - Kever Yang , - Heiko Stuebner , - Rob Herring , - Krzysztof Kozlowski , - Conor Dooley , - huangtao@rock-chips.com, andy.yan@rock-chips.com, - Michal Tomek , Ilya K , - Chad LeClair , - devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, - Sebastian Reichel , - kernel@collabora.com -Subject: [PATCH v9 1/7] clk: rockchip: rk3588: drop unused code -Date: Mon, 25 Mar 2024 20:33:32 +0100 [thread overview] -Message-ID: <20240325193609.237182-2-sebastian.reichel@collabora.com> (raw) -In-Reply-To: <20240325193609.237182-1-sebastian.reichel@collabora.com> +Date: Mon, 25 Mar 2024 20:33:32 +0100 +Subject: [PATCH] clk: rockchip: rk3588: drop unused code All clocks are registered early using CLK_OF_DECLARE(), which marks the DT node as processed. For the processed DT node the probe routine @@ -27,6 +11,8 @@ DT node as processed. But then the probe routine would re-register all the clocks by calling rk3588_clk_init() again. Signed-off-by: Sebastian Reichel +Link: https://lore.kernel.org/r/20240325193609.237182-2-sebastian.reichel@collabora.com +Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk-rk3588.c | 40 ------------------------------- 1 file changed, 40 deletions(-) diff --git a/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch b/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch new file mode 100644 index 0000000000..912c2c7778 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch @@ -0,0 +1,29 @@ +From ad1081a0da2744141d12e94ff816ac91feb871ca Mon Sep 17 00:00:00 2001 +From: Yao Zi +Date: Thu, 12 Sep 2024 13:32:05 +0000 +Subject: [PATCH] clk: rockchip: fix finding of maximum clock ID + +If an ID of a branch's child is greater than current maximum, we should +set new maximum to the child's ID, instead of its parent's. + +Fixes: 2dc66a5ab2c6 ("clk: rockchip: rk3588: fix CLK_NR_CLKS usage") +Signed-off-by: Yao Zi +Link: https://lore.kernel.org/r/20240912133204.29089-2-ziyao@disroot.org +Reviewed-by: Sebastian Reichel +Reviewed-by: Heiko Stuebner +Signed-off-by: Stephen Boyd +--- + drivers/clk/rockchip/clk.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/rockchip/clk.c ++++ b/drivers/clk/rockchip/clk.c +@@ -439,7 +439,7 @@ unsigned long rockchip_clk_find_max_clk_ + if (list->id > max) + max = list->id; + if (list->child && list->child->id > max) +- max = list->id; ++ max = list->child->id; + } + + return max; diff --git a/target/linux/rockchip/patches-6.6/111-04-clk-rockchip-expose-rockchip_clk_set_lookup.patch b/target/linux/rockchip/patches-6.6/111-04-clk-rockchip-expose-rockchip_clk_set_lookup.patch index f49336e5a4..998b679d07 100644 --- a/target/linux/rockchip/patches-6.6/111-04-clk-rockchip-expose-rockchip_clk_set_lookup.patch +++ b/target/linux/rockchip/patches-6.6/111-04-clk-rockchip-expose-rockchip_clk_set_lookup.patch @@ -83,7 +83,7 @@ Signed-off-by: Sebastian Reichel --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h -@@ -969,6 +969,18 @@ struct rockchip_clk_branch { +@@ -970,6 +970,18 @@ struct rockchip_clk_branch { #define SGRF_GATE(_id, cname, pname) \ FACTOR(_id, cname, pname, 0, 1, 1) diff --git a/target/linux/rockchip/patches-6.6/111-06-clk-rockchip-implement-linked-gate-clock-support.patch b/target/linux/rockchip/patches-6.6/111-06-clk-rockchip-implement-linked-gate-clock-support.patch index 999c6223cd..8e4799c5bc 100644 --- a/target/linux/rockchip/patches-6.6/111-06-clk-rockchip-implement-linked-gate-clock-support.patch +++ b/target/linux/rockchip/patches-6.6/111-06-clk-rockchip-implement-linked-gate-clock-support.patch @@ -178,7 +178,7 @@ Signed-off-by: Sebastian Reichel const char *name, const char *const *parent_names, --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h -@@ -517,6 +517,7 @@ enum rockchip_clk_branch_type { +@@ -518,6 +518,7 @@ enum rockchip_clk_branch_type { branch_divider, branch_fraction_divider, branch_gate, @@ -186,7 +186,7 @@ Signed-off-by: Sebastian Reichel branch_mmc, branch_inverter, branch_factor, -@@ -544,6 +545,7 @@ struct rockchip_clk_branch { +@@ -545,6 +546,7 @@ struct rockchip_clk_branch { int gate_offset; u8 gate_shift; u8 gate_flags; @@ -194,7 +194,7 @@ Signed-off-by: Sebastian Reichel struct rockchip_clk_branch *child; }; -@@ -842,6 +844,20 @@ struct rockchip_clk_branch { +@@ -843,6 +845,20 @@ struct rockchip_clk_branch { .gate_flags = gf, \ } @@ -215,7 +215,7 @@ Signed-off-by: Sebastian Reichel #define MMC(_id, cname, pname, offset, shift) \ { \ .id = _id, \ -@@ -981,6 +997,11 @@ static inline void rockchip_clk_set_look +@@ -982,6 +998,11 @@ static inline void rockchip_clk_set_look ctx->clk_data.clks[id] = clk; } @@ -227,7 +227,7 @@ Signed-off-by: Sebastian Reichel struct rockchip_clk_provider *rockchip_clk_init(struct device_node *np, void __iomem *base, unsigned long nr_clks); void rockchip_clk_of_add_provider(struct device_node *np, -@@ -990,6 +1011,10 @@ unsigned long rockchip_clk_find_max_clk_ +@@ -991,6 +1012,10 @@ unsigned long rockchip_clk_find_max_clk_ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx, struct rockchip_clk_branch *list, unsigned int nr_clk); diff --git a/target/linux/rockchip/patches-6.6/802-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch b/target/linux/rockchip/patches-6.6/802-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch index e9e7dd54ea..58d2610919 100644 --- a/target/linux/rockchip/patches-6.6/802-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch +++ b/target/linux/rockchip/patches-6.6/802-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch @@ -180,7 +180,7 @@ Signed-off-by: hmz007 GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IGNORE_UNUSED, --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h -@@ -486,7 +486,8 @@ struct clk *rockchip_clk_register_mmc(co +@@ -487,7 +487,8 @@ struct clk *rockchip_clk_register_mmc(co * DDRCLK flags, including method of setting the rate * ROCKCHIP_DDRCLK_SIP: use SIP call to bl31 to change ddrclk rate. */