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rockchip: enable LAN LED configuration for NanoPi R4S

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This enables the LEDs on the LAN interfaces for NanoPi R4S.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2022-09-24 11:41:57 +08:00
parent 1b78ebf6fe
commit 1c599c5480
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
4 changed files with 81 additions and 23 deletions
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1
target/linux/rockchip/armv8/config-5.15
View File

@ -303,7 +303,6 @@ CONFIG_INPUT_FF_MEMLESS=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_INPUT_LEDS=y
CONFIG_INPUT_MATRIXKMAP=y
# CONFIG_INPUT_MISC is not set
CONFIG_INPUT_RK805_PWRKEY=y
CONFIG_IOMMU_API=y
# CONFIG_IOMMU_DEBUGFS is not set

22
target/linux/rockchip/patches-5.15/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch → target/linux/rockchip/patches-5.15/103-arm64-rockchip-add-OF-node-for-eth.patch
View File

@ -28,3 +28,25 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
};
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -83,6 +83,19 @@
max-link-speed = <1>;
num-lanes = <1>;
vpcie3v3-supply = <&vcc3v3_sys>;
+
+ pcie@0 {
+ reg = <0x00000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pcie-eth@0,0 {
+ compatible = "pci10ec,8168";
+ reg = <0x000000 0 0 0 0>;
+
+ realtek,led-data = <0x870>;
+ };
+ };
};
&pinctrl {

22
target/linux/rockchip/patches-5.15/106-arm64-rockchip-add-OF-node-for-pcie-eth-on-NanoPi-R4S.patch
View File

@ -1,22 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -83,6 +83,19 @@
max-link-speed = <1>;
num-lanes = <1>;
vpcie3v3-supply = <&vcc3v3_sys>;
+
+ pcie@0 {
+ reg = <0x00000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pcie-eth@0,0 {
+ compatible = "pci10ec,8168";
+ reg = <0x000000 0 0 0 0>;
+
+ realtek,led-data = <0x870>;
+ };
+ };
};
&pinctrl {

59
target/linux/rockchip/patches-5.15/108-net-ethernet-r8169-add-LED-configuration-from-OF.patch Normal file
View File

@ -0,0 +1,59 @@
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -21,6 +21,7 @@
#include <linux/in.h>
#include <linux/io.h>
#include <linux/ip.h>
+#include <linux/of.h>
#include <linux/tcp.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
@@ -183,6 +184,7 @@ enum rtl_registers {
MAR0 = 8, /* Multicast filter. */
CounterAddrLow = 0x10,
CounterAddrHigh = 0x14,
+ CustomLED = 0x18,
TxDescStartAddrLow = 0x20,
TxDescStartAddrHigh = 0x24,
TxHDescStartAddrLow = 0x28,
@@ -2140,6 +2142,22 @@ void r8169_apply_firmware(struct rtl8169_private *tp)
}
}
+static int rtl8169_led_configuration(struct rtl8169_private *tp)
+{
+ u32 led_data;
+ int ret;
+
+ ret = of_property_read_u32(tp->pci_dev->dev.of_node,
+ "realtek,led-data", &led_data);
+
+ if (ret)
+ return ret;
+
+ RTL_W16(tp, CustomLED, led_data);
+
+ return 0;
+}
+
static void rtl8168_config_eee_mac(struct rtl8169_private *tp)
{
/* Adjust EEE LED frequency */
@@ -3243,6 +3261,8 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
r8168_mac_ocp_write(tp, 0xc094, 0x0000);
r8168_mac_ocp_write(tp, 0xc09e, 0x0000);
+ rtl8169_led_configuration(tp);
+
rtl_hw_aspm_clkreq_enable(tp, true);
}
@@ -3695,6 +3715,8 @@ static void rtl_hw_start_8125b(struct rtl8169_private *tp)
rtl_ephy_init(tp, e_info_8125b);
rtl_hw_start_8125_common(tp);
+ rtl8169_led_configuration(tp);
+
rtl_hw_aspm_clkreq_enable(tp, true);
}