mediatek: sync with upstream source

Signed-off-by: CN_SZTL <cnsztl@project-openwrt.eu.org>
This commit is contained in:
CN_SZTL 2021-02-19 17:12:30 +08:00
parent e933ce02a0
commit 1dc0308506
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
11 changed files with 88 additions and 806 deletions

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@ -9,6 +9,7 @@ SUBTARGETS:=mt7622 mt7623 mt7629
FEATURES:=squashfs nand ramdisk fpu
KERNEL_PATCHVER:=5.4
KERNEL_TESTING_PATCHVER:=5.4
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \

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@ -57,12 +57,12 @@
compatible = "gpio-leds";
green {
label = "pio:green";
label = "bpi-r64:pio:green";
gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
};
red {
label = "pio:red";
label = "bpi-r64:pio:red";
gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
};
};

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@ -91,37 +91,37 @@
compatible = "gpio-leds";
led_power: power_g {
label = "green:power";
label = "wrc-2533:green:power";
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
};
power_b {
label = "blue:power";
label = "wrc-2533:blue:power";
gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
};
power_r {
label = "red:power";
label = "wrc-2533:red:power";
gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
};
usb {
label = "blue:usb";
label = "wrc-2533:blue:usb";
gpios = <&pio 74 GPIO_ACTIVE_HIGH>;
};
wps {
label = "red:wps";
label = "wrc-2533:red:wps";
gpios = <&pio 76 GPIO_ACTIVE_LOW>;
};
wifi2 {
label = "blue:wifi2g";
label = "wrc-2533:blue:wifi2g";
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
};
wifi5 {
label = "blue:wifi5g";
label = "wrc-2533:blue:wifi5g";
gpios = <&pio 91 GPIO_ACTIVE_LOW>;
};
};

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@ -0,0 +1,68 @@
/dts-v1/;
#include "mt7622-rfb1.dts"
/ {
model = "MT7622_MT7531 RFB (UBI)";
compatible = "mediatek,mt7622,ubi";
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000 0x0080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x0040000>;
};
partition@c0000 {
label = "Bootloader";
reg = <0xc0000 0x0080000>;
};
partition@140000 {
label = "Config";
reg = <0x140000 0x0080000>;
};
factory: partition@1c0000 {
label = "Factory";
reg = <0x1c0000 0x0040000>;
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "ubi";
reg = <0x600000 0x1C00000>;
};
partition@2200000 {
label = "User_data";
reg = <0x2200000 0x4000000>;
};
};
};
};

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@ -1,644 +0,0 @@
/*
* Copyright (c) 2018 MediaTek Inc.
* Author: Ryder Lee <ryder.lee@mediatek.com>
*
* SPDX-License-Identifier: (GPL-2.0-only OR MIT)
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
model = "MT7622_MT7531 RFB";
compatible = "mediatek,mt7622,ubi";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
factory {
label = "factory";
linux,code = <BTN_0>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
};
};
gsw: gsw@0 {
compatible = "mediatek,mt753x";
mediatek,ethsys = <&ethsys>;
#address-cells = <1>;
#size-cells = <0>;
};
leds {
compatible = "gpio-leds";
green {
label = "pio:green";
gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
};
red {
label = "pio:red";
gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
};
&bch {
status = "okay";
};
&btif {
status = "okay";
};
&cir {
pinctrl-names = "default";
pinctrl-0 = <&irrx_pins>;
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&gsw {
mediatek,mdio = <&mdio>;
mediatek,portmap = "llllw";
mediatek,mdio_master_pinmux = <0>;
reset-gpios = <&pio 54 0>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
port5: port@5 {
compatible = "mediatek,mt753x-port";
reg = <5>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port6: port@6 {
compatible = "mediatek,mt753x-port";
reg = <6>;
phy-mode = "sgmii";
fixed-link {
speed = <2500>;
full-duplex;
};
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
};
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&emmc_pins_default>;
pinctrl-1 = <&emmc_pins_uhs>;
status = "okay";
bus-width = <8>;
max-frequency = <50000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
non-removable;
};
&mmc1 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sd0_pins_default>;
pinctrl-1 = <&sd0_pins_uhs>;
status = "okay";
bus-width = <4>;
max-frequency = <50000000>;
cap-sd-highspeed;
r_smpl = <1>;
cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
};
&nandc {
pinctrl-names = "default";
pinctrl-0 = <&parallel_nand_pins>;
status = "disabled";
};
&nor_flash {
pinctrl-names = "default";
pinctrl-0 = <&spi_nor_pins>;
status = "disabled";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&pio {
/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
* SATA functions. i.e. output-high: PCIe, output-low: SATA
*/
asm_sel {
gpio-hog;
gpios = <90 GPIO_ACTIVE_HIGH>;
output-high;
};
/* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default {
mux {
function = "emmc", "emmc_rst";
groups = "emmc";
};
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
*/
conf-cmd-dat {
pins = "NDL0", "NDL1", "NDL2",
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
bias-pull-down;
};
};
emmc_pins_uhs: emmc-pins-uhs {
mux {
function = "emmc";
groups = "emmc";
};
conf-cmd-dat {
pins = "NDL0", "NDL1", "NDL2",
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
drive-strength = <4>;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
drive-strength = <4>;
bias-pull-down;
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
i2c1_pins: i2c1-pins {
mux {
function = "i2c";
groups = "i2c1_0";
};
};
i2c2_pins: i2c2-pins {
mux {
function = "i2c";
groups = "i2c2_0";
};
};
i2s1_pins: i2s1-pins {
mux {
function = "i2s";
groups = "i2s_out_mclk_bclk_ws",
"i2s1_in_data",
"i2s1_out_data";
};
conf {
pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
"I2S_WS", "I2S_MCLK";
drive-strength = <12>;
bias-pull-down;
};
};
irrx_pins: irrx-pins {
mux {
function = "ir";
groups = "ir_1_rx";
};
};
irtx_pins: irtx-pins {
mux {
function = "ir";
groups = "ir_1_tx";
};
};
/* Parallel nand is shared pin with eMMC */
parallel_nand_pins: parallel-nand-pins {
mux {
function = "flash";
groups = "par_nand";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
pwm7_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch7_2";
};
};
wled_pins: wled-pins {
mux {
function = "led";
groups = "wled";
};
};
sd0_pins_default: sd0-pins-default {
mux {
function = "sd";
groups = "sd_0";
};
/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
* DAT2, DAT3, CMD, CLK for SD respectively.
*/
conf-cmd-data {
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
drive-strength = <8>;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
drive-strength = <12>;
bias-pull-down;
};
conf-cd {
pins = "TXD3";
bias-pull-up;
};
};
sd0_pins_uhs: sd0-pins-uhs {
mux {
function = "sd";
groups = "sd_0";
};
conf-cmd-data {
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
bias-pull-down;
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
spic0_pins: spic0-pins {
mux {
function = "spi";
groups = "spic0_0";
};
};
spic1_pins: spic1-pins {
mux {
function = "spi";
groups = "spic1_0";
};
};
/* SPI-NOR is shared pin with serial NAND */
spi_nor_pins: spi-nor-pins {
mux {
function = "flash";
groups = "spi_nor";
};
};
/* serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_1_tx_rx" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
status = "okay";
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&sata {
status = "disable";
};
&sata_phy {
status = "disable";
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000 0x0080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x80000 0x0040000>;
};
partition@c0000 {
label = "Bootloader";
reg = <0xc0000 0x0080000>;
};
partition@140000 {
label = "Config";
reg = <0x140000 0x0080000>;
};
factory: partition@1c0000 {
label = "Factory";
reg = <0x1c0000 0x0040000>;
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "ubi";
reg = <0x600000 0x1C00000>;
};
partition@2200000 {
label = "User_data";
reg = <0x2200000 0x4000000>;
};
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spic0_pins>;
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spic1_pins>;
status = "okay";
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
status = "okay";
};
&u3phy {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
};

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@ -1,145 +0,0 @@
#!/bin/sh
#
# Copyright © 2019 Alexey Loukianov <lx2@lexa2.ru>
# Copyright © 2020 David Woodhouse <dwmw2@infradead.org>
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
# Generates a bootable SD card image for Banana Pi R2 (and probably
# other similar boards) as documented at
# http://www.fw-web.de/dokuwiki/doku.php?id=en:bpi-r2:storage
#
# The first sector must contain the SDMMC_BOOT header shown
# below, and also contains the MBR partition table in the end
# of the sector. The partition table must contain no active
# partitions.
#
# The second sector must contain the BRLYT header, and the
# special preloader image goes in sector 4; 2KiB into the image.
#
# The preloader loads U-Boot from sector 640; 320KiB into the image.
# The location and the size (512KiB) are fixed and not read from
# the partition table. We set up a partition for it merely for
# our own convenience for upgrades, etc.
#
# The second partition is a FAT file system containing the kernel
# image and a uboot.env file, which is provided to this script as
# $4 (bootfs image). Its size is configurable with the
# CONFIG_BANANA_PI_BOOT_PARTSIZE option; by default 32MiB.
#
# The root filesystem comes next in the third partition.
#
#
# ------------------------ Sector Offset
# | MBR + SDMMC_BOOT | 0 0x0
# |----------------------|
# | BRLYT header | 1 0x200
# |----------------------|
# . .
# . .
# |----------------------|
# | | 4 0x800
# | |
# | Preloader |
# . .
# . .
# | | 639
# |----------------------|
# | MBR partition #1 | 640 0x50000
# | |
# | U-Boot |
# . .
# . .
# | | 1663
# |----------------------|
# | MBR partition #2 |
# | |
# | FAT partition | ( BANANA_PI_BOOT_PARTSIZE
# . . default 32MiB )
# . (kernel, uEnv) .
# | |
# |----------------------|
# | MBR partition #3 |
# | |
# | Root partition |
# | | ( TARGET_ROOTFS_PARTSIZE
# | (squashfs+overlay | default 104MiB )
# . or ext4, etc.) .
# . .
# | |
# ------------------------
#
# For eMMC boot, everything up to and including the preloader must be
# written to /dev/mmcblk0boot0, with the SDMMC_BOOT header changed to
# read EMMC_BOOT\0 instead.
#
# The contents of the main eMMC are identical to the SD card layout,
# with the preloader loading 512KiB of U-Boot starting at 0x50000.
usage() {
echo "SYNTAX: $0 sd <file> <preloader image> <u-boot image> <bootfs image> <rootfs image> <bootfs size> <rootfs size>"
echo " OR: $0 emmc <file> <preloader image>"
exit 1
}
set -e
PRELOADER_OFFSET=2 # 2KiB
SDMMC_BOOT="SDMMC_BOOT\x00\x00\x01\x00\x00\x00\x00\x02\x00\x00"
EMMC_BOOT="EMMC_BOOT\x00\x00\x00\x01\x00\x00\x00\x00\x02\x00\x00"
BRLYT="BRLYT\x00\x00\x00\x01\x00\x00\x00\x00\x08\x00\x00\
\x00\x08\x00\x00\x42\x42\x42\x42\x08\x00\x01\x00\x00\x08\x00\x00\
\x00\x08\x00\x00\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
case $1 in
sd)
[ $# -eq 8 ] || usage
OUTPUT="$2"
PRELOADER="$3"
UBOOT="$4"
BOOTFS="$5"
ROOTFS="$6"
BOOTFSSIZE="$7"
ROOTFSSIZE="$8"
head=4
sect=63
set $(ptgen -o $OUTPUT -h $head -s $sect -a 0 -l 1024 \
-t 41 -p 512k@320k \
-t c -p ${BOOTFSSIZE}M \
-t 83 -p ${ROOTFSSIZE}M )
UBOOT_OFFSET="$(($1 / 512))"
UBOOT_SIZE="$(($2 / 512))"
BOOTFS_OFFSET="$(($3 / 512))"
BOOTFS_SIZE="$(($4 / 512))"
ROOTFS_OFFSET="$(($5 / 512))"
ROOTFS_SIZE="$(($6 / 512))"
echo -en "${SDMMC_BOOT}" | dd bs=1 of="${OUTPUT}" seek=0 conv=notrunc
echo -en "${BRLYT}" | dd bs=1 of="${OUTPUT}" seek=512 conv=notrunc
dd bs=1024 if="${PRELOADER}" of="${OUTPUT}" seek="${PRELOADER_OFFSET}" conv=notrunc
dd bs=512 if="${UBOOT}" of="${OUTPUT}" seek="${UBOOT_OFFSET}" conv=notrunc
dd bs=512 if="${BOOTFS}" of="${OUTPUT}" seek="${BOOTFS_OFFSET}" conv=notrunc
dd bs=512 if="${ROOTFS}" of="${OUTPUT}" seek="${ROOTFS_OFFSET}" conv=notrunc
dd bs=128k if=/dev/zero of="${OUTPUT}" count=1 oflag=append conv=notrunc
;;
emmc)
[ $# -eq 3 ] || usage
OUTPUT="$2"
PRELOADER="$3"
echo -en "${EMMC_BOOT}" | dd bs=1 of="${OUTPUT}" seek=0
echo -en "${BRLYT}" | dd bs=1 of="${OUTPUT}" seek=512 conv=notrunc
dd bs=1024 if="${PRELOADER}" of="${OUTPUT}" seek="${PRELOADER_OFFSET}" conv=notrunc
;;
*)
usage
;;
esac

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@ -1,10 +1,10 @@
DTS_DIR := $(DTS_DIR)/mediatek
KERNEL_LOADADDR := 0x44080000
define Device/bpi_bananapi-r64
DEVICE_VENDOR := Bpi
DEVICE_MODEL := Banana Pi R64
DEVICE_DTS := mt7622-bananapi-bpi-r64
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
SUPPORTED_DEVICES := bananapi,bpi-r64
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
endef
@ -14,7 +14,7 @@ define Device/bpi_bananapi-r64-rootdisk
DEVICE_VENDOR := Bpi
DEVICE_MODEL := Banana Pi R64 (rootdisk)
DEVICE_DTS := mt7622-bananapi-bpi-r64-rootdisk
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES := bananapi,bpi-r64
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
IMAGES := sysupgrade-emmc.bin.gz
@ -26,7 +26,7 @@ define Device/elecom_wrc-2533gent
DEVICE_VENDOR := Elecom
DEVICE_MODEL := WRC-2533GENT
DEVICE_DTS := mt7622-elecom-wrc-2533gent
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-mt7615e \
kmod-btmtkuart swconfig
endef
@ -36,7 +36,6 @@ define Device/mediatek_mt7622-rfb1
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MTK7622 rfb1 AP
DEVICE_DTS := mt7622-rfb1
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
endef
TARGET_DEVICES += mediatek_mt7622-rfb1
@ -45,7 +44,7 @@ define Device/mediatek_mt7622-ubi
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MTK7622 AP (UBI)
DEVICE_DTS := mt7622-rfb1-ubi
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_DTS_DIR := ../dts
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
@ -53,7 +52,7 @@ define Device/mediatek_mt7622-ubi
IMAGE_SIZE := 32768k
IMAGES += factory.bin
IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
check-size
check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
endef
@ -63,7 +62,7 @@ define Device/ubnt_unifi-6-lr
DEVICE_VENDOR := Ubiquiti
DEVICE_MODEL := UniFi 6 LR
DEVICE_DTS := mt7622-ubnt-unifi-6-lr
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915e
endef
TARGET_DEVICES += ubnt_unifi-6-lr

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@ -13,6 +13,9 @@ mediatek_setup_interfaces()
bananapi,bpi-r64)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" wan
;;
mediatek,mt7622-rfb1)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
;;
ubnt,unifi-6-lr)
ucidef_set_interfaces_lan "eth0"
;;

0
target/linux/mediatek/mt7622/config-5.4 Executable file → Normal file
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@ -2,7 +2,7 @@ ARCH:=aarch64
SUBTARGET:=mt7622
BOARDNAME:=MT7622
CPU_TYPE:=cortex-a53
DEFAULT_PACKAGES += kmod-mt7615e wpad-basic
DEFAULT_PACKAGES += kmod-mt7615e wpad-basic-wolfssl
KERNELNAME:=Image dtbs
define Target/Description