diff --git a/target/linux/rockchip/patches-5.10/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch b/target/linux/rockchip/patches-5.10/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch deleted file mode 100644 index e8123ee025..0000000000 --- a/target/linux/rockchip/patches-5.10/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: William Wu - -RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 -core's general architecture. It can act as static xHCI host -controller, static device controller, USB 3.0/2.0 OTG basing -on ID of USB3.0 PHY. - -Signed-off-by: William Wu -Signed-off-by: Leonidas P. Papadakos - ---- - -NOTE: This binding still has issues. From the original thread: - -the rk3328 usb3-phy has an issue with detecting any plugin events -after a previous device got removed - see the inno-usb3-phy driver -in the vendor kernel. - -The current state is good-enough for enabling the USB3 attached LAN -port of the NanoPi R2S. However, it might explode depending on your -use-case. You've been warned. - ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -984,6 +984,33 @@ - status = "disabled"; - }; - -+ usbdrd3: usb@ff600000 { -+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; -+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, -+ <&cru ACLK_USB3OTG>; -+ clock-names = "ref_clk", "suspend_clk", -+ "bus_clk"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ status = "disabled"; -+ -+ usbdrd_dwc3: dwc3@ff600000 { -+ compatible = "snps,dwc3"; -+ reg = <0x0 0xff600000 0x0 0x100000>; -+ interrupts = ; -+ dr_mode = "otg"; -+ phy_type = "utmi_wide"; -+ snps,dis_enblslpm_quirk; -+ snps,dis-u2-freeclk-exists-quirk; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_u3_susphy_quirk; -+ snps,dis-del-phy-power-chg-quirk; -+ snps,dis-tx-ipgap-linecheck-quirk; -+ status = "disabled"; -+ }; -+ }; -+ - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch index 0acfae5de3..fcf8fb93a7 100644 --- a/target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch +++ b/target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch @@ -14,9 +14,9 @@ Signed-off-by: David Bauer --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -405,4 +405,11 @@ - &usbdrd_dwc3 { - dr_mode = "host"; +@@ -378,4 +378,11 @@ + + &usb_host0_ohci { status = "okay"; + + usb-eth@2 { diff --git a/target/linux/rockchip/patches-5.10/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch b/target/linux/rockchip/patches-5.10/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch index edf007eefa..7aa6bbc27e 100644 --- a/target/linux/rockchip/patches-5.10/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch +++ b/target/linux/rockchip/patches-5.10/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch @@ -9,7 +9,7 @@ Subject: [PATCH] rockchip: rk3328: add i2c0 controller for nanopi r2s --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -169,6 +169,10 @@ +@@ -157,6 +157,10 @@ }; }; diff --git a/target/linux/rockchip/patches-5.10/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch b/target/linux/rockchip/patches-5.10/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch index ebdce52004..cdafb314e7 100644 --- a/target/linux/rockchip/patches-5.10/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch +++ b/target/linux/rockchip/patches-5.10/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch @@ -11,8 +11,8 @@ Signed-off-by: Tianling Shen --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -1021,6 +1021,13 @@ - }; +@@ -995,6 +995,13 @@ + status = "disabled"; }; + dfi: dfi@ff790000 { diff --git a/target/linux/rockchip/patches-5.10/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch b/target/linux/rockchip/patches-5.10/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch index d93b9a77b2..1c4963f69a 100644 --- a/target/linux/rockchip/patches-5.10/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch +++ b/target/linux/rockchip/patches-5.10/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch @@ -24,7 +24,7 @@ Signed-off-by: hmz007 #include "rk3328.dtsi" / { -@@ -115,6 +116,72 @@ +@@ -103,6 +104,72 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; @@ -97,7 +97,7 @@ Signed-off-by: hmz007 }; &cpu0 { -@@ -137,6 +204,10 @@ +@@ -125,6 +192,10 @@ status = "disabled"; }; @@ -108,7 +108,7 @@ Signed-off-by: hmz007 &gmac2io { assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; -@@ -202,6 +273,7 @@ +@@ -190,6 +261,7 @@ regulator-name = "vdd_log"; regulator-always-on; regulator-boot-on; @@ -116,7 +116,7 @@ Signed-off-by: hmz007 regulator-min-microvolt = <712500>; regulator-max-microvolt = <1450000>; regulator-ramp-delay = <12500>; -@@ -216,6 +288,7 @@ +@@ -204,6 +276,7 @@ regulator-name = "vdd_arm"; regulator-always-on; regulator-boot-on; diff --git a/target/linux/rockchip/patches-5.10/809-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch b/target/linux/rockchip/patches-5.10/809-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch new file mode 100644 index 0000000000..452500eda6 --- /dev/null +++ b/target/linux/rockchip/patches-5.10/809-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch @@ -0,0 +1,102 @@ +From: William Wu + +RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 +core's general architecture. It can act as static xHCI host +controller, static device controller, USB 3.0/2.0 OTG basing +on ID of USB3.0 PHY. + +Signed-off-by: William Wu +Signed-off-by: Leonidas P. Papadakos + +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 72 ++++++++++++++++++++++++ + 1 file changed, 72 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -864,6 +864,47 @@ + }; + }; + ++ usb3phy_grf: syscon@ff460000 { ++ compatible = "rockchip,usb3phy-grf", "syscon"; ++ reg = <0x0 0xff460000 0x0 0x1000>; ++ }; ++ ++ u3phy: usb3-phy@ff470000 { ++ compatible = "rockchip,rk3328-u3phy"; ++ reg = <0x0 0xff470000 0x0 0x0>; ++ rockchip,u3phygrf = <&usb3phy_grf>; ++ rockchip,grf = <&grf>; ++ interrupts = ; ++ interrupt-names = "linestate"; ++ clocks = <&cru PCLK_USB3PHY_OTG>, <&cru PCLK_USB3PHY_PIPE>; ++ clock-names = "u3phy-otg", "u3phy-pipe"; ++ resets = <&cru SRST_USB3PHY_U2>, ++ <&cru SRST_USB3PHY_U3>, ++ <&cru SRST_USB3PHY_PIPE>, ++ <&cru SRST_USB3OTG_UTMI>, ++ <&cru SRST_USB3PHY_OTG_P>, ++ <&cru SRST_USB3PHY_PIPE_P>; ++ reset-names = "u3phy-u2-por", "u3phy-u3-por", ++ "u3phy-pipe-mac", "u3phy-utmi-mac", ++ "u3phy-utmi-apb", "u3phy-pipe-apb"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ status = "disabled"; ++ ++ u3phy_utmi: utmi@ff470000 { ++ reg = <0x0 0xff470000 0x0 0x8000>; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ u3phy_pipe: pipe@ff478000 { ++ reg = <0x0 0xff478000 0x0 0x8000>; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ }; ++ + sdmmc: mmc@ff500000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff500000 0x0 0x4000>; +@@ -1002,6 +1043,37 @@ + status = "disabled"; + }; + ++ usbdrd3: usb@ff600000 { ++ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; ++ clocks = <&cru SCLK_USB3OTG_REF>, <&cru ACLK_USB3OTG>, ++ <&cru SCLK_USB3OTG_SUSPEND>; ++ clock-names = "ref", "bus_early", ++ "suspend"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ clock-ranges; ++ status = "disabled"; ++ ++ usbdrd_dwc3: dwc3@ff600000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0xff600000 0x0 0x100000>; ++ interrupts = ; ++ dr_mode = "otg"; ++ phys = <&u3phy_utmi>, <&u3phy_pipe>; ++ phy-names = "usb2-phy", "usb3-phy"; ++ phy_type = "utmi_wide"; ++ snps,dis_enblslpm_quirk; ++ snps,dis-u2-freeclk-exists-quirk; ++ snps,dis_u2_susphy_quirk; ++ snps,dis_u3_susphy_quirk; ++ snps,dis-del-phy-power-chg-quirk; ++ snps,dis-tx-ipgap-linecheck-quirk; ++ snps,xhci-trb-ent-quirk; ++ status = "disabled"; ++ }; ++ }; ++ + gic: interrupt-controller@ff811000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.10/810-rockchip-enable-LAN-port-on-NanoPi-R2S.patch similarity index 71% rename from target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch rename to target/linux/rockchip/patches-5.10/810-rockchip-enable-LAN-port-on-NanoPi-R2S.patch index 37dcb88948..58afc23012 100644 --- a/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch +++ b/target/linux/rockchip/patches-5.10/810-rockchip-enable-LAN-port-on-NanoPi-R2S.patch @@ -8,14 +8,14 @@ This is required for the USB3 attached LAN port to work. Signed-off-by: David Bauer --- - .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 27 +++++++++++++++++++ - 1 file changed, 27 insertions(+) + .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 40 +++++++++++++++++++ + 1 file changed, 40 insertions(+) --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -103,6 +103,18 @@ - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; +@@ -170,6 +170,18 @@ + opp-microvolt-L1 = <1150000>; + }; }; + + vcc_rtl8153: vcc-rtl8153-regulator { @@ -32,7 +32,7 @@ Signed-off-by: David Bauer }; &cpu0 { -@@ -320,6 +332,12 @@ +@@ -401,6 +413,12 @@ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; @@ -45,16 +45,32 @@ Signed-off-by: David Bauer }; &pwm2 { -@@ -375,3 +393,12 @@ - &usb_host0_ohci { - status = "okay"; +@@ -463,3 +481,28 @@ + realtek,led-data = <0x87>; + }; }; + ++&u3phy { ++ vbus-supply = <&vcc_rtl8153>; ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ status = "okay"; ++}; ++ +&usbdrd3 { + status = "okay"; +}; + +&usbdrd_dwc3 { -+ dr_mode = "host"; + status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ snps,xhci-slow-suspend-quirk; +}; diff --git a/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch b/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch deleted file mode 100644 index 621b25abca..0000000000 --- a/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: William Wu - -RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 -core's general architecture. It can act as static xHCI host -controller, static device controller, USB 3.0/2.0 OTG basing -on ID of USB3.0 PHY. - -Signed-off-by: William Wu -Signed-off-by: Leonidas P. Papadakos - ---- - -NOTE: This binding still has issues. From the original thread: - -the rk3328 usb3-phy has an issue with detecting any plugin events -after a previous device got removed - see the inno-usb3-phy driver -in the vendor kernel. - -The current state is good-enough for enabling the USB3 attached LAN -port of the NanoPi R2S. However, it might explode depending on your -use-case. You've been warned. - ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -955,6 +955,33 @@ - status = "disabled"; - }; - -+ usbdrd3: usb@ff600000 { -+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; -+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, -+ <&cru ACLK_USB3OTG>; -+ clock-names = "ref_clk", "suspend_clk", -+ "bus_clk"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ status = "disabled"; -+ -+ usbdrd_dwc3: dwc3@ff600000 { -+ compatible = "snps,dwc3"; -+ reg = <0x0 0xff600000 0x0 0x100000>; -+ interrupts = ; -+ dr_mode = "otg"; -+ phy_type = "utmi_wide"; -+ snps,dis_enblslpm_quirk; -+ snps,dis-u2-freeclk-exists-quirk; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_u3_susphy_quirk; -+ snps,dis-del-phy-power-chg-quirk; -+ snps,dis-tx-ipgap-linecheck-quirk; -+ status = "disabled"; -+ }; -+ }; -+ - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch index e318f3136f..999ed9a0f1 100644 --- a/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch +++ b/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch @@ -14,9 +14,9 @@ Signed-off-by: David Bauer --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -401,4 +401,11 @@ - &usbdrd_dwc3 { - dr_mode = "host"; +@@ -374,4 +374,11 @@ + + &usb_host0_ohci { status = "okay"; + + usb-eth@2 { diff --git a/target/linux/rockchip/patches-5.4/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch b/target/linux/rockchip/patches-5.4/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch index 28798047fd..8ceae78af3 100644 --- a/target/linux/rockchip/patches-5.4/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch +++ b/target/linux/rockchip/patches-5.4/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch @@ -9,7 +9,7 @@ Subject: [PATCH] rockchip: rk3328: add i2c0 controller for nanopi r2s --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -165,6 +165,10 @@ +@@ -153,6 +153,10 @@ }; }; diff --git a/target/linux/rockchip/patches-5.4/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch b/target/linux/rockchip/patches-5.4/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch index e9b79b6fa9..577231fca8 100644 --- a/target/linux/rockchip/patches-5.4/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch +++ b/target/linux/rockchip/patches-5.4/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch @@ -11,8 +11,8 @@ Signed-off-by: Tianling Shen --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -993,6 +993,13 @@ - }; +@@ -966,6 +966,13 @@ + status = "disabled"; }; + dfi: dfi@ff790000 { diff --git a/target/linux/rockchip/patches-5.4/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch b/target/linux/rockchip/patches-5.4/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch index 0298ccfab1..79bee6af0b 100644 --- a/target/linux/rockchip/patches-5.4/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch +++ b/target/linux/rockchip/patches-5.4/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch @@ -24,9 +24,9 @@ Signed-off-by: hmz007 #include "rk3328.dtsi" / { -@@ -115,6 +116,72 @@ +@@ -103,6 +104,72 @@ + regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - enable-active-high; }; + + dmc: dmc { @@ -97,7 +97,7 @@ Signed-off-by: hmz007 }; &cpu0 { -@@ -133,6 +200,10 @@ +@@ -121,6 +188,10 @@ cpu-supply = <&vdd_arm>; }; @@ -108,7 +108,7 @@ Signed-off-by: hmz007 &gmac2io { assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; -@@ -198,6 +269,7 @@ +@@ -186,6 +257,7 @@ regulator-name = "vdd_log"; regulator-always-on; regulator-boot-on; @@ -116,7 +116,7 @@ Signed-off-by: hmz007 regulator-min-microvolt = <712500>; regulator-max-microvolt = <1450000>; regulator-ramp-delay = <12500>; -@@ -212,6 +284,7 @@ +@@ -200,6 +272,7 @@ regulator-name = "vdd_arm"; regulator-always-on; regulator-boot-on; diff --git a/target/linux/rockchip/patches-5.4/809-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch b/target/linux/rockchip/patches-5.4/809-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch new file mode 100644 index 0000000000..92bb6398f3 --- /dev/null +++ b/target/linux/rockchip/patches-5.4/809-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch @@ -0,0 +1,102 @@ +From: William Wu + +RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 +core's general architecture. It can act as static xHCI host +controller, static device controller, USB 3.0/2.0 OTG basing +on ID of USB3.0 PHY. + +Signed-off-by: William Wu +Signed-off-by: Leonidas P. Papadakos + +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 72 ++++++++++++++++++++++++ + 1 file changed, 72 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -833,6 +833,47 @@ + }; + }; + ++ usb3phy_grf: syscon@ff460000 { ++ compatible = "rockchip,usb3phy-grf", "syscon"; ++ reg = <0x0 0xff460000 0x0 0x1000>; ++ }; ++ ++ u3phy: usb3-phy@ff470000 { ++ compatible = "rockchip,rk3328-u3phy"; ++ reg = <0x0 0xff470000 0x0 0x0>; ++ rockchip,u3phygrf = <&usb3phy_grf>; ++ rockchip,grf = <&grf>; ++ interrupts = ; ++ interrupt-names = "linestate"; ++ clocks = <&cru PCLK_USB3PHY_OTG>, <&cru PCLK_USB3PHY_PIPE>; ++ clock-names = "u3phy-otg", "u3phy-pipe"; ++ resets = <&cru SRST_USB3PHY_U2>, ++ <&cru SRST_USB3PHY_U3>, ++ <&cru SRST_USB3PHY_PIPE>, ++ <&cru SRST_USB3OTG_UTMI>, ++ <&cru SRST_USB3PHY_OTG_P>, ++ <&cru SRST_USB3PHY_PIPE_P>; ++ reset-names = "u3phy-u2-por", "u3phy-u3-por", ++ "u3phy-pipe-mac", "u3phy-utmi-mac", ++ "u3phy-utmi-apb", "u3phy-pipe-apb"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ status = "disabled"; ++ ++ u3phy_utmi: utmi@ff470000 { ++ reg = <0x0 0xff470000 0x0 0x8000>; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ u3phy_pipe: pipe@ff478000 { ++ reg = <0x0 0xff478000 0x0 0x8000>; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ }; ++ + sdmmc: dwmmc@ff500000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff500000 0x0 0x4000>; +@@ -973,6 +1014,37 @@ + status = "disabled"; + }; + ++ usbdrd3: usb@ff600000 { ++ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; ++ clocks = <&cru SCLK_USB3OTG_REF>, <&cru ACLK_USB3OTG>, ++ <&cru SCLK_USB3OTG_SUSPEND>; ++ clock-names = "ref", "bus_early", ++ "suspend"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ clock-ranges; ++ status = "disabled"; ++ ++ usbdrd_dwc3: dwc3@ff600000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0xff600000 0x0 0x100000>; ++ interrupts = ; ++ dr_mode = "otg"; ++ phys = <&u3phy_utmi>, <&u3phy_pipe>; ++ phy-names = "usb2-phy", "usb3-phy"; ++ phy_type = "utmi_wide"; ++ snps,dis_enblslpm_quirk; ++ snps,dis-u2-freeclk-exists-quirk; ++ snps,dis_u2_susphy_quirk; ++ snps,dis_u3_susphy_quirk; ++ snps,dis-del-phy-power-chg-quirk; ++ snps,dis-tx-ipgap-linecheck-quirk; ++ snps,xhci-trb-ent-quirk; ++ status = "disabled"; ++ }; ++ }; ++ + gic: interrupt-controller@ff811000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.10/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.4/810-rockchip-enable-LAN-port-on-NanoPi-R2S.patch similarity index 62% rename from target/linux/rockchip/patches-5.10/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch rename to target/linux/rockchip/patches-5.4/810-rockchip-enable-LAN-port-on-NanoPi-R2S.patch index 82e2137a8b..f59e359db3 100644 --- a/target/linux/rockchip/patches-5.10/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch +++ b/target/linux/rockchip/patches-5.4/810-rockchip-enable-LAN-port-on-NanoPi-R2S.patch @@ -1,4 +1,4 @@ -From 0fc3b9b7619c4878f73a6a7989863f0d1a3fd392 Mon Sep 17 00:00:00 2001 +From 7cde8541d04e0ade5d126bdada3cf0c0429eaa99 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Fri, 10 Jul 2020 21:12:16 +0200 Subject: [PATCH] rockchip: enabled LAN port on NanoPi R2S @@ -8,15 +8,16 @@ This is required for the USB3 attached LAN port to work. Signed-off-by: David Bauer --- - .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 27 +++++++++++++++++++ - 1 file changed, 27 insertions(+) + .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 40 +++++++++++++++++++ + 1 file changed, 40 insertions(+) --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -44,6 +44,18 @@ +@@ -170,6 +170,18 @@ + opp-microvolt-L1 = <1150000>; }; }; - ++ + vcc_rtl8153: vcc-rtl8153-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; @@ -28,12 +29,11 @@ Signed-off-by: David Bauer + regulator-max-microvolt = <5000000>; + enable-active-high; + }; -+ - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; -@@ -273,6 +285,12 @@ - }; + }; + + &cpu0 { +@@ -397,6 +409,12 @@ + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + @@ -44,17 +44,33 @@ Signed-off-by: David Bauer + }; }; - &io_domains { -@@ -379,3 +397,12 @@ - &usb_host0_ohci { - status = "okay"; + &pwm2 { +@@ -459,3 +477,28 @@ + realtek,led-data = <0x87>; + }; }; + ++&u3phy { ++ vbus-supply = <&vcc_rtl8153>; ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ status = "okay"; ++}; ++ +&usbdrd3 { + status = "okay"; +}; + +&usbdrd_dwc3 { -+ dr_mode = "host"; + status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ snps,xhci-slow-suspend-quirk; +};