uboot-rk35xx: initial package
Support for rk35xx on mainline u-boot isn't that good currently, as a workaround, use vendor u-boot instead for now. This adds support for the Fastrhino R66S. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
parent
49e97f6737
commit
245180bfaa
64
package/boot/uboot-rk35xx/Makefile
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64
package/boot/uboot-rk35xx/Makefile
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@ -0,0 +1,64 @@
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#
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# Copyright (C) 2021 ImmortalWrt.org
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#
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# This is free software, licensed under the GNU General Public License v2.
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# See /LICENSE for more information.
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#
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include $(TOPDIR)/rules.mk
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PKG_NAME:=uboot-rk35xx
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PKG_RELEASE:=1
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL:=https://github.com/radxa/u-boot.git
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PKG_SOURCE_DATE:=2022-04-21
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PKG_SOURCE_VERSION:=19cefea3b8a7e22fa29b39367b04a8ab90c5c765
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PKG_MIRROR_HASH:=ba0f33b68ff4325d496e7ac1bb8f512b7d7b94a80070a1fdbda6e0dc9dc9c3e2
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include $(INCLUDE_DIR)/u-boot.mk
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include $(INCLUDE_DIR)/package.mk
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define U-Boot/Default
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BUILD_TARGET:=rockchip
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UENV:=default
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HIDDEN:=1
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endef
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define U-Boot/fastrhino-r66s-rk3568
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BUILD_SUBTARGET:=armv8
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NAME:=FastRhino R66S
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BUILD_DEVICES:= \
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fastrhino-r66s
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DEPENDS:=+PACKAGE_u-boot-fastrhino-r66s-rk3568:arm-trusted-firmware-rk3568
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PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
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ATF:=rk3568_bl31_v1.34.elf
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DDR:=rk3568_ddr_1560MHz_v1.13.bin
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endef
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UBOOT_TARGETS := \
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fastrhino-r66s-rk3568
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UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
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UBOOT_MAKE_FLAGS += \
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BL31=$(STAGING_DIR_IMAGE)/$(ATF) spl/u-boot-spl.bin u-boot.dtb u-boot.itb
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define Build/Configure
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$(call Build/Configure/U-Boot)
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$(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config
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endef
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define Build/InstallDev
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$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
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$(PKG_BUILD_DIR)/tools/mkimage -n rk3568 -T rksd \
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-d $(STAGING_DIR_IMAGE)/$(DDR):$(PKG_BUILD_DIR)/spl/u-boot-spl.bin $(PKG_BUILD_DIR)/idbloader.img
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$(CP) $(PKG_BUILD_DIR)/idbloader.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-idbloader.img
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$(CP) $(PKG_BUILD_DIR)/u-boot.itb $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.itb
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endef
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define Package/u-boot/install/default
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endef
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$(eval $(call BuildPackage/U-Boot))
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@ -0,0 +1,10 @@
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3399-puma-ddr1333.dtb \
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rk3399-puma-ddr1600.dtb \
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rk3399-puma-ddr1866.dtb \
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+ rk3568-fastrhino-r66s.dtb \
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rk3568-rock-3-a.dtb \
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rv1108-evb.dtb
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dtb-$(CONFIG_ARCH_MESON) += \
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@ -0,0 +1,651 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3568.dtsi"
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#include "rk3568-u-boot.dtsi"
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/ {
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model = "FastRhino R66S";
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compatible = "fastrhino,r66s", "rockchip,rk3568";
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aliases {
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ethernet0 = &rtl8125_1;
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ethernet1 = &rtl8125_2;
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led-boot = &power_led;
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led-failsafe = &power_led;
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led-running = &power_led;
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led-upgrade = &power_led;
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mmc0 = &sdmmc0;
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};
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chosen: chosen {
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stdout-path = "serial2:1500000n8";
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&power_led_pin>;
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power_led: led-power {
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label = "green:power";
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gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&reset_button_pin>;
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reset {
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debounce-interval = <50>;
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gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
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label = "reset";
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linux,code = <KEY_RESTART>;
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};
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};
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dc_12v: dc-12v {
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u-boot,dm-pre-reloc;
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc3v3_pcie: vcc3v3-pcie {
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u-boot,dm-pre-reloc;
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_sys: vcc3v3-sys {
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u-boot,dm-pre-reloc;
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_sys: vcc5v0-sys {
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u-boot,dm-pre-reloc;
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_usb_host: vcc5v0-usb-host {
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u-boot,dm-pre-reloc;
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb_host";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vcc5v0_usb_otg: vcc5v0-usb-otg {
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u-boot,dm-pre-reloc;
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_usb_otg_en>;
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regulator-name = "vcc5v0_usb_otg";
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&combphy0_us {
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status = "okay";
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};
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&combphy1_usq {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu1 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu2 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu3 {
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cpu-supply = <&vdd_cpu>;
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};
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&crypto {
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status = "okay";
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};
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&gpio0 {
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u-boot,dm-pre-reloc;
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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u-boot,dm-pre-reloc;
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clock-frequency = <100000>;
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vdd_cpu: regulator@1c {
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u-boot,dm-pre-reloc;
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compatible = "tcs,tcs452x";
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reg = <0x1c>;
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regulator-compatible = "fan53555-reg";
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regulator-name = "vdd_cpu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1390000>;
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regulator-ramp-delay = <2300>;
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fcs,suspend-voltage-selector = <1>;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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rk809: pmic@20 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default", "pmic-sleep",
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"pmic-power-off", "pmic-reset";
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pinctrl-0 = <&pmic_int>;
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pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
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pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
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pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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//fb-inner-reg-idxs = <2>;
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/* 1: rst regs (default in codes), 0: rst the pmic */
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pmic-reset-func = <0>;
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/* not save the PMIC_POWER_EN register in uboot */
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not-save-power-en = <1>;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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pwrkey {
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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pinctrl_rk8xx: pinctrl_rk8xx {
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gpio-controller;
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#gpio-cells = <2>;
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u-boot,dm-pre-reloc;
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rk817_slppin_null: rk817_slppin_null {
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pins = "gpio_slp";
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function = "pin_fun0";
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u-boot,dm-pre-reloc;
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};
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rk817_slppin_slp: rk817_slppin_slp {
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pins = "gpio_slp";
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function = "pin_fun1";
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u-boot,dm-pre-reloc;
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};
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rk817_slppin_pwrdn: rk817_slppin_pwrdn {
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pins = "gpio_slp";
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function = "pin_fun2";
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u-boot,dm-pre-reloc;
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};
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rk817_slppin_rst: rk817_slppin_rst {
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pins = "gpio_slp";
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function = "pin_fun3";
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u-boot,dm-pre-reloc;
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};
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};
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regulators {
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u-boot,dm-pre-reloc;
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vdd_logic: DCDC_REG1 {
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u-boot,dm-pre-reloc;
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regulator-name = "vdd_logic";
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regulator-always-on;
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regulator-boot-on;
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regulator-init-microvolt = <900000>;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: DCDC_REG2 {
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u-boot,dm-pre-reloc;
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regulator-name = "vdd_gpu";
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regulator-always-on;
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regulator-init-microvolt = <900000>;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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u-boot,dm-pre-reloc;
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-on-in-suspend;
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};
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};
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vdd_npu: DCDC_REG4 {
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u-boot,dm-pre-reloc;
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regulator-name = "vdd_npu";
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regulator-init-microvolt = <900000>;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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vcc_1v8: DCDC_REG5 {
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u-boot,dm-pre-reloc;
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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vdda0v9_image: LDO_REG1 {
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u-boot,dm-pre-reloc;
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regulator-name = "vdda0v9_image";
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regulator-always-on;
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <950000>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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vdda_0v9: LDO_REG2 {
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u-boot,dm-pre-reloc;
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regulator-name = "vdda_0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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vdda0v9_pmu: LDO_REG3 {
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u-boot,dm-pre-reloc;
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regulator-name = "vdda0v9_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <900000>;
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};
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};
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vccio_acodec: LDO_REG4 {
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u-boot,dm-pre-reloc;
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regulator-name = "vccio_acodec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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u-boot,dm-pre-reloc;
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regulator-off-in-suspend;
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};
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};
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vccio_sd: LDO_REG5 {
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u-boot,dm-pre-reloc;
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regulator-name = "vccio_sd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-state-mem {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG6 {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-state-mem {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_1v8: LDO_REG7 {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-name = "vcca_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pmu: LDO_REG8 {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-name = "vcca1v8_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_image: LDO_REG9 {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-name = "vcca1v8_image";
|
||||
regulator-init-microvolt = <950000>;
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <950000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: SWITCH_REG1 {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sd: SWITCH_REG2 {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-name = "vcc3v3_sd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
u-boot,dm-pre-reloc;
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x1 {
|
||||
rockchip,bifurcation;
|
||||
rockchip,init-delay-ms = <100>;
|
||||
reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
|
||||
pcie@10 {
|
||||
reg = <0x00100000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
rtl8125_1: pcie-eth@10,0 {
|
||||
compatible = "pci10ec,8125";
|
||||
reg = <0x000000 0 0 0 0>;
|
||||
|
||||
realtek,led-data = <0x78>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie3x2 {
|
||||
rockchip,bifurcation;
|
||||
reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
|
||||
pcie@20 {
|
||||
reg = <0x00200000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
rtl8125_2: pcie-eth@20,0 {
|
||||
compatible = "pci10ec,8125";
|
||||
reg = <0x000000 0 0 0 0>;
|
||||
|
||||
realtek,led-data = <0x78>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
u-boot,dm-spl;
|
||||
|
||||
leds {
|
||||
power_led_pin: power-led-pin {
|
||||
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
u-boot,dm-pre-reloc;
|
||||
|
||||
pmic_int: pmic_int {
|
||||
u-boot,dm-pre-reloc;
|
||||
rockchip,pins =
|
||||
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
soc_slppin_gpio: soc_slppin_gpio {
|
||||
u-boot,dm-pre-reloc;
|
||||
rockchip,pins =
|
||||
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
|
||||
};
|
||||
|
||||
soc_slppin_slp: soc_slppin_slp {
|
||||
u-boot,dm-pre-reloc;
|
||||
rockchip,pins =
|
||||
<0 RK_PA2 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
soc_slppin_rst: soc_slppin_rst {
|
||||
u-boot,dm-pre-reloc;
|
||||
rockchip,pins =
|
||||
<0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
rockchip-key {
|
||||
reset_button_pin: reset-button-pin {
|
||||
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
pmuio1-supply = <&vcc3v3_pmu>;
|
||||
pmuio2-supply = <&vcc3v3_pmu>;
|
||||
vccio1-supply = <&vccio_acodec>;
|
||||
vccio3-supply = <&vccio_sd>;
|
||||
vccio4-supply = <&vcc_1v8>;
|
||||
vccio5-supply = <&vcc_3v3>;
|
||||
vccio6-supply = <&vcc_1v8>;
|
||||
vccio7-supply = <&vcc_3v3>;
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rng {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcca_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
max-frequency = <150000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy0_host {
|
||||
phy-supply = <&vcc5v0_usb_host>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy0_otg {
|
||||
vbus-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
extcon = <&usb2phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd30 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost_dwc3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost30 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -0,0 +1,210 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
|
||||
CONFIG_ROCKCHIP_RK3568=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RK3568=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3568-fastrhino-r66s"
|
||||
CONFIG_SMBIOS_PRODUCT_NAME=""
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_FIT_HW_CRYPTO=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ANDROID_BOOTLOADER=y
|
||||
# CONFIG_ANDROID_WRITE_KEYBOX is not set
|
||||
CONFIG_ANDROID_AVB=y
|
||||
# CONFIG_ANDROID_KEYMASTER_CA is not set
|
||||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SPL_SHA256_SUPPORT=y
|
||||
CONFIG_SPL_CRYPTO_SUPPORT=y
|
||||
CONFIG_SPL_HASH_SUPPORT=y
|
||||
CONFIG_SPL_MMC_WRITE=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_MTD_WRITE=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
||||
CONFIG_SPL_AB=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0xc00800
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x04000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_DTIMG=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
CONFIG_CMD_LZMADEC=y
|
||||
# CONFIG_CMD_UNZIP is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
CONFIG_CMD_GPT=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_BOOT_ANDROID=y
|
||||
CONFIG_CMD_BOOT_ROCKCHIP=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_NAND=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_CMD_TFTP_BOOTM=y
|
||||
CONFIG_CMD_TFTP_FLASH=y
|
||||
# CONFIG_CMD_MISC is not set
|
||||
# CONFIG_CMD_CHARGE_DISPLAY is not set
|
||||
CONFIG_CMD_MTD_BLK=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="clock-names assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
# CONFIG_NET_TFTP_VARS is not set
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_DM_CRYPTO=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_DM_RNG=y
|
||||
CONFIG_RNG_ROCKCHIP=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_ROCKCHIP_GPIO_V2=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_RK8XX_PWRKEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLK=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ROCKCHIP_V9=y
|
||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_XMC=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_EDP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_DM_FUEL_GAUGE=y
|
||||
CONFIG_POWER_FG_RK817=y
|
||||
CONFIG_IO_DOMAIN=y
|
||||
CONFIG_ROCKCHIP_IO_DOMAIN=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_RK8XX=y
|
||||
CONFIG_REGULATOR_FAN53555=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_REGULATOR_RK8XX=y
|
||||
CONFIG_DM_CHARGE_DISPLAY=y
|
||||
CONFIG_CHARGE_ANIMATION=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||||
CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_RESET_ROCKCHIP=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_BASE=0xFE660000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_ROCKCHIP_SFC=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GADGET=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_DISPLAY=y
|
||||
CONFIG_DRM_ROCKCHIP=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_HDMI=y
|
||||
CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
|
||||
CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
|
||||
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
|
||||
CONFIG_DRM_ROCKCHIP_LVDS=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_N_SIZE=0x200
|
||||
CONFIG_RSA_E_SIZE=0x10
|
||||
CONFIG_RSA_C_SIZE=0x20
|
||||
CONFIG_SHA512=y
|
||||
CONFIG_LZ4=y
|
||||
CONFIG_LZMA=y
|
||||
CONFIG_SPL_GZIP=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
CONFIG_AVB_LIBAVB=y
|
||||
CONFIG_AVB_LIBAVB_AB=y
|
||||
CONFIG_AVB_LIBAVB_ATX=y
|
||||
CONFIG_AVB_LIBAVB_USER=y
|
||||
CONFIG_RK_AVB_LIBAVB_USER=y
|
||||
CONFIG_OPTEE_CLIENT=y
|
||||
CONFIG_OPTEE_V2=y
|
||||
Loading…
Reference in New Issue
Block a user