fish/immortalwrt
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Revert "ipq40xx: fix ethernet vlan double tagging"

Browse Source 
This reverts commit 9da2b56760.
This commit is contained in:
CN_SZTL 2020-07-18 12:36:54 +08:00
parent 0a1e67e933
commit 245c598341
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
2 changed files with 11 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
target/linux/ipq40xx/files-5.4/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
View File

@ -968,6 +968,7 @@ static int edma_axi_probe(struct platform_device *pdev)
edma_netdev[i]->netdev_ops = &edma_axi_netdev_ops;
edma_netdev[i]->max_mtu = 9000;
edma_netdev[i]->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM
| NETIF_F_HW_VLAN_CTAG_TX
| NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_SG |
NETIF_F_TSO | NETIF_F_GRO;
edma_netdev[i]->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
@ -979,10 +980,10 @@ static int edma_axi_probe(struct platform_device *pdev)
NETIF_F_TSO | NETIF_F_GRO;
#ifdef CONFIG_RFS_ACCEL
edma_netdev[i]->features |= NETIF_F_NTUPLE;
edma_netdev[i]->hw_features |= NETIF_F_NTUPLE;
edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE;
edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE;
edma_netdev[i]->features |= NETIF_F_RXHASH | NETIF_F_NTUPLE;
edma_netdev[i]->hw_features |= NETIF_F_RXHASH | NETIF_F_NTUPLE;
edma_netdev[i]->vlan_features |= NETIF_F_RXHASH | NETIF_F_NTUPLE;
edma_netdev[i]->wanted_features |= NETIF_F_RXHASH | NETIF_F_NTUPLE;
#endif
edma_set_ethtool_ops(edma_netdev[i]);

38
target/linux/ipq40xx/patches-5.4/705-net-add-qualcomm-ar40xx-phy.patch
View File

@ -26,7 +26,7 @@
obj-$(CONFIG_BCM63XX_PHY) += bcm63xx.o
--- /dev/null
+++ b/drivers/net/phy/ar40xx.c
@@ -0,0 +1,2118 @@
@@ -0,0 +1,2097 @@
+/*
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
@ -1261,11 +1261,7 @@
+ ar40xx_rmw(priv, AR40XX_REG_PORT_STATUS(port),
+ AR40XX_PORT_AUTO_LINK_EN, 0);
+
+ /* CPU port is setting headers to limit output ports */
+ if (port == 0)
+ ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0x8);
+ else
+ ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
+ ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
+
+ ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), 0);
+
@ -1308,10 +1304,6 @@
+ t = (AR40XX_PORT0_FC_THRESH_ON_DFLT << 16) |
+ AR40XX_PORT0_FC_THRESH_OFF_DFLT;
+ ar40xx_write(priv, AR40XX_REG_PORT_FLOWCTRL_THRESH(0), t);
+
+ /* set service tag to 802.1q */
+ t = ETH_P_8021Q | AR40XX_ESS_SERVICE_TAG_STAG;
+ ar40xx_write(priv, AR40XX_ESS_SERVICE_TAG, t);
+}
+
+static void
@ -1637,11 +1629,7 @@
+ u32 pvid = priv->vlan_id[priv->pvid[port]];
+
+ if (priv->vlan) {
+ if (priv->vlan_tagged & BIT(port))
+ egress = AR40XX_PORT_VLAN1_OUT_MODE_TAG;
+ else
+ egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
+
+ egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
+ ingress = AR40XX_IN_SECURE;
+ } else {
+ egress = AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH;
@ -1652,17 +1640,8 @@
+ t |= pvid << AR40XX_PORT_VLAN0_DEF_CVID_S;
+ ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), t);
+
+ t = egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
+
+ /* set CPU port to core port */
+ if (port == 0)
+ t |= AR40XX_PORT_VLAN1_CORE_PORT;
+
+ if (priv->vlan_tagged & BIT(port))
+ t |= AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
+ else
+ t |= AR40XX_PORT_VLAN1_PORT_TLS_MODE;
+
+ t = AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
+ t |= egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
+ ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t);
+
+ t = members;
@ -2180,7 +2159,7 @@
+MODULE_LICENSE("Dual BSD/GPL");
--- /dev/null
+++ b/drivers/net/phy/ar40xx.h
@@ -0,0 +1,342 @@
@@ -0,0 +1,337 @@
+/*
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
@ -2334,9 +2313,6 @@
+#define AR40XX_MIB_FUNC_NO_OP 0x0
+#define AR40XX_MIB_FUNC_FLUSH 0x1
+
+#define AR40XX_ESS_SERVICE_TAG 0x48
+#define AR40XX_ESS_SERVICE_TAG_STAG BIT(17)
+
+#define AR40XX_REG_PORT_STATUS(_i) (0x07c + (_i) * 4)
+#define AR40XX_PORT_SPEED BITS(0, 2)
+#define AR40XX_PORT_STATUS_SPEED_S 0
@ -2365,8 +2341,6 @@
+#define AR40XX_PORT_VLAN0_DEF_CVID_S 16
+
+#define AR40XX_REG_PORT_VLAN1(_i) (0x424 + (_i) * 0x8)
+#define AR40XX_PORT_VLAN1_CORE_PORT BIT(9)
+#define AR40XX_PORT_VLAN1_PORT_TLS_MODE BIT(7)
+#define AR40XX_PORT_VLAN1_PORT_VLAN_PROP BIT(6)
+#define AR40XX_PORT_VLAN1_OUT_MODE BITS(12, 2)
+#define AR40XX_PORT_VLAN1_OUT_MODE_S 12