fish/immortalwrt
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge pull request #139 from 1715173329/op-dev

Browse Source 
Merge Downstream Source
This commit is contained in:
CN_SZTL 2020-04-17 22:46:05 +08:00 committed by GitHub
commit 2dfdeef0c9
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
41 changed files with 769 additions and 599 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/kernel-version.mk
View File

@ -9,12 +9,12 @@ endif
LINUX_VERSION-4.9 = .219
LINUX_VERSION-4.14 = .176
LINUX_VERSION-4.19 = .115
LINUX_VERSION-5.4 = .32
LINUX_VERSION-5.4 = .33
LINUX_KERNEL_HASH-4.9.219 = 6b17238cced3e1c2753d6d5b4f662bd347d4651f07c35506b849eb10aea7bc44
LINUX_KERNEL_HASH-4.14.176 = bcae0956baaeb55dab5bad0401873fbc5baaa7fbe957ea6d27a5ab241cec5ca2
LINUX_KERNEL_HASH-4.19.115 = 11b2d97c8ea5ceb40c5e1d0bb87ad5b2b8c84560181bc60c0d28ec3a3e3801c2
LINUX_KERNEL_HASH-5.4.32 = 192d99fab7a47a537493b6d7eddb52892b98f8ada655c0bbb419b360a995f2b3
LINUX_KERNEL_HASH-5.4.33 = b5579621302a6169b389b64dd9ef084df3bb2f11d91dd73273f76e2323223861
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

4
package/lean/luci-app-n2n_v2/Makefile
View File

@ -7,10 +7,10 @@
include $(TOPDIR)/rules.mk
LUCI_TITLE:=n2n_v2 VPN Configuration module
LUCI_DEPENDS:=+n2n_v2
LUCI_DEPENDS:=+n2n-edge +n2n-supernode
LUCI_PKGARCH:=all
PKG_VERSION:=1.0
PKG_RELEASE:=3
PKG_RELEASE:=4
include $(TOPDIR)/feeds/luci/luci.mk

86
package/lean/n2n_v2/Makefile
View File

@ -1,53 +1,81 @@
#
# Copyright (C) 2007-2012 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
# Copyright (C) 2020 - ntop.org and contributors
#
include $(TOPDIR)/rules.mk
PKG_NAME:=n2n_v2
PKG_VERSION:=2.4
PKG_RELEASE:=2
PKG_REV=25563f31d9aba5f61b3e2fb42941b66dad1f531f
PKG_NAME:=n2n
PKG_SOURCE_URL:=https://github.com/ntop/n2n.git
PKG_SOURCE_VERSION:=bc0a6bf8b78c90dd902efa75891d41d2a489286e
PKG_VERSION:=2.6.0_git-$(PKG_SOURCE_VERSION)
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-r$(PKG_REV).tar.bz2
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_VERSION:=$(PKG_REV)
PKG_SOURCE_URL:=https://github.com/ntop/n2n.git
PKG_MAINTAINER:=Emanuele Faranda <faranda@ntop.org>
PKG_LICENSE:=GPL3
PKG_BUILD_PARALLEL:=1
# autogen fix
PKG_FIXUP:=autoreconf
include $(INCLUDE_DIR)/package.mk
define Package/n2n_v2
define Package/n2n/Default
SECTION:=net
CATEGORY:=Network
TITLE:=N2N VPN tunneling daemon(V2)
URL:=http://www.ntop.org/n2n/
TITLE:=N2N Peer-to-peer VPN
URL:=http://www.ntop.org/n2n
SUBMENU:=VPN
DEPENDS:=+libpthread +kmod-tun +libopenssl
endef
define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) \
$(TARGET_CONFIGURE_OPTS) \
CFLAGS="$(TARGET_CFLAGS)" \
INSTALL_PROG=":"
define Package/n2n-edge
$(call Package/n2n/Default)
TITLE+= client (edge node)
DEPENDS+=+kmod-tun +resolveip +libopenssl
endef
define Package/n2n_v2/install
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/edge $(1)/usr/sbin/
$(INSTALL_BIN) $(PKG_BUILD_DIR)/supernode $(1)/usr/sbin/
$(INSTALL_DIR) $(1)/etc/config
$(INSTALL_DATA) ./files/n2n_v2.config $(1)/etc/config/n2n_v2
define Package/n2n-supernode
$(call Package/n2n/Default)
TITLE+= server (supernode)
endef
define Package/n2n-edge/description
The client node for the N2N infrastructure
endef
define Package/n2n-supernode/description
The supernode for the N2N infrastructure
endef
define Build/Configure
( cd $(PKG_BUILD_DIR); ./autogen.sh )
$(call Build/Configure/Default)
endef
define Package/n2n-edge/conffiles
/etc/config/n2n-edge.conf
endef
define Package/n2n-edge/install
$(INSTALL_DIR) $(1)/usr/bin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/edge $(1)/usr/bin/
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/n2n_v2.init $(1)/etc/init.d/n2n_v2
$(INSTALL_DIR) $(1)/etc/config
$(INSTALL_DATA) ./files/n2n_v2.config $(1)/etc/config/n2n_v2
endef
define Package/n2n_v2/conffiles
/etc/config/n2n_v2
define Package/n2n-supernode/conffiles
/etc/config/n2n-supernode.conf
endef
$(eval $(call BuildPackage,n2n_v2))
define Package/n2n-supernode/install
$(INSTALL_DIR) $(1)/usr/bin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/supernode $(1)/usr/bin/
endef
$(eval $(call BuildPackage,n2n-edge))
$(eval $(call BuildPackage,n2n-supernode))

24
package/lean/n2n_v2/files/n2n_v2.config
View File

@ -1,15 +1,15 @@
config edge
option enabled '0'
option tunname 'n2n_edge'
option mode 'static'
option ipaddr '10.0.0.100'
option netmask '255.255.255.0'
option supernode '1.2.3.4'
option port '1234'
option community 'example'
option key 'password'
option route '0'
option enabled '0'
option tunname 'n2n0'
option mode 'static'
option ipaddr '10.0.0.100'
option netmask '255.255.255.0'
option supernode '1.2.3.4'
option port '1234'
option community 'example'
option key 'password'
option route '0'
config supernode
option enabled '0'
option port '1235'
option enabled '0'
option port '1235'

66
package/lean/n2n_v2/files/n2n_v2.init
View File

@ -1,64 +1,64 @@
#!/bin/sh /etc/rc.common
# Copyright (C) 2008-2012 OpenWrt.org
# Copyright (C) 2008-2020 OpenWrt.org
START=99
start_instance() {
local cfg="$1"
local cfg="$1"
config_get type "$cfg" TYPE
config_get type "$cfg" TYPE
case "$type" in
edge)
case "$type" in
edge)
config_get_bool enabled "$cfg" 'enabled' '0'
[ "$enabled" = "0" ] && return 1
config_get tunname "$cfg" 'tunname'
config_get mode "$cfg" 'mode'
config_get ipaddr "$cfg" 'ipaddr'
config_get ipaddr "$cfg" 'ipaddr'
config_get netmask "$cfg" 'netmask'
config_get mtu "$cfg" 'mtu'
config_get supernode "$cfg" 'supernode'
config_get port "$cfg" 'port'
config_get community "$cfg" 'community'
config_get key "$cfg" 'key'
config_get_bool route "$cfg" 'route' '0'
[ "$route" = "1" ] && args='-r'
config_get supernode "$cfg" 'supernode'
config_get port "$cfg" 'port'
config_get community "$cfg" 'community'
config_get key "$cfg" 'key'
config_get_bool route "$cfg" 'route' '0'
[ "$route" = "1" ] && args='-r'
[ "$mode" = 'dhcp' ] && ipaddr='0.0.0.0'
[ "-$mtu" != "-" ] && mtu="-M $mtu"
/usr/sbin/edge -d $tunname -a ${mode}:${ipaddr} -c $community $([ -n "$key" ] && echo -k $key) -s ${netmask} -l ${supernode}:${port} $args $mtu
;;
supernode)
/usr/bin/edge -d $tunname -a ${mode}:${ipaddr} -c $community $([ -n "$key" ] && echo -k $key) -s ${netmask} -l ${supernode}:${port} $args $mtu
;;
supernode)
config_get_bool enabled "$cfg" 'enabled' '0'
[ "$enabled" = "0" ] && return 1
config_get port "$cfg" port
/usr/sbin/supernode -l $port &
;;
esac
config_get port "$cfg" port
/usr/bin/supernode -l $port &
;;
esac
}
stop_instance() {
local cfg="$1"
local cfg="$1"
config_get type "$cfg" TYPE
config_get type "$cfg" TYPE
case "$type" in
edge)
killall -9 edge
;;
supernode)
killall -9 supernode
;;
esac
case "$type" in
edge)
killall -9 edge
;;
supernode)
killall -9 supernode
;;
esac
}
start() {
config_load 'n2n_v2'
config_foreach start_instance 'edge'
config_foreach start_instance 'supernode'
config_load 'n2n_v2'
config_foreach start_instance 'edge'
config_foreach start_instance 'supernode'
}
stop() {
config_load 'n2n_v2'
config_load 'n2n_v2'
killall -9 edge
ps | grep supernode | grep -v grep 2>&1 >/dev/null && killall -9 supernode
}

6
target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch
View File

@ -44,7 +44,7 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
#include "xhci.h"
#include "xhci-trace.h"
@@ -264,6 +266,458 @@ static void xhci_pme_acpi_rtd3_enable(st
@@ -265,6 +267,458 @@ static void xhci_pme_acpi_rtd3_enable(st
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
#endif /* CONFIG_ACPI */
@ -503,7 +503,7 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
/* called during probe() after chip reset completes */
static int xhci_pci_setup(struct usb_hcd *hcd)
{
@@ -305,6 +759,22 @@ static int xhci_pci_probe(struct pci_dev
@@ -306,6 +760,22 @@ static int xhci_pci_probe(struct pci_dev
struct hc_driver *driver;
struct usb_hcd *hcd;
@ -526,7 +526,7 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
driver = (struct hc_driver *)id->driver_data;
/* Prevent runtime suspending between USB-2 and USB-3 initialization */
@@ -363,6 +833,16 @@ static void xhci_pci_remove(struct pci_d
@@ -364,6 +834,16 @@ static void xhci_pci_remove(struct pci_d
{
struct xhci_hcd *xhci;

2
target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch
View File

@ -13,7 +13,7 @@ produce a noisy warning.
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -217,6 +217,7 @@ static void xhci_pci_quirks(struct devic
@@ -218,6 +218,7 @@ static void xhci_pci_quirks(struct devic
pdev->device == 0x0015) {
xhci->quirks |= XHCI_RESET_ON_RESUME;
xhci->quirks |= XHCI_ZERO_64B_REGS;

2
target/linux/ar71xx/patches-4.14/910-unaligned_access_hacks.patch
View File

@ -223,7 +223,7 @@
#include <linux/uaccess.h>
#include <linux/ipv6.h>
#include <linux/icmpv6.h>
@@ -820,10 +821,10 @@ static void tcp_v6_send_response(const s
@@ -819,10 +820,10 @@ static void tcp_v6_send_response(const s
topt = (__be32 *)(t1 + 1);
if (tsecr) {

68
target/linux/ath79/patches-4.19/410-spi-ath79-Implement-the-spi_mem-interface.patch Normal file
View File

@ -0,0 +1,68 @@
From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001
From: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Date: Mon, 10 Feb 2020 16:11:27 -0300
Subject: [PATCH] spi: ath79: Implement the spi_mem interface
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
---
drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -19,6 +19,7 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/spi/spi.h>
+#include <linux/spi/spi-mem.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
@@ -203,6 +204,39 @@ static u32 ath79_spi_txrx_mode0(struct s
return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
}
+static int ath79_exec_mem_op(struct spi_mem *mem,
+ const struct spi_mem_op *op)
+{
+ struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi);
+
+ /* Ensures that reading is performed on device connected
+ to hardware cs0 */
+ if (mem->spi->chip_select || gpio_is_valid(mem->spi->cs_gpio))
+ return -ENOTSUPP;
+
+ /* Only use for fast-read op. */
+ if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN ||
+ op->addr.nbytes != 3 || op->dummy.nbytes != 1)
+ return -ENOTSUPP;
+
+ /* disable GPIO mode */
+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
+
+ memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes);
+
+ /* enable GPIO mode */
+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
+
+ /* restore IOC register */
+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
+
+ return 0;
+}
+
+static const struct spi_controller_mem_ops ath79_mem_ops = {
+ .exec_op = ath79_exec_mem_op,
+};
+
static int ath79_spi_probe(struct platform_device *pdev)
{
struct spi_master *master;
@@ -237,6 +271,7 @@ static int ath79_spi_probe(struct platfo
ret = PTR_ERR(sp->base);
goto err_put_master;
}
+ master->mem_ops = &ath79_mem_ops;
sp->clk = devm_clk_get(&pdev->dev, "ahb");
if (IS_ERR(sp->clk)) {

2
target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch
View File

@ -214,7 +214,7 @@
#include <linux/uaccess.h>
#include <linux/ipv6.h>
#include <linux/icmpv6.h>
@@ -837,10 +838,10 @@ static void tcp_v6_send_response(const s
@@ -836,10 +837,10 @@ static void tcp_v6_send_response(const s
topt = (__be32 *)(t1 + 1);
if (tsecr) {

2
target/linux/bcm27xx/patches-4.19/950-0043-MMC-added-alternative-MMC-driver.patch
View File

@ -170,7 +170,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
goto out;
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -2230,7 +2230,8 @@ EXPORT_SYMBOL(mmc_erase);
@@ -2233,7 +2233,8 @@ EXPORT_SYMBOL(mmc_erase);
int mmc_can_erase(struct mmc_card *card)
{
if ((card->host->caps & MMC_CAP_ERASE) &&

2
target/linux/bcm27xx/patches-4.19/950-0339-rtc-rv3028-add-new-driver.patch
View File

@ -96,7 +96,7 @@ Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
+whwave,sd3078 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -625,6 +625,15 @@ config RTC_DRV_EM3027
@@ -626,6 +626,15 @@ config RTC_DRV_EM3027
This driver can also be built as a module. If so, the module
will be called rtc-em3027.

2
target/linux/bcm27xx/patches-4.19/950-0476-usb-xhci-Show-that-the-VIA-VL805-supports-LPM.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -224,6 +224,10 @@ static void xhci_pci_quirks(struct devic
@@ -225,6 +225,10 @@ static void xhci_pci_quirks(struct devic
pdev->device == 0x3432)
xhci->quirks |= XHCI_BROKEN_STREAMS;

2
target/linux/bcm27xx/patches-4.19/950-0609-xhci-add-quirk-for-host-controllers-that-don-t-updat.patch
View File

@ -23,7 +23,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -225,8 +225,10 @@ static void xhci_pci_quirks(struct devic
@@ -226,8 +226,10 @@ static void xhci_pci_quirks(struct devic
xhci->quirks |= XHCI_BROKEN_STREAMS;
if (pdev->vendor == PCI_VENDOR_ID_VIA &&

2
target/linux/bcm27xx/patches-4.19/950-0636-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch
View File

@ -33,7 +33,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
#define USB_VENDOR_ID_BELKIN 0x050d
#define USB_DEVICE_ID_FLIP_KVM 0x3201
@@ -1196,6 +1199,9 @@
@@ -1197,6 +1200,9 @@
#define USB_VENDOR_ID_XAT 0x2505
#define USB_DEVICE_ID_XAT_CSR 0x0220

2
target/linux/bcm27xx/patches-4.19/950-0710-ARM-dts-bcm283x-Define-MMC-interfaces-at-board-level.patch
View File

@ -124,7 +124,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
pinctrl-0 = <&uart0_gpio14>;
--- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
@@ -129,6 +129,13 @@
@@ -130,6 +130,13 @@
};
};

4
target/linux/bcm27xx/patches-4.19/950-0711-ARM-dts-bcm2835-rpi-zero-w-Fix-bus-width-of-sdhci.patch
View File

@ -18,9 +18,9 @@ Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
--- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
@@ -119,6 +119,7 @@
#address-cells = <1>;
@@ -120,6 +120,7 @@
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>;
+ bus-width = <4>;
mmc-pwrseq = <&wifi_pwrseq>;

4
target/linux/bcm27xx/patches-5.4/950-0223-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1450,6 +1450,103 @@ command_cleanup:
@@ -1452,6 +1452,103 @@ command_cleanup:
}
/*
@ -119,7 +119,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
* non-error returns are a promise to giveback() the urb later
* we drop ownership so next owner (or urb unlink) can get it
*/
@@ -5325,6 +5422,7 @@ static const struct hc_driver xhci_hc_dr
@@ -5327,6 +5424,7 @@ static const struct hc_driver xhci_hc_dr
.endpoint_reset = xhci_endpoint_reset,
.check_bandwidth = xhci_check_bandwidth,
.reset_bandwidth = xhci_reset_bandwidth,

492
target/linux/bcm47xx/patches-5.4/159-cpu_fixes.patch Normal file
View File

@ -0,0 +1,492 @@
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -26,6 +26,38 @@
extern void (*r4k_blast_dcache)(void);
extern void (*r4k_blast_icache)(void);
+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2)
+#include <asm/paccess.h>
+#include <linux/ssb/ssb.h>
+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
+
+static inline unsigned long bcm4710_dummy_rreg(void)
+{
+ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE));
+}
+
+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr))
+
+static inline unsigned long bcm4710_fill_tlb(void *addr)
+{
+ return *(unsigned long *)addr;
+}
+
+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr))
+
+static inline void bcm4710_protected_fill_tlb(void *addr)
+{
+ unsigned long x;
+ get_dbe(x, (unsigned long *)addr);;
+}
+
+#else
+#define BCM4710_DUMMY_RREG()
+
+#define BCM4710_FILL_TLB(addr)
+#define BCM4710_PROTECTED_FILL_TLB(addr)
+#endif
+
/*
* This macro return a properly sign-extended address suitable as base address
* for indexed cache operations. Two issues here:
@@ -56,6 +88,7 @@ static inline void flush_icache_line_ind
static inline void flush_dcache_line_indexed(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Index_Writeback_Inv_D, addr);
}
@@ -79,11 +112,13 @@ static inline void flush_icache_line(uns
static inline void flush_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Writeback_Inv_D, addr);
}
static inline void invalidate_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Invalidate_D, addr);
}
@@ -156,6 +191,7 @@ static inline int protected_flush_icache
#ifdef CONFIG_EVA
return protected_cachee_op(Hit_Invalidate_I, addr);
#else
+ BCM4710_DUMMY_RREG();
return protected_cache_op(Hit_Invalidate_I, addr);
#endif
}
@@ -169,6 +205,7 @@ static inline int protected_flush_icache
*/
static inline int protected_writeback_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
#ifdef CONFIG_EVA
return protected_cachee_op(Hit_Writeback_Inv_D, addr);
#else
@@ -526,8 +563,51 @@ static inline void invalidate_tcache_pag
: "r" (base), \
"i" (op));
+static inline void blast_dcache(void)
+{
+ unsigned long start = KSEG0;
+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways;
+ unsigned long end = (start + dcache_size);
+
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+
+ BCM4710_FILL_TLB(start);
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Hit_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page_indexed(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
+ unsigned long ws_end = current_cpu_data.dcache.ways <<
+ current_cpu_data.dcache.waybit;
+ unsigned long ws, addr;
+ for (ws = 0; ws < ws_end; ws += ws_inc) {
+ start = page + ws;
+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, addr);
+ }
+ }
+}
+
/* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */
-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \
+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra, war) \
static inline void extra##blast_##pfx##cache##lsize(void) \
{ \
unsigned long start = INDEX_BASE; \
@@ -537,6 +617,7 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
+ war \
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache##lsize##_unroll32(addr|ws, indexop); \
@@ -547,6 +628,7 @@ static inline void extra##blast_##pfx##c
unsigned long start = page; \
unsigned long end = page + PAGE_SIZE; \
\
+ war \
do { \
cache##lsize##_unroll32(start, hitop); \
start += lsize * 32; \
@@ -563,31 +645,32 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
+ war \
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache##lsize##_unroll32(addr|ws, indexop); \
}
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_)
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
-
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_, BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, , )
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, , )
+
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, , )
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, , )
#define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \
static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \
@@ -612,58 +695,29 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde
__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
/* build blast_xxx_range, protected_blast_xxx_range */
-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \
+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra, war, war2) \
static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \
unsigned long end) \
{ \
unsigned long lsize = cpu_##desc##_line_size(); \
- unsigned long lsize_2 = lsize * 2; \
- unsigned long lsize_3 = lsize * 3; \
- unsigned long lsize_4 = lsize * 4; \
- unsigned long lsize_5 = lsize * 5; \
- unsigned long lsize_6 = lsize * 6; \
- unsigned long lsize_7 = lsize * 7; \
- unsigned long lsize_8 = lsize * 8; \
unsigned long addr = start & ~(lsize - 1); \
- unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \
- int lines = (aend - addr) / lsize; \
- \
- while (lines >= 8) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- prot##cache_op(hitop, addr + lsize_2); \
- prot##cache_op(hitop, addr + lsize_3); \
- prot##cache_op(hitop, addr + lsize_4); \
- prot##cache_op(hitop, addr + lsize_5); \
- prot##cache_op(hitop, addr + lsize_6); \
- prot##cache_op(hitop, addr + lsize_7); \
- addr += lsize_8; \
- lines -= 8; \
- } \
- \
- if (lines & 0x4) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- prot##cache_op(hitop, addr + lsize_2); \
- prot##cache_op(hitop, addr + lsize_3); \
- addr += lsize_4; \
- } \
+ unsigned long aend = (end - 1) & ~(lsize - 1); \
\
- if (lines & 0x2) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- addr += lsize_2; \
- } \
+ war \
\
- if (lines & 0x1) { \
+ while (1) { \
+ war2 \
prot##cache_op(hitop, addr); \
+ if (addr == aend) \
+ break; \
+ addr += lsize; \
} \
}
#ifndef CONFIG_EVA
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, )
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, , BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, , , )
#else
@@ -697,15 +751,15 @@ __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache
__BUILD_PROT_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I)
#endif
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, )
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, , , )
__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \
- protected_, loongson2_)
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , )
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , )
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , )
+ protected_, loongson2_, , )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , , BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , , , )
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , , , )
/* blast_inv_dcache_range */
-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , )
-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , )
+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , , , BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , , , )
/* Currently, this is very specific to Loongson-3 */
#define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -429,6 +429,10 @@
#else
.set push
.set arch=r4000
+#ifdef CONFIG_BCM47XX
+ nop
+ nop
+#endif
eret
.set pop
#endif
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -21,6 +21,19 @@
#include <asm/war.h>
#include <asm/thread_info.h>
+#ifdef CONFIG_BCM47XX
+# ifdef eret
+# undef eret
+# endif
+# define eret \
+ .set push; \
+ .set noreorder; \
+ nop; \
+ nop; \
+ eret; \
+ .set pop;
+#endif
+
__INIT
/*
@@ -32,6 +45,9 @@
NESTED(except_vec3_generic, 0, sp)
.set push
.set noat
+#ifdef CONFIG_BCM47XX
+ nop
+#endif
mfc0 k1, CP0_CAUSE
andi k1, k1, 0x7c
#ifdef CONFIG_64BIT
@@ -52,6 +68,9 @@ NESTED(except_vec3_r4000, 0, sp)
.set push
.set arch=r4000
.set noat
+#ifdef CONFIG_BCM47XX
+ nop
+#endif
mfc0 k1, CP0_CAUSE
li k0, 31<<2
andi k1, k1, 0x7c
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -39,6 +39,9 @@
#include <asm/dma-coherence.h>
#include <asm/mips-cps.h>
+/* For enabling BCM4710 cache workarounds */
+static int bcm4710 = 0;
+
/*
* Bits describing what cache ops an SMP callback function may perform.
*
@@ -190,6 +193,9 @@ static void r4k_blast_dcache_user_page_s
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_page = blast_dcache_page;
+ else
if (dc_lsize == 0)
r4k_blast_dcache_user_page = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -208,6 +214,9 @@ static void r4k_blast_dcache_page_indexe
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed;
+ else
if (dc_lsize == 0)
r4k_blast_dcache_page_indexed = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -227,6 +236,9 @@ static void r4k_blast_dcache_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache = blast_dcache;
+ else
if (dc_lsize == 0)
r4k_blast_dcache = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -1775,6 +1787,17 @@ static void coherency_setup(void)
* silly idea of putting something else there ...
*/
switch (current_cpu_type()) {
+ case CPU_BMIPS3300:
+ {
+ u32 cm;
+ cm = read_c0_diag();
+ /* Enable icache */
+ cm |= (1 << 31);
+ /* Enable dcache */
+ cm |= (1 << 30);
+ write_c0_diag(cm);
+ }
+ break;
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
@@ -1821,6 +1844,15 @@ void r4k_cache_init(void)
extern void build_copy_page(void);
struct cpuinfo_mips *c = &current_cpu_data;
+ /* Check if special workarounds are required */
+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2)
+ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
+ printk("Enabling BCM4710A0 cache workarounds.\n");
+ bcm4710 = 1;
+ } else
+#endif
+ bcm4710 = 0;
+
probe_pcache();
probe_vcache();
setup_scache();
@@ -1897,7 +1929,15 @@ void r4k_cache_init(void)
*/
local_r4k___flush_cache_all(NULL);
+#ifdef CONFIG_BCM47XX
+ {
+ static void (*_coherency_setup)(void);
+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup);
+ _coherency_setup();
+ }
+#else
coherency_setup();
+#endif
board_cache_error_setup = r4k_cache_error_setup;
/*
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -980,6 +980,9 @@ void build_get_pgde32(u32 **p, unsigned
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
uasm_i_addu(p, ptr, tmp, ptr);
#else
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1341,6 +1344,9 @@ static void build_r4000_tlb_refill_handl
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
#else
+# ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+# endif
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
#endif
@@ -1352,6 +1358,9 @@ static void build_r4000_tlb_refill_handl
build_update_entries(&p, K0, K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+#endif
uasm_i_eret(&p); /* return from trap */
}
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
@@ -2052,6 +2061,9 @@ build_r4000_tlbchange_handler_head(u32 *
#ifdef CONFIG_64BIT
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
#else
+# ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+# endif
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
#endif
@@ -2098,6 +2110,9 @@ build_r4000_tlbchange_handler_tail(u32 *
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);
build_restore_work_registers(p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
uasm_i_eret(p); /* return from trap */
#ifdef CONFIG_64BIT

24
target/linux/generic/pending-5.4/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch Normal file
View File

@ -0,0 +1,24 @@
From d68b4aa22e8c625685bfad642dd7337948dc0ad1 Mon Sep 17 00:00:00 2001
From: Koen Vandeputte <koen.vandeputte@ncentric.com>
Date: Mon, 6 Jan 2020 13:07:56 +0100
Subject: [PATCH] mtd: spi-nor: add support for Gigadevice GD25D05
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
---
drivers/mtd/spi-nor/spi-nor.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -2230,6 +2230,11 @@ static const struct flash_info spi_nor_i
/* GigaDevice */
{
+ "gd25d05", INFO(0xc84010, 0, 64 * 1024, 1,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
+ {
"gd25q16", INFO(0xc84015, 0, 64 * 1024, 32,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)

6
target/linux/generic/pending-5.4/810-pci_disable_common_quirks.patch
View File

@ -33,7 +33,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* The Mellanox Tavor device gives false positive parity errors. Mark this
* device with a broken_parity_status to allow PCI scanning code to "skip"
@@ -3241,6 +3242,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
@@ -3307,6 +3308,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
@ -42,7 +42,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
* To work around this, query the size it should be configured to by the
@@ -3266,6 +3269,8 @@ static void quirk_intel_ntb(struct pci_d
@@ -3332,6 +3335,8 @@ static void quirk_intel_ntb(struct pci_d
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
@ -51,7 +51,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* Some BIOS implementations leave the Intel GPU interrupts enabled, even
* though no one is handling them (e.g., if the i915 driver is never
@@ -3304,6 +3309,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
@@ -3370,6 +3375,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);

4
target/linux/generic/pending-5.4/820-libata-Assign-OF-node-to-the-SCSI-device.patch
View File

@ -41,7 +41,7 @@ ChangeLog v1->v2:
#include "libata.h"
#include "libata-transport.h"
@@ -4573,6 +4574,34 @@ int ata_scsi_add_hosts(struct ata_host *
@@ -4570,6 +4571,34 @@ int ata_scsi_add_hosts(struct ata_host *
return rc;
}
@ -76,7 +76,7 @@ ChangeLog v1->v2:
void ata_scsi_scan_host(struct ata_port *ap, int sync)
{
int tries = 5;
@@ -4598,6 +4627,7 @@ void ata_scsi_scan_host(struct ata_port
@@ -4595,6 +4624,7 @@ void ata_scsi_scan_host(struct ata_port
NULL);
if (!IS_ERR(sdev)) {
dev->sdev = sdev;

2
target/linux/ipq40xx/patches-5.4/304-mtd-spi-nor-Add-support-for-mx25r3235f.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -2286,6 +2286,8 @@ static const struct flash_info spi_nor_i
@@ -2318,6 +2318,8 @@ static const struct flash_info spi_nor_i
{ "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },

1
target/linux/ipq806x/config-4.19
View File

@ -1,4 +1,3 @@
CONFIG_AHCI_IPQ=y
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_APQ_GCC_8084 is not set
# CONFIG_APQ_MMCC_8084 is not set

308
target/linux/ipq806x/patches-4.19/851-ata-add-sata-driver.patch
View File

@ -1,308 +0,0 @@
From c5ea64dcf7b5d45e402e78b9f291d521669b7b80 Mon Sep 17 00:00:00 2001
From: Kumar Gala <galak@codeaurora.org>
Date: Fri, 30 May 2014 15:35:40 -0500
Subject: [PATCH] ata: Add Qualcomm ARM SoC AHCI SATA host controller driver
Add support for the Qualcomm AHCI SATA controller that exists on several
SoC and specifically the IPQ806x family of chips. The IPQ806x SATA support
requires the associated IPQ806x SATA PHY Driver to be enabled as well.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Gokul Sriram Palanisamy <gpalan@codeaurora.org>
---
drivers/ata/ahci.h | 2 +-
drivers/ata/ahci_ipq.c | 248 ++++++++++++++++++++++++++++++++++++++
drivers/ata/Kconfig | 8 ++++++++
drivers/ata/Makefile | 1 +
4 files changed, 258 insertions(+), 1 deletions(-)
create mode 100644 drivers/ata/ahci_ipq.c
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -54,7 +54,7 @@
enum {
AHCI_MAX_PORTS = 32,
- AHCI_MAX_CLKS = 5,
+ AHCI_MAX_CLKS = 6,
AHCI_MAX_SG = 168, /* hardware max is 64K */
AHCI_DMA_BOUNDARY = 0xffffffff,
AHCI_MAX_CMDS = 32,
--- a/dev/null
+++ b/drivers/ata/ahci_ipq.c
@@ -0,0 +1,248 @@
+/* Copyright (c) 2015 - 2017, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pm.h>
+#include <linux/device.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/libata.h>
+#include <linux/ahci_platform.h>
+#include <linux/acpi.h>
+#include <linux/pci_ids.h>
+#include "libata.h"
+#include "ahci.h"
+
+#define IPQ_DRV_NAME "ahci-ipq"
+
+struct ipq_ahci_priv {
+ struct platform_device *ahci_pdev;
+ struct ahci_host_priv *hpriv;
+ void *preg_reset;
+ int pstate;
+};
+
+struct ipq_ahci_priv *ipqpriv;
+
+static const struct ata_port_info ipq_ahci_port_info = {
+ .flags = AHCI_FLAG_COMMON,
+ .pio_mask = ATA_PIO4,
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &ahci_platform_ops,
+};
+
+static struct scsi_host_template ahci_platform_sht = {
+ AHCI_SHT(IPQ_DRV_NAME),
+};
+
+#define SATA_PWR_STATE_DOWN 0x1
+#define SATA_PWR_STATE_UP 0x2
+#define SATA_RESET 0x00902c1c
+
+static void ipq_ahci_hard_reset(struct device *dev)
+{
+ u32 reg;
+
+ reg = readl_relaxed(ipqpriv->preg_reset);
+ writel_relaxed(reg | BIT(0), ipqpriv->preg_reset);
+ /* To make sure the write is complete before we move on */
+ mb();
+
+ reg = readl_relaxed(ipqpriv->preg_reset);
+ writel_relaxed(reg & (~BIT(0)), ipqpriv->preg_reset);
+ /* To make sure the write is complete before we move on */
+ mb();
+}
+
+static int ipq_ahci_suspend(struct device *dev)
+{
+ struct ata_host *host = dev_get_drvdata(dev);
+ struct device_type *apt = &ata_port_type;
+ const struct dev_pm_ops *pm = apt->pm;
+ struct ata_port *ap;
+ int ret = 0, i;
+
+ if (ipqpriv->pstate == SATA_PWR_STATE_UP) {
+ for (i = 0; i < host->n_ports; i++) {
+ ap = host->ports[i];
+ /* Issue Port PM Suspend */
+ ret = pm->runtime_suspend(&ap->tdev);
+ if (ret) {
+ dev_err(dev, "SATA controller port suspend failed\n");
+ return ret;
+ }
+ }
+
+ /* Issue Contoller PM Suspend */
+ ret = ahci_platform_suspend_host(dev);
+ if (ret) {
+ dev_err(dev, "SATA controller host suspend failed\n");
+ return ret;
+ }
+
+ for (i = 0; i < ipqpriv->hpriv->nports; i++) {
+ if (!ipqpriv->hpriv->phys[i])
+ continue;
+
+ phy_power_off(ipqpriv->hpriv->phys[i]);
+ phy_exit(ipqpriv->hpriv->phys[i]);
+ }
+
+ ahci_platform_disable_clks(ipqpriv->hpriv);
+ ipqpriv->pstate = SATA_PWR_STATE_DOWN;
+ } else {
+ dev_warn(dev, "SATA device already in suspended state");
+ }
+
+ return ret;
+}
+
+static int ipq_ahci_resume(struct device *dev)
+{
+ struct ata_host *host = dev_get_drvdata(dev);
+ struct device_type *apt = &ata_port_type;
+ const struct dev_pm_ops *pm = apt->pm;
+ struct ata_port *ap;
+ int ret = 0, i;
+
+ if (ipqpriv->pstate == SATA_PWR_STATE_DOWN) {
+
+ ahci_platform_enable_clks(ipqpriv->hpriv);
+
+ /* Issue SATA clock hard reset */
+ ipq_ahci_hard_reset(dev);
+
+ for (i = 0; i < ipqpriv->hpriv->nports; i++) {
+ if (!ipqpriv->hpriv->phys[i])
+ continue;
+
+ phy_init(ipqpriv->hpriv->phys[i]);
+ phy_power_on(ipqpriv->hpriv->phys[i]);
+ }
+
+ /* Issue Contoller PM Resume */
+ ret = ahci_platform_resume_host(dev);
+ if (ret) {
+ dev_err(dev, "SATA controller resume failed\n");
+ return ret;
+ }
+
+ for (i = 0; i < host->n_ports; i++) {
+ /* Issue Port PM Resume */
+ ap = host->ports[i];
+ ret = pm->runtime_resume(&ap->tdev);
+ if (ret) {
+ dev_err(dev, "SATA controller port resume failed\n");
+ return ret;
+ }
+ }
+ ipqpriv->pstate = SATA_PWR_STATE_UP;
+ } else {
+ dev_warn(dev, "SATA device already in resume state");
+ }
+
+ return ret;
+}
+
+static int ipq_ahci_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct ahci_host_priv *hpriv;
+ int rc;
+
+ hpriv = ahci_platform_get_resources(pdev);
+ if (IS_ERR(hpriv))
+ return PTR_ERR(hpriv);
+
+ rc = ahci_platform_enable_resources(hpriv);
+ if (rc)
+ return rc;
+
+ of_property_read_u32(dev->of_node,
+ "ports-implemented", &hpriv->force_port_map);
+
+ rc = ahci_platform_init_host(pdev, hpriv, &ipq_ahci_port_info,
+ &ahci_platform_sht);
+
+ if (rc)
+ goto disable_resources;
+
+ ipqpriv = devm_kzalloc(dev, sizeof(*ipqpriv), GFP_KERNEL);
+ if (!ipqpriv) {
+ dev_err(dev, "can't alloc ahci_host_priv\n");
+ rc = -ENOMEM;
+ goto disable_resources;
+ }
+
+ ipqpriv->ahci_pdev = pdev;
+ ipqpriv->hpriv = hpriv;
+ ipqpriv->pstate = SATA_PWR_STATE_UP;
+
+ ipqpriv->preg_reset = devm_ioremap(dev, SATA_RESET,
+ sizeof(*(ipqpriv->preg_reset)));
+
+ if (IS_ERR(ipqpriv->preg_reset)) {
+ dev_err(dev, "can't ioremap for preg_reset\n");
+ rc = -ENOMEM;
+ goto disable_resources;
+ }
+
+ return 0;
+
+ disable_resources:
+ ahci_platform_disable_resources(hpriv);
+ return rc;
+}
+
+int ipq_ahci_remove(struct platform_device *pdev)
+{
+ ata_platform_remove_one(pdev);
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(ipq_ahci_pm_ops, ahci_platform_suspend,
+ ahci_platform_resume);
+
+static const struct of_device_id ipq_ahci_of_match[] = {
+ { .compatible = "qcom,ipq806x-ahci", },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, ipq_ahci_of_match);
+
+static const struct acpi_device_id ahci_acpi_match[] = {
+ { ACPI_DEVICE_CLASS(PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff) },
+ {},
+};
+
+MODULE_DEVICE_TABLE(acpi, ahci_acpi_match);
+
+static struct platform_driver ipq_ahci_driver = {
+ .probe = ipq_ahci_probe,
+ .remove = ipq_ahci_remove,
+ .driver = {
+ .name = IPQ_DRV_NAME,
+ .of_match_table = ipq_ahci_of_match,
+ .acpi_match_table = ahci_acpi_match,
+ .pm = &ipq_ahci_pm_ops,
+ },
+};
+
+module_platform_driver(ipq_ahci_driver);
+
+MODULE_DESCRIPTION("IPQ806x AHCI SATA platform driver");
+MODULE_ALIAS("platform:ahci-ipq");
+MODULE_LICENSE("Dual BSD/GPL");
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -162,6 +162,14 @@ config AHCI_IMX
If unsure, say N.
+config AHCI_IPQ
+ tristate "Qualcomm Atheros IPQ806X AHCI SATA support"
+ help
+ This option enables support for the IPQ806X SoC's
+ onboard AHCI SATA.
+
+ If unsure, say N.
+
config AHCI_CEVA
tristate "CEVA AHCI SATA support"
depends on OF
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -18,6 +18,7 @@
obj-$(CONFIG_AHCI_DA850) += ahci_da850.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_DM816) += ahci_dm816.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o
+obj-$(CONFIG_AHCI_IPQ) += ahci_ipq.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_MTK) += ahci_mtk.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_OCTEON) += ahci_octeon.o

8
target/linux/ixp4xx/patches-4.9/160-delayed_uart_io.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -833,6 +833,7 @@ static int serial8250_probe(struct platf
@@ -832,6 +832,7 @@ static int serial8250_probe(struct platf
uart.port.get_mctrl = p->get_mctrl;
uart.port.pm = p->pm;
uart.port.dev = &dev->dev;
@ -8,7 +8,7 @@
uart.port.irqflags |= irqflag;
ret = serial8250_register_8250_port(&uart);
if (ret < 0) {
@@ -989,6 +990,7 @@ int serial8250_register_8250_port(struct
@@ -988,6 +989,7 @@ int serial8250_register_8250_port(struct
uart->bugs = up->bugs;
uart->port.mapbase = up->port.mapbase;
uart->port.mapsize = up->port.mapsize;
@ -105,7 +105,7 @@
case UPIO_AU:
p->serial_out(p, offset, value);
p->serial_in(p, UART_LCR); /* safe, no side-effects */
@@ -2759,6 +2779,7 @@ static int serial8250_request_std_resour
@@ -2763,6 +2783,7 @@ static int serial8250_request_std_resour
case UPIO_MEM32BE:
case UPIO_MEM16:
case UPIO_MEM:
@ -113,7 +113,7 @@
if (!port->mapbase)
break;
@@ -2797,6 +2818,7 @@ static void serial8250_release_std_resou
@@ -2801,6 +2822,7 @@ static void serial8250_release_std_resou
case UPIO_MEM32BE:
case UPIO_MEM16:
case UPIO_MEM:

48
target/linux/layerscape/patches-4.14/707-dpaa-ethernet-support-layerscape.patch
View File

@ -1304,7 +1304,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
}
static const struct net_device_ops dpaa_ops = {
@@ -2654,7 +2936,6 @@ static inline u16 dpaa_get_headroom(stru
@@ -2652,7 +2934,6 @@ static inline u16 dpaa_get_headroom(stru
static int dpaa_eth_probe(struct platform_device *pdev)
{
struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM] = {NULL};
@ -1312,7 +1312,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
struct net_device *net_dev = NULL;
struct dpaa_fq *dpaa_fq, *tmp;
struct dpaa_priv *priv = NULL;
@@ -2663,7 +2944,51 @@ static int dpaa_eth_probe(struct platfor
@@ -2661,7 +2942,51 @@ static int dpaa_eth_probe(struct platfor
int err = 0, i, channel;
struct device *dev;
@ -1365,7 +1365,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
/* Allocate this early, so we can store relevant information in
* the private area
@@ -2671,7 +2996,7 @@ static int dpaa_eth_probe(struct platfor
@@ -2669,7 +2994,7 @@ static int dpaa_eth_probe(struct platfor
net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA_ETH_TXQ_NUM);
if (!net_dev) {
dev_err(dev, "alloc_etherdev_mq() failed\n");
@ -1374,7 +1374,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
}
/* Do this here, so we can be verbose early */
@@ -2683,13 +3008,6 @@ static int dpaa_eth_probe(struct platfor
@@ -2681,13 +3006,6 @@ static int dpaa_eth_probe(struct platfor
priv->msg_enable = netif_msg_init(debug, DPAA_MSG_DEFAULT);
@ -1388,7 +1388,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
/* If fsl_fm_max_frm is set to a higher value than the all-common 1500,
* we choose conservatively and let the user explicitly set a higher
* MTU via ifconfig. Otherwise, the user may end up with different MTUs
@@ -2705,21 +3023,13 @@ static int dpaa_eth_probe(struct platfor
@@ -2703,21 +3021,13 @@ static int dpaa_eth_probe(struct platfor
priv->buf_layout[RX].priv_data_size = DPAA_RX_PRIV_DATA_SIZE; /* Rx */
priv->buf_layout[TX].priv_data_size = DPAA_TX_PRIV_DATA_SIZE; /* Tx */
@ -1414,7 +1414,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
/* the raw size of the buffers used for reception */
dpaa_bps[i]->raw_size = bpool_buffer_raw_size(i, DPAA_BPS_NUM);
/* avoid runtime computations by keeping the usable size here */
@@ -2727,11 +3037,8 @@ static int dpaa_eth_probe(struct platfor
@@ -2725,11 +3035,8 @@ static int dpaa_eth_probe(struct platfor
dpaa_bps[i]->dev = dev;
err = dpaa_bp_alloc_pool(dpaa_bps[i]);
@ -1428,7 +1428,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
priv->dpaa_bps[i] = dpaa_bps[i];
}
@@ -2742,7 +3049,7 @@ static int dpaa_eth_probe(struct platfor
@@ -2740,7 +3047,7 @@ static int dpaa_eth_probe(struct platfor
err = dpaa_alloc_all_fqs(dev, &priv->dpaa_fq_list, &port_fqs);
if (err < 0) {
dev_err(dev, "dpaa_alloc_all_fqs() failed\n");
@ -1437,7 +1437,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
}
priv->mac_dev = mac_dev;
@@ -2751,12 +3058,12 @@ static int dpaa_eth_probe(struct platfor
@@ -2749,12 +3056,12 @@ static int dpaa_eth_probe(struct platfor
if (channel < 0) {
dev_err(dev, "dpaa_get_channel() failed\n");
err = channel;
@ -1452,7 +1452,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
* and add this pool channel to each's dequeue mask.
*/
dpaa_eth_add_channel(priv->channel);
@@ -2771,20 +3078,20 @@ static int dpaa_eth_probe(struct platfor
@@ -2769,20 +3076,20 @@ static int dpaa_eth_probe(struct platfor
err = dpaa_eth_cgr_init(priv);
if (err < 0) {
dev_err(dev, "Error initializing CGR\n");
@ -1476,7 +1476,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
}
priv->tx_headroom = dpaa_get_headroom(&priv->buf_layout[TX]);
@@ -2794,7 +3101,7 @@ static int dpaa_eth_probe(struct platfor
@@ -2792,7 +3099,7 @@ static int dpaa_eth_probe(struct platfor
err = dpaa_eth_init_ports(mac_dev, dpaa_bps, DPAA_BPS_NUM, &port_fqs,
&priv->buf_layout[0], dev);
if (err)
@ -1485,7 +1485,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
/* Rx traffic distribution based on keygen hashing defaults to on */
priv->keygen_in_use = true;
@@ -2803,11 +3110,7 @@ static int dpaa_eth_probe(struct platfor
@@ -2801,11 +3108,7 @@ static int dpaa_eth_probe(struct platfor
if (!priv->percpu_priv) {
dev_err(dev, "devm_alloc_percpu() failed\n");
err = -ENOMEM;
@ -1498,7 +1498,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
}
priv->num_tc = 1;
@@ -2816,11 +3119,11 @@ static int dpaa_eth_probe(struct platfor
@@ -2814,11 +3117,11 @@ static int dpaa_eth_probe(struct platfor
/* Initialize NAPI */
err = dpaa_napi_add(net_dev);
if (err < 0)
@ -1512,7 +1512,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
dpaa_eth_sysfs_init(&net_dev->dev);
@@ -2829,32 +3132,21 @@ static int dpaa_eth_probe(struct platfor
@@ -2827,32 +3130,21 @@ static int dpaa_eth_probe(struct platfor
return 0;
@ -1551,7 +1551,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
return err;
}
@@ -2891,6 +3183,23 @@ static int dpaa_remove(struct platform_d
@@ -2889,6 +3181,23 @@ static int dpaa_remove(struct platform_d
return err;
}
@ -1575,7 +1575,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
static const struct platform_device_id dpaa_devtype[] = {
{
.name = "dpaa-ethernet",
@@ -2915,6 +3224,10 @@ static int __init dpaa_load(void)
@@ -2913,6 +3222,10 @@ static int __init dpaa_load(void)
pr_debug("FSL DPAA Ethernet driver\n");
@ -1698,7 +1698,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
+fsl_dpaa_mac-objs:= mac.o fman_dtsec.o fman_memac.o fman_tgec.o
--- a/drivers/net/ethernet/freescale/fman/fman.c
+++ b/drivers/net/ethernet/freescale/fman/fman.c
@@ -629,6 +629,7 @@ static void set_port_order_restoration(s
@@ -634,6 +634,7 @@ static void set_port_order_restoration(s
iowrite32be(tmp, &fpm_rg->fmfp_prc);
}
@ -1706,7 +1706,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
static void set_port_liodn(struct fman *fman, u8 port_id,
u32 liodn_base, u32 liodn_ofst)
{
@@ -646,6 +647,27 @@ static void set_port_liodn(struct fman *
@@ -651,6 +652,27 @@ static void set_port_liodn(struct fman *
iowrite32be(tmp, &fman->dma_regs->fmdmplr[port_id / 2]);
iowrite32be(liodn_ofst, &fman->bmi_regs->fmbm_spliodn[port_id - 1]);
}
@ -1734,7 +1734,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
static void enable_rams_ecc(struct fman_fpm_regs __iomem *fpm_rg)
{
@@ -1914,7 +1936,10 @@ _return:
@@ -1919,7 +1941,10 @@ _return:
static int fman_init(struct fman *fman)
{
struct fman_cfg *cfg = NULL;
@ -1746,7 +1746,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
if (is_init_done(fman->cfg))
return -EINVAL;
@@ -1934,6 +1959,7 @@ static int fman_init(struct fman *fman)
@@ -1939,6 +1964,7 @@ static int fman_init(struct fman *fman)
memset_io((void __iomem *)(fman->base_addr + CGP_OFFSET), 0,
fman->state->fm_port_num_of_cg);
@ -1754,7 +1754,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
/* Save LIODN info before FMan reset
* Skipping non-existent port 0 (i = 1)
*/
@@ -1953,6 +1979,9 @@ static int fman_init(struct fman *fman)
@@ -1958,6 +1984,9 @@ static int fman_init(struct fman *fman)
}
fman->liodn_base[i] = liodn_base;
}
@ -1764,7 +1764,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
err = fman_reset(fman);
if (err)
@@ -2181,8 +2210,12 @@ int fman_set_port_params(struct fman *fm
@@ -2186,8 +2215,12 @@ int fman_set_port_params(struct fman *fm
if (err)
goto return_err;
@ -1777,7 +1777,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
if (fman->state->rev_info.major < 6)
set_port_order_restoration(fman->fpm_regs, port_id);
@@ -2800,7 +2833,8 @@ static struct fman *read_dts_node(struct
@@ -2813,7 +2846,8 @@ static struct fman *read_dts_node(struct
of_node_put(muram_node);
@ -1789,7 +1789,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
__func__, irq, err);
--- a/drivers/net/ethernet/freescale/fman/fman.h
+++ b/drivers/net/ethernet/freescale/fman/fman.h
@@ -41,6 +41,7 @@
@@ -42,6 +42,7 @@
/* Frame queue Context Override */
#define FM_FD_CMD_FCO 0x80000000
#define FM_FD_CMD_RPD 0x40000000 /* Read Prepended Data */
@ -1797,7 +1797,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
#define FM_FD_CMD_DTC 0x10000000 /* Do L4 Checksum */
/* TX-Port: Unsupported Format */
@@ -345,8 +346,12 @@ struct fman {
@@ -346,8 +347,12 @@ struct fman {
unsigned long fifo_offset;
size_t fifo_size;

2
target/linux/layerscape/patches-4.14/806-rtc-support-layerscape.patch
View File

@ -65,7 +65,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
+};
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -433,6 +433,14 @@ config RTC_DRV_PCF85063
@@ -434,6 +434,14 @@ config RTC_DRV_PCF85063
This driver can also be built as a module. If so, the module
will be called rtc-pcf85063.

2
target/linux/layerscape/patches-4.14/807-usb-support-layerscape.patch
View File

@ -536,7 +536,7 @@ Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
irq = dwc3_gadget_get_irq(dwc);
if (irq < 0) {
@@ -3299,6 +3300,12 @@ int dwc3_gadget_init(struct dwc3 *dwc)
@@ -3298,6 +3299,12 @@ int dwc3_gadget_init(struct dwc3 *dwc)
dwc3_gadget_set_speed(&dwc->gadget, dwc->maximum_speed);

2
target/linux/layerscape/patches-4.14/816-pcie-support-layerscape.patch
View File

@ -610,7 +610,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
int err;
- int irq = 0;
int id;
char name[20];
char name[24];
enum pci_barno bar;
@@ -486,12 +665,15 @@ static int pci_endpoint_test_probe(struc
test->alignment = 0;

4
target/linux/mvebu/patches-4.19/300-mvneta-tx-queue-workaround.patch
View File

@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -4272,6 +4272,15 @@ static int mvneta_ethtool_set_eee(struct
@@ -4271,6 +4271,15 @@ static int mvneta_ethtool_set_eee(struct
return phylink_ethtool_set_eee(pp->phylink, eee);
}
@ -25,7 +25,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static const struct net_device_ops mvneta_netdev_ops = {
.ndo_open = mvneta_open,
.ndo_stop = mvneta_stop,
@@ -4282,6 +4291,7 @@ static const struct net_device_ops mvnet
@@ -4281,6 +4290,7 @@ static const struct net_device_ops mvnet
.ndo_fix_features = mvneta_fix_features,
.ndo_get_stats64 = mvneta_get_stats64,
.ndo_do_ioctl = mvneta_ioctl,

10
target/linux/mvebu/patches-4.19/531-net-mvneta-Add-support-for-2500Mbps-SGMII.patch
View File

@ -32,7 +32,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
#define MVNETA_MIB_COUNTERS_BASE 0x3000
#define MVNETA_MIB_LATE_COLLISION 0x7c
#define MVNETA_DA_FILT_SPEC_MCAST 0x3400
@@ -3359,6 +3361,7 @@ static void mvneta_validate(struct net_d
@@ -3358,6 +3360,7 @@ static void mvneta_validate(struct net_d
if (state->interface != PHY_INTERFACE_MODE_NA &&
state->interface != PHY_INTERFACE_MODE_QSGMII &&
state->interface != PHY_INTERFACE_MODE_SGMII &&
@ -40,7 +40,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
!phy_interface_mode_is_8023z(state->interface) &&
!phy_interface_mode_is_rgmii(state->interface)) {
bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
@@ -3371,9 +3374,15 @@ static void mvneta_validate(struct net_d
@@ -3370,9 +3373,15 @@ static void mvneta_validate(struct net_d
/* Asymmetric pause is unsupported */
phylink_set(mask, Pause);
@ -59,7 +59,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (!phy_interface_mode_is_8023z(state->interface)) {
/* 10M and 100M are only supported in non-802.3z mode */
@@ -3434,12 +3443,14 @@ static void mvneta_mac_config(struct net
@@ -3433,12 +3442,14 @@ static void mvneta_mac_config(struct net
struct mvneta_port *pp = netdev_priv(ndev);
u32 new_ctrl0, gmac_ctrl0 = mvreg_read(pp, MVNETA_GMAC_CTRL_0);
u32 new_ctrl2, gmac_ctrl2 = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
@ -74,7 +74,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
new_clk = gmac_clk & ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
new_an = gmac_an & ~(MVNETA_GMAC_INBAND_AN_ENABLE |
MVNETA_GMAC_INBAND_RESTART_AN |
@@ -3472,7 +3483,7 @@ static void mvneta_mac_config(struct net
@@ -3471,7 +3482,7 @@ static void mvneta_mac_config(struct net
if (state->duplex)
new_an |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
@ -83,7 +83,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED;
else if (state->speed == SPEED_100)
new_an |= MVNETA_GMAC_CONFIG_MII_SPEED;
@@ -3511,10 +3522,18 @@ static void mvneta_mac_config(struct net
@@ -3510,10 +3521,18 @@ static void mvneta_mac_config(struct net
MVNETA_GMAC_FORCE_LINK_DOWN);
}

4
target/linux/mvebu/patches-4.19/533-net-mvneta-Dont-advertise-2.5G-modes.patch
View File

@ -27,7 +27,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -3361,7 +3361,6 @@ static void mvneta_validate(struct net_d
@@ -3360,7 +3360,6 @@ static void mvneta_validate(struct net_d
if (state->interface != PHY_INTERFACE_MODE_NA &&
state->interface != PHY_INTERFACE_MODE_QSGMII &&
state->interface != PHY_INTERFACE_MODE_SGMII &&
@ -35,7 +35,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
!phy_interface_mode_is_8023z(state->interface) &&
!phy_interface_mode_is_rgmii(state->interface)) {
bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
@@ -3375,14 +3374,9 @@ static void mvneta_validate(struct net_d
@@ -3374,14 +3373,9 @@ static void mvneta_validate(struct net_d
/* Asymmetric pause is unsupported */
phylink_set(mask, Pause);

2
target/linux/mvebu/patches-4.19/534-net-mvneta-remove-redundant-check-for.patch
View File

@ -18,7 +18,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -4268,8 +4268,7 @@ static int mvneta_ethtool_set_eee(struct
@@ -4267,8 +4267,7 @@ static int mvneta_ethtool_set_eee(struct
/* The Armada 37x documents do not give limits for this other than
* it being an 8-bit register. */

22
target/linux/mvebu/patches-4.19/535-net-marvell-neta-add-comphy-support.patch
View File

@ -31,7 +31,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
struct mvneta_bm *bm_priv;
struct mvneta_bm_pool *pool_long;
@@ -3168,6 +3170,8 @@ static void mvneta_start_dev(struct mvne
@@ -3167,6 +3169,8 @@ static void mvneta_start_dev(struct mvne
{
int cpu;
@ -40,7 +40,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mvneta_max_rx_size_set(pp, pp->pkt_size);
mvneta_txq_max_tx_size_set(pp, pp->pkt_size);
@@ -3230,6 +3234,8 @@ static void mvneta_stop_dev(struct mvnet
@@ -3229,6 +3233,8 @@ static void mvneta_stop_dev(struct mvnet
mvneta_tx_reset(pp);
mvneta_rx_reset(pp);
@ -49,7 +49,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
}
static void mvneta_percpu_enable(void *arg)
@@ -3355,6 +3361,7 @@ static int mvneta_set_mac_addr(struct ne
@@ -3354,6 +3360,7 @@ static int mvneta_set_mac_addr(struct ne
static void mvneta_validate(struct net_device *ndev, unsigned long *supported,
struct phylink_link_state *state)
{
@ -57,7 +57,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
/* We only support QSGMII, SGMII, 802.3z and RGMII modes */
@@ -3375,8 +3382,13 @@ static void mvneta_validate(struct net_d
@@ -3374,8 +3381,13 @@ static void mvneta_validate(struct net_d
phylink_set(mask, Pause);
/* Half-duplex at speeds higher than 100Mbit is unsupported */
@ -73,7 +73,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (!phy_interface_mode_is_8023z(state->interface)) {
/* 10M and 100M are only supported in non-802.3z mode */
@@ -3390,6 +3402,11 @@ static void mvneta_validate(struct net_d
@@ -3389,6 +3401,11 @@ static void mvneta_validate(struct net_d
__ETHTOOL_LINK_MODE_MASK_NBITS);
bitmap_and(state->advertising, state->advertising, mask,
__ETHTOOL_LINK_MODE_MASK_NBITS);
@ -85,7 +85,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
}
static int mvneta_mac_link_state(struct net_device *ndev,
@@ -3401,7 +3418,9 @@ static int mvneta_mac_link_state(struct
@@ -3400,7 +3417,9 @@ static int mvneta_mac_link_state(struct
gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS);
if (gmac_stat & MVNETA_GMAC_SPEED_1000)
@ -96,7 +96,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
else if (gmac_stat & MVNETA_GMAC_SPEED_100)
state->speed = SPEED_100;
else
@@ -3516,12 +3535,20 @@ static void mvneta_mac_config(struct net
@@ -3515,12 +3534,20 @@ static void mvneta_mac_config(struct net
MVNETA_GMAC_FORCE_LINK_DOWN);
}
@ -117,7 +117,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (new_ctrl0 != gmac_ctrl0)
mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0);
if (new_ctrl2 != gmac_ctrl2)
@@ -4434,7 +4461,7 @@ static int mvneta_port_power_up(struct m
@@ -4433,7 +4460,7 @@ static int mvneta_port_power_up(struct m
if (phy_mode == PHY_INTERFACE_MODE_QSGMII)
mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO);
else if (phy_mode == PHY_INTERFACE_MODE_SGMII ||
@ -126,7 +126,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);
else if (!phy_interface_mode_is_rgmii(phy_mode))
return -EINVAL;
@@ -4451,6 +4478,7 @@ static int mvneta_probe(struct platform_
@@ -4450,6 +4477,7 @@ static int mvneta_probe(struct platform_
struct mvneta_port *pp;
struct net_device *dev;
struct phylink *phylink;
@ -134,7 +134,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
const char *dt_mac_addr;
char hw_mac_addr[ETH_ALEN];
const char *mac_from;
@@ -4476,6 +4504,14 @@ static int mvneta_probe(struct platform_
@@ -4475,6 +4503,14 @@ static int mvneta_probe(struct platform_
goto err_free_irq;
}
@ -149,7 +149,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
phylink = phylink_create(dev, pdev->dev.fwnode, phy_mode,
&mvneta_phylink_ops);
if (IS_ERR(phylink)) {
@@ -4492,6 +4528,7 @@ static int mvneta_probe(struct platform_
@@ -4491,6 +4527,7 @@ static int mvneta_probe(struct platform_
pp = netdev_priv(dev);
spin_lock_init(&pp->lock);
pp->phylink = phylink;

4
target/linux/mvebu/patches-4.19/536-net-marvell-neta-disable-comphy-when-setting-mode.patch
View File

@ -28,7 +28,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -3166,11 +3166,26 @@ static int mvneta_setup_txqs(struct mvne
@@ -3165,11 +3165,26 @@ static int mvneta_setup_txqs(struct mvne
return 0;
}
@ -56,7 +56,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
mvneta_max_rx_size_set(pp, pp->pkt_size);
mvneta_txq_max_tx_size_set(pp, pp->pkt_size);
@@ -3542,12 +3557,15 @@ static void mvneta_mac_config(struct net
@@ -3541,12 +3556,15 @@ static void mvneta_mac_config(struct net
if (state->speed == SPEED_2500)
new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE;

2
target/linux/mvebu/patches-4.19/537-net-mvneta-add-2500baset-support.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -3402,6 +3402,7 @@ static void mvneta_validate(struct net_d
@@ -3401,6 +3401,7 @@ static void mvneta_validate(struct net_d
phylink_set(mask, 1000baseX_Full);
}
if (pp->comphy || state->interface == PHY_INTERFACE_MODE_2500BASEX) {

2
target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
View File

@ -22,7 +22,7 @@ Signed-off-by: Tim Harvey <tharvey@gateworks.com>
#include <linux/platform_data/x86/apple.h>
#include <linux/pm_runtime.h>
#include <linux/switchtec.h>
@@ -5431,3 +5432,34 @@ out_disable:
@@ -5497,3 +5498,34 @@ out_disable:
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, 0x13b1,
PCI_CLASS_DISPLAY_VGA, 8,
quirk_reset_lenovo_thinkpad_p50_nvgpu);

77
target/linux/oxnas/patches-5.4/001-irqchip-versatile-fpga-Handle-chained-IRQs-properly.patch
View File

@ -1,77 +0,0 @@
From patchwork Thu Mar 19 02:34:48 2020
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Sungbo Eo <mans0n@gorani.run>
X-Patchwork-Id: 11446405
From: Sungbo Eo <mans0n@gorani.run>
To: Linus Walleij <linus.walleij@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-oxnas@groups.io
Subject: [PATCH v2] irqchip/versatile-fpga: Handle chained IRQs properly
Date: Thu, 19 Mar 2020 11:34:48 +0900
Message-Id: <20200319023448.1479701-1-mans0n@gorani.run>
In-Reply-To: <002b72cab9896fa5ac76a52e0cb503ff@kernel.org>
References: <002b72cab9896fa5ac76a52e0cb503ff@kernel.org>
MIME-Version: 1.0
List-Id: <linux-arm-kernel.lists.infradead.org>
Cc: Sungbo Eo <mans0n@gorani.run>, Neil Armstrong <narmstrong@baylibre.com>
Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org>
Enclose the chained handler with chained_irq_{enter,exit}(), so that the
muxed interrupts get properly acked.
This patch also fixes a reboot bug on OX820 SoC, where the jiffies timer
interrupt is never acked. The kernel waits a clock tick forever in
calibrate_delay_converge(), which leads to a boot hang.
Fixes: c41b16f8c9d9 ("ARM: integrator/versatile: consolidate FPGA IRQ handling code")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Cc: Neil Armstrong <narmstrong@baylibre.com>
---
v2: moved readl below chained_irq_enter()
added Fixes tag
drivers/irqchip/irq-versatile-fpga.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -6,6 +6,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
#include <linux/irqchip/versatile-fpga.h>
#include <linux/irqdomain.h>
#include <linux/module.h>
@@ -68,12 +69,16 @@ static void fpga_irq_unmask(struct irq_d
static void fpga_irq_handle(struct irq_desc *desc)
{
+ struct irq_chip *chip = irq_desc_get_chip(desc);
struct fpga_irq_data *f = irq_desc_get_handler_data(desc);
- u32 status = readl(f->base + IRQ_STATUS);
+ u32 status;
+ chained_irq_enter(chip, desc);
+
+ status = readl(f->base + IRQ_STATUS);
if (status == 0) {
do_bad_IRQ(desc);
- return;
+ goto out;
}
do {
@@ -82,6 +87,9 @@ static void fpga_irq_handle(struct irq_d
status &= ~(1 << irq);
generic_handle_irq(irq_find_mapping(f->domain, irq));
} while (status);
+
+out:
+ chained_irq_exit(chip, desc);
}
/*

56
target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch
View File

@ -1,56 +0,0 @@
From patchwork Sat Mar 21 13:38:42 2020
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Sungbo Eo <mans0n@gorani.run>
X-Patchwork-Id: 11451163
From: Sungbo Eo <mans0n@gorani.run>
To: linux-oxnas@groups.io, Linus Walleij <linus.walleij@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] irqchip/versatile-fpga: Apply clear-mask earlier
Date: Sat, 21 Mar 2020 22:38:42 +0900
Message-Id: <20200321133842.2408823-1-mans0n@gorani.run>
MIME-Version: 1.0
Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org>
Clear its own IRQs before the parent IRQ get enabled, so that the
remaining IRQs do not accidentally interrupt the parent IRQ controller.
This patch also fixes a reboot bug on OX820 SoC, where the remaining
rps-timer IRQ raises a GIC interrupt that is left pending. After that,
the rps-timer IRQ is cleared during driver initialization, and there's
no IRQ left in rps-irq when local_irq_enable() is called, which evokes
an error message "unexpected IRQ trap".
Fixes: bdd272cbb97a ("irqchip: versatile FPGA: support cascaded interrupts from DT")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Daniel Golle <daniel@makrotopia.org>
---
drivers/irqchip/irq-versatile-fpga.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -212,6 +212,9 @@ int __init fpga_irq_of_init(struct devic
if (of_property_read_u32(node, "valid-mask", &valid_mask))
valid_mask = 0;
+ writel(clear_mask, base + IRQ_ENABLE_CLEAR);
+ writel(clear_mask, base + FIQ_ENABLE_CLEAR);
+
/* Some chips are cascaded from a parent IRQ */
parent_irq = irq_of_parse_and_map(node, 0);
if (!parent_irq) {
@@ -221,9 +224,6 @@ int __init fpga_irq_of_init(struct devic
fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
- writel(clear_mask, base + IRQ_ENABLE_CLEAR);
- writel(clear_mask, base + FIQ_ENABLE_CLEAR);
-
/*
* On Versatile AB/PB, some secondary interrupts have a direct
* pass-thru to the primary controller for IRQs 20 and 22-31 which need

2
target/linux/ramips/patches-5.4/302-spi-nor-add-gd25q512.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -2265,6 +2265,11 @@ static const struct flash_info spi_nor_i
@@ -2270,6 +2270,11 @@ static const struct flash_info spi_nor_i
SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
.fixups = &gd25q256_fixups,
},