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uboot-rockchip: Update to 2024.01

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2024-01-10 19:24:31 +08:00
parent 9ec7fefa35
commit 3692daa57c
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
17 changed files with 1010 additions and 235 deletions
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4
package/boot/uboot-rockchip/Makefile
View File

@ -5,9 +5,9 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2024.01-rc5
PKG_VERSION:=2024.01
PKG_RELEASE:=1
PKG_HASH:=5fc8ec286587118ac2a8e9ea12f5e19f8105847052428a551af1be772e17b1cd
PKG_HASH:=b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>

57
package/boot/uboot-rockchip/patches/100-spl-Add-Kconfig-options-for-ADC.patch Normal file
View File

@ -0,0 +1,57 @@
From: Chris Morgan <macroalpha82@gmail.com>
To: u-boot@lists.denx.de
Cc: andre.przywara@arm.com, kever.yang@rock-chips.com,
philipp.tomsich@vrull.eu, sjg@chromium.org, jagan@edgeble.ai,
jonas@kwiboo.se, Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH V4 2/7] spl: Add Kconfig options for ADC
Date: Tue, 2 Jan 2024 09:46:49 -0600 [thread overview]
Message-ID: <20240102154654.191055-3-macroalpha82@gmail.com> (raw)
In-Reply-To: <20240102154654.191055-1-macroalpha82@gmail.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add kconfig options to enable ADC in SPL
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
common/spl/Kconfig | 7 +++++++
drivers/Makefile | 1 +
drivers/adc/Makefile | 2 +-
3 files changed, 9 insertions(+), 1 deletion(-)
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -579,6 +579,13 @@ config SPL_FIT_IMAGE_TINY
ensure this information is available to the next image
invoked).
+config SPL_ADC
+ bool "Support ADC drivers"
+ help
+ Enable ADC drivers in SPL. These drivers can allow the reading of
+ analog values from one or more channels. Enable this option to
+ build the drivers in drivers/adc as part of an SPL build.
+
config SPL_CACHE
bool "Support CACHE drivers"
help
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_$(SPL_)ADC) += adc/
obj-$(CONFIG_$(SPL_TPL_)BIOSEMU) += bios_emulator/
obj-$(CONFIG_$(SPL_TPL_)BLK) += block/
obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
--- a/drivers/adc/Makefile
+++ b/drivers/adc/Makefile
@@ -4,7 +4,7 @@
# Przemyslaw Marczak <p.marczak@samsung.com>
#
-obj-$(CONFIG_ADC) += adc-uclass.o
+obj-$(CONFIG_$(SPL_)ADC) += adc-uclass.o
obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o

71
package/boot/uboot-rockchip/patches/102-rockchip-handle-bootrom-recovery-mode-in-spl.patch → package/boot/uboot-rockchip/patches/101-rockchip-boot_mode-Allow-rockchip_dnl_key_pressed-in-SPL.patch
View File

@ -1,22 +1,24 @@
From: Peter Geis <pgwipeout@gmail.com>
To: Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Kever Yang <kever.yang@rock-chips.com>
Cc: Peter Geis <pgwipeout@gmail.com>, u-boot@lists.denx.de
Subject: [PATCH v1 06/11] rockchip: handle bootrom recovery mode in spl
Date: Mon, 21 Feb 2022 20:31:25 -0500 [thread overview]
Message-ID: <20220222013131.3114990-7-pgwipeout@gmail.com> (raw)
In-Reply-To: <20220222013131.3114990-1-pgwipeout@gmail.com>
From: Chris Morgan <macroalpha82@gmail.com>
To: u-boot@lists.denx.de
Cc: andre.przywara@arm.com, kever.yang@rock-chips.com,
philipp.tomsich@vrull.eu, sjg@chromium.org, jagan@edgeble.ai,
jonas@kwiboo.se, Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH V4 3/7] rockchip: boot_mode: Allow rockchip_dnl_key_pressed() in SPL
Date: Tue, 2 Jan 2024 09:46:50 -0600 [thread overview]
Message-ID: <20240102154654.191055-4-macroalpha82@gmail.com> (raw)
In-Reply-To: <20240102154654.191055-1-macroalpha82@gmail.com>
Fixup the bootrom recovery mode code to function in spl, so we can
handle recovery mode in case u-boot loading is broken.
From: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Update the rockchip_dnl_key_pressed() so that it can run in
SPL. Also change the ADC channel to a define that can be
overridden by a board specific option.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm/mach-rockchip/Makefile | 6 +++---
arch/arm/mach-rockchip/boot_mode.c | 4 +++-
arch/arm/mach-rockchip/rk3568/rk3568.c | 23 +++++++++++++++++++++++
3 files changed, 29 insertions(+), 4 deletions(-)
arch/arm/mach-rockchip/Makefile | 4 ++--
arch/arm/mach-rockchip/boot_mode.c | 11 ++++++++++-
2 files changed, 12 insertions(+), 3 deletions(-)
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@ -30,8 +32,7 @@ Signed-off-by: Peter Geis <pgwipeout@gmail.com>
# inside of boot_mode.c when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0. This way,
# we can have the preprocessor correctly recognise both 0x0 and 0
# meaning "turn it off".
-obj-y += boot_mode.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += boot_mode.o
obj-y += boot_mode.o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o
@ -39,16 +40,42 @@ Signed-off-by: Peter Geis <pgwipeout@gmail.com>
endif
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -52,7 +52,7 @@ __weak int rockchip_dnl_key_pressed(void
@@ -38,6 +38,10 @@ void set_back_to_bootrom_dnl_flag(void)
#define KEY_DOWN_MIN_VAL 0
#define KEY_DOWN_MAX_VAL 30
+#ifndef RK_DNL_ADC_CHAN
+#define RK_DNL_ADC_CHAN 0
+#endif
+
__weak int rockchip_dnl_key_pressed(void)
{
unsigned int val;
@@ -52,7 +56,8 @@ __weak int rockchip_dnl_key_pressed(void
ret = -ENODEV;
uclass_foreach_dev(dev, uc) {
if (!strncmp(dev->name, "saradc", 6)) {
- ret = adc_channel_single_shot(dev->name, 1, &val);
+ ret = adc_channel_single_shot(dev->name, 0, &val);
+ ret = adc_channel_single_shot(dev->name,
+ RK_DNL_ADC_CHAN, &val);
break;
}
}
@@ -90,6 +90,7 @@ int setup_boot_mode(void)
@@ -73,11 +78,13 @@ __weak int rockchip_dnl_key_pressed(void
void rockchip_dnl_mode_check(void)
{
+#if CONFIG_IS_ENABLED(ADC)
if (rockchip_dnl_key_pressed()) {
printf("download key pressed, entering download mode...");
set_back_to_bootrom_dnl_flag();
do_reset(NULL, 0, 0, NULL);
}
+#endif
}
int setup_boot_mode(void)
@@ -90,6 +97,7 @@ int setup_boot_mode(void)
boot_mode = readl(reg);
debug("%s: boot mode 0x%08x\n", __func__, boot_mode);
@ -56,7 +83,7 @@ Signed-off-by: Peter Geis <pgwipeout@gmail.com>
/* Clear boot mode */
writel(BOOT_NORMAL, reg);
@@ -103,6 +104,7 @@ int setup_boot_mode(void)
@@ -103,6 +111,7 @@ int setup_boot_mode(void)
env_set("preboot", "setenv preboot; ums mmc 0");
break;
}

40
package/boot/uboot-rockchip/patches/101-spl-support-adc-drivers-in-spl.patch
View File

@ -1,40 +0,0 @@
From: Peter Geis <pgwipeout@gmail.com>
Cc: Peter Geis <pgwipeout@gmail.com>, u-boot@lists.denx.de
Subject: [PATCH v1 05/11] spl: support adc drivers in spl
Date: Mon, 21 Feb 2022 20:31:24 -0500 [thread overview]
Message-ID: <20220222013131.3114990-6-pgwipeout@gmail.com> (raw)
In-Reply-To: <20220222013131.3114990-1-pgwipeout@gmail.com>
In order to handle the rockchip recovery handler in spl, we need the adc
code to be available in spl.
Add a toggle to allow adc drivers to function in spl.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
common/spl/Kconfig | 5 +++++
drivers/Makefile | 1 +
2 files changed, 6 insertions(+)
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -579,6 +579,11 @@ config SPL_FIT_IMAGE_TINY
ensure this information is available to the next image
invoked).
+config SPL_ADC
+ bool "Support ADC drivers in SPL"
+ help
+ Enable ADC drivers in SPL.
+
config SPL_CACHE
bool "Support CACHE drivers"
help
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_$(SPL_)ADC) += adc/
obj-$(CONFIG_$(SPL_TPL_)BIOSEMU) += bios_emulator/
obj-$(CONFIG_$(SPL_TPL_)BLK) += block/
obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/

561
package/boot/uboot-rockchip/patches/102-configs-rockchip-Use-dwc3-generic-driver-on-RK3328-and.patch Normal file
View File

@ -0,0 +1,561 @@
From a7503c6fffae2d7ec85f92b76d64f2cfd1a464c5 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 12 Nov 2023 17:48:57 +0000
Subject: [PATCH] configs: rockchip: Use dwc3-generic driver on RK3328 and
RK3399
Complete the transition away from xhci-dwc3 and dwc3-of-simple drivers
and change to use the dwc3-generic driver on remaining RK3328 and RK3399
boards.
MISC, USB_DWC3 and USB_DWC3_GENERIC is enabled on boards that used to
enable USB_XHCI_DWC3. USB_XHCI_DWC3 is dropped from updated boards along
with the default y of USB_XHCI_DWC3_OF_SIMPLE.
There is no intended change in functionality with this changes, USB 3.0
is expected to continue same as before this change.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
configs/chromebook_bob_defconfig | 2 +-
configs/chromebook_kevin_defconfig | 2 +-
configs/eaidk-610-rk3399_defconfig | 4 +++-
configs/evb-rk3399_defconfig | 1 -
configs/firefly-rk3399_defconfig | 1 -
configs/khadas-edge-captain-rk3399_defconfig | 4 +++-
configs/khadas-edge-rk3399_defconfig | 4 +++-
configs/khadas-edge-v-rk3399_defconfig | 4 +++-
configs/leez-rk3399_defconfig | 4 +++-
configs/nanopc-t4-rk3399_defconfig | 3 ++-
configs/nanopi-m4-2gb-rk3399_defconfig | 4 +++-
configs/nanopi-m4-rk3399_defconfig | 4 +++-
configs/nanopi-m4b-rk3399_defconfig | 4 +++-
configs/nanopi-neo4-rk3399_defconfig | 4 +++-
configs/nanopi-r4s-rk3399_defconfig | 3 ++-
configs/orangepi-r1-plus-lts-rk3328_defconfig | 3 ++-
configs/orangepi-r1-plus-rk3328_defconfig | 3 ++-
configs/orangepi-rk3399_defconfig | 4 +++-
configs/pinebook-pro-rk3399_defconfig | 1 -
configs/pinephone-pro-rk3399_defconfig | 1 -
configs/puma-rk3399_defconfig | 1 -
configs/roc-pc-mezzanine-rk3399_defconfig | 1 -
configs/roc-pc-rk3399_defconfig | 1 -
configs/rock-4c-plus-rk3399_defconfig | 1 -
configs/rock-4se-rk3399_defconfig | 1 -
configs/rock-pi-4-rk3399_defconfig | 1 -
configs/rock-pi-4c-rk3399_defconfig | 1 -
configs/rock-pi-n10-rk3399pro_defconfig | 1 -
configs/rock960-rk3399_defconfig | 3 ++-
configs/rockpro64-rk3399_defconfig | 1 -
drivers/usb/host/Kconfig | 1 -
31 files changed, 42 insertions(+), 31 deletions(-)
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -98,12 +98,12 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -99,12 +99,12 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/eaidk-610-rk3399_defconfig
+++ b/configs/eaidk-610-rk3399_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,8 +57,9 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -66,7 +66,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -66,7 +66,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/khadas-edge-captain-rk3399_defconfig
+++ b/configs/khadas-edge-captain-rk3399_defconfig
@@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -61,11 +62,12 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
--- a/configs/khadas-edge-rk3399_defconfig
+++ b/configs/khadas-edge-rk3399_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -60,11 +61,12 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
--- a/configs/khadas-edge-v-rk3399_defconfig
+++ b/configs/khadas-edge-v-rk3399_defconfig
@@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -61,11 +62,12 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
--- a/configs/leez-rk3399_defconfig
+++ b/configs/leez-rk3399_defconfig
@@ -39,6 +39,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
--- a/configs/nanopc-t4-rk3399_defconfig
+++ b/configs/nanopc-t4-rk3399_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -60,10 +61,10 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/nanopi-m4-2gb-rk3399_defconfig
+++ b/configs/nanopi-m4-2gb-rk3399_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/nanopi-m4-rk3399_defconfig
+++ b/configs/nanopi-m4-rk3399_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/nanopi-m4b-rk3399_defconfig
+++ b/configs/nanopi-m4b-rk3399_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/nanopi-neo4-rk3399_defconfig
+++ b/configs/nanopi-neo4-rk3399_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/nanopi-r4s-rk3399_defconfig
+++ b/configs/nanopi-r4s-rk3399_defconfig
@@ -63,9 +63,10 @@ CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -71,6 +71,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -99,7 +100,6 @@ CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
@@ -107,6 +107,7 @@ CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_SPL_TINY_MEMSET=y
--- a/configs/orangepi-r1-plus-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -71,6 +71,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -99,7 +100,6 @@ CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
@@ -107,6 +107,7 @@ CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_SPL_TINY_MEMSET=y
--- a/configs/orangepi-rk3399_defconfig
+++ b/configs/orangepi-rk3399_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
--- a/configs/pinebook-pro-rk3399_defconfig
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -96,7 +96,6 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
--- a/configs/pinephone-pro-rk3399_defconfig
+++ b/configs/pinephone-pro-rk3399_defconfig
@@ -85,7 +85,6 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -97,7 +97,6 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -81,7 +81,6 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -82,7 +82,6 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
--- a/configs/rock-4c-plus-rk3399_defconfig
+++ b/configs/rock-4c-plus-rk3399_defconfig
@@ -74,7 +74,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/rock-4se-rk3399_defconfig
+++ b/configs/rock-4se-rk3399_defconfig
@@ -76,7 +76,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -77,7 +77,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/rock-pi-4c-rk3399_defconfig
+++ b/configs/rock-pi-4c-rk3399_defconfig
@@ -74,7 +74,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/rock-pi-n10-rk3399pro_defconfig
+++ b/configs/rock-pi-n10-rk3399pro_defconfig
@@ -68,7 +68,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -50,6 +50,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -70,12 +71,12 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -93,7 +93,6 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -39,7 +39,6 @@ config USB_XHCI_DWC3
config USB_XHCI_DWC3_OF_SIMPLE
bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
depends on DM_USB
- default y if ARCH_ROCKCHIP
default y if DRA7XX
help
Support USB2/3 functionality in simple SoC integrations with

131
package/boot/uboot-rockchip/patches/103-rockchip-board-Remove-dwc3-usb-init-and-gadget-handler.patch Normal file
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@ -0,0 +1,131 @@
From ed7a42771f3b72c2cd51942b525ea6ba8935578d Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 12 Nov 2023 17:48:58 +0000
Subject: [PATCH] rockchip: board: Remove dwc3 usb init and gadget handler
functions
Remove board_usb_init() and dm_usb_gadget_handle_interrupts() functions
related to dwc3, they use e.g. a hard-coded reg address for RK3399 and
are obsolete with use of DM_USB_GADGET.
Use of DM_USB_GADGET, USB_DWC3_GENERIC and USB_DWC3_GADGET have replaced
same feature provided by the removed functions on RK3399 boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-rockchip/board.c | 30 +-----------------------
configs/nanopc-t6-rk3588_defconfig | 1 -
configs/orangepi-5-plus-rk3588_defconfig | 1 -
configs/orangepi-5-rk3588s_defconfig | 1 -
configs/rock5a-rk3588s_defconfig | 1 -
configs/rock5b-rk3588_defconfig | 1 -
7 files changed, 2 insertions(+), 34 deletions(-)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1974,6 +1974,7 @@ config ARCH_ROCKCHIP
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
+ select DM_USB_GADGET if USB_DWC3_GADGET
select ENABLE_ARM_SOC_BOOT0_HOOK
select OF_CONTROL
select SPI
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -208,10 +208,8 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_USB_GADGET)
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
#include <usb.h>
-
-#if defined(CONFIG_USB_GADGET_DWC2_OTG)
#include <linux/usb/otg.h>
#include <usb/dwc2_udc.h>
@@ -287,32 +285,6 @@ int board_usb_cleanup(int index, enum us
}
#endif /* CONFIG_USB_GADGET_DWC2_OTG */
-#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
-#include <dwc3-uboot.h>
-
-static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
- .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
-};
-
-int dm_usb_gadget_handle_interrupts(struct udevice *dev)
-{
- dwc3_uboot_handle_interrupt(dev);
- return 0;
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- return dwc3_uboot_init(&dwc3_device_data);
-}
-#endif /* CONFIG_USB_DWC3_GADGET */
-
-#endif /* CONFIG_USB_GADGET */
-
#if IS_ENABLED(CONFIG_FASTBOOT)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
--- a/configs/nanopc-t6-rk3588_defconfig
+++ b/configs/nanopc-t6-rk3588_defconfig
@@ -91,7 +91,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
--- a/configs/orangepi-5-plus-rk3588_defconfig
+++ b/configs/orangepi-5-plus-rk3588_defconfig
@@ -94,7 +94,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
--- a/configs/orangepi-5-rk3588s_defconfig
+++ b/configs/orangepi-5-rk3588s_defconfig
@@ -91,7 +91,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
--- a/configs/rock5a-rk3588s_defconfig
+++ b/configs/rock5a-rk3588s_defconfig
@@ -75,7 +75,6 @@ CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -99,7 +99,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y

87
package/boot/uboot-rockchip/patches/103-rockchip-move-dwc3-config-to-chip-specific-handler.patch
View File

@ -1,87 +0,0 @@
From: Peter Geis <pgwipeout@gmail.com>
To: Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Kever Yang <kever.yang@rock-chips.com>
Cc: Peter Geis <pgwipeout@gmail.com>, u-boot@lists.denx.de
Subject: [PATCH v1 09/11] rockchip: move dwc3 config to chip specific handler
Date: Mon, 21 Feb 2022 20:31:28 -0500 [thread overview]
Message-ID: <20220222013131.3114990-10-pgwipeout@gmail.com> (raw)
In-Reply-To: <20220222013131.3114990-1-pgwipeout@gmail.com>
The dwc3 code in the mach-rockchip board file is specific to the rk3399.
Move it to the rk3399 chip specific code.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
arch/arm/mach-rockchip/board.c | 24 ---------------------
arch/arm/mach-rockchip/rk3399/rk3399.c | 29 ++++++++++++++++++++++++++
2 files changed, 29 insertions(+), 24 deletions(-)
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -287,30 +287,6 @@ int board_usb_cleanup(int index, enum us
}
#endif /* CONFIG_USB_GADGET_DWC2_OTG */
-#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
-#include <dwc3-uboot.h>
-
-static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
- .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
-};
-
-int dm_usb_gadget_handle_interrupts(struct udevice *dev)
-{
- dwc3_uboot_handle_interrupt(dev);
- return 0;
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- return dwc3_uboot_init(&dwc3_device_data);
-}
-#endif /* CONFIG_USB_DWC3_GADGET */
-
#endif /* CONFIG_USB_GADGET */
#if IS_ENABLED(CONFIG_FASTBOOT)
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -283,3 +283,32 @@ void spl_board_init(void)
}
}
#endif
+
+#if defined(CONFIG_USB_GADGET)
+#include <usb.h>
+
+#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
+#include <dwc3-uboot.h>
+
+static struct dwc3_device dwc3_device_data = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = 0xfe800000,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 0,
+ .dis_u2_susphy_quirk = 1,
+ .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
+};
+
+int dm_usb_gadget_handle_interrupts(struct udevice *dev)
+{
+ dwc3_uboot_handle_interrupt(dev);
+ return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif /* CONFIG_USB_DWC3_GADGET */
+
+#endif /* CONFIG_USB_GADGET */

53
package/boot/uboot-rockchip/patches/104-rockchip-rk3568-add-dwc3-otg-support.patch
View File

@ -1,53 +0,0 @@
From: Peter Geis <pgwipeout@gmail.com>
To: Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Kever Yang <kever.yang@rock-chips.com>
Cc: Peter Geis <pgwipeout@gmail.com>, u-boot@lists.denx.de
Subject: [PATCH v1 10/11] rockchip: rk3568: add dwc3 otg support
Date: Mon, 21 Feb 2022 20:31:29 -0500 [thread overview]
Message-ID: <20220222013131.3114990-11-pgwipeout@gmail.com> (raw)
In-Reply-To: <20220222013131.3114990-1-pgwipeout@gmail.com>
Add the required platform data to the rk3568 chip config, in order to
support dwc3 otg on this chip.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
arch/arm/mach-rockchip/rk3568/rk3568.c | 29 ++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -158,3 +158,32 @@ void spl_board_init(void)
setup_boot_mode();
}
#endif
+
+#if defined(CONFIG_USB_GADGET)
+#include <usb.h>
+
+#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
+#include <dwc3-uboot.h>
+
+static struct dwc3_device dwc3_device_data = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = 0xfcc00000,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 0,
+ .dis_u2_susphy_quirk = 1,
+ .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
+};
+
+int dm_usb_gadget_handle_interrupts(struct udevice *dev)
+{
+ dwc3_uboot_handle_interrupt(dev);
+ return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif /* CONFIG_USB_DWC3_GADGET */
+
+#endif /* CONFIG_USB_GADGET */

27
package/boot/uboot-rockchip/patches/104-usb-dwc3-of-simple-Remove-Amlogic-and-Rockchip-compatible.patch Normal file
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@ -0,0 +1,27 @@
From 6b211613625eb264c22bbf3a53fa8cb1014d6da3 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 9 May 2023 01:32:22 +0000
Subject: [PATCH] usb: dwc3-of-simple: Remove Amlogic and Rockchip compatible
Remove the rockchip,rk3399-dwc3 compatible from the dwc3-of-simple
driver now that all boards have changed to use the dwc3-generic driver.
Also remove the amlogic,meson-gxl-dwc3 compatible, it is no longer in
use by any device tree in mainline linux or U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/usb/host/dwc3-of-simple.c | 2 --
1 file changed, 2 deletions(-)
--- a/drivers/usb/host/dwc3-of-simple.c
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -90,8 +90,6 @@ static int dwc3_of_simple_remove(struct
}
static const struct udevice_id dwc3_of_simple_ids[] = {
- { .compatible = "amlogic,meson-gxl-dwc3" },
- { .compatible = "rockchip,rk3399-dwc3" },
{ .compatible = "ti,dwc3" },
{ }
};

51
package/boot/uboot-rockchip/patches/105-bootstd-efi-Initialize-PCI-to-discover-network-controller.patch Normal file
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@ -0,0 +1,51 @@
From 583d37d192d92c5e92efa68b1d97f8ecdef71c47 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 12 Nov 2023 10:57:21 +0000
Subject: [PATCH] bootstd: efi: Initialize PCI to discover network controllers
Boards like Radxa ROCK 5 Model B and NanoPi R5C require PCI to be
initialized in order to discover their onboard network controllers.
During standard boot, PCI gets initialized after faster boot media have
been evaluated. However when an EFI bootflow is run from a fast boot
media, PCI initialization may not have happended and as a result no
network device is exposed to EFI.
Fix this by initializing PCI during EFI bootflow when no ethernet device
can be found.
This allows chainloading e.g. iPXE on ROCK 5B and NanoPi R5C without
having to enable PCI_INIT_R. Enabling of PCI_INIT_R has the side affect
of slowing down booting from faster boot media, by adding ~1 second off
boot delay for each unocupied M.2 slot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
boot/bootmeth_efi.c | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -16,6 +16,7 @@
#include <dm.h>
#include <efi_loader.h>
#include <fs.h>
+#include <init.h>
#include <malloc.h>
#include <mapmem.h>
#include <mmc.h>
@@ -453,6 +454,14 @@ static int distro_efi_boot(struct udevic
fdt = env_get_hex("fdt_addr_r", 0);
}
+ /* init PCI first since this is often used to provide Ehternet */
+ if (IS_ENABLED(CONFIG_NETDEVICES) && IS_ENABLED(CONFIG_PCI) &&
+ !eth_get_dev()) {
+ ret = pci_init();
+ if (ret)
+ return log_msg_ret("pci", ret);
+ }
+
/*
* At some point we can add a real interface to bootefi so we can call
* this directly. For now, go through the CLI, like distro boot.

22
package/boot/uboot-rockchip/patches/105-nanopc-t4-fix-memory-unstability.patch
View File

@ -1,22 +0,0 @@
From 445502bc21ecf1b5120faee785cea578b810c759 Mon Sep 17 00:00:00 2001
From: Lu jicong <jiconglu58@gmail.com>
Date: Wed, 5 Jul 2023 17:13:55 +0800
Subject: [PATCH] rockchip: rk3399: nanopc-t4: use 1600MHz sdram config
Current 1866MHz sdram config is too high for NanoPC-T4.
On this frequency, its lpddr3 sdram becomes unstable,
causing memtest failures and random kernel crashes.
Signed-off-by: Lu jicong <jiconglu58@gmail.com>
---
arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
@@ -4,4 +4,4 @@
*/
#include "rk3399-nanopi4-u-boot.dtsi"
-#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
+#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"

104
package/boot/uboot-rockchip/patches/106-rockchip-board-Add-board_rng_seed-for-all-Rockchip-device.patch Normal file
View File

@ -0,0 +1,104 @@
From: Chris Morgan <macroalpha82@gmail.com>
To: u-boot@lists.denx.de
Cc: andre.przywara@arm.com, kever.yang@rock-chips.com,
philipp.tomsich@vrull.eu, sjg@chromium.org, jagan@edgeble.ai,
jonas@kwiboo.se, Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH V4 5/7] rockchip: board: Add board_rng_seed() for all Rockchip devices
Date: Tue, 2 Jan 2024 09:46:52 -0600 [thread overview]
Message-ID: <20240102154654.191055-6-macroalpha82@gmail.com> (raw)
In-Reply-To: <20240102154654.191055-1-macroalpha82@gmail.com>
From: Chris Morgan <macromorgan@hotmail.com>
Allow all rockchip devices to use the hardware RNG to seed Linux
RNG.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm/mach-rockchip/board.c | 32 ++++++++++++++++++++++
board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c | 29 --------------------
2 files changed, 32 insertions(+), 29 deletions(-)
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -320,3 +320,35 @@ __weak int misc_init_r(void)
return ret;
}
#endif
+
+#if IS_ENABLED(CONFIG_BOARD_RNG_SEED) && IS_ENABLED(CONFIG_RNG_ROCKCHIP)
+#include <rng.h>
+
+/* Use hardware rng to seed Linux random. */
+__weak int board_rng_seed(struct abuf *buf)
+{
+ struct udevice *dev;
+ size_t len = 0x8;
+ u64 *data;
+
+ data = malloc(len);
+ if (!data) {
+ printf("Out of memory\n");
+ return -ENOMEM;
+ }
+
+ if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
+ printf("No RNG device\n");
+ return -ENODEV;
+ }
+
+ if (dm_rng_read(dev, data, len)) {
+ printf("Reading RNG failed\n");
+ return -EIO;
+ }
+
+ abuf_init_set(buf, data, len);
+
+ return 0;
+}
+#endif
--- a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
+++ b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
@@ -16,7 +16,6 @@
#include <mmc.h>
#include <panel.h>
#include <pwm.h>
-#include <rng.h>
#include <stdlib.h>
#include <video_bridge.h>
@@ -117,34 +116,6 @@ void spl_board_init(void)
(GPIO0_BASE + GPIO_SWPORT_DR_H));
}
-/* Use hardware rng to seed Linux random. */
-int board_rng_seed(struct abuf *buf)
-{
- struct udevice *dev;
- size_t len = 0x8;
- u64 *data;
-
- data = malloc(len);
- if (!data) {
- printf("Out of memory\n");
- return -ENOMEM;
- }
-
- if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
- printf("No RNG device\n");
- return -ENODEV;
- }
-
- if (dm_rng_read(dev, data, len)) {
- printf("Reading RNG failed\n");
- return -EIO;
- }
-
- abuf_init_set(buf, data, len);
-
- return 0;
-}
-
/*
* Buzz the buzzer so the user knows something is going on. Make it
* optional in case PWM is disabled.

12
package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s-u-boot.dtsi
View File

@ -8,6 +8,18 @@
};
};
&i2c0 {
bootph-pre-ram;
};
&rk809 {
bootph-pre-ram;
regulators {
bootph-pre-ram;
};
};
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;

16
package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig
View File

@ -37,6 +37,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_ADC=y
CONFIG_SPL_POWER=y
CONFIG_SPL_I2C=y
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@ -56,6 +58,9 @@ CONFIG_SPL_DM_WARN=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_BUTTON=y
CONFIG_BUTTON_ADC=y
CONFIG_BUTTON_GPIO=y
CONFIG_SPL_CLK=y
# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
@ -79,6 +84,7 @@ CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_SPL_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
@ -88,20 +94,18 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_LAN75XX=y
CONFIG_USB_ETHER_LAN78XX=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y

3
package/boot/uboot-rockchip/src/configs/guangmiao-g4c-rk3399_defconfig
View File

@ -63,9 +63,10 @@ CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y

3
package/boot/uboot-rockchip/src/configs/nanopi-r4s-enterprise-rk3399_defconfig
View File

@ -63,9 +63,10 @@ CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y

3
package/boot/uboot-rockchip/src/configs/nanopi-r4se-rk3399_defconfig
View File

@ -63,9 +63,10 @@ CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y