diff --git a/package/boot/uboot-sunxi/patches/254-ARM-dts-sunxi-h6-Update-DT-files.patch b/package/boot/uboot-sunxi/patches/254-ARM-dts-sunxi-h6-Update-DT-files.patch index b50c3a01dd..cbad7026f0 100644 --- a/package/boot/uboot-sunxi/patches/254-ARM-dts-sunxi-h6-Update-DT-files.patch +++ b/package/boot/uboot-sunxi/patches/254-ARM-dts-sunxi-h6-Update-DT-files.patch @@ -9,728 +9,9 @@ Signed-off-by: Jernej Skrabec Reviewed-by: Andre Przywara Signed-off-by: Andre Przywara --- - arch/arm/dts/sun50i-h6-beelink-gs1.dts | 70 +++- - arch/arm/dts/sun50i-h6-cpu-opp.dtsi | 117 ++++++ - arch/arm/dts/sun50i-h6-orangepi-lite2.dts | 71 +++- - arch/arm/dts/sun50i-h6-orangepi-one-plus.dts | 41 +- - arch/arm/dts/sun50i-h6-orangepi.dtsi | 72 +++- - arch/arm/dts/sun50i-h6-pine-h64.dts | 102 +++-- arch/arm/dts/sun50i-h6.dtsi | 394 +++++++++++++++++-- - 7 files changed, 794 insertions(+), 73 deletions(-) - create mode 100644 arch/arm/dts/sun50i-h6-cpu-opp.dtsi + 1 files changed, 365 insertions(+), 29 deletions(-) ---- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts -+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts -@@ -1,11 +1,10 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2019 Clément Péron -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2019 Clément Péron - - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -25,6 +24,7 @@ - connector { - compatible = "hdmi-connector"; - type = "a"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ - - port { - hdmi_con_in: endpoint { -@@ -33,6 +33,13 @@ - }; - }; - -+ ext_osc32k: ext_osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "ext_osc32k"; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -51,12 +58,38 @@ - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; -+ -+ sound-spdif { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "sun50i-h6-spdif"; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&spdif>; -+ }; -+ -+ simple-audio-card,codec { -+ sound-dai = <&spdif_out>; -+ }; -+ }; -+ -+ spdif_out: spdif-out { -+ #sound-dai-cells = <0>; -+ compatible = "linux,spdif-dit"; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_dcdca>; - }; - - &de { - status = "okay"; - }; - -+&dwc3 { -+ status = "okay"; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -64,12 +97,17 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_aldo2>; - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdcc>; -+ status = "okay"; -+}; -+ - &hdmi { - status = "okay"; - }; -@@ -201,13 +239,16 @@ - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - - reg_dcdcc: dcdcc { -+ regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - -@@ -232,6 +273,11 @@ - }; - }; - -+&r_ir { -+ linux,rc-map-name = "rc-beelink-gs1"; -+ status = "okay"; -+}; -+ - &r_pio { - /* - * PL0 and PL1 are used for PMIC I2C -@@ -243,6 +289,14 @@ - vcc-pm-supply = <®_aldo1>; - }; - -+&rtc { -+ clocks = <&ext_osc32k>; -+}; -+ -+&spdif { -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>; -@@ -258,3 +312,7 @@ - usb0_vbus-supply = <®_vcc5v>; - status = "okay"; - }; -+ -+&usb3phy { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi -@@ -0,0 +1,117 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2020 Ondrej Jirman -+// Copyright (C) 2020 Clément Péron -+ -+/ { -+ cpu_opp_table: cpu-opp-table { -+ compatible = "allwinner,sun50i-h6-operating-points"; -+ nvmem-cells = <&cpu_speed_grade>; -+ opp-shared; -+ -+ opp@480000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <480000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@720000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <720000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@816000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <816000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@888000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <888000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@1080000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1080000000>; -+ -+ opp-microvolt-speed0 = <940000 940000 1200000>; -+ opp-microvolt-speed1 = <880000 880000 1200000>; -+ opp-microvolt-speed2 = <880000 880000 1200000>; -+ }; -+ -+ opp@1320000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1320000000>; -+ -+ opp-microvolt-speed0 = <1000000 1000000 1200000>; -+ opp-microvolt-speed1 = <940000 940000 1200000>; -+ opp-microvolt-speed2 = <940000 940000 1200000>; -+ }; -+ -+ opp@1488000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1488000000>; -+ -+ opp-microvolt-speed0 = <1060000 1060000 1200000>; -+ opp-microvolt-speed1 = <1000000 1000000 1200000>; -+ opp-microvolt-speed2 = <1000000 1000000 1200000>; -+ }; -+ -+ opp@1608000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1608000000>; -+ -+ opp-microvolt-speed0 = <1090000 1090000 1200000>; -+ opp-microvolt-speed1 = <1030000 1030000 1200000>; -+ opp-microvolt-speed2 = <1030000 1030000 1200000>; -+ }; -+ -+ opp@1704000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1704000000>; -+ -+ opp-microvolt-speed0 = <1120000 1120000 1200000>; -+ opp-microvolt-speed1 = <1060000 1060000 1200000>; -+ opp-microvolt-speed2 = <1060000 1060000 1200000>; -+ }; -+ -+ opp@1800000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1800000000>; -+ -+ opp-microvolt-speed0 = <1160000 1160000 1200000>; -+ opp-microvolt-speed1 = <1100000 1100000 1200000>; -+ opp-microvolt-speed2 = <1100000 1100000 1200000>; -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; ---- a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts -+++ b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts -@@ -1,11 +1,74 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2018 Jagan Teki -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2018 Jagan Teki - - #include "sun50i-h6-orangepi.dtsi" - - / { - model = "OrangePi Lite2"; - compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6"; -+ -+ aliases { -+ serial1 = &uart1; /* BT-UART */ -+ }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rtc 1>; -+ clock-names = "ext_clock"; -+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&mmc1 { -+ vmmc-supply = <®_cldo2>; -+ vqmmc-supply = <®_bldo3>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ brcm: sdio-wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&r_pio>; -+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+®_cldo2 { -+ /* -+ * This regulator is connected with CLDO3. -+ * Before the kernel can support synchronized -+ * enable of coupled regulators, keep them -+ * both always on as a ugly hack. -+ */ -+ regulator-always-on; -+}; -+ -+®_cldo3 { -+ /* -+ * This regulator is connected with CLDO2. -+ * See the comments for CLDO2. -+ */ -+ regulator-always-on; -+}; -+ -+/* There's the BT part of the AP6255 connected to that UART */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rtc 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ -+ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ -+ shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ -+ max-speed = <1500000>; -+ }; - }; ---- a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts -+++ b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts -@@ -1,12 +1,43 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2018 Amarula Solutions -- * Author: Jagan Teki -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2018 Amarula Solutions -+// Author: Jagan Teki - - #include "sun50i-h6-orangepi.dtsi" - - / { - model = "OrangePi One Plus"; - compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6"; -+ -+ aliases { -+ ethernet0 = &emac; -+ }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ vin-supply = <®_aldo2>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ext_rgmii_pins>; -+ phy-mode = "rgmii-id"; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-supply = <®_gmac_3v3>; -+ allwinner,rx-delay-ps = <200>; -+ allwinner,tx-delay-ps = <200>; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; ---- a/arch/arm/dts/sun50i-h6-orangepi.dtsi -+++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi -@@ -1,8 +1,6 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2018 Amarula Solutions -- * Author: Jagan Teki -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2018 Amarula Solutions -+// Author: Jagan Teki - - /dts-v1/; - -@@ -22,6 +20,25 @@ - stdout-path = "serial0:115200n8"; - }; - -+ connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ -+ ext_osc32k: ext_osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "ext_osc32k"; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -47,6 +64,10 @@ - }; - }; - -+&de { -+ status = "okay"; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -55,6 +76,21 @@ - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdcc>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_cldo1>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; -@@ -70,6 +106,12 @@ - status = "okay"; - }; - -+&pio { -+ vcc-pc-supply = <®_bldo2>; -+ vcc-pd-supply = <®_cldo1>; -+ vcc-pg-supply = <®_aldo1>; -+}; -+ - &r_i2c { - status = "okay"; - -@@ -163,6 +205,7 @@ - }; - - reg_dcdcc: dcdcc { -+ regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; - regulator-name = "vdd-gpu"; -@@ -189,6 +232,18 @@ - }; - }; - -+&r_ir { -+ status = "okay"; -+}; -+ -+&r_pio { -+ vcc-pm-supply = <®_bldo3>; -+}; -+ -+&rtc { -+ clocks = <&ext_osc32k>; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>; -@@ -196,7 +251,12 @@ - }; - - &usb2otg { -- dr_mode = "otg"; -+ /* -+ * OrangePi Lite 2 and One Plus, where this DT is used, don't -+ * have a controllable VBUS even though they do have an ID pin. -+ * Using it as anything but a USB host is unsafe. -+ */ -+ dr_mode = "host"; - status = "okay"; - }; - ---- a/arch/arm/dts/sun50i-h6-pine-h64.dts -+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts -@@ -1,30 +1,38 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (c) 2017 Icenowy Zheng -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (c) 2017 Icenowy Zheng - - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - - / { -- model = "Pine H64"; -+ model = "Pine H64 model A"; - compatible = "pine64,pine-h64", "allwinner,sun50i-h6"; - - aliases { - ethernet0 = &emac; - serial0 = &uart0; -+ spi0 = &spi0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - -- connector { -+ ext_osc32k: ext_osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "ext_osc32k"; -+ }; -+ -+ hdmi_connector: connector { - compatible = "hdmi-connector"; - type = "a"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ - - port { - hdmi_con_in: endpoint { -@@ -52,6 +60,16 @@ - }; - }; - -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+ - reg_usb_vbus: vbus { - compatible = "regulator-fixed"; - regulator-name = "usb-vbus"; -@@ -63,25 +81,35 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; -- phy-supply = <®_aldo2>; -+ phy-supply = <®_gmac_3v3>; - allwinner,rx-delay-ps = <200>; - allwinner,tx-delay-ps = <200>; - status = "okay"; - }; - --&mdio { -- ext_rgmii_phy: ethernet-phy@1 { -- compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <1>; -- }; --}; -- --&de { -+&gpu { -+ mali-supply = <®_dcdcc>; - status = "okay"; - }; - -@@ -95,12 +123,11 @@ - }; - }; - --&ehci0 { -- status = "okay"; --}; -- --&ehci3 { -- status = "okay"; -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; - - &mmc0 { -@@ -216,13 +243,16 @@ - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - - reg_dcdcc: dcdcc { -+ regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - -@@ -255,10 +285,36 @@ - }; - }; - -+&r_ir { -+ status = "okay"; -+}; -+ - &r_pio { - vcc-pm-supply = <®_aldo1>; - }; - -+&rtc { -+ clocks = <&ext_osc32k>; -+}; -+ -+/* -+ * The CS pin is shared with the MMC2 CMD pin, so we cannot have the SPI -+ * flash and eMMC at the same time, as one of them would fail probing. -+ * Disable SPI0 in here, to prefer the more useful eMMC. U-Boot can -+ * fix this up in no eMMC is connected. -+ */ -+&spi0 { -+ pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ -+ flash@0 { -+ compatible = "winbond,w25q128", "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <4000000>; -+ }; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>; --- a/arch/arm/dts/sun50i-h6.dtsi +++ b/arch/arm/dts/sun50i-h6.dtsi @@ -1,7 +1,5 @@ diff --git a/package/boot/uboot-sunxi/patches/255-sunxi-Add-support-for-Orange-Pi-3.patch b/package/boot/uboot-sunxi/patches/255-sunxi-Add-support-for-Orange-Pi-3.patch index 33d9a4f4fc..65b895aa3d 100644 --- a/package/boot/uboot-sunxi/patches/255-sunxi-Add-support-for-Orange-Pi-3.patch +++ b/package/boot/uboot-sunxi/patches/255-sunxi-Add-support-for-Orange-Pi-3.patch @@ -42,7 +42,7 @@ Signed-off-by: Andre Przywara +/dts-v1/; + +#include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" ++//#include "sun50i-h6-cpu-opp.dtsi" + +#include +