diff --git a/target/linux/sunxi/config-5.10 b/target/linux/sunxi/config-5.10 index c08df5fb26..5d3af15632 100644 --- a/target/linux/sunxi/config-5.10 +++ b/target/linux/sunxi/config-5.10 @@ -496,6 +496,7 @@ CONFIG_TREE_RCU=y CONFIG_TREE_SRCU=y CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" CONFIG_UNWINDER_ARM=y +# CONFIG_UACCE is not set CONFIG_USB=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # CONFIG_USB_AUDIO is not set diff --git a/target/linux/sunxi/cortexa53/config-5.10 b/target/linux/sunxi/cortexa53/config-5.10 index 3013e18fac..442cd9e4f5 100644 --- a/target/linux/sunxi/cortexa53/config-5.10 +++ b/target/linux/sunxi/cortexa53/config-5.10 @@ -20,11 +20,14 @@ CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y CONFIG_ARM_AMBA=y CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y CONFIG_ARM_SMMU=y CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set CONFIG_ARM_SMMU_V3=y +# CONFIG_ARM_SMMU_V3_SVA is not set CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_DMA_DIRECT_REMAP=y @@ -72,6 +75,7 @@ CONFIG_SUN50I_DE2_BUS=y CONFIG_SUN50I_ERRATUM_UNKNOWN1=y CONFIG_SUN50I_H6_CCU=y CONFIG_SUN50I_H6_R_CCU=y +CONFIG_SUN50I_IOMMU=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_THREAD_INFO_IN_TASK=y CONFIG_UNMAP_KERNEL_AT_EL0=y diff --git a/target/linux/sunxi/patches-5.10/050-net-stmmac-dwmac-sun8i-Add-a-shutdown-callback.patch b/target/linux/sunxi/patches-5.10/050-net-stmmac-dwmac-sun8i-Add-a-shutdown-callback.patch new file mode 100644 index 0000000000..adde40faec --- /dev/null +++ b/target/linux/sunxi/patches-5.10/050-net-stmmac-dwmac-sun8i-Add-a-shutdown-callback.patch @@ -0,0 +1,42 @@ +From 96be41d74f2ee94203f2a61e55927b028a10fea6 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Tue, 16 Feb 2021 22:20:06 -0600 +Subject: [PATCH] net: stmmac: dwmac-sun8i: Add a shutdown callback + +The Ethernet MAC and PHY are usually major consumers of power on boards +which may not be able to fully power off (those with no PMIC). Powering +down the MAC and internal PHY saves power while these boards are "off". + +Reviewed-by: Chen-Yu Tsai +Signed-off-by: Samuel Holland +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -1284,6 +1284,15 @@ static int sun8i_dwmac_remove(struct platform_device *pdev) + return 0; + } + ++static void sun8i_dwmac_shutdown(struct platform_device *pdev) ++{ ++ struct net_device *ndev = platform_get_drvdata(pdev); ++ struct stmmac_priv *priv = netdev_priv(ndev); ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ ++ sun8i_dwmac_exit(pdev, gmac); ++} ++ + static const struct of_device_id sun8i_dwmac_match[] = { + { .compatible = "allwinner,sun8i-h3-emac", + .data = &emac_variant_h3 }, +@@ -1304,6 +1313,7 @@ MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); + static struct platform_driver sun8i_dwmac_driver = { + .probe = sun8i_dwmac_probe, + .remove = sun8i_dwmac_remove, ++ .shutdown = sun8i_dwmac_shutdown, + .driver = { + .name = "dwmac-sun8i", + .pm = &stmmac_pltfr_pm_ops, diff --git a/target/linux/sunxi/patches-5.10/104-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch b/target/linux/sunxi/patches-5.10/104-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch new file mode 100644 index 0000000000..9c8d7fad26 --- /dev/null +++ b/target/linux/sunxi/patches-5.10/104-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch @@ -0,0 +1,102 @@ +From b0842946f86bd5d0f9e857133e80d5d9496091b7 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Tue, 20 Aug 2019 14:54:48 +0200 +Subject: [PATCH] arm64: dts: allwinner: orange-pi-3: Enable ethernet + +Orange Pi 3 has two regulators that power the Realtek RTL8211E +PHY. According to the datasheet, both regulators need to be enabled +at the same time, or that "phy-io" should be enabled slightly earlier +than "phy" regulator. + +RTL8211E/RTL8211EG datasheet says: + + Note 4: 2.5V (or 1.8/1.5V) RGMII power should be risen simultaneously + or slightly earlier than 3.3V power. Rising 2.5V (or 1.8/1.5V) power + later than 3.3V power may lead to errors. + +The driver ensures the regulator enable ordering. The timing is set +in DT via startup-delay-us. + +We also need to wait at least 30ms after power-up/reset, before +accessing the PHY registers. + +All values of RX/TX delay were tested exhaustively and a middle one +of the range of working values was chosen. + +Signed-off-by: Ondrej Jirman +--- + .../dts/allwinner/sun50i-h6-orangepi-3.dts | 40 +++++++++++++++++++ + 1 file changed, 40 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +index 15c9dd8c447955..e9c7cadf8b21c2 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +@@ -15,6 +15,7 @@ + aliases { + serial0 = &uart0; + serial1 = &uart1; ++ ethernet0 = &emac; + }; + + chosen { +@@ -64,6 +65,15 @@ + regulator-always-on; + }; + ++ reg_gmac_2v5: gmac-2v5 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-2v5"; ++ regulator-min-microvolt = <2500000>; ++ regulator-max-microvolt = <2500000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ ++ }; ++ + reg_vcc33_wifi: vcc33-wifi { + /* Always on 3.3V regulator for WiFi and BT */ + compatible = "regulator-fixed"; +@@ -128,6 +138,35 @@ + }; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ext_rgmii_pins>; ++ phy-mode = "rgmii-id"; ++ phy-handle = <&ext_rgmii_phy>; ++ /* ++ * The board uses 2.5V RGMII signalling. Power sequence to enable ++ * the phy is to enable GMAC-2V5 and GMAC-3V (aldo2) power rails ++ * at the same time and to wait 100ms. The driver enables phy-io ++ * first. Delay is achieved with enable-ramp-delay on reg_aldo2. ++ */ ++ phy-supply = <®_aldo2>; ++ phy-io-supply = <®_gmac_2v5>; ++ allwinner,rx-delay-ps = <200>; ++ allwinner,tx-delay-ps = <200>; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ ++ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */ ++ reset-assert-us = <15000>; ++ reset-deassert-us = <40000>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_cldo1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ +@@ -207,6 +246,7 @@ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33-audio-tv-ephy-mac"; ++ regulator-enable-ramp-delay = <100000>; + }; + + /* ALDO3 is shorted to CLDO1 */ diff --git a/target/linux/sunxi/patches-5.10/110-allwinner-h6-use-status-LED-for-OpenWrt.patch b/target/linux/sunxi/patches-5.10/110-allwinner-h6-use-status-LED-for-OpenWrt.patch new file mode 100644 index 0000000000..d95f4a8c19 --- /dev/null +++ b/target/linux/sunxi/patches-5.10/110-allwinner-h6-use-status-LED-for-OpenWrt.patch @@ -0,0 +1,46 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +@@ -16,6 +16,11 @@ + serial0 = &uart0; + serial1 = &uart1; + ethernet0 = &emac; ++ ++ led-boot = &led_status; ++ led-failsafe = &led_status; ++ led-running = &led_status; ++ led-upgrade = &led_status; + }; + + chosen { +@@ -50,7 +55,7 @@ + default-state = "on"; + }; + +- status { ++ led_status: status { + label = "orangepi:green:status"; + gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ + }; +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +@@ -15,6 +15,11 @@ + + aliases { + serial0 = &uart0; ++ ++ led-boot = &led_status; ++ led-failsafe = &led_status; ++ led-running = &led_status; ++ led-upgrade = &led_status; + }; + + chosen { +@@ -49,7 +54,7 @@ + default-state = "on"; + }; + +- status { ++ led_status: status { + label = "orangepi:green:status"; + gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ + }; diff --git a/target/linux/sunxi/patches-5.10/600-net-stmmac-sun8i-Use-devm_regulator_get-for-PHY-regulator.patch b/target/linux/sunxi/patches-5.10/600-net-stmmac-sun8i-Use-devm_regulator_get-for-PHY-regulator.patch new file mode 100644 index 0000000000..b0fbff4ba6 --- /dev/null +++ b/target/linux/sunxi/patches-5.10/600-net-stmmac-sun8i-Use-devm_regulator_get-for-PHY-regulator.patch @@ -0,0 +1,69 @@ +From 137c141c8bcd349db04fe58a5c174dbe9f679de4 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Wed, 27 Mar 2019 13:21:06 +0100 +Subject: [PATCH] net: stmmac: sun8i: Use devm_regulator_get for PHY regulator + +Use devm_regulator_get instead of devm_regulator_get_optional and rely +on dummy supply. This avoids NULL checks before regulator_enable/disable +calls. + +This path also improves error reporting, because we now report both +use of dummy supply and error during registration with more detail, +instead of generic info level message "No regulator found" that +was reported previously on errors and lack of regulator property in DT. + +Finally, we'll be adding further optional regulators, and the overall +code will be simpler. + +Signed-off-by: Ondrej Jirman +--- + .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 23 ++++++++----------- + 1 file changed, 10 insertions(+), 13 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -549,12 +549,10 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) + struct sunxi_priv_data *gmac = priv; + int ret; + +- if (gmac->regulator) { +- ret = regulator_enable(gmac->regulator); +- if (ret) { +- dev_err(&pdev->dev, "Fail to enable regulator\n"); +- return ret; +- } ++ ret = regulator_enable(gmac->regulator); ++ if (ret) { ++ dev_err(&pdev->dev, "Fail to enable regulator\n"); ++ return ret; + } + + ret = clk_prepare_enable(gmac->tx_clk); +@@ -1026,8 +1024,7 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + + clk_disable_unprepare(gmac->tx_clk); + +- if (gmac->regulator) +- regulator_disable(gmac->regulator); ++ regulator_disable(gmac->regulator); + } + + static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable) +@@ -1155,12 +1152,12 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + } + + /* Optional regulator for PHY */ +- gmac->regulator = devm_regulator_get_optional(dev, "phy"); ++ gmac->regulator = devm_regulator_get(dev, "phy"); + if (IS_ERR(gmac->regulator)) { +- if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) +- return -EPROBE_DEFER; +- dev_info(dev, "No regulator found\n"); +- gmac->regulator = NULL; ++ ret = PTR_ERR(gmac->regulator); ++ if (ret != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get PHY regulator (%d)\n", ret); ++ return ret; + } + + /* The "GMAC clock control" register might be located in the diff --git a/target/linux/sunxi/patches-5.10/601-net-stmmac-sun8i-Rename-PHY-regulator-variable-to-regulator_phy.patch b/target/linux/sunxi/patches-5.10/601-net-stmmac-sun8i-Rename-PHY-regulator-variable-to-regulator_phy.patch new file mode 100644 index 0000000000..8dd250daf6 --- /dev/null +++ b/target/linux/sunxi/patches-5.10/601-net-stmmac-sun8i-Rename-PHY-regulator-variable-to-regulator_phy.patch @@ -0,0 +1,83 @@ +From 83eef9676e59261bb9d030948913e7756a0efb94 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Tue, 20 Aug 2019 14:29:29 +0200 +Subject: [PATCH] net: stmmac: sun8i: Rename PHY regulator variable to + regulator_phy + +We'll be adding further optional regulators, and this makes it clearer +what the regulator is for. + +Signed-off-by: Ondrej Jirman +--- + .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 32 ++++++++++--------- + 1 file changed, 17 insertions(+), 15 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -57,20 +57,22 @@ struct emac_variant { + }; + + /* struct sunxi_priv_data - hold all sunxi private data +- * @tx_clk: reference to MAC TX clock +- * @ephy_clk: reference to the optional EPHY clock for the internal PHY +- * @regulator: reference to the optional regulator +- * @rst_ephy: reference to the optional EPHY reset for the internal PHY +- * @variant: reference to the current board variant +- * @regmap: regmap for using the syscon +- * @internal_phy_powered: Does the internal PHY is enabled +- * @use_internal_phy: Is the internal PHY selected for use +- * @mux_handle: Internal pointer used by mdio-mux lib ++ * @tx_clk: reference to MAC TX clock ++ * @ephy_clk: reference to the optional EPHY clock for ++ * the internal PHY ++ * @regulator_phy: reference to the optional regulator ++ * @rst_ephy: reference to the optional EPHY reset for ++ * the internal PHY ++ * @variant: reference to the current board variant ++ * @regmap: regmap for using the syscon ++ * @internal_phy_powered: Does the internal PHY is enabled ++ * @use_internal_phy: Is the internal PHY selected for use ++ * @mux_handle: Internal pointer used by mdio-mux lib + */ + struct sunxi_priv_data { + struct clk *tx_clk; + struct clk *ephy_clk; +- struct regulator *regulator; ++ struct regulator *regulator_phy; + struct reset_control *rst_ephy; + const struct emac_variant *variant; + struct regmap_field *regmap_field; +@@ -549,9 +549,9 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) + struct sunxi_priv_data *gmac = priv; + int ret; + +- ret = regulator_enable(gmac->regulator); ++ ret = regulator_enable(gmac->regulator_phy); + if (ret) { +- dev_err(&pdev->dev, "Fail to enable regulator\n"); ++ dev_err(&pdev->dev, "Fail to enable PHY regulator\n"); + return ret; + } + +@@ -1024,7 +1024,7 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + + clk_disable_unprepare(gmac->tx_clk); + +- regulator_disable(gmac->regulator); ++ regulator_disable(gmac->regulator_phy); + } + + static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable) +@@ -1152,9 +1152,9 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + } + + /* Optional regulator for PHY */ +- gmac->regulator = devm_regulator_get(dev, "phy"); +- if (IS_ERR(gmac->regulator)) { +- ret = PTR_ERR(gmac->regulator); ++ gmac->regulator_phy = devm_regulator_get(dev, "phy"); ++ if (IS_ERR(gmac->regulator_phy)) { ++ ret = PTR_ERR(gmac->regulator_phy); + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get PHY regulator (%d)\n", ret); + return ret; diff --git a/target/linux/sunxi/patches-5.10/602-net-stmmac-sun8i-Add-support-for-enabling-a-regulator-for-PHY.patch b/target/linux/sunxi/patches-5.10/602-net-stmmac-sun8i-Add-support-for-enabling-a-regulator-for-PHY.patch new file mode 100644 index 0000000000..084fd6d7c2 --- /dev/null +++ b/target/linux/sunxi/patches-5.10/602-net-stmmac-sun8i-Add-support-for-enabling-a-regulator-for-PHY.patch @@ -0,0 +1,92 @@ +From 1b79ce32918502c9d9508e152bfa06bcbfcc7717 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Tue, 20 Aug 2019 14:31:38 +0200 +Subject: [PATCH] net: stmmac: sun8i: Add support for enabling a regulator for + PHY I/O pins + +Orange Pi 3 has two regulators that power the Realtek RTL8211E. According +to the phy datasheet, both regulators need to be enabled at the same time. + +Add support for the second optional regulator, "phy-io", to the glue +driver. + +Signed-off-by: Ondrej Jirman +--- + .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 30 ++++++++++++++++--- + 1 file changed, 26 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index 3815ccb76b1ddc..1ab91c9bd10650 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -61,6 +61,8 @@ struct emac_variant { + * @ephy_clk: reference to the optional EPHY clock for + * the internal PHY + * @regulator_phy: reference to the optional regulator ++ * @regulator_phy_io: reference to the optional regulator for ++ * PHY I/O pins + * @rst_ephy: reference to the optional EPHY reset for + * the internal PHY + * @variant: reference to the current board variant +@@ -73,6 +75,7 @@ struct sunxi_priv_data { + struct clk *tx_clk; + struct clk *ephy_clk; + struct regulator *regulator_phy; ++ struct regulator *regulator_phy_io; + struct reset_control *rst_ephy; + const struct emac_variant *variant; + struct regmap_field *regmap_field; +@@ -551,10 +553,16 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) + struct sunxi_priv_data *gmac = priv; + int ret; + ++ ret = regulator_enable(gmac->regulator_phy_io); ++ if (ret) { ++ dev_err(&pdev->dev, "Fail to enable PHY I/O regulator\n"); ++ return ret; ++ } ++ + ret = regulator_enable(gmac->regulator_phy); + if (ret) { + dev_err(&pdev->dev, "Fail to enable PHY regulator\n"); +- return ret; ++ goto err_disable_regulator_phy_io; + } + + ret = clk_prepare_enable(gmac->tx_clk); +@@ -574,8 +582,9 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) + err_disable_clk: + clk_disable_unprepare(gmac->tx_clk); + err_disable_regulator: +- if (gmac->regulator) +- regulator_disable(gmac->regulator); ++ regulator_disable(gmac->regulator_phy); ++err_disable_regulator_phy_io: ++ regulator_disable(gmac->regulator_phy_io); + + return ret; + } +@@ -1027,6 +1036,7 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + clk_disable_unprepare(gmac->tx_clk); + + regulator_disable(gmac->regulator_phy); ++ regulator_disable(gmac->regulator_phy_io); + } + + static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable) +@@ -1162,6 +1172,15 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + return ret; + } + ++ /* Optional regulator for PHY I/O pins */ ++ gmac->regulator_phy_io = devm_regulator_get(dev, "phy-io"); ++ if (IS_ERR(gmac->regulator_phy_io)) { ++ ret = PTR_ERR(gmac->regulator_phy_io); ++ if (ret != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get PHY I/O regulator (%d)\n", ret); ++ return ret; ++ } ++ + /* The "GMAC clock control" register might be located in the + * CCU address range (on the R40), or the system control address + * range (on most other sun8i and later SoCs).