diff --git a/config/Config-images.in b/config/Config-images.in
index f2f210d71e..3575102e5b 100644
--- a/config/Config-images.in
+++ b/config/Config-images.in
@@ -17,6 +17,7 @@ menu "Target Images"
 			default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_lantiq
 			default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_mpc85xx
 			default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_ramips
+			default TARGET_INITRAMFS_COMPRESSION_XZ if USES_SEPERATE_INITRAMFS
 			default TARGET_INITRAMFS_COMPRESSION_NONE
 			depends on TARGET_ROOTFS_INITRAMFS
 			help
@@ -66,7 +67,7 @@ menu "Target Images"
 
 		config TARGET_ROOTFS_INITRAMFS_SEPERATE
 			bool "seperate ramdisk"
-			depends on TARGET_ROOTFS_INITRAMFS && !TARGET_INITRAMFS_FORCE
+			depends on USES_SEPERATE_INITRAMFS && TARGET_ROOTFS_INITRAMFS && !TARGET_INITRAMFS_FORCE
 			default y if USES_SEPERATE_INITRAMFS
 			help
 			  Generate seperate initrd.cpio instead of embedding it.
diff --git a/include/image-commands.mk b/include/image-commands.mk
index d4ec51ca7c..a1edc3265e 100644
--- a/include/image-commands.mk
+++ b/include/image-commands.mk
@@ -461,22 +461,6 @@ define Build/uImage
 	mv $@.new $@
 endef
 
-define Build/uImage-with-ramdisk
-	mkimage \
-		-A $(LINUX_KARCH) \
-		-O linux \
-		-T kernel \
-		-C $(word 1,$(1)) \
-		-a $(KERNEL_LOADADDR) \
-		-e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
-		-i $(KERNEL_BUILD_DIR)/initrd.cpio.$(strip $(call Build/initrd_compression)) \
-		-n '$(if $(UIMAGE_NAME),$(UIMAGE_NAME),$(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION))' \
-		$(if $(UIMAGE_MAGIC),-M $(UIMAGE_MAGIC)) \
-		$(wordlist 2,$(words $(1)),$(1)) \
-		-d $@ $@.new
-	mv $@.new $@
-endef
-
 define Build/xor-image
 	$(STAGING_DIR_HOST)/bin/xorimage -i $@ -o $@.xor $(1)
 	mv $@.xor $@
diff --git a/include/image.mk b/include/image.mk
index 0a72f6f282..180a786398 100644
--- a/include/image.mk
+++ b/include/image.mk
@@ -363,14 +363,14 @@ define Device/Init
 
   IMAGES :=
   ARTIFACTS :=
-  IMAGE_PREFIX := $(IMG_PREFIX)-$(1)
-  IMAGE_NAME = $$(IMAGE_PREFIX)-$$(1)-$$(2)
+  DEVICE_IMG_PREFIX := $(IMG_PREFIX)-$(1)
+  DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(1)-$$(2)
   IMAGE_SIZE :=
-  KERNEL_PREFIX = $$(IMAGE_PREFIX)
+  KERNEL_PREFIX = $$(DEVICE_IMG_PREFIX)
   KERNEL_SUFFIX := -kernel.bin
   KERNEL_INITRAMFS_SUFFIX = $$(KERNEL_SUFFIX)
   KERNEL_IMAGE = $$(KERNEL_PREFIX)$$(KERNEL_SUFFIX)
-  KERNEL_INITRAMFS_PREFIX = $$(IMAGE_PREFIX)-initramfs
+  KERNEL_INITRAMFS_PREFIX = $$(DEVICE_IMG_PREFIX)-initramfs
   KERNEL_INITRAMFS_IMAGE = $$(KERNEL_INITRAMFS_PREFIX)$$(KERNEL_INITRAMFS_SUFFIX)
   KERNEL_INITRAMFS_NAME = $$(KERNEL_NAME)-initramfs
   KERNEL_INSTALL :=
@@ -472,8 +472,8 @@ endef
 ifndef IB
 define Device/Build/initramfs
   $(call Device/Export,$(KDIR)/tmp/$$(KERNEL_INITRAMFS_IMAGE),$(1))
-  $$(_TARGET): $$(if $$(KERNEL_INITRAMFS),$(BIN_DIR)/$$(KERNEL_INITRAMFS_IMAGE)) \
-	  $$(if $$(CONFIG_JSON_OVERVIEW_IMAGE_INFO), $(BUILD_DIR)/json_info_files/$$(KERNEL_INITRAMFS_IMAGE).json,)
+  $$(_TARGET): $$(if $$(KERNEL_INITRAMFS),$(BIN_DIR)/$$(KERNEL_INITRAMFS_IMAGE) \
+	  $$(if $$(CONFIG_JSON_OVERVIEW_IMAGE_INFO), $(BUILD_DIR)/json_info_files/$$(KERNEL_INITRAMFS_IMAGE).json,))
 
   $(KDIR)/$$(KERNEL_INITRAMFS_NAME):: image_prepare
   $(BIN_DIR)/$$(KERNEL_INITRAMFS_IMAGE): $(KDIR)/tmp/$$(KERNEL_INITRAMFS_IMAGE)
@@ -490,10 +490,10 @@ define Device/Build/initramfs
 	DEVICE_ID="$(1)" \
 	BIN_DIR="$(BIN_DIR)" \
 	SOURCE_DATE_EPOCH=$(SOURCE_DATE_EPOCH) \
-	IMAGE_NAME="$$(notdir $$^)" \
+	DEVICE_IMG_NAME="$$(notdir $$^)" \
 	IMAGE_TYPE="kernel" \
 	IMAGE_FILESYSTEM="initramfs" \
-	IMAGE_PREFIX="$$(IMAGE_PREFIX)" \
+	DEVICE_IMG_PREFIX="$$(DEVICE_IMG_PREFIX)" \
 	DEVICE_VENDOR="$$(DEVICE_VENDOR)" \
 	DEVICE_MODEL="$$(DEVICE_MODEL)" \
 	DEVICE_VARIANT="$$(DEVICE_VARIANT)" \
@@ -565,9 +565,9 @@ endef
 define Device/Build/image
   GZ_SUFFIX := $(if $(filter %dtb %gz,$(2)),,$(if $(and $(findstring ext4,$(1)),$(CONFIG_TARGET_IMAGES_GZIP)),.gz))
   $$(_TARGET): $(if $(CONFIG_JSON_OVERVIEW_IMAGE_INFO), \
-	  $(BUILD_DIR)/json_info_files/$(call IMAGE_NAME,$(1),$(2)).json, \
-	  $(BIN_DIR)/$(call IMAGE_NAME,$(1),$(2))$$(GZ_SUFFIX))
-  $(eval $(call Device/Export,$(KDIR)/tmp/$(call IMAGE_NAME,$(1),$(2)),$(1)))
+	  $(BUILD_DIR)/json_info_files/$(call DEVICE_IMG_NAME,$(1),$(2)).json, \
+	  $(BIN_DIR)/$(call DEVICE_IMG_NAME,$(1),$(2))$$(GZ_SUFFIX))
+  $(eval $(call Device/Export,$(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2)),$(1)))
 
   ROOTFS/$(1)/$(3) := \
 	$(KDIR)/root.$(1)$$(strip \
@@ -578,28 +578,28 @@ define Device/Build/image
   ifndef IB
     $$(ROOTFS/$(1)/$(3)): $(if $(TARGET_PER_DEVICE_ROOTFS),target-dir-$$(ROOTFS_ID/$(3)))
   endif
-  $(KDIR)/tmp/$(call IMAGE_NAME,$(1),$(2)): $$(KDIR_KERNEL_IMAGE) $$(ROOTFS/$(1)/$(3))
+  $(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2)): $$(KDIR_KERNEL_IMAGE) $$(ROOTFS/$(1)/$(3))
 	@rm -f $$@
 	[ -f $$(word 1,$$^) -a -f $$(word 2,$$^) ]
 	$$(call concat_cmd,$(if $(IMAGE/$(2)/$(1)),$(IMAGE/$(2)/$(1)),$(IMAGE/$(2))))
 
-  .IGNORE: $(BIN_DIR)/$(call IMAGE_NAME,$(1),$(2))
+  .IGNORE: $(BIN_DIR)/$(call DEVICE_IMG_NAME,$(1),$(2))
 
-  $(BIN_DIR)/$(call IMAGE_NAME,$(1),$(2)).gz: $(KDIR)/tmp/$(call IMAGE_NAME,$(1),$(2))
+  $(BIN_DIR)/$(call DEVICE_IMG_NAME,$(1),$(2)).gz: $(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2))
 	gzip -c -9n $$^ > $$@
 
-  $(BIN_DIR)/$(call IMAGE_NAME,$(1),$(2)): $(KDIR)/tmp/$(call IMAGE_NAME,$(1),$(2))
+  $(BIN_DIR)/$(call DEVICE_IMG_NAME,$(1),$(2)): $(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2))
 	cp $$^ $$@
 
-  $(BUILD_DIR)/json_info_files/$(call IMAGE_NAME,$(1),$(2)).json: $(BIN_DIR)/$(call IMAGE_NAME,$(1),$(2))$$(GZ_SUFFIX)
+  $(BUILD_DIR)/json_info_files/$(call DEVICE_IMG_NAME,$(1),$(2)).json: $(BIN_DIR)/$(call DEVICE_IMG_NAME,$(1),$(2))$$(GZ_SUFFIX)
 	@mkdir -p $$(shell dirname $$@)
 	DEVICE_ID="$(DEVICE_NAME)" \
 	BIN_DIR="$(BIN_DIR)" \
 	SOURCE_DATE_EPOCH=$(SOURCE_DATE_EPOCH) \
-	IMAGE_NAME="$(IMAGE_NAME)" \
+	DEVICE_IMG_NAME="$(DEVICE_IMG_NAME)" \
 	IMAGE_TYPE=$(word 1,$(subst ., ,$(2))) \
 	IMAGE_FILESYSTEM="$(1)" \
-	IMAGE_PREFIX="$(IMAGE_PREFIX)" \
+	DEVICE_IMG_PREFIX="$(DEVICE_IMG_PREFIX)" \
 	DEVICE_VENDOR="$(DEVICE_VENDOR)" \
 	DEVICE_MODEL="$(DEVICE_MODEL)" \
 	DEVICE_VARIANT="$(DEVICE_VARIANT)" \
@@ -624,15 +624,15 @@ define Device/Build/image
 endef
 
 define Device/Build/artifact
-  $$(_TARGET): $(BIN_DIR)/$(IMAGE_PREFIX)-$(1)
-  $(eval $(call Device/Export,$(KDIR)/tmp/$(IMAGE_PREFIX)-$(1)))
-  $(KDIR)/tmp/$(IMAGE_PREFIX)-$(1): $$(KDIR_KERNEL_IMAGE)
+  $$(_TARGET): $(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1)
+  $(eval $(call Device/Export,$(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1)))
+  $(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1): $$(KDIR_KERNEL_IMAGE)
 	@rm -f $$@
 	$$(call concat_cmd,$(ARTIFACT/$(1)))
 
-  .IGNORE: $(BIN_DIR)/$(IMAGE_PREFIX)-$(1)
+  .IGNORE: $(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1)
 
-  $(BIN_DIR)/$(IMAGE_PREFIX)-$(1): $(KDIR)/tmp/$(IMAGE_PREFIX)-$(1)
+  $(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1): $(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1)
 	cp $$^ $$@
 
 endef
diff --git a/include/kernel-version.mk b/include/kernel-version.mk
index 79525c7d71..d4fdab1603 100644
--- a/include/kernel-version.mk
+++ b/include/kernel-version.mk
@@ -6,11 +6,11 @@ ifdef CONFIG_TESTING_KERNEL
   KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
 endif
 
-LINUX_VERSION-5.4 = .99
-LINUX_VERSION-5.10 = .16
+LINUX_VERSION-5.4 = .100
+LINUX_VERSION-5.10 = .18
 
-LINUX_KERNEL_HASH-5.4.99 = 5bdad12c69253d30d836dd51e0b2a9a04a6749cc6b4b2412561a1efcb1351a27
-LINUX_KERNEL_HASH-5.10.16 = 536fe3ea273bfcc72b3571d3b3a7ff0a5bcdc16068efd22e42c4f9d03c200a37
+LINUX_KERNEL_HASH-5.4.100 = 795d681aa60822bcf4f2f6c28b4411e1b09d5ca37b85a647967649d1ab3b240a
+LINUX_KERNEL_HASH-5.10.18 = 3bc1ee2b1bf73b5ba936721953f3f9599fd165cef906cd5163c68d23cb9bb611
 
 remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
 sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
diff --git a/package/base-files/files/lib/upgrade/nand.sh b/package/base-files/files/lib/upgrade/nand.sh
index 2b766480d7..faeb3d6fc1 100644
--- a/package/base-files/files/lib/upgrade/nand.sh
+++ b/package/base-files/files/lib/upgrade/nand.sh
@@ -118,7 +118,7 @@ nand_upgrade_prepare_ubi() {
 	local rootfs_length="$1"
 	local rootfs_type="$2"
 	local rootfs_data_max="$(fw_printenv -n rootfs_data_max 2>/dev/null)"
-	[ -n "$rootfs_data_max" ] && rootfs_data_max=$(($rootfs_data_max))
+	[ -n "$rootfs_data_max" ] && rootfs_data_max=$((rootfs_data_max))
 
 	local kernel_length="$3"
 	local has_env="${4:-0}"
@@ -195,7 +195,7 @@ nand_upgrade_prepare_ubi() {
 	if [ "$rootfs_type" != "ubifs" ]; then
 		local availeb=$(cat /sys/devices/virtual/ubi/$ubidev/avail_eraseblocks)
 		local ebsize=$(cat /sys/devices/virtual/ubi/$ubidev/eraseblock_size)
-		local avail_size=$(( $availeb * $ebsize ))
+		local avail_size=$((availeb * ebsize))
 		local rootfs_data_size_param="-m"
 		if [ -n "$rootfs_data_max" ] &&
 		   [ "$rootfs_data_max" != "0" ] &&
diff --git a/package/boot/arm-trusted-firmware-mediatek/Makefile b/package/boot/arm-trusted-firmware-mediatek/Makefile
index 520ae2e8fe..98d421ed87 100644
--- a/package/boot/arm-trusted-firmware-mediatek/Makefile
+++ b/package/boot/arm-trusted-firmware-mediatek/Makefile
@@ -19,7 +19,6 @@ PKG_MIRROR_HASH:=b211b2f9143d4debc7ad8dc959cb606888af20af790855dd66c87e451b6a1bc
 
 PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
 
-PKG_LICENSE+=proprietary
 PKG_LICENSE_FILES:=LICENCE.mediatek
 
 BLOBS_TARBALL:=tfa-mtk-files-for-2020-11-09.tgz
@@ -28,6 +27,8 @@ BROMIMAGE_EXEC:=bromimage-x64
 include $(INCLUDE_DIR)/trusted-firmware-a.mk
 include $(INCLUDE_DIR)/package.mk
 
+PKG_LICENSE+=proprietary
+
 define Download/tfa-files
   URL:=@OPENWRT
   URL_FILE:=$(BLOBS_TARBALL)
diff --git a/package/boot/imx-bootlets/patches/001-skip_sb_generation.patch b/package/boot/imx-bootlets/patches/001-skip_sb_generation.patch
index 7267dff619..ad65265850 100644
--- a/package/boot/imx-bootlets/patches/001-skip_sb_generation.patch
+++ b/package/boot/imx-bootlets/patches/001-skip_sb_generation.patch
@@ -1,6 +1,6 @@
---- imx-bootlets-src-10.05.02.orig/Makefile	2010-05-14 06:56:28.000000000 +0200
-+++ imx-bootlets-src-10.05.02/Makefile	2012-10-24 21:41:44.000000000 +0200
-@@ -32,10 +32,11 @@
+--- a/Makefile
++++ b/Makefile
+@@ -32,10 +32,11 @@ ifeq "$(DFT_IMAGE)" "$(wildcard $(DFT_IM
  	sed -i 's,[^ *]image.*;,\timage="$(DFT_UBOOT)";,' uboot.db
  	elftosb2 -z -c ./uboot.db -o i$(ARCH)_uboot.sb
  else
diff --git a/package/boot/imx-bootlets/patches/002-set_elftosb_config.patch b/package/boot/imx-bootlets/patches/002-set_elftosb_config.patch
index 88b904ef42..5cf48fd6fc 100644
--- a/package/boot/imx-bootlets/patches/002-set_elftosb_config.patch
+++ b/package/boot/imx-bootlets/patches/002-set_elftosb_config.patch
@@ -1,6 +1,6 @@
---- imx-bootlets-10.05.02.orig/linux_prebuilt.db	2010-05-14 06:56:28.000000000 +0200
-+++ imx-bootlets-10.05.02/linux_prebuilt.db	2012-10-24 22:04:37.000000000 +0200
-@@ -4,10 +4,10 @@
+--- a/linux_prebuilt.db
++++ b/linux_prebuilt.db
+@@ -4,10 +4,10 @@ options {
  	flags = 0x01;
  }
  sources {
diff --git a/package/boot/imx-bootlets/patches/003-add-olinuxino.patch b/package/boot/imx-bootlets/patches/003-add-olinuxino.patch
index ddc25bc41e..6ed5786344 100644
--- a/package/boot/imx-bootlets/patches/003-add-olinuxino.patch
+++ b/package/boot/imx-bootlets/patches/003-add-olinuxino.patch
@@ -1,6 +1,5 @@
-diff -ruN imx-bootlets-10.05.02.orig/linux_prep/board/imx23_olinuxino_dev.c imx-bootlets-10.05.02/linux_prep/board/imx23_olinuxino_dev.c
---- imx-bootlets-10.05.02.orig/linux_prep/board/imx23_olinuxino_dev.c	1970-01-01 01:00:00.000000000 +0100
-+++ imx-bootlets-10.05.02/linux_prep/board/imx23_olinuxino_dev.c	2013-05-19 00:11:40.000000000 +0200
+--- /dev/null
++++ b/linux_prep/board/imx23_olinuxino_dev.c
 @@ -0,0 +1,54 @@
 +/*
 + * Platform specific data for the IMX23_OLINUXINO development board
@@ -56,15 +55,13 @@ diff -ruN imx-bootlets-10.05.02.orig/linux_prep/board/imx23_olinuxino_dev.c imx-
 + * Default command line *
 + ************************************************/
 +char cmdline_def[] = "console=ttyAMA0,115200";
-diff -ruN imx-bootlets-10.05.02.orig/linux_prep/cmdlines/imx23_olinuxino_dev.txt imx-bootlets-10.05.02/linux_prep/cmdlines/imx23_olinuxino_dev.txt
---- imx-bootlets-10.05.02.orig/linux_prep/cmdlines/imx23_olinuxino_dev.txt	1970-01-01 01:00:00.000000000 +0100
-+++ imx-bootlets-10.05.02/linux_prep/cmdlines/imx23_olinuxino_dev.txt	2013-05-19 00:12:56.000000000 +0200
+--- /dev/null
++++ b/linux_prep/cmdlines/imx23_olinuxino_dev.txt
 @@ -0,0 +1 @@
 +noinitrd console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait ssp1=mmc
-diff -ruN imx-bootlets-10.05.02.orig/linux_prep/core/setup.c imx-bootlets-10.05.02/linux_prep/core/setup.c
---- imx-bootlets-10.05.02.orig/linux_prep/core/setup.c	2010-05-14 06:56:28.000000000 +0200
-+++ imx-bootlets-10.05.02/linux_prep/core/setup.c	2013-05-19 00:11:40.000000000 +0200
-@@ -84,6 +84,8 @@
+--- a/linux_prep/core/setup.c
++++ b/linux_prep/core/setup.c
+@@ -84,6 +84,8 @@ static void *memcpy(void *s1, const void
  #include "../../mach-mx28/includes/registers/regsrtc.h"
  #elif defined(STMP378X)
  #include "../../mach-mx23/includes/registers/regsrtc.h"
@@ -73,9 +70,8 @@ diff -ruN imx-bootlets-10.05.02.orig/linux_prep/core/setup.c imx-bootlets-10.05.
  #endif
  
  #define NAND_SECONDARY_BOOT          0x00000002
-diff -ruN imx-bootlets-10.05.02.orig/linux_prep/include/mx23/platform.h imx-bootlets-10.05.02/linux_prep/include/mx23/platform.h
---- imx-bootlets-10.05.02.orig/linux_prep/include/mx23/platform.h	2010-05-14 06:56:28.000000000 +0200
-+++ imx-bootlets-10.05.02/linux_prep/include/mx23/platform.h	2013-05-19 00:11:40.000000000 +0200
+--- a/linux_prep/include/mx23/platform.h
++++ b/linux_prep/include/mx23/platform.h
 @@ -19,6 +19,10 @@
  
  #if defined (BOARD_STMP378X_DEV)
@@ -87,10 +83,9 @@ diff -ruN imx-bootlets-10.05.02.orig/linux_prep/include/mx23/platform.h imx-boot
  #else
  #error "Allocate a machine ID for your board"
  #endif
-diff -ruN imx-bootlets-10.05.02.orig/linux_prep/Makefile imx-bootlets-10.05.02/linux_prep/Makefile
---- imx-bootlets-10.05.02.orig/linux_prep/Makefile	2010-05-14 06:56:28.000000000 +0200
-+++ imx-bootlets-10.05.02/linux_prep/Makefile	2013-05-19 00:11:40.000000000 +0200
-@@ -69,6 +69,11 @@
+--- a/linux_prep/Makefile
++++ b/linux_prep/Makefile
+@@ -69,6 +69,11 @@ ARCH = mx28
  HW_OBJS = $(LRADC_OBJS)
  CFLAGS += -DMX28 -DBOARD_MX28_EVK
  endif
@@ -102,10 +97,9 @@ diff -ruN imx-bootlets-10.05.02.orig/linux_prep/Makefile imx-bootlets-10.05.02/l
  
  # Generic code
  CORE_OBJS = entry.o resume.o cmdlines.o setup.o keys.o
-diff -ruN imx-bootlets-10.05.02.orig/Makefile imx-bootlets-10.05.02/Makefile
---- imx-bootlets-10.05.02.orig/Makefile	2010-05-14 06:56:28.000000000 +0200
-+++ imx-bootlets-10.05.02/Makefile	2013-05-19 00:15:02.000000000 +0200
-@@ -3,9 +3,9 @@
+--- a/Makefile
++++ b/Makefile
+@@ -3,9 +3,9 @@ MEM_TYPE ?= MEM_DDR1
  export MEM_TYPE
  
  DFT_IMAGE=$(DEV_IMAGE)/boot/zImage
@@ -117,7 +111,7 @@ diff -ruN imx-bootlets-10.05.02.orig/Makefile imx-bootlets-10.05.02/Makefile
  
  ifeq ($(BOARD), stmp37xx_dev)
  ARCH = 37xx
-@@ -16,6 +16,9 @@
+@@ -16,6 +16,9 @@ endif
  ifeq ($(BOARD), iMX28_EVK)
  ARCH = mx28
  endif
@@ -127,7 +121,7 @@ diff -ruN imx-bootlets-10.05.02.orig/Makefile imx-bootlets-10.05.02/Makefile
  
  all: build_prep gen_bootstream
  
-@@ -93,6 +96,8 @@
+@@ -94,6 +97,8 @@ distclean: clean
  clean:
  	-rm -rf *.sb
  	rm -f sd_mmc_bootstream.raw
@@ -136,9 +130,8 @@ diff -ruN imx-bootlets-10.05.02.orig/Makefile imx-bootlets-10.05.02/Makefile
  	$(MAKE) -C linux_prep clean ARCH=$(ARCH)
  	$(MAKE) -C boot_prep clean ARCH=$(ARCH)
  	$(MAKE) -C power_prep clean ARCH=$(ARCH)
-diff -ruN imx-bootlets-10.05.02.orig/uboot.db imx-bootlets-10.05.02/uboot.db
---- imx-bootlets-10.05.02.orig/uboot.db	2010-05-14 06:56:28.000000000 +0200
-+++ imx-bootlets-10.05.02/uboot.db	2013-05-19 00:11:40.000000000 +0200
+--- a/uboot.db
++++ b/uboot.db
 @@ -3,7 +3,7 @@
  sources {
  	power_prep="./power_prep/power_prep";
diff --git a/package/kernel/rtl8812au-ct/Makefile b/package/kernel/rtl8812au-ct/Makefile
index 9c6cf6e7f2..bac73a300c 100644
--- a/package/kernel/rtl8812au-ct/Makefile
+++ b/package/kernel/rtl8812au-ct/Makefile
@@ -7,7 +7,7 @@ PKG_LICENSE:=GPLv2
 PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/greearb/rtl8812AU_8821AU_linux.git
-PKG_MIRROR_HASH:=09e33b1cede3f4457d4324fe30ea5fb92b240bcd6e647bbb689fa336f3b07968
+PKG_MIRROR_HASH:=aee819df4ba83251b59bd1d4f412287b27105e5de9284bb09579f0e1a1538328
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_DATE:=2020-12-07
 PKG_SOURCE_VERSION:=1e9689c89fa627d2d764ba0e8359fd444fe8458f
diff --git a/package/libs/zlib/patches/002-arm-specific-optimisations-for-inflate.patch b/package/libs/zlib/patches/002-arm-specific-optimisations-for-inflate.patch
index 475ed6f3e9..d181b034e5 100644
--- a/package/libs/zlib/patches/002-arm-specific-optimisations-for-inflate.patch
+++ b/package/libs/zlib/patches/002-arm-specific-optimisations-for-inflate.patch
@@ -1907,505 +1907,3 @@ index 00000000..ac333e8c
 +    state = (struct inflate_state FAR *)strm->state;
 +    return (unsigned long)(state->next - state->codes);
 +}
-
-From 247147654fe5cd11cf15d8dff91440405ea57040 Mon Sep 17 00:00:00 2001
-From: Simon Hosie <simon.hosie@arm.com>
-Date: Wed, 12 Apr 2017 15:44:21 -0700
-Subject: [PATCH 2/2] Inflate using wider loads and stores
-
-In inflate_fast() the output pointer always has plenty of room to write. This
-means that so long as the target is capable, wide un-aligned loads and stores
-can be used to transfer several bytes at once. When the reference distance is
-too short simply unroll the data a little to increase the distance.
-
-Change-Id: I59854eb25d2b1e43561c8a2afaf9175bf10cf674
----
- contrib/arm/chunkcopy.h | 279 ++++++++++++++++++++++++++++++++++++++++++++++++
- contrib/arm/inffast.c   |  96 +++++++----------
- contrib/arm/inflate.c   |  22 ++--
- 3 files changed, 335 insertions(+), 62 deletions(-)
- create mode 100644 contrib/arm/chunkcopy.h
-
-diff --git a/contrib/arm/chunkcopy.h b/contrib/arm/chunkcopy.h
-new file mode 100644
-index 00000000..2d6fd6f9
---- /dev/null
-+++ b/contrib/arm/chunkcopy.h
-@@ -0,0 +1,279 @@
-+/* chunkcopy.h -- fast copies and sets
-+ * Copyright (C) 2017 ARM, Inc.
-+ * For conditions of distribution and use, see copyright notice in zlib.h
-+ */
-+
-+#ifndef CHUNKCOPY_H
-+#define CHUNKCOPY_H
-+
-+#include "zutil.h"
-+#include <arm_neon.h>
-+
-+#if __STDC_VERSION__ >= 199901L
-+#define Z_RESTRICT restrict
-+#else
-+#define Z_RESTRICT
-+#endif
-+
-+typedef uint8x16_t chunkcopy_chunk_t;
-+#define CHUNKCOPY_CHUNK_SIZE sizeof(chunkcopy_chunk_t)
-+
-+/*
-+   Ask the compiler to perform a wide, unaligned load with an machine
-+   instruction appropriate for the chunkcopy_chunk_t type.
-+ */
-+static inline chunkcopy_chunk_t loadchunk(const unsigned char FAR *s) {
-+    chunkcopy_chunk_t c;
-+    __builtin_memcpy(&c, s, sizeof(c));
-+    return c;
-+}
-+
-+/*
-+   Ask the compiler to perform a wide, unaligned store with an machine
-+   instruction appropriate for the chunkcopy_chunk_t type.
-+ */
-+static inline void storechunk(unsigned char FAR *d, chunkcopy_chunk_t c) {
-+    __builtin_memcpy(d, &c, sizeof(c));
-+}
-+
-+/*
-+   Perform a memcpy-like operation, but assume that length is non-zero and that
-+   it's OK to overwrite at least CHUNKCOPY_CHUNK_SIZE bytes of output even if
-+   the length is shorter than this.
-+
-+   It also guarantees that it will properly unroll the data if the distance
-+   between `out` and `from` is at least CHUNKCOPY_CHUNK_SIZE, which we rely on
-+   in chunkcopy_relaxed().
-+
-+   Aside from better memory bus utilisation, this means that short copies
-+   (CHUNKCOPY_CHUNK_SIZE bytes or fewer) will fall straight through the loop
-+   without iteration, which will hopefully make the branch prediction more
-+   reliable.
-+ */
-+static inline unsigned char FAR *chunkcopy_core(unsigned char FAR *out,
-+                                                const unsigned char FAR *from,
-+                                                unsigned len) {
-+    int bump = (--len % CHUNKCOPY_CHUNK_SIZE) + 1;
-+    storechunk(out, loadchunk(from));
-+    out += bump;
-+    from += bump;
-+    len /= CHUNKCOPY_CHUNK_SIZE;
-+    while (len-- > 0) {
-+        storechunk(out, loadchunk(from));
-+        out += CHUNKCOPY_CHUNK_SIZE;
-+        from += CHUNKCOPY_CHUNK_SIZE;
-+    }
-+    return out;
-+}
-+
-+/*
-+   Like chunkcopy_core, but avoid writing beyond of legal output.
-+
-+   Accepts an additional pointer to the end of safe output.  A generic safe
-+   copy would use (out + len), but it's normally the case that the end of the
-+   output buffer is beyond the end of the current copy, and this can still be
-+   exploited.
-+ */
-+static inline unsigned char FAR *chunkcopy_core_safe(unsigned char FAR *out,
-+                                                     const unsigned char FAR * from,
-+                                                     unsigned len,
-+                                                     unsigned char FAR *limit) {
-+    Assert(out + len <= limit, "chunk copy exceeds safety limit");
-+    if (limit - out < CHUNKCOPY_CHUNK_SIZE) {
-+        const unsigned char FAR * Z_RESTRICT rfrom = from;
-+        if (len & 8) { __builtin_memcpy(out, rfrom, 8); out += 8; rfrom += 8; }
-+        if (len & 4) { __builtin_memcpy(out, rfrom, 4); out += 4; rfrom += 4; }
-+        if (len & 2) { __builtin_memcpy(out, rfrom, 2); out += 2; rfrom += 2; }
-+        if (len & 1) { *out++ = *rfrom++; }
-+        return out;
-+    }
-+    return chunkcopy_core(out, from, len);
-+}
-+
-+/*
-+   Perform short copies until distance can be rewritten as being at least
-+   CHUNKCOPY_CHUNK_SIZE.
-+
-+   This assumes that it's OK to overwrite at least the first
-+   2*CHUNKCOPY_CHUNK_SIZE bytes of output even if the copy is shorter than
-+   this.  This assumption holds within inflate_fast() which starts every
-+   iteration with at least 258 bytes of output space available (258 being the
-+   maximum length output from a single token; see inffast.c).
-+ */
-+static inline unsigned char FAR *chunkunroll_relaxed(unsigned char FAR *out,
-+                                                     unsigned FAR *dist,
-+                                                     unsigned FAR *len) {
-+    const unsigned char FAR *from = out - *dist;
-+    while (*dist < *len && *dist < CHUNKCOPY_CHUNK_SIZE) {
-+        storechunk(out, loadchunk(from));
-+        out += *dist;
-+        *len -= *dist;
-+        *dist += *dist;
-+    }
-+    return out;
-+}
-+
-+
-+static inline uint8x16_t chunkset_vld1q_dup_u8x8(const unsigned char FAR * Z_RESTRICT from) {
-+#if defined(__clang__) || defined(__aarch64__)
-+    return vreinterpretq_u8_u64(vld1q_dup_u64((void *)from));
-+#else
-+    /* 32-bit GCC uses an alignment hint for vld1q_dup_u64, even when given a
-+     * void pointer, so here's an alternate implementation.
-+     */
-+    uint8x8_t h = vld1_u8(from);
-+    return vcombine_u8(h, h);
-+#endif
-+}
-+
-+/*
-+   Perform an overlapping copy which behaves as a memset() operation, but
-+   supporting periods other than one, and assume that length is non-zero and
-+   that it's OK to overwrite at least CHUNKCOPY_CHUNK_SIZE*3 bytes of output
-+   even if the length is shorter than this.
-+ */
-+static inline unsigned char FAR *chunkset_core(unsigned char FAR *out,
-+                                               unsigned period,
-+                                               unsigned len) {
-+    uint8x16_t f;
-+    int bump = ((len - 1) % sizeof(f)) + 1;
-+
-+    switch (period) {
-+    case 1:
-+        f = vld1q_dup_u8(out - 1);
-+        vst1q_u8(out, f);
-+        out += bump;
-+        len -= bump;
-+        while (len > 0) {
-+            vst1q_u8(out, f);
-+            out += sizeof(f);
-+            len -= sizeof(f);
-+        }
-+        return out;
-+    case 2:
-+        f = vreinterpretq_u8_u16(vld1q_dup_u16((void *)(out - 2)));
-+        vst1q_u8(out, f);
-+        out += bump;
-+        len -= bump;
-+        if (len > 0) {
-+            f = vreinterpretq_u8_u16(vld1q_dup_u16((void *)(out - 2)));
-+            do {
-+                vst1q_u8(out, f);
-+                out += sizeof(f);
-+                len -= sizeof(f);
-+            } while (len > 0);
-+        }
-+        return out;
-+    case 4:
-+        f = vreinterpretq_u8_u32(vld1q_dup_u32((void *)(out - 4)));
-+        vst1q_u8(out, f);
-+        out += bump;
-+        len -= bump;
-+        if (len > 0) {
-+            f = vreinterpretq_u8_u32(vld1q_dup_u32((void *)(out - 4)));
-+            do {
-+                vst1q_u8(out, f);
-+                out += sizeof(f);
-+                len -= sizeof(f);
-+            } while (len > 0);
-+        }
-+        return out;
-+    case 8:
-+        f = chunkset_vld1q_dup_u8x8(out - 8);
-+        vst1q_u8(out, f);
-+        out += bump;
-+        len -= bump;
-+        if (len > 0) {
-+            f = chunkset_vld1q_dup_u8x8(out - 8);
-+            do {
-+                vst1q_u8(out, f);
-+                out += sizeof(f);
-+                len -= sizeof(f);
-+            } while (len > 0);
-+        }
-+        return out;
-+    }
-+    out = chunkunroll_relaxed(out, &period, &len);
-+    return chunkcopy_core(out, out - period, len);
-+}
-+
-+/*
-+   Perform a memcpy-like operation, but assume that length is non-zero and that
-+   it's OK to overwrite at least CHUNKCOPY_CHUNK_SIZE bytes of output even if
-+   the length is shorter than this.
-+
-+   Unlike chunkcopy_core() above, no guarantee is made regarding the behaviour
-+   of overlapping buffers, regardless of the distance between the pointers.
-+   This is reflected in the `restrict`-qualified pointers, allowing the
-+   compiler to reorder loads and stores.
-+ */
-+static inline unsigned char FAR *chunkcopy_relaxed(unsigned char FAR * Z_RESTRICT out,
-+                                                   const unsigned char FAR * Z_RESTRICT from,
-+                                                   unsigned len) {
-+    return chunkcopy_core(out, from, len);
-+}
-+
-+/*
-+   Like chunkcopy_relaxed, but avoid writing beyond of legal output.
-+
-+   Unlike chunkcopy_core_safe() above, no guarantee is made regarding the
-+   behaviour of overlapping buffers, regardless of the distance between the
-+   pointers.  This is reflected in the `restrict`-qualified pointers, allowing
-+   the compiler to reorder loads and stores.
-+
-+   Accepts an additional pointer to the end of safe output.  A generic safe
-+   copy would use (out + len), but it's normally the case that the end of the
-+   output buffer is beyond the end of the current copy, and this can still be
-+   exploited.
-+ */
-+static inline unsigned char FAR *chunkcopy_safe(unsigned char FAR *out,
-+                                                const unsigned char FAR * Z_RESTRICT from,
-+                                                unsigned len,
-+                                                unsigned char FAR *limit) {
-+    Assert(out + len <= limit, "chunk copy exceeds safety limit");
-+    return chunkcopy_core_safe(out, from, len, limit);
-+}
-+
-+/*
-+   Perform chunky copy within the same buffer, where the source and destination
-+   may potentially overlap.
-+
-+   Assumes that len > 0 on entry, and that it's safe to write at least
-+   CHUNKCOPY_CHUNK_SIZE*3 bytes to the output.
-+ */
-+static inline unsigned char FAR *chunkcopy_lapped_relaxed(unsigned char FAR *out,
-+                                                          unsigned dist,
-+                                                          unsigned len) {
-+    if (dist < len && dist < CHUNKCOPY_CHUNK_SIZE) {
-+        return chunkset_core(out, dist, len);
-+    }
-+    return chunkcopy_core(out, out - dist, len);
-+}
-+
-+/*
-+   Behave like chunkcopy_lapped_relaxed, but avoid writing beyond of legal output.
-+
-+   Accepts an additional pointer to the end of safe output.  A generic safe
-+   copy would use (out + len), but it's normally the case that the end of the
-+   output buffer is beyond the end of the current copy, and this can still be
-+   exploited.
-+ */
-+static inline unsigned char FAR *chunkcopy_lapped_safe(unsigned char FAR *out,
-+                                                       unsigned dist,
-+                                                       unsigned len,
-+                                                       unsigned char FAR *limit) {
-+    Assert(out + len <= limit, "chunk copy exceeds safety limit");
-+    if (limit - out < CHUNKCOPY_CHUNK_SIZE * 3) {
-+        /* TODO: try harder to optimise this */
-+        while (len-- > 0) {
-+            *out = *(out - dist);
-+            out++;
-+        }
-+        return out;
-+    }
-+    return chunkcopy_lapped_relaxed(out, dist, len);
-+}
-+
-+#undef Z_RESTRICT
-+
-+#endif /* CHUNKCOPY_H */
-diff --git a/contrib/arm/inffast.c b/contrib/arm/inffast.c
-index 0dbd1dbc..f7f50071 100644
---- a/contrib/arm/inffast.c
-+++ b/contrib/arm/inffast.c
-@@ -7,6 +7,7 @@
- #include "inftrees.h"
- #include "inflate.h"
- #include "inffast.h"
-+#include "chunkcopy.h"
- 
- #ifdef ASMINF
- #  pragma message("Assembler code may have bugs -- use at your own risk")
-@@ -57,6 +58,7 @@ unsigned start;         /* inflate()'s starting value for strm->avail_out */
-     unsigned char FAR *out;     /* local strm->next_out */
-     unsigned char FAR *beg;     /* inflate()'s initial strm->next_out */
-     unsigned char FAR *end;     /* while out < end, enough space available */
-+    unsigned char FAR *limit;   /* safety limit for chunky copies */
- #ifdef INFLATE_STRICT
-     unsigned dmax;              /* maximum distance from zlib header */
- #endif
-@@ -84,12 +86,13 @@ unsigned start;         /* inflate()'s starting value for strm->avail_out */
-     out = strm->next_out;
-     beg = out - (start - strm->avail_out);
-     end = out + (strm->avail_out - 257);
-+    limit = out + strm->avail_out;
- #ifdef INFLATE_STRICT
-     dmax = state->dmax;
- #endif
-     wsize = state->wsize;
-     whave = state->whave;
--    wnext = state->wnext;
-+    wnext = (state->wnext == 0 && whave >= wsize) ? wsize : state->wnext;
-     window = state->window;
-     hold = state->hold;
-     bits = state->bits;
-@@ -197,70 +200,51 @@ unsigned start;         /* inflate()'s starting value for strm->avail_out */
- #endif
-                     }
-                     from = window;
--                    if (wnext == 0) {           /* very common case */
--                        from += wsize - op;
--                        if (op < len) {         /* some from window */
--                            len -= op;
--                            do {
--                                *out++ = *from++;
--                            } while (--op);
--                            from = out - dist;  /* rest from output */
--                        }
-+                    if (wnext >= op) {          /* contiguous in window */
-+                        from += wnext - op;
-                     }
--                    else if (wnext < op) {      /* wrap around window */
--                        from += wsize + wnext - op;
-+                    else {                      /* wrap around window */
-                         op -= wnext;
-+                        from += wsize - op;
-                         if (op < len) {         /* some from end of window */
-                             len -= op;
--                            do {
--                                *out++ = *from++;
--                            } while (--op);
--                            from = window;
--                            if (wnext < len) {  /* some from start of window */
--                                op = wnext;
--                                len -= op;
--                                do {
--                                    *out++ = *from++;
--                                } while (--op);
--                                from = out - dist;      /* rest from output */
--                            }
-+                            out = chunkcopy_safe(out, from, op, limit);
-+                            from = window;      /* more from start of window */
-+                            op = wnext;
-+                            /* This (rare) case can create a situation where
-+                               the first chunkcopy below must be checked.
-+                             */
-                         }
-                     }
--                    else {                      /* contiguous in window */
--                        from += wnext - op;
--                        if (op < len) {         /* some from window */
--                            len -= op;
--                            do {
--                                *out++ = *from++;
--                            } while (--op);
--                            from = out - dist;  /* rest from output */
--                        }
--                    }
--                    while (len > 2) {
--                        *out++ = *from++;
--                        *out++ = *from++;
--                        *out++ = *from++;
--                        len -= 3;
--                    }
--                    if (len) {
--                        *out++ = *from++;
--                        if (len > 1)
--                            *out++ = *from++;
-+                    if (op < len) {             /* still need some from output */
-+                        out = chunkcopy_safe(out, from, op, limit);
-+                        len -= op;
-+                        /* When dist is small the amount of data that can be
-+                           copied from the window is also small, and progress
-+                           towards the dangerous end of the output buffer is
-+                           also small.  This means that for trivial memsets and
-+                           for chunkunroll_relaxed() a safety check is
-+                           unnecessary.  However, these conditions may not be
-+                           entered at all, and in that case it's possible that
-+                           the main copy is near the end.
-+                          */
-+                        out = chunkunroll_relaxed(out, &dist, &len);
-+                        out = chunkcopy_safe(out, out - dist, len, limit);
-+                    } else {
-+                        /* from points to window, so there is no risk of
-+                           overlapping pointers requiring memset-like behaviour
-+                         */
-+                        out = chunkcopy_safe(out, from, len, limit);
-                     }
-                 }
-                 else {
--                    from = out - dist;          /* copy direct from output */
--                    do {                        /* minimum length is three */
--                        *out++ = *from++;
--                        *out++ = *from++;
--                        *out++ = *from++;
--                        len -= 3;
--                    } while (len > 2);
--                    if (len) {
--                        *out++ = *from++;
--                        if (len > 1)
--                            *out++ = *from++;
--                    }
-+                    /* Whole reference is in range of current output.  No
-+                       range checks are necessary because we start with room
-+                       for at least 258 bytes of output, so unroll and roundoff
-+                       operations can write beyond `out+len` so long as they
-+                       stay within 258 bytes of `out`.
-+                     */
-+                    out = chunkcopy_lapped_relaxed(out, dist, len);
-                 }
-             }
-             else if ((op & 64) == 0) {          /* 2nd level distance code */
-diff --git a/contrib/arm/inflate.c b/contrib/arm/inflate.c
-index ac333e8c..e40322c3 100644
---- a/contrib/arm/inflate.c
-+++ b/contrib/arm/inflate.c
-@@ -84,6 +84,7 @@
- #include "inftrees.h"
- #include "inflate.h"
- #include "inffast.h"
-+#include "contrib/arm/chunkcopy.h"
- 
- #ifdef MAKEFIXED
- #  ifndef BUILDFIXED
-@@ -405,10 +406,20 @@ unsigned copy;
- 
-     /* if it hasn't been done already, allocate space for the window */
-     if (state->window == Z_NULL) {
-+        unsigned wsize = 1U << state->wbits;
-         state->window = (unsigned char FAR *)
--                        ZALLOC(strm, 1U << state->wbits,
-+                        ZALLOC(strm, wsize + CHUNKCOPY_CHUNK_SIZE,
-                                sizeof(unsigned char));
-         if (state->window == Z_NULL) return 1;
-+#ifdef INFLATE_CLEAR_UNUSED_UNDEFINED
-+        /* Copies from the overflow portion of this buffer are undefined and
-+           may cause analysis tools to raise a warning if we don't initialize
-+           it.  However, this undefined data overwrites other undefined data
-+           and is subsequently either overwritten or left deliberately
-+           undefined at the end of decode; so there's really no point.
-+         */
-+        memset(state->window + wsize, 0, CHUNKCOPY_CHUNK_SIZE);
-+#endif
-     }
- 
-     /* if window not in use yet, initialize */
-@@ -1175,17 +1186,16 @@ int flush;
-                 else
-                     from = state->window + (state->wnext - copy);
-                 if (copy > state->length) copy = state->length;
-+                if (copy > left) copy = left;
-+                put = chunkcopy_safe(put, from, copy, put + left);
-             }
-             else {                              /* copy from output */
--                from = put - state->offset;
-                 copy = state->length;
-+                if (copy > left) copy = left;
-+                put = chunkcopy_lapped_safe(put, state->offset, copy, put + left);
-             }
--            if (copy > left) copy = left;
-             left -= copy;
-             state->length -= copy;
--            do {
--                *put++ = *from++;
--            } while (--copy);
-             if (state->length == 0) state->mode = LEN;
-             break;
-         case LIT:
diff --git a/package/libs/zlib/patches/003-arm-specific-optimisations-for-inflate.patch b/package/libs/zlib/patches/003-arm-specific-optimisations-for-inflate.patch
new file mode 100644
index 0000000000..9370264c40
--- /dev/null
+++ b/package/libs/zlib/patches/003-arm-specific-optimisations-for-inflate.patch
@@ -0,0 +1,501 @@
+From 247147654fe5cd11cf15d8dff91440405ea57040 Mon Sep 17 00:00:00 2001
+From: Simon Hosie <simon.hosie@arm.com>
+Date: Wed, 12 Apr 2017 15:44:21 -0700
+Subject: [PATCH 2/2] Inflate using wider loads and stores
+
+In inflate_fast() the output pointer always has plenty of room to write. This
+means that so long as the target is capable, wide un-aligned loads and stores
+can be used to transfer several bytes at once. When the reference distance is
+too short simply unroll the data a little to increase the distance.
+
+Change-Id: I59854eb25d2b1e43561c8a2afaf9175bf10cf674
+---
+ contrib/arm/chunkcopy.h | 279 ++++++++++++++++++++++++++++++++++++++++++++++++
+ contrib/arm/inffast.c   |  96 +++++++----------
+ contrib/arm/inflate.c   |  22 ++--
+ 3 files changed, 335 insertions(+), 62 deletions(-)
+ create mode 100644 contrib/arm/chunkcopy.h
+
+diff --git a/contrib/arm/chunkcopy.h b/contrib/arm/chunkcopy.h
+new file mode 100644
+index 00000000..2d6fd6f9
+--- /dev/null
++++ b/contrib/arm/chunkcopy.h
+@@ -0,0 +1,279 @@
++/* chunkcopy.h -- fast copies and sets
++ * Copyright (C) 2017 ARM, Inc.
++ * For conditions of distribution and use, see copyright notice in zlib.h
++ */
++
++#ifndef CHUNKCOPY_H
++#define CHUNKCOPY_H
++
++#include "zutil.h"
++#include <arm_neon.h>
++
++#if __STDC_VERSION__ >= 199901L
++#define Z_RESTRICT restrict
++#else
++#define Z_RESTRICT
++#endif
++
++typedef uint8x16_t chunkcopy_chunk_t;
++#define CHUNKCOPY_CHUNK_SIZE sizeof(chunkcopy_chunk_t)
++
++/*
++   Ask the compiler to perform a wide, unaligned load with an machine
++   instruction appropriate for the chunkcopy_chunk_t type.
++ */
++static inline chunkcopy_chunk_t loadchunk(const unsigned char FAR *s) {
++    chunkcopy_chunk_t c;
++    __builtin_memcpy(&c, s, sizeof(c));
++    return c;
++}
++
++/*
++   Ask the compiler to perform a wide, unaligned store with an machine
++   instruction appropriate for the chunkcopy_chunk_t type.
++ */
++static inline void storechunk(unsigned char FAR *d, chunkcopy_chunk_t c) {
++    __builtin_memcpy(d, &c, sizeof(c));
++}
++
++/*
++   Perform a memcpy-like operation, but assume that length is non-zero and that
++   it's OK to overwrite at least CHUNKCOPY_CHUNK_SIZE bytes of output even if
++   the length is shorter than this.
++
++   It also guarantees that it will properly unroll the data if the distance
++   between `out` and `from` is at least CHUNKCOPY_CHUNK_SIZE, which we rely on
++   in chunkcopy_relaxed().
++
++   Aside from better memory bus utilisation, this means that short copies
++   (CHUNKCOPY_CHUNK_SIZE bytes or fewer) will fall straight through the loop
++   without iteration, which will hopefully make the branch prediction more
++   reliable.
++ */
++static inline unsigned char FAR *chunkcopy_core(unsigned char FAR *out,
++                                                const unsigned char FAR *from,
++                                                unsigned len) {
++    int bump = (--len % CHUNKCOPY_CHUNK_SIZE) + 1;
++    storechunk(out, loadchunk(from));
++    out += bump;
++    from += bump;
++    len /= CHUNKCOPY_CHUNK_SIZE;
++    while (len-- > 0) {
++        storechunk(out, loadchunk(from));
++        out += CHUNKCOPY_CHUNK_SIZE;
++        from += CHUNKCOPY_CHUNK_SIZE;
++    }
++    return out;
++}
++
++/*
++   Like chunkcopy_core, but avoid writing beyond of legal output.
++
++   Accepts an additional pointer to the end of safe output.  A generic safe
++   copy would use (out + len), but it's normally the case that the end of the
++   output buffer is beyond the end of the current copy, and this can still be
++   exploited.
++ */
++static inline unsigned char FAR *chunkcopy_core_safe(unsigned char FAR *out,
++                                                     const unsigned char FAR * from,
++                                                     unsigned len,
++                                                     unsigned char FAR *limit) {
++    Assert(out + len <= limit, "chunk copy exceeds safety limit");
++    if (limit - out < CHUNKCOPY_CHUNK_SIZE) {
++        const unsigned char FAR * Z_RESTRICT rfrom = from;
++        if (len & 8) { __builtin_memcpy(out, rfrom, 8); out += 8; rfrom += 8; }
++        if (len & 4) { __builtin_memcpy(out, rfrom, 4); out += 4; rfrom += 4; }
++        if (len & 2) { __builtin_memcpy(out, rfrom, 2); out += 2; rfrom += 2; }
++        if (len & 1) { *out++ = *rfrom++; }
++        return out;
++    }
++    return chunkcopy_core(out, from, len);
++}
++
++/*
++   Perform short copies until distance can be rewritten as being at least
++   CHUNKCOPY_CHUNK_SIZE.
++
++   This assumes that it's OK to overwrite at least the first
++   2*CHUNKCOPY_CHUNK_SIZE bytes of output even if the copy is shorter than
++   this.  This assumption holds within inflate_fast() which starts every
++   iteration with at least 258 bytes of output space available (258 being the
++   maximum length output from a single token; see inffast.c).
++ */
++static inline unsigned char FAR *chunkunroll_relaxed(unsigned char FAR *out,
++                                                     unsigned FAR *dist,
++                                                     unsigned FAR *len) {
++    const unsigned char FAR *from = out - *dist;
++    while (*dist < *len && *dist < CHUNKCOPY_CHUNK_SIZE) {
++        storechunk(out, loadchunk(from));
++        out += *dist;
++        *len -= *dist;
++        *dist += *dist;
++    }
++    return out;
++}
++
++
++static inline uint8x16_t chunkset_vld1q_dup_u8x8(const unsigned char FAR * Z_RESTRICT from) {
++#if defined(__clang__) || defined(__aarch64__)
++    return vreinterpretq_u8_u64(vld1q_dup_u64((void *)from));
++#else
++    /* 32-bit GCC uses an alignment hint for vld1q_dup_u64, even when given a
++     * void pointer, so here's an alternate implementation.
++     */
++    uint8x8_t h = vld1_u8(from);
++    return vcombine_u8(h, h);
++#endif
++}
++
++/*
++   Perform an overlapping copy which behaves as a memset() operation, but
++   supporting periods other than one, and assume that length is non-zero and
++   that it's OK to overwrite at least CHUNKCOPY_CHUNK_SIZE*3 bytes of output
++   even if the length is shorter than this.
++ */
++static inline unsigned char FAR *chunkset_core(unsigned char FAR *out,
++                                               unsigned period,
++                                               unsigned len) {
++    uint8x16_t f;
++    int bump = ((len - 1) % sizeof(f)) + 1;
++
++    switch (period) {
++    case 1:
++        f = vld1q_dup_u8(out - 1);
++        vst1q_u8(out, f);
++        out += bump;
++        len -= bump;
++        while (len > 0) {
++            vst1q_u8(out, f);
++            out += sizeof(f);
++            len -= sizeof(f);
++        }
++        return out;
++    case 2:
++        f = vreinterpretq_u8_u16(vld1q_dup_u16((void *)(out - 2)));
++        vst1q_u8(out, f);
++        out += bump;
++        len -= bump;
++        if (len > 0) {
++            f = vreinterpretq_u8_u16(vld1q_dup_u16((void *)(out - 2)));
++            do {
++                vst1q_u8(out, f);
++                out += sizeof(f);
++                len -= sizeof(f);
++            } while (len > 0);
++        }
++        return out;
++    case 4:
++        f = vreinterpretq_u8_u32(vld1q_dup_u32((void *)(out - 4)));
++        vst1q_u8(out, f);
++        out += bump;
++        len -= bump;
++        if (len > 0) {
++            f = vreinterpretq_u8_u32(vld1q_dup_u32((void *)(out - 4)));
++            do {
++                vst1q_u8(out, f);
++                out += sizeof(f);
++                len -= sizeof(f);
++            } while (len > 0);
++        }
++        return out;
++    case 8:
++        f = chunkset_vld1q_dup_u8x8(out - 8);
++        vst1q_u8(out, f);
++        out += bump;
++        len -= bump;
++        if (len > 0) {
++            f = chunkset_vld1q_dup_u8x8(out - 8);
++            do {
++                vst1q_u8(out, f);
++                out += sizeof(f);
++                len -= sizeof(f);
++            } while (len > 0);
++        }
++        return out;
++    }
++    out = chunkunroll_relaxed(out, &period, &len);
++    return chunkcopy_core(out, out - period, len);
++}
++
++/*
++   Perform a memcpy-like operation, but assume that length is non-zero and that
++   it's OK to overwrite at least CHUNKCOPY_CHUNK_SIZE bytes of output even if
++   the length is shorter than this.
++
++   Unlike chunkcopy_core() above, no guarantee is made regarding the behaviour
++   of overlapping buffers, regardless of the distance between the pointers.
++   This is reflected in the `restrict`-qualified pointers, allowing the
++   compiler to reorder loads and stores.
++ */
++static inline unsigned char FAR *chunkcopy_relaxed(unsigned char FAR * Z_RESTRICT out,
++                                                   const unsigned char FAR * Z_RESTRICT from,
++                                                   unsigned len) {
++    return chunkcopy_core(out, from, len);
++}
++
++/*
++   Like chunkcopy_relaxed, but avoid writing beyond of legal output.
++
++   Unlike chunkcopy_core_safe() above, no guarantee is made regarding the
++   behaviour of overlapping buffers, regardless of the distance between the
++   pointers.  This is reflected in the `restrict`-qualified pointers, allowing
++   the compiler to reorder loads and stores.
++
++   Accepts an additional pointer to the end of safe output.  A generic safe
++   copy would use (out + len), but it's normally the case that the end of the
++   output buffer is beyond the end of the current copy, and this can still be
++   exploited.
++ */
++static inline unsigned char FAR *chunkcopy_safe(unsigned char FAR *out,
++                                                const unsigned char FAR * Z_RESTRICT from,
++                                                unsigned len,
++                                                unsigned char FAR *limit) {
++    Assert(out + len <= limit, "chunk copy exceeds safety limit");
++    return chunkcopy_core_safe(out, from, len, limit);
++}
++
++/*
++   Perform chunky copy within the same buffer, where the source and destination
++   may potentially overlap.
++
++   Assumes that len > 0 on entry, and that it's safe to write at least
++   CHUNKCOPY_CHUNK_SIZE*3 bytes to the output.
++ */
++static inline unsigned char FAR *chunkcopy_lapped_relaxed(unsigned char FAR *out,
++                                                          unsigned dist,
++                                                          unsigned len) {
++    if (dist < len && dist < CHUNKCOPY_CHUNK_SIZE) {
++        return chunkset_core(out, dist, len);
++    }
++    return chunkcopy_core(out, out - dist, len);
++}
++
++/*
++   Behave like chunkcopy_lapped_relaxed, but avoid writing beyond of legal output.
++
++   Accepts an additional pointer to the end of safe output.  A generic safe
++   copy would use (out + len), but it's normally the case that the end of the
++   output buffer is beyond the end of the current copy, and this can still be
++   exploited.
++ */
++static inline unsigned char FAR *chunkcopy_lapped_safe(unsigned char FAR *out,
++                                                       unsigned dist,
++                                                       unsigned len,
++                                                       unsigned char FAR *limit) {
++    Assert(out + len <= limit, "chunk copy exceeds safety limit");
++    if (limit - out < CHUNKCOPY_CHUNK_SIZE * 3) {
++        /* TODO: try harder to optimise this */
++        while (len-- > 0) {
++            *out = *(out - dist);
++            out++;
++        }
++        return out;
++    }
++    return chunkcopy_lapped_relaxed(out, dist, len);
++}
++
++#undef Z_RESTRICT
++
++#endif /* CHUNKCOPY_H */
+diff --git a/contrib/arm/inffast.c b/contrib/arm/inffast.c
+index 0dbd1dbc..f7f50071 100644
+--- a/contrib/arm/inffast.c
++++ b/contrib/arm/inffast.c
+@@ -7,6 +7,7 @@
+ #include "inftrees.h"
+ #include "inflate.h"
+ #include "inffast.h"
++#include "chunkcopy.h"
+ 
+ #ifdef ASMINF
+ #  pragma message("Assembler code may have bugs -- use at your own risk")
+@@ -57,6 +58,7 @@ unsigned start;         /* inflate()'s starting value for strm->avail_out */
+     unsigned char FAR *out;     /* local strm->next_out */
+     unsigned char FAR *beg;     /* inflate()'s initial strm->next_out */
+     unsigned char FAR *end;     /* while out < end, enough space available */
++    unsigned char FAR *limit;   /* safety limit for chunky copies */
+ #ifdef INFLATE_STRICT
+     unsigned dmax;              /* maximum distance from zlib header */
+ #endif
+@@ -84,12 +86,13 @@ unsigned start;         /* inflate()'s starting value for strm->avail_out */
+     out = strm->next_out;
+     beg = out - (start - strm->avail_out);
+     end = out + (strm->avail_out - 257);
++    limit = out + strm->avail_out;
+ #ifdef INFLATE_STRICT
+     dmax = state->dmax;
+ #endif
+     wsize = state->wsize;
+     whave = state->whave;
+-    wnext = state->wnext;
++    wnext = (state->wnext == 0 && whave >= wsize) ? wsize : state->wnext;
+     window = state->window;
+     hold = state->hold;
+     bits = state->bits;
+@@ -197,70 +200,51 @@ unsigned start;         /* inflate()'s starting value for strm->avail_out */
+ #endif
+                     }
+                     from = window;
+-                    if (wnext == 0) {           /* very common case */
+-                        from += wsize - op;
+-                        if (op < len) {         /* some from window */
+-                            len -= op;
+-                            do {
+-                                *out++ = *from++;
+-                            } while (--op);
+-                            from = out - dist;  /* rest from output */
+-                        }
++                    if (wnext >= op) {          /* contiguous in window */
++                        from += wnext - op;
+                     }
+-                    else if (wnext < op) {      /* wrap around window */
+-                        from += wsize + wnext - op;
++                    else {                      /* wrap around window */
+                         op -= wnext;
++                        from += wsize - op;
+                         if (op < len) {         /* some from end of window */
+                             len -= op;
+-                            do {
+-                                *out++ = *from++;
+-                            } while (--op);
+-                            from = window;
+-                            if (wnext < len) {  /* some from start of window */
+-                                op = wnext;
+-                                len -= op;
+-                                do {
+-                                    *out++ = *from++;
+-                                } while (--op);
+-                                from = out - dist;      /* rest from output */
+-                            }
++                            out = chunkcopy_safe(out, from, op, limit);
++                            from = window;      /* more from start of window */
++                            op = wnext;
++                            /* This (rare) case can create a situation where
++                               the first chunkcopy below must be checked.
++                             */
+                         }
+                     }
+-                    else {                      /* contiguous in window */
+-                        from += wnext - op;
+-                        if (op < len) {         /* some from window */
+-                            len -= op;
+-                            do {
+-                                *out++ = *from++;
+-                            } while (--op);
+-                            from = out - dist;  /* rest from output */
+-                        }
+-                    }
+-                    while (len > 2) {
+-                        *out++ = *from++;
+-                        *out++ = *from++;
+-                        *out++ = *from++;
+-                        len -= 3;
+-                    }
+-                    if (len) {
+-                        *out++ = *from++;
+-                        if (len > 1)
+-                            *out++ = *from++;
++                    if (op < len) {             /* still need some from output */
++                        out = chunkcopy_safe(out, from, op, limit);
++                        len -= op;
++                        /* When dist is small the amount of data that can be
++                           copied from the window is also small, and progress
++                           towards the dangerous end of the output buffer is
++                           also small.  This means that for trivial memsets and
++                           for chunkunroll_relaxed() a safety check is
++                           unnecessary.  However, these conditions may not be
++                           entered at all, and in that case it's possible that
++                           the main copy is near the end.
++                          */
++                        out = chunkunroll_relaxed(out, &dist, &len);
++                        out = chunkcopy_safe(out, out - dist, len, limit);
++                    } else {
++                        /* from points to window, so there is no risk of
++                           overlapping pointers requiring memset-like behaviour
++                         */
++                        out = chunkcopy_safe(out, from, len, limit);
+                     }
+                 }
+                 else {
+-                    from = out - dist;          /* copy direct from output */
+-                    do {                        /* minimum length is three */
+-                        *out++ = *from++;
+-                        *out++ = *from++;
+-                        *out++ = *from++;
+-                        len -= 3;
+-                    } while (len > 2);
+-                    if (len) {
+-                        *out++ = *from++;
+-                        if (len > 1)
+-                            *out++ = *from++;
+-                    }
++                    /* Whole reference is in range of current output.  No
++                       range checks are necessary because we start with room
++                       for at least 258 bytes of output, so unroll and roundoff
++                       operations can write beyond `out+len` so long as they
++                       stay within 258 bytes of `out`.
++                     */
++                    out = chunkcopy_lapped_relaxed(out, dist, len);
+                 }
+             }
+             else if ((op & 64) == 0) {          /* 2nd level distance code */
+diff --git a/contrib/arm/inflate.c b/contrib/arm/inflate.c
+index ac333e8c..e40322c3 100644
+--- a/contrib/arm/inflate.c
++++ b/contrib/arm/inflate.c
+@@ -84,6 +84,7 @@
+ #include "inftrees.h"
+ #include "inflate.h"
+ #include "inffast.h"
++#include "contrib/arm/chunkcopy.h"
+ 
+ #ifdef MAKEFIXED
+ #  ifndef BUILDFIXED
+@@ -405,10 +406,20 @@ unsigned copy;
+ 
+     /* if it hasn't been done already, allocate space for the window */
+     if (state->window == Z_NULL) {
++        unsigned wsize = 1U << state->wbits;
+         state->window = (unsigned char FAR *)
+-                        ZALLOC(strm, 1U << state->wbits,
++                        ZALLOC(strm, wsize + CHUNKCOPY_CHUNK_SIZE,
+                                sizeof(unsigned char));
+         if (state->window == Z_NULL) return 1;
++#ifdef INFLATE_CLEAR_UNUSED_UNDEFINED
++        /* Copies from the overflow portion of this buffer are undefined and
++           may cause analysis tools to raise a warning if we don't initialize
++           it.  However, this undefined data overwrites other undefined data
++           and is subsequently either overwritten or left deliberately
++           undefined at the end of decode; so there's really no point.
++         */
++        memset(state->window + wsize, 0, CHUNKCOPY_CHUNK_SIZE);
++#endif
+     }
+ 
+     /* if window not in use yet, initialize */
+@@ -1175,17 +1186,16 @@ int flush;
+                 else
+                     from = state->window + (state->wnext - copy);
+                 if (copy > state->length) copy = state->length;
++                if (copy > left) copy = left;
++                put = chunkcopy_safe(put, from, copy, put + left);
+             }
+             else {                              /* copy from output */
+-                from = put - state->offset;
+                 copy = state->length;
++                if (copy > left) copy = left;
++                put = chunkcopy_lapped_safe(put, state->offset, copy, put + left);
+             }
+-            if (copy > left) copy = left;
+             left -= copy;
+             state->length -= copy;
+-            do {
+-                *put++ = *from++;
+-            } while (--copy);
+             if (state->length == 0) state->mode = LEN;
+             break;
+         case LIT:
diff --git a/package/libs/zlib/patches/003-attach-sourcefiles-in-patch-002-to-buildsystem.patch b/package/libs/zlib/patches/004-attach-sourcefiles-in-patch-002-to-buildsystem.patch
similarity index 100%
rename from package/libs/zlib/patches/003-attach-sourcefiles-in-patch-002-to-buildsystem.patch
rename to package/libs/zlib/patches/004-attach-sourcefiles-in-patch-002-to-buildsystem.patch
diff --git a/package/libs/zlib/patches/004-relative-pkg-config-paths.patch b/package/libs/zlib/patches/005-relative-pkg-config-paths.patch
similarity index 100%
rename from package/libs/zlib/patches/004-relative-pkg-config-paths.patch
rename to package/libs/zlib/patches/005-relative-pkg-config-paths.patch
diff --git a/scripts/json_add_image_info.py b/scripts/json_add_image_info.py
index d394cf4d1f..38cd3c487d 100755
--- a/scripts/json_add_image_info.py
+++ b/scripts/json_add_image_info.py
@@ -12,7 +12,7 @@ if len(argv) != 2:
 
 json_path = Path(argv[1])
 bin_dir = Path(getenv("BIN_DIR"))
-image_file = bin_dir / getenv("IMAGE_NAME")
+image_file = bin_dir / getenv("DEVICE_IMG_NAME")
 
 if not image_file.is_file():
     print("Skip JSON creation for non existing image ", image_file)
@@ -47,12 +47,12 @@ image_info = {
     "source_date_epoch": getenv("SOURCE_DATE_EPOCH"),
     "profiles": {
         device_id: {
-            "image_prefix": getenv("IMAGE_PREFIX"),
+            "image_prefix": getenv("DEVICE_IMG_PREFIX"),
             "images": [
                 {
                     "type": getenv("IMAGE_TYPE"),
                     "filesystem": getenv("IMAGE_FILESYSTEM"),
-                    "name": getenv("IMAGE_NAME"),
+                    "name": getenv("DEVICE_IMG_NAME"),
                     "sha256": image_hash,
                 }
             ],
diff --git a/target/linux/ath25/image/Makefile b/target/linux/ath25/image/Makefile
index a072f2408a..2b22d54105 100644
--- a/target/linux/ath25/image/Makefile
+++ b/target/linux/ath25/image/Makefile
@@ -67,7 +67,7 @@ define Device/generic
   IMAGE/kernel.lzma := elf-kernel | lzma-kernel
   IMAGE/rootfs.bin := append-rootfs | pad-rootfs | pad-to 128k
   IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | pad-to 128k | combined-image
-  IMAGE_NAME = $$(IMAGE_PREFIX)-$$(if $$(findstring kernel,$$(2)),,$$(1)-)$$(2)
+  DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(if $$(findstring kernel,$$(2)),,$$(1)-)$$(2)
 endef
 TARGET_DEVICES += generic
 
diff --git a/target/linux/ath79/dts/ar9331_glinet_gl-usb150.dts b/target/linux/ath79/dts/ar9331_glinet_gl-usb150.dts
index 80e1f228ff..d1c2654712 100644
--- a/target/linux/ath79/dts/ar9331_glinet_gl-usb150.dts
+++ b/target/linux/ath79/dts/ar9331_glinet_gl-usb150.dts
@@ -112,10 +112,6 @@
 	};
 };
 
-&uart {
-	status = "disabled";
-};
-
 &wmac {
 	status = "okay";
 
diff --git a/target/linux/ath79/dts/qca9557_engenius_eap1200h.dts b/target/linux/ath79/dts/qca9557_engenius_eap1200h.dts
index a7a77141e5..5a86da4bb3 100644
--- a/target/linux/ath79/dts/qca9557_engenius_eap1200h.dts
+++ b/target/linux/ath79/dts/qca9557_engenius_eap1200h.dts
@@ -1,10 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-#include "qca955x.dtsi"
+#include "qca955x_senao_loader.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
-#include <dt-bindings/mtd/partitions/uimage.h>
 
 / {
 	compatible = "engenius,eap1200h", "qca,qca9557";
@@ -55,91 +54,13 @@
 			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
 		};
 	};
-
-	virtual_flash {
-		compatible = "mtd-concat";
-
-		devices = <&fwconcat0 &fwconcat1>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				compatible = "openwrt,uimage", "denx,uimage";
-				openwrt,ih-magic = <IH_MAGIC_OKLI>;
-				label = "firmware";
-				reg = <0x0 0x0>;
-			};
-		};
-	};
 };
 
-&spi {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <40000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x000000 0x040000>;
-				read-only;
-			};
-
-			partition@40000 {
-				label = "u-boot-env";
-				reg = <0x040000 0x010000>;
-			};
-
-			partition@50000 {
-				label = "custom";
-				reg = <0x050000 0x050000>;
-				read-only;
-			};
-
-			partition@a0000 {
-				label = "loader";
-				reg = <0x0a0000 0x010000>;
-				read-only;
-			};
-
-			fwconcat1: partition@b0000 {
-				label = "fwconcat1";
-				reg = <0x0b0000 0x170000>;
-			};
-
-			partition@220000 {
-				label = "fakeroot";
-				reg = <0x220000 0x010000>;
-				read-only;
-			};
-
-			fwconcat0: partition@230000 {
-				label = "fwconcat0";
-				reg = <0x230000 0xb40000>;
-			};
-
-			partition@d70000 {
-				label = "failsafe";
-				reg = <0xd70000 0x280000>;
-				read-only;
-			};
-
-			art: partition@ff0000 {
-				label = "art";
-				reg = <0xff0000 0x010000>;
-				read-only;
-			};
-		};
+&partitions {
+	art: partition@ff0000 {
+		label = "art";
+		reg = <0xff0000 0x010000>;
+		read-only;
 	};
 };
 
diff --git a/target/linux/ath79/dts/qca9557_engenius_enstationac-v1.dts b/target/linux/ath79/dts/qca9557_engenius_enstationac-v1.dts
index af397dfd3a..6956996866 100644
--- a/target/linux/ath79/dts/qca9557_engenius_enstationac-v1.dts
+++ b/target/linux/ath79/dts/qca9557_engenius_enstationac-v1.dts
@@ -1,10 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-#include "qca955x.dtsi"
+#include "qca955x_senao_loader.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
-#include <dt-bindings/mtd/partitions/uimage.h>
 
 / {
 	compatible = "engenius,enstationac-v1", "qca,qca9557";
@@ -59,91 +58,13 @@
 			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 		};
 	};
-
-	virtual_flash {
-		compatible = "mtd-concat";
-
-		devices = <&fwconcat0 &fwconcat1>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				compatible = "openwrt,uimage", "denx,uimage";
-				openwrt,ih-magic = <IH_MAGIC_OKLI>;
-				label = "firmware";
-				reg = <0x0 0x0>;
-			};
-		};
-	};
 };
 
-&spi {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <40000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x000000 0x040000>;
-				read-only;
-			};
-
-			partition@40000 {
-				label = "u-boot-env";
-				reg = <0x040000 0x010000>;
-			};
-
-			partition@50000 {
-				label = "custom";
-				reg = <0x050000 0x050000>;
-				read-only;
-			};
-
-			partition@a0000 {
-				label = "loader";
-				reg = <0x0a0000 0x010000>;
-				read-only;
-			};
-
-			fwconcat1: partition@b0000 {
-				label = "fwconcat1";
-				reg = <0x0b0000 0x170000>;
-			};
-
-			partition@220000 {
-				label = "fakeroot";
-				reg = <0x220000 0x010000>;
-				read-only;
-			};
-
-			fwconcat0: partition@230000 {
-				label = "fwconcat0";
-				reg = <0x230000 0xb40000>;
-			};
-
-			partition@d70000 {
-				label = "failsafe";
-				reg = <0xd70000 0x280000>;
-				read-only;
-			};
-
-			art: partition@ff0000 {
-				label = "art";
-				reg = <0xff0000 0x010000>;
-				read-only;
-			};
-		};
+&partitions {
+	art: partition@ff0000 {
+		label = "art";
+		reg = <0xff0000 0x010000>;
+		read-only;
 	};
 };
 
diff --git a/target/linux/ath79/dts/qca955x_senao_loader.dtsi b/target/linux/ath79/dts/qca955x_senao_loader.dtsi
new file mode 100644
index 0000000000..3f5fc0e938
--- /dev/null
+++ b/target/linux/ath79/dts/qca955x_senao_loader.dtsi
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca955x.dtsi"
+
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+	virtual_flash {
+		compatible = "mtd-concat";
+
+		devices = <&fwconcat0 &fwconcat1>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,ih-magic = <IH_MAGIC_OKLI>;
+				label = "firmware";
+				reg = <0x0 0x0>;
+			};
+		};
+	};
+};
+
+&spi {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x000000 0x040000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "u-boot-env";
+				reg = <0x040000 0x010000>;
+			};
+
+			partition@50000 {
+				label = "custom";
+				reg = <0x050000 0x050000>;
+				read-only;
+			};
+
+			partition@a0000 {
+				label = "loader";
+				reg = <0x0a0000 0x010000>;
+				read-only;
+			};
+
+			fwconcat1: partition@b0000 {
+				label = "fwconcat1";
+				reg = <0x0b0000 0x170000>;
+			};
+
+			partition@220000 {
+				label = "fakeroot";
+				reg = <0x220000 0x010000>;
+				read-only;
+			};
+
+			fwconcat0: partition@230000 {
+				label = "fwconcat0";
+				reg = <0x230000 0xb40000>;
+			};
+
+			partition@d70000 {
+				label = "failsafe";
+				reg = <0xd70000 0x280000>;
+				read-only;
+			};
+
+			/* additional partitions in device DTS files */
+		};
+	};
+};
diff --git a/target/linux/ath79/image/common-engenius.mk b/target/linux/ath79/image/common-senao.mk
similarity index 87%
rename from target/linux/ath79/image/common-engenius.mk
rename to target/linux/ath79/image/common-senao.mk
index 56e8f8cf67..dd1a53c969 100644
--- a/target/linux/ath79/image/common-engenius.mk
+++ b/target/linux/ath79/image/common-senao.mk
@@ -1,9 +1,9 @@
-DEVICE_VARS += ENGENIUS_IMGNAME
+DEVICE_VARS += SENAO_IMGNAME
 
 # This needs to make /tmp/_sys/sysupgrade.tgz an empty file prior to
 # sysupgrade, as otherwise it will implant the old configuration from
 # OEM firmware when writing rootfs from factory.bin
-define Build/engenius-tar-gz
+define Build/senao-tar-gz
 	-[ -f "$@" ] && \
 	mkdir -p $@.tmp && \
 	touch $@.tmp/failsafe.bin && \
@@ -18,8 +18,7 @@ define Build/engenius-tar-gz
 	rm -rf $@.tmp
 endef
 
-define Device/engenius_loader_okli
-  DEVICE_VENDOR := EnGenius
+define Device/senao_loader_okli
   KERNEL := kernel-bin | append-dtb | lzma | uImage lzma -M 0x4f4b4c49
   LOADER_TYPE := bin
   COMPILE := loader-$(1).bin loader-$(1).uImage
@@ -29,5 +28,5 @@ define Device/engenius_loader_okli
   IMAGES += factory.bin
   IMAGE/factory.bin := append-squashfs-fakeroot-be | pad-to $$$$(BLOCKSIZE) | \
 	append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | \
-	check-size | engenius-tar-gz $$$$(ENGENIUS_IMGNAME)
+	check-size | senao-tar-gz $$$$(SENAO_IMGNAME)
 endef
diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
index e7d9116705..5d5300fbb4 100644
--- a/target/linux/ath79/image/generic.mk
+++ b/target/linux/ath79/image/generic.mk
@@ -1,6 +1,6 @@
 include ./common-buffalo.mk
-include ./common-engenius.mk
 include ./common-netgear.mk
+include ./common-senao.mk
 include ./common-tp-link.mk
 include ./common-yuncore.mk
 
@@ -993,34 +993,37 @@ endef
 TARGET_DEVICES += embeddedwireless_dorin
 
 define Device/engenius_eap1200h
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := qca9557
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := EAP1200H
   DEVICE_PACKAGES := ath10k-firmware-qca988x-ct kmod-ath10k-ct
   IMAGE_SIZE := 11520k
   LOADER_FLASH_OFFS := 0x230000
-  ENGENIUS_IMGNAME := ar71xx-generic-eap1200h
+  SENAO_IMGNAME := ar71xx-generic-eap1200h
 endef
 TARGET_DEVICES += engenius_eap1200h
 
 define Device/engenius_eap300-v2
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := ar9341
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := EAP300
   DEVICE_VARIANT := v2
   IMAGE_SIZE := 12032k
   LOADER_FLASH_OFFS := 0x230000
-  ENGENIUS_IMGNAME := senao-eap300v2
+  SENAO_IMGNAME := senao-eap300v2
 endef
 TARGET_DEVICES += engenius_eap300-v2
 
 define Device/engenius_eap600
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := ar9344
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := EAP600
   IMAGE_SIZE := 12032k
   LOADER_FLASH_OFFS := 0x230000
-  ENGENIUS_IMGNAME := senao-eap600
+  SENAO_IMGNAME := senao-eap600
 endef
 TARGET_DEVICES += engenius_eap600
 
@@ -1051,36 +1054,39 @@ endef
 TARGET_DEVICES += engenius_ecb1750
 
 define Device/engenius_ecb600
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := ar9344
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := ECB600
   IMAGE_SIZE := 12032k
   LOADER_FLASH_OFFS := 0x230000
-  ENGENIUS_IMGNAME := senao-ecb600
+  SENAO_IMGNAME := senao-ecb600
 endef
 TARGET_DEVICES += engenius_ecb600
 
 define Device/engenius_ens202ext-v1
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := ar9341
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := ENS202EXT
   DEVICE_VARIANT := v1
   DEVICE_PACKAGES := rssileds
   IMAGE_SIZE := 12032k
   LOADER_FLASH_OFFS := 0x230000
-  ENGENIUS_IMGNAME := senao-ens202ext
+  SENAO_IMGNAME := senao-ens202ext
 endef
 TARGET_DEVICES += engenius_ens202ext-v1
 
 define Device/engenius_enstationac-v1
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := qca9557
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := EnStationAC
   DEVICE_VARIANT := v1
   DEVICE_PACKAGES := ath10k-firmware-qca988x-ct kmod-ath10k-ct rssileds
   IMAGE_SIZE := 11520k
   LOADER_FLASH_OFFS := 0x230000
-  ENGENIUS_IMGNAME := ar71xx-generic-enstationac
+  SENAO_IMGNAME := ar71xx-generic-enstationac
 endef
 TARGET_DEVICES += engenius_enstationac-v1
 
diff --git a/target/linux/ath79/image/tiny.mk b/target/linux/ath79/image/tiny.mk
index 36d2818ad5..dec3cd368d 100644
--- a/target/linux/ath79/image/tiny.mk
+++ b/target/linux/ath79/image/tiny.mk
@@ -1,5 +1,5 @@
 include ./common-buffalo.mk
-include ./common-engenius.mk
+include ./common-senao.mk
 
 define Device/buffalo_whr-g301n
   $(Device/buffalo_common)
@@ -32,36 +32,39 @@ endef
 TARGET_DEVICES += dlink_dir-615-e4
 
 define Device/engenius_eap350-v1
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := ar7242
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := EAP350
   DEVICE_VARIANT := v1
   IMAGE_SIZE := 4864k
   LOADER_FLASH_OFFS := 0x1b0000
-  ENGENIUS_IMGNAME := senao-eap350
+  SENAO_IMGNAME := senao-eap350
 endef
 TARGET_DEVICES += engenius_eap350-v1
 
 define Device/engenius_ecb350-v1
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := ar7242
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := ECB350
   DEVICE_VARIANT := v1
   IMAGE_SIZE := 4864k
   LOADER_FLASH_OFFS := 0x1b0000
-  ENGENIUS_IMGNAME := senao-ecb350
+  SENAO_IMGNAME := senao-ecb350
 endef
 TARGET_DEVICES += engenius_ecb350-v1
 
 define Device/engenius_enh202-v1
-  $(Device/engenius_loader_okli)
+  $(Device/senao_loader_okli)
   SOC := ar7240
+  DEVICE_VENDOR := EnGenius
   DEVICE_MODEL := ENH202
   DEVICE_VARIANT := v1
   DEVICE_PACKAGES := rssileds
   IMAGE_SIZE := 4864k
   LOADER_FLASH_OFFS := 0x1b0000
-  ENGENIUS_IMGNAME := senao-enh202
+  SENAO_IMGNAME := senao-enh202
 endef
 TARGET_DEVICES += engenius_enh202-v1
 
diff --git a/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch
index 3c8740311d..d6d8cb6952 100644
--- a/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch
+++ b/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch
@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/drivers/usb/host/ehci-platform.c
 +++ b/drivers/usb/host/ehci-platform.c
-@@ -269,6 +269,11 @@ static int ehci_platform_probe(struct pl
+@@ -277,6 +277,11 @@ static int ehci_platform_probe(struct pl
  	ehci = hcd_to_ehci(hcd);
  
  	if (pdata == &ehci_platform_defaults && dev->dev.of_node) {
diff --git a/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch b/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch
index b8a877c63d..2772c53392 100644
--- a/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch
+++ b/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch
@@ -154,7 +154,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
  	irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
  					 apc);
  }
-@@ -391,29 +399,11 @@ static int ar724x_pci_probe(struct platf
+@@ -388,29 +396,11 @@ static int ar724x_pci_probe(struct platf
  	if (apc->irq < 0)
  		return -EINVAL;
  
@@ -186,7 +186,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
  
  	/*
  	 * Do the full PCIE Root Complex Initialization Sequence if the PCIe
-@@ -435,10 +425,16 @@ static int ar724x_pci_probe(struct platf
+@@ -432,10 +422,16 @@ static int ar724x_pci_probe(struct platf
  	return 0;
  }
  
diff --git a/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch
index 14dddd5147..5a923298cd 100644
--- a/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch
+++ b/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch
@@ -15,7 +15,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -217,6 +217,8 @@ config ATH79
+@@ -242,6 +242,8 @@ config ATH79
  	select SYS_SUPPORTS_BIG_ENDIAN
  	select SYS_SUPPORTS_MIPS16
  	select SYS_SUPPORTS_ZBOOT_UART_PROM
@@ -82,12 +82,12 @@ Signed-off-by: John Crispin <john@phrozen.org>
  endif
 --- a/arch/mips/pci/Makefile
 +++ b/arch/mips/pci/Makefile
-@@ -23,7 +23,7 @@ obj-$(CONFIG_BCM63XX)		+= pci-bcm63xx.o
+@@ -21,7 +21,7 @@ obj-$(CONFIG_BCM63XX)		+= pci-bcm63xx.o
  					ops-bcm63xx.o
  obj-$(CONFIG_MIPS_ALCHEMY)	+= pci-alchemy.o
  obj-$(CONFIG_PCI_AR2315)	+= pci-ar2315.o
 -obj-$(CONFIG_SOC_AR71XX)	+= pci-ar71xx.o
 +obj-$(CONFIG_PCI_AR71XX)	+= pci-ar71xx.o
  obj-$(CONFIG_PCI_AR724X)	+= pci-ar724x.o
- obj-$(CONFIG_MIPS_PCI_VIRTIO)	+= pci-virtio-guest.o
  obj-$(CONFIG_PCI_XTALK_BRIDGE)	+= pci-xtalk-bridge.o
+ #
diff --git a/target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch b/target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch
index d4ea379159..fe34f0b21b 100644
--- a/target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch
+++ b/target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch
@@ -22,7 +22,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  #include "gpiolib.h"
  #include "gpiolib-of.h"
-@@ -915,3 +917,68 @@ void of_gpiochip_remove(struct gpio_chip
+@@ -1039,3 +1041,68 @@ void of_gpiochip_remove(struct gpio_chip
  {
  	of_node_put(chip->of_node);
  }
@@ -93,7 +93,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +module_platform_driver(gpio_export_driver);
 --- a/drivers/gpio/gpiolib-sysfs.c
 +++ b/drivers/gpio/gpiolib-sysfs.c
-@@ -563,7 +563,7 @@ static struct class gpio_class = {
+@@ -564,7 +564,7 @@ static struct class gpio_class = {
   *
   * Returns zero on success, else an error.
   */
@@ -102,7 +102,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  {
  	struct gpio_chip	*chip;
  	struct gpio_device	*gdev;
-@@ -625,6 +625,8 @@ int gpiod_export(struct gpio_desc *desc,
+@@ -626,6 +626,8 @@ int gpiod_export(struct gpio_desc *desc,
  	offset = gpio_chip_hwgpio(desc);
  	if (chip->names && chip->names[offset])
  		ioname = chip->names[offset];
@@ -111,7 +111,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	dev = device_create_with_groups(&gpio_class, &gdev->dev,
  					MKDEV(0, 0), data, gpio_groups,
-@@ -646,6 +648,12 @@ err_unlock:
+@@ -647,6 +649,12 @@ err_unlock:
  	gpiod_dbg(desc, "%s: status %d\n", __func__, status);
  	return status;
  }
@@ -126,7 +126,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  static int match_export(struct device *dev, const void *desc)
 --- a/include/asm-generic/gpio.h
 +++ b/include/asm-generic/gpio.h
-@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g
+@@ -125,6 +125,12 @@ static inline int gpio_export(unsigned g
  	return gpiod_export(gpio_to_desc(gpio), direction_may_change);
  }
  
@@ -141,7 +141,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  {
 --- a/include/linux/gpio/consumer.h
 +++ b/include/linux/gpio/consumer.h
-@@ -668,6 +668,7 @@ static inline void devm_acpi_dev_remove_
+@@ -713,6 +713,7 @@ static inline void devm_acpi_dev_remove_
  
  #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
  
@@ -149,7 +149,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
  int gpiod_export_link(struct device *dev, const char *name,
  		      struct gpio_desc *desc);
-@@ -675,6 +676,13 @@ void gpiod_unexport(struct gpio_desc *de
+@@ -720,6 +721,13 @@ void gpiod_unexport(struct gpio_desc *de
  
  #else  /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
  
diff --git a/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch
index fa4b05f724..4a2a3b741d 100644
--- a/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch
+++ b/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch
@@ -3,7 +3,7 @@ from mach files succeed.
 
 --- a/drivers/gpio/gpio-ath79.c
 +++ b/drivers/gpio/gpio-ath79.c
-@@ -310,7 +310,11 @@ static struct platform_driver ath79_gpio
+@@ -306,7 +306,11 @@ static struct platform_driver ath79_gpio
  	.probe = ath79_gpio_probe,
  };
  
diff --git a/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch b/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch
index 13955c62a2..f596ddb733 100644
--- a/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch
+++ b/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch
@@ -96,7 +96,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  
  	/* set PCIE Application Control to ready */
  	app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
-@@ -399,6 +415,14 @@ static int ar724x_pci_probe(struct platf
+@@ -396,6 +412,14 @@ static int ar724x_pci_probe(struct platf
  	if (apc->irq < 0)
  		return -EINVAL;
  
@@ -111,7 +111,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  	apc->np = pdev->dev.of_node;
  	apc->pci_controller.pci_ops = &ar724x_pci_ops;
  	apc->pci_controller.io_resource = &apc->io_res;
-@@ -409,7 +433,7 @@ static int ar724x_pci_probe(struct platf
+@@ -406,7 +430,7 @@ static int ar724x_pci_probe(struct platf
  	 * Do the full PCIE Root Complex Initialization Sequence if the PCIe
  	 * host controller is in reset.
  	 */
@@ -120,7 +120,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  		ar724x_pci_hw_init(apc);
  
  	apc->link_up = ar724x_pci_check_link(apc);
-@@ -427,6 +451,7 @@ static int ar724x_pci_probe(struct platf
+@@ -424,6 +448,7 @@ static int ar724x_pci_probe(struct platf
  
  static const struct of_device_id ar724x_pci_ids[] = {
  	{ .compatible = "qcom,ar7240-pci" },
diff --git a/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch b/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch
index 2a6b9857fb..51a71c6ef2 100644
--- a/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch
+++ b/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch
@@ -58,7 +58,7 @@ Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
  static int ath79_spi_probe(struct platform_device *pdev)
  {
  	struct spi_master *master;
-@@ -163,6 +197,7 @@ static int ath79_spi_probe(struct platfo
+@@ -164,6 +198,7 @@ static int ath79_spi_probe(struct platfo
  		ret = PTR_ERR(sp->base);
  		goto err_put_master;
  	}
diff --git a/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch b/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch
index 396b1ee7a2..b42102a966 100644
--- a/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch
+++ b/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/phy/at803x.c
 +++ b/drivers/net/phy/at803x.c
-@@ -383,6 +383,13 @@ static int at803x_aneg_done(struct phy_d
+@@ -698,6 +698,13 @@ static int at803x_aneg_done(struct phy_d
  	if (!(phy_read(phydev, AT803X_PSSR) & AT803X_PSSR_MR_AN_COMPLETE)) {
  		phydev_warn(phydev, "803x_aneg_done: SGMII link is not ok\n");
  		aneg_done = 0;
diff --git a/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch
index 4c6558db90..7590793dc9 100644
--- a/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch
+++ b/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch
@@ -1,6 +1,6 @@
 --- a/drivers/Makefile
 +++ b/drivers/Makefile
-@@ -80,8 +80,8 @@ obj-y				+= scsi/
+@@ -81,8 +81,8 @@ obj-y				+= scsi/
  obj-y				+= nvme/
  obj-$(CONFIG_ATA)		+= ata/
  obj-$(CONFIG_TARGET_CORE)	+= target/
diff --git a/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
index 2440fbbb73..c1cb0dae66 100644
--- a/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
+++ b/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
@@ -1,6 +1,6 @@
 --- a/arch/mips/include/asm/checksum.h
 +++ b/arch/mips/include/asm/checksum.h
-@@ -134,26 +134,30 @@ static inline __sum16 ip_fast_csum(const
+@@ -100,26 +100,30 @@ static inline __sum16 ip_fast_csum(const
  	const unsigned int *stop = word + ihl;
  	unsigned int csum;
  	int carry;
@@ -42,7 +42,7 @@
  	} while (word != stop);
  
  	return csum_fold(csum);
-@@ -214,73 +218,6 @@ static inline __sum16 ip_compute_csum(co
+@@ -180,73 +184,6 @@ static inline __sum16 ip_compute_csum(co
  	return csum_fold(csum_partial(buff, len, 0));
  }
  
@@ -129,7 +129,7 @@
  struct ip_auth_hdr {
 --- a/include/uapi/linux/ipv6.h
 +++ b/include/uapi/linux/ipv6.h
-@@ -131,7 +131,7 @@ struct ipv6hdr {
+@@ -132,7 +132,7 @@ struct ipv6hdr {
  
  	struct	in6_addr	saddr;
  	struct	in6_addr	daddr;
@@ -171,7 +171,7 @@
  #define UDP_CORK	1	/* Never send partially complete segments */
 --- a/net/netfilter/nf_conntrack_core.c
 +++ b/net/netfilter/nf_conntrack_core.c
-@@ -271,8 +271,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
+@@ -273,8 +273,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
  
  	switch (l3num) {
  	case NFPROTO_IPV4:
@@ -184,7 +184,7 @@
  		memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6));
 --- a/include/uapi/linux/icmp.h
 +++ b/include/uapi/linux/icmp.h
-@@ -82,7 +82,7 @@ struct icmphdr {
+@@ -83,7 +83,7 @@ struct icmphdr {
  	} frag;
  	__u8	reserved[4];
    } un;
@@ -214,7 +214,7 @@
  #include <linux/uaccess.h>
  #include <linux/ipv6.h>
  #include <linux/icmpv6.h>
-@@ -849,10 +850,10 @@ static void tcp_v6_send_response(const s
+@@ -909,10 +910,10 @@ static void tcp_v6_send_response(const s
  	topt = (__be32 *)(t1 + 1);
  
  	if (tsecr) {
@@ -241,7 +241,7 @@
   */
 --- a/net/ipv6/datagram.c
 +++ b/net/ipv6/datagram.c
-@@ -476,7 +476,7 @@ int ipv6_recv_error(struct sock *sk, str
+@@ -492,7 +492,7 @@ int ipv6_recv_error(struct sock *sk, str
  				ipv6_iface_scope_id(&sin->sin6_addr,
  						    IP6CB(skb)->iif);
  		} else {
@@ -250,7 +250,7 @@
  					       &sin->sin6_addr);
  			sin->sin6_scope_id = 0;
  		}
-@@ -830,12 +830,12 @@ int ip6_datagram_send_ctl(struct net *ne
+@@ -846,12 +846,12 @@ int ip6_datagram_send_ctl(struct net *ne
  			}
  
  			if (fl6->flowlabel&IPV6_FLOWINFO_MASK) {
@@ -267,7 +267,7 @@
  		case IPV6_2292HOPOPTS:
 --- a/net/ipv6/exthdrs.c
 +++ b/net/ipv6/exthdrs.c
-@@ -752,7 +752,7 @@ static bool ipv6_hop_jumbo(struct sk_buf
+@@ -949,7 +949,7 @@ static bool ipv6_hop_jumbo(struct sk_buf
  		goto drop;
  	}
  
@@ -278,9 +278,9 @@
  		icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2);
 --- a/include/linux/types.h
 +++ b/include/linux/types.h
-@@ -225,5 +225,11 @@ struct callback_head {
- typedef void (*rcu_callback_t)(struct rcu_head *head);
- typedef void (*call_rcu_func_t)(struct rcu_head *head, rcu_callback_t func);
+@@ -227,5 +227,11 @@ typedef void (*swap_func_t)(void *a, voi
+ typedef int (*cmp_r_func_t)(const void *a, const void *b, const void *priv);
+ typedef int (*cmp_func_t)(const void *a, const void *b);
  
 +struct net_hdr_word {
 +       u32 words[1];
@@ -292,7 +292,7 @@
  #endif /* _LINUX_TYPES_H */
 --- a/net/ipv4/af_inet.c
 +++ b/net/ipv4/af_inet.c
-@@ -1441,8 +1441,8 @@ struct sk_buff *inet_gro_receive(struct
+@@ -1467,8 +1467,8 @@ struct sk_buff *inet_gro_receive(struct
  	if (unlikely(ip_fast_csum((u8 *)iph, 5)))
  		goto out_unlock;
  
@@ -305,7 +305,7 @@
  	list_for_each_entry(p, head, list) {
 --- a/net/ipv4/tcp_output.c
 +++ b/net/ipv4/tcp_output.c
-@@ -460,48 +460,53 @@ static void tcp_options_write(__be32 *pt
+@@ -611,48 +611,53 @@ static void tcp_options_write(__be32 *pt
  	u16 options = opts->options;	/* mungable copy */
  
  	if (unlikely(OPTION_MD5 & options)) {
@@ -382,7 +382,7 @@
  	}
  
  	if (unlikely(opts->num_sack_blocks)) {
-@@ -509,16 +514,17 @@ static void tcp_options_write(__be32 *pt
+@@ -660,16 +665,17 @@ static void tcp_options_write(__be32 *pt
  			tp->duplicate_sack : tp->selective_acks;
  		int this_sack;
  
@@ -406,7 +406,7 @@
  		}
  
  		tp->rx_opt.dsack = 0;
-@@ -531,13 +537,14 @@ static void tcp_options_write(__be32 *pt
+@@ -682,13 +688,14 @@ static void tcp_options_write(__be32 *pt
  
  		if (foc->exp) {
  			len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len;
@@ -464,7 +464,7 @@
  #define IGMP_HOST_MEMBERSHIP_REPORT	0x12	/* Ditto */
 --- a/net/core/flow_dissector.c
 +++ b/net/core/flow_dissector.c
-@@ -212,7 +212,7 @@ __be32 __skb_flow_get_ports(const struct
+@@ -128,7 +128,7 @@ __be32 __skb_flow_get_ports(const struct
  		ports = __skb_header_pointer(skb, thoff + poff,
  					     sizeof(_ports), data, hlen, &_ports);
  		if (ports)
@@ -475,7 +475,7 @@
  	return 0;
 --- a/include/uapi/linux/icmpv6.h
 +++ b/include/uapi/linux/icmpv6.h
-@@ -77,7 +77,7 @@ struct icmp6hdr {
+@@ -78,7 +78,7 @@ struct icmp6hdr {
  #define icmp6_addrconf_other	icmp6_dataun.u_nd_ra.other
  #define icmp6_rt_lifetime	icmp6_dataun.u_nd_ra.rt_lifetime
  #define icmp6_router_pref	icmp6_dataun.u_nd_ra.router_pref
@@ -486,7 +486,7 @@
  #define ICMPV6_ROUTER_PREF_LOW		0x3
 --- a/include/net/ndisc.h
 +++ b/include/net/ndisc.h
-@@ -92,7 +92,7 @@ struct ra_msg {
+@@ -93,7 +93,7 @@ struct ra_msg {
          struct icmp6hdr		icmph;
  	__be32			reachable_time;
  	__be32			retrans_timer;
@@ -495,7 +495,7 @@
  
  struct rd_msg {
  	struct icmp6hdr icmph;
-@@ -371,10 +371,10 @@ static inline u32 ndisc_hashfn(const voi
+@@ -372,10 +372,10 @@ static inline u32 ndisc_hashfn(const voi
  {
  	const u32 *p32 = pkey;
  
@@ -534,7 +534,7 @@
  			goto next_ht;
 --- a/net/ipv6/ip6_offload.c
 +++ b/net/ipv6/ip6_offload.c
-@@ -240,7 +240,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff *
+@@ -238,7 +238,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff *
  			continue;
  
  		iph2 = (struct ipv6hdr *)(p->data + off);
@@ -545,7 +545,7 @@
  		 * XXX skbs on the gro_list have all been parsed and pulled
 --- a/include/net/addrconf.h
 +++ b/include/net/addrconf.h
-@@ -47,7 +47,7 @@ struct prefix_info {
+@@ -45,7 +45,7 @@ struct prefix_info {
  	__be32			reserved2;
  
  	struct in6_addr		prefix;
@@ -610,7 +610,7 @@
  		return false;
  
  	return true;
-@@ -741,13 +745,13 @@ static inline void ipv6_addr_set_v4mappe
+@@ -746,13 +750,13 @@ static inline void ipv6_addr_set_v4mappe
   */
  static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen)
  {
@@ -626,7 +626,7 @@
  		if (xb)
  			return i * 32 + 31 - __fls(ntohl(xb));
  	}
-@@ -934,17 +938,18 @@ static inline int ip6_multipath_hash_pol
+@@ -938,17 +942,18 @@ static inline int ip6_multipath_hash_pol
  static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass,
  				__be32 flowlabel)
  {
@@ -660,7 +660,7 @@
  u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr,
 --- a/include/uapi/linux/in.h
 +++ b/include/uapi/linux/in.h
-@@ -84,7 +84,7 @@ enum {
+@@ -88,7 +88,7 @@ enum {
  /* Internet address. */
  struct in_addr {
  	__be32	s_addr;
@@ -693,7 +693,7 @@
  				       | TCPOLEN_TIMESTAMP))
 --- a/net/xfrm/xfrm_input.c
 +++ b/net/xfrm/xfrm_input.c
-@@ -162,8 +162,8 @@ int xfrm_parse_spi(struct sk_buff *skb,
+@@ -165,8 +165,8 @@ int xfrm_parse_spi(struct sk_buff *skb,
  	if (!pskb_may_pull(skb, hlen))
  		return -EINVAL;
  
@@ -706,7 +706,7 @@
  EXPORT_SYMBOL(xfrm_parse_spi);
 --- a/net/ipv4/tcp_input.c
 +++ b/net/ipv4/tcp_input.c
-@@ -3976,14 +3976,16 @@ static bool tcp_parse_aligned_timestamp(
+@@ -4074,14 +4074,16 @@ static bool tcp_parse_aligned_timestamp(
  {
  	const __be32 *ptr = (const __be32 *)(th + 1);
  
@@ -799,7 +799,7 @@
  		*sum = csum_fold(csum_partial(diff, sizeof(diff),
 --- a/include/linux/etherdevice.h
 +++ b/include/linux/etherdevice.h
-@@ -489,7 +489,7 @@ static inline bool is_etherdev_addr(cons
+@@ -500,7 +500,7 @@ static inline bool is_etherdev_addr(cons
   * @b: Pointer to Ethernet header
   *
   * Compare two Ethernet headers, returns 0 if equal.
@@ -808,7 +808,7 @@
   * aligned OR the platform can handle unaligned access.  This is the
   * case for all packets coming into netif_receive_skb or similar
   * entry points.
-@@ -512,11 +512,12 @@ static inline unsigned long compare_ethe
+@@ -523,11 +523,12 @@ static inline unsigned long compare_ethe
  	fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6);
  	return fold;
  #else
diff --git a/target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch b/target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch
index dac2064cbb..ef4a349ea7 100644
--- a/target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch
+++ b/target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch
@@ -21,7 +21,7 @@ Signed-off-by: Sungbo Eo <mans0n@gorani.run>
 
 --- a/drivers/tty/serial/serial_core.c
 +++ b/drivers/tty/serial/serial_core.c
-@@ -220,6 +220,8 @@ static int uart_port_startup(struct tty_
+@@ -222,6 +222,8 @@ static int uart_port_startup(struct tty_
  	if (retval == 0) {
  		if (uart_console(uport) && uport->cons->cflag) {
  			tty->termios.c_cflag = uport->cons->cflag;
@@ -30,7 +30,7 @@ Signed-off-by: Sungbo Eo <mans0n@gorani.run>
  			uport->cons->cflag = 0;
  		}
  		/*
-@@ -2108,8 +2110,10 @@ uart_set_options(struct uart_port *port,
+@@ -2121,8 +2123,10 @@ uart_set_options(struct uart_port *port,
  	 * Allow the setting of the UART parameters with a NULL console
  	 * too:
  	 */
@@ -44,7 +44,7 @@ Signed-off-by: Sungbo Eo <mans0n@gorani.run>
  }
 --- a/include/linux/console.h
 +++ b/include/linux/console.h
-@@ -153,6 +153,7 @@ struct console {
+@@ -150,6 +150,7 @@ struct console {
  	short	flags;
  	short	index;
  	int	cflag;
diff --git a/target/linux/bcm47xx/image/Makefile b/target/linux/bcm47xx/image/Makefile
index 2aeef178a4..30a1b2f476 100644
--- a/target/linux/bcm47xx/image/Makefile
+++ b/target/linux/bcm47xx/image/Makefile
@@ -137,7 +137,7 @@ DEVICE_VARS += BIN_TAIL
 
 define Device/Default
 	KERNEL := kernel-bin
-	IMAGE_NAME = $$(IMAGE_PREFIX)-$$(1).$$(2)
+	DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(1).$$(2)
 	KERNEL_NAME = vmlinux.lzma
 	KERNEL_INITRAMFS_NAME = vmlinux-initramfs.lzma
 	FILESYSTEMS := $(FS_64K)
diff --git a/target/linux/bcm4908/image/Makefile b/target/linux/bcm4908/image/Makefile
index 8a40a1e6a9..0775f42254 100644
--- a/target/linux/bcm4908/image/Makefile
+++ b/target/linux/bcm4908/image/Makefile
@@ -44,7 +44,7 @@ define Device/Default
   KERNEL_INITRAMFS := kernel-bin | bcm4908lzma | bcm4908kernel
   FILESYSTEMS := squashfs
   KERNEL_NAME := Image
-  IMAGE_NAME = $$(IMAGE_PREFIX)-$$(1).$$(2)
+  DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(1).$$(2)
   BLOCKSIZE := 128k
   PAGESIZE := 2048
 endef
diff --git a/target/linux/bcm53xx/image/Makefile b/target/linux/bcm53xx/image/Makefile
index c3fe0e8525..c2322491a3 100644
--- a/target/linux/bcm53xx/image/Makefile
+++ b/target/linux/bcm53xx/image/Makefile
@@ -130,7 +130,7 @@ define Device/Default
   KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma-d16 | trx
   FILESYSTEMS := squashfs
   KERNEL_NAME := zImage
-  IMAGE_NAME = $$(IMAGE_PREFIX)-$$(1).$$(2)
+  DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(1).$$(2)
   IMAGES := trx
   BLOCKSIZE := 128k
   PAGESIZE := 2048
diff --git a/target/linux/bcm53xx/patches-5.4/033-v5.10-ARM-dts-BCM5301X-Specify-PWM-in-the-DT.patch b/target/linux/bcm53xx/patches-5.4/033-v5.10-0001-ARM-dts-BCM5301X-Specify-PWM-in-the-DT.patch
similarity index 100%
rename from target/linux/bcm53xx/patches-5.4/033-v5.10-ARM-dts-BCM5301X-Specify-PWM-in-the-DT.patch
rename to target/linux/bcm53xx/patches-5.4/033-v5.10-0001-ARM-dts-BCM5301X-Specify-PWM-in-the-DT.patch
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch b/target/linux/bcm53xx/patches-5.4/033-v5.10-0002-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
similarity index 100%
rename from target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
rename to target/linux/bcm53xx/patches-5.4/033-v5.10-0002-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
diff --git a/target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch b/target/linux/bcm53xx/patches-5.4/033-v5.10-0003-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
similarity index 100%
rename from target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
rename to target/linux/bcm53xx/patches-5.4/033-v5.10-0003-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
diff --git a/target/linux/bcm53xx/patches-5.4/330-ARM-BCM5301X-Add-DT-for-Meraki-MR32.patch b/target/linux/bcm53xx/patches-5.4/033-v5.10-0004-ARM-BCM5301X-Add-DT-for-Meraki-MR32.patch
similarity index 95%
rename from target/linux/bcm53xx/patches-5.4/330-ARM-BCM5301X-Add-DT-for-Meraki-MR32.patch
rename to target/linux/bcm53xx/patches-5.4/033-v5.10-0004-ARM-BCM5301X-Add-DT-for-Meraki-MR32.patch
index 29329eb3f0..e96815ba38 100644
--- a/target/linux/bcm53xx/patches-5.4/330-ARM-BCM5301X-Add-DT-for-Meraki-MR32.patch
+++ b/target/linux/bcm53xx/patches-5.4/033-v5.10-0004-ARM-BCM5301X-Add-DT-for-Meraki-MR32.patch
@@ -48,10 +48,15 @@ Odd stuff:
 
 Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/Makefile                 |   1 +
+ arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 197 +++++++++++++++++++++
+ 2 files changed, 198 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm53016-meraki-mr32.dts
 
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
-@@ -119,6 +119,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
+@@ -118,6 +118,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
  	bcm47094-luxul-xwr-3150-v1.dtb \
  	bcm47094-netgear-r8500.dtb \
  	bcm47094-phicomm-k3.dtb \
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0001-ARM-dts-BCM5301X-Linksys-EA9500-add-port-5-and-port-.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0001-ARM-dts-BCM5301X-Linksys-EA9500-add-port-5-and-port-.patch
new file mode 100644
index 0000000000..f0cfbf8e63
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0001-ARM-dts-BCM5301X-Linksys-EA9500-add-port-5-and-port-.patch
@@ -0,0 +1,47 @@
+From 1ca5f2430c4f9d85b98b8d6e5d93f8d4802faf8e Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Wed, 14 Oct 2020 15:27:27 -0400
+Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 add port 5 and port 7
+
+Add ports 5 and 7 which are connected to gmac cores 1 & 2.
+These will be disabled for now.
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/bcm47094-linksys-panamera.dts    | 24 +++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -242,6 +242,30 @@
+ 			label = "wan";
+ 		};
+ 
++		port@5 {
++			reg = <5>;
++			ethernet = <&gmac0>;
++			label = "cpu";
++			status = "disabled";
++
++			fixed-link {
++				speed = <1000>;
++				full-duplex;
++			};
++		};
++
++		port@7 {
++			reg = <7>;
++			ethernet = <&gmac1>;
++			label = "cpu";
++			status = "disabled";
++
++			fixed-link {
++				speed = <1000>;
++				full-duplex;
++			};
++		};
++
+ 		port@8 {
+ 			reg = <8>;
+ 			ethernet = <&gmac2>;
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0002-ARM-dts-BCM5301X-Harmonize-EHCI-OHCI-DT-nodes-name.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0002-ARM-dts-BCM5301X-Harmonize-EHCI-OHCI-DT-nodes-name.patch
new file mode 100644
index 0000000000..271257c669
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0002-ARM-dts-BCM5301X-Harmonize-EHCI-OHCI-DT-nodes-name.patch
@@ -0,0 +1,60 @@
+From 74abbfe99f43eb7466d26d9e48fbeb46b8f3d804 Mon Sep 17 00:00:00 2001
+From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Date: Tue, 20 Oct 2020 14:59:37 +0300
+Subject: [PATCH] ARM: dts: BCM5301X: Harmonize EHCI/OHCI DT nodes name
+
+In accordance with the Generic EHCI/OHCI bindings the corresponding node
+name is suppose to comply with the Generic USB HCD DT schema, which
+requires the USB nodes to have the name acceptable by the regexp:
+"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
+nodes are correctly named.
+
+Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 4 ++--
+ arch/arm/boot/dts/bcm53573.dtsi | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -265,7 +265,7 @@
+ 
+ 			interrupt-parent = <&gic>;
+ 
+-			ehci: ehci@21000 {
++			ehci: usb@21000 {
+ 				#usb-cells = <0>;
+ 
+ 				compatible = "generic-ehci";
+@@ -287,7 +287,7 @@
+ 				};
+ 			};
+ 
+-			ohci: ohci@22000 {
++			ohci: usb@22000 {
+ 				#usb-cells = <0>;
+ 
+ 				compatible = "generic-ohci";
+--- a/arch/arm/boot/dts/bcm53573.dtsi
++++ b/arch/arm/boot/dts/bcm53573.dtsi
+@@ -135,7 +135,7 @@
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+ 
+-			ehci: ehci@4000 {
++			ehci: usb@4000 {
+ 				compatible = "generic-ehci";
+ 				reg = <0x4000 0x1000>;
+ 				interrupt-parent = <&gic>;
+@@ -155,7 +155,7 @@
+ 				};
+ 			};
+ 
+-			ohci: ohci@d000 {
++			ohci: usb@d000 {
+ 				#usb-cells = <0>;
+ 
+ 				compatible = "generic-ohci";
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0003-ARM-dts-BCM5310X-Harmonize-xHCI-DT-nodes-name.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0003-ARM-dts-BCM5310X-Harmonize-xHCI-DT-nodes-name.patch
new file mode 100644
index 0000000000..08380d735c
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0003-ARM-dts-BCM5310X-Harmonize-xHCI-DT-nodes-name.patch
@@ -0,0 +1,29 @@
+From 4b650a20bdb5f9558007dd3055a17a1644a91c3e Mon Sep 17 00:00:00 2001
+From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Date: Tue, 20 Oct 2020 14:59:46 +0300
+Subject: [PATCH] ARM: dts: BCM5310X: Harmonize xHCI DT nodes name
+
+In accordance with the Generic xHCI bindings the corresponding node
+name is suppose to comply with the Generic USB HCD DT schema, which
+requires the USB nodes to have the name acceptable by the regexp:
+"^usb(@.*)?" . Make sure the "generic-xhci"-compatible nodes are
+correctly named.
+
+Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -318,7 +318,7 @@
+ 
+ 			interrupt-parent = <&gic>;
+ 
+-			xhci: xhci@23000 {
++			xhci: usb@23000 {
+ 				#usb-cells = <0>;
+ 
+ 				compatible = "generic-xhci";
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0004-ARM-dts-BCM5301X-Linksys-EA9500-add-fixed-partitions.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0004-ARM-dts-BCM5301X-Linksys-EA9500-add-fixed-partitions.patch
new file mode 100644
index 0000000000..c3fdd163d9
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0004-ARM-dts-BCM5301X-Linksys-EA9500-add-fixed-partitions.patch
@@ -0,0 +1,71 @@
+From bd9a01e28e5d1632528e531480b42d6e2c861d88 Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Sun, 1 Nov 2020 15:08:03 -0500
+Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 add fixed partitions
+
+This router has dual paritions to store trx firmware image and
+dual partitions for nvram. The second one in each of these cases acts
+as a backup store.
+
+When tested with OpenWrt, the default partition parser causes two issues:
+
+1. It labels both nvram partitions as nvram. In factory, second one is
+labeled devinfo.
+2. It parses second trx image and tries to create second 'linux' partition
+and fails with - cannot create duplicate 'linux' partition
+
+The following patch works around both of these issues.
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/bcm47094-linksys-panamera.dts    | 41 +++++++++++++++++++
+ 1 file changed, 41 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -292,3 +292,44 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
++
++&nandcs {
++	partitions {
++		compatible = "fixed-partitions";
++		#address-cells = <1>;
++		#size-cells = <1>;
++
++		partition@0 {
++			label = "boot";
++			reg = <0x0000000 0x0080000>;
++			read-only;
++		};
++
++		partition@80000 {
++			label = "nvram";
++			reg = <0x080000 0x0100000>;
++		};
++
++		partition@180000{
++			label = "devinfo";
++			reg = <0x0180000 0x080000>;
++		};
++
++		partition@200000 {
++			label = "firmware";
++			reg = <0x0200000 0x01D00000>;
++			compatible = "brcm,trx";
++		};
++
++		partition@1F00000 {
++			label = "failsafe";
++			reg = <0x01F00000 0x01D00000>;
++			read-only;
++		};
++
++		partition@5200000 {
++			label = "system";
++			reg = <0x05200000 0x02E00000>;
++		};
++	};
++};
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0005-ARM-dts-BCM5301X-Use-corretc-pinctrl-compatible-for-.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0005-ARM-dts-BCM5301X-Use-corretc-pinctrl-compatible-for-.patch
new file mode 100644
index 0000000000..3796967936
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0005-ARM-dts-BCM5301X-Use-corretc-pinctrl-compatible-for-.patch
@@ -0,0 +1,49 @@
+From 2f34ae32f5e74096540cd7ce95bfd467cb74b21a Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Wed, 4 Nov 2020 15:29:51 -0500
+Subject: [PATCH] ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709x
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM47094 version of pinmux uses different compatible and supports MDIO
+pinmux pins. Hence, use the correct compatible string and defines the
+MDIO pins group.
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094.dtsi | 9 +++++++++
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 2 files changed, 10 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm47094.dtsi
++++ b/arch/arm/boot/dts/bcm47094.dtsi
+@@ -8,6 +8,15 @@
+ / {
+ };
+ 
++&pinctrl {
++	compatible = "brcm,bcm4709-pinmux";
++
++	pinmux_mdio: mdio {
++		groups = "mdio_grp";
++		function = "mdio";
++	};
++};
++
+ &usb3_phy {
+ 	compatible = "brcm,ns-bx-usb3-phy";
+ };
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -428,7 +428,7 @@
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+ 
+-			pin-controller@1c0 {
++			pinctrl: pin-controller@1c0 {
+ 				compatible = "brcm,bcm4708-pinmux";
+ 				reg = <0x1c0 0x24>;
+ 				reg-names = "cru_gpio_control";
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0006-ARM-dts-BCM5301X-Linksys-EA9500-make-use-of-pinctrl.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0006-ARM-dts-BCM5301X-Linksys-EA9500-make-use-of-pinctrl.patch
new file mode 100644
index 0000000000..785271546b
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0006-ARM-dts-BCM5301X-Linksys-EA9500-make-use-of-pinctrl.patch
@@ -0,0 +1,61 @@
+From c862059875cffc013ee27bf9759ac288224e7a14 Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Wed, 4 Nov 2020 15:29:52 -0500
+Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl
+
+Now that we have a pin controller, use that instead of manuplating the
+mdio/mdc pins directly. i.e. we no longer require the mdio-mii-mux
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/bcm47094-linksys-panamera.dts    | 26 +++----------------
+ 1 file changed, 4 insertions(+), 22 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -123,33 +123,13 @@
+ 		};
+ 	};
+ 
+-	mdio-bus-mux {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
++	mdio-bus-mux@18003000 {
+ 
+ 		/* BIT(9) = 1 => external mdio */
+-		mdio_ext: mdio@200 {
++		mdio@200 {
+ 			reg = <0x200>;
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+-		};
+-	};
+-
+-	mdio-mii-mux {
+-		compatible = "mdio-mux-mmioreg";
+-		mdio-parent-bus = <&mdio_ext>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		reg = <0x1800c1c0 0x4>;
+-
+-		/* BIT(6) = mdc, BIT(7) = mdio */
+-		mux-mask = <0xc0>;
+-
+-		mdio-mii@0 {
+-			/* Enable MII function */
+-			reg = <0x0>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+ 
+ 			switch@0  {
+ 				compatible = "brcm,bcm53125";
+@@ -159,6 +139,8 @@
+ 				reset-names = "robo_reset";
+ 				reg = <0>;
+ 				dsa,member = <1 0>;
++				pinctrl-names = "default";
++				pinctrl-0 = <&pinmux_mdio>;
+ 
+ 				ports {
+ 					#address-cells = <1>;
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0008-ARM-dts-BCM5301X-Disable-USB-3-PHY-on-devices-withou.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0008-ARM-dts-BCM5301X-Disable-USB-3-PHY-on-devices-withou.patch
new file mode 100644
index 0000000000..64415c14db
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0008-ARM-dts-BCM5301X-Disable-USB-3-PHY-on-devices-withou.patch
@@ -0,0 +1,94 @@
+From 632ddf978565378e7efb9ea77c0ba239ea66bfdc Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 13 Nov 2020 11:09:19 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Disable USB 3 PHY on devices without USB
+ 3
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It seems pointless to have it enabled.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts       | 4 ----
+ arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts       | 4 ----
+ arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 4 ----
+ arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts      | 4 ----
+ arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts      | 4 ----
+ arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 4 ----
+ 6 files changed, 24 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+@@ -57,10 +57,6 @@
+ 	status = "okay";
+ };
+ 
+-&usb3_phy {
+-	status = "okay";
+-};
+-
+ &srab {
+ 	status = "okay";
+ 
+--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+@@ -64,10 +64,6 @@
+ 	status = "okay";
+ };
+ 
+-&usb3_phy {
+-	status = "okay";
+-};
+-
+ &srab {
+ 	status = "okay";
+ 
+--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
++++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+@@ -117,7 +117,3 @@
+ 		};
+ 	};
+ };
+-
+-&usb3_phy {
+-	status = "okay";
+-};
+--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+@@ -57,10 +57,6 @@
+ 	status = "okay";
+ };
+ 
+-&usb3_phy {
+-	status = "okay";
+-};
+-
+ &srab {
+ 	status = "okay";
+ 
+--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+@@ -105,10 +105,6 @@
+ 	status = "okay";
+ };
+ 
+-&usb3_phy {
+-	status = "okay";
+-};
+-
+ &srab {
+ 	status = "okay";
+ 
+--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
++++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
+@@ -126,7 +126,3 @@
+ &usb2 {
+ 	vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
+ };
+-
+-&usb3_phy {
+-	status = "okay";
+-};
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0009-ARM-dts-BCM5301X-Enable-USB-3-PHY-on-Luxul-XWR-3150.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0009-ARM-dts-BCM5301X-Enable-USB-3-PHY-on-Luxul-XWR-3150.patch
new file mode 100644
index 0000000000..5834e300f5
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0009-ARM-dts-BCM5301X-Enable-USB-3-PHY-on-Luxul-XWR-3150.patch
@@ -0,0 +1,30 @@
+From b2ab5e8697ef6591aeeda23be49e096705dbbda3 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 13 Nov 2020 10:50:12 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Enable USB 3 PHY on Luxul XWR-3150
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This device has a functional USB 3 port so PHY is required.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+@@ -71,6 +71,10 @@
+ 	vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
+ };
+ 
++&usb3_phy {
++	status = "okay";
++};
++
+ &spi_nor {
+ 	status = "okay";
+ };
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0010-ARM-dts-BCM5301X-Update-Ethernet-switch-node-name.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0010-ARM-dts-BCM5301X-Update-Ethernet-switch-node-name.patch
new file mode 100644
index 0000000000..9165572b95
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0010-ARM-dts-BCM5301X-Update-Ethernet-switch-node-name.patch
@@ -0,0 +1,32 @@
+From f527cb6f3345f7faa8e61dd9f3c437437327428c Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 11:41:01 -0800
+Subject: [PATCH] ARM: dts: BCM5301X: Update Ethernet switch node name
+
+Update the switch unit name from srab to ethernet-switch, allowing us to
+fix warnings such as:
+
+  CHECK   arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml
+arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml:
+srab@18007000: $nodename:0: 'srab@18007000' does not match
+'^(ethernet-)?switch(@.*)?$'
+        From schema:
+Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -482,7 +482,7 @@
+ 		#thermal-sensor-cells = <0>;
+ 	};
+ 
+-	srab: srab@18007000 {
++	srab: ethernet-switch@18007000 {
+ 		compatible = "brcm,bcm5301x-srab";
+ 		reg = <0x18007000 0x1000>;
+ 
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0011-ARM-dts-BCM5301X-Add-a-default-compatible-for-switch.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0011-ARM-dts-BCM5301X-Add-a-default-compatible-for-switch.patch
new file mode 100644
index 0000000000..bb1ca592a6
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0011-ARM-dts-BCM5301X-Add-a-default-compatible-for-switch.patch
@@ -0,0 +1,82 @@
+From 953efcb0c0234f8c488ebd4090378e949d6ba78b Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 16:42:09 -0800
+Subject: [PATCH] ARM: dts: BCM5301X: Add a default compatible for switch node
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Provide a default compatible string which is based on the 53011 SRAB
+compatible by default. The 4709 and 47094 default to the 53012 SRAB
+compatible.
+
+This allows us to have sane defaults and silences the following
+warnings:
+
+arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml:
+ethernet-switch@18007000: compatible: 'oneOf' conditional failed, one
+must be fixed:
+        ['brcm,bcm5301x-srab'] is too short
+        'brcm,bcm5325' was expected
+        'brcm,bcm53115' was expected
+        'brcm,bcm53125' was expected
+        'brcm,bcm53128' was expected
+        'brcm,bcm5365' was expected
+        'brcm,bcm5395' was expected
+        'brcm,bcm5389' was expected
+        'brcm,bcm5397' was expected
+        'brcm,bcm5398' was expected
+        'brcm,bcm11360-srab' was expected
+        'brcm,bcm5301x-srab' is not one of ['brcm,bcm53010-srab',
+'brcm,bcm53011-srab', 'brcm,bcm53012-srab', 'brcm,bcm53018-srab',
+'brcm,bcm53019-srab']
+        'brcm,bcm5301x-srab' is not one of ['brcm,bcm11404-srab',
+'brcm,bcm11407-srab', 'brcm,bcm11409-srab', 'brcm,bcm58310-srab',
+'brcm,bcm58311-srab', 'brcm,bcm58313-srab']
+        'brcm,bcm5301x-srab' is not one of ['brcm,bcm58522-srab',
+'brcm,bcm58523-srab', 'brcm,bcm58525-srab', 'brcm,bcm58622-srab',
+'brcm,bcm58623-srab', 'brcm,bcm58625-srab', 'brcm,bcm88312-srab']
+        'brcm,bcm5301x-srab' is not one of ['brcm,bcm3384-switch',
+'brcm,bcm6328-switch', 'brcm,bcm6368-switch']
+        From schema:
+Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4709.dtsi  | 4 ++++
+ arch/arm/boot/dts/bcm47094.dtsi | 4 ++++
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 3 files changed, 9 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm4709.dtsi
++++ b/arch/arm/boot/dts/bcm4709.dtsi
+@@ -9,3 +9,7 @@
+ 	clock-frequency = <125000000>;
+ 	status = "okay";
+ };
++
++&srab {
++	compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
++};
+--- a/arch/arm/boot/dts/bcm47094.dtsi
++++ b/arch/arm/boot/dts/bcm47094.dtsi
+@@ -25,3 +25,7 @@
+ 	clock-frequency = <125000000>;
+ 	status = "okay";
+ };
++
++&srab {
++	compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
++};
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -483,7 +483,7 @@
+ 	};
+ 
+ 	srab: ethernet-switch@18007000 {
+-		compatible = "brcm,bcm5301x-srab";
++		compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
+ 		reg = <0x18007000 0x1000>;
+ 
+ 		status = "disabled";
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0012-ARM-dts-BCM5301X-Provide-defaults-ports-container-no.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0012-ARM-dts-BCM5301X-Provide-defaults-ports-container-no.patch
new file mode 100644
index 0000000000..df868ba85f
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0012-ARM-dts-BCM5301X-Provide-defaults-ports-container-no.patch
@@ -0,0 +1,180 @@
+From fd577b41421bc24e2d04cab96d387301b649eb14 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 17:20:17 -0800
+Subject: [PATCH] ARM: dts: BCM5301X: Provide defaults ports container node
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Provide an empty 'ports' container node with the correct #address-cells
+and #size-cells properties. This silences the following warning:
+
+arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml:
+ethernet-switch@18007000: 'oneOf' conditional failed, one must be fixed:
+        'ports' is a required property
+        'ethernet-ports' is a required property
+        From schema:
+Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts     | 3 ---
+ arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts     | 3 ---
+ arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts    | 3 ---
+ arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts    | 3 ---
+ arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts    | 3 ---
+ arch/arm/boot/dts/bcm47094-linksys-panamera.dts  | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts    | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts    | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts    | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 3 ---
+ arch/arm/boot/dts/bcm5301x.dtsi                  | 4 ++++
+ arch/arm/boot/dts/bcm953012er.dts                | 3 ---
+ 12 files changed, 4 insertions(+), 33 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+@@ -61,9 +61,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "poe";
+--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+@@ -68,9 +68,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@4 {
+ 			reg = <4>;
+ 			label = "lan";
+--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
++++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+@@ -122,9 +122,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "lan4";
+--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+@@ -61,9 +61,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@4 {
+ 			reg = <4>;
+ 			label = "poe";
+--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+@@ -109,9 +109,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "lan4";
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -201,9 +201,6 @@
+ 	dsa,member = <0 0>;
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@1 {
+ 			reg = <1>;
+ 			label = "lan7";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+@@ -59,9 +59,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "poe";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+@@ -57,9 +57,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "lan";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+@@ -108,9 +108,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "lan4";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+@@ -83,9 +83,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "lan4";
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -489,6 +489,10 @@
+ 		status = "disabled";
+ 
+ 		/* ports are defined in board DTS */
++		ports {
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
+ 	};
+ 
+ 	rng: rng@18004000 {
+--- a/arch/arm/boot/dts/bcm953012er.dts
++++ b/arch/arm/boot/dts/bcm953012er.dts
+@@ -69,9 +69,6 @@
+ 	status = "okay";
+ 
+ 	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+ 		port@0 {
+ 			reg = <0>;
+ 			label = "port0";
diff --git a/target/linux/bcm53xx/patches-5.4/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch b/target/linux/bcm53xx/patches-5.4/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch
index 1d71647d60..e1a2d4ab9b 100644
--- a/target/linux/bcm53xx/patches-5.4/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch
+++ b/target/linux/bcm53xx/patches-5.4/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch
@@ -20,8 +20,8 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
 -			#address-cells = <1>;
 -			#size-cells = <1>;
  
--			pin-controller@1c0 {
-+			pinctrl {
+-			pinctrl: pin-controller@1c0 {
++			pinctrl: pinctrl {
  				compatible = "brcm,bcm4708-pinmux";
 -				reg = <0x1c0 0x24>;
 -				reg-names = "cru_gpio_control";
diff --git a/target/linux/bcm63xx/image/bcm63xx.mk b/target/linux/bcm63xx/image/bcm63xx.mk
index 24b150c063..54eaffc5bd 100644
--- a/target/linux/bcm63xx/image/bcm63xx.mk
+++ b/target/linux/bcm63xx/image/bcm63xx.mk
@@ -56,7 +56,7 @@ define Device/bcm63xx_redboot
   KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma elf
   IMAGES := redboot.bin
   IMAGE/redboot.bin := redboot-bin
-  REDBOOT_PREFIX := $$(IMAGE_PREFIX)
+  REDBOOT_PREFIX := $$(DEVICE_IMG_PREFIX)
 endef
 
 ### Generic ###
diff --git a/target/linux/bmips/config-5.10 b/target/linux/bmips/config-5.10
index 86c71aaeef..749cc0eb69 100644
--- a/target/linux/bmips/config-5.10
+++ b/target/linux/bmips/config-5.10
@@ -15,6 +15,7 @@ CONFIG_BOARD_SCACHE=y
 CONFIG_BRCMSTB_L2_IRQ=y
 CONFIG_CEVT_R4K=y
 CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLK_BCM63268_TIMER=y
 CONFIG_CLK_BCM_63XX_GATE=y
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_COMMON_CLK=y
@@ -190,7 +191,6 @@ CONFIG_PINCTRL_BCM6328=y
 CONFIG_PINCTRL_BCM6358=y
 CONFIG_PINCTRL_BCM6362=y
 CONFIG_PINCTRL_BCM6368=y
-CONFIG_PINCTRL_BCM63XX=y
 CONFIG_PM=y
 CONFIG_PM_CLK=y
 CONFIG_PM_GENERIC_DOMAINS=y
diff --git a/target/linux/bmips/dts/bcm6318.dtsi b/target/linux/bmips/dts/bcm6318.dtsi
index ba12390814..e7016eb1b2 100644
--- a/target/linux/bmips/dts/bcm6318.dtsi
+++ b/target/linux/bmips/dts/bcm6318.dtsi
@@ -131,124 +131,124 @@
 		};
 
 		pll_cntl: syscon@10000074 {
-			compatible = "syscon";
+			compatible = "syscon", "simple-mfd";
 			reg = <0x10000074 0x4>;
 			native-endian;
+
+			syscon-reboot {
+				compatible = "syscon-reboot";
+				offset = <0>;
+				mask = <0x1>;
+			};
 		};
 
-		syscon-reboot {
-			compatible = "syscon-reboot";
-			regmap = <&pll_cntl>;
-			offset = <0>;
-			mask = <0x1>;
-		};
+		gpio: syscon@10000080 {
+			compatible = "syscon", "simple-mfd";
+			reg = <0x10000080 0x80>;
+			native-endian;
 
-		pinctrl: pin-controller@10000080 {
-			compatible = "brcm,bcm6318-pinctrl";
-			reg = <0x10000080 0x08>,
-			      <0x10000088 0x08>,
-			      <0x10000098 0x04>,
-			      <0x1000009c 0x0c>,
-			      <0x100000d4 0x18>;
-			reg-names = "dirout", "dat", "mode", "mux", "pad";
+			pinctrl: pin-controller {
+				compatible = "brcm,bcm6318-pinctrl";
 
-			gpio-controller;
-			#gpio-cells = <2>;
+				gpio-controller;
+				#gpio-cells = <2>;
 
-			interrupt-parent = <&ext_intc>;
-			interrupts = <0 0>, <1 0>;
-			interrupt-names = "gpio33", "gpio34";
+				interrupts-extended = <&ext_intc 0 0>,
+						      <&ext_intc 1 0>;
+				interrupt-names = "gpio33",
+						  "gpio34";
 
-			pinctrl_ephy0_spd_led: ephy0_spd_led {
-				function = "ephy0_spd_led";
-				pins = "gpio0";
-			};
+				pinctrl_ephy0_spd_led: ephy0_spd_led {
+					function = "ephy0_spd_led";
+					pins = "gpio0";
+				};
 
-			pinctrl_ephy1_spd_led: ephy1_spd_led {
-				function = "ephy1_spd_led";
-				pins = "gpio1";
-			};
+				pinctrl_ephy1_spd_led: ephy1_spd_led {
+					function = "ephy1_spd_led";
+					pins = "gpio1";
+				};
 
-			pinctrl_ephy2_spd_led: ephy2_spd_led {
-				function = "ephy2_spd_led";
-				pins = "gpio2";
-			};
+				pinctrl_ephy2_spd_led: ephy2_spd_led {
+					function = "ephy2_spd_led";
+					pins = "gpio2";
+				};
 
-			pinctrl_ephy3_spd_led: ephy3_spd_led {
-				function = "ephy3_spd_led";
-				pins = "gpio3";
-			};
+				pinctrl_ephy3_spd_led: ephy3_spd_led {
+					function = "ephy3_spd_led";
+					pins = "gpio3";
+				};
 
-			pinctrl_ephy0_act_led: ephy0_act_led {
-				function = "ephy0_act_led";
-				pins = "gpio4";
-			};
+				pinctrl_ephy0_act_led: ephy0_act_led {
+					function = "ephy0_act_led";
+					pins = "gpio4";
+				};
 
-			pinctrl_ephy1_act_led: ephy1_act_led {
-				function = "ephy1_act_led";
-				pins = "gpio5";
-			};
+				pinctrl_ephy1_act_led: ephy1_act_led {
+					function = "ephy1_act_led";
+					pins = "gpio5";
+				};
 
-			pinctrl_ephy2_act_led: ephy2_act_led {
-				function = "ephy2_act_led";
-				pins = "gpio6";
-			};
-
-			pinctrl_ephy3_act_led: ephy3_act_led {
-				function = "ephy3_act_led";
-				pins = "gpio7";
-			};
-
-			pinctrl_serial_led: serial_led {
-				pinctrl_serial_led_data: serial_led_data {
-					function = "serial_led_data";
+				pinctrl_ephy2_act_led: ephy2_act_led {
+					function = "ephy2_act_led";
 					pins = "gpio6";
 				};
 
-				pinctrl_serial_led_clk: serial_led_clk {
-					function = "serial_led_clk";
+				pinctrl_ephy3_act_led: ephy3_act_led {
+					function = "ephy3_act_led";
 					pins = "gpio7";
 				};
-			};
 
-			pinctrl_inet_act_led: inet_act_led {
-				function = "inet_act_led";
-				pins = "gpio8";
-			};
+				pinctrl_serial_led: serial_led {
+					pinctrl_serial_led_data: serial_led_data {
+						function = "serial_led_data";
+						pins = "gpio6";
+					};
 
-			pinctrl_inet_fail_led: inet_fail_led {
-				function = "inet_fail_led";
-				pins = "gpio9";
-			};
+					pinctrl_serial_led_clk: serial_led_clk {
+						function = "serial_led_clk";
+						pins = "gpio7";
+					};
+				};
 
-			pinctrl_dsl_led: dsl_led {
-				function = "dsl_led";
-				pins = "gpio10";
-			};
+				pinctrl_inet_act_led: inet_act_led {
+					function = "inet_act_led";
+					pins = "gpio8";
+				};
 
-			pinctrl_post_fail_led: post_fail_led {
-				function = "post_fail_led";
-				pins = "gpio11";
-			};
+				pinctrl_inet_fail_led: inet_fail_led {
+					function = "inet_fail_led";
+					pins = "gpio9";
+				};
 
-			pinctrl_wlan_wps_led: wlan_wps_led {
-				function = "wlan_wps_led";
-				pins = "gpio12";
-			};
+				pinctrl_dsl_led: dsl_led {
+					function = "dsl_led";
+					pins = "gpio10";
+				};
 
-			pinctrl_usb_pwron: usb_pwron {
-				function = "usb_pwron";
-				pins = "gpio13";
-			};
+				pinctrl_post_fail_led: post_fail_led {
+					function = "post_fail_led";
+					pins = "gpio11";
+				};
 
-			pinctrl_usb_device_led: usb_device_led {
-				function = "usb_device_led";
-				pins = "gpio13";
-			};
+				pinctrl_wlan_wps_led: wlan_wps_led {
+					function = "wlan_wps_led";
+					pins = "gpio12";
+				};
 
-			pinctrl_usb_active: usb_active {
-				function = "usb_active";
-				pins = "gpio40";
+				pinctrl_usb_pwron: usb_pwron {
+					function = "usb_pwron";
+					pins = "gpio13";
+				};
+
+				pinctrl_usb_device_led: usb_device_led {
+					function = "usb_device_led";
+					pins = "gpio13";
+				};
+
+				pinctrl_usb_active: usb_active {
+					function = "usb_active";
+					pins = "gpio40";
+				};
 			};
 		};
 
diff --git a/target/linux/bmips/dts/bcm63268.dtsi b/target/linux/bmips/dts/bcm63268.dtsi
index be98bf181e..5581351311 100644
--- a/target/linux/bmips/dts/bcm63268.dtsi
+++ b/target/linux/bmips/dts/bcm63268.dtsi
@@ -93,16 +93,15 @@
 		};
 
 		pll_cntl: syscon@10000008 {
-			compatible = "syscon";
+			compatible = "syscon", "simple-mfd";
 			reg = <0x10000008 0x4>;
 			native-endian;
-		};
 
-		syscon-reboot {
-			compatible = "syscon-reboot";
-			regmap = <&pll_cntl>;
-			offset = <0x0>;
-			mask = <0x1>;
+			syscon-reboot {
+				compatible = "syscon-reboot";
+				offset = <0x0>;
+				mask = <0x1>;
+			};
 		};
 
 		periph_rst: reset-controller@10000010 {
@@ -147,131 +146,141 @@
 			timeout-sec = <30>;
 		};
 
-		pinctrl: pin-controller@100000c0 {
-			compatible = "brcm,bcm63268-pinctrl";
-			reg = <0x100000c0 0x8>,
-			      <0x100000c8 0x8>,
-			      <0x100000d0 0x4>,
-			      <0x100000d8 0x4>,
-			      <0x100000dc 0x4>,
-			      <0x100000f8 0x4>;
-			reg-names = "dirout", "dat", "led", "mode",
-				    "ctrl", "basemode";
+		timer_clk: clock-controller@100000ac {
+			compatible = "brcm,bcm63268-timer-clocks";
+			reg = <0x100000ac 0x4>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 
-			gpio-controller;
-			#gpio-cells = <2>;
+		gpio: syscon@100000c0 {
+			compatible = "syscon", "simple-mfd";
+			reg = <0x100000c0 0x80>;
+			native-endian;
 
-			interrupt-parent = <&ext_intc>;
-			interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
-			interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
+			pinctrl: pin-controller {
+				compatible = "brcm,bcm63268-pinctrl";
 
-			pinctrl_serial_led: serial_led {
-				pinctrl_serial_led_clk: serial_led_clk {
-					function = "serial_led_clk";
-					pins = "gpio0";
+				gpio-controller;
+				#gpio-cells = <2>;
+
+				interrupts-extended = <&ext_intc 0 0>,
+						      <&ext_intc 1 0>,
+						      <&ext_intc 2 0>,
+						      <&ext_intc 3 0>;
+				interrupt-names = "gpio32",
+						  "gpio33",
+						  "gpio34",
+						  "gpio35";
+
+				pinctrl_serial_led: serial_led {
+					pinctrl_serial_led_clk: serial_led_clk {
+						function = "serial_led_clk";
+						pins = "gpio0";
+					};
+
+					pinctrl_serial_led_data: serial_led_data {
+						function = "serial_led_data";
+						pins = "gpio1";
+					};
 				};
 
-				pinctrl_serial_led_data: serial_led_data {
-					function = "serial_led_data";
-					pins = "gpio1";
-				};
-			};
-
-			pinctrl_hsspi_cs4: hsspi_cs4 {
-				function = "hsspi_cs4";
-				pins = "gpio16";
-			};
-
-			pinctrl_hsspi_cs5: hsspi_cs5 {
-				function = "hsspi_cs5";
-				pins = "gpio17";
-			};
-
-			pinctrl_hsspi_cs6: hsspi_cs6 {
-				function = "hsspi_cs6";
-				pins = "gpio8";
-			};
-
-			pinctrl_hsspi_cs7: hsspi_cs7 {
-				function = "hsspi_cs7";
-				pins = "gpio9";
-			};
-
-			pinctrl_adsl_spi: adsl_spi {
-				pinctrl_adsl_spi_miso: adsl_spi_miso {
-					function = "adsl_spi_miso";
-					pins = "gpio18";
+				pinctrl_hsspi_cs4: hsspi_cs4 {
+					function = "hsspi_cs4";
+					pins = "gpio16";
 				};
 
-				pinctrl_adsl_spi_mosi: adsl_spi_mosi {
-					function = "adsl_spi_mosi";
-					pins = "gpio19";
+				pinctrl_hsspi_cs5: hsspi_cs5 {
+					function = "hsspi_cs5";
+					pins = "gpio17";
 				};
-			};
 
-			pinctrl_vreq_clk: vreq_clk {
-				function = "vreq_clk";
-				pins = "gpio22";
-			};
+				pinctrl_hsspi_cs6: hsspi_cs6 {
+					function = "hsspi_cs6";
+					pins = "gpio8";
+				};
 
-			pinctrl_pcie_clkreq_b: pcie_clkreq_b {
-				function = "pcie_clkreq_b";
-				pins = "gpio23";
-			};
+				pinctrl_hsspi_cs7: hsspi_cs7 {
+					function = "hsspi_cs7";
+					pins = "gpio9";
+				};
 
-			pinctrl_robosw_led_clk: robosw_led_clk {
-				function = "robosw_led_clk";
-				pins = "gpio30";
-			};
+				pinctrl_adsl_spi: adsl_spi {
+					pinctrl_adsl_spi_miso: adsl_spi_miso {
+						function = "adsl_spi_miso";
+						pins = "gpio18";
+					};
 
-			pinctrl_robosw_led_data: robosw_led_data {
-				function = "robosw_led_data";
-				pins = "gpio31";
-			};
+					pinctrl_adsl_spi_mosi: adsl_spi_mosi {
+						function = "adsl_spi_mosi";
+						pins = "gpio19";
+					};
+				};
 
-			pinctrl_nand: nand {
-				function = "nand";
-				group = "nand_grp";
-			};
+				pinctrl_vreq_clk: vreq_clk {
+					function = "vreq_clk";
+					pins = "gpio22";
+				};
 
-			pinctrl_gpio35_alt: gpio35_alt {
-				function = "gpio35_alt";
-				pin = "gpio35";
-			};
+				pinctrl_pcie_clkreq_b: pcie_clkreq_b {
+					function = "pcie_clkreq_b";
+					pins = "gpio23";
+				};
 
-			pinctrl_dectpd: dectpd {
-				function = "dectpd";
-				group = "dectpd_grp";
-			};
+				pinctrl_robosw_led_clk: robosw_led_clk {
+					function = "robosw_led_clk";
+					pins = "gpio30";
+				};
 
-			pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
-				function = "vdsl_phy_override_0";
-				group = "vdsl_phy_override_0_grp";
-			};
+				pinctrl_robosw_led_data: robosw_led_data {
+					function = "robosw_led_data";
+					pins = "gpio31";
+				};
 
-			pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
-				function = "vdsl_phy_override_1";
-				group = "vdsl_phy_override_1_grp";
-			};
+				pinctrl_nand: nand {
+					function = "nand";
+					group = "nand_grp";
+				};
 
-			pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
-				function = "vdsl_phy_override_2";
-				group = "vdsl_phy_override_2_grp";
-			};
+				pinctrl_gpio35_alt: gpio35_alt {
+					function = "gpio35_alt";
+					pin = "gpio35";
+				};
 
-			pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
-				function = "vdsl_phy_override_3";
-				group = "vdsl_phy_override_3_grp";
-			};
+				pinctrl_dectpd: dectpd {
+					function = "dectpd";
+					group = "dectpd_grp";
+				};
 
-			pinctrl_dsl_gpio8: dsl_gpio8 {
-				function = "dsl_gpio8";
-				group = "dsl_gpio8";
-			};
+				pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
+					function = "vdsl_phy_override_0";
+					group = "vdsl_phy_override_0_grp";
+				};
 
-			pinctrl_dsl_gpio9: dsl_gpio9 {
-				function = "dsl_gpio9";
-				group = "dsl_gpio9";
+				pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
+					function = "vdsl_phy_override_1";
+					group = "vdsl_phy_override_1_grp";
+				};
+
+				pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
+					function = "vdsl_phy_override_2";
+					group = "vdsl_phy_override_2_grp";
+				};
+
+				pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
+					function = "vdsl_phy_override_3";
+					group = "vdsl_phy_override_3_grp";
+				};
+
+				pinctrl_dsl_gpio8: dsl_gpio8 {
+					function = "dsl_gpio8";
+					group = "dsl_gpio8";
+				};
+
+				pinctrl_dsl_gpio9: dsl_gpio9 {
+					function = "dsl_gpio9";
+					group = "dsl_gpio9";
+				};
 			};
 		};
 
@@ -413,10 +422,10 @@
 
 			#phy-cells = <1>;
 
-			clocks = <&periph_clk BCM63268_CLK_USBH>;
-			/* FIXME! <&timer_clk BCM63268_TCLK_USB_REF> */
-			clock-names = "usbh";
-			/* FIXME! usb_ref */
+			clocks = <&periph_clk BCM63268_CLK_USBH>,
+				 <&timer_clk BCM63268_TCLK_USB_REF>;
+			clock-names = "usbh",
+				      "usb_ref";
 
 			power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
 			resets = <&periph_rst BCM63268_RST_USBH>;
diff --git a/target/linux/bmips/dts/bcm6328.dtsi b/target/linux/bmips/dts/bcm6328.dtsi
index 07ae773fe4..62f1309e0a 100644
--- a/target/linux/bmips/dts/bcm6328.dtsi
+++ b/target/linux/bmips/dts/bcm6328.dtsi
@@ -134,109 +134,113 @@
 		};
 
 		pll_cntl: syscon@10000068 {
-			compatible = "syscon";
+			compatible = "syscon", "simple-mfd";
 			reg = <0x10000068 0x4>;
 			native-endian;
+
+			syscon-reboot {
+				compatible = "syscon-reboot";
+				offset = <0>;
+				mask = <0x1>;
+			};
 		};
 
-		syscon-reboot {
-			compatible = "syscon-reboot";
-			regmap = <&pll_cntl>;
-			offset = <0>;
-			mask = <0x1>;
-		};
+		gpio: syscon@10000080 {
+			compatible = "syscon", "simple-mfd";
+			reg = <0x10000080 0x80>;
+			native-endian;
 
-		pinctrl: pin-controller@10000080 {
-			compatible = "brcm,bcm6328-pinctrl";
-			reg = <0x10000080 0x8>,
-			      <0x10000088 0x8>,
-			      <0x10000098 0x4>,
-			      <0x1000009c 0xc>;
-			reg-names = "dirout", "dat", "mode", "mux";
+			pinctrl: pin-controller {
+				compatible = "brcm,bcm6328-pinctrl";
 
-			gpio-controller;
-			#gpio-cells = <2>;
+				gpio-controller;
+				#gpio-cells = <2>;
 
-			interrupt-parent = <&ext_intc>;
-			interrupts = <3 0>, <2 0>, <0 0>, <1 0>;
-			interrupt-names = "gpio12", "gpio15",
-					  "gpio23", "gpio24";
+				interrupts-extended = <&ext_intc 3 0>,
+						      <&ext_intc 2 0>,
+						      <&ext_intc 1 0>,
+						      <&ext_intc 0 0>;
+				interrupt-names = "gpio12",
+						  "gpio15",
+						  "gpio23",
+						  "gpio24";
 
-			pinctrl_serial_led: serial_led {
-				pinctrl_serial_led_data: serial_led_data {
-					function = "serial_led_data";
-					pins = "gpio6";
+				pinctrl_serial_led: serial_led {
+					pinctrl_serial_led_data: serial_led_data {
+						function = "serial_led_data";
+						pins = "gpio6";
+					};
+
+					pinctrl_serial_led_clk: serial_led_clk {
+						function = "serial_led_clk";
+						pins = "gpio7";
+					};
 				};
 
-				pinctrl_serial_led_clk: serial_led_clk {
-					function = "serial_led_clk";
-					pins = "gpio7";
+				pinctrl_inet_act_led: inet_act_led {
+					function = "inet_act_led";
+					pins = "gpio11";
 				};
-			};
 
-			pinctrl_inet_act_led: inet_act_led {
-				function = "inet_act_led";
-				pins = "gpio11";
-			};
+				pinctrl_pcie_clkreq: pcie_clkreq {
+					function = "pcie_clkreq";
+					pins = "gpio16";
+				};
 
-			pinctrl_pcie_clkreq: pcie_clkreq {
-				function = "pcie_clkreq";
-				pins = "gpio16";
-			};
+				pinctrl_ephy0_spd_led: ephy0_spd_led {
+					function = "led";
+					pins = "gpio17";
+				};
 
-			pinctrl_ephy0_spd_led: ephy0_spd_led {
-				function = "led";
-				pins = "gpio17";
-			};
+				pinctrl_ephy1_spd_led: ephy1_spd_led {
+					function = "led";
+					pins = "gpio18";
+				};
 
-			pinctrl_ephy1_spd_led: ephy1_spd_led {
-				function = "led";
-				pins = "gpio18";
-			};
+				pinctrl_ephy2_spd_led: ephy2_spd_led {
+					function = "led";
+					pins = "gpio19";
+				};
 
-			pinctrl_ephy2_spd_led: ephy2_spd_led {
-				function = "led";
-				pins = "gpio19";
-			};
+				pinctrl_ephy3_spd_led: ephy3_spd_led {
+					function = "led";
+					pins = "gpio20";
+				};
 
-			pinctrl_ephy3_spd_led: ephy3_spd_led {
-				function = "led";
-				pins = "gpio20";
-			};
+				pinctrl_ephy0_act_led: ephy0_act_led {
+					function = "ephy0_act_led";
+					pins = "gpio25";
+				};
 
-			pinctrl_ephy0_act_led: ephy0_act_led {
-				function = "ephy0_act_led";
-				pins = "gpio25";
-			};
+				pinctrl_ephy1_act_led: ephy1_act_led {
+					function = "ephy1_act_led";
+					pins = "gpio26";
+				};
 
-			pinctrl_ephy1_act_led: ephy1_act_led {
-				function = "ephy1_act_led";
-				pins = "gpio26";
-			};
+				pinctrl_ephy2_act_led: ephy2_act_led {
+					function = "ephy2_act_led";
+					pins = "gpio27";
+				};
 
-			pinctrl_ephy2_act_led: ephy2_act_led {
-				function = "ephy2_act_led";
-				pins = "gpio27";
-			};
+				pinctrl_ephy3_act_led: ephy3_act_led {
+					function = "ephy3_act_led";
+					pins = "gpio28";
+				};
 
-			pinctrl_ephy3_act_led: ephy3_act_led {
-				function = "ephy3_act_led";
-				pins = "gpio28";
-			};
+				pinctrl_hsspi_cs1: hsspi_cs1 {
+					function = "hsspi_cs1";
+					pins = "hsspi_cs1";
+				};
 
-			pinctrl_hsspi_cs1: hsspi_cs1 {
-				function = "hsspi_cs1";
-				pins = "hsspi_cs1";
-			};
+				pinctrl_usb_port1_device: usb_port1_device {
+					function = "usb_device_port";
+					pins = "usb_port1";
+				};
 
-			pinctrl_usb_port1_device: usb_port1_device {
-				function = "usb_device_port";
-				pins = "usb_port1";
-			};
-
-			pinctrl_usb_port1_host: usb_port1_host {
-				function = "usb_host_port";
-				pins = "usb_port1";
+				pinctrl_usb_port1_host: usb_port1_host {
+					function = "usb_host_port";
+					pins = "usb_port1";
+				};
 			};
 		};
 
diff --git a/target/linux/bmips/dts/bcm6358.dtsi b/target/linux/bmips/dts/bcm6358.dtsi
index 83cfb0ad90..b396d9335b 100644
--- a/target/linux/bmips/dts/bcm6358.dtsi
+++ b/target/linux/bmips/dts/bcm6358.dtsi
@@ -92,16 +92,15 @@
 		};
 
 		pll_cntl: syscon@fffe0008 {
-			compatible = "syscon";
+			compatible = "syscon", "simple-mfd";
 			reg = <0xfffe0008 0x4>;
 			native-endian;
-		};
 
-		syscon-reboot {
-			compatible = "syscon-reboot";
-			regmap = <&pll_cntl>;
-			offset = <0x0>;
-			mask = <0x1>;
+			syscon-reboot {
+				compatible = "syscon-reboot";
+				offset = <0x0>;
+				mask = <0x1>;
+			};
 		};
 
 		periph_intc: interrupt-controller@fffe000c {
@@ -158,74 +157,75 @@
 			timeout-sec = <30>;
 		};
 
-		pinctrl: pin-controller@fffe0080 {
-			compatible = "brcm,bcm6358-pinctrl";
-			reg = <0xfffe0080 0x8>,
-			      <0xfffe0088 0x8>;
-			reg-names = "dirout", "dat", "mode";
-			brcm,gpiomode = <&gpiomode>;
+		gpio: syscon@fffe0080 {
+			compatible = "syscon", "simple-mfd";
+			reg = <0xfffe0080 0x50>;
+			native-endian;
 
-			gpio-controller;
-			#gpio-cells = <2>;
+			pinctrl: pin-controller {
+				compatible = "brcm,bcm6358-pinctrl";
 
-			interrupts-extended = <&ext_intc1 0 0>,
-					      <&ext_intc1 1 0>,
-					      <&ext_intc0 0 0>,
-					      <&ext_intc0 1 0>,
-					      <&ext_intc0 2 0>,
-					      <&ext_intc0 3 0>;
-			interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
-					  "gpio36", "gpio37";
+				gpio-controller;
+				#gpio-cells = <2>;
 
-			pinctrl_ebi_cs: ebi_cs {
-				function = "ebi_cs";
-				groups = "ebi_cs_grp";
+				interrupts-extended = <&ext_intc1 0 0>,
+						      <&ext_intc1 1 0>,
+						      <&ext_intc0 0 0>,
+						      <&ext_intc0 1 0>,
+						      <&ext_intc0 2 0>,
+						      <&ext_intc0 3 0>;
+				interrupt-names = "gpio32",
+						  "gpio33",
+						  "gpio34",
+						  "gpio35",
+						  "gpio36",
+						  "gpio37";
+
+				pinctrl_ebi_cs: ebi_cs {
+					function = "ebi_cs";
+					groups = "ebi_cs_grp";
+				};
+
+				pinctrl_uart1: uart1 {
+					function = "uart1";
+					groups = "uart1_grp";
+				};
+
+				pinctrl_serial_led: serial_led {
+					function = "serial_led";
+					groups = "serial_led_grp";
+				};
+
+				pinctrl_legacy_led: legacy_led {
+					function = "legacy_led";
+					groups = "legacy_led_grp";
+				};
+
+				pinctrl_led: led {
+					function = "led";
+					groups = "led_grp";
+				};
+
+				pinctrl_spi_cs_23: spi_cs {
+					function = "spi_cs";
+					groups = "spi_cs_grp";
+				};
+
+				pinctrl_utopia: utopia {
+					function = "utopia";
+					groups = "utopia_grp";
+				};
+
+				pinctrl_pwm_syn_clk: pwm_syn_clk {
+					function = "pwm_syn_clk";
+					groups = "pwm_syn_clk_grp";
+				};
+
+				pinctrl_sys_irq: sys_irq {
+					function = "sys_irq";
+					groups = "sys_irq_grp";
+				};
 			};
-
-			pinctrl_uart1: uart1 {
-				function = "uart1";
-				groups = "uart1_grp";
-			};
-
-			pinctrl_serial_led: serial_led {
-				function = "serial_led";
-				groups = "serial_led_grp";
-			};
-
-			pinctrl_legacy_led: legacy_led {
-				function = "legacy_led";
-				groups = "legacy_led_grp";
-			};
-
-			pinctrl_led: led {
-				function = "led";
-				groups = "led_grp";
-			};
-
-			pinctrl_spi_cs_23: spi_cs {
-				function = "spi_cs";
-				groups = "spi_cs_grp";
-			};
-
-			pinctrl_utopia: utopia {
-				function = "utopia";
-				groups = "utopia_grp";
-			};
-
-			pinctrl_pwm_syn_clk: pwm_syn_clk {
-				function = "pwm_syn_clk";
-				groups = "pwm_syn_clk_grp";
-			};
-
-			pinctrl_sys_irq: sys_irq {
-				function = "sys_irq";
-				groups = "sys_irq_grp";
-			};
-		};
-
-		gpiomode: gpiomode@fffe0098 {
-			compatible = "brcm,bcm6358-gpiomode", "syscon";
-			reg = <0xfffe0098 0x4>;
 		};
 
 		leds: led-controller@fffe00d0 {
diff --git a/target/linux/bmips/dts/bcm6362.dtsi b/target/linux/bmips/dts/bcm6362.dtsi
index 724ce5a2f8..0929d6ea3f 100644
--- a/target/linux/bmips/dts/bcm6362.dtsi
+++ b/target/linux/bmips/dts/bcm6362.dtsi
@@ -93,16 +93,15 @@
 		};
 
 		pll_cntl: syscon@10000008 {
-			compatible = "syscon";
+			compatible = "syscon", "simple-mfd";
 			reg = <0x10000008 0x4>;
 			native-endian;
-		};
 
-		syscon-reboot {
-			compatible = "syscon-reboot";
-			regmap = <&pll_cntl>;
-			offset = <0x0>;
-			mask = <0x1>;
+			syscon-reboot {
+				compatible = "syscon-reboot";
+				offset = <0x0>;
+				mask = <0x1>;
+			};
 		};
 
 		periph_rst: reset-controller@10000010 {
@@ -147,174 +146,176 @@
 			timeout-sec = <30>;
 		};
 
-		pinctrl: pin-controller@10000080 {
-			compatible = "brcm,bcm6362-pinctrl";
-			reg = <0x10000080 0x8>,
-			      <0x10000088 0x8>,
-			      <0x10000090 0x4>,
-			      <0x10000098 0x4>,
-			      <0x1000009c 0x4>,
-			      <0x100000b8 0x4>;
-			reg-names = "dirout", "dat", "led",
-				    "mode", "ctrl", "basemode";
+		gpio: syscon@10000080 {
+			compatible = "syscon", "simple-mfd";
+			reg = <0x10000080 0x80>;
+			native-endian;
 
-			gpio-controller;
-			#gpio-cells = <2>;
+			pinctrl: pin-controller {
+				compatible = "brcm,bcm6362-pinctrl";
 
-			interrupt-parent = <&ext_intc>;
-			interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
-			interrupt-names = "gpio24", "gpio25",
-					  "gpio26", "gpio27";
+				gpio-controller;
+				#gpio-cells = <2>;
 
-			pinctrl_usb_device_led: usb_device_led {
-				function = "usb_device_led";
-				pins = "gpio0";
-			};
+				interrupts-extended = <&ext_intc 0 0>,
+						      <&ext_intc 1 0>,
+						      <&ext_intc 2 0>,
+						      <&ext_intc 3 0>;
+				interrupt-names = "gpio24",
+						  "gpio25",
+						  "gpio26",
+						  "gpio27";
 
-			pinctrl_sys_irq: sys_irq {
-				function = "sys_irq";
-				pins = "gpio1";
-			};
-
-			pinctrl_serial_led: serial_led {
-				pinctrl_serial_led_clk: serial_led_clk {
-					function = "serial_led_clk";
-					pins = "gpio2";
+				pinctrl_usb_device_led: usb_device_led {
+					function = "usb_device_led";
+					pins = "gpio0";
 				};
 
-				pinctrl_serial_led_data: serial_led_data {
-					function = "serial_led_data";
-					pins = "gpio3";
-				};
-			};
-
-			pinctrl_robosw_led_data: robosw_led_data {
-				function = "robosw_led_data";
-				pins = "gpio4";
-			};
-
-			pinctrl_robosw_led_clk: robosw_led_clk {
-				function = "robosw_led_clk";
-				pins = "gpio5";
-			};
-
-			pinctrl_robosw_led0: robosw_led0 {
-				function = "robosw_led0";
-				pins = "gpio6";
-			};
-
-			pinctrl_robosw_led1: robosw_led1 {
-				function = "robosw_led1";
-				pins = "gpio7";
-			};
-
-			pinctrl_inet_led: inet_led {
-				function = "inet_led";
-				pins = "gpio8";
-			};
-
-			pinctrl_spi_cs2: spi_cs2 {
-				function = "spi_cs2";
-				pins = "gpio9";
-			};
-
-			pinctrl_spi_cs3: spi_cs3 {
-				function = "spi_cs3";
-				pins = "gpio10";
-			};
-
-			pinctrl_ntr_pulse: ntr_pulse {
-				function = "ntr_pulse";
-				pins = "gpio11";
-			};
-
-			pinctrl_uart1_scts: uart1_scts {
-				function = "uart1_scts";
-				pins = "gpio12";
-			};
-
-			pinctrl_uart1_srts: uart1_srts {
-				function = "uart1_srts";
-				pins = "gpio13";
-			};
-
-			pinctrl_uart1: uart1 {
-				pinctrl_uart1_sdin: uart1_sdin {
-					function = "uart1_sdin";
-					pins = "gpio14";
+				pinctrl_sys_irq: sys_irq {
+					function = "sys_irq";
+					pins = "gpio1";
 				};
 
-				pinctrl_uart1_sdout: uart1_sdout {
-					function = "uart1_sdout";
-					pins = "gpio15";
-				};
-			};
+				pinctrl_serial_led: serial_led {
+					pinctrl_serial_led_clk: serial_led_clk {
+						function = "serial_led_clk";
+						pins = "gpio2";
+					};
 
-			pinctrl_adsl_spi: adsl_spi {
-				pinctrl_adsl_spi_miso: adsl_spi_miso {
-					function = "adsl_spi_miso";
-					pins = "gpio16";
+					pinctrl_serial_led_data: serial_led_data {
+						function = "serial_led_data";
+						pins = "gpio3";
+					};
 				};
 
-				pinctrl_adsl_spi_mosi: adsl_spi_mosi {
-					function = "adsl_spi_mosi";
-					pins = "gpio17";
+				pinctrl_robosw_led_data: robosw_led_data {
+					function = "robosw_led_data";
+					pins = "gpio4";
 				};
 
-				pinctrl_adsl_spi_clk: adsl_spi_clk {
-					function = "adsl_spi_clk";
-					pins = "gpio18";
+				pinctrl_robosw_led_clk: robosw_led_clk {
+					function = "robosw_led_clk";
+					pins = "gpio5";
 				};
 
-				pinctrl_adsl_spi_cs: adsl_spi_cs {
-					function = "adsl_spi_cs";
-					pins = "gpio19";
+				pinctrl_robosw_led0: robosw_led0 {
+					function = "robosw_led0";
+					pins = "gpio6";
 				};
-			};
 
-			pinctrl_ephy0_led: ephy0_led {
-				function = "ephy0_led";
-				pins = "gpio20";
-			};
+				pinctrl_robosw_led1: robosw_led1 {
+					function = "robosw_led1";
+					pins = "gpio7";
+				};
 
-			pinctrl_ephy1_led: ephy1_led {
-				function = "ephy1_led";
-				pins = "gpio21";
-			};
+				pinctrl_inet_led: inet_led {
+					function = "inet_led";
+					pins = "gpio8";
+				};
 
-			pinctrl_ephy2_led: ephy2_led {
-				function = "ephy2_led";
-				pins = "gpio22";
-			};
+				pinctrl_spi_cs2: spi_cs2 {
+					function = "spi_cs2";
+					pins = "gpio9";
+				};
 
-			pinctrl_ephy3_led: ephy3_led {
-				function = "ephy3_led";
-				pins = "gpio23";
-			};
+				pinctrl_spi_cs3: spi_cs3 {
+					function = "spi_cs3";
+					pins = "gpio10";
+				};
 
-			pinctrl_ext_irq0: ext_irq0 {
-				function = "ext_irq0";
-				pins = "gpio24";
-			};
+				pinctrl_ntr_pulse: ntr_pulse {
+					function = "ntr_pulse";
+					pins = "gpio11";
+				};
 
-			pinctrl_ext_irq1: ext_irq1 {
-				function = "ext_irq1";
-				pins = "gpio25";
-			};
+				pinctrl_uart1_scts: uart1_scts {
+					function = "uart1_scts";
+					pins = "gpio12";
+				};
 
-			pinctrl_ext_irq2: ext_irq2 {
-				function = "ext_irq2";
-				pins = "gpio26";
-			};
+				pinctrl_uart1_srts: uart1_srts {
+					function = "uart1_srts";
+					pins = "gpio13";
+				};
 
-			pinctrl_ext_irq3: ext_irq3 {
-				function = "ext_irq3";
-				pins = "gpio27";
-			};
+				pinctrl_uart1: uart1 {
+					pinctrl_uart1_sdin: uart1_sdin {
+						function = "uart1_sdin";
+						pins = "gpio14";
+					};
 
-			pinctrl_nand: nand {
-				function = "nand";
-				group = "nand_grp";
+					pinctrl_uart1_sdout: uart1_sdout {
+						function = "uart1_sdout";
+						pins = "gpio15";
+					};
+				};
+
+				pinctrl_adsl_spi: adsl_spi {
+					pinctrl_adsl_spi_miso: adsl_spi_miso {
+						function = "adsl_spi_miso";
+						pins = "gpio16";
+					};
+
+					pinctrl_adsl_spi_mosi: adsl_spi_mosi {
+						function = "adsl_spi_mosi";
+						pins = "gpio17";
+					};
+
+					pinctrl_adsl_spi_clk: adsl_spi_clk {
+						function = "adsl_spi_clk";
+						pins = "gpio18";
+					};
+
+					pinctrl_adsl_spi_cs: adsl_spi_cs {
+						function = "adsl_spi_cs";
+						pins = "gpio19";
+					};
+				};
+
+				pinctrl_ephy0_led: ephy0_led {
+					function = "ephy0_led";
+					pins = "gpio20";
+				};
+
+				pinctrl_ephy1_led: ephy1_led {
+					function = "ephy1_led";
+					pins = "gpio21";
+				};
+
+				pinctrl_ephy2_led: ephy2_led {
+					function = "ephy2_led";
+					pins = "gpio22";
+				};
+
+				pinctrl_ephy3_led: ephy3_led {
+					function = "ephy3_led";
+					pins = "gpio23";
+				};
+
+				pinctrl_ext_irq0: ext_irq0 {
+					function = "ext_irq0";
+					pins = "gpio24";
+				};
+
+				pinctrl_ext_irq1: ext_irq1 {
+					function = "ext_irq1";
+					pins = "gpio25";
+				};
+
+				pinctrl_ext_irq2: ext_irq2 {
+					function = "ext_irq2";
+					pins = "gpio26";
+				};
+
+				pinctrl_ext_irq3: ext_irq3 {
+					function = "ext_irq3";
+					pins = "gpio27";
+				};
+
+				pinctrl_nand: nand {
+					function = "nand";
+					group = "nand_grp";
+				};
 			};
 		};
 
diff --git a/target/linux/bmips/dts/bcm6368.dtsi b/target/linux/bmips/dts/bcm6368.dtsi
index babd8c7385..2c980f91f4 100644
--- a/target/linux/bmips/dts/bcm6368.dtsi
+++ b/target/linux/bmips/dts/bcm6368.dtsi
@@ -83,16 +83,15 @@
 		};
 
 		pll_cntl: syscon@10000008 {
-			compatible = "syscon";
+			compatible = "syscon", "simple-mfd";
 			reg = <0x10000008 0x4>;
 			native-endian;
-		};
 
-		syscon-reboot {
-			compatible = "syscon-reboot";
-			regmap = <&pll_cntl>;
-			offset = <0x0>;
-			mask = <0x1>;
+			syscon-reboot {
+				compatible = "syscon-reboot";
+				offset = <0x0>;
+				mask = <0x1>;
+			};
 		};
 
 		periph_rst: reset-controller@10000010 {
@@ -149,185 +148,190 @@
 			timeout-sec = <30>;
 		};
 
-		pinctrl: pin-controller@10000080 {
-			compatible = "brcm,bcm6368-pinctrl";
-			reg = <0x10000080 0x8>,
-			      <0x10000088 0x8>,
-			      <0x10000098 0x4>;
-			reg-names = "dirout", "dat", "mode";
-			brcm,gpiobasemode = <&gpiobasemode>;
+		gpio: syscon@10000080 {
+			compatible = "syscon", "simple-mfd";
+			reg = <0x10000080 0x80>;
+			native-endian;
 
-			gpio-controller;
-			#gpio-cells = <2>;
+			pinctrl: pin-controller {
+				compatible = "brcm,bcm6368-pinctrl";
 
-			interrupts-extended = <&ext_intc1 0 0>,
-					      <&ext_intc1 1 0>,
-					      <&ext_intc0 0 0>,
-					      <&ext_intc0 1 0>,
-					      <&ext_intc0 2 0>,
-					      <&ext_intc0 3 0>;
-			interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
-					  "gpio36", "gpio37";
+				gpio-controller;
+				#gpio-cells = <2>;
 
-			pinctrl_analog_afe_0: analog_afe_0 {
-				function = "analog_afe_0";
-				pins = "gpio0";
-			};
+				interrupts-extended = <&ext_intc1 0 0>,
+						      <&ext_intc1 1 0>,
+						      <&ext_intc0 0 0>,
+						      <&ext_intc0 1 0>,
+						      <&ext_intc0 2 0>,
+						      <&ext_intc0 3 0>;
+				interrupt-names = "gpio32",
+						  "gpio33",
+						  "gpio34",
+						  "gpio35",
+						  "gpio36",
+						  "gpio37";
 
-			pinctrl_analog_afe_1: analog_afe_1 {
-				function = "analog_afe_1";
-				pins = "gpio1";
-			};
-
-			pinctrl_sys_irq: sys_irq {
-				function = "sys_irq";
-				pins = "gpio2";
-			};
-
-			pinctrl_serial_led: serial_led {
-				pinctrl_serial_led_data: serial_led_data {
-					function = "serial_led_data";
-					pins = "gpio3";
+				pinctrl_analog_afe_0: analog_afe_0 {
+					function = "analog_afe_0";
+					pins = "gpio0";
 				};
 
-				pinctrl_serial_led_clk: serial_led_clk {
-					function = "serial_led_clk";
-					pins = "gpio4";
-				};
-			};
-
-			pinctrl_inet_led: inet_led {
-				function = "inet_led";
-				pins = "gpio5";
-			};
-
-			pinctrl_ephy0_led: ephy0_led {
-				function = "ephy0_led";
-				pins = "gpio6";
-			};
-
-			pinctrl_ephy1_led: ephy1_led {
-				function = "ephy1_led";
-				pins = "gpio7";
-			};
-
-			pinctrl_ephy2_led: ephy2_led {
-				function = "ephy2_led";
-				pins = "gpio8";
-			};
-
-			pinctrl_ephy3_led: ephy3_led {
-				function = "ephy3_led";
-				pins = "gpio9";
-			};
-
-			pinctrl_robosw_led_data: robosw_led_data {
-				function = "robosw_led_data";
-				pins = "gpio10";
-			};
-
-			pinctrl_robosw_led_clk: robosw_led_clk {
-				function = "robosw_led_clk";
-				pins = "gpio11";
-			};
-
-			pinctrl_robosw_led0: robosw_led0 {
-				function = "robosw_led0";
-				pins = "gpio12";
-			};
-
-			pinctrl_robosw_led1: robosw_led1 {
-				function = "robosw_led1";
-				pins = "gpio13";
-			};
-
-			pinctrl_usb_device_led: usb_device_led {
-				function = "usb_device_led";
-				pins = "gpio14";
-			};
-
-			pinctrl_pci: pci {
-				pinctrl_pci_req1: pci_req1 {
-					function = "pci_req1";
-					pins = "gpio16";
+				pinctrl_analog_afe_1: analog_afe_1 {
+					function = "analog_afe_1";
+					pins = "gpio1";
 				};
 
-				pinctrl_pci_gnt1: pci_gnt1 {
-					function = "pci_gnt1";
-					pins = "gpio17";
+				pinctrl_sys_irq: sys_irq {
+					function = "sys_irq";
+					pins = "gpio2";
 				};
 
-				pinctrl_pci_intb: pci_intb {
-					function = "pci_intb";
-					pins = "gpio18";
+				pinctrl_serial_led: serial_led {
+					pinctrl_serial_led_data: serial_led_data {
+						function = "serial_led_data";
+						pins = "gpio3";
+					};
+
+					pinctrl_serial_led_clk: serial_led_clk {
+						function = "serial_led_clk";
+						pins = "gpio4";
+					};
 				};
 
-				pinctrl_pci_req0: pci_req0 {
-					function = "pci_req0";
-					pins = "gpio19";
+				pinctrl_inet_led: inet_led {
+					function = "inet_led";
+					pins = "gpio5";
 				};
 
-				pinctrl_pci_gnt0: pci_gnt0 {
-					function = "pci_gnt0";
-					pins = "gpio20";
-				};
-			};
-
-			pinctrl_pcmcia: pcmcia {
-				pinctrl_pcmcia_cd1: pcmcia_cd1 {
-					function = "pcmcia_cd1";
-					pins = "gpio22";
+				pinctrl_ephy0_led: ephy0_led {
+					function = "ephy0_led";
+					pins = "gpio6";
 				};
 
-				pinctrl_pcmcia_cd2: pcmcia_cd2 {
-					function = "pcmcia_cd2";
-					pins = "gpio23";
+				pinctrl_ephy1_led: ephy1_led {
+					function = "ephy1_led";
+					pins = "gpio7";
 				};
 
-				pinctrl_pcmcia_vs1: pcmcia_vs1 {
-					function = "pcmcia_vs1";
-					pins = "gpio24";
+				pinctrl_ephy2_led: ephy2_led {
+					function = "ephy2_led";
+					pins = "gpio8";
 				};
 
-				pinctrl_pcmcia_vs2: pcmcia_vs2 {
-					function = "pcmcia_vs2";
-					pins = "gpio25";
+				pinctrl_ephy3_led: ephy3_led {
+					function = "ephy3_led";
+					pins = "gpio9";
 				};
-			};
 
-			pinctrl_ebi_cs2: ebi_cs2 {
-				function = "ebi_cs2";
-				pins = "gpio26";
-			};
+				pinctrl_robosw_led_data: robosw_led_data {
+					function = "robosw_led_data";
+					pins = "gpio10";
+				};
 
-			pinctrl_ebi_cs3: ebi_cs3 {
-				function = "ebi_cs2";
-				pins = "gpio27";
-			};
+				pinctrl_robosw_led_clk: robosw_led_clk {
+					function = "robosw_led_clk";
+					pins = "gpio11";
+				};
 
-			pinctrl_spi_cs2: spi_cs2 {
-				function = "spi_cs2";
-				pins = "gpio28";
-			};
+				pinctrl_robosw_led0: robosw_led0 {
+					function = "robosw_led0";
+					pins = "gpio12";
+				};
 
-			pinctrl_spi_cs3: spi_cs3 {
-				function = "spi_cs3";
-				pins = "gpio29";
-			};
+				pinctrl_robosw_led1: robosw_led1 {
+					function = "robosw_led1";
+					pins = "gpio13";
+				};
 
-			pinctrl_spi_cs4: spi_cs4 {
-				function = "spi_cs4";
-				pins = "gpio30";
-			};
+				pinctrl_usb_device_led: usb_device_led {
+					function = "usb_device_led";
+					pins = "gpio14";
+				};
 
-			pinctrl_spi_cs5: spi_cs5 {
-				function = "spi_cs5";
-				pins = "gpio31";
-			};
+				pinctrl_pci: pci {
+					pinctrl_pci_req1: pci_req1 {
+						function = "pci_req1";
+						pins = "gpio16";
+					};
 
-			pinctrl_uart1: uart1 {
-				function = "uart1";
-				group = "uart1_grp";
+					pinctrl_pci_gnt1: pci_gnt1 {
+						function = "pci_gnt1";
+						pins = "gpio17";
+					};
+
+					pinctrl_pci_intb: pci_intb {
+						function = "pci_intb";
+						pins = "gpio18";
+					};
+
+					pinctrl_pci_req0: pci_req0 {
+						function = "pci_req0";
+						pins = "gpio19";
+					};
+
+					pinctrl_pci_gnt0: pci_gnt0 {
+						function = "pci_gnt0";
+						pins = "gpio20";
+					};
+				};
+
+				pinctrl_pcmcia: pcmcia {
+					pinctrl_pcmcia_cd1: pcmcia_cd1 {
+						function = "pcmcia_cd1";
+						pins = "gpio22";
+					};
+
+					pinctrl_pcmcia_cd2: pcmcia_cd2 {
+						function = "pcmcia_cd2";
+						pins = "gpio23";
+					};
+
+					pinctrl_pcmcia_vs1: pcmcia_vs1 {
+						function = "pcmcia_vs1";
+						pins = "gpio24";
+					};
+
+					pinctrl_pcmcia_vs2: pcmcia_vs2 {
+						function = "pcmcia_vs2";
+						pins = "gpio25";
+					};
+				};
+
+				pinctrl_ebi_cs2: ebi_cs2 {
+					function = "ebi_cs2";
+					pins = "gpio26";
+				};
+
+				pinctrl_ebi_cs3: ebi_cs3 {
+					function = "ebi_cs3";
+					pins = "gpio27";
+				};
+
+				pinctrl_spi_cs2: spi_cs2 {
+					function = "spi_cs2";
+					pins = "gpio28";
+				};
+
+				pinctrl_spi_cs3: spi_cs3 {
+					function = "spi_cs3";
+					pins = "gpio29";
+				};
+
+				pinctrl_spi_cs4: spi_cs4 {
+					function = "spi_cs4";
+					pins = "gpio30";
+				};
+
+				pinctrl_spi_cs5: spi_cs5 {
+					function = "spi_cs5";
+					pins = "gpio31";
+				};
+
+				pinctrl_uart1: uart1 {
+					function = "uart1";
+					group = "uart1_grp";
+				};
 			};
 		};
 
diff --git a/target/linux/bmips/patches-5.10/041-v5.12-spi-bcm63xx-spi-fix-pm_runtime.patch b/target/linux/bmips/patches-5.10/041-v5.12-spi-bcm63xx-spi-fix-pm_runtime.patch
new file mode 100644
index 0000000000..3fe7a552cd
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/041-v5.12-spi-bcm63xx-spi-fix-pm_runtime.patch
@@ -0,0 +1,45 @@
+From 73ae625da5c36300fccd809738e7c68f49ebce35 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Tue, 23 Feb 2021 16:18:50 +0100
+Subject: [PATCH 1/2] spi: bcm63xx-spi: fix pm_runtime
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The driver sets auto_runtime_pm to true, but it doesn't call
+pm_runtime_enable(), which results in "Failed to power device" when PM support
+is enabled.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Link: https://lore.kernel.org/r/20210223151851.4110-2-noltari@gmail.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/spi/spi-bcm63xx.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/spi/spi-bcm63xx.c
++++ b/drivers/spi/spi-bcm63xx.c
+@@ -593,11 +593,13 @@ static int bcm63xx_spi_probe(struct plat
+ 
+ 	bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
+ 
++	pm_runtime_enable(&pdev->dev);
++
+ 	/* register and we are done */
+ 	ret = devm_spi_register_master(dev, master);
+ 	if (ret) {
+ 		dev_err(dev, "spi register failed\n");
+-		goto out_clk_disable;
++		goto out_pm_disable;
+ 	}
+ 
+ 	dev_info(dev, "at %pr (irq %d, FIFOs size %d)\n",
+@@ -605,6 +607,8 @@ static int bcm63xx_spi_probe(struct plat
+ 
+ 	return 0;
+ 
++out_pm_disable:
++	pm_runtime_disable(&pdev->dev);
+ out_clk_disable:
+ 	clk_disable_unprepare(clk);
+ out_err:
diff --git a/target/linux/bmips/patches-5.10/042-v5.12-spi-bcm63xx-hsspi-fix-pm_runtime.patch b/target/linux/bmips/patches-5.10/042-v5.12-spi-bcm63xx-hsspi-fix-pm_runtime.patch
new file mode 100644
index 0000000000..47c75659b9
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/042-v5.12-spi-bcm63xx-hsspi-fix-pm_runtime.patch
@@ -0,0 +1,48 @@
+From 216e8e80057a9f0b6366327881acf88eaf9f1fd4 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Tue, 23 Feb 2021 16:18:51 +0100
+Subject: [PATCH 2/2] spi: bcm63xx-hsspi: fix pm_runtime
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The driver sets auto_runtime_pm to true, but it doesn't call
+pm_runtime_enable(), which results in "Failed to power device" when PM support
+is enabled.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Link: https://lore.kernel.org/r/20210223151851.4110-3-noltari@gmail.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/spi/spi-bcm63xx-hsspi.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/spi/spi-bcm63xx-hsspi.c
++++ b/drivers/spi/spi-bcm63xx-hsspi.c
+@@ -21,6 +21,7 @@
+ #include <linux/mutex.h>
+ #include <linux/of.h>
+ #include <linux/reset.h>
++#include <linux/pm_runtime.h>
+ 
+ #define HSSPI_GLOBAL_CTRL_REG			0x0
+ #define GLOBAL_CTRL_CS_POLARITY_SHIFT		0
+@@ -439,13 +440,17 @@ static int bcm63xx_hsspi_probe(struct pl
+ 	if (ret)
+ 		goto out_put_master;
+ 
++	pm_runtime_enable(&pdev->dev);
++
+ 	/* register and we are done */
+ 	ret = devm_spi_register_master(dev, master);
+ 	if (ret)
+-		goto out_put_master;
++		goto out_pm_disable;
+ 
+ 	return 0;
+ 
++out_pm_disable:
++	pm_runtime_disable(&pdev->dev);
+ out_put_master:
+ 	spi_master_put(master);
+ out_disable_pll_clk:
diff --git a/target/linux/bmips/patches-5.10/110-mips-bmips-add-BCM63268-timer-clock-definitions.patch b/target/linux/bmips/patches-5.10/110-mips-bmips-add-BCM63268-timer-clock-definitions.patch
new file mode 100644
index 0000000000..0df7db9717
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/110-mips-bmips-add-BCM63268-timer-clock-definitions.patch
@@ -0,0 +1,35 @@
+From 5a079515cb3066aeb658634301a98871b47c2af4 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Thu, 25 Feb 2021 19:44:22 +0100
+Subject: [PATCH 1/4] mips: bmips: add BCM63268 timer clock definitions
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add missing timer clock definitions for BCM63268.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ include/dt-bindings/clock/bcm63268-clock.h | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/include/dt-bindings/clock/bcm63268-clock.h
++++ b/include/dt-bindings/clock/bcm63268-clock.h
+@@ -27,4 +27,17 @@
+ #define BCM63268_CLK_TBUS	27
+ #define BCM63268_CLK_ROBOSW250	31
+ 
++#define BCM63268_TCLK_EPHY1		0
++#define BCM63268_TCLK_EPHY2		1
++#define BCM63268_TCLK_EPHY3		2
++#define BCM63268_TCLK_GPHY1		3
++#define BCM63268_TCLK_DSL		4
++#define BCM63268_TCLK_WAKEON_EPHY	6
++#define BCM63268_TCLK_WAKEON_DSL	7
++#define BCM63268_TCLK_FAP1		11
++#define BCM63268_TCLK_FAP2		15
++#define BCM63268_TCLK_UTO_50		16
++#define BCM63268_TCLK_UTO_EXTIN		17
++#define BCM63268_TCLK_USB_REF		18
++
+ #endif /* __DT_BINDINGS_CLOCK_BCM63268_H */
diff --git a/target/linux/bmips/patches-5.10/111-mips-bmips-add-BCM63268-timer-reset-definitions.patch b/target/linux/bmips/patches-5.10/111-mips-bmips-add-BCM63268-timer-reset-definitions.patch
new file mode 100644
index 0000000000..7b694d3289
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/111-mips-bmips-add-BCM63268-timer-reset-definitions.patch
@@ -0,0 +1,26 @@
+From 3327df17635dd9d24a855ac6b7247fac381514cf Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Thu, 25 Feb 2021 19:45:04 +0100
+Subject: [PATCH 2/4] mips: bmips: add BCM63268 timer reset definitions
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add missing timer reset definitions for BCM63268.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ include/dt-bindings/reset/bcm63268-reset.h | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/include/dt-bindings/reset/bcm63268-reset.h
++++ b/include/dt-bindings/reset/bcm63268-reset.h
+@@ -23,4 +23,8 @@
+ #define BCM63268_RST_PCIE_HARD	17
+ #define BCM63268_RST_GPHY	18
+ 
++#define BCM63268_TRST_SW	29
++#define BCM63268_TRST_HW	30
++#define BCM63268_TRST_POR	31
++
+ #endif /* __DT_BINDINGS_RESET_BCM63268_H */
diff --git a/target/linux/bmips/patches-5.10/112-dt-bindings-clock-Add-BCM63268-timer-binding.patch b/target/linux/bmips/patches-5.10/112-dt-bindings-clock-Add-BCM63268-timer-binding.patch
new file mode 100644
index 0000000000..945bdfc3d0
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/112-dt-bindings-clock-Add-BCM63268-timer-binding.patch
@@ -0,0 +1,59 @@
+From c17702bad18a085ae913752b45bcc20c2cea879e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Thu, 25 Feb 2021 19:53:08 +0100
+Subject: [PATCH 3/4] dt-bindings: clock: Add BCM63268 timer binding
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Document the Broadcom BCM63268 Clock and Reset controller.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ .../clock/brcm,bcm63268-timer-clocks.yaml     | 40 +++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml
+@@ -0,0 +1,40 @@
++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/clock/brcm,bcm63268-timer-clocks.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM63268 Timer Clock and Reset Device Tree Bindings
++
++maintainers:
++  - Álvaro Fernández Rojas <noltari@gmail.com>
++
++properties:
++  compatible:
++    const: brcm,bcm63268-timer-clocks
++
++  reg:
++    maxItems: 1
++
++  "#clock-cells":
++    const: 1
++
++  "#reset-cells":
++    const: 1
++
++required:
++  - compatible
++  - reg
++  - "#clock-cells"
++  - "#reset-cells"
++
++additionalProperties: false
++
++examples:
++  - |
++    timer_clk: clock-controller@100000ac {
++      compatible = "brcm,bcm63268-timer-clocks";
++      reg = <0x100000ac 0x4>;
++      #clock-cells = <1>;
++      #reset-cells = <1>;
++    };
diff --git a/target/linux/bmips/patches-5.10/113-clk-bcm-Add-BCM63268-timer-clock-and-reset-driver.patch b/target/linux/bmips/patches-5.10/113-clk-bcm-Add-BCM63268-timer-clock-and-reset-driver.patch
new file mode 100644
index 0000000000..484647a6e1
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/113-clk-bcm-Add-BCM63268-timer-clock-and-reset-driver.patch
@@ -0,0 +1,281 @@
+From 3c8dd9d0937a19f3f20f28ba0b0b64f448d50dd4 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Thu, 25 Feb 2021 19:54:04 +0100
+Subject: [PATCH 4/4] clk: bcm: Add BCM63268 timer clock and reset driver
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add driver for BCM63268 timer clock and reset controller.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ drivers/clk/bcm/Kconfig              |   9 ++
+ drivers/clk/bcm/Makefile             |   1 +
+ drivers/clk/bcm/clk-bcm63268-timer.c | 232 +++++++++++++++++++++++++++
+ 3 files changed, 242 insertions(+)
+ create mode 100644 drivers/clk/bcm/clk-bcm63268-timer.c
+
+--- a/drivers/clk/bcm/Kconfig
++++ b/drivers/clk/bcm/Kconfig
+@@ -37,6 +37,15 @@ config CLK_BCM_63XX_GATE
+ 	  Enable common clock framework support for Broadcom BCM63xx DSL SoCs
+ 	  based on the MIPS architecture
+ 
++config CLK_BCM63268_TIMER
++	bool "Broadcom BCM63268 timer clock and reset support"
++	depends on BMIPS_GENERIC || COMPILE_TEST
++	default BMIPS_GENERIC
++	select RESET_CONTROLLER
++	help
++	  Enable timer clock and reset support for Broadcom BCM63268 DSL SoCs
++	  based on the MIPS architecture.
++
+ config CLK_BCM_KONA
+ 	bool "Broadcom Kona CCU clock support"
+ 	depends on ARCH_BCM_MOBILE || COMPILE_TEST
+--- a/drivers/clk/bcm/Makefile
++++ b/drivers/clk/bcm/Makefile
+@@ -1,6 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ obj-$(CONFIG_CLK_BCM_63XX)	+= clk-bcm63xx.o
+ obj-$(CONFIG_CLK_BCM_63XX_GATE)	+= clk-bcm63xx-gate.o
++obj-$(CONFIG_CLK_BCM63268_TIMER) += clk-bcm63268-timer.o
+ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona.o
+ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
+ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
+--- /dev/null
++++ b/drivers/clk/bcm/clk-bcm63268-timer.c
+@@ -0,0 +1,232 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * BCM63268 Timer Clock and Reset Controller Driver
++ *
++ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/delay.h>
++#include <linux/init.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/platform_device.h>
++#include <linux/reset-controller.h>
++
++#include <dt-bindings/clock/bcm63268-clock.h>
++
++#define BCM63268_TIMER_RESET_SLEEP_MIN_US	10000
++#define BCM63268_TIMER_RESET_SLEEP_MAX_US	20000
++
++struct bcm63268_tclkrst_hw {
++	void __iomem *regs;
++	spinlock_t lock;
++
++	struct reset_controller_dev rcdev;
++	struct clk_hw_onecell_data data;
++};
++
++struct bcm63268_tclk_table_entry {
++	const char * const name;
++	u8 bit;
++	unsigned long flags;
++};
++
++static const struct bcm63268_tclk_table_entry bcm63268_timer_clocks[] = {
++	{
++		.name = "ephy1",
++		.bit = BCM63268_TCLK_EPHY1,
++	}, {
++		.name = "ephy2",
++		.bit = BCM63268_TCLK_EPHY2,
++	}, {
++		.name = "ephy3",
++		.bit = BCM63268_TCLK_EPHY3,
++	}, {
++		.name = "gphy1",
++		.bit = BCM63268_TCLK_GPHY1,
++	}, {
++		.name = "dsl",
++		.bit = BCM63268_TCLK_DSL,
++	}, {
++		.name = "wakeon_ephy",
++		.bit = BCM63268_TCLK_WAKEON_EPHY,
++	}, {
++		.name = "wakeon_dsl",
++		.bit = BCM63268_TCLK_WAKEON_DSL,
++	}, {
++		.name = "fap1_pll",
++		.bit = BCM63268_TCLK_FAP1,
++	}, {
++		.name = "fap2_pll",
++		.bit = BCM63268_TCLK_FAP2,
++	}, {
++		.name = "uto_50",
++		.bit = BCM63268_TCLK_UTO_50,
++	}, {
++		.name = "uto_extin",
++		.bit = BCM63268_TCLK_UTO_EXTIN,
++	}, {
++		.name = "usb_ref",
++		.bit = BCM63268_TCLK_USB_REF,
++	}, {
++		/* sentinel */
++	}
++};
++
++static inline struct bcm63268_tclkrst_hw *
++to_bcm63268_timer_reset(struct reset_controller_dev *rcdev)
++{
++	return container_of(rcdev, struct bcm63268_tclkrst_hw, rcdev);
++}
++
++static int bcm63268_timer_reset_update(struct reset_controller_dev *rcdev,
++				unsigned long id, bool assert)
++{
++	struct bcm63268_tclkrst_hw *reset = to_bcm63268_timer_reset(rcdev);
++	unsigned long flags;
++	uint32_t val;
++
++	spin_lock_irqsave(&reset->lock, flags);
++	val = __raw_readl(reset->regs);
++	if (assert)
++		val &= ~BIT(id);
++	else
++		val |= BIT(id);
++	__raw_writel(val, reset->regs);
++	spin_unlock_irqrestore(&reset->lock, flags);
++
++	return 0;
++}
++
++static int bcm63268_timer_reset_assert(struct reset_controller_dev *rcdev,
++				unsigned long id)
++{
++	return bcm63268_timer_reset_update(rcdev, id, true);
++}
++
++static int bcm63268_timer_reset_deassert(struct reset_controller_dev *rcdev,
++				  unsigned long id)
++{
++	return bcm63268_timer_reset_update(rcdev, id, false);
++}
++
++static int bcm63268_timer_reset_reset(struct reset_controller_dev *rcdev,
++			       unsigned long id)
++{
++	bcm63268_timer_reset_update(rcdev, id, true);
++	usleep_range(BCM63268_TIMER_RESET_SLEEP_MIN_US,
++		     BCM63268_TIMER_RESET_SLEEP_MAX_US);
++
++	bcm63268_timer_reset_update(rcdev, id, false);
++	/*
++	 * Ensure component is taken out reset state by sleeping also after
++	 * deasserting the reset. Otherwise, the component may not be ready
++	 * for operation.
++	 */
++	usleep_range(BCM63268_TIMER_RESET_SLEEP_MIN_US,
++		     BCM63268_TIMER_RESET_SLEEP_MAX_US);
++
++	return 0;
++}
++
++static int bcm63268_timer_reset_status(struct reset_controller_dev *rcdev,
++				unsigned long id)
++{
++	struct bcm63268_tclkrst_hw *reset = to_bcm63268_timer_reset(rcdev);
++
++	return !(__raw_readl(reset->regs) & BIT(id));
++}
++
++static struct reset_control_ops bcm63268_timer_reset_ops = {
++	.assert = bcm63268_timer_reset_assert,
++	.deassert = bcm63268_timer_reset_deassert,
++	.reset = bcm63268_timer_reset_reset,
++	.status = bcm63268_timer_reset_status,
++};
++
++static int bcm63268_tclk_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	const struct bcm63268_tclk_table_entry *entry, *table;
++	struct bcm63268_tclkrst_hw *hw;
++	u8 maxbit = 0;
++	int i, ret;
++
++	table = of_device_get_match_data(dev);
++	if (!table)
++		return -EINVAL;
++
++	for (entry = table; entry->name; entry++)
++		maxbit = max_t(u8, maxbit, entry->bit);
++	maxbit++;
++
++	hw = devm_kzalloc(&pdev->dev, struct_size(hw, data.hws, maxbit),
++			  GFP_KERNEL);
++	if (!hw)
++		return -ENOMEM;
++
++	platform_set_drvdata(pdev, hw);
++
++	spin_lock_init(&hw->lock);
++
++	hw->data.num = maxbit;
++	for (i = 0; i < maxbit; i++)
++		hw->data.hws[i] = ERR_PTR(-ENODEV);
++
++	hw->regs = devm_platform_ioremap_resource(pdev, 0);
++	if (IS_ERR(hw->regs))
++		return PTR_ERR(hw->regs);
++
++	for (entry = table; entry->name; entry++) {
++		struct clk_hw *clk;
++
++		clk = clk_hw_register_gate(dev, entry->name, NULL,
++					   entry->flags, hw->regs, entry->bit,
++					   CLK_GATE_BIG_ENDIAN, &hw->lock);
++		if (IS_ERR(clk)) {
++			ret = PTR_ERR(clk);
++			goto out_err;
++		}
++
++		hw->data.hws[entry->bit] = clk;
++	}
++
++	ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
++				     &hw->data);
++	if (!ret)
++		return 0;
++
++	hw->rcdev.of_node = dev->of_node;
++	hw->rcdev.ops = &bcm63268_timer_reset_ops;
++
++	ret = devm_reset_controller_register(dev, &hw->rcdev);
++	if (ret)
++		dev_err(dev, "Failed to register reset controller\n");
++
++out_err:
++	for (i = 0; i < hw->data.num; i++) {
++		if (!IS_ERR(hw->data.hws[i]))
++			clk_hw_unregister_gate(hw->data.hws[i]);
++	}
++
++	return ret;
++}
++
++static const struct of_device_id bcm63268_tclk_dt_ids[] = {
++	{
++		.compatible = "brcm,bcm63268-timer-clocks",
++		.data = &bcm63268_timer_clocks,
++	}, {
++		/* sentinel */
++	}
++};
++
++static struct platform_driver bcm63268_tclk = {
++	.probe = bcm63268_tclk_probe,
++	.driver = {
++		.name = "bcm63268-timer-clock",
++		.of_match_table = bcm63268_tclk_dt_ids,
++	},
++};
++builtin_platform_driver(bcm63268_tclk);
diff --git a/target/linux/bmips/patches-5.10/205-spi-bcm63xx-spi-disable-auto_runtime_pm.patch b/target/linux/bmips/patches-5.10/205-spi-bcm63xx-spi-disable-auto_runtime_pm.patch
deleted file mode 100644
index 43e1ce5221..0000000000
--- a/target/linux/bmips/patches-5.10/205-spi-bcm63xx-spi-disable-auto_runtime_pm.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/drivers/spi/spi-bcm63xx.c
-+++ b/drivers/spi/spi-bcm63xx.c
-@@ -574,7 +574,6 @@ static int bcm63xx_spi_probe(struct plat
- 	master->bits_per_word_mask = SPI_BPW_MASK(8);
- 	master->max_transfer_size = bcm63xx_spi_max_length;
- 	master->max_message_size = bcm63xx_spi_max_length;
--	master->auto_runtime_pm = true;
- 	bs->msg_type_shift = bs->reg_offsets[SPI_MSG_TYPE_SHIFT];
- 	bs->msg_ctl_width = bs->reg_offsets[SPI_MSG_CTL_WIDTH];
- 	bs->tx_io = (u8 *)(bs->regs + bs->reg_offsets[SPI_MSG_DATA]);
diff --git a/target/linux/bmips/patches-5.10/206-spi-bcm63xx-hsspi-disable-auto_runtime_pm.patch b/target/linux/bmips/patches-5.10/206-spi-bcm63xx-hsspi-disable-auto_runtime_pm.patch
deleted file mode 100644
index a78c864ee0..0000000000
--- a/target/linux/bmips/patches-5.10/206-spi-bcm63xx-hsspi-disable-auto_runtime_pm.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/drivers/spi/spi-bcm63xx-hsspi.c
-+++ b/drivers/spi/spi-bcm63xx-hsspi.c
-@@ -417,7 +417,6 @@ static int bcm63xx_hsspi_probe(struct pl
- 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
- 			    SPI_RX_DUAL | SPI_TX_DUAL;
- 	master->bits_per_word_mask = SPI_BPW_MASK(8);
--	master->auto_runtime_pm = true;
- 
- 	platform_set_drvdata(pdev, master);
- 
diff --git a/target/linux/bmips/patches-5.10/400-Documentation-add-BCM6328-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/400-Documentation-add-BCM6328-pincontroller-binding-docu.patch
new file mode 100644
index 0000000000..4ad97ad1e0
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/400-Documentation-add-BCM6328-pincontroller-binding-docu.patch
@@ -0,0 +1,182 @@
+From 3b6d70e7bae0dbba02435c53f878a042d6d4bd4d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 27 Jul 2016 11:33:56 +0200
+Subject: [PATCH 01/12] Documentation: add BCM6328 pincontroller binding
+ documentation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding documentation for the pincontrol core found in BCM6328 SoCs.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../pinctrl/brcm,bcm6328-pinctrl.yaml         | 161 ++++++++++++++++++
+ 1 file changed, 161 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml
+@@ -0,0 +1,161 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6328-pinctrl.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM6328 pin controller
++
++maintainers:
++  - Álvaro Fernández Rojas <noltari@gmail.com>
++  - Jonas Gorski <jonas.gorski@gmail.com>
++
++description: |+
++  The pin controller node should be the child of a syscon node.
++
++  Refer to the the bindings described in
++  Documentation/devicetree/bindings/mfd/syscon.yaml
++
++properties:
++  compatible:
++    const: brcm,bcm6328-pinctrl
++
++  gpio-controller: true
++
++  '#gpio-cells':
++    description:
++      Specifies the pin number and flags, as defined in
++      include/dt-bindings/gpio/gpio.h
++    const: 2
++
++  interrupts-extended:
++    description:
++      One interrupt per each of the 4 GPIO ports supported by the controller,
++      sorted by port number ascending order.
++    minItems: 4
++    maxItems: 4
++
++patternProperties:
++  '^.*$':
++    if:
++      type: object
++    then:
++      properties:
++        function:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ serial_led_data, serial_led_clk, inet_act_led, pcie_clkreq,
++                  led, ephy0_act_led, ephy1_act_led, ephy2_act_led,
++                  ephy3_act_led, hsspi_cs1, usb_device_port, usb_host_port ]
++
++        pins:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ gpio6, gpio7, gpio11, gpio16, gpio17, gpio18, gpio19,
++                  gpio20, gpio25, gpio26, gpio27, gpio28, hsspi_cs1,
++                  usb_port1 ]
++
++required:
++  - compatible
++  - gpio-controller
++  - '#gpio-cells'
++
++additionalProperties: false
++
++examples:
++  - |
++    gpio@10000080 {
++      compatible = "syscon", "simple-mfd";
++      reg = <0x10000080 0x80>;
++
++      pinctrl: pinctrl {
++        compatible = "brcm,bcm6328-pinctrl";
++
++        gpio-controller;
++        #gpio-cells = <2>;
++
++        interrupts-extended = <&ext_intc 3 0>,
++                              <&ext_intc 2 0>,
++                              <&ext_intc 1 0>,
++                              <&ext_intc 0 0>;
++        interrupt-names = "gpio12",
++                          "gpio15",
++                          "gpio23",
++                          "gpio24";
++
++        pinctrl_serial_led: serial_led {
++          pinctrl_serial_led_data: serial_led_data {
++            function = "serial_led_data";
++            pins = "gpio6";
++          };
++
++          pinctrl_serial_led_clk: serial_led_clk {
++            function = "serial_led_clk";
++            pins = "gpio7";
++          };
++        };
++
++        pinctrl_inet_act_led: inet_act_led {
++          function = "inet_act_led";
++          pins = "gpio11";
++        };
++
++        pinctrl_pcie_clkreq: pcie_clkreq {
++          function = "pcie_clkreq";
++          pins = "gpio16";
++        };
++
++        pinctrl_ephy0_spd_led: ephy0_spd_led {
++          function = "led";
++          pins = "gpio17";
++        };
++
++        pinctrl_ephy1_spd_led: ephy1_spd_led {
++          function = "led";
++          pins = "gpio18";
++        };
++
++        pinctrl_ephy2_spd_led: ephy2_spd_led {
++          function = "led";
++          pins = "gpio19";
++        };
++
++        pinctrl_ephy3_spd_led: ephy3_spd_led {
++          function = "led";
++          pins = "gpio20";
++        };
++
++        pinctrl_ephy0_act_led: ephy0_act_led {
++          function = "ephy0_act_led";
++          pins = "gpio25";
++        };
++
++        pinctrl_ephy1_act_led: ephy1_act_led {
++          function = "ephy1_act_led";
++          pins = "gpio26";
++        };
++
++        pinctrl_ephy2_act_led: ephy2_act_led {
++          function = "ephy2_act_led";
++          pins = "gpio27";
++        };
++
++        pinctrl_ephy3_act_led: ephy3_act_led {
++          function = "ephy3_act_led";
++          pins = "gpio28";
++        };
++
++        pinctrl_hsspi_cs1: hsspi_cs1 {
++          function = "hsspi_cs1";
++          pins = "hsspi_cs1";
++        };
++
++        pinctrl_usb_port1_device: usb_port1_device {
++          function = "usb_device_port";
++          pins = "usb_port1";
++        };
++
++        pinctrl_usb_port1_host: usb_port1_host {
++          function = "usb_host_port";
++          pins = "usb_port1";
++        };
++      };
++    };
diff --git a/target/linux/bmips/patches-5.10/400-pinctrl-add-bcm63xx-base-code.patch b/target/linux/bmips/patches-5.10/400-pinctrl-add-bcm63xx-base-code.patch
deleted file mode 100644
index 0f42bd2f83..0000000000
--- a/target/linux/bmips/patches-5.10/400-pinctrl-add-bcm63xx-base-code.patch
+++ /dev/null
@@ -1,226 +0,0 @@
-From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:07:42 +0200
-Subject: [PATCH 01/13] pinctrl: add bcm63xx base code
-
-Setup directory and add a helper for bcm63xx pinctrl support.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/Kconfig                   |   1 +
- drivers/pinctrl/Makefile                  |   1 +
- drivers/pinctrl/bcm63xx/Kconfig           |   3 +
- drivers/pinctrl/bcm63xx/Makefile          |   1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h |  14 +++
- 7 files changed, 163 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/Kconfig
- create mode 100644 drivers/pinctrl/bcm63xx/Makefile
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -377,6 +377,7 @@ config PINCTRL_OCELOT
- source "drivers/pinctrl/actions/Kconfig"
- source "drivers/pinctrl/aspeed/Kconfig"
- source "drivers/pinctrl/bcm/Kconfig"
-+source "drivers/pinctrl/bcm63xx/Kconfig"
- source "drivers/pinctrl/berlin/Kconfig"
- source "drivers/pinctrl/freescale/Kconfig"
- source "drivers/pinctrl/intel/Kconfig"
---- a/drivers/pinctrl/Makefile
-+++ b/drivers/pinctrl/Makefile
-@@ -51,6 +51,7 @@ obj-$(CONFIG_PINCTRL_EQUILIBRIUM)   += p
- obj-y				+= actions/
- obj-$(CONFIG_ARCH_ASPEED)	+= aspeed/
- obj-y				+= bcm/
-+obj-y				+= bcm63xx/
- obj-$(CONFIG_PINCTRL_BERLIN)	+= berlin/
- obj-y				+= freescale/
- obj-$(CONFIG_X86)		+= intel/
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -0,0 +1,3 @@
-+config PINCTRL_BCM63XX
-+	bool
-+	select GPIO_GENERIC
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -0,0 +1 @@
-+obj-$(CONFIG_PINCTRL_BCM63XX)	+= pinctrl-bcm63xx.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
-@@ -0,0 +1,155 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/device.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/of_irq.h>
-+
-+#include "pinctrl-bcm63xx.h"
-+#include "../core.h"
-+
-+#define BANK_SIZE	sizeof(u32)
-+#define PINS_PER_BANK	(BANK_SIZE * BITS_PER_BYTE)
-+
-+#ifdef CONFIG_OF
-+static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc,
-+				 const struct of_phandle_args *gpiospec,
-+				 u32 *flags)
-+{
-+	struct gpio_chip *base = gpiochip_get_data(gc);
-+	int pin = gpiospec->args[0];
-+
-+	if (gc != &base[pin / PINS_PER_BANK])
-+		return -EINVAL;
-+
-+	pin = pin % PINS_PER_BANK;
-+
-+	if (pin >= gc->ngpio)
-+		return -EINVAL;
-+
-+	if (flags)
-+		*flags = gpiospec->args[1];
-+
-+	return pin;
-+}
-+#endif
-+
-+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
-+{
-+	struct gpio_chip *base = gpiochip_get_data(chip);
-+	char irq_name[7]; /* "gpioXX" */
-+
-+	/* FIXME: this is ugly */
-+	sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base));
-+	return of_irq_get_byname(chip->of_node, irq_name);
-+}
-+
-+static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc,
-+			      void __iomem *dirout, void __iomem *data,
-+			      size_t sz, int ngpio)
-+
-+{
-+	int banks, chips, i, ret = -EINVAL;
-+
-+	chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+	banks = sz / BANK_SIZE;
-+
-+	for (i = 0; i < chips; i++) {
-+		int offset, pins;
-+		int reg_offset;
-+		char *label;
-+
-+		label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i);
-+		if (!label)
-+			return -ENOMEM;
-+
-+		offset = i * PINS_PER_BANK;
-+		pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+		/* the registers are treated like a huge big endian register */
-+		reg_offset = (banks - i - 1) * BANK_SIZE;
-+
-+		ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset,
-+				 NULL, NULL, dirout + reg_offset, NULL,
-+				 BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-+		if (ret)
-+			return ret;
-+
-+		gc[i].request = gpiochip_generic_request;
-+		gc[i].free = gpiochip_generic_free;
-+
-+		if (of_get_property(dev->of_node, "interrupt-names", NULL))
-+			gc[i].to_irq = bcm63xx_gpio_to_irq;
-+
-+#ifdef CONFIG_OF
-+		gc[i].of_gpio_n_cells = 2;
-+		gc[i].of_xlate = bcm63xx_gpio_of_xlate;
-+#endif
-+
-+		gc[i].label = label;
-+		gc[i].ngpio = pins;
-+
-+		devm_gpiochip_add_data(dev, &gc[i], gc);
-+	}
-+
-+	return 0;
-+}
-+
-+static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name,
-+				    int ngpio)
-+{
-+	int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+
-+	for (i = 0; i < chips; i++) {
-+		int offset, pins;
-+
-+		offset = i * PINS_PER_BANK;
-+		pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+		gpiochip_add_pin_range(&gc[i], name, 0, offset, pins);
-+	}
-+}
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+					     struct pinctrl_desc *desc,
-+					     void *priv, struct gpio_chip *gc,
-+					     int ngpio)
-+{
-+	struct pinctrl_dev *pctldev;
-+	struct resource *res;
-+	void __iomem *dirout, *data;
-+	size_t sz;
-+	int ret;
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout");
-+	dirout = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(dirout))
-+		return ERR_CAST(dirout);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
-+	data = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(data))
-+		return ERR_CAST(data);
-+
-+	sz = resource_size(res);
-+
-+	ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio);
-+	if (ret)
-+		return ERR_PTR(ret);
-+
-+	pctldev = devm_pinctrl_register(&pdev->dev, desc, priv);
-+	if (IS_ERR(pctldev))
-+		return pctldev;
-+
-+	bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio);
-+
-+	dev_info(&pdev->dev, "registered at mmio %p\n", dirout);
-+
-+	return pctldev;
-+}
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-@@ -0,0 +1,14 @@
-+#ifndef __PINCTRL_BCM63XX
-+#define __PINCTRL_BCM63XX
-+
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/pinctrl/pinctrl.h>
-+#include <linux/platform_device.h>
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+					     struct pinctrl_desc *desc,
-+					     void *priv, struct gpio_chip *gc,
-+					     int ngpio);
-+
-+#endif
diff --git a/target/linux/bmips/patches-5.10/401-Documentation-add-BCM6328-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/401-Documentation-add-BCM6328-pincontroller-binding-docu.patch
deleted file mode 100644
index 3a2a7811db..0000000000
--- a/target/linux/bmips/patches-5.10/401-Documentation-add-BCM6328-pincontroller-binding-docu.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:33:56 +0200
-Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6328 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt      | 61 ++++++++++++++++++++++
- 1 file changed, 61 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-@@ -0,0 +1,61 @@
-+* Broadcom BCM6328 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6328-pinctrl".
-+- reg: Register specifies of dirout, dat, mode, mux registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+	compatible = "brcm,bcm6328-pinctrl";
-+	reg = <0x10000080 0x8>,
-+	      <0x10000088 0x8>,
-+	      <0x10000098 0x4>,
-+	      <0x1000009c 0xc>;
-+	reg-names = "dirout", "dat", "mode", "mux";
-+
-+	gpio-controller;
-+	#gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name		pins	functions
-+-----------------------------------------------------------
-+gpio0		0	led
-+gpio1		1	led
-+gpio2		2	led
-+gpio3		3	led
-+gpio4		4	led
-+gpio5		5	led
-+gpio6		6	led, serial_led_data
-+gpio7		7	led, serial_led_clk
-+gpio8		8	led
-+gpio9		9	led
-+gpio10		10	led
-+gpio11		11	led
-+gpio12		12	led
-+gpio13		13	led
-+gpio14		14	led
-+gpio15		15	led
-+gpio16		16	led, pcie_clkreq
-+gpio17		17	led
-+gpio18		18	led
-+gpio19		19	led
-+gpio20		20	led
-+gpio21		21	led
-+gpio22		22	led
-+gpio23		23	led
-+gpio24		24	-
-+gpio25		25	ephy0_act_led
-+gpio26		26	ephy1_act_led
-+gpio27		27	ephy2_act_led
-+gpio28		28	ephy3_act_led
-+gpio29		29	-
-+gpio30		30	-
-+gpio31		31	-
-+hsspi_cs1	-	hsspi_cs1
-+usb_port1	-	usb_host_port, usb_device_port
diff --git a/target/linux/bmips/patches-5.10/402-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch b/target/linux/bmips/patches-5.10/401-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch
similarity index 51%
rename from target/linux/bmips/patches-5.10/402-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch
rename to target/linux/bmips/patches-5.10/401-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch
index b4043bdc1c..0e223f2fca 100644
--- a/target/linux/bmips/patches-5.10/402-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch
+++ b/target/linux/bmips/patches-5.10/401-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch
@@ -1,58 +1,75 @@
-From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
+From 3373a507212e6394921781766e9cd0dc155c62ba Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Fri, 24 Jun 2016 22:12:50 +0200
-Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328
+Subject: [PATCH 02/12] pinctrl: add a pincontrol driver for BCM6328
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
 
 Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
 GPIOs, as LEDs for the integrated LED controller, or various other
 functions. Its pincontrol mux registers also control other aspects, like
 switching the second USB port between host and device mode.
 
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 ---
- drivers/pinctrl/bcm63xx/Kconfig           |   7 +
- drivers/pinctrl/bcm63xx/Makefile          |   1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++
- 3 files changed, 464 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
+ drivers/pinctrl/bcm/Kconfig           |  11 +
+ drivers/pinctrl/bcm/Makefile          |   1 +
+ drivers/pinctrl/bcm/pinctrl-bcm6328.c | 581 ++++++++++++++++++++++++++
+ 3 files changed, 593 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6328.c
 
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -1,3 +1,10 @@
- config PINCTRL_BCM63XX
- 	bool
- 	select GPIO_GENERIC
-+
+--- a/drivers/pinctrl/bcm/Kconfig
++++ b/drivers/pinctrl/bcm/Kconfig
+@@ -29,6 +29,17 @@ config PINCTRL_BCM2835
+ 	help
+ 	   Say Y here to enable the Broadcom BCM2835 GPIO driver.
+ 
 +config PINCTRL_BCM6328
-+	bool "BCM6328 pincontrol driver"
++	bool "Broadcom BCM6328 GPIO driver"
++	depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
 +	select PINMUX
 +	select PINCONF
-+	select PINCTRL_BCM63XX
 +	select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_PINCTRL_BCM63XX)	+= pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6328)	+= pinctrl-bcm6328.o
++	select MFD_SYSCON
++	default BMIPS_GENERIC
++	help
++	   Say Y here to enable the Broadcom BCM6328 GPIO driver.
++
+ config PINCTRL_IPROC_GPIO
+ 	bool "Broadcom iProc GPIO (with PINCONF) driver"
+ 	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
+--- a/drivers/pinctrl/bcm/Makefile
++++ b/drivers/pinctrl/bcm/Makefile
+@@ -3,6 +3,7 @@
+ 
+ obj-$(CONFIG_PINCTRL_BCM281XX)		+= pinctrl-bcm281xx.o
+ obj-$(CONFIG_PINCTRL_BCM2835)		+= pinctrl-bcm2835.o
++obj-$(CONFIG_PINCTRL_BCM6328)		+= pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_IPROC_GPIO)	+= pinctrl-iproc-gpio.o
+ obj-$(CONFIG_PINCTRL_CYGNUS_MUX)	+= pinctrl-cygnus-mux.o
+ obj-$(CONFIG_PINCTRL_NS)		+= pinctrl-ns.o
 --- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
-@@ -0,0 +1,456 @@
++++ b/drivers/pinctrl/bcm/pinctrl-bcm6328.c
+@@ -0,0 +1,581 @@
++// SPDX-License-Identifier: GPL-2.0+
 +/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
++ * Driver for BCM6328 GPIO unit (pinctrl + GPIO)
 + *
++ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
 + */
 +
 +#include <linux/bitops.h>
 +#include <linux/gpio.h>
 +#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
++#include <linux/mfd/syscon.h>
 +#include <linux/of.h>
 +#include <linux/of_gpio.h>
++#include <linux/of_irq.h>
 +#include <linux/platform_device.h>
++#include <linux/regmap.h>
 +
 +#include <linux/pinctrl/machine.h>
 +#include <linux/pinctrl/pinconf.h>
@@ -62,13 +79,18 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +#include "../core.h"
 +#include "../pinctrl-utils.h"
 +
-+#include "pinctrl-bcm63xx.h"
++#define MODULE_NAME		"bcm6328-pinctrl"
++#define BCM6328_NUM_GPIOS	32
 +
-+#define BCM6328_MUX_LO_REG	0x4
-+#define BCM6328_MUX_HI_REG	0x0
-+#define BCM6328_MUX_OTHER_REG	0x8
++#define BANK_SIZE		sizeof(uint32_t)
++#define PINS_PER_BANK		(BANK_SIZE * BITS_PER_BYTE)
 +
-+#define BCM6328_NGPIO		32
++#define BCM6328_DIROUT_REG	0x04
++#define BCM6328_DATA_REG	0x0c
++#define BCM6328_MODE_REG	0x18
++#define BCM6328_MUX_HI_REG	0x1c
++#define BCM6328_MUX_LO_REG	0x20
++#define BCM6328_MUX_OTHER_REG	0x24
 +
 +struct bcm6328_pingroup {
 +	const char *name;
@@ -86,16 +108,13 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +};
 +
 +struct bcm6328_pinctrl {
-+	struct pinctrl_dev *pctldev;
-+	struct pinctrl_desc desc;
++	struct device *dev;
++	struct regmap *regs;
 +
-+	void __iomem *mode;
-+	void __iomem *mux[3];
-+
-+	/* register access lock */
-+	spinlock_t lock;
-+
-+	struct gpio_chip gpio;
++	struct pinctrl_dev *pctl_dev;
++	struct gpio_chip gpio_chip;
++	struct pinctrl_desc pctl_desc;
++	struct pinctrl_gpio_range gpio_range;
 +};
 +
 +static const struct pinctrl_pin_desc bcm6328_pins[] = {
@@ -325,6 +344,119 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	BCM6328_MUX_FUN(usb_device_port, 2),
 +};
 +
++static inline unsigned int bcm6328_bank_pin(unsigned int pin)
++{
++	return pin % PINS_PER_BANK;
++}
++
++static inline unsigned int bcm6318_mux_off(unsigned int pin)
++{
++	static const unsigned int bcm6328_mux[] = {
++		BCM6328_MUX_LO_REG,
++		BCM6328_MUX_HI_REG,
++		BCM6328_MUX_OTHER_REG
++	};
++
++	return bcm6328_mux[pin / 16];
++}
++
++static inline unsigned int bcm6328_reg_off(unsigned int reg, unsigned int pin)
++{
++	return reg - (pin / PINS_PER_BANK) * BANK_SIZE;
++}
++
++static int bcm6328_gpio_direction_input(struct gpio_chip *chip,
++					unsigned int pin)
++{
++	struct bcm6328_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6328_reg_off(BCM6328_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6328_bank_pin(pin);
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an input GPIO
++	 */
++	ret = pinctrl_gpio_direction_input(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), 0);
++
++	return 0;
++}
++
++static int bcm6328_gpio_direction_output(struct gpio_chip *chip,
++					 unsigned int pin, int value)
++{
++	struct bcm6328_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6328_reg_off(BCM6328_DATA_REG, pin);
++	unsigned int dirout = bcm6328_reg_off(BCM6328_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6328_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an output GPIO
++	 */
++	ret = pinctrl_gpio_direction_output(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), BIT(bank_pin));
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++
++	return 0;
++}
++
++static int bcm6328_gpio_get(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6328_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6328_reg_off(BCM6328_DATA_REG, pin);
++	unsigned int bank_pin = bcm6328_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, data, &val);
++
++	return !!(val & BIT(bank_pin));
++}
++
++static int bcm6328_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6328_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6328_reg_off(BCM6328_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6328_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, dirout, &val);
++
++	if (val & BIT(bank_pin))
++		return GPIO_LINE_DIRECTION_OUT;
++
++	return GPIO_LINE_DIRECTION_IN;
++}
++
++static void bcm6328_gpio_set(struct gpio_chip *chip, unsigned int pin,
++			     int value)
++{
++	struct bcm6328_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6328_reg_off(BCM6328_DATA_REG, pin);
++	unsigned int bank_pin = bcm6328_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++}
++
++static int bcm6328_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++	char irq_name[7];
++
++	sprintf(irq_name, "gpio%d", gpio);
++
++	return of_irq_get_byname(chip->of_node, irq_name);
++}
++
 +static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 +{
 +	return ARRAY_SIZE(bcm6328_groups);
@@ -368,37 +500,26 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	return 0;
 +}
 +
-+static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
-+			    u32 mode, u32 mux)
++static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pc, unsigned pin,
++			    unsigned int mode, unsigned int mux)
 +{
-+	unsigned long flags;
-+	u32 reg;
++	if (pin < BCM6328_NUM_GPIOS)
++		regmap_update_bits(pc->regs, BCM6328_MODE_REG, BIT(pin),
++				   mode ? BIT(pin) : 0);
 +
-+	spin_lock_irqsave(&pctl->lock, flags);
-+	if (pin < 32) {
-+		reg = __raw_readl(pctl->mode);
-+		reg &= ~BIT(pin);
-+		if (mode)
-+			reg |= BIT(pin);
-+		__raw_writel(reg, pctl->mode);
-+	}
-+
-+	reg = __raw_readl(pctl->mux[pin / 16]);
-+	reg &= ~(3UL << ((pin % 16) * 2));
-+	reg |= mux << ((pin % 16) * 2);
-+	__raw_writel(reg, pctl->mux[pin / 16]);
-+
-+	spin_unlock_irqrestore(&pctl->lock, flags);
++	regmap_update_bits(pc->regs, bcm6318_mux_off(pin),
++			   3UL << ((pin % 16) * 2),
++			   mux << ((pin % 16) * 2));
 +}
 +
 +static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 +				   unsigned selector, unsigned group)
 +{
-+	struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
++	struct bcm6328_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++	const struct bcm6328_pingroup *pg = &bcm6328_groups[group];
 +	const struct bcm6328_function *f = &bcm6328_funcs[selector];
 +
-+	bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
++	bcm6328_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val);
 +
 +	return 0;
 +}
@@ -407,74 +528,94 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +				       struct pinctrl_gpio_range *range,
 +				       unsigned offset)
 +{
-+	struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++	struct bcm6328_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 +
 +	/* disable all functions using this pin */
-+	bcm6328_rmw_mux(pctl, offset, 0, 0);
++	bcm6328_rmw_mux(pc, offset, 0, 0);
 +
 +	return 0;
 +}
 +
 +static struct pinctrl_ops bcm6328_pctl_ops = {
-+	.get_groups_count	= bcm6328_pinctrl_get_group_count,
-+	.get_group_name		= bcm6328_pinctrl_get_group_name,
-+	.get_group_pins		= bcm6328_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
-+	.dt_free_map		= pinctrl_utils_free_map,
-+#endif
++	.get_groups_count = bcm6328_pinctrl_get_group_count,
++	.get_group_name = bcm6328_pinctrl_get_group_name,
++	.get_group_pins = bcm6328_pinctrl_get_group_pins,
++	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++	.dt_free_map = pinctrl_utils_free_map,
 +};
 +
 +static struct pinmux_ops bcm6328_pmx_ops = {
-+	.get_functions_count	= bcm6328_pinctrl_get_func_count,
-+	.get_function_name	= bcm6328_pinctrl_get_func_name,
-+	.get_function_groups	= bcm6328_pinctrl_get_groups,
-+	.set_mux		= bcm6328_pinctrl_set_mux,
-+	.gpio_request_enable	= bcm6328_gpio_request_enable,
-+	.strict			= true,
++	.get_functions_count = bcm6328_pinctrl_get_func_count,
++	.get_function_name = bcm6328_pinctrl_get_func_name,
++	.get_function_groups = bcm6328_pinctrl_get_groups,
++	.set_mux = bcm6328_pinctrl_set_mux,
++	.gpio_request_enable = bcm6328_gpio_request_enable,
++	.strict = true,
 +};
 +
 +static int bcm6328_pinctrl_probe(struct platform_device *pdev)
 +{
-+	struct bcm6328_pinctrl *pctl;
-+	struct resource *res;
-+	void __iomem *mode, *mux;
++	struct device *dev = &pdev->dev;
++	struct device_node *np = dev->of_node;
++	struct bcm6328_pinctrl *pc;
++	int err;
 +
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+	mode = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mode))
-+		return PTR_ERR(mode);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+	mux = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mux))
-+		return PTR_ERR(mux);
-+
-+	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+	if (!pctl)
++	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
++	if (!pc)
 +		return -ENOMEM;
 +
-+	spin_lock_init(&pctl->lock);
++	platform_set_drvdata(pdev, pc);
++	pc->dev = dev;
 +
-+	pctl->mode = mode;
-+	pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
-+	pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
-+	pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
++	pc->regs = syscon_node_to_regmap(dev->parent->of_node);
++	if (IS_ERR(pc->regs))
++		return PTR_ERR(pc->regs);
 +
-+	pctl->desc.name = dev_name(&pdev->dev);
-+	pctl->desc.owner = THIS_MODULE;
-+	pctl->desc.pctlops = &bcm6328_pctl_ops;
-+	pctl->desc.pmxops = &bcm6328_pmx_ops;
++	pc->gpio_chip.label = MODULE_NAME;
++	pc->gpio_chip.owner = THIS_MODULE;
++	pc->gpio_chip.request = gpiochip_generic_request;
++	pc->gpio_chip.free = gpiochip_generic_free;
++	pc->gpio_chip.direction_input = bcm6328_gpio_direction_input;
++	pc->gpio_chip.direction_output = bcm6328_gpio_direction_output;
++	pc->gpio_chip.get_direction = bcm6328_gpio_get_direction;
++	pc->gpio_chip.get = bcm6328_gpio_get;
++	pc->gpio_chip.set = bcm6328_gpio_set;
++	pc->gpio_chip.set_config = gpiochip_generic_config;
++	pc->gpio_chip.base = -1;
++	pc->gpio_chip.ngpio = BCM6328_NUM_GPIOS;
++	pc->gpio_chip.can_sleep = false;
++	pc->gpio_chip.parent = dev;
++	pc->gpio_chip.of_node = np;
 +
-+	pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
-+	pctl->desc.pins = bcm6328_pins;
++	if (of_get_property(np, "interrupt-names", NULL))
++		pc->gpio_chip.to_irq = bcm6328_gpio_to_irq;
 +
-+	platform_set_drvdata(pdev, pctl);
++	err = gpiochip_add_data(&pc->gpio_chip, pc);
++	if (err) {
++		dev_err(dev, "could not add GPIO chip\n");
++		return err;
++	}
 +
-+	pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+						 &pctl->gpio, BCM6328_NGPIO);
-+	if (IS_ERR(pctl->pctldev))
-+		return PTR_ERR(pctl->pctldev);
++	pc->pctl_desc.name = MODULE_NAME,
++	pc->pctl_desc.pins = bcm6328_pins,
++	pc->pctl_desc.npins = ARRAY_SIZE(bcm6328_pins),
++	pc->pctl_desc.pctlops = &bcm6328_pctl_ops,
++	pc->pctl_desc.pmxops = &bcm6328_pmx_ops,
++	pc->pctl_desc.owner = THIS_MODULE,
++
++	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
++	if (IS_ERR(pc->pctl_dev)) {
++		gpiochip_remove(&pc->gpio_chip);
++		return PTR_ERR(pc->pctl_dev);
++	}
++
++	pc->gpio_range.name = MODULE_NAME;
++	pc->gpio_range.npins = BCM6328_NUM_GPIOS;
++	pc->gpio_range.base = pc->gpio_chip.base;
++	pc->gpio_range.gc = &pc->gpio_chip;
++	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
++
++	dev_info(dev, "registered\n");
 +
 +	return 0;
 +}
@@ -487,7 +628,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static struct platform_driver bcm6328_pinctrl_driver = {
 +	.probe = bcm6328_pinctrl_probe,
 +	.driver = {
-+		.name = "bcm6328-pinctrl",
++		.name = MODULE_NAME,
 +		.of_match_table = bcm6328_pinctrl_match,
 +	},
 +};
diff --git a/target/linux/bmips/patches-5.10/402-Documentation-add-BCM6358-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/402-Documentation-add-BCM6358-pincontroller-binding-docu.patch
new file mode 100644
index 0000000000..e4c6343e3f
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/402-Documentation-add-BCM6358-pincontroller-binding-docu.patch
@@ -0,0 +1,152 @@
+From 9fbcbe08479bcb3609952b66627e2d612173229a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:00 +0200
+Subject: [PATCH 03/12] Documentation: add BCM6358 pincontroller binding
+ documentation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding documentation for the pincontrol core found in BCM6358 SoCs.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../pinctrl/brcm,bcm6358-pinctrl.yaml         | 131 ++++++++++++++++++
+ 1 file changed, 131 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml
+@@ -0,0 +1,131 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6358-pinctrl.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM6358 pin controller
++
++maintainers:
++  - Álvaro Fernández Rojas <noltari@gmail.com>
++  - Jonas Gorski <jonas.gorski@gmail.com>
++
++description: |+
++  The pin controller node should be the child of a syscon node.
++
++  Refer to the the bindings described in
++  Documentation/devicetree/bindings/mfd/syscon.yaml
++
++properties:
++  compatible:
++    const: brcm,bcm6358-pinctrl
++
++  gpio-controller: true
++
++  '#gpio-cells':
++    description:
++      Specifies the pin number and flags, as defined in
++      include/dt-bindings/gpio/gpio.h
++    const: 2
++
++  interrupts-extended:
++    description:
++      One interrupt per each of the 4 GPIO ports supported by the controller,
++      sorted by port number ascending order.
++    minItems: 6
++    maxItems: 6
++
++patternProperties:
++  '^.*$':
++    if:
++      type: object
++    then:
++      properties:
++        function:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ ebi_cs, uart1, serial_led, legacy_led, led, spi_cs, utopia,
++                  pwm_syn_clk, sys_irq ]
++
++        pins:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ ebi_cs_grp, uart1_grp, serial_led_grp, legacy_led_grp,
++                  led_grp, spi_cs_grp, utopia_grp, pwm_syn_clk, sys_irq_grp ]
++
++required:
++  - compatible
++  - gpio-controller
++  - '#gpio-cells'
++
++additionalProperties: false
++
++examples:
++  - |
++    gpio@fffe0080 {
++      compatible = "syscon", "simple-mfd";
++      reg = <0xfffe0080 0x80>;
++
++      pinctrl: pinctrl {
++        compatible = "brcm,bcm6358-pinctrl";
++
++        gpio-controller;
++        #gpio-cells = <2>;
++
++        interrupts-extended = <&ext_intc1 0 0>,
++                              <&ext_intc1 1 0>,
++                              <&ext_intc0 0 0>,
++                              <&ext_intc0 1 0>,
++                              <&ext_intc0 2 0>,
++                              <&ext_intc0 3 0>;
++        interrupt-names = "gpio32",
++                          "gpio33",
++                          "gpio34",
++                          "gpio35",
++                          "gpio36",
++                          "gpio37";
++
++        pinctrl_ebi_cs: ebi_cs {
++          function = "ebi_cs";
++          groups = "ebi_cs_grp";
++        };
++
++        pinctrl_uart1: uart1 {
++          function = "uart1";
++          groups = "uart1_grp";
++        };
++
++        pinctrl_serial_led: serial_led {
++          function = "serial_led";
++          groups = "serial_led_grp";
++        };
++
++        pinctrl_legacy_led: legacy_led {
++          function = "legacy_led";
++          groups = "legacy_led_grp";
++        };
++
++        pinctrl_led: led {
++          function = "led";
++          groups = "led_grp";
++        };
++
++        pinctrl_spi_cs_23: spi_cs {
++          function = "spi_cs";
++          groups = "spi_cs_grp";
++        };
++
++        pinctrl_utopia: utopia {
++          function = "utopia";
++          groups = "utopia_grp";
++        };
++
++        pinctrl_pwm_syn_clk: pwm_syn_clk {
++          function = "pwm_syn_clk";
++          groups = "pwm_syn_clk_grp";
++        };
++
++        pinctrl_sys_irq: sys_irq {
++          function = "sys_irq";
++          groups = "sys_irq_grp";
++        };
++      };
++    };
diff --git a/target/linux/bmips/patches-5.10/403-Documentation-add-BCM6358-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/403-Documentation-add-BCM6358-pincontroller-binding-docu.patch
deleted file mode 100644
index e8a7479915..0000000000
--- a/target/linux/bmips/patches-5.10/403-Documentation-add-BCM6358-pincontroller-binding-docu.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:00 +0200
-Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6358 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt      | 44 ++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-@@ -0,0 +1,44 @@
-+* Broadcom BCM6358 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6358-pinctrl".
-+- reg: Register specifiers of dirout, dat registers.
-+- reg-names: Must be "dirout", "dat".
-+- brcm,gpiomode: Phandle to the shared gpiomode register.
-+- gpio-controller: Identifies this node as a gpio-controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@fffe0080 {
-+	compatible = "brcm,bcm6358-pinctrl";
-+	reg = <0xfffe0080 0x8>,
-+	      <0xfffe0088 0x8>,
-+	      <0xfffe0098 0x4>;
-+	reg-names = "dirout", "dat";
-+	brcm,gpiomode = <&gpiomode>;
-+
-+	gpio-controller;
-+	#gpio-cells = <2>;
-+};
-+
-+gpiomode: syscon@fffe0098 {
-+	compatible = "brcm,bcm6358-gpiomode", "syscon";
-+	reg = <0xfffe0098 0x4>;
-+	native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name		pins		functions
-+-----------------------------------------------------------
-+ebi_cs_grp	30-31		ebi_cs
-+uart1_grp	28-31		uart1
-+spi_cs_grp	32-33		spi_cs
-+async_modem_grp	12-15		async_modem
-+legacy_led_grp	9-15		legacy_led
-+serial_led_grp	6-7		serial_led
-+led_grp		0-3		led
-+utopia_grp	12-15, 22-31	utopia
-+pwm_syn_clk_grp	8		pwm_syn_clk
-+sys_irq_grp	5		sys_irq
diff --git a/target/linux/bmips/patches-5.10/404-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch b/target/linux/bmips/patches-5.10/403-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch
similarity index 51%
rename from target/linux/bmips/patches-5.10/404-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch
rename to target/linux/bmips/patches-5.10/403-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch
index d102bda802..fb8681d904 100644
--- a/target/linux/bmips/patches-5.10/404-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch
+++ b/target/linux/bmips/patches-5.10/403-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch
@@ -1,7 +1,10 @@
-From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
+From b0e1ebc79a6d7f84f71a758f5a504c8cf954e2e0 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Fri, 24 Jun 2016 22:16:01 +0200
-Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
+Subject: [PATCH 04/12] pinctrl: add a pincontrol driver for BCM6358
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
 
 Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
 functions onto the GPIO pins. It does not support configuring individual
@@ -9,71 +12,85 @@ pins but only whole groups. These groups may overlap, and still require
 the directions to be set correctly in the GPIO register. In addition the
 functions register controls other, not directly mux related functions.
 
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 ---
- drivers/pinctrl/bcm63xx/Kconfig           |   8 +
- drivers/pinctrl/bcm63xx/Makefile          |   1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
- 3 files changed, 402 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
+ drivers/pinctrl/bcm/Kconfig           |  11 +
+ drivers/pinctrl/bcm/Makefile          |   1 +
+ drivers/pinctrl/bcm/pinctrl-bcm6358.c | 526 ++++++++++++++++++++++++++
+ 3 files changed, 538 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6358.c
 
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -8,3 +8,11 @@ config PINCTRL_BCM6328
- 	select PINCONF
- 	select PINCTRL_BCM63XX
- 	select GENERIC_PINCONF
-+
+--- a/drivers/pinctrl/bcm/Kconfig
++++ b/drivers/pinctrl/bcm/Kconfig
+@@ -40,6 +40,17 @@ config PINCTRL_BCM6328
+ 	help
+ 	   Say Y here to enable the Broadcom BCM6328 GPIO driver.
+ 
 +config PINCTRL_BCM6358
-+	bool "BCM6358 pincontrol driver"
++	bool "Broadcom BCM6358 GPIO driver"
++	depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
 +	select PINMUX
 +	select PINCONF
-+	select PINCTRL_BCM63XX
 +	select GENERIC_PINCONF
 +	select MFD_SYSCON
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,2 +1,3 @@
- obj-$(CONFIG_PINCTRL_BCM63XX)	+= pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328)	+= pinctrl-bcm6328.o
-+obj-$(CONFIG_PINCTRL_BCM6358)	+= pinctrl-bcm6358.o
++	default BMIPS_GENERIC
++	help
++	   Say Y here to enable the Broadcom BCM6358 GPIO driver.
++
+ config PINCTRL_IPROC_GPIO
+ 	bool "Broadcom iProc GPIO (with PINCONF) driver"
+ 	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
+--- a/drivers/pinctrl/bcm/Makefile
++++ b/drivers/pinctrl/bcm/Makefile
+@@ -4,6 +4,7 @@
+ obj-$(CONFIG_PINCTRL_BCM281XX)		+= pinctrl-bcm281xx.o
+ obj-$(CONFIG_PINCTRL_BCM2835)		+= pinctrl-bcm2835.o
+ obj-$(CONFIG_PINCTRL_BCM6328)		+= pinctrl-bcm6328.o
++obj-$(CONFIG_PINCTRL_BCM6358)		+= pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_IPROC_GPIO)	+= pinctrl-iproc-gpio.o
+ obj-$(CONFIG_PINCTRL_CYGNUS_MUX)	+= pinctrl-cygnus-mux.o
+ obj-$(CONFIG_PINCTRL_NS)		+= pinctrl-ns.o
 --- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
-@@ -0,0 +1,390 @@
++++ b/drivers/pinctrl/bcm/pinctrl-bcm6358.c
+@@ -0,0 +1,526 @@
++// SPDX-License-Identifier: GPL-2.0+
 +/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
++ * Driver for BCM6358 GPIO unit (pinctrl + GPIO)
 + *
++ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
 + */
 +
-+#include <linux/kernel.h>
 +#include <linux/bitops.h>
 +#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
++#include <linux/kernel.h>
 +#include <linux/mfd/syscon.h>
 +#include <linux/of.h>
 +#include <linux/of_gpio.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/regmap.h>
++#include <linux/of_irq.h>
 +#include <linux/platform_device.h>
++#include <linux/regmap.h>
 +
++#include <linux/pinctrl/machine.h>
 +#include <linux/pinctrl/pinconf.h>
 +#include <linux/pinctrl/pinconf-generic.h>
 +#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
 +
 +#include "../core.h"
 +#include "../pinctrl-utils.h"
 +
-+#include "pinctrl-bcm63xx.h"
++#define MODULE_NAME		"bcm6358-pinctrl"
++#define BCM6358_NUM_GPIOS	40
++
++#define BANK_SIZE		sizeof(uint32_t)
++#define PINS_PER_BANK		(BANK_SIZE * BITS_PER_BYTE)
++
++#define BCM6358_DIROUT_REG	0x04
++#define BCM6358_DATA_REG	0x0c
++#define BCM6358_MODE_REG	0x18
 +
-+/* GPIO_MODE register */
 +#define BCM6358_MODE_MUX_NONE		0
-+
-+/* overlays on gpio pins */
 +#define BCM6358_MODE_MUX_EBI_CS		BIT(5)
 +#define BCM6358_MODE_MUX_UART1		BIT(6)
 +#define BCM6358_MODE_MUX_SPI_CS		BIT(7)
@@ -86,17 +103,15 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +#define BCM6358_MODE_MUX_PWM_SYN_CLK	BIT(14)
 +#define BCM6358_MODE_MUX_SYS_IRQ	BIT(15)
 +
-+#define BCM6358_NGPIO			40
-+
 +struct bcm6358_pingroup {
 +	const char *name;
 +	const unsigned * const pins;
 +	const unsigned num_pins;
 +
-+	const u16 mode_val;
++	const uint16_t mode_val;
 +
 +	/* non-GPIO function muxes require the gpio direction to be set */
-+	const u16 direction;
++	const uint16_t direction;
 +};
 +
 +struct bcm6358_function {
@@ -107,12 +122,13 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +
 +struct bcm6358_pinctrl {
 +	struct device *dev;
-+	struct pinctrl_dev *pctldev;
-+	struct pinctrl_desc desc;
-+
++	struct regmap *regs;
 +	struct regmap_field *overlays;
 +
-+	struct gpio_chip gpio[2];
++	struct pinctrl_dev *pctl_dev;
++	struct gpio_chip gpio_chip;
++	struct pinctrl_desc pctl_desc;
++	struct pinctrl_gpio_range gpio_range;
 +};
 +
 +#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3)		\
@@ -271,6 +287,108 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	BCM6358_FUN(sys_irq),
 +};
 +
++static inline unsigned int bcm6358_bank_pin(unsigned int pin)
++{
++	return pin % PINS_PER_BANK;
++}
++
++static inline unsigned int bcm6358_reg_off(unsigned int reg, unsigned int pin)
++{
++	return reg - (pin / PINS_PER_BANK) * BANK_SIZE;
++}
++
++static int bcm6358_gpio_direction_input(struct gpio_chip *chip,
++					unsigned int pin)
++{
++	struct bcm6358_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6358_reg_off(BCM6358_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6358_bank_pin(pin);
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an input GPIO
++	 */
++	ret = pinctrl_gpio_direction_input(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), 0);
++
++	return 0;
++}
++
++static int bcm6358_gpio_direction_output(struct gpio_chip *chip,
++					 unsigned int pin, int value)
++{
++	struct bcm6358_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6358_reg_off(BCM6358_DATA_REG, pin);
++	unsigned int dirout = bcm6358_reg_off(BCM6358_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6358_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an output GPIO
++	 */
++	ret = pinctrl_gpio_direction_output(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), BIT(bank_pin));
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++
++	return 0;
++}
++
++static int bcm6358_gpio_get(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6358_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6358_reg_off(BCM6358_DATA_REG, pin);
++	unsigned int bank_pin = bcm6358_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, data, &val);
++
++	return !!(val & BIT(bank_pin));
++}
++
++static int bcm6358_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6358_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6358_reg_off(BCM6358_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6358_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, dirout, &val);
++
++	if (val & BIT(bank_pin))
++		return GPIO_LINE_DIRECTION_OUT;
++
++	return GPIO_LINE_DIRECTION_IN;
++}
++
++static void bcm6358_gpio_set(struct gpio_chip *chip, unsigned int pin,
++			     int value)
++{
++	struct bcm6358_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6358_reg_off(BCM6358_DATA_REG, pin);
++	unsigned int bank_pin = bcm6358_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++}
++
++static int bcm6358_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++	char irq_name[7];
++
++	sprintf(irq_name, "gpio%d", gpio);
++
++	return of_irq_get_byname(chip->of_node, irq_name);
++}
++
 +static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 +{
 +	return ARRAY_SIZE(bcm6358_groups);
@@ -317,25 +435,25 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 +				   unsigned selector, unsigned group)
 +{
-+	struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
-+	u32 val = grp->mode_val;
-+	u32 mask = val;
++	struct bcm6358_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++	const struct bcm6358_pingroup *pg = &bcm6358_groups[group];
++	unsigned int val = pg->mode_val;
++	unsigned int mask = val;
 +	unsigned pin;
 +
-+	for (pin = 0; pin < grp->num_pins; pin++)
++	for (pin = 0; pin < pg->num_pins; pin++)
 +		mask |= (unsigned long)bcm6358_pins[pin].drv_data;
 +
-+	regmap_field_update_bits(pctl->overlays, mask, val);
++	regmap_field_update_bits(pc->overlays, mask, val);
 +
-+	for (pin = 0; pin < grp->num_pins; pin++) {
++	for (pin = 0; pin < pg->num_pins; pin++) {
 +		int hw_gpio = bcm6358_pins[pin].number;
-+		struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
++		struct gpio_chip *gc = &pc->gpio_chip;
 +
-+		if (grp->direction & BIT(pin))
-+			gc->direction_output(gc, hw_gpio % 32, 0);
++		if (pg->direction & BIT(pin))
++			gc->direction_output(gc, hw_gpio, 0);
 +		else
-+			gc->direction_input(gc, hw_gpio % 32);
++			gc->direction_input(gc, hw_gpio);
 +	}
 +
 +	return 0;
@@ -345,73 +463,105 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +				       struct pinctrl_gpio_range *range,
 +				       unsigned offset)
 +{
-+	struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	u32 mask;
++	struct bcm6358_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++	unsigned int mask;
 +
-+	mask = (unsigned long)bcm6358_pins[offset].drv_data;
++	mask = (unsigned long) bcm6358_pins[offset].drv_data;
 +	if (!mask)
 +		return 0;
 +
 +	/* disable all functions using this pin */
-+	return regmap_field_update_bits(pctl->overlays, mask, 0);
++	return regmap_field_update_bits(pc->overlays, mask, 0);
 +}
 +
 +static struct pinctrl_ops bcm6358_pctl_ops = {
-+	.get_groups_count	= bcm6358_pinctrl_get_group_count,
-+	.get_group_name		= bcm6358_pinctrl_get_group_name,
-+	.get_group_pins		= bcm6358_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
-+	.dt_free_map		= pinctrl_utils_free_map,
-+#endif
++	.get_groups_count = bcm6358_pinctrl_get_group_count,
++	.get_group_name = bcm6358_pinctrl_get_group_name,
++	.get_group_pins = bcm6358_pinctrl_get_group_pins,
++	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++	.dt_free_map = pinctrl_utils_free_map,
 +};
 +
 +static struct pinmux_ops bcm6358_pmx_ops = {
-+	.get_functions_count	= bcm6358_pinctrl_get_func_count,
-+	.get_function_name	= bcm6358_pinctrl_get_func_name,
-+	.get_function_groups	= bcm6358_pinctrl_get_groups,
-+	.set_mux		= bcm6358_pinctrl_set_mux,
-+	.gpio_request_enable	= bcm6358_gpio_request_enable,
-+	.strict			= true,
++	.get_functions_count = bcm6358_pinctrl_get_func_count,
++	.get_function_name = bcm6358_pinctrl_get_func_name,
++	.get_function_groups = bcm6358_pinctrl_get_groups,
++	.set_mux = bcm6358_pinctrl_set_mux,
++	.gpio_request_enable = bcm6358_gpio_request_enable,
++	.strict = true,
 +};
 +
 +static int bcm6358_pinctrl_probe(struct platform_device *pdev)
 +{
-+	struct bcm6358_pinctrl *pctl;
-+	struct regmap *mode;
-+	struct reg_field overlays = REG_FIELD(0, 0, 15);
++	struct reg_field overlays = REG_FIELD(BCM6358_MODE_REG, 0, 15);
++	struct device *dev = &pdev->dev;
++	struct device_node *np = dev->of_node;
++	struct bcm6358_pinctrl *pc;
++	int err;
 +
-+	mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+					       "brcm,gpiomode");
-+
-+	if (IS_ERR(mode))
-+		return PTR_ERR(mode);
-+
-+	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+	if (!pctl)
++	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
++	if (!pc)
 +		return -ENOMEM;
 +
-+	pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
-+	if (IS_ERR(pctl->overlays))
-+		return PTR_ERR(pctl->overlays);
++	platform_set_drvdata(pdev, pc);
++	pc->dev = dev;
++
++	pc->regs = syscon_node_to_regmap(dev->parent->of_node);
++	if (IS_ERR(pc->regs))
++		return PTR_ERR(pc->regs);
++
++	pc->overlays = devm_regmap_field_alloc(&pdev->dev, pc->regs, overlays);
++	if (IS_ERR(pc->overlays))
++		return PTR_ERR(pc->overlays);
 +
 +	/* disable all muxes by default */
-+	regmap_field_write(pctl->overlays, 0);
++	regmap_field_write(pc->overlays, 0);
 +
-+	pctl->desc.name = dev_name(&pdev->dev);
-+	pctl->desc.owner = THIS_MODULE;
-+	pctl->desc.pctlops = &bcm6358_pctl_ops;
-+	pctl->desc.pmxops = &bcm6358_pmx_ops;
++	pc->gpio_chip.label = MODULE_NAME;
++	pc->gpio_chip.owner = THIS_MODULE;
++	pc->gpio_chip.request = gpiochip_generic_request;
++	pc->gpio_chip.free = gpiochip_generic_free;
++	pc->gpio_chip.direction_input = bcm6358_gpio_direction_input;
++	pc->gpio_chip.direction_output = bcm6358_gpio_direction_output;
++	pc->gpio_chip.get_direction = bcm6358_gpio_get_direction;
++	pc->gpio_chip.get = bcm6358_gpio_get;
++	pc->gpio_chip.set = bcm6358_gpio_set;
++	pc->gpio_chip.set_config = gpiochip_generic_config;
++	pc->gpio_chip.base = -1;
++	pc->gpio_chip.ngpio = BCM6358_NUM_GPIOS;
++	pc->gpio_chip.can_sleep = false;
++	pc->gpio_chip.parent = dev;
++	pc->gpio_chip.of_node = np;
 +
-+	pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
-+	pctl->desc.pins = bcm6358_pins;
++	if (of_get_property(np, "interrupt-names", NULL))
++		pc->gpio_chip.to_irq = bcm6358_gpio_to_irq;
 +
-+	platform_set_drvdata(pdev, pctl);
++	err = gpiochip_add_data(&pc->gpio_chip, pc);
++	if (err) {
++		dev_err(dev, "could not add GPIO chip\n");
++		return err;
++	}
 +
-+	pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+						 pctl->gpio, BCM6358_NGPIO);
-+	if (IS_ERR(pctl->pctldev))
-+		return PTR_ERR(pctl->pctldev);
++	pc->pctl_desc.name = MODULE_NAME,
++	pc->pctl_desc.pins = bcm6358_pins,
++	pc->pctl_desc.npins = ARRAY_SIZE(bcm6358_pins),
++	pc->pctl_desc.pctlops = &bcm6358_pctl_ops,
++	pc->pctl_desc.pmxops = &bcm6358_pmx_ops,
++	pc->pctl_desc.owner = THIS_MODULE,
++
++	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
++	if (IS_ERR(pc->pctl_dev)) {
++		gpiochip_remove(&pc->gpio_chip);
++		return PTR_ERR(pc->pctl_dev);
++	}
++
++	pc->gpio_range.name = MODULE_NAME;
++	pc->gpio_range.npins = BCM6358_NUM_GPIOS;
++	pc->gpio_range.base = pc->gpio_chip.base;
++	pc->gpio_range.gc = &pc->gpio_chip;
++	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
++
++	dev_info(dev, "registered\n");
 +
 +	return 0;
 +}
@@ -424,7 +574,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static struct platform_driver bcm6358_pinctrl_driver = {
 +	.probe = bcm6358_pinctrl_probe,
 +	.driver = {
-+		.name = "bcm6358-pinctrl",
++		.name = MODULE_NAME,
 +		.of_match_table = bcm6358_pinctrl_match,
 +	},
 +};
diff --git a/target/linux/bmips/patches-5.10/404-Documentation-add-BCM6362-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/404-Documentation-add-BCM6362-pincontroller-binding-docu.patch
new file mode 100644
index 0000000000..18739091aa
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/404-Documentation-add-BCM6362-pincontroller-binding-docu.patch
@@ -0,0 +1,261 @@
+From 1c839f287a008023b3b3ae7d892b4d25e3d224ad Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:18 +0200
+Subject: [PATCH 05/12] Documentation: add BCM6362 pincontroller binding
+ documentation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding documentation for the pincontrol core found in BCM6362 SoCs.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../pinctrl/brcm,bcm6362-pinctrl.yaml         | 240 ++++++++++++++++++
+ 1 file changed, 240 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml
+@@ -0,0 +1,240 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6362-pinctrl.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM6362 pin controller
++
++maintainers:
++  - Álvaro Fernández Rojas <noltari@gmail.com>
++  - Jonas Gorski <jonas.gorski@gmail.com>
++
++description: |+
++  The pin controller node should be the child of a syscon node.
++
++  Refer to the the bindings described in
++  Documentation/devicetree/bindings/mfd/syscon.yaml
++
++properties:
++  compatible:
++    const: brcm,bcm6362-pinctrl
++
++  gpio-controller: true
++
++  '#gpio-cells':
++    description:
++      Specifies the pin number and flags, as defined in
++      include/dt-bindings/gpio/gpio.h
++    const: 2
++
++  interrupts-extended:
++    description:
++      One interrupt per each of the 4 GPIO ports supported by the controller,
++      sorted by port number ascending order.
++    minItems: 4
++    maxItems: 4
++
++patternProperties:
++  '^.*$':
++    if:
++      type: object
++    then:
++      properties:
++        function:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ usb_device_led, sys_irq, serial_led_clk, serial_led_data,
++                  robosw_led_data, robosw_led_clk, robosw_led0, robosw_led1,
++                  inet_led, spi_cs2, spi_cs3, ntr_pulse, uart1_scts,
++                  uart1_srts, uart1_sdin, uart1_sdout, adsl_spi_miso,
++                  adsl_spi_mosi, adsl_spi_clk, adsl_spi_cs, ephy0_led,
++                  ephy1_led, ephy2_led, ephy3_led, ext_irq0, ext_irq1,
++                  ext_irq2, ext_irq3, nand ]
++
++        pins:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
++                  gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14,
++                  gpio15, gpio16, gpio17, gpio18, gpio19, gpio20, gpio21,
++                  gpio22, gpio23, gpio24, gpio25, gpio26, gpio27, nand_grp ]
++
++required:
++  - compatible
++  - gpio-controller
++  - '#gpio-cells'
++
++additionalProperties: false
++
++examples:
++  - |
++    gpio@10000080 {
++      compatible = "syscon", "simple-mfd";
++      reg = <0x10000080 0x80>;
++
++      pinctrl: pinctrl {
++        compatible = "brcm,bcm6362-pinctrl";
++
++        gpio-controller;
++        #gpio-cells = <2>;
++
++        interrupts-extended = <&ext_intc 0 0>,
++                              <&ext_intc 1 0>,
++                              <&ext_intc 2 0>,
++                              <&ext_intc 3 0>;
++        interrupt-names = "gpio24",
++                          "gpio25",
++                          "gpio26",
++                          "gpio27";
++
++        pinctrl_usb_device_led: usb_device_led {
++          function = "usb_device_led";
++          pins = "gpio0";
++        };
++
++        pinctrl_sys_irq: sys_irq {
++          function = "sys_irq";
++          pins = "gpio1";
++        };
++
++        pinctrl_serial_led: serial_led {
++          pinctrl_serial_led_clk: serial_led_clk {
++            function = "serial_led_clk";
++            pins = "gpio2";
++          };
++
++          pinctrl_serial_led_data: serial_led_data {
++            function = "serial_led_data";
++            pins = "gpio3";
++          };
++        };
++
++        pinctrl_robosw_led_data: robosw_led_data {
++          function = "robosw_led_data";
++          pins = "gpio4";
++        };
++
++        pinctrl_robosw_led_clk: robosw_led_clk {
++          function = "robosw_led_clk";
++          pins = "gpio5";
++        };
++
++        pinctrl_robosw_led0: robosw_led0 {
++          function = "robosw_led0";
++          pins = "gpio6";
++        };
++
++        pinctrl_robosw_led1: robosw_led1 {
++          function = "robosw_led1";
++          pins = "gpio7";
++        };
++
++        pinctrl_inet_led: inet_led {
++          function = "inet_led";
++          pins = "gpio8";
++        };
++
++        pinctrl_spi_cs2: spi_cs2 {
++          function = "spi_cs2";
++          pins = "gpio9";
++        };
++
++        pinctrl_spi_cs3: spi_cs3 {
++          function = "spi_cs3";
++          pins = "gpio10";
++        };
++
++        pinctrl_ntr_pulse: ntr_pulse {
++          function = "ntr_pulse";
++          pins = "gpio11";
++        };
++
++        pinctrl_uart1_scts: uart1_scts {
++          function = "uart1_scts";
++          pins = "gpio12";
++        };
++
++        pinctrl_uart1_srts: uart1_srts {
++          function = "uart1_srts";
++          pins = "gpio13";
++        };
++
++        pinctrl_uart1: uart1 {
++          pinctrl_uart1_sdin: uart1_sdin {
++            function = "uart1_sdin";
++            pins = "gpio14";
++          };
++
++          pinctrl_uart1_sdout: uart1_sdout {
++            function = "uart1_sdout";
++            pins = "gpio15";
++          };
++        };
++
++        pinctrl_adsl_spi: adsl_spi {
++          pinctrl_adsl_spi_miso: adsl_spi_miso {
++            function = "adsl_spi_miso";
++            pins = "gpio16";
++          };
++
++          pinctrl_adsl_spi_mosi: adsl_spi_mosi {
++            function = "adsl_spi_mosi";
++            pins = "gpio17";
++          };
++
++          pinctrl_adsl_spi_clk: adsl_spi_clk {
++            function = "adsl_spi_clk";
++            pins = "gpio18";
++          };
++
++          pinctrl_adsl_spi_cs: adsl_spi_cs {
++            function = "adsl_spi_cs";
++            pins = "gpio19";
++          };
++        };
++
++        pinctrl_ephy0_led: ephy0_led {
++          function = "ephy0_led";
++          pins = "gpio20";
++        };
++
++        pinctrl_ephy1_led: ephy1_led {
++          function = "ephy1_led";
++          pins = "gpio21";
++        };
++
++        pinctrl_ephy2_led: ephy2_led {
++          function = "ephy2_led";
++          pins = "gpio22";
++        };
++
++        pinctrl_ephy3_led: ephy3_led {
++          function = "ephy3_led";
++          pins = "gpio23";
++        };
++
++        pinctrl_ext_irq0: ext_irq0 {
++          function = "ext_irq0";
++          pins = "gpio24";
++        };
++
++        pinctrl_ext_irq1: ext_irq1 {
++          function = "ext_irq1";
++          pins = "gpio25";
++        };
++
++        pinctrl_ext_irq2: ext_irq2 {
++          function = "ext_irq2";
++          pins = "gpio26";
++        };
++
++        pinctrl_ext_irq3: ext_irq3 {
++          function = "ext_irq3";
++          pins = "gpio27";
++        };
++
++        pinctrl_nand: nand {
++          function = "nand";
++          group = "nand_grp";
++        };
++      };
++    };
diff --git a/target/linux/bmips/patches-5.10/405-Documentation-add-BCM6362-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/405-Documentation-add-BCM6362-pincontroller-binding-docu.patch
deleted file mode 100644
index 9fc424cb4c..0000000000
--- a/target/linux/bmips/patches-5.10/405-Documentation-add-BCM6362-pincontroller-binding-docu.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:18 +0200
-Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6362 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt      | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6362 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl"
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+	compatible = "brcm,bcm6362-pinctrl";
-+	reg = <0x10000080 0x8>,
-+	      <0x10000088 0x8>,
-+	      <0x10000090 0x4>,
-+	      <0x10000098 0x4>,
-+	      <0x1000009c 0x4>,
-+	      <0x100000b8 0x4>;
-+	reg-names = "dirout", "dat", "led",
-+		    "mode", "ctrl", "basemode";
-+
-+	gpio-controller;
-+	#gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name		pins		functions
-+-----------------------------------------------------------
-+gpio0		0		led, usb_device_led
-+gpio1		1		led, sys_irq
-+gpio2		2		led, serial_led_clk
-+gpio3		3		led, serial_led_data
-+gpio4		4		led, robosw_led_data
-+gpio5		5		led, robosw_led_clk
-+gpio6		6		led, robosw_led0
-+gpio7		7		led, robosw_led1
-+gpio8		8		led, inet_led
-+gpio9		9		led, spi_cs2
-+gpio10		10		led, spi_cs3
-+gpio11		11		led, ntr_pulse
-+gpio12		12		led, uart1_scts
-+gpio13		13		led, uart1_srts
-+gpio14		14		led, uart1_sdin
-+gpio15		15		led, uart1_sdout
-+gpio16		16		led, adsl_spi_miso
-+gpio17		17		led, adsl_spi_mosi
-+gpio18		18		led, adsl_spi_clk
-+gpio19		19		led, adsl_spi_cs
-+gpio20		20		led, ephy0_led
-+gpio21		21		led, ephy1_led
-+gpio22		22		led, ephy2_led
-+gpio23		23		led, ephy3_led
-+gpio24		24		ext_irq0
-+gpio25		25		ext_irq1
-+gpio26		26		ext_irq2
-+gpio27		27		ext_irq3
-+gpio28		28		-
-+gpio29		29		-
-+gpio30		30		-
-+gpio31		31		-
-+gpio32		32		wifi
-+gpio33		33		wifi
-+gpio34		34		wifi
-+gpio35		35		wifi
-+gpio36		36		wifi
-+gpio37		37		wifi
-+gpio38		38		wifi
-+gpio39		39		wifi
-+gpio40		40		wifi
-+gpio41		41		wifi
-+gpio42		42		wifi
-+gpio43		43		wifi
-+gpio44		44		wifi
-+gpio45		45		wifi
-+gpio46		46		wifi
-+gpio47		47		wifi
-+nand_grp	8, 12-23, 27	nand
diff --git a/target/linux/bmips/patches-5.10/406-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch b/target/linux/bmips/patches-5.10/405-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch
similarity index 60%
rename from target/linux/bmips/patches-5.10/406-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch
rename to target/linux/bmips/patches-5.10/405-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch
index 30b95158e4..bfc6620ace 100644
--- a/target/linux/bmips/patches-5.10/406-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch
+++ b/target/linux/bmips/patches-5.10/405-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch
@@ -1,75 +1,98 @@
-From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
+From 2872fcb5eac02d3a74d696e6350410a9e66281b4 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Fri, 24 Jun 2016 22:17:20 +0200
-Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362
+Subject: [PATCH 06/12] pinctrl: add a pincontrol driver for BCM6362
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
 
 Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
 GPIO pins to the LED controller, to be available by the integrated
 wifi, or other functions. It also supports overlay groups, of which
 only NAND is documented.
 
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 ---
- drivers/pinctrl/bcm63xx/Kconfig           |   7 +
- drivers/pinctrl/bcm63xx/Makefile          |   1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++
- 3 files changed, 700 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
+ drivers/pinctrl/bcm/Kconfig           |  11 +
+ drivers/pinctrl/bcm/Makefile          |   1 +
+ drivers/pinctrl/bcm/pinctrl-bcm6362.c | 794 ++++++++++++++++++++++++++
+ 3 files changed, 806 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6362.c
 
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -16,3 +16,10 @@ config PINCTRL_BCM6358
- 	select PINCTRL_BCM63XX
- 	select GENERIC_PINCONF
- 	select MFD_SYSCON
-+
+--- a/drivers/pinctrl/bcm/Kconfig
++++ b/drivers/pinctrl/bcm/Kconfig
+@@ -51,6 +51,17 @@ config PINCTRL_BCM6358
+ 	help
+ 	   Say Y here to enable the Broadcom BCM6358 GPIO driver.
+ 
 +config PINCTRL_BCM6362
-+	bool "BCM6362 pincontrol driver"
++	bool "Broadcom BCM6362 GPIO driver"
++	depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
 +	select PINMUX
 +	select PINCONF
-+	select PINCTRL_BCM63XX
 +	select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,3 +1,4 @@
- obj-$(CONFIG_PINCTRL_BCM63XX)	+= pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328)	+= pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6358)	+= pinctrl-bcm6358.o
-+obj-$(CONFIG_PINCTRL_BCM6362)	+= pinctrl-bcm6362.o
++	select MFD_SYSCON
++	default BMIPS_GENERIC
++	help
++	   Say Y here to enable the Broadcom BCM6362 GPIO driver.
++
+ config PINCTRL_IPROC_GPIO
+ 	bool "Broadcom iProc GPIO (with PINCONF) driver"
+ 	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
+--- a/drivers/pinctrl/bcm/Makefile
++++ b/drivers/pinctrl/bcm/Makefile
+@@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BCM281XX)		+= pinct
+ obj-$(CONFIG_PINCTRL_BCM2835)		+= pinctrl-bcm2835.o
+ obj-$(CONFIG_PINCTRL_BCM6328)		+= pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6358)		+= pinctrl-bcm6358.o
++obj-$(CONFIG_PINCTRL_BCM6362)		+= pinctrl-bcm6362.o
+ obj-$(CONFIG_PINCTRL_IPROC_GPIO)	+= pinctrl-iproc-gpio.o
+ obj-$(CONFIG_PINCTRL_CYGNUS_MUX)	+= pinctrl-cygnus-mux.o
+ obj-$(CONFIG_PINCTRL_NS)		+= pinctrl-ns.o
 --- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
-@@ -0,0 +1,692 @@
++++ b/drivers/pinctrl/bcm/pinctrl-bcm6362.c
+@@ -0,0 +1,794 @@
++// SPDX-License-Identifier: GPL-2.0+
 +/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
++ * Driver for BCM6362 GPIO unit (pinctrl + GPIO)
 + *
++ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
 + */
 +
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
 +#include <linux/bitops.h>
 +#include <linux/gpio.h>
++#include <linux/kernel.h>
++#include <linux/mfd/syscon.h>
 +#include <linux/of.h>
 +#include <linux/of_gpio.h>
-+#include <linux/slab.h>
++#include <linux/of_irq.h>
 +#include <linux/platform_device.h>
++#include <linux/regmap.h>
 +
++#include <linux/pinctrl/machine.h>
 +#include <linux/pinctrl/pinconf.h>
 +#include <linux/pinctrl/pinconf-generic.h>
 +#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
 +
 +#include "../core.h"
 +#include "../pinctrl-utils.h"
 +
-+#include "pinctrl-bcm63xx.h"
++#define MODULE_NAME		"bcm6362-pinctrl"
++#define BCM6362_NUM_GPIOS	48
++#define BCM6362_NUM_LEDS	24
 +
-+#define BCM6362_NGPIO	48
++#define BANK_SIZE		sizeof(uint32_t)
++#define PINS_PER_BANK		(BANK_SIZE * BITS_PER_BYTE)
 +
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND	BIT(2)
++#define BCM6362_DIROUT_REG	0x04
++#define BCM6362_DATA_REG	0x0c
++#define BCM6362_LED_REG		0x10
++#define BCM6362_MODE_REG	0x18
++#define BCM6362_CTRL_REG	0x1c
++#define BCM6362_BASEMODE_REG	0x38
++#define  BASEMODE_NAND		BIT(2)
 +
 +enum bcm6362_pinctrl_reg {
 +	BCM6362_LEDCTRL,
@@ -90,22 +113,17 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	const unsigned num_groups;
 +
 +	enum bcm6362_pinctrl_reg reg;
-+	u32 basemode_mask;
++	uint32_t basemode_mask;
 +};
 +
 +struct bcm6362_pinctrl {
-+	struct pinctrl_dev *pctldev;
-+	struct pinctrl_desc desc;
++	struct device *dev;
++	struct regmap *regs;
 +
-+	void __iomem *led;
-+	void __iomem *mode;
-+	void __iomem *ctrl;
-+	void __iomem *basemode;
-+
-+	/* register access lock */
-+	spinlock_t lock;
-+
-+	struct gpio_chip gpio[2];
++	struct pinctrl_dev *pctl_dev;
++	struct gpio_chip gpio_chip;
++	struct pinctrl_desc pctl_desc;
++	struct pinctrl_gpio_range gpio_range;
 +};
 +
 +#define BCM6362_PIN(a, b, mask)			\
@@ -508,6 +526,108 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
 +};
 +
++static inline unsigned int bcm6362_bank_pin(unsigned int pin)
++{
++	return pin % PINS_PER_BANK;
++}
++
++static inline unsigned int bcm6362_reg_off(unsigned int reg, unsigned int pin)
++{
++	return reg - (pin / PINS_PER_BANK) * BANK_SIZE;
++}
++
++static int bcm6362_gpio_direction_input(struct gpio_chip *chip,
++					unsigned int pin)
++{
++	struct bcm6362_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6362_reg_off(BCM6362_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6362_bank_pin(pin);
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an input GPIO
++	 */
++	ret = pinctrl_gpio_direction_input(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), 0);
++
++	return 0;
++}
++
++static int bcm6362_gpio_direction_output(struct gpio_chip *chip,
++					 unsigned int pin, int value)
++{
++	struct bcm6362_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6362_reg_off(BCM6362_DATA_REG, pin);
++	unsigned int dirout = bcm6362_reg_off(BCM6362_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6362_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an output GPIO
++	 */
++	ret = pinctrl_gpio_direction_output(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), BIT(bank_pin));
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++
++	return 0;
++}
++
++static int bcm6362_gpio_get(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6362_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6362_reg_off(BCM6362_DATA_REG, pin);
++	unsigned int bank_pin = bcm6362_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, data, &val);
++
++	return !!(val & BIT(bank_pin));
++}
++
++static int bcm6362_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6362_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6362_reg_off(BCM6362_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6362_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, dirout, &val);
++
++	if (val & BIT(bank_pin))
++		return GPIO_LINE_DIRECTION_OUT;
++
++	return GPIO_LINE_DIRECTION_IN;
++}
++
++static void bcm6362_gpio_set(struct gpio_chip *chip, unsigned int pin,
++			     int value)
++{
++	struct bcm6362_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6362_reg_off(BCM6362_DATA_REG, pin);
++	unsigned int bank_pin = bcm6362_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++}
++
++static int bcm6362_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++	char irq_name[7];
++
++	sprintf(irq_name, "gpio%d", gpio);
++
++	return of_irq_get_byname(chip->of_node, irq_name);
++}
++
 +static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 +{
 +	return ARRAY_SIZE(bcm6362_groups);
@@ -551,73 +671,59 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	return 0;
 +}
 +
-+static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg,
-+			    u32 mask, u32 val)
-+{
-+	unsigned long flags;
-+	u32 tmp;
-+
-+	spin_lock_irqsave(&pctl->lock, flags);
-+	tmp = __raw_readl(reg);
-+	tmp &= ~mask;
-+	tmp |= val & mask;
-+	__raw_writel(tmp, reg);
-+
-+	spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin)
++static void bcm6362_set_gpio(struct bcm6362_pinctrl *pc, unsigned pin)
 +{
 +	const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
-+	u32 mask = BIT(pin % 32);
++	unsigned int mask = bcm6362_bank_pin(pin);
 +
 +	if (desc->drv_data)
-+		bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0);
++		regmap_update_bits(pc->regs, BCM6362_BASEMODE_REG,
++				   (uint32_t) desc->drv_data, 0);
 +
-+	if (pin < 32) {
++	if (pin < PINS_PER_BANK) {
 +		/* base mode 0 => gpio 1 => mux function */
-+		bcm6362_rmw_mux(pctl, pctl->mode, mask, 0);
++		regmap_update_bits(pc->regs, BCM6362_MODE_REG, mask, 0);
 +
 +		/* pins 0-23 might be muxed to led */
-+		if (pin < 24)
-+			bcm6362_rmw_mux(pctl, pctl->led, mask, 0);
++		if (pin < BCM6362_NUM_LEDS)
++			regmap_update_bits(pc->regs, BCM6362_LED_REG, mask, 0);
 +	} else {
 +		/* ctrl reg 0 => wifi function 1 => gpio */
-+		bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask);
++		regmap_update_bits(pc->regs, BCM6362_CTRL_REG, mask, mask);
 +	}
 +}
 +
 +static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 +				   unsigned selector, unsigned group)
 +{
-+	struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	const struct bcm6362_pingroup *grp = &bcm6362_groups[group];
++	struct bcm6362_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++	const struct bcm6362_pingroup *pg = &bcm6362_groups[group];
 +	const struct bcm6362_function *f = &bcm6362_funcs[selector];
 +	unsigned i;
-+	void __iomem *reg;
-+	u32 val, mask;
++	unsigned int reg;
++	unsigned int val, mask;
 +
-+	for (i = 0; i < grp->num_pins; i++)
-+		bcm6362_set_gpio(pctl, grp->pins[i]);
++	for (i = 0; i < pg->num_pins; i++)
++		bcm6362_set_gpio(pc, pg->pins[i]);
 +
 +	switch (f->reg) {
 +	case BCM6362_LEDCTRL:
-+		reg = pctl->led;
-+		mask = BIT(grp->pins[0]);
-+		val = BIT(grp->pins[0]);
++		reg = BCM6362_LED_REG;
++		mask = BIT(pg->pins[0]);
++		val = BIT(pg->pins[0]);
 +		break;
 +	case BCM6362_MODE:
-+		reg = pctl->mode;
-+		mask = BIT(grp->pins[0]);
-+		val = BIT(grp->pins[0]);
++		reg = BCM6362_MODE_REG;
++		mask = BIT(pg->pins[0]);
++		val = BIT(pg->pins[0]);
 +		break;
 +	case BCM6362_CTRL:
-+		reg = pctl->ctrl;
-+		mask = BIT(grp->pins[0]);
++		reg = BCM6362_CTRL_REG;
++		mask = BIT(pg->pins[0]);
 +		val = 0;
 +		break;
 +	case BCM6362_BASEMODE:
-+		reg = pctl->basemode;
++		reg = BCM6362_BASEMODE_REG;
 +		mask = f->basemode_mask;
 +		val = f->basemode_mask;
 +		break;
@@ -626,7 +732,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +		return -EINVAL;
 +	}
 +
-+	bcm6362_rmw_mux(pctl, reg, mask, val);
++	regmap_update_bits(pc->regs, reg, mask, val);
 +
 +	return 0;
 +}
@@ -635,84 +741,94 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +				       struct pinctrl_gpio_range *range,
 +				       unsigned offset)
 +{
-+	struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++	struct bcm6362_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 +
 +	/* disable all functions using this pin */
-+	bcm6362_set_gpio(pctl, offset);
++	bcm6362_set_gpio(pc, offset);
 +
 +	return 0;
 +}
 +
 +static struct pinctrl_ops bcm6362_pctl_ops = {
-+	.get_groups_count	= bcm6362_pinctrl_get_group_count,
-+	.get_group_name		= bcm6362_pinctrl_get_group_name,
-+	.get_group_pins		= bcm6362_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
-+	.dt_free_map		= pinctrl_utils_free_map,
-+#endif
++	.get_groups_count = bcm6362_pinctrl_get_group_count,
++	.get_group_name = bcm6362_pinctrl_get_group_name,
++	.get_group_pins = bcm6362_pinctrl_get_group_pins,
++	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++	.dt_free_map = pinctrl_utils_free_map,
 +};
 +
 +static struct pinmux_ops bcm6362_pmx_ops = {
-+	.get_functions_count	= bcm6362_pinctrl_get_func_count,
-+	.get_function_name	= bcm6362_pinctrl_get_func_name,
-+	.get_function_groups	= bcm6362_pinctrl_get_groups,
-+	.set_mux		= bcm6362_pinctrl_set_mux,
-+	.gpio_request_enable	= bcm6362_gpio_request_enable,
-+	.strict			= true,
++	.get_functions_count = bcm6362_pinctrl_get_func_count,
++	.get_function_name = bcm6362_pinctrl_get_func_name,
++	.get_function_groups = bcm6362_pinctrl_get_groups,
++	.set_mux = bcm6362_pinctrl_set_mux,
++	.gpio_request_enable = bcm6362_gpio_request_enable,
++	.strict = true,
 +};
 +
 +static int bcm6362_pinctrl_probe(struct platform_device *pdev)
 +{
-+	struct bcm6362_pinctrl *pctl;
-+	struct resource *res;
-+	void __iomem *led, *mode, *ctrl, *basemode;
++	struct device *dev = &pdev->dev;
++	struct device_node *np = dev->of_node;
++	struct bcm6362_pinctrl *pc;
++	int err;
 +
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+	led = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(led))
-+		return PTR_ERR(led);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+	mode = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mode))
-+		return PTR_ERR(mode);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+	ctrl = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(ctrl))
-+		return PTR_ERR(ctrl);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+	basemode = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(basemode))
-+		return PTR_ERR(basemode);
-+
-+	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+	if (!pctl)
++	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
++	if (!pc)
 +		return -ENOMEM;
 +
-+	spin_lock_init(&pctl->lock);
++	platform_set_drvdata(pdev, pc);
++	pc->dev = dev;
 +
-+	pctl->led = led;
-+	pctl->mode = mode;
-+	pctl->ctrl = ctrl;
-+	pctl->basemode = basemode;
++	pc->regs = syscon_node_to_regmap(dev->parent->of_node);
++	if (IS_ERR(pc->regs))
++		return PTR_ERR(pc->regs);
 +
-+	pctl->desc.name = dev_name(&pdev->dev);
-+	pctl->desc.owner = THIS_MODULE;
-+	pctl->desc.pctlops = &bcm6362_pctl_ops;
-+	pctl->desc.pmxops = &bcm6362_pmx_ops;
++	pc->gpio_chip.label = MODULE_NAME;
++	pc->gpio_chip.owner = THIS_MODULE;
++	pc->gpio_chip.request = gpiochip_generic_request;
++	pc->gpio_chip.free = gpiochip_generic_free;
++	pc->gpio_chip.direction_input = bcm6362_gpio_direction_input;
++	pc->gpio_chip.direction_output = bcm6362_gpio_direction_output;
++	pc->gpio_chip.get_direction = bcm6362_gpio_get_direction;
++	pc->gpio_chip.get = bcm6362_gpio_get;
++	pc->gpio_chip.set = bcm6362_gpio_set;
++	pc->gpio_chip.set_config = gpiochip_generic_config;
++	pc->gpio_chip.base = -1;
++	pc->gpio_chip.ngpio = BCM6362_NUM_GPIOS;
++	pc->gpio_chip.can_sleep = false;
++	pc->gpio_chip.parent = dev;
++	pc->gpio_chip.of_node = np;
 +
-+	pctl->desc.npins = ARRAY_SIZE(bcm6362_pins);
-+	pctl->desc.pins = bcm6362_pins;
++	if (of_get_property(np, "interrupt-names", NULL))
++		pc->gpio_chip.to_irq = bcm6362_gpio_to_irq;
 +
-+	platform_set_drvdata(pdev, pctl);
++	err = gpiochip_add_data(&pc->gpio_chip, pc);
++	if (err) {
++		dev_err(dev, "could not add GPIO chip\n");
++		return err;
++	}
 +
-+	pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+						 pctl->gpio, BCM6362_NGPIO);
-+	if (IS_ERR(pctl->pctldev))
-+		return PTR_ERR(pctl->pctldev);
++	pc->pctl_desc.name = MODULE_NAME,
++	pc->pctl_desc.pins = bcm6362_pins,
++	pc->pctl_desc.npins = ARRAY_SIZE(bcm6362_pins),
++	pc->pctl_desc.pctlops = &bcm6362_pctl_ops,
++	pc->pctl_desc.pmxops = &bcm6362_pmx_ops,
++	pc->pctl_desc.owner = THIS_MODULE,
++
++	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
++	if (IS_ERR(pc->pctl_dev)) {
++		gpiochip_remove(&pc->gpio_chip);
++		return PTR_ERR(pc->pctl_dev);
++	}
++
++	pc->gpio_range.name = MODULE_NAME;
++	pc->gpio_range.npins = BCM6362_NUM_GPIOS;
++	pc->gpio_range.base = pc->gpio_chip.base;
++	pc->gpio_range.gc = &pc->gpio_chip;
++	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
++
++	dev_info(dev, "registered\n");
 +
 +	return 0;
 +}
@@ -725,7 +841,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static struct platform_driver bcm6362_pinctrl_driver = {
 +	.probe = bcm6362_pinctrl_probe,
 +	.driver = {
-+		.name = "bcm6362-pinctrl",
++		.name = MODULE_NAME,
 +		.of_match_table = bcm6362_pinctrl_match,
 +	},
 +};
diff --git a/target/linux/bmips/patches-5.10/406-Documentation-add-BCM6368-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/406-Documentation-add-BCM6368-pincontroller-binding-docu.patch
new file mode 100644
index 0000000000..59fbdaeaaa
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/406-Documentation-add-BCM6368-pincontroller-binding-docu.patch
@@ -0,0 +1,276 @@
+From 12f1d5123ee405266596eaea238d9810e0628d18 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:51 +0200
+Subject: [PATCH 07/12] Documentation: add BCM6368 pincontroller binding
+ documentation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding documentation for the pincontrol core found in BCM6368 SoCs.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../pinctrl/brcm,bcm6368-pinctrl.yaml         | 255 ++++++++++++++++++
+ 1 file changed, 255 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
+@@ -0,0 +1,255 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6368-pinctrl.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM6368 pin controller
++
++maintainers:
++  - Álvaro Fernández Rojas <noltari@gmail.com>
++  - Jonas Gorski <jonas.gorski@gmail.com>
++
++description: |+
++  The pin controller node should be the child of a syscon node.
++
++  Refer to the the bindings described in
++  Documentation/devicetree/bindings/mfd/syscon.yaml
++
++properties:
++  compatible:
++    const: brcm,bcm6368-pinctrl
++
++  gpio-controller: true
++
++  '#gpio-cells':
++    description:
++      Specifies the pin number and flags, as defined in
++      include/dt-bindings/gpio/gpio.h
++    const: 2
++
++  interrupts-extended:
++    description:
++      One interrupt per each of the 6 GPIO ports supported by the controller,
++      sorted by port number ascending order.
++    minItems: 6
++    maxItems: 6
++
++patternProperties:
++  '^.*$':
++    if:
++      type: object
++    then:
++      properties:
++        function:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ analog_afe_0, analog_afe_1, sys_irq, serial_led_data,
++                  serial_led_clk, inet_led, ephy0_led, ephy1_led, ephy2_led,
++                  ephy3_led, robosw_led_data, robosw_led_clk, robosw_led0,
++                  robosw_led1, usb_device_led, pci_req1, pci_gnt1, pci_intb,
++                  pci_req0, pci_gnt0, pcmcia_cd1, pcmcia_cd2, pcmcia_vs1,
++                  pcmcia_vs2, ebi_cs2, ebi_cs3, spi_cs2, spi_cs3, spi_cs4,
++                  spi_cs5, uart1 ]
++
++        pins:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
++                  gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14,
++                  gpio16, gpio17, gpio18, gpio19, gpio20, gpio22, gpio23,
++                  gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30,
++                  gpio31, uart1_grp ]
++
++required:
++  - compatible
++  - gpio-controller
++  - '#gpio-cells'
++
++additionalProperties: false
++
++examples:
++  - |
++    gpio@10000080 {
++      compatible = "syscon", "simple-mfd";
++      reg = <0x10000080 0x80>;
++
++      pinctrl: pinctrl {
++        compatible = "brcm,bcm6368-pinctrl";
++
++        gpio-controller;
++        #gpio-cells = <2>;
++
++        interrupts-extended = <&ext_intc1 0 0>,
++                              <&ext_intc1 1 0>,
++                              <&ext_intc0 0 0>,
++                              <&ext_intc0 1 0>,
++                              <&ext_intc0 2 0>,
++                              <&ext_intc0 3 0>;
++        interrupt-names = "gpio32",
++                          "gpio33",
++                          "gpio34",
++                          "gpio35",
++                          "gpio36",
++                          "gpio37";
++
++        pinctrl_analog_afe_0: analog_afe_0 {
++          function = "analog_afe_0";
++          pins = "gpio0";
++        };
++
++        pinctrl_analog_afe_1: analog_afe_1 {
++          function = "analog_afe_1";
++          pins = "gpio1";
++        };
++
++        pinctrl_sys_irq: sys_irq {
++          function = "sys_irq";
++          pins = "gpio2";
++        };
++
++        pinctrl_serial_led: serial_led {
++          pinctrl_serial_led_data: serial_led_data {
++            function = "serial_led_data";
++            pins = "gpio3";
++          };
++
++          pinctrl_serial_led_clk: serial_led_clk {
++            function = "serial_led_clk";
++            pins = "gpio4";
++          };
++        };
++
++        pinctrl_inet_led: inet_led {
++          function = "inet_led";
++          pins = "gpio5";
++        };
++
++        pinctrl_ephy0_led: ephy0_led {
++          function = "ephy0_led";
++          pins = "gpio6";
++        };
++
++        pinctrl_ephy1_led: ephy1_led {
++          function = "ephy1_led";
++          pins = "gpio7";
++        };
++
++        pinctrl_ephy2_led: ephy2_led {
++          function = "ephy2_led";
++          pins = "gpio8";
++        };
++
++        pinctrl_ephy3_led: ephy3_led {
++          function = "ephy3_led";
++          pins = "gpio9";
++        };
++
++        pinctrl_robosw_led_data: robosw_led_data {
++          function = "robosw_led_data";
++          pins = "gpio10";
++        };
++
++        pinctrl_robosw_led_clk: robosw_led_clk {
++          function = "robosw_led_clk";
++          pins = "gpio11";
++        };
++
++        pinctrl_robosw_led0: robosw_led0 {
++          function = "robosw_led0";
++          pins = "gpio12";
++        };
++
++        pinctrl_robosw_led1: robosw_led1 {
++          function = "robosw_led1";
++          pins = "gpio13";
++        };
++
++        pinctrl_usb_device_led: usb_device_led {
++          function = "usb_device_led";
++          pins = "gpio14";
++        };
++
++        pinctrl_pci: pci {
++          pinctrl_pci_req1: pci_req1 {
++            function = "pci_req1";
++            pins = "gpio16";
++          };
++
++          pinctrl_pci_gnt1: pci_gnt1 {
++            function = "pci_gnt1";
++            pins = "gpio17";
++          };
++
++          pinctrl_pci_intb: pci_intb {
++            function = "pci_intb";
++            pins = "gpio18";
++          };
++
++          pinctrl_pci_req0: pci_req0 {
++            function = "pci_req0";
++            pins = "gpio19";
++          };
++
++          pinctrl_pci_gnt0: pci_gnt0 {
++            function = "pci_gnt0";
++            pins = "gpio20";
++          };
++        };
++
++        pinctrl_pcmcia: pcmcia {
++          pinctrl_pcmcia_cd1: pcmcia_cd1 {
++            function = "pcmcia_cd1";
++            pins = "gpio22";
++          };
++
++          pinctrl_pcmcia_cd2: pcmcia_cd2 {
++            function = "pcmcia_cd2";
++            pins = "gpio23";
++          };
++
++          pinctrl_pcmcia_vs1: pcmcia_vs1 {
++            function = "pcmcia_vs1";
++            pins = "gpio24";
++          };
++
++          pinctrl_pcmcia_vs2: pcmcia_vs2 {
++            function = "pcmcia_vs2";
++            pins = "gpio25";
++          };
++        };
++
++        pinctrl_ebi_cs2: ebi_cs2 {
++          function = "ebi_cs2";
++          pins = "gpio26";
++        };
++
++        pinctrl_ebi_cs3: ebi_cs3 {
++          function = "ebi_cs3";
++          pins = "gpio27";
++        };
++
++        pinctrl_spi_cs2: spi_cs2 {
++          function = "spi_cs2";
++          pins = "gpio28";
++        };
++
++        pinctrl_spi_cs3: spi_cs3 {
++          function = "spi_cs3";
++          pins = "gpio29";
++        };
++
++        pinctrl_spi_cs4: spi_cs4 {
++          function = "spi_cs4";
++          pins = "gpio30";
++        };
++
++        pinctrl_spi_cs5: spi_cs5 {
++          function = "spi_cs5";
++          pins = "gpio31";
++        };
++
++        pinctrl_uart1: uart1 {
++          function = "uart1";
++          group = "uart1_grp";
++        };
++      };
++    };
diff --git a/target/linux/bmips/patches-5.10/407-Documentation-add-BCM6368-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/407-Documentation-add-BCM6368-pincontroller-binding-docu.patch
deleted file mode 100644
index e0a698fc12..0000000000
--- a/target/linux/bmips/patches-5.10/407-Documentation-add-BCM6368-pincontroller-binding-docu.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:51 +0200
-Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6368 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt      | 67 ++++++++++++++++++++++
- 1 file changed, 67 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-@@ -0,0 +1,67 @@
-+* Broadcom BCM6368 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6368-pinctrl".
-+- reg: Register specifiers of dirout, dat, mode registers.
-+- reg-names: Must be "dirout", "dat", "mode".
-+- brcm,gpiobasemode: Phandle to the gpio basemode register.
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+	compatible = "brcm,bcm6368-pinctrl";
-+	reg = <0x10000080 0x08>,
-+	      <0x10000088 0x08>,
-+	      <0x10000098 0x04>;
-+	reg-names = "dirout", "dat", "mode";
-+	brcm,gpiobasemode = <&gpiobasemode>;
-+
-+	gpio-controller;
-+	#gpio-cells = <2>;
-+};
-+
-+gpiobasemode: syscon@100000b8 {
-+	compatible = "brcm,bcm6368-gpiobasemode", "syscon";
-+	reg = <0x100000b8 4>;
-+	native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name		pins	functions
-+-----------------------------------------------------------
-+gpio0		0	analog_afe0
-+gpio1		1	analog_afe1
-+gpio2		2	sys_irq
-+gpio3		3	serial_led_data
-+gpio4		4	serial_led_clk
-+gpio5		5	inet_led
-+gpio6		6	ephy0_led
-+gpio7		7	ephy1_led
-+gpio8		8	ephy2_led
-+gpio9		9	ephy3_led
-+gpio10		10	robosw_led_data
-+gpio11		11	robosw_led_clk
-+gpio12		12	robosw_led0
-+gpio13		13	robosw_led1
-+gpio14		14	usb_device_led
-+gpio15		15	-
-+gpio16		16	pci_req1
-+gpio17		17	pci_gnt1
-+gpio18		18	pci_intb
-+gpio19		19	pci_req0
-+gpio20		20	pci_gnt0
-+gpio21		21	-
-+gpio22		22	pcmcia_cd1
-+gpio23		23	pcmcia_cd2
-+gpio24		24	pcmcia_vs1
-+gpio25		25	pcmcia_vs2
-+gpio26		26	ebi_cs2
-+gpio27		27	ebi_cs3
-+gpio28		28	spi_cs2
-+gpio29		29	spi_cs3
-+gpio30		30	spi_cs4
-+gpio31		31	spi_cs5
-+uart1_grp	30-33	uart1
diff --git a/target/linux/bmips/patches-5.10/408-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch b/target/linux/bmips/patches-5.10/407-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch
similarity index 54%
rename from target/linux/bmips/patches-5.10/408-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch
rename to target/linux/bmips/patches-5.10/407-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch
index 80b007799f..5a5dac3487 100644
--- a/target/linux/bmips/patches-5.10/408-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch
+++ b/target/linux/bmips/patches-5.10/407-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch
@@ -1,77 +1,95 @@
-From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
+From a212dcb2f04ae42f35ec11122a2532b1bcf8a94f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Fri, 24 Jun 2016 22:18:25 +0200
-Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368
+Subject: [PATCH 08/12] pinctrl: add a pincontrol driver for BCM6368
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
 
 Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
 GPIOs onto alternative functions. Not all are documented.
 
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 ---
- drivers/pinctrl/bcm63xx/Kconfig           |  15 +
- drivers/pinctrl/bcm63xx/Makefile          |   1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++
- 3 files changed, 589 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
+ drivers/pinctrl/bcm/Kconfig           |  11 +
+ drivers/pinctrl/bcm/Makefile          |   1 +
+ drivers/pinctrl/bcm/pinctrl-bcm6368.c | 679 ++++++++++++++++++++++++++
+ 3 files changed, 691 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6368.c
 
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -23,3 +23,11 @@ config PINCTRL_BCM6362
- 	select PINCONF
- 	select PINCTRL_BCM63XX
- 	select GENERIC_PINCONF
-+
+--- a/drivers/pinctrl/bcm/Kconfig
++++ b/drivers/pinctrl/bcm/Kconfig
+@@ -62,6 +62,17 @@ config PINCTRL_BCM6362
+ 	help
+ 	   Say Y here to enable the Broadcom BCM6362 GPIO driver.
+ 
 +config PINCTRL_BCM6368
-+	bool "BCM6368 pincontrol driver"
++	bool "Broadcom BCM6368 GPIO driver"
++	depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
 +	select PINMUX
 +	select PINCONF
-+	select PINCTRL_BCM63XX
 +	select GENERIC_PINCONF
 +	select MFD_SYSCON
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX)	+= pinctrl
- obj-$(CONFIG_PINCTRL_BCM6328)	+= pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6358)	+= pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362)	+= pinctrl-bcm6362.o
-+obj-$(CONFIG_PINCTRL_BCM6368)	+= pinctrl-bcm6368.o
++	default BMIPS_GENERIC
++	help
++	   Say Y here to enable the Broadcom BCM6368 GPIO driver.
++
+ config PINCTRL_IPROC_GPIO
+ 	bool "Broadcom iProc GPIO (with PINCONF) driver"
+ 	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
+--- a/drivers/pinctrl/bcm/Makefile
++++ b/drivers/pinctrl/bcm/Makefile
+@@ -6,6 +6,7 @@ obj-$(CONFIG_PINCTRL_BCM2835)		+= pinctr
+ obj-$(CONFIG_PINCTRL_BCM6328)		+= pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6358)		+= pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_BCM6362)		+= pinctrl-bcm6362.o
++obj-$(CONFIG_PINCTRL_BCM6368)		+= pinctrl-bcm6368.o
+ obj-$(CONFIG_PINCTRL_IPROC_GPIO)	+= pinctrl-iproc-gpio.o
+ obj-$(CONFIG_PINCTRL_CYGNUS_MUX)	+= pinctrl-cygnus-mux.o
+ obj-$(CONFIG_PINCTRL_NS)		+= pinctrl-ns.o
 --- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
-@@ -0,0 +1,570 @@
++++ b/drivers/pinctrl/bcm/pinctrl-bcm6368.c
+@@ -0,0 +1,679 @@
++// SPDX-License-Identifier: GPL-2.0+
 +/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
++ * Driver for BCM6368 GPIO unit (pinctrl + GPIO)
 + *
++ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
 + */
 +
 +#include <linux/bitops.h>
-+#include <linux/kernel.h>
 +#include <linux/gpio.h>
++#include <linux/kernel.h>
 +#include <linux/mfd/syscon.h>
 +#include <linux/of.h>
-+#include <linux/of_address.h>
 +#include <linux/of_gpio.h>
++#include <linux/of_irq.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++
++#include <linux/pinctrl/machine.h>
 +#include <linux/pinctrl/pinconf.h>
 +#include <linux/pinctrl/pinconf-generic.h>
 +#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
 +
 +#include "../core.h"
 +#include "../pinctrl-utils.h"
 +
-+#include "pinctrl-bcm63xx.h"
++#define MODULE_NAME		"bcm6368-pinctrl"
++#define BCM6368_NUM_GPIOS	38
 +
-+#define BCM6368_NGPIO	38
++#define BANK_SIZE		sizeof(uint32_t)
++#define PINS_PER_BANK		(BANK_SIZE * BITS_PER_BYTE)
 +
-+#define BCM6368_BASEMODE_MASK	0x7
-+#define BCM6368_BASEMODE_GPIO	0x0
-+#define BCM6368_BASEMODE_UART1	0x1
++#define BCM6368_DIROUT_REG	0x04
++#define BCM6368_DATA_REG	0x0c
++#define BCM6368_MODE_REG	0x18
++#define BCM6368_BASEMODE_REG	0x38
++#define  BCM6368_BASEMODE_MASK	0x7
++#define  BCM6368_BASEMODE_GPIO	0x0
++#define  BCM6368_BASEMODE_UART1	0x1
 +
 +struct bcm6368_pingroup {
 +	const char *name;
@@ -89,16 +107,14 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +};
 +
 +struct bcm6368_pinctrl {
-+	struct pinctrl_dev *pctldev;
-+	struct pinctrl_desc desc;
++	struct device *dev;
++	struct regmap *regs;
++	struct regmap_field *overlays;
 +
-+	void __iomem *mode;
-+	struct regmap_field *overlay;
-+
-+	/* register access lock */
-+	spinlock_t lock;
-+
-+	struct gpio_chip gpio[2];
++	struct pinctrl_dev *pctl_dev;
++	struct gpio_chip gpio_chip;
++	struct pinctrl_desc pctl_desc;
++	struct pinctrl_gpio_range gpio_range;
 +};
 +
 +#define BCM6368_BASEMODE_PIN(a, b)		\
@@ -401,6 +417,108 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
 +};
 +
++static inline unsigned int bcm6368_bank_pin(unsigned int pin)
++{
++	return pin % PINS_PER_BANK;
++}
++
++static inline unsigned int bcm6368_reg_off(unsigned int reg, unsigned int pin)
++{
++	return reg - (pin / PINS_PER_BANK) * BANK_SIZE;
++}
++
++static int bcm6368_gpio_direction_input(struct gpio_chip *chip,
++					unsigned int pin)
++{
++	struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6368_reg_off(BCM6368_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6368_bank_pin(pin);
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an input GPIO
++	 */
++	ret = pinctrl_gpio_direction_input(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), 0);
++
++	return 0;
++}
++
++static int bcm6368_gpio_direction_output(struct gpio_chip *chip,
++					 unsigned int pin, int value)
++{
++	struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6368_reg_off(BCM6368_DATA_REG, pin);
++	unsigned int dirout = bcm6368_reg_off(BCM6368_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6368_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an output GPIO
++	 */
++	ret = pinctrl_gpio_direction_output(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), BIT(bank_pin));
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++
++	return 0;
++}
++
++static int bcm6368_gpio_get(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6368_reg_off(BCM6368_DATA_REG, pin);
++	unsigned int bank_pin = bcm6368_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, data, &val);
++
++	return !!(val & BIT(bank_pin));
++}
++
++static int bcm6368_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6368_reg_off(BCM6368_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6368_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, dirout, &val);
++
++	if (val & BIT(bank_pin))
++		return GPIO_LINE_DIRECTION_OUT;
++
++	return GPIO_LINE_DIRECTION_IN;
++}
++
++static void bcm6368_gpio_set(struct gpio_chip *chip, unsigned int pin,
++			     int value)
++{
++	struct bcm6368_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6368_reg_off(BCM6368_DATA_REG, pin);
++	unsigned int bank_pin = bcm6368_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++}
++
++static int bcm6368_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++	char irq_name[7];
++
++	sprintf(irq_name, "gpio%d", gpio);
++
++	return of_irq_get_byname(chip->of_node, irq_name);
++}
++
 +static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 +{
 +	return ARRAY_SIZE(bcm6368_groups);
@@ -444,57 +562,44 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	return 0;
 +}
 +
-+static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg,
-+			    u32 mask, u32 val)
-+{
-+	u32 tmp;
-+
-+	tmp = __raw_readl(reg);
-+	tmp &= ~mask;
-+	tmp |= (val & mask);
-+	__raw_writel(tmp, reg);
-+}
-+
 +static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 +				   unsigned selector, unsigned group)
 +{
-+	struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	const struct bcm6368_pingroup *grp = &bcm6368_groups[group];
++	struct bcm6368_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++	const struct bcm6368_pingroup *pg = &bcm6368_groups[group];
 +	const struct bcm6368_function *fun = &bcm6368_funcs[selector];
-+	unsigned long flags;
 +	int i, pin;
 +
-+	spin_lock_irqsave(&pctl->lock, flags);
 +	if (fun->basemode) {
-+		u32 mask = 0;
++		unsigned int mask = 0;
 +
-+		for (i = 0; i < grp->num_pins; i++) {
-+			pin = grp->pins[i];
-+			if (pin < 32)
++		for (i = 0; i < pg->num_pins; i++) {
++			pin = pg->pins[i];
++			if (pin < PINS_PER_BANK)
 +				mask |= BIT(pin);
 +		}
 +
-+		bcm6368_rmw_mux(pctl, pctl->mode, mask, 0);
-+		regmap_field_write(pctl->overlay, fun->basemode);
++		regmap_update_bits(pc->regs, BCM6368_MODE_REG, mask, 0);
++		regmap_field_write(pc->overlays, fun->basemode);
 +	} else {
-+		pin = grp->pins[0];
++		pin = pg->pins[0];
 +
 +		if (bcm6368_pins[pin].drv_data)
-+			regmap_field_write(pctl->overlay,
++			regmap_field_write(pc->overlays,
 +					   BCM6368_BASEMODE_GPIO);
 +
-+		bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin));
++		regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(pin),
++				   BIT(pin));
 +	}
-+	spin_unlock_irqrestore(&pctl->lock, flags);
 +
-+	for (pin = 0; pin < grp->num_pins; pin++) {
++	for (pin = 0; pin < pg->num_pins; pin++) {
 +		int hw_gpio = bcm6368_pins[pin].number;
-+		struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
++		struct gpio_chip *gc = &pc->gpio_chip;
 +
 +		if (fun->dir_out & BIT(pin))
-+			gc->direction_output(gc, hw_gpio % 32, 0);
++			gc->direction_output(gc, hw_gpio, 0);
 +		else
-+			gc->direction_input(gc, hw_gpio % 32);
++			gc->direction_input(gc, hw_gpio);
 +	}
 +
 +	return 0;
@@ -504,92 +609,109 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +				       struct pinctrl_gpio_range *range,
 +				       unsigned offset)
 +{
-+	struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	unsigned long flags;
++	struct bcm6368_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 +
-+	if (offset >= 32 && !bcm6368_pins[offset].drv_data)
++	if (offset >= PINS_PER_BANK && !bcm6368_pins[offset].drv_data)
 +		return 0;
 +
-+	spin_lock_irqsave(&pctl->lock, flags);
 +	/* disable all functions using this pin */
-+	if (offset < 32)
-+		bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0);
++	if (offset < PINS_PER_BANK)
++		regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(offset), 0);
 +
 +	if (bcm6368_pins[offset].drv_data)
-+		regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO);
-+
-+	spin_unlock_irqrestore(&pctl->lock, flags);
++		regmap_field_write(pc->overlays, BCM6368_BASEMODE_GPIO);
 +
 +	return 0;
 +}
 +
 +static struct pinctrl_ops bcm6368_pctl_ops = {
-+	.get_groups_count	= bcm6368_pinctrl_get_group_count,
-+	.get_group_name		= bcm6368_pinctrl_get_group_name,
-+	.get_group_pins		= bcm6368_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
-+	.dt_free_map		= pinctrl_utils_free_map,
-+#endif
++	.get_groups_count = bcm6368_pinctrl_get_group_count,
++	.get_group_name = bcm6368_pinctrl_get_group_name,
++	.get_group_pins = bcm6368_pinctrl_get_group_pins,
++	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++	.dt_free_map = pinctrl_utils_free_map,
 +};
 +
 +static struct pinmux_ops bcm6368_pmx_ops = {
-+	.get_functions_count	= bcm6368_pinctrl_get_func_count,
-+	.get_function_name	= bcm6368_pinctrl_get_func_name,
-+	.get_function_groups	= bcm6368_pinctrl_get_groups,
-+	.set_mux		= bcm6368_pinctrl_set_mux,
-+	.gpio_request_enable	= bcm6368_gpio_request_enable,
-+	.strict			= true,
++	.get_functions_count = bcm6368_pinctrl_get_func_count,
++	.get_function_name = bcm6368_pinctrl_get_func_name,
++	.get_function_groups = bcm6368_pinctrl_get_groups,
++	.set_mux = bcm6368_pinctrl_set_mux,
++	.gpio_request_enable = bcm6368_gpio_request_enable,
++	.strict = true,
 +};
 +
 +static int bcm6368_pinctrl_probe(struct platform_device *pdev)
 +{
-+	struct bcm6368_pinctrl *pctl;
-+	struct resource *res;
-+	void __iomem *mode;
-+	struct regmap *basemode;
-+	struct reg_field overlay = REG_FIELD(0, 0, 3);
++	struct reg_field overlays = REG_FIELD(BCM6368_BASEMODE_REG, 0, 15);
++	struct device *dev = &pdev->dev;
++	struct device_node *np = dev->of_node;
++	struct bcm6368_pinctrl *pc;
++	int err;
 +
-+	basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+						   "brcm,gpiobasemode");
-+
-+	if (IS_ERR(basemode))
-+		return PTR_ERR(basemode);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+	mode = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mode))
-+		return PTR_ERR(mode);
-+
-+	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+	if (!pctl)
++	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
++	if (!pc)
 +		return -ENOMEM;
 +
-+	pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay);
-+	if (IS_ERR(pctl->overlay))
-+		return PTR_ERR(pctl->overlay);
++	platform_set_drvdata(pdev, pc);
++	pc->dev = dev;
 +
-+	spin_lock_init(&pctl->lock);
++	pc->regs = syscon_node_to_regmap(dev->parent->of_node);
++	if (IS_ERR(pc->regs))
++		return PTR_ERR(pc->regs);
 +
-+	pctl->mode = mode;
++	pc->overlays = devm_regmap_field_alloc(&pdev->dev, pc->regs, overlays);
++	if (IS_ERR(pc->overlays))
++		return PTR_ERR(pc->overlays);
 +
 +	/* disable all muxes by default */
-+	__raw_writel(0, pctl->mode);
++	regmap_field_write(pc->overlays, 0);
 +
-+	pctl->desc.name = dev_name(&pdev->dev);
-+	pctl->desc.owner = THIS_MODULE;
-+	pctl->desc.pctlops = &bcm6368_pctl_ops;
-+	pctl->desc.pmxops = &bcm6368_pmx_ops;
++	pc->gpio_chip.label = MODULE_NAME;
++	pc->gpio_chip.owner = THIS_MODULE;
++	pc->gpio_chip.request = gpiochip_generic_request;
++	pc->gpio_chip.free = gpiochip_generic_free;
++	pc->gpio_chip.direction_input = bcm6368_gpio_direction_input;
++	pc->gpio_chip.direction_output = bcm6368_gpio_direction_output;
++	pc->gpio_chip.get_direction = bcm6368_gpio_get_direction;
++	pc->gpio_chip.get = bcm6368_gpio_get;
++	pc->gpio_chip.set = bcm6368_gpio_set;
++	pc->gpio_chip.set_config = gpiochip_generic_config;
++	pc->gpio_chip.base = -1;
++	pc->gpio_chip.ngpio = BCM6368_NUM_GPIOS;
++	pc->gpio_chip.can_sleep = false;
++	pc->gpio_chip.parent = dev;
++	pc->gpio_chip.of_node = np;
 +
-+	pctl->desc.npins = ARRAY_SIZE(bcm6368_pins);
-+	pctl->desc.pins = bcm6368_pins;
++	if (of_get_property(np, "interrupt-names", NULL))
++		pc->gpio_chip.to_irq = bcm6368_gpio_to_irq;
 +
-+	platform_set_drvdata(pdev, pctl);
++	err = gpiochip_add_data(&pc->gpio_chip, pc);
++	if (err) {
++		dev_err(dev, "could not add GPIO chip\n");
++		return err;
++	}
 +
-+	pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+						 pctl->gpio, BCM6368_NGPIO);
-+	if (IS_ERR(pctl->pctldev))
-+		return PTR_ERR(pctl->pctldev);
++	pc->pctl_desc.name = MODULE_NAME,
++	pc->pctl_desc.pins = bcm6368_pins,
++	pc->pctl_desc.npins = ARRAY_SIZE(bcm6368_pins),
++	pc->pctl_desc.pctlops = &bcm6368_pctl_ops,
++	pc->pctl_desc.pmxops = &bcm6368_pmx_ops,
++	pc->pctl_desc.owner = THIS_MODULE,
++
++	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
++	if (IS_ERR(pc->pctl_dev)) {
++		gpiochip_remove(&pc->gpio_chip);
++		return PTR_ERR(pc->pctl_dev);
++	}
++
++	pc->gpio_range.name = MODULE_NAME;
++	pc->gpio_range.npins = BCM6368_NUM_GPIOS;
++	pc->gpio_range.base = pc->gpio_chip.base;
++	pc->gpio_range.gc = &pc->gpio_chip;
++	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
++
++	dev_info(dev, "registered\n");
 +
 +	return 0;
 +}
@@ -602,7 +724,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static struct platform_driver bcm6368_pinctrl_driver = {
 +	.probe = bcm6368_pinctrl_probe,
 +	.driver = {
-+		.name = "bcm6368-pinctrl",
++		.name = MODULE_NAME,
 +		.of_match_table = bcm6368_pinctrl_match,
 +	},
 +};
diff --git a/target/linux/bmips/patches-5.10/408-Documentation-add-BCM63268-pincontroller-binding-doc.patch b/target/linux/bmips/patches-5.10/408-Documentation-add-BCM63268-pincontroller-binding-doc.patch
new file mode 100644
index 0000000000..d51af84328
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/408-Documentation-add-BCM63268-pincontroller-binding-doc.patch
@@ -0,0 +1,220 @@
+From 826266914f8397c996d2d4d821b315d614bfc325 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 27 Jul 2016 11:37:08 +0200
+Subject: [PATCH 09/12] Documentation: add BCM63268 pincontroller binding
+ documentation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding documentation for the pincontrol core found in the BCM63268
+family SoCs.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../pinctrl/brcm,bcm63268-pinctrl.yaml        | 198 ++++++++++++++++++
+ 1 file changed, 198 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml
+@@ -0,0 +1,198 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/pinctrl/brcm,bcm63268-pinctrl.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM63268 pin controller
++
++maintainers:
++  - Álvaro Fernández Rojas <noltari@gmail.com>
++  - Jonas Gorski <jonas.gorski@gmail.com>
++
++description: |+
++  The pin controller node should be the child of a syscon node.
++
++  Refer to the the bindings described in
++  Documentation/devicetree/bindings/mfd/syscon.yaml
++
++properties:
++  compatible:
++    const: brcm,bcm63268-pinctrl
++
++  gpio-controller: true
++
++  '#gpio-cells':
++    description:
++      Specifies the pin number and flags, as defined in
++      include/dt-bindings/gpio/gpio.h
++    const: 2
++
++  interrupts-extended:
++    description:
++      One interrupt per each of the 4 GPIO ports supported by the controller,
++      sorted by port number ascending order.
++    minItems: 4
++    maxItems: 4
++
++patternProperties:
++  '^.*$':
++    if:
++      type: object
++    then:
++      properties:
++        function:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ serial_led_clk, serial_led_data, hsspi_cs4, hsspi_cs5,
++                  hsspi_cs6, hsspi_cs7, adsl_spi_miso, adsl_spi_mosi,
++                  vreq_clk, pcie_clkreq_b, robosw_led_clk, robosw_led_data,
++                  nand, gpio35_alt, dectpd, vdsl_phy_override_0,
++                  vdsl_phy_override_1, vdsl_phy_override_2,
++                  vdsl_phy_override_3, dsl_gpio8, dsl_gpio9 ]
++
++        pins:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19,
++                  gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35
++                  dectpd_grp, vdsl_phy_override_0_grp,
++                  vdsl_phy_override_1_grp, vdsl_phy_override_2_grp,
++                  vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ]
++
++required:
++  - compatible
++  - gpio-controller
++  - '#gpio-cells'
++
++additionalProperties: false
++
++examples:
++  - |
++    gpio@100000c0 {
++      compatible = "syscon", "simple-mfd";
++      reg = <0x100000c0 0x80>;
++
++      pinctrl: pinctrl {
++        compatible = "brcm,bcm63268-pinctrl";
++
++        gpio-controller;
++        #gpio-cells = <2>;
++
++        interrupts-extended = <&ext_intc 0 0>,
++                              <&ext_intc 1 0>,
++                              <&ext_intc 2 0>,
++                              <&ext_intc 3 0>;
++        interrupt-names = "gpio32",
++                          "gpio33",
++                          "gpio34",
++                          "gpio35";
++
++        pinctrl_serial_led: serial_led {
++          pinctrl_serial_led_clk: serial_led_clk {
++            function = "serial_led_clk";
++            pins = "gpio0";
++          };
++
++          pinctrl_serial_led_data: serial_led_data {
++            function = "serial_led_data";
++            pins = "gpio1";
++          };
++        };
++
++        pinctrl_hsspi_cs4: hsspi_cs4 {
++          function = "hsspi_cs4";
++          pins = "gpio16";
++        };
++
++        pinctrl_hsspi_cs5: hsspi_cs5 {
++          function = "hsspi_cs5";
++          pins = "gpio17";
++        };
++
++        pinctrl_hsspi_cs6: hsspi_cs6 {
++          function = "hsspi_cs6";
++          pins = "gpio8";
++        };
++
++        pinctrl_hsspi_cs7: hsspi_cs7 {
++          function = "hsspi_cs7";
++          pins = "gpio9";
++        };
++
++        pinctrl_adsl_spi: adsl_spi {
++          pinctrl_adsl_spi_miso: adsl_spi_miso {
++            function = "adsl_spi_miso";
++            pins = "gpio18";
++          };
++
++          pinctrl_adsl_spi_mosi: adsl_spi_mosi {
++            function = "adsl_spi_mosi";
++            pins = "gpio19";
++          };
++        };
++
++        pinctrl_vreq_clk: vreq_clk {
++          function = "vreq_clk";
++          pins = "gpio22";
++        };
++
++        pinctrl_pcie_clkreq_b: pcie_clkreq_b {
++          function = "pcie_clkreq_b";
++          pins = "gpio23";
++        };
++
++        pinctrl_robosw_led_clk: robosw_led_clk {
++          function = "robosw_led_clk";
++          pins = "gpio30";
++        };
++
++        pinctrl_robosw_led_data: robosw_led_data {
++          function = "robosw_led_data";
++          pins = "gpio31";
++        };
++
++        pinctrl_nand: nand {
++          function = "nand";
++          group = "nand_grp";
++        };
++
++        pinctrl_gpio35_alt: gpio35_alt {
++          function = "gpio35_alt";
++          pin = "gpio35";
++        };
++
++        pinctrl_dectpd: dectpd {
++          function = "dectpd";
++          group = "dectpd_grp";
++        };
++
++        pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
++          function = "vdsl_phy_override_0";
++          group = "vdsl_phy_override_0_grp";
++        };
++
++        pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
++          function = "vdsl_phy_override_1";
++          group = "vdsl_phy_override_1_grp";
++        };
++
++        pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
++          function = "vdsl_phy_override_2";
++          group = "vdsl_phy_override_2_grp";
++        };
++
++        pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
++          function = "vdsl_phy_override_3";
++          group = "vdsl_phy_override_3_grp";
++        };
++
++        pinctrl_dsl_gpio8: dsl_gpio8 {
++          function = "dsl_gpio8";
++          group = "dsl_gpio8";
++        };
++
++        pinctrl_dsl_gpio9: dsl_gpio9 {
++          function = "dsl_gpio9";
++          group = "dsl_gpio9";
++        };
++      };
++    };
diff --git a/target/linux/bmips/patches-5.10/409-Documentation-add-BCM63268-pincontroller-binding-doc.patch b/target/linux/bmips/patches-5.10/409-Documentation-add-BCM63268-pincontroller-binding-doc.patch
deleted file mode 100644
index ffe842fd73..0000000000
--- a/target/linux/bmips/patches-5.10/409-Documentation-add-BCM63268-pincontroller-binding-doc.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:37:08 +0200
-Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in the BCM63268
-family SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt     | 88 ++++++++++++++++++++++
- 1 file changed, 88 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-@@ -0,0 +1,88 @@
-+* Broadcom BCM63268 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl".
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@100000c0 {
-+	compatible = "brcm,bcm63268-pinctrl";
-+	reg = <0x100000c0 0x8>,
-+	      <0x100000c8 0x8>,
-+	      <0x100000d0 0x4>,
-+	      <0x100000d8 0x4>,
-+	      <0x100000dc 0x4>,
-+	      <0x100000f8 0x4>;
-+	reg-names = "dirout", "dat", "led", "mode",
-+		    "ctrl", "basemode";
-+
-+	gpio-controller;
-+	#gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name		pins		functions
-+-----------------------------------------------------------
-+gpio0		0		led, serial_led_clk
-+gpio1		1		led, serial_led_data
-+gpio2		2		led,
-+gpio3		3		led,
-+gpio4		4		led,
-+gpio5		5		led,
-+gpio6		6		led,
-+gpio7		7		led,
-+gpio8		8		led, hsspi_cs6
-+gpio9		9		led, hsspi_cs7
-+gpio10		10		led, uart1_scts
-+gpio11		11		led, uart1_srts
-+gpio12		12		led, uart1_sdin
-+gpio13		13		led, uart1_sdout
-+gpio14		14		led, ntr_pulse_in
-+gpio15		15		led, dsl_ntr_pulse_out
-+gpio16		16		led, hsspi_cs4
-+gpio17		17		led, hsspi_cs5
-+gpio18		18		led, adsl_spi_miso
-+gpio19		19		led, adsl_spi_mosi
-+gpio20		20		led,
-+gpio21		21		led,
-+gpio22		22		led, vreg_clk
-+gpio23		23		led, pcie_clkreq_b
-+gpio24		24		uart1_scts
-+gpio25		25		uart1_srts
-+gpio26		26		uart1_sdin
-+gpio27		27		uart1_sdout
-+gpio28		28		ntr_pulse_in
-+gpio29		29		dsl_ntr_pulse_out
-+gpio30		30		switch_led_clk
-+gpio31		31		switch_led_data
-+gpio32		32		wifi
-+gpio33		33		wifi
-+gpio34		34		wifi
-+gpio35		35		wifi
-+gpio36		36		wifi
-+gpio37		37		wifi
-+gpio38		38		wifi
-+gpio39		39		wifi
-+gpio40		40		wifi
-+gpio41		41		wifi
-+gpio42		42		wifi
-+gpio43		43		wifi
-+gpio44		44		wifi
-+gpio45		45		wifi
-+gpio46		46		wifi
-+gpio47		47		wifi
-+gpio48		48		wifi
-+gpio49		49		wifi
-+gpio50		50		wifi
-+gpio51		51		wifi
-+nand_grp	2-7,24-31	nand
-+dect_pd_grp	8-9		dect_pd
-+vdsl_phy0_grp	10-11		vdsl_phy0
-+vdsl_phy1_grp	12-13		vdsl_phy1
-+vdsl_phy2_grp	24-25		vdsl_phy2
-+vdsl_phy3_grp	26-27		vdsl_phy3
diff --git a/target/linux/bmips/patches-5.10/410-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch b/target/linux/bmips/patches-5.10/409-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch
similarity index 54%
rename from target/linux/bmips/patches-5.10/410-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch
rename to target/linux/bmips/patches-5.10/409-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch
index 1607f23061..8acc5dbfbb 100644
--- a/target/linux/bmips/patches-5.10/410-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch
+++ b/target/linux/bmips/patches-5.10/409-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch
@@ -1,79 +1,103 @@
-From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
+From 8ec959299a6e4bbdc65d62180aa952ae04cdcf07 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Fri, 24 Jun 2016 22:19:12 +0200
-Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268
+Subject: [PATCH 10/12] pinctrl: add a pincontrol driver for BCM63268
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
 
 Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs
 to different functions. Depending on the mux, these are either single
 pin configurations or whole pin groups.
 
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 ---
- drivers/pinctrl/bcm63xx/Makefile           |   1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++
- 2 files changed, 711 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
+ drivers/pinctrl/bcm/Kconfig            |  11 +
+ drivers/pinctrl/bcm/Makefile           |   1 +
+ drivers/pinctrl/bcm/pinctrl-bcm63268.c | 821 +++++++++++++++++++++++++
+ 3 files changed, 833 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm63268.c
 
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -31,3 +31,10 @@ config PINCTRL_BCM6368
- 	select PINCTRL_BCM63XX
- 	select GENERIC_PINCONF
- 	select MFD_SYSCON
-+
+--- a/drivers/pinctrl/bcm/Kconfig
++++ b/drivers/pinctrl/bcm/Kconfig
+@@ -73,6 +73,17 @@ config PINCTRL_BCM6368
+ 	help
+ 	   Say Y here to enable the Broadcom BCM6368 GPIO driver.
+ 
 +config PINCTRL_BCM63268
-+	bool "BCM63268 pincontrol driver"
++	bool "Broadcom BCM63268 GPIO driver"
++	depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
 +	select PINMUX
 +	select PINCONF
-+	select PINCTRL_BCM63XX
 +	select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328)	+= pinctrl
- obj-$(CONFIG_PINCTRL_BCM6358)	+= pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362)	+= pinctrl-bcm6362.o
- obj-$(CONFIG_PINCTRL_BCM6368)	+= pinctrl-bcm6368.o
-+obj-$(CONFIG_PINCTRL_BCM63268)	+= pinctrl-bcm63268.o
++	select MFD_SYSCON
++	default BMIPS_GENERIC
++	help
++	   Say Y here to enable the Broadcom BCM63268 GPIO driver.
++
+ config PINCTRL_IPROC_GPIO
+ 	bool "Broadcom iProc GPIO (with PINCONF) driver"
+ 	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
+--- a/drivers/pinctrl/bcm/Makefile
++++ b/drivers/pinctrl/bcm/Makefile
+@@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_BCM6328)		+= pinctr
+ obj-$(CONFIG_PINCTRL_BCM6358)		+= pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_BCM6362)		+= pinctrl-bcm6362.o
+ obj-$(CONFIG_PINCTRL_BCM6368)		+= pinctrl-bcm6368.o
++obj-$(CONFIG_PINCTRL_BCM63268)		+= pinctrl-bcm63268.o
+ obj-$(CONFIG_PINCTRL_IPROC_GPIO)	+= pinctrl-iproc-gpio.o
+ obj-$(CONFIG_PINCTRL_CYGNUS_MUX)	+= pinctrl-cygnus-mux.o
+ obj-$(CONFIG_PINCTRL_NS)		+= pinctrl-ns.o
 --- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
-@@ -0,0 +1,710 @@
++++ b/drivers/pinctrl/bcm/pinctrl-bcm63268.c
+@@ -0,0 +1,821 @@
++// SPDX-License-Identifier: GPL-2.0+
 +/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
++ * Driver for BCM63268 GPIO unit (pinctrl + GPIO)
 + *
++ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
 + */
 +
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
 +#include <linux/bitops.h>
 +#include <linux/gpio.h>
++#include <linux/kernel.h>
++#include <linux/mfd/syscon.h>
 +#include <linux/of.h>
 +#include <linux/of_gpio.h>
-+#include <linux/slab.h>
++#include <linux/of_irq.h>
 +#include <linux/platform_device.h>
++#include <linux/regmap.h>
 +
++#include <linux/pinctrl/machine.h>
 +#include <linux/pinctrl/pinconf.h>
 +#include <linux/pinctrl/pinconf-generic.h>
 +#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
 +
 +#include "../core.h"
 +#include "../pinctrl-utils.h"
 +
-+#include "pinctrl-bcm63xx.h"
++#define MODULE_NAME			"bcm63268-pinctrl"
++#define BCM63268_NUM_GPIOS		52
++#define BCM63268_NUM_LEDS		24
 +
-+#define BCM63268_NGPIO			52
++#define BANK_SIZE			sizeof(uint32_t)
++#define PINS_PER_BANK			(BANK_SIZE * BITS_PER_BYTE)
 +
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND			BIT(2) /* GPIOs 2-7, 24-31 */
-+#define BASEMODE_GPIO35			BIT(4) /* GPIO 35 */
-+#define BASEMODE_DECTPD			BIT(5) /* GPIOs 8/9 */
-+#define BASEMODE_VDSL_PHY_0		BIT(6) /* GPIOs 10/11 */
-+#define BASEMODE_VDSL_PHY_1		BIT(7) /* GPIOs 12/13 */
-+#define BASEMODE_VDSL_PHY_2		BIT(8) /* GPIOs 24/25 */
-+#define BASEMODE_VDSL_PHY_3		BIT(9) /* GPIOs 26/27 */
++#define BCM63268_DIROUT_REG		0x04
++#define BCM63268_DATA_REG		0x0c
++#define BCM63268_LED_REG		0x10
++#define BCM63268_MODE_REG		0x18
++#define BCM63268_CTRL_REG		0x1c
++#define BCM63268_BASEMODE_REG		0x38
++#define  BCM63268_BASEMODE_NAND		BIT(2) /* GPIOs 2-7, 24-31 */
++#define  BCM63268_BASEMODE_GPIO35	BIT(4) /* GPIO 35 */
++#define  BCM63268_BASEMODE_DECTPD	BIT(5) /* GPIOs 8/9 */
++#define  BCM63268_BASEMODE_VDSL_PHY_0	BIT(6) /* GPIOs 10/11 */
++#define  BCM63268_BASEMODE_VDSL_PHY_1	BIT(7) /* GPIOs 12/13 */
++#define  BCM63268_BASEMODE_VDSL_PHY_2	BIT(8) /* GPIOs 24/25 */
++#define  BCM63268_BASEMODE_VDSL_PHY_3	BIT(9) /* GPIOs 26/27 */
 +
 +enum bcm63268_pinctrl_reg {
 +	BCM63268_LEDCTRL,
@@ -94,22 +118,17 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	const unsigned num_groups;
 +
 +	enum bcm63268_pinctrl_reg reg;
-+	u32 mask;
++	uint32_t mask;
 +};
 +
 +struct bcm63268_pinctrl {
-+	struct pinctrl_dev *pctldev;
-+	struct pinctrl_desc desc;
++	struct device *dev;
++	struct regmap *regs;
 +
-+	void __iomem *led;
-+	void __iomem *mode;
-+	void __iomem *ctrl;
-+	void __iomem *basemode;
-+
-+	/* register access lock */
-+	spinlock_t lock;
-+
-+	struct gpio_chip gpio[2];
++	struct pinctrl_dev *pctl_dev;
++	struct gpio_chip gpio_chip;
++	struct pinctrl_desc pctl_desc;
++	struct pinctrl_gpio_range gpio_range;
 +};
 +
 +#define BCM63268_PIN(a, b, basemode)			\
@@ -122,18 +141,18 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static const struct pinctrl_pin_desc bcm63268_pins[] = {
 +	PINCTRL_PIN(0, "gpio0"),
 +	PINCTRL_PIN(1, "gpio1"),
-+	BCM63268_PIN(2, "gpio2", BASEMODE_NAND),
-+	BCM63268_PIN(3, "gpio3", BASEMODE_NAND),
-+	BCM63268_PIN(4, "gpio4", BASEMODE_NAND),
-+	BCM63268_PIN(5, "gpio5", BASEMODE_NAND),
-+	BCM63268_PIN(6, "gpio6", BASEMODE_NAND),
-+	BCM63268_PIN(7, "gpio7", BASEMODE_NAND),
-+	BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD),
-+	BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD),
-+	BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0),
-+	BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0),
-+	BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1),
-+	BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1),
++	BCM63268_PIN(2, "gpio2", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(3, "gpio3", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(4, "gpio4", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(5, "gpio5", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(6, "gpio6", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(7, "gpio7", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(8, "gpio8", BCM63268_BASEMODE_DECTPD),
++	BCM63268_PIN(9, "gpio9", BCM63268_BASEMODE_DECTPD),
++	BCM63268_PIN(10, "gpio10", BCM63268_BASEMODE_VDSL_PHY_0),
++	BCM63268_PIN(11, "gpio11", BCM63268_BASEMODE_VDSL_PHY_0),
++	BCM63268_PIN(12, "gpio12", BCM63268_BASEMODE_VDSL_PHY_1),
++	BCM63268_PIN(13, "gpio13", BCM63268_BASEMODE_VDSL_PHY_1),
 +	PINCTRL_PIN(14, "gpio14"),
 +	PINCTRL_PIN(15, "gpio15"),
 +	PINCTRL_PIN(16, "gpio16"),
@@ -144,14 +163,18 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	PINCTRL_PIN(21, "gpio21"),
 +	PINCTRL_PIN(22, "gpio22"),
 +	PINCTRL_PIN(23, "gpio23"),
-+	BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+	BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+	BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+	BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+	BCM63268_PIN(28, "gpio28", BASEMODE_NAND),
-+	BCM63268_PIN(29, "gpio29", BASEMODE_NAND),
-+	BCM63268_PIN(30, "gpio30", BASEMODE_NAND),
-+	BCM63268_PIN(31, "gpio31", BASEMODE_NAND),
++	BCM63268_PIN(24, "gpio24",
++		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_2),
++	BCM63268_PIN(25, "gpio25",
++		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_2),
++	BCM63268_PIN(26, "gpio26",
++		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_3),
++	BCM63268_PIN(27, "gpio27",
++		     BCM63268_BASEMODE_NAND | BCM63268_BASEMODE_VDSL_PHY_3),
++	BCM63268_PIN(28, "gpio28", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(29, "gpio29", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(30, "gpio30", BCM63268_BASEMODE_NAND),
++	BCM63268_PIN(31, "gpio31", BCM63268_BASEMODE_NAND),
 +	PINCTRL_PIN(32, "gpio32"),
 +	PINCTRL_PIN(33, "gpio33"),
 +	PINCTRL_PIN(34, "gpio34"),
@@ -514,14 +537,120 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	BCM63268_MODE_FUN(switch_led_clk),
 +	BCM63268_MODE_FUN(switch_led_data),
 +	BCM63268_CTRL_FUN(wifi),
-+	BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND),
-+	BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD),
-+	BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0),
-+	BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1),
-+	BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2),
-+	BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3),
++	BCM63268_BASEMODE_FUN(nand, BCM63268_BASEMODE_NAND),
++	BCM63268_BASEMODE_FUN(dectpd, BCM63268_BASEMODE_DECTPD),
++	BCM63268_BASEMODE_FUN(vdsl_phy_override_0,
++			      BCM63268_BASEMODE_VDSL_PHY_0),
++	BCM63268_BASEMODE_FUN(vdsl_phy_override_1,
++			      BCM63268_BASEMODE_VDSL_PHY_1),
++	BCM63268_BASEMODE_FUN(vdsl_phy_override_2,
++			      BCM63268_BASEMODE_VDSL_PHY_2),
++	BCM63268_BASEMODE_FUN(vdsl_phy_override_3,
++			      BCM63268_BASEMODE_VDSL_PHY_3),
 +};
 +
++static inline unsigned int bcm63268_bank_pin(unsigned int pin)
++{
++	return pin % PINS_PER_BANK;
++}
++
++static inline unsigned int bcm63268_reg_off(unsigned int reg, unsigned int pin)
++{
++	return reg - (pin / PINS_PER_BANK) * BANK_SIZE;
++}
++
++static int bcm63268_gpio_direction_input(struct gpio_chip *chip,
++					unsigned int pin)
++{
++	struct bcm63268_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm63268_reg_off(BCM63268_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm63268_bank_pin(pin);
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an input GPIO
++	 */
++	ret = pinctrl_gpio_direction_input(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), 0);
++
++	return 0;
++}
++
++static int bcm63268_gpio_direction_output(struct gpio_chip *chip,
++					 unsigned int pin, int value)
++{
++	struct bcm63268_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm63268_reg_off(BCM63268_DATA_REG, pin);
++	unsigned int dirout = bcm63268_reg_off(BCM63268_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm63268_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an output GPIO
++	 */
++	ret = pinctrl_gpio_direction_output(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), BIT(bank_pin));
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++
++	return 0;
++}
++
++static int bcm63268_gpio_get(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm63268_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm63268_reg_off(BCM63268_DATA_REG, pin);
++	unsigned int bank_pin = bcm63268_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, data, &val);
++
++	return !!(val & BIT(bank_pin));
++}
++
++static int bcm63268_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm63268_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm63268_reg_off(BCM63268_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm63268_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, dirout, &val);
++
++	if (val & BIT(bank_pin))
++		return GPIO_LINE_DIRECTION_OUT;
++
++	return GPIO_LINE_DIRECTION_IN;
++}
++
++static void bcm63268_gpio_set(struct gpio_chip *chip, unsigned int pin,
++			     int value)
++{
++	struct bcm63268_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm63268_reg_off(BCM63268_DATA_REG, pin);
++	unsigned int bank_pin = bcm63268_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++}
++
++static int bcm63268_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++	char irq_name[7];
++
++	sprintf(irq_name, "gpio%d", gpio);
++
++	return of_irq_get_byname(chip->of_node, irq_name);
++}
++
 +static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 +{
 +	return ARRAY_SIZE(bcm63268_groups);
@@ -566,74 +695,61 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	return 0;
 +}
 +
-+static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg,
-+			     u32 mask, u32 val)
-+{
-+	unsigned long flags;
-+	u32 tmp;
-+
-+	spin_lock_irqsave(&pctl->lock, flags);
-+	tmp = __raw_readl(reg);
-+	tmp &= ~mask;
-+	tmp |= val;
-+	__raw_writel(tmp, reg);
-+
-+	spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin)
++static void bcm63268_set_gpio(struct bcm63268_pinctrl *pc, unsigned pin)
 +{
 +	const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin];
-+	u32 basemode = (unsigned long)desc->drv_data;
-+	u32 mask = BIT(pin % 32);
++	unsigned int basemode = (unsigned long) desc->drv_data;
++	unsigned int mask = BIT(bcm63268_bank_pin(pin));
 +
 +	if (basemode)
-+		bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0);
++		regmap_update_bits(pc->regs, BCM63268_BASEMODE_REG, basemode,
++				   0);
 +
-+	if (pin < 32) {
++	if (pin < PINS_PER_BANK) {
 +		/* base mode: 0 => gpio, 1 => mux function */
-+		bcm63268_rmw_mux(pctl, pctl->mode, mask, 0);
++		regmap_update_bits(pc->regs, BCM63268_MODE_REG, mask, 0);
 +
 +		/* pins 0-23 might be muxed to led */
-+		if (pin < 24)
-+			bcm63268_rmw_mux(pctl, pctl->led, mask, 0);
-+	} else if (pin < 52) {
++		if (pin < BCM63268_NUM_LEDS)
++			regmap_update_bits(pc->regs, BCM63268_LED_REG, mask,
++					   0);
++	} else if (pin < BCM63268_NUM_GPIOS) {
 +		/* ctrl reg: 0 => wifi function, 1 => gpio */
-+		bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask);
++		regmap_update_bits(pc->regs, BCM63268_CTRL_REG, mask, mask);
 +	}
 +}
 +
 +static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 +				    unsigned selector, unsigned group)
 +{
-+	struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	const struct bcm63268_pingroup *grp = &bcm63268_groups[group];
++	struct bcm63268_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++	const struct bcm63268_pingroup *pg = &bcm63268_groups[group];
 +	const struct bcm63268_function *f = &bcm63268_funcs[selector];
 +	unsigned i;
-+	void __iomem *reg;
-+	u32 val, mask;
++	unsigned int reg;
++	unsigned int val, mask;
 +
-+	for (i = 0; i < grp->num_pins; i++)
-+		bcm63268_set_gpio(pctl, grp->pins[i]);
++	for (i = 0; i < pg->num_pins; i++)
++		bcm63268_set_gpio(pc, pg->pins[i]);
 +
 +	switch (f->reg) {
 +	case BCM63268_LEDCTRL:
-+		reg = pctl->led;
-+		mask = BIT(grp->pins[0]);
-+		val = BIT(grp->pins[0]);
++		reg = BCM63268_LED_REG;
++		mask = BIT(pg->pins[0]);
++		val = BIT(pg->pins[0]);
 +		break;
 +	case BCM63268_MODE:
-+		reg = pctl->mode;
-+		mask = BIT(grp->pins[0]);
-+		val = BIT(grp->pins[0]);
++		reg = BCM63268_MODE_REG;
++		mask = BIT(pg->pins[0]);
++		val = BIT(pg->pins[0]);
 +		break;
 +	case BCM63268_CTRL:
-+		reg = pctl->ctrl;
-+		mask = BIT(grp->pins[0]);
++		reg = BCM63268_CTRL_REG;
++		mask = BIT(pg->pins[0]);
 +		val = 0;
 +		break;
 +	case BCM63268_BASEMODE:
-+		reg = pctl->basemode;
++		reg = BCM63268_BASEMODE_REG;
 +		mask = f->mask;
 +		val = f->mask;
 +		break;
@@ -642,7 +758,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +		return -EINVAL;
 +	}
 +
-+	bcm63268_rmw_mux(pctl, reg, mask, val);
++	regmap_update_bits(pc->regs, reg, mask, val);
 +
 +	return 0;
 +}
@@ -651,84 +767,94 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +					struct pinctrl_gpio_range *range,
 +					unsigned offset)
 +{
-+	struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++	struct bcm63268_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 +
 +	/* disable all functions using this pin */
-+	bcm63268_set_gpio(pctl, offset);
++	bcm63268_set_gpio(pc, offset);
 +
 +	return 0;
 +}
 +
 +static struct pinctrl_ops bcm63268_pctl_ops = {
-+	.get_groups_count	= bcm63268_pinctrl_get_group_count,
-+	.get_group_name		= bcm63268_pinctrl_get_group_name,
-+	.get_group_pins		= bcm63268_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
-+	.dt_free_map		= pinctrl_utils_free_map,
-+#endif
++	.get_groups_count = bcm63268_pinctrl_get_group_count,
++	.get_group_name = bcm63268_pinctrl_get_group_name,
++	.get_group_pins = bcm63268_pinctrl_get_group_pins,
++	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++	.dt_free_map = pinctrl_utils_free_map,
 +};
 +
 +static struct pinmux_ops bcm63268_pmx_ops = {
-+	.get_functions_count	= bcm63268_pinctrl_get_func_count,
-+	.get_function_name	= bcm63268_pinctrl_get_func_name,
-+	.get_function_groups	= bcm63268_pinctrl_get_groups,
-+	.set_mux		= bcm63268_pinctrl_set_mux,
-+	.gpio_request_enable	= bcm63268_gpio_request_enable,
-+	.strict			= true,
++	.get_functions_count = bcm63268_pinctrl_get_func_count,
++	.get_function_name = bcm63268_pinctrl_get_func_name,
++	.get_function_groups = bcm63268_pinctrl_get_groups,
++	.set_mux = bcm63268_pinctrl_set_mux,
++	.gpio_request_enable = bcm63268_gpio_request_enable,
++	.strict = true,
 +};
 +
 +static int bcm63268_pinctrl_probe(struct platform_device *pdev)
 +{
-+	struct bcm63268_pinctrl *pctl;
-+	struct resource *res;
-+	void __iomem *led, *mode, *ctrl, *basemode;
++	struct device *dev = &pdev->dev;
++	struct device_node *np = dev->of_node;
++	struct bcm63268_pinctrl *pc;
++	int err;
 +
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+	led = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(led))
-+		return PTR_ERR(led);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+	mode = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mode))
-+		return PTR_ERR(mode);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+	ctrl = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(ctrl))
-+		return PTR_ERR(ctrl);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+	basemode = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(basemode))
-+		return PTR_ERR(basemode);
-+
-+	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+	if (!pctl)
++	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
++	if (!pc)
 +		return -ENOMEM;
 +
-+	spin_lock_init(&pctl->lock);
++	platform_set_drvdata(pdev, pc);
++	pc->dev = dev;
 +
-+	pctl->led = led;
-+	pctl->mode = mode;
-+	pctl->ctrl = ctrl;
-+	pctl->basemode = basemode;
++	pc->regs = syscon_node_to_regmap(dev->parent->of_node);
++	if (IS_ERR(pc->regs))
++		return PTR_ERR(pc->regs);
 +
-+	pctl->desc.name = dev_name(&pdev->dev);
-+	pctl->desc.owner = THIS_MODULE;
-+	pctl->desc.pctlops = &bcm63268_pctl_ops;
-+	pctl->desc.pmxops = &bcm63268_pmx_ops;
++	pc->gpio_chip.label = MODULE_NAME;
++	pc->gpio_chip.owner = THIS_MODULE;
++	pc->gpio_chip.request = gpiochip_generic_request;
++	pc->gpio_chip.free = gpiochip_generic_free;
++	pc->gpio_chip.direction_input = bcm63268_gpio_direction_input;
++	pc->gpio_chip.direction_output = bcm63268_gpio_direction_output;
++	pc->gpio_chip.get_direction = bcm63268_gpio_get_direction;
++	pc->gpio_chip.get = bcm63268_gpio_get;
++	pc->gpio_chip.set = bcm63268_gpio_set;
++	pc->gpio_chip.set_config = gpiochip_generic_config;
++	pc->gpio_chip.base = -1;
++	pc->gpio_chip.ngpio = BCM63268_NUM_GPIOS;
++	pc->gpio_chip.can_sleep = false;
++	pc->gpio_chip.parent = dev;
++	pc->gpio_chip.of_node = np;
 +
-+	pctl->desc.npins = ARRAY_SIZE(bcm63268_pins);
-+	pctl->desc.pins = bcm63268_pins;
++	if (of_get_property(np, "interrupt-names", NULL))
++		pc->gpio_chip.to_irq = bcm63268_gpio_to_irq;
 +
-+	platform_set_drvdata(pdev, pctl);
++	err = gpiochip_add_data(&pc->gpio_chip, pc);
++	if (err) {
++		dev_err(dev, "could not add GPIO chip\n");
++		return err;
++	}
 +
-+	pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+						 pctl->gpio, BCM63268_NGPIO);
-+	if (IS_ERR(pctl->pctldev))
-+		return PTR_ERR(pctl->pctldev);
++	pc->pctl_desc.name = MODULE_NAME,
++	pc->pctl_desc.pins = bcm63268_pins,
++	pc->pctl_desc.npins = ARRAY_SIZE(bcm63268_pins),
++	pc->pctl_desc.pctlops = &bcm63268_pctl_ops,
++	pc->pctl_desc.pmxops = &bcm63268_pmx_ops,
++	pc->pctl_desc.owner = THIS_MODULE,
++
++	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
++	if (IS_ERR(pc->pctl_dev)) {
++		gpiochip_remove(&pc->gpio_chip);
++		return PTR_ERR(pc->pctl_dev);
++	}
++
++	pc->gpio_range.name = MODULE_NAME;
++	pc->gpio_range.npins = BCM63268_NUM_GPIOS;
++	pc->gpio_range.base = pc->gpio_chip.base;
++	pc->gpio_range.gc = &pc->gpio_chip;
++	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
++
++	dev_info(dev, "registered\n");
 +
 +	return 0;
 +}
@@ -741,7 +867,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static struct platform_driver bcm63268_pinctrl_driver = {
 +	.probe = bcm63268_pinctrl_probe,
 +	.driver = {
-+		.name = "bcm63268-pinctrl",
++		.name = MODULE_NAME,
 +		.of_match_table = bcm63268_pinctrl_match,
 +	},
 +};
diff --git a/target/linux/bmips/patches-5.10/410-Documentation-add-BCM6318-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/410-Documentation-add-BCM6318-pincontroller-binding-docu.patch
new file mode 100644
index 0000000000..6577038756
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/410-Documentation-add-BCM6318-pincontroller-binding-docu.patch
@@ -0,0 +1,194 @@
+From f909bf5d5cf3db6b35c082f27f7982dfcb1447c2 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 27 Jul 2016 11:38:05 +0200
+Subject: [PATCH 11/12] Documentation: add BCM6318 pincontroller binding
+ documentation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding documentation for the pincontrol core found in BCM6318 SoCs.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../pinctrl/brcm,bcm6318-pinctrl.yaml         | 173 ++++++++++++++++++
+ 1 file changed, 173 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml
+@@ -0,0 +1,173 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6318-pinctrl.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM6318 pin controller
++
++maintainers:
++  - Álvaro Fernández Rojas <noltari@gmail.com>
++  - Jonas Gorski <jonas.gorski@gmail.com>
++
++description: |+
++  The pin controller node should be the child of a syscon node.
++
++  Refer to the the bindings described in
++  Documentation/devicetree/bindings/mfd/syscon.yaml
++
++properties:
++  compatible:
++    const: brcm,bcm6318-pinctrl
++
++  gpio-controller: true
++
++  '#gpio-cells':
++    description:
++      Specifies the pin number and flags, as defined in
++      include/dt-bindings/gpio/gpio.h
++    const: 2
++
++  interrupts-extended:
++    description:
++      One interrupt per each of the 2 GPIO ports supported by the controller,
++      sorted by port number ascending order.
++    minItems: 2
++    maxItems: 2
++
++patternProperties:
++  '^.*$':
++    if:
++      type: object
++    then:
++      properties:
++        function:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ ephy0_spd_led, ephy1_spd_led, ephy2_spd_led, ephy3_spd_led,
++                  ephy0_act_led, ephy1_act_led, ephy2_act_led, ephy3_act_led,
++                  serial_led_data, serial_led_clk, inet_act_led, inet_fail_led,
++                  dsl_led, post_fail_led, wlan_wps_led, usb_pwron,
++                  usb_device_led, usb_active ]
++
++        pins:
++          $ref: "/schemas/types.yaml#/definitions/string"
++          enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
++                  gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio40 ]
++
++required:
++  - compatible
++  - gpio-controller
++  - '#gpio-cells'
++
++additionalProperties: false
++
++examples:
++  - |
++    gpio@10000080 {
++      compatible = "syscon", "simple-mfd";
++      reg = <0x10000080 0x80>;
++
++      pinctrl: pinctrl {
++        compatible = "brcm,bcm6318-pinctrl";
++
++        gpio-controller;
++        #gpio-cells = <2>;
++
++        interrupts-extended = <&ext_intc 0 0>,
++                              <&ext_intc 1 0>;
++        interrupt-names = "gpio33",
++                          "gpio34";
++
++        pinctrl_ephy0_spd_led: ephy0_spd_led {
++          function = "ephy0_spd_led";
++          pins = "gpio0";
++        };
++
++        pinctrl_ephy1_spd_led: ephy1_spd_led {
++          function = "ephy1_spd_led";
++          pins = "gpio1";
++        };
++
++        pinctrl_ephy2_spd_led: ephy2_spd_led {
++          function = "ephy2_spd_led";
++          pins = "gpio2";
++        };
++
++        pinctrl_ephy3_spd_led: ephy3_spd_led {
++          function = "ephy3_spd_led";
++          pins = "gpio3";
++        };
++
++        pinctrl_ephy0_act_led: ephy0_act_led {
++          function = "ephy0_act_led";
++          pins = "gpio4";
++        };
++
++        pinctrl_ephy1_act_led: ephy1_act_led {
++          function = "ephy1_act_led";
++          pins = "gpio5";
++        };
++
++        pinctrl_ephy2_act_led: ephy2_act_led {
++          function = "ephy2_act_led";
++          pins = "gpio6";
++        };
++
++        pinctrl_ephy3_act_led: ephy3_act_led {
++          function = "ephy3_act_led";
++          pins = "gpio7";
++        };
++
++        pinctrl_serial_led: serial_led {
++          pinctrl_serial_led_data: serial_led_data {
++            function = "serial_led_data";
++            pins = "gpio6";
++          };
++
++          pinctrl_serial_led_clk: serial_led_clk {
++            function = "serial_led_clk";
++            pins = "gpio7";
++          };
++        };
++
++        pinctrl_inet_act_led: inet_act_led {
++          function = "inet_act_led";
++          pins = "gpio8";
++        };
++
++        pinctrl_inet_fail_led: inet_fail_led {
++          function = "inet_fail_led";
++          pins = "gpio9";
++        };
++
++        pinctrl_dsl_led: dsl_led {
++          function = "dsl_led";
++          pins = "gpio10";
++        };
++
++        pinctrl_post_fail_led: post_fail_led {
++          function = "post_fail_led";
++          pins = "gpio11";
++        };
++
++        pinctrl_wlan_wps_led: wlan_wps_led {
++          function = "wlan_wps_led";
++          pins = "gpio12";
++        };
++
++        pinctrl_usb_pwron: usb_pwron {
++          function = "usb_pwron";
++          pins = "gpio13";
++        };
++
++        pinctrl_usb_device_led: usb_device_led {
++          function = "usb_device_led";
++          pins = "gpio13";
++        };
++
++        pinctrl_usb_active: usb_active {
++          function = "usb_active";
++          pins = "gpio40";
++        };
++      };
++    };
diff --git a/target/linux/bmips/patches-5.10/411-Documentation-add-BCM6318-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/411-Documentation-add-BCM6318-pincontroller-binding-docu.patch
deleted file mode 100644
index 5d4265f7fe..0000000000
--- a/target/linux/bmips/patches-5.10/411-Documentation-add-BCM6318-pincontroller-binding-docu.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:38:05 +0200
-Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6318 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt      | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6318 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6318-pinctrl".
-+- regs: Register specifiers of dirout, dat, mode, mux, and pad registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux", "pad".
-+- gpio-controller: Identifies this node as a gpio controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+	compatible = "brcm,bcm6318-pinctrl";
-+	reg = <0x10000080 0x08>,
-+	      <0x10000088 0x08>,
-+	      <0x10000098 0x04>,
-+	      <0x1000009c 0x0c>,
-+	      <0x100000d4 0x18>;
-+	reg-names = "dirout", "dat", "mode", "mux", "pad";
-+
-+	gpio-controller;
-+	#gpio-cells = <2>;
-+};
-+
-+
-+Available pins/groups and functions:
-+
-+name		pins	functions
-+-----------------------------------------------------------
-+gpio0		0	led, ephy0_spd_led
-+gpio1		1	led, ephy1_spd_led
-+gpio2		2	led, ephy2_spd_led
-+gpio3		3	led, ephy3_spd_led
-+gpio4		4	led, ephy0_act_led
-+gpio5		5	led, ephy1_act_led
-+gpio6		6	led, ephy2_act_led, serial_led_data
-+gpio7		7	led, ephy3_act_led, serial_led_clk
-+gpio8		8	led, inet_act_led
-+gpio9		9	led, inet_fail_led
-+gpio10		10	led, dsl_led
-+gpio11		11	led, post_fail_led
-+gpio12		12	led, wlan_wps_led
-+gpio13		13	led, usb_pwron, usb_device_led
-+gpio14		14	led
-+gpio15		15	led
-+gpio16		16	led
-+gpio17		17	led
-+gpio18		18	led
-+gpio19		19	led
-+gpio20		20	led
-+gpio21		21	led
-+gpio22		22	led
-+gpio23		23	led
-+gpio24		24	-
-+gpio25		25	-
-+gpio26		26	-
-+gpio27		27	-
-+gpio28		28	-
-+gpio29		29	-
-+gpio30		30	-
-+gpio31		31	-
-+gpio32		32	-
-+gpio33		33	-
-+gpio34		34	-
-+gpio35		35	-
-+gpio36		36	-
-+gpio37		37	-
-+gpio38		38	-
-+gpio39		39	-
-+gpio40		40	usb_active
-+gpio41		41	-
-+gpio42		42	-
-+gpio43		43	-
-+gpio44		44	-
-+gpio45		45	-
-+gpio46		46	-
-+gpio47		47	-
-+gpio48		48	-
-+gpio49		49	-
diff --git a/target/linux/bmips/patches-5.10/412-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch b/target/linux/bmips/patches-5.10/411-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch
similarity index 55%
rename from target/linux/bmips/patches-5.10/412-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch
rename to target/linux/bmips/patches-5.10/411-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch
index 1cc907434c..b57b49d35f 100644
--- a/target/linux/bmips/patches-5.10/412-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch
+++ b/target/linux/bmips/patches-5.10/411-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch
@@ -1,77 +1,96 @@
-From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
+From e1764f96eb563a11c822ff91d1c6d7ed01c3925b Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Fri, 24 Jun 2016 22:20:39 +0200
-Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
+Subject: [PATCH 12/12] pinctrl: add a pincontrol driver for BCM6318
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
 
 Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
 to different functions. BCM6318 is similar to BCM6328 with the addition
 of a pad register, and the GPIO meaning of the mux register changes
 based on the GPIO number.
 
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 ---
- drivers/pinctrl/bcm63xx/Kconfig           |   7 +
- drivers/pinctrl/bcm63xx/Makefile          |   1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
- 3 files changed, 572 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
+ drivers/pinctrl/bcm/Kconfig           |  11 +
+ drivers/pinctrl/bcm/Makefile          |   1 +
+ drivers/pinctrl/bcm/pinctrl-bcm6318.c | 674 ++++++++++++++++++++++++++
+ 3 files changed, 686 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6318.c
 
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX
- 	bool
- 	select GPIO_GENERIC
+--- a/drivers/pinctrl/bcm/Kconfig
++++ b/drivers/pinctrl/bcm/Kconfig
+@@ -29,6 +29,17 @@ config PINCTRL_BCM2835
+ 	help
+ 	   Say Y here to enable the Broadcom BCM2835 GPIO driver.
  
 +config PINCTRL_BCM6318
-+	bool "BCM6318 pincontrol driver"
++	bool "Broadcom BCM6318 GPIO driver"
++	depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
 +	select PINMUX
 +	select PINCONF
-+	select PINCTRL_BCM63XX
 +	select GENERIC_PINCONF
++	select MFD_SYSCON
++	default BMIPS_GENERIC
++	help
++	   Say Y here to enable the Broadcom BCM6318 GPIO driver.
 +
  config PINCTRL_BCM6328
- 	bool "BCM6328 pincontrol driver"
- 	select PINMUX
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,4 +1,5 @@
- obj-$(CONFIG_PINCTRL_BCM63XX)	+= pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6318)	+= pinctrl-bcm6318.o
- obj-$(CONFIG_PINCTRL_BCM6328)	+= pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6358)	+= pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362)	+= pinctrl-bcm6362.o
+ 	bool "Broadcom BCM6328 GPIO driver"
+ 	depends on OF_GPIO && (BMIPS_GENERIC || COMPILE_TEST)
+--- a/drivers/pinctrl/bcm/Makefile
++++ b/drivers/pinctrl/bcm/Makefile
+@@ -3,6 +3,7 @@
+ 
+ obj-$(CONFIG_PINCTRL_BCM281XX)		+= pinctrl-bcm281xx.o
+ obj-$(CONFIG_PINCTRL_BCM2835)		+= pinctrl-bcm2835.o
++obj-$(CONFIG_PINCTRL_BCM6318)		+= pinctrl-bcm6318.o
+ obj-$(CONFIG_PINCTRL_BCM6328)		+= pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6358)		+= pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_BCM6362)		+= pinctrl-bcm6362.o
 --- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
-@@ -0,0 +1,564 @@
++++ b/drivers/pinctrl/bcm/pinctrl-bcm6318.c
+@@ -0,0 +1,674 @@
++// SPDX-License-Identifier: GPL-2.0+
 +/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
++ * Driver for BCM6318 GPIO unit (pinctrl + GPIO)
 + *
++ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
 + */
 +
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
 +#include <linux/bitops.h>
 +#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
++#include <linux/kernel.h>
++#include <linux/mfd/syscon.h>
 +#include <linux/of.h>
 +#include <linux/of_gpio.h>
-+#include <linux/slab.h>
++#include <linux/of_irq.h>
 +#include <linux/platform_device.h>
++#include <linux/regmap.h>
 +
++#include <linux/pinctrl/machine.h>
 +#include <linux/pinctrl/pinconf.h>
 +#include <linux/pinctrl/pinconf-generic.h>
 +#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
 +
 +#include "../core.h"
 +#include "../pinctrl-utils.h"
 +
-+#include "pinctrl-bcm63xx.h"
++#define MODULE_NAME		"bcm6318-pinctrl"
++#define BCM6318_NUM_GPIOS	50
++#define BCM6318_NUM_MUX		48
 +
-+#define BCM6318_NGPIO		50
++#define BANK_SIZE		sizeof(uint32_t)
++#define PINS_PER_BANK		(BANK_SIZE * BITS_PER_BYTE)
++
++#define BCM6318_DIROUT_REG	0x04
++#define BCM6318_DATA_REG	0x0c
++#define BCM6318_MODE_REG	0x18
++#define BCM6318_MUX_REG		0x1c
++#define BCM6318_PAD_REG		0x54
 +
 +struct bcm6318_pingroup {
 +	const char *name;
@@ -89,17 +108,13 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +};
 +
 +struct bcm6318_pinctrl {
-+	struct pinctrl_dev *pctldev;
-+	struct pinctrl_desc desc;
++	struct device *dev;
++	struct regmap *regs;
 +
-+	void __iomem *mode;
-+	void __iomem *mux[3];
-+	void __iomem *pad[6];
-+
-+	/* register access lock */
-+	spinlock_t lock;
-+
-+	struct gpio_chip gpio[2];
++	struct pinctrl_dev *pctl_dev;
++	struct gpio_chip gpio_chip;
++	struct pinctrl_desc pctl_desc;
++	struct pinctrl_gpio_range gpio_range;
 +};
 +
 +static const struct pinctrl_pin_desc bcm6318_pins[] = {
@@ -405,6 +420,118 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	BCM6318_MUX_FUN(usb_active, 2),
 +};
 +
++static inline unsigned int bcm6318_bank_pin(unsigned int pin)
++{
++	return pin % PINS_PER_BANK;
++}
++
++static inline unsigned int bcm6318_mux_off(unsigned int pin)
++{
++	return BCM6318_MUX_REG + (pin / 16) * BANK_SIZE;
++}
++
++static inline unsigned int bcm6318_pad_off(unsigned int pin)
++{
++	return BCM6318_PAD_REG + (pin / 8) * BANK_SIZE;
++}
++
++static inline unsigned int bcm6318_reg_off(unsigned int reg, unsigned int pin)
++{
++	return reg - (pin / PINS_PER_BANK) * BANK_SIZE;
++}
++
++static int bcm6318_gpio_direction_input(struct gpio_chip *chip,
++					unsigned int pin)
++{
++	struct bcm6318_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6318_reg_off(BCM6318_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6318_bank_pin(pin);
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an input GPIO
++	 */
++	ret = pinctrl_gpio_direction_input(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), 0);
++
++	return 0;
++}
++
++static int bcm6318_gpio_direction_output(struct gpio_chip *chip,
++					 unsigned int pin, int value)
++{
++	struct bcm6318_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6318_reg_off(BCM6318_DATA_REG, pin);
++	unsigned int dirout = bcm6318_reg_off(BCM6318_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6318_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++	int ret;
++
++	/*
++	 * Check with the pinctrl driver whether this pin is usable as
++	 * an output GPIO
++	 */
++	ret = pinctrl_gpio_direction_output(chip->base + pin);
++	if (ret)
++		return ret;
++
++	regmap_update_bits(pc->regs, dirout, BIT(bank_pin), BIT(bank_pin));
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++
++	return 0;
++}
++
++static int bcm6318_gpio_get(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6318_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6318_reg_off(BCM6318_DATA_REG, pin);
++	unsigned int bank_pin = bcm6318_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, data, &val);
++
++	return !!(val & BIT(bank_pin));
++}
++
++static int bcm6318_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
++{
++	struct bcm6318_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int dirout = bcm6318_reg_off(BCM6318_DIROUT_REG, pin);
++	unsigned int bank_pin = bcm6318_bank_pin(pin);
++	unsigned int val;
++
++	regmap_read(pc->regs, dirout, &val);
++
++	if (val & BIT(bank_pin))
++		return GPIO_LINE_DIRECTION_OUT;
++
++	return GPIO_LINE_DIRECTION_IN;
++}
++
++static void bcm6318_gpio_set(struct gpio_chip *chip, unsigned int pin,
++			     int value)
++{
++	struct bcm6318_pinctrl *pc = gpiochip_get_data(chip);
++	unsigned int data = bcm6318_reg_off(BCM6318_DATA_REG, pin);
++	unsigned int bank_pin = bcm6318_bank_pin(pin);
++	unsigned int val = value ? BIT(bank_pin) : 0;
++
++	regmap_update_bits(pc->regs, data, BIT(bank_pin), val);
++}
++
++static int bcm6318_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++	char irq_name[7];
++
++	sprintf(irq_name, "gpio%d", gpio);
++
++	return of_irq_get_byname(chip->of_node, irq_name);
++}
++
 +static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 +{
 +	return ARRAY_SIZE(bcm6318_groups);
@@ -448,51 +575,36 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +	return 0;
 +}
 +
-+static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
-+			    u32 mode, u32 mux)
++static inline void bcm6318_rmw_mux(struct bcm6318_pinctrl *pc, unsigned pin,
++				   unsigned int mode, unsigned int mux)
 +{
-+	unsigned long flags;
-+	u32 reg;
++	if (pin < PINS_PER_BANK)
++		regmap_update_bits(pc->regs, BCM6318_MODE_REG, BIT(pin),
++				   mode ? BIT(pin) : 0);
 +
-+	spin_lock_irqsave(&pctl->lock, flags);
-+	if (pin < 32) {
-+		reg = __raw_readl(pctl->mode);
-+		reg &= ~BIT(pin);
-+		if (mode)
-+			reg |= BIT(pin);
-+		__raw_writel(reg, pctl->mode);
-+	}
-+
-+	if (pin < 48) {
-+		reg = __raw_readl(pctl->mux[pin / 16]);
-+		reg &= ~(3UL << ((pin % 16) * 2));
-+		reg |= mux << ((pin % 16) * 2);
-+		__raw_writel(reg, pctl->mux[pin / 16]);
-+	}
-+	spin_unlock_irqrestore(&pctl->lock, flags);
++	if (pin < BCM6318_NUM_MUX)
++		regmap_update_bits(pc->regs,
++				   bcm6318_mux_off(pin),
++				   3UL << ((pin % 16) * 2),
++				   mux << ((pin % 16) * 2));
 +}
 +
-+static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
++static inline void bcm6318_set_pad(struct bcm6318_pinctrl *pc, unsigned pin,
++				   uint8_t val)
 +{
-+	unsigned long flags;
-+	u32 reg;
-+
-+	spin_lock_irqsave(&pctl->lock, flags);
-+	reg = __raw_readl(pctl->pad[pin / 8]);
-+	reg &= ~(0xfUL << ((pin % 8) * 4));
-+	reg |= val << ((pin % 8) * 4);
-+	__raw_writel(reg, pctl->pad[pin / 8]);
-+	spin_unlock_irqrestore(&pctl->lock, flags);
++	regmap_update_bits(pc->regs, bcm6318_pad_off(pin),
++			   0xfUL << ((pin % 8) * 4),
++			   val << ((pin % 8) * 4));
 +}
 +
 +static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 +				   unsigned selector, unsigned group)
 +{
-+	struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+	const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
++	struct bcm6318_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++	const struct bcm6318_pingroup *pg = &bcm6318_groups[group];
 +	const struct bcm6318_function *f = &bcm6318_funcs[selector];
 +
-+	bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
++	bcm6318_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val);
 +
 +	return 0;
 +}
@@ -501,94 +613,102 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +				       struct pinctrl_gpio_range *range,
 +				       unsigned offset)
 +{
-+	struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++	struct bcm6318_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 +
 +	/* disable all functions using this pin */
 +	if (offset < 13) {
 +		/* GPIOs 0-12 use mux 0 as GPIO function */
-+		bcm6318_rmw_mux(pctl, offset, 0, 0);
++		bcm6318_rmw_mux(pc, offset, 0, 0);
 +	} else if (offset < 42) {
 +		/* GPIOs 13-41 use mux 3 as GPIO function */
-+		bcm6318_rmw_mux(pctl, offset, 0, 3);
++		bcm6318_rmw_mux(pc, offset, 0, 3);
 +
-+		/* FIXME: revert to old value for non gpio? */
-+		bcm6318_set_pad(pctl, offset, 0);
-+	} else {
-+		/* no idea, really */
++		bcm6318_set_pad(pc, offset, 0);
 +	}
 +
 +	return 0;
 +}
 +
 +static struct pinctrl_ops bcm6318_pctl_ops = {
-+	.get_groups_count	= bcm6318_pinctrl_get_group_count,
-+	.get_group_name		= bcm6318_pinctrl_get_group_name,
-+	.get_group_pins		= bcm6318_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
-+	.dt_free_map		= pinctrl_utils_free_map,
-+#endif
++	.get_groups_count = bcm6318_pinctrl_get_group_count,
++	.get_group_name = bcm6318_pinctrl_get_group_name,
++	.get_group_pins = bcm6318_pinctrl_get_group_pins,
++	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++	.dt_free_map = pinctrl_utils_free_map,
 +};
 +
 +static struct pinmux_ops bcm6318_pmx_ops = {
-+	.get_functions_count	= bcm6318_pinctrl_get_func_count,
-+	.get_function_name	= bcm6318_pinctrl_get_func_name,
-+	.get_function_groups	= bcm6318_pinctrl_get_groups,
-+	.set_mux		= bcm6318_pinctrl_set_mux,
-+	.gpio_request_enable	= bcm6318_gpio_request_enable,
-+	.strict 		= true,
++	.get_functions_count = bcm6318_pinctrl_get_func_count,
++	.get_function_name = bcm6318_pinctrl_get_func_name,
++	.get_function_groups = bcm6318_pinctrl_get_groups,
++	.set_mux = bcm6318_pinctrl_set_mux,
++	.gpio_request_enable = bcm6318_gpio_request_enable,
++	.strict = true,
 +};
 +
 +static int bcm6318_pinctrl_probe(struct platform_device *pdev)
 +{
-+	struct bcm6318_pinctrl *pctl;
-+	struct resource *res;
-+	void __iomem *mode, *mux, *pad;
-+	unsigned i;
++	struct device *dev = &pdev->dev;
++	struct device_node *np = dev->of_node;
++	struct bcm6318_pinctrl *pc;
++	int err;
 +
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+	mode = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mode))
-+		return PTR_ERR(mode);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+	mux = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mux))
-+		return PTR_ERR(mux);
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
-+	pad = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(pad))
-+		return PTR_ERR(pad);
-+
-+	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+	if (!pctl)
++	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
++	if (!pc)
 +		return -ENOMEM;
 +
-+	spin_lock_init(&pctl->lock);
++	platform_set_drvdata(pdev, pc);
++	pc->dev = dev;
 +
-+	pctl->mode = mode;
++	pc->regs = syscon_node_to_regmap(dev->parent->of_node);
++	if (IS_ERR(pc->regs))
++		return PTR_ERR(pc->regs);
 +
-+	for (i = 0; i < 3; i++)
-+		pctl->mux[i] = mux + (i * 4);
++	pc->gpio_chip.label = MODULE_NAME;
++	pc->gpio_chip.owner = THIS_MODULE;
++	pc->gpio_chip.request = gpiochip_generic_request;
++	pc->gpio_chip.free = gpiochip_generic_free;
++	pc->gpio_chip.direction_input = bcm6318_gpio_direction_input;
++	pc->gpio_chip.direction_output = bcm6318_gpio_direction_output;
++	pc->gpio_chip.get_direction = bcm6318_gpio_get_direction;
++	pc->gpio_chip.get = bcm6318_gpio_get;
++	pc->gpio_chip.set = bcm6318_gpio_set;
++	pc->gpio_chip.set_config = gpiochip_generic_config;
++	pc->gpio_chip.base = -1;
++	pc->gpio_chip.ngpio = BCM6318_NUM_GPIOS;
++	pc->gpio_chip.can_sleep = false;
++	pc->gpio_chip.parent = dev;
++	pc->gpio_chip.of_node = np;
 +
-+	for (i = 0; i < 6; i++)
-+		pctl->pad[i] = pad + (i * 4);
++	if (of_get_property(np, "interrupt-names", NULL))
++		pc->gpio_chip.to_irq = bcm6318_gpio_to_irq;
 +
-+	pctl->desc.name = dev_name(&pdev->dev);
-+	pctl->desc.owner = THIS_MODULE;
-+	pctl->desc.pctlops = &bcm6318_pctl_ops;
-+	pctl->desc.pmxops = &bcm6318_pmx_ops;
++	err = gpiochip_add_data(&pc->gpio_chip, pc);
++	if (err) {
++		dev_err(dev, "could not add GPIO chip\n");
++		return err;
++	}
 +
-+	pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
-+	pctl->desc.pins = bcm6318_pins;
++	pc->pctl_desc.name = MODULE_NAME,
++	pc->pctl_desc.pins = bcm6318_pins,
++	pc->pctl_desc.npins = ARRAY_SIZE(bcm6318_pins),
++	pc->pctl_desc.pctlops = &bcm6318_pctl_ops,
++	pc->pctl_desc.pmxops = &bcm6318_pmx_ops,
++	pc->pctl_desc.owner = THIS_MODULE,
 +
-+	platform_set_drvdata(pdev, pctl);
++	pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
++	if (IS_ERR(pc->pctl_dev)) {
++		gpiochip_remove(&pc->gpio_chip);
++		return PTR_ERR(pc->pctl_dev);
++	}
 +
-+	pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+						 pctl->gpio, BCM6318_NGPIO);
-+	if (IS_ERR(pctl->pctldev))
-+		return PTR_ERR(pctl->pctldev);
++	pc->gpio_range.name = MODULE_NAME;
++	pc->gpio_range.npins = BCM6318_NUM_GPIOS;
++	pc->gpio_range.base = pc->gpio_chip.base;
++	pc->gpio_range.gc = &pc->gpio_chip;
++	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
++
++	dev_info(dev, "registered\n");
 +
 +	return 0;
 +}
@@ -601,7 +721,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
 +static struct platform_driver bcm6318_pinctrl_driver = {
 +	.probe = bcm6318_pinctrl_probe,
 +	.driver = {
-+		.name = "bcm6318-pinctrl",
++		.name = MODULE_NAME,
 +		.of_match_table = bcm6318_pinctrl_match,
 +	},
 +};
diff --git a/target/linux/generic/pending-5.10/203-kallsyms_uncompressed.patch b/target/linux/generic/pending-5.10/203-kallsyms_uncompressed.patch
index 35d0333ad5..348a5afa3d 100644
--- a/target/linux/generic/pending-5.10/203-kallsyms_uncompressed.patch
+++ b/target/linux/generic/pending-5.10/203-kallsyms_uncompressed.patch
@@ -65,7 +65,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  static int absolute_percpu;
  static int base_relative;
  
-@@ -480,6 +481,9 @@ static void write_src(void)
+@@ -486,6 +487,9 @@ static void write_src(void)
  
  	free(markers);
  
@@ -75,7 +75,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	output_label("kallsyms_token_table");
  	off = 0;
  	for (i = 0; i < 256; i++) {
-@@ -531,6 +535,9 @@ static unsigned char *find_token(unsigne
+@@ -537,6 +541,9 @@ static unsigned char *find_token(unsigne
  {
  	int i;
  
@@ -85,7 +85,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	for (i = 0; i < len - 1; i++) {
  		if (str[i] == token[0] && str[i+1] == token[1])
  			return &str[i];
-@@ -603,6 +610,9 @@ static void optimize_result(void)
+@@ -609,6 +616,9 @@ static void optimize_result(void)
  {
  	int i, best;
  
@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	/* using the '\0' symbol last allows compress_symbols to use standard
  	 * fast string functions */
  	for (i = 255; i >= 0; i--) {
-@@ -767,6 +777,8 @@ int main(int argc, char **argv)
+@@ -773,6 +783,8 @@ int main(int argc, char **argv)
  				absolute_percpu = 1;
  			else if (strcmp(argv[i], "--base-relative") == 0)
  				base_relative = 1;
diff --git a/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
index cd1b30b4af..6d0c84c494 100644
--- a/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
+++ b/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
@@ -32,7 +32,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	__u16			tc_index;	/* traffic control index */
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -5962,6 +5962,9 @@ static enum gro_result dev_gro_receive(s
+@@ -5965,6 +5965,9 @@ static enum gro_result dev_gro_receive(s
  	int same_flow;
  	int grow;
  
@@ -42,7 +42,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	if (netif_elide_gro(skb->dev))
  		goto normal;
  
-@@ -7790,6 +7793,48 @@ static void __netdev_adjacent_dev_unlink
+@@ -7793,6 +7796,48 @@ static void __netdev_adjacent_dev_unlink
  					   &upper_dev->adj_list.lower);
  }
  
@@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  static int __netdev_upper_dev_link(struct net_device *dev,
  				   struct net_device *upper_dev, bool master,
  				   void *upper_priv, void *upper_info,
-@@ -7841,6 +7886,7 @@ static int __netdev_upper_dev_link(struc
+@@ -7844,6 +7889,7 @@ static int __netdev_upper_dev_link(struc
  	if (ret)
  		return ret;
  
@@ -99,7 +99,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
  					    &changeupper_info.info);
  	ret = notifier_to_errno(ret);
-@@ -7937,6 +7983,7 @@ static void __netdev_upper_dev_unlink(st
+@@ -7940,6 +7986,7 @@ static void __netdev_upper_dev_unlink(st
  
  	__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
  
@@ -107,7 +107,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
  				      &changeupper_info.info);
  
-@@ -8723,6 +8770,7 @@ int dev_set_mac_address(struct net_devic
+@@ -8726,6 +8773,7 @@ int dev_set_mac_address(struct net_devic
  	if (err)
  		return err;
  	dev->addr_assign_type = NET_ADDR_SET;
diff --git a/target/linux/generic/pending-5.10/690-net-add-support-for-threaded-NAPI-polling.patch b/target/linux/generic/pending-5.10/690-net-add-support-for-threaded-NAPI-polling.patch
index 2979934926..b2c2d00ec0 100644
--- a/target/linux/generic/pending-5.10/690-net-add-support-for-threaded-NAPI-polling.patch
+++ b/target/linux/generic/pending-5.10/690-net-add-support-for-threaded-NAPI-polling.patch
@@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  static int netif_rx_internal(struct sk_buff *skb);
  static int call_netdevice_notifiers_info(unsigned long val,
-@@ -6404,6 +6405,11 @@ void __napi_schedule(struct napi_struct
+@@ -6407,6 +6408,11 @@ void __napi_schedule(struct napi_struct
  {
  	unsigned long flags;
  
@@ -99,7 +99,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	local_irq_save(flags);
  	____napi_schedule(this_cpu_ptr(&softnet_data), n);
  	local_irq_restore(flags);
-@@ -6451,6 +6457,11 @@ EXPORT_SYMBOL(napi_schedule_prep);
+@@ -6454,6 +6460,11 @@ EXPORT_SYMBOL(napi_schedule_prep);
   */
  void __napi_schedule_irqoff(struct napi_struct *n)
  {
@@ -111,7 +111,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	____napi_schedule(this_cpu_ptr(&softnet_data), n);
  }
  EXPORT_SYMBOL(__napi_schedule_irqoff);
-@@ -6712,6 +6723,86 @@ static void init_gro_hash(struct napi_st
+@@ -6715,6 +6726,86 @@ static void init_gro_hash(struct napi_st
  	napi->gro_bitmask = 0;
  }
  
@@ -198,7 +198,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
  		    int (*poll)(struct napi_struct *, int), int weight)
  {
-@@ -6735,6 +6826,7 @@ void netif_napi_add(struct net_device *d
+@@ -6738,6 +6829,7 @@ void netif_napi_add(struct net_device *d
  #ifdef CONFIG_NETPOLL
  	napi->poll_owner = -1;
  #endif
@@ -206,7 +206,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	set_bit(NAPI_STATE_SCHED, &napi->state);
  	set_bit(NAPI_STATE_NPSVC, &napi->state);
  	list_add_rcu(&napi->dev_list, &dev->napi_list);
-@@ -6777,6 +6869,7 @@ void __netif_napi_del(struct napi_struct
+@@ -6780,6 +6872,7 @@ void __netif_napi_del(struct napi_struct
  	if (!test_and_clear_bit(NAPI_STATE_LISTED, &napi->state))
  		return;
  
@@ -214,7 +214,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	napi_hash_del(napi);
  	list_del_rcu(&napi->dev_list);
  	napi_free_frags(napi);
-@@ -6788,53 +6881,19 @@ EXPORT_SYMBOL(__netif_napi_del);
+@@ -6791,53 +6884,19 @@ EXPORT_SYMBOL(__netif_napi_del);
  
  static int napi_poll(struct napi_struct *n, struct list_head *repoll)
  {
@@ -272,7 +272,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	/* Some drivers may have called napi_schedule
  	 * prior to exhausting their budget.
  	 */
-@@ -11288,6 +11347,10 @@ static int __init net_dev_init(void)
+@@ -11291,6 +11350,10 @@ static int __init net_dev_init(void)
  		sd->backlog.weight = weight_p;
  	}
  
diff --git a/target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch b/target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch
index 247c6d8364..580f0b1bfa 100644
--- a/target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch
+++ b/target/linux/generic/pending-5.10/840-hwrng-bcm2835-set-quality-to-1000.patch
@@ -16,11 +16,11 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 
 --- a/drivers/char/hw_random/bcm2835-rng.c
 +++ b/drivers/char/hw_random/bcm2835-rng.c
-@@ -167,6 +167,7 @@ static int bcm2835_rng_probe(struct plat
+@@ -163,6 +163,7 @@ static int bcm2835_rng_probe(struct plat
  	priv->rng.init = bcm2835_rng_init;
  	priv->rng.read = bcm2835_rng_read;
  	priv->rng.cleanup = bcm2835_rng_cleanup;
 +	priv->rng.quality = 1000;
  
  	if (dev_of_node(dev)) {
- 		rng_id = of_match_node(bcm2835_rng_of_match, np);
+ 		rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node);
diff --git a/target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
index 88d609d996..a2b48fd4fc 100644
--- a/target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
+++ b/target/linux/generic/pending-5.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
@@ -56,7 +56,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  static void ubiblock_remove_all(void)
  {
  	struct ubiblock *next;
-@@ -684,6 +722,10 @@ int __init ubiblock_init(void)
+@@ -684,6 +725,10 @@ int __init ubiblock_init(void)
  	 */
  	ubiblock_create_from_param();
  
diff --git a/target/linux/imx6/image/Makefile b/target/linux/imx6/image/Makefile
index afc75d6df1..9ce620655a 100644
--- a/target/linux/imx6/image/Makefile
+++ b/target/linux/imx6/image/Makefile
@@ -227,7 +227,7 @@ define Device/apalis
   UBOOT := apalis_imx6
   FILESYSTEMS := squashfs
   IMAGES := combined.bin sysupgrade.bin
-  IMAGE_NAME = $$(IMAGE_PREFIX)-$$(1).$$(2)
+  DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(1).$$(2)
   IMAGE/combined.bin := append-rootfs | pad-extra 128k | apalis-emmc
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
   ARTIFACTS := recovery.scr
diff --git a/target/linux/mediatek/Makefile b/target/linux/mediatek/Makefile
index c8ab5e01e6..ceea84f8a8 100644
--- a/target/linux/mediatek/Makefile
+++ b/target/linux/mediatek/Makefile
@@ -6,7 +6,7 @@ ARCH:=arm
 BOARD:=mediatek
 BOARDNAME:=MediaTek Ralink ARM
 SUBTARGETS:=mt7622 mt7623 mt7629
-FEATURES:=squashfs nand ramdisk fpu
+FEATURES:=squashfs nand seperate_ramdisk fpu
 
 KERNEL_PATCHVER:=5.4
 KERNEL_TESTING_PATCHVER:=5.4
diff --git a/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts b/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts
index 428777e3f7..911b3dd5b4 100644
--- a/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts
+++ b/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts
@@ -5,586 +5,14 @@
  */
 
 /dts-v1/;
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-#include "mt7622.dtsi"
-#include "mt6380.dtsi"
 
+#include "mt7622-bananapi-bpi-r64.dts"
 / {
 	model = "Bananapi BPI-R64";
 	compatible = "bananapi,bpi-r64-rootdisk", "mediatek,mt7622";
 
-	aliases {
-		serial0 = &uart0;
-	};
-
 	chosen {
 		stdout-path = "serial0:115200n8";
 		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512 root=/dev/mmcblk0p7 rootfstype=squashfs,f2fs";
 	};
-
-	cpus {
-		cpu@0 {
-			proc-supply = <&mt6380_vcpu_reg>;
-			sram-supply = <&mt6380_vm_reg>;
-		};
-
-		cpu@1 {
-			proc-supply = <&mt6380_vcpu_reg>;
-			sram-supply = <&mt6380_vm_reg>;
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		factory {
-			label = "factory";
-			linux,code = <BTN_0>;
-			gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
-		};
-
-		wps {
-			label = "wps";
-			linux,code = <KEY_WPS_BUTTON>;
-			gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		green {
-			label = "bpi-r64:pio:green";
-			gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
-		};
-
-		red {
-			label = "bpi-r64:pio:red";
-			gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	memory {
-		reg = <0 0x40000000 0 0x40000000>;
-	};
-
-	reg_1p8v: regulator-1p8v {
-		compatible = "regulator-fixed";
-		regulator-name = "fixed-1.8V";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		regulator-always-on;
-	};
-
-	reg_3p3v: regulator-3p3v {
-		compatible = "regulator-fixed";
-		regulator-name = "fixed-3.3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	reg_5v: regulator-5v {
-		compatible = "regulator-fixed";
-		regulator-name = "fixed-5V";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-};
-
-&bch {
-	status = "disabled";
-};
-
-&btif {
-	status = "okay";
-};
-
-&cir {
-	pinctrl-names = "default";
-	pinctrl-0 = <&irrx_pins>;
-	status = "okay";
-};
-
-&eth {
-	status = "okay";
-	gmac0: mac@0 {
-		compatible = "mediatek,eth-mac";
-		reg = <0>;
-		phy-mode = "2500base-x";
-
-		fixed-link {
-			speed = <2500>;
-			full-duplex;
-			pause;
-		};
-	};
-
-	gmac1: mac@1 {
-		compatible = "mediatek,eth-mac";
-		reg = <1>;
-		phy-mode = "rgmii";
-
-		fixed-link {
-			speed = <1000>;
-			full-duplex;
-			pause;
-		};
-	};
-
-	mdio: mdio-bus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		switch@1f {
-			compatible = "mediatek,mt7531";
-			reg = <0x1f>;
-			reset-gpios = <&pio 54 0>;
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				wan: port@0 {
-					reg = <0>;
-					label = "wan";
-				};
-
-				port@1 {
-					reg = <1>;
-					label = "lan0";
-				};
-
-				port@2 {
-					reg = <2>;
-					label = "lan1";
-				};
-
-				port@3 {
-					reg = <3>;
-					label = "lan2";
-				};
-
-				port@4 {
-					reg = <4>;
-					label = "lan3";
-				};
-
-				port@6 {
-					reg = <6>;
-					label = "cpu";
-					ethernet = <&gmac0>;
-					phy-mode = "2500base-x";
-
-					fixed-link {
-						speed = <2500>;
-						full-duplex;
-						pause;
-					};
-				};
-			};
-		};
-
-	};
-};
-
-&i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins>;
-	status = "okay";
-};
-
-&i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins>;
-	status = "okay";
-};
-
-&mmc0 {
-	pinctrl-names = "default", "state_uhs";
-	pinctrl-0 = <&emmc_pins_default>;
-	pinctrl-1 = <&emmc_pins_uhs>;
-	status = "okay";
-	bus-width = <8>;
-	max-frequency = <50000000>;
-	cap-mmc-highspeed;
-	mmc-hs200-1_8v;
-	vmmc-supply = <&reg_3p3v>;
-	vqmmc-supply = <&reg_1p8v>;
-	assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
-	assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
-	non-removable;
-};
-
-&mmc1 {
-	pinctrl-names = "default", "state_uhs";
-	pinctrl-0 = <&sd0_pins_default>;
-	pinctrl-1 = <&sd0_pins_uhs>;
-	status = "okay";
-	bus-width = <4>;
-	max-frequency = <50000000>;
-	cap-sd-highspeed;
-	r_smpl = <1>;
-	cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
-	vmmc-supply = <&reg_3p3v>;
-	vqmmc-supply = <&reg_3p3v>;
-	assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
-	assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
-};
-
-&nandc {
-	pinctrl-names = "default";
-	pinctrl-0 = <&parallel_nand_pins>;
-	status = "disabled";
-};
-
-&nor_flash {
-	pinctrl-names = "default";
-	pinctrl-0 = <&spi_nor_pins>;
-	status = "disabled";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-	};
-};
-
-&pcie0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie0_pins>;
-	status = "okay";
-};
-
-&pcie1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie1_pins>;
-	status = "okay";
-};
-
-&pio {
-	/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
-	 * SATA functions. i.e. output-high: PCIe, output-low: SATA
-	 */
-	asm_sel {
-		gpio-hog;
-		gpios = <90 GPIO_ACTIVE_HIGH>;
-		output-high;
-	};
-
-	/* eMMC is shared pin with parallel NAND */
-	emmc_pins_default: emmc-pins-default {
-		mux {
-			function = "emmc", "emmc_rst";
-			groups = "emmc";
-		};
-
-		/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
-		 * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
-		 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
-		 */
-		conf-cmd-dat {
-			pins = "NDL0", "NDL1", "NDL2",
-			       "NDL3", "NDL4", "NDL5",
-			       "NDL6", "NDL7", "NRB";
-			input-enable;
-			bias-pull-up;
-		};
-
-		conf-clk {
-			pins = "NCLE";
-			bias-pull-down;
-		};
-	};
-
-	emmc_pins_uhs: emmc-pins-uhs {
-		mux {
-			function = "emmc";
-			groups = "emmc";
-		};
-
-		conf-cmd-dat {
-			pins = "NDL0", "NDL1", "NDL2",
-			       "NDL3", "NDL4", "NDL5",
-			       "NDL6", "NDL7", "NRB";
-			input-enable;
-			drive-strength = <4>;
-			bias-pull-up;
-		};
-
-		conf-clk {
-			pins = "NCLE";
-			drive-strength = <4>;
-			bias-pull-down;
-		};
-	};
-
-	eth_pins: eth-pins {
-		mux {
-			function = "eth";
-			groups = "mdc_mdio", "rgmii_via_gmac2";
-		};
-	};
-
-	i2c1_pins: i2c1-pins {
-		mux {
-			function = "i2c";
-			groups =  "i2c1_0";
-		};
-	};
-
-	i2c2_pins: i2c2-pins {
-		mux {
-			function = "i2c";
-			groups =  "i2c2_0";
-		};
-	};
-
-	i2s1_pins: i2s1-pins {
-		mux {
-			function = "i2s";
-			groups =  "i2s_out_mclk_bclk_ws",
-				  "i2s1_in_data",
-				  "i2s1_out_data";
-		};
-
-		conf {
-			pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
-			       "I2S_WS", "I2S_MCLK";
-			drive-strength = <12>;
-			bias-pull-down;
-		};
-	};
-
-	irrx_pins: irrx-pins {
-		mux {
-			function = "ir";
-			groups =  "ir_1_rx";
-		};
-	};
-
-	irtx_pins: irtx-pins {
-		mux {
-			function = "ir";
-			groups =  "ir_1_tx";
-		};
-	};
-
-	/* Parallel nand is shared pin with eMMC */
-	parallel_nand_pins: parallel-nand-pins {
-		mux {
-			function = "flash";
-			groups = "par_nand";
-		};
-	};
-
-	pcie0_pins: pcie0-pins {
-		mux {
-			function = "pcie";
-			groups = "pcie0_pad_perst",
-				 "pcie0_1_waken",
-				 "pcie0_1_clkreq";
-		};
-	};
-
-	pcie1_pins: pcie1-pins {
-		mux {
-			function = "pcie";
-			groups = "pcie1_pad_perst",
-				 "pcie1_0_waken",
-				 "pcie1_0_clkreq";
-		};
-	};
-
-	pmic_bus_pins: pmic-bus-pins {
-		mux {
-			function = "pmic";
-			groups = "pmic_bus";
-		};
-	};
-
-	pwm7_pins: pwm1-2-pins {
-		mux {
-			function = "pwm";
-			groups = "pwm_ch7_2";
-		};
-	};
-
-	wled_pins: wled-pins {
-		mux {
-			function = "led";
-			groups = "wled";
-		};
-	};
-
-	sd0_pins_default: sd0-pins-default {
-		mux {
-			function = "sd";
-			groups = "sd_0";
-		};
-
-		/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
-		 *  "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
-		 *  DAT2, DAT3, CMD, CLK for SD respectively.
-		 */
-		conf-cmd-data {
-			pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
-			       "I2S2_IN","I2S4_OUT";
-			input-enable;
-			drive-strength = <8>;
-			bias-pull-up;
-		};
-		conf-clk {
-			pins = "I2S3_OUT";
-			drive-strength = <12>;
-			bias-pull-down;
-		};
-		conf-cd {
-			pins = "TXD3";
-			bias-pull-up;
-		};
-	};
-
-	sd0_pins_uhs: sd0-pins-uhs {
-		mux {
-			function = "sd";
-			groups = "sd_0";
-		};
-
-		conf-cmd-data {
-			pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
-			       "I2S2_IN","I2S4_OUT";
-			input-enable;
-			bias-pull-up;
-		};
-
-		conf-clk {
-			pins = "I2S3_OUT";
-			bias-pull-down;
-		};
-	};
-
-	/* Serial NAND is shared pin with SPI-NOR */
-	serial_nand_pins: serial-nand-pins {
-		mux {
-			function = "flash";
-			groups = "snfi";
-		};
-	};
-
-	spic0_pins: spic0-pins {
-		mux {
-			function = "spi";
-			groups = "spic0_0";
-		};
-	};
-
-	spic1_pins: spic1-pins {
-		mux {
-			function = "spi";
-			groups = "spic1_0";
-		};
-	};
-
-	/* SPI-NOR is shared pin with serial NAND */
-	spi_nor_pins: spi-nor-pins {
-		mux {
-			function = "flash";
-			groups = "spi_nor";
-		};
-	};
-
-	/* serial NAND is shared pin with SPI-NOR */
-	serial_nand_pins: serial-nand-pins {
-		mux {
-			function = "flash";
-			groups = "snfi";
-		};
-	};
-
-	uart0_pins: uart0-pins {
-		mux {
-			function = "uart";
-			groups = "uart0_0_tx_rx" ;
-		};
-	};
-
-	uart2_pins: uart2-pins {
-		mux {
-			function = "uart";
-			groups = "uart2_1_tx_rx" ;
-		};
-	};
-
-	watchdog_pins: watchdog-pins {
-		mux {
-			function = "watchdog";
-			groups = "watchdog";
-		};
-	};
-};
-
-&pwm {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pwm7_pins>;
-	status = "okay";
-};
-
-&pwrap {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pmic_bus_pins>;
-
-	status = "okay";
-};
-
-&sata {
-	status = "disable";
-};
-
-&sata_phy {
-	status = "disable";
-};
-
-&spi0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&spic0_pins>;
-	status = "okay";
-};
-
-&spi1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&spic1_pins>;
-	status = "okay";
-};
-
-&ssusb {
-	vusb33-supply = <&reg_3p3v>;
-	vbus-supply = <&reg_5v>;
-	status = "okay";
-};
-
-&u3phy {
-	status = "okay";
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins>;
-	status = "okay";
-};
-
-&uart2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart2_pins>;
-	status = "okay";
-};
-
-&watchdog {
-	pinctrl-names = "default";
-	pinctrl-0 = <&watchdog_pins>;
-	status = "okay";
 };
diff --git a/target/linux/mediatek/image/Makefile b/target/linux/mediatek/image/Makefile
index 45e83cece5..7aa7a7285c 100644
--- a/target/linux/mediatek/image/Makefile
+++ b/target/linux/mediatek/image/Makefile
@@ -23,7 +23,7 @@ define Device/Default
   KERNEL = kernel-bin | lzma | \
 	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
   KERNEL_INITRAMFS = kernel-bin | lzma | \
-	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
   FILESYSTEMS := squashfs
   DEVICE_DTS_DIR := $(DTS_DIR)
   IMAGES := sysupgrade.bin
diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk
index 0298b78b59..1d1c2f8a80 100644
--- a/target/linux/mediatek/image/mt7622.mk
+++ b/target/linux/mediatek/image/mt7622.mk
@@ -16,7 +16,8 @@ define Device/bpi_bananapi-r64-rootdisk
   DEVICE_DTS := mt7622-bananapi-bpi-r64-rootdisk
   DEVICE_DTS_DIR := ../dts
   SUPPORTED_DEVICES := bananapi,bpi-r64
-  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
+  DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 \
+	mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
   IMAGES := sysupgrade-emmc.bin.gz
   IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
 endef
diff --git a/target/linux/mediatek/mt7622/config-5.4 b/target/linux/mediatek/mt7622/config-5.4
index 1b0b1e36a6..6ca00d017a 100644
--- a/target/linux/mediatek/mt7622/config-5.4
+++ b/target/linux/mediatek/mt7622/config-5.4
@@ -114,6 +114,7 @@ CONFIG_ARM_PMU=y
 CONFIG_ARM_PSCI_FW=y
 CONFIG_ATA=y
 CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
+CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_MQ_PCI=y
 CONFIG_BLK_PM=y
@@ -226,6 +227,7 @@ CONFIG_DYNAMIC_DEBUG=y
 CONFIG_EDAC_SUPPORT=y
 CONFIG_EFI_EARLYCON=y
 CONFIG_EINT_MTK=y
+CONFIG_F2FS_FS=y
 CONFIG_FIXED_PHY=y
 CONFIG_FIX_EARLYCON_MEM=y
 # CONFIG_FLATMEM_MANUAL is not set
@@ -388,6 +390,7 @@ CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
 CONFIG_MMC_MTK=y
 # CONFIG_MMC_TIFM_SD is not set
 CONFIG_MODULES_TREE_LOOKUP=y
diff --git a/target/linux/mediatek/patches-5.4/0601-net-dsa-propagate-resolved-link-config-via-mac_link_.patch b/target/linux/mediatek/patches-5.4/0601-net-dsa-propagate-resolved-link-config-via-mac_link_.patch
index 86eb5ef953..d203c75460 100644
--- a/target/linux/mediatek/patches-5.4/0601-net-dsa-propagate-resolved-link-config-via-mac_link_.patch
+++ b/target/linux/mediatek/patches-5.4/0601-net-dsa-propagate-resolved-link-config-via-mac_link_.patch
@@ -103,7 +103,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  }
 --- a/include/net/dsa.h
 +++ b/include/net/dsa.h
-@@ -401,7 +401,9 @@ struct dsa_switch_ops {
+@@ -406,7 +406,9 @@ struct dsa_switch_ops {
  	void	(*phylink_mac_link_up)(struct dsa_switch *ds, int port,
  				       unsigned int mode,
  				       phy_interface_t interface,
@@ -128,7 +128,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  
 --- a/net/dsa/dsa_priv.h
 +++ b/net/dsa/dsa_priv.h
-@@ -180,9 +180,11 @@ void dsa_port_phylink_mac_link_down(stru
+@@ -192,9 +192,11 @@ void dsa_port_phylink_mac_link_down(stru
  				    unsigned int mode,
  				    phy_interface_t interface);
  void dsa_port_phylink_mac_link_up(struct phylink_config *config,
diff --git a/target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch b/target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch
index 924ce9307e..652e8ee6c3 100644
--- a/target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch
+++ b/target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch
@@ -1,8 +1,8 @@
 --- a/arch/powerpc/Kconfig
 +++ b/arch/powerpc/Kconfig
-@@ -885,6 +885,14 @@ config CMDLINE_FORCE
- 	  This is useful if you cannot or don't want to change the
- 	  command-line options your boot loader passes to the kernel.
+@@ -932,6 +932,14 @@ config CMDLINE_FORCE
+ 
+ endchoice
  
 +config CMDLINE_OVERRIDE
 +    bool "Use alternative cmdline from device tree"
@@ -17,7 +17,7 @@
  	help
 --- a/drivers/of/fdt.c
 +++ b/drivers/of/fdt.c
-@@ -1060,6 +1060,17 @@ int __init early_init_dt_scan_chosen(uns
+@@ -1056,6 +1056,17 @@ int __init early_init_dt_scan_chosen(uns
  	if (p != NULL && l > 0)
  		strlcpy(data, p, min(l, COMMAND_LINE_SIZE));
  
diff --git a/target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch b/target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch
index b84a56659c..2900a1bea2 100644
--- a/target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch
+++ b/target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch
@@ -2,7 +2,7 @@
 +++ b/arch/powerpc/platforms/85xx/Kconfig
 @@ -173,6 +173,16 @@ config XES_MPC85xx
  	  Manufacturer: Extreme Engineering Solutions, Inc.
- 	  URL: <http://www.xes-inc.com/>
+ 	  URL: <https://www.xes-inc.com/>
  
 +config RED_15W_REV1
 +	bool "Sophos RED 15w Rev.1"
diff --git a/target/linux/mvebu/image/Makefile b/target/linux/mvebu/image/Makefile
index 871b622ae2..9220c6c9f1 100644
--- a/target/linux/mvebu/image/Makefile
+++ b/target/linux/mvebu/image/Makefile
@@ -80,7 +80,7 @@ endef
 
 define Build/uDPU-firmware
 	(rm -fR $@-fw; mkdir -p $@-fw)
-	$(CP) $(BIN_DIR)/$(IMAGE_PREFIX)-initramfs.itb $@-fw/recovery.itb
+	$(CP) $(BIN_DIR)/$(DEVICE_IMG_PREFIX)-initramfs.itb $@-fw/recovery.itb
 	$(CP) $@-boot.scr $@-fw/boot.scr
 	$(TAR) -cvzp --numeric-owner --owner=0 --group=0 --sort=name \
 		$(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)") \
@@ -90,7 +90,7 @@ define Build/uDPU-firmware
 		-f $@-fw/boot.tgz -C $@.boot .
 	$(TAR) -cvzp --numeric-owner --owner=0 --group=0 --sort=name \
 		$(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)") \
-		-f $(KDIR_TMP)/$(IMAGE_PREFIX)-firmware.tgz -C $@-fw .
+		-f $(KDIR_TMP)/$(DEVICE_IMG_PREFIX)-firmware.tgz -C $@-fw .
 endef
 
 define Device/Default
diff --git a/target/linux/mvebu/image/cortexa53.mk b/target/linux/mvebu/image/cortexa53.mk
index 6a3a568655..ca3a53f992 100644
--- a/target/linux/mvebu/image/cortexa53.mk
+++ b/target/linux/mvebu/image/cortexa53.mk
@@ -86,7 +86,7 @@ define Device/methode_udpu
   KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
   KERNEL_INITRAMFS_SUFFIX := .itb
   DEVICE_PACKAGES += f2fs-tools fdisk kmod-i2c-pxa
-  IMAGE_NAME = $$(IMAGE_PREFIX)-$$(2)
+  DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(2)
   IMAGES := firmware.tgz
   IMAGE/firmware.tgz := boot-scr | boot-img-ext4 | uDPU-firmware | append-metadata
   BOOT_SCRIPT := udpu
diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index 61f4d17813..a7ebc30a71 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -36,10 +36,10 @@ define Device/cznic_turris-omnia
     mkf2fs e2fsprogs kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 \
     wpad-basic-wolfssl kmod-ath9k kmod-ath10k-ct ath10k-firmware-qca988x-ct \
     partx-utils kmod-i2c-mux-pca954x
-  IMAGES := $$(IMAGE_PREFIX)-sysupgrade.img.gz omnia-medkit-$$(IMAGE_PREFIX)-initramfs.tar.gz
-  IMAGE/$$(IMAGE_PREFIX)-sysupgrade.img.gz := boot-scr | boot-img | sdcard-img | gzip | append-metadata
-  IMAGE/omnia-medkit-$$(IMAGE_PREFIX)-initramfs.tar.gz := omnia-medkit-initramfs | gzip
-  IMAGE_NAME = $$(2)
+  IMAGES := $$(DEVICE_IMG_PREFIX)-sysupgrade.img.gz omnia-medkit-$$(DEVICE_IMG_PREFIX)-initramfs.tar.gz
+  IMAGE/$$(DEVICE_IMG_PREFIX)-sysupgrade.img.gz := boot-scr | boot-img | sdcard-img | gzip | append-metadata
+  IMAGE/omnia-medkit-$$(DEVICE_IMG_PREFIX)-initramfs.tar.gz := omnia-medkit-initramfs | gzip
+  DEVICE_IMG_NAME = $$(2)
   SUPPORTED_DEVICES += armada-385-turris-omnia
   BOOT_SCRIPT := turris-omnia
 endef
diff --git a/target/linux/mvebu/patches-5.10/100-ARM-dts-turris-omnia-fix-hardware-buffer-management.patch b/target/linux/mvebu/patches-5.10/100-ARM-dts-turris-omnia-fix-hardware-buffer-management.patch
index 2ebdc06f61..a3f41fb5cb 100644
--- a/target/linux/mvebu/patches-5.10/100-ARM-dts-turris-omnia-fix-hardware-buffer-management.patch
+++ b/target/linux/mvebu/patches-5.10/100-ARM-dts-turris-omnia-fix-hardware-buffer-management.patch
@@ -15,7 +15,7 @@ Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
 
 --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
 +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
-@@ -32,7 +32,8 @@
+@@ -31,7 +31,8 @@
  		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
  			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
diff --git a/target/linux/mvebu/patches-5.10/101-ARM-dts-turris-omnia-configure-LED-2--INTn-pin-as-interrupt-pin.patch b/target/linux/mvebu/patches-5.10/101-ARM-dts-turris-omnia-configure-LED-2--INTn-pin-as-interrupt-pin.patch
index c7509950e0..1fbbe8b506 100644
--- a/target/linux/mvebu/patches-5.10/101-ARM-dts-turris-omnia-configure-LED-2--INTn-pin-as-interrupt-pin.patch
+++ b/target/linux/mvebu/patches-5.10/101-ARM-dts-turris-omnia-configure-LED-2--INTn-pin-as-interrupt-pin.patch
@@ -54,9 +54,9 @@ Please let me know how should I handle this.
 
 --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
 +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
-@@ -390,6 +390,7 @@
- 	phy1: ethernet-phy@1 {
- 		compatible = "ethernet-phy-ieee802.3-c22";
+@@ -254,6 +254,7 @@
+ 		status = "okay";
+ 		compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
  		reg = <1>;
 +		marvell,reg-init = <3 18 0 0x4985>;
  
diff --git a/target/linux/oxnas/Makefile b/target/linux/oxnas/Makefile
index f503c2819f..003ed6ecd6 100644
--- a/target/linux/oxnas/Makefile
+++ b/target/linux/oxnas/Makefile
@@ -8,6 +8,7 @@ FEATURES:=gpio ramdisk rtc squashfs
 DEVICE_TYPE:=nas
 
 KERNEL_PATCHVER:=5.4
+KERNEL_TESTING_PATCHVER:=5.10
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/oxnas/config-5.10 b/target/linux/oxnas/config-5.10
new file mode 100644
index 0000000000..4d93a22eff
--- /dev/null
+++ b/target/linux/oxnas/config-5.10
@@ -0,0 +1,366 @@
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_HAS_BINFMT_FLAT=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_KEEPINITRD=y
+CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_ARCH_HAS_PHYS_TO_DMA=y
+CONFIG_ARCH_HAS_RESET_CONTROLLER=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SET_MEMORY=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
+CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_CPU_AUTO=y
+# CONFIG_ARCH_MULTI_V4 is not set
+# CONFIG_ARCH_MULTI_V4T is not set
+CONFIG_ARCH_MULTI_V4_V5=y
+CONFIG_ARCH_MULTI_V5=y
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_OXNAS=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARCH_WANT_LIBATA_LEDS=y
+CONFIG_ARM=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
+# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set
+CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y
+CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_ARM_HAS_SG_CHAIN=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_ARM_PMU=y
+# CONFIG_ARM_SMMU is not set
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_UNWIND=y
+CONFIG_ATAGS=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+CONFIG_BLK_CMDLINE_PARSER=y
+CONFIG_BLK_DEBUG_FS=y
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_BLK_PM=y
+CONFIG_BLK_SCSI_REQUEST=y
+# CONFIG_BPF_SYSCALL is not set
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMA=y
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_CMA_AREAS=7
+# CONFIG_CMA_DEBUG is not set
+# CONFIG_CMA_DEBUGFS is not set
+CONFIG_CMA_SIZE_MBYTES=64
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+CONFIG_CMDLINE_PARTITION=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMMON_CLK_OXNAS=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CONTIG_ALLOC=y
+CONFIG_COREDUMP=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_ARM926T=y
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_PM=y
+CONFIG_CPU_THUMB_CAPABLE=y
+CONFIG_CPU_TLB_V4WBI=y
+# CONFIG_CPU_THERMAL is not set
+CONFIG_CPU_USE_DOMAINS=y
+CONFIG_CRASH_CORE=y
+CONFIG_CRC16=y
+# CONFIG_CRC32_SARWATE is not set
+CONFIG_CRC32_SLICEBY8=y
+CONFIG_CROSS_MEMORY_ATTACH=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_DEBUG_ALIGN_RODATA=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
+# CONFIG_DEBUG_USER is not set
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_LZ4=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DMA_CMA=y
+# CONFIG_DMA_PERNUMA_CMA is not set
+CONFIG_DMA_REMAP=y
+CONFIG_DNOTIFY=y
+CONFIG_DTC=y
+# CONFIG_DWMAC_DWC_QOS_ETH is not set
+CONFIG_DWMAC_GENERIC=y
+# CONFIG_DWMAC_INTEL_PLAT is not set
+CONFIG_DWMAC_OXNAS=y
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_ELF_CORE=y
+CONFIG_FAT_FS=y
+CONFIG_FIXED_PHY=y
+CONFIG_FIX_EARLYCON_MEM=y
+# CONFIG_FSL_RCPM is not set
+CONFIG_FREEZER=y
+# CONFIG_FW_CACHE is not set
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_EARLY_IOREMAP=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_EBPF_JIT=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_OPTPROBES=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UID16=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HID=y
+CONFIG_HID_GENERIC=y
+CONFIG_HWMON=y
+CONFIG_HZ_FIXED=0
+CONFIG_ICPLUS_PHY=y
+CONFIG_INET_DIAG=y
+# CONFIG_INET_DIAG_DESTROY is not set
+# CONFIG_INET_RAW_DIAG is not set
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_INPUT=y
+# CONFIG_IOMMU_DEBUGFS is not set
+# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
+# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
+CONFIG_IOMMU_SUPPORT=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+# CONFIG_ISDN is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_KALLSYMS=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_XZ is not set
+CONFIG_KEXEC=y
+CONFIG_KEXEC_CORE=y
+# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LIBFDT=y
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_MACH_OX810SE is not set
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MEMORY_ISOLATION=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MIGRATION=y
+CONFIG_MODULES_TREE_LOOKUP=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_KUSER_HELPERS=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NET_PTP_CLASSIFY=y
+CONFIG_NLS=y
+CONFIG_NO_HZ=y
+CONFIG_NO_HZ_COMMON=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OXNAS_RPS_TIMER=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PAGE_POOL=y
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_PANIC_TIMEOUT=0
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
+CONFIG_PHY_OXNAS=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_OXNAS=y
+# CONFIG_PINCTRL_SINGLE is not set
+CONFIG_PLUGIN_HOSTCC="g++"
+CONFIG_PM=y
+CONFIG_PM_CLK=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_OXNAS=y
+CONFIG_PPS=y
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_RAS=y
+CONFIG_RATIONAL=y
+CONFIG_RCU_TRACE=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_GZIP=y
+CONFIG_RD_LZ4=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_RD_XZ=y
+CONFIG_REALTEK_PHY=y
+CONFIG_REFCOUNT_FULL=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_OXNAS=y
+CONFIG_SCHED_DEBUG=y
+CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIO=y
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SIMPLE_PM_BUS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_SOCK_DIAG=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+CONFIG_SRCU=y
+CONFIG_STACKTRACE=y
+# CONFIG_STAGING is not set
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+# CONFIG_STMMAC_SELFTESTS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWPHY=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_OF=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_TINY_SRCU=y
+CONFIG_TRACE_CLOCK=y
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_UNWINDER_ARM=y
+# CONFIG_UNWINDER_FRAME_POINTER is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USERIO is not set
+CONFIG_USE_OF=y
+CONFIG_VERSATILE_FPGA_IRQ=y
+CONFIG_VERSATILE_FPGA_IRQ_NR=4
+CONFIG_VFAT_FS=y
+# CONFIG_VFP is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_WATCHDOG is not set
+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZLIB_INFLATE=y
diff --git a/target/linux/oxnas/patches-5.10/010-pogoplug-series-3.patch b/target/linux/oxnas/patches-5.10/010-pogoplug-series-3.patch
new file mode 100644
index 0000000000..44102352af
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/010-pogoplug-series-3.patch
@@ -0,0 +1,82 @@
+- add compatible string
+- add console to bootargs
+- add led aliases
+- adjust nand partition table
+---
+--- a/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
++++ b/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
+@@ -11,10 +11,10 @@
+ / {
+ 	model = "Cloud Engines PogoPlug Series 3";
+ 
+-	compatible = "cloudengines,pogoplugv3", "oxsemi,ox820";
++	compatible = "cloudengines,pogoplug-series-3", "cloudengines,pogoplugv3", "oxsemi,ox820";
+ 
+ 	chosen {
+-		bootargs = "earlyprintk";
++		bootargs = "earlyprintk console=ttyS0,115200";
+ 		stdout-path = "serial0:115200n8";
+ 	};
+ 
+@@ -27,24 +27,28 @@
+ 		serial0 = &uart0;
+ 		gpio0 = &gpio0;
+ 		gpio1 = &gpio1;
++		led-boot = &led_status;
++		led-failsafe = &led_warn;
++		led-running = &led_act;
++		led-upgrade = &led_warn;
+ 	};
+ 
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+-		blue {
++		led_status: blue {
+ 			label = "pogoplug:blue";
+ 			gpios = <&gpio0 2 0>;
+ 			default-state = "keep";
+ 		};
+ 
+-		orange {
++		led_warn: orange {
+ 			label = "pogoplug:orange";
+ 			gpios = <&gpio1 16 1>;
+ 			default-state = "keep";
+ 		};
+ 
+-		green {
++		led_act: green {
+ 			label = "pogoplug:green";
+ 			gpios = <&gpio1 17 1>;
+ 			default-state = "keep";
+@@ -73,11 +77,27 @@
+ 		nand-ecc-algo = "hamming";
+ 
+ 		partition@0 {
+-			label = "boot";
+-			reg = <0x00000000 0x00e00000>;
++			label = "stage1";
++			reg = <0x00000000 0x00040000>;
+ 			read-only;
+ 		};
+ 
++		partition@40000 {
++			label = "u-boot";
++			reg = <0x00040000 0x00380000>;
++			read-only;
++		};
++
++		partition@3c0000 {
++			label = "u-boot-env";
++			reg = <0x003c0000 0x00080000>;
++		};
++
++		partition@440000 {
++			label = "kernel";
++			reg = <0x00440000 0x009c0000>;
++		};
++
+ 		partition@e00000 {
+ 			label = "ubi";
+ 			reg = <0x00e00000 0x07200000>;
diff --git a/target/linux/oxnas/patches-5.10/050-ox820-remove-left-overs.patch b/target/linux/oxnas/patches-5.10/050-ox820-remove-left-overs.patch
new file mode 100644
index 0000000000..e30f328792
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/050-ox820-remove-left-overs.patch
@@ -0,0 +1,63 @@
+From 552ed4955c1fee1109bf5ba137dc35a411a1448c Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Fri, 1 Jun 2018 02:41:15 +0200
+Subject: [PATCH] arm: ox820: remove left-overs
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/clk/clk-oxnas.c                  |  2 --
+ include/dt-bindings/clock/oxsemi,ox820.h | 32 +++++++++++-------------
+ 2 files changed, 14 insertions(+), 20 deletions(-)
+
+--- a/drivers/clk/clk-oxnas.c
++++ b/drivers/clk/clk-oxnas.c
+@@ -29,8 +29,6 @@ struct oxnas_stdclk_data {
+ 	struct clk_hw_onecell_data *onecell_data;
+ 	struct clk_oxnas_gate **gates;
+ 	unsigned int ngates;
+-	struct clk_oxnas_pll **plls;
+-	unsigned int nplls;
+ };
+ 
+ /* Regmap offsets */
+--- a/include/dt-bindings/clock/oxsemi,ox820.h
++++ b/include/dt-bindings/clock/oxsemi,ox820.h
+@@ -6,24 +6,20 @@
+ #ifndef DT_CLOCK_OXSEMI_OX820_H
+ #define DT_CLOCK_OXSEMI_OX820_H
+ 
+-/* PLLs */
+-#define CLK_820_PLLA		0
+-#define CLK_820_PLLB		1
+-
+ /* Gate Clocks */
+-#define CLK_820_LEON		2
+-#define CLK_820_DMA_SGDMA	3
+-#define CLK_820_CIPHER		4
+-#define CLK_820_SD		5
+-#define CLK_820_SATA		6
+-#define CLK_820_AUDIO		7
+-#define CLK_820_USBMPH		8
+-#define CLK_820_ETHA		9
+-#define CLK_820_PCIEA		10
+-#define CLK_820_NAND		11
+-#define CLK_820_PCIEB		12
+-#define CLK_820_ETHB		13
+-#define CLK_820_REF600		14
+-#define CLK_820_USBDEV		15
++#define CLK_820_LEON		0
++#define CLK_820_DMA_SGDMA	1
++#define CLK_820_CIPHER		2
++#define CLK_820_SD		3
++#define CLK_820_SATA		4
++#define CLK_820_AUDIO		5
++#define CLK_820_USBMPH		6
++#define CLK_820_ETHA		7
++#define CLK_820_PCIEA		8
++#define CLK_820_NAND		9
++#define CLK_820_PCIEB		10
++#define CLK_820_ETHB		11
++#define CLK_820_REF600		12
++#define CLK_820_USBDEV		13
+ 
+ #endif /* DT_CLOCK_OXSEMI_OX820_H */
diff --git a/target/linux/oxnas/patches-5.10/100-oxnas-clk-plla-pllb.patch b/target/linux/oxnas/patches-5.10/100-oxnas-clk-plla-pllb.patch
new file mode 100644
index 0000000000..29a9036498
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/100-oxnas-clk-plla-pllb.patch
@@ -0,0 +1,273 @@
+--- a/drivers/clk/clk-oxnas.c
++++ b/drivers/clk/clk-oxnas.c
+@@ -5,19 +5,42 @@
+  * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+  */
+ 
++#include <linux/clk.h>
++#include <linux/clkdev.h>
+ #include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/init.h>
++#include <linux/delay.h>
+ #include <linux/of.h>
+ #include <linux/of_device.h>
+ #include <linux/platform_device.h>
+ #include <linux/stringify.h>
+ #include <linux/regmap.h>
+ #include <linux/mfd/syscon.h>
++#include <linux/reset.h>
+ 
+ #include <dt-bindings/clock/oxsemi,ox810se.h>
+ #include <dt-bindings/clock/oxsemi,ox820.h>
+ 
++#define REF300_DIV_INT_SHIFT		8
++#define REF300_DIV_FRAC_SHIFT		0
++#define REF300_DIV_INT(val)		((val) << REF300_DIV_INT_SHIFT)
++#define REF300_DIV_FRAC(val)		((val) << REF300_DIV_FRAC_SHIFT)
++
++#define PLLB_BYPASS			1
++#define PLLB_ENSAT			3
++#define PLLB_OUTDIV			4
++#define PLLB_REFDIV			8
++#define PLLB_DIV_INT_SHIFT		8
++#define PLLB_DIV_FRAC_SHIFT		0
++#define PLLB_DIV_INT(val)		((val) << PLLB_DIV_INT_SHIFT)
++#define PLLB_DIV_FRAC(val)		((val) << PLLB_DIV_FRAC_SHIFT)
++
++#define PLLA_REFDIV_MASK		0x3F
++#define PLLA_REFDIV_SHIFT		8
++#define PLLA_OUTDIV_MASK		0x7
++#define PLLA_OUTDIV_SHIFT		4
++
+ /* Standard regmap gate clocks */
+ struct clk_oxnas_gate {
+ 	struct clk_hw hw;
+@@ -36,6 +59,135 @@ struct oxnas_stdclk_data {
+ #define CLK_SET_REGOFFSET	0x2c
+ #define CLK_CLR_REGOFFSET	0x30
+ 
++#define PLLA_CTRL0_REGOFFSET	0x1f0
++#define PLLA_CTRL1_REGOFFSET	0x1f4
++#define PLLB_CTRL0_REGOFFSET	0x1001f0
++#define MHZ (1000 * 1000)
++
++struct clk_oxnas_pll {
++	struct clk_hw hw;
++	struct device_node *devnode;
++	struct reset_control *rstc;
++	struct regmap *syscon;
++};
++
++#define to_clk_oxnas_pll(_hw) container_of(_hw, struct clk_oxnas_pll, hw)
++
++static unsigned long plla_clk_recalc_rate(struct clk_hw *hw,
++	unsigned long parent_rate)
++{
++	struct clk_oxnas_pll *plla = to_clk_oxnas_pll(hw);
++	unsigned long fin = parent_rate;
++	unsigned long refdiv, outdiv;
++	unsigned int pll0, fbdiv;
++
++	BUG_ON(regmap_read(plla->syscon, PLLA_CTRL0_REGOFFSET, &pll0));
++
++	refdiv = (pll0 >> PLLA_REFDIV_SHIFT) & PLLA_REFDIV_MASK;
++	refdiv += 1;
++	outdiv = (pll0 >> PLLA_OUTDIV_SHIFT) & PLLA_OUTDIV_MASK;
++	outdiv += 1;
++
++	BUG_ON(regmap_read(plla->syscon, PLLA_CTRL1_REGOFFSET, &fbdiv));
++	/* seems we will not be here when pll is bypassed, so ignore this
++	 * case */
++
++	return fin / MHZ * fbdiv / (refdiv * outdiv) / 32768 * MHZ;
++}
++
++static const char *pll_clk_parents[] = {
++	"oscillator",
++};
++
++static struct clk_ops plla_ops = {
++	.recalc_rate = plla_clk_recalc_rate,
++};
++
++static struct clk_init_data clk_plla_init = {
++	.name = "plla",
++	.ops = &plla_ops,
++	.parent_names = pll_clk_parents,
++	.num_parents = ARRAY_SIZE(pll_clk_parents),
++};
++
++static int pllb_clk_is_prepared(struct clk_hw *hw)
++{
++	struct clk_oxnas_pll *pllb = to_clk_oxnas_pll(hw);
++
++	return !!pllb->rstc;
++}
++
++static int pllb_clk_prepare(struct clk_hw *hw)
++{
++	struct clk_oxnas_pll *pllb = to_clk_oxnas_pll(hw);
++
++	pllb->rstc = of_reset_control_get(pllb->devnode, NULL);
++
++	return IS_ERR(pllb->rstc) ? PTR_ERR(pllb->rstc) : 0;
++}
++
++static void pllb_clk_unprepare(struct clk_hw *hw)
++{
++	struct clk_oxnas_pll *pllb = to_clk_oxnas_pll(hw);
++
++	BUG_ON(IS_ERR(pllb->rstc));
++
++	reset_control_put(pllb->rstc);
++	pllb->rstc = NULL;
++}
++
++static int pllb_clk_enable(struct clk_hw *hw)
++{
++	struct clk_oxnas_pll *pllb = to_clk_oxnas_pll(hw);
++
++	BUG_ON(IS_ERR(pllb->rstc));
++
++	/* put PLL into bypass */
++	regmap_update_bits(pllb->syscon, PLLB_CTRL0_REGOFFSET, BIT(PLLB_BYPASS), BIT(PLLB_BYPASS));
++	wmb();
++	udelay(10);
++	reset_control_assert(pllb->rstc);
++	udelay(10);
++	/* set PLL B control information */
++	regmap_write_bits(pllb->syscon, PLLB_CTRL0_REGOFFSET, 0xffff,
++			  (1 << PLLB_ENSAT) | (1 << PLLB_OUTDIV) | (2 << PLLB_REFDIV));
++	reset_control_deassert(pllb->rstc);
++	udelay(100);
++	regmap_update_bits(pllb->syscon, PLLB_CTRL0_REGOFFSET, BIT(PLLB_BYPASS), 0);
++
++	return 0;
++}
++
++static void pllb_clk_disable(struct clk_hw *hw)
++{
++	struct clk_oxnas_pll *pllb = to_clk_oxnas_pll(hw);
++
++	BUG_ON(IS_ERR(pllb->rstc));
++
++	/* put PLL into bypass */
++	regmap_update_bits(pllb->syscon, PLLB_CTRL0_REGOFFSET, BIT(PLLB_BYPASS), BIT(PLLB_BYPASS));
++
++	wmb();
++	udelay(10);
++
++	reset_control_assert(pllb->rstc);
++}
++
++static struct clk_ops pllb_ops = {
++	.prepare = pllb_clk_prepare,
++	.unprepare = pllb_clk_unprepare,
++	.is_prepared = pllb_clk_is_prepared,
++	.enable = pllb_clk_enable,
++	.disable = pllb_clk_disable,
++};
++
++static struct clk_init_data clk_pllb_init = {
++	.name = "pllb",
++	.ops = &pllb_ops,
++	.parent_names = pll_clk_parents,
++	.num_parents = ARRAY_SIZE(pll_clk_parents),
++};
++
+ static inline struct clk_oxnas_gate *to_clk_oxnas_gate(struct clk_hw *hw)
+ {
+ 	return container_of(hw, struct clk_oxnas_gate, hw);
+@@ -249,3 +401,42 @@ static struct platform_driver oxnas_stdc
+ 	},
+ };
+ builtin_platform_driver(oxnas_stdclk_driver);
++
++void __init oxnas_init_plla(struct device_node *np)
++{
++	struct clk *clk;
++	struct clk_oxnas_pll *plla;
++
++	plla = kmalloc(sizeof(*plla), GFP_KERNEL);
++	BUG_ON(!plla);
++
++	plla->syscon = syscon_node_to_regmap(of_get_parent(np));
++	plla->hw.init = &clk_plla_init;
++	plla->devnode = np;
++	plla->rstc = NULL;
++	clk = clk_register(NULL, &plla->hw);
++	BUG_ON(IS_ERR(clk));
++	/* mark it as enabled */
++	clk_prepare_enable(clk);
++	of_clk_add_provider(np, of_clk_src_simple_get, clk);
++}
++CLK_OF_DECLARE(oxnas_plla, "plxtech,nas782x-plla", oxnas_init_plla);
++
++void __init oxnas_init_pllb(struct device_node *np)
++{
++	struct clk *clk;
++	struct clk_oxnas_pll *pllb;
++
++	pllb = kmalloc(sizeof(*pllb), GFP_KERNEL);
++	BUG_ON(!pllb);
++
++	pllb->syscon = syscon_node_to_regmap(of_get_parent(np));
++	pllb->hw.init = &clk_pllb_init;
++	pllb->devnode = np;
++	pllb->rstc = NULL;
++
++	clk = clk_register(NULL, &pllb->hw);
++	BUG_ON(IS_ERR(clk));
++	of_clk_add_provider(np, of_clk_src_simple_get, clk);
++}
++CLK_OF_DECLARE(oxnas_pllb, "plxtech,nas782x-pllb", oxnas_init_pllb);
+--- a/arch/arm/boot/dts/ox820.dtsi
++++ b/arch/arm/boot/dts/ox820.dtsi
+@@ -61,12 +61,6 @@
+ 			clocks = <&osc>;
+ 		};
+ 
+-		plla: plla {
+-			compatible = "fixed-clock";
+-			#clock-cells = <0>;
+-			clock-frequency = <850000000>;
+-		};
+-
+ 		armclk: armclk {
+ 			compatible = "fixed-factor-clock";
+ 			#clock-cells = <0>;
+@@ -266,6 +260,19 @@
+ 					compatible = "oxsemi,ox820-stdclk", "oxsemi,ox810se-stdclk";
+ 					#clock-cells = <1>;
+ 				};
++
++				plla: plla {
++					compatible = "plxtech,nas782x-plla";
++					#clock-cells = <0>;
++					clocks = <&osc>;
++				};
++
++				pllb: pllb {
++					compatible = "plxtech,nas782x-pllb";
++					#clock-cells = <0>;
++					clocks = <&osc>;
++					resets = <&reset RESET_PLLB>;
++				};
+ 			};
+ 		};
+ 
+@@ -287,6 +294,13 @@
+ 				clocks = <&armclk>;
+ 			};
+ 
++			watchdog@620 {
++				compatible = "mpcore_wdt";
++				reg = <0x620 0x20>;
++				interrupts = <GIC_PPI 14 (GIC_CPU_MASK_RAW(3)|IRQ_TYPE_LEVEL_HIGH)>;
++				clocks = <&armclk>;
++			};
++
+ 			gic: gic@1000 {
+ 				compatible = "arm,arm11mp-gic";
+ 				interrupt-controller;
diff --git a/target/linux/oxnas/patches-5.10/150-oxnas-restart.patch b/target/linux/oxnas/patches-5.10/150-oxnas-restart.patch
new file mode 100644
index 0000000000..c5b07fd5a7
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/150-oxnas-restart.patch
@@ -0,0 +1,25 @@
+--- a/drivers/power/reset/Kconfig
++++ b/drivers/power/reset/Kconfig
+@@ -141,6 +141,12 @@ config POWER_RESET_OXNAS
+ 	help
+ 	  Restart support for OXNAS/PLXTECH OX820 SoC.
+ 
++config POWER_RESET_OXNAS
++	bool "OXNAS SoC restart driver"
++	depends on ARCH_OXNAS
++	help
++	  Restart support for OXNAS boards.
++
+ config POWER_RESET_PIIX4_POWEROFF
+ 	tristate "Intel PIIX4 power-off driver"
+ 	depends on PCI
+--- a/drivers/power/reset/Makefile
++++ b/drivers/power/reset/Makefile
+@@ -18,6 +18,7 @@ obj-$(CONFIG_POWER_RESET_QCOM_PON) += qc
+ obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
+ obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o
+ obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o
++obj-$(CONFIG_POWER_RESET_OXNAS) += oxnas-restart.o
+ obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
+ obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
+ obj-$(CONFIG_POWER_RESET_ST) += st-poweroff.o
diff --git a/target/linux/oxnas/patches-5.10/320-oxnas-phy-pcie.patch b/target/linux/oxnas/patches-5.10/320-oxnas-phy-pcie.patch
new file mode 100644
index 0000000000..a590151e5c
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/320-oxnas-phy-pcie.patch
@@ -0,0 +1,44 @@
+--- a/arch/arm/boot/dts/ox820.dtsi
++++ b/arch/arm/boot/dts/ox820.dtsi
+@@ -247,6 +247,15 @@
+ 				};
+ 			};
+ 
++			pcie_phy: pcie-phy@a00000 {
++				compatible = "oxsemi,ox820-pcie-phy";
++				reg = <0xa00000 0x10>;
++				#phy-cells = <0>;
++				resets = <&reset RESET_PCIEPHY>;
++				reset-names = "phy";
++				status = "disabled";
++			};
++
+ 			sys: sys-ctrl@e00000 {
+ 				compatible = "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd";
+ 				reg = <0xe00000 0x200000>;
+--- a/drivers/phy/Kconfig
++++ b/drivers/phy/Kconfig
+@@ -35,6 +35,13 @@ config PHY_LPC18XX_USB_OTG
+ 	  This driver is need for USB0 support on LPC18xx/43xx and takes
+ 	  care of enabling and clock setup.
+ 
++config PHY_OXNAS
++	tristate "Oxford Semi. OX820 PCI-E PHY support"
++	depends on HAS_IOMEM && OF && (ARM || COMPILE_TEST)
++	select GENERIC_PHY
++	help
++	  This option enables support for OXNAS OX820 SoC PCIE PHY.
++
+ config PHY_PISTACHIO_USB
+ 	tristate "IMG Pistachio USB2.0 PHY driver"
+ 	depends on MACH_PISTACHIO
+--- a/drivers/phy/Makefile
++++ b/drivers/phy/Makefile
+@@ -6,6 +6,7 @@
+ obj-$(CONFIG_GENERIC_PHY)		+= phy-core.o
+ obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY)	+= phy-core-mipi-dphy.o
+ obj-$(CONFIG_PHY_LPC18XX_USB_OTG)	+= phy-lpc18xx-usb-otg.o
++obj-$(CONFIG_PHY_OXNAS)			+= phy-oxnas-pcie.o
+ obj-$(CONFIG_PHY_XGENE)			+= phy-xgene.o
+ obj-$(CONFIG_PHY_PISTACHIO_USB)		+= phy-pistachio-usb.o
+ obj-$(CONFIG_USB_LGM_PHY)		+= phy-lgm-usb.o
diff --git a/target/linux/oxnas/patches-5.10/340-oxnas-pcie.patch b/target/linux/oxnas/patches-5.10/340-oxnas-pcie.patch
new file mode 100644
index 0000000000..01b5a188c3
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/340-oxnas-pcie.patch
@@ -0,0 +1,122 @@
+--- a/drivers/pci/controller/Kconfig
++++ b/drivers/pci/controller/Kconfig
+@@ -305,6 +305,11 @@ config PCIE_HISI_ERR
+ 	  Say Y here if you want error handling support
+ 	  for the PCIe controller's errors on HiSilicon HIP SoCs
+ 
++config PCIE_OXNAS
++	bool "PLX Oxnas PCIe controller"
++	depends on ARCH_OXNAS
++	select PCIEPORTBUS
++
+ source "drivers/pci/controller/dwc/Kconfig"
+ source "drivers/pci/controller/mobiveil/Kconfig"
+ source "drivers/pci/controller/cadence/Kconfig"
+--- a/drivers/pci/controller/Makefile
++++ b/drivers/pci/controller/Makefile
+@@ -27,6 +27,7 @@ obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rock
+ obj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o
+ obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o
+ obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o
++obj-$(CONFIG_PCIE_OXNAS) += pcie-oxnas.o
+ obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o
+ obj-$(CONFIG_VMD) += vmd.o
+ obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o
+--- a/arch/arm/boot/dts/ox820.dtsi
++++ b/arch/arm/boot/dts/ox820.dtsi
+@@ -289,7 +289,7 @@
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+ 			compatible = "simple-bus";
+-			ranges = <0 0x47000000 0x1000000>;
++			ranges = <0 0x47000000 0x2000>;
+ 
+ 			scu: scu@0 {
+ 				compatible = "arm,arm11mp-scu";
+@@ -318,5 +318,86 @@
+ 				      <0x100 0x500>;
+ 			};
+ 		};
++
++		pcie0: pcie-controller@47c00000 {
++			compatible = "plxtech,nas782x-pcie";
++			device_type = "pci";
++			#address-cells = <3>;
++			#size-cells = <2>;
++
++			/*		flag & space	bus address	host address	size */
++			ranges = <	0x82000000	0 0x48000000	0x48000000	0 0x2000000
++					0xC2000000	0 0x4A000000	0x4A000000	0 0x1E00000
++					0x81000000	0 0x4BE00000	0x4BE00000	0 0x0100000
++					0x80000000	0 0x4BF00000	0x4BF00000	0 0x0100000>;
++
++			bus-range = <0x00 0x7f>;
++
++			/*	cfg			inbound translator	*/
++			reg =	<0x47c00000 0x1000>,	<0x47d00000 0x100>;
++
++			phys = <&pcie_phy>;
++			phy-names = "pcie-phy";
++
++			#interrupt-cells = <1>;
++			/* wild card mask, match all bus address & interrupt specifier */
++			/* format: bus address mask, interrupt specifier mask */
++			/* each bit 1 means need match, 0 means ignored when match */
++			interrupt-map-mask = <0 0 0 0>;
++			/* format: a list of: bus address, interrupt specifier,
++			 * parent interrupt controller & specifier */
++			interrupt-map = <0 0 0 0 &gic 0 19 0x304>;
++			gpios = <&gpio1 12 0>;
++			clocks = <&stdclk CLK_820_PCIEA>, <&pllb>;
++			clock-names = "pcie", "busclk";
++			resets = <&reset RESET_PCIEA>;
++			reset-names = "pcie";
++
++			plxtech,pcie-hcsl-bit = <2>;
++			plxtech,pcie-ctrl-offset = <0x120>;
++			plxtech,pcie-outbound-offset = <0x138>;
++			status = "disabled";
++		};
++
++		pcie1: pcie-controller@47e00000 {
++			compatible = "plxtech,nas782x-pcie";
++			device_type = "pci";
++			#address-cells = <3>;
++			#size-cells = <2>;
++
++			/*		flag & space	bus address	host address	size */
++			ranges = <	0x82000000	0 0x4C000000	0x4C000000	0 0x2000000
++					0xC2000000	0 0x4E000000	0x4E000000	0 0x1E00000
++					0x81000000	0 0x4FE00000	0x4FE00000	0 0x0100000
++					0x80000000	0 0x4FF00000	0x4FF00000	0 0x0100000>;
++
++			bus-range = <0x80 0xff>;
++
++			/*	cfg			inbound translator	*/
++			reg =	<0x47e00000 0x1000>,	<0x47f00000 0x100>;
++
++			phys = <&pcie_phy>;
++			phy-names = "pcie-phy";
++
++			#interrupt-cells = <1>;
++			/* wild card mask, match all bus address & interrupt specifier */
++			/* format: bus address mask, interrupt specifier mask */
++			/* each bit 1 means need match, 0 means ignored when match */
++			interrupt-map-mask = <0 0 0 0>;
++			/* format: a list of: bus address, interrupt specifier,
++			 * parent interrupt controller & specifier */
++			interrupt-map = <0 0 0 0 &gic 0 20 0x304>;
++
++			/* gpios = <&gpio1 12 0>; */
++			clocks = <&stdclk CLK_820_PCIEB>, <&pllb>;
++			clock-names = "pcie", "busclk";
++			resets = <&reset RESET_PCIEB>;
++			reset-names = "pcie";
++
++			plxtech,pcie-hcsl-bit = <3>;
++			plxtech,pcie-ctrl-offset = <0x124>;
++			plxtech,pcie-outbound-offset = <0x174>;
++			status = "disabled";
++		};
+ 	};
+ };
diff --git a/target/linux/oxnas/patches-5.10/500-oxnas-sata.patch b/target/linux/oxnas/patches-5.10/500-oxnas-sata.patch
new file mode 100644
index 0000000000..d3ec2e2d48
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/500-oxnas-sata.patch
@@ -0,0 +1,60 @@
+--- a/drivers/ata/Kconfig
++++ b/drivers/ata/Kconfig
+@@ -568,6 +568,14 @@ config SATA_VITESSE
+ 
+ 	  If unsure, say N.
+ 
++config SATA_OXNAS
++	tristate "PLXTECH NAS782X SATA support"
++	select SATA_HOST
++	help
++	  This option enables support for Nas782x Serial ATA controller.
++
++	  If unsure, say N.
++
+ comment "PATA SFF controllers with BMDMA"
+ 
+ config PATA_ALI
+--- a/drivers/ata/Makefile
++++ b/drivers/ata/Makefile
+@@ -46,6 +46,7 @@ obj-$(CONFIG_SATA_SVW)		+= sata_svw.o
+ obj-$(CONFIG_SATA_ULI)		+= sata_uli.o
+ obj-$(CONFIG_SATA_VIA)		+= sata_via.o
+ obj-$(CONFIG_SATA_VITESSE)	+= sata_vsc.o
++obj-$(CONFIG_SATA_OXNAS)	+= sata_oxnas.o
+ 
+ # SFF PATA w/ BMDMA
+ obj-$(CONFIG_PATA_ALI)		+= pata_ali.o
+--- a/arch/arm/boot/dts/ox820.dtsi
++++ b/arch/arm/boot/dts/ox820.dtsi
+@@ -399,5 +399,20 @@
+ 			plxtech,pcie-outbound-offset = <0x174>;
+ 			status = "disabled";
+ 		};
++
++		sata: sata@45900000 {
++			compatible = "plxtech,nas782x-sata";
++				/*	ports		dmactl		sgdma	*/
++			reg = <0x45900000 0x20000>, <0x459A0000 0x40>, <0x459B0000 0x20>,
++				/*	core		phy		descriptors (optional)	*/
++				<0x459E0000 0x2000>, <0x44900000 0x0C>, <0x50000000 0x1000>;
++			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&stdclk CLK_820_SATA>;
++			resets = <&reset RESET_SATA>, <&reset RESET_SATA_LINK>, <&reset RESET_SATA_PHY>;
++			reset-names = "sata", "link", "phy";
++			nr-ports = <1>;
++			status = "disabled";
++		};
++
+ 	};
+ };
+--- a/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
++++ b/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
+@@ -111,3 +111,7 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pinctrl_etha_mdio>;
+ };
++
++&sata {
++	status = "okay";
++};
diff --git a/target/linux/oxnas/patches-5.10/510-ox820-libata-leds.patch b/target/linux/oxnas/patches-5.10/510-ox820-libata-leds.patch
new file mode 100644
index 0000000000..05ae9ba44b
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/510-ox820-libata-leds.patch
@@ -0,0 +1,10 @@
+--- a/arch/arm/mach-oxnas/Kconfig
++++ b/arch/arm/mach-oxnas/Kconfig
+@@ -2,6 +2,7 @@
+ menuconfig ARCH_OXNAS
+ 	bool "Oxford Semiconductor OXNAS Family SoCs"
+ 	select ARCH_HAS_RESET_CONTROLLER
++	select ARCH_WANT_LIBATA_LEDS
+ 	select COMMON_CLK_OXNAS
+ 	select GPIOLIB
+ 	select MFD_SYSCON
diff --git a/target/linux/oxnas/patches-5.10/800-oxnas-ehci.patch b/target/linux/oxnas/patches-5.10/800-oxnas-ehci.patch
new file mode 100644
index 0000000000..8b4d943810
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/800-oxnas-ehci.patch
@@ -0,0 +1,73 @@
+--- a/drivers/usb/host/Kconfig
++++ b/drivers/usb/host/Kconfig
+@@ -350,6 +350,13 @@ config USB_OCTEON_EHCI
+ 	  USB 2.0 device support.  All CN6XXX based chips with USB are
+ 	  supported.
+ 
++config USB_EHCI_OXNAS
++	tristate "OXNAS EHCI Module"
++	depends on USB_EHCI_HCD && ARCH_OXNAS
++	select USB_EHCI_ROOT_HUB_TT
++	help
++	  Enable support for the OX820 SOC's on-chip EHCI controller.
++
+ endif # USB_EHCI_HCD
+ 
+ config USB_OXU210HP_HCD
+--- a/drivers/usb/host/Makefile
++++ b/drivers/usb/host/Makefile
+@@ -48,6 +48,7 @@ obj-$(CONFIG_USB_EHCI_HCD_SPEAR)	+= ehci
+ obj-$(CONFIG_USB_EHCI_HCD_STI)	+= ehci-st.o
+ obj-$(CONFIG_USB_EHCI_EXYNOS)	+= ehci-exynos.o
+ obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-atmel.o
++obj-$(CONFIG_USB_EHCI_OXNAS)	+= ehci-oxnas.o
+ obj-$(CONFIG_USB_EHCI_TEGRA)	+= ehci-tegra.o
+ obj-$(CONFIG_USB_EHCI_BRCMSTB)	+= ehci-brcm.o
+ 
+--- a/arch/arm/boot/dts/ox820.dtsi
++++ b/arch/arm/boot/dts/ox820.dtsi
+@@ -106,6 +106,31 @@
+ 			status = "disabled";
+ 		};
+ 
++		ehci: ehci@40200100 {
++			compatible = "plxtech,nas782x-ehci";
++			reg = <0x40200100 0xf00>;
++			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&stdclk CLK_820_USBMPH>, <&pllb>, <&stdclk CLK_820_REF600>;
++			clock-names = "usb", "refsrc", "phyref";
++			resets = <&reset RESET_USBHS>, <&reset RESET_USBPHYA>, <&reset RESET_USBPHYB>;
++			reset-names = "host", "phya", "phyb";
++			oxsemi,sys-ctrl = <&sys>;
++			/* Otherwise ref300 is used, which is derived from sata phy
++			 * in that case, usb depends on sata initialization */
++			/* FIXME: how to make this dependency explicit ? */
++			oxsemi,ehci_use_pllb;
++			status = "disabled";
++
++			ehci_port1: port@1 {
++				reg = <1>;
++				#trigger-source-cells = <0>;
++			};
++			ehci_port2: port@2 {
++				reg = <2>;
++				#trigger-source-cells = <0>;
++			};
++		};
++
+ 		apb-bridge@44000000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+--- a/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
++++ b/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
+@@ -105,6 +105,10 @@
+ 	};
+ };
+ 
++&ehci {
++	status = "okay";
++};
++
+ &etha {
+ 	status = "okay";
+ 
diff --git a/target/linux/oxnas/patches-5.10/996-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/oxnas/patches-5.10/996-generic-Mangle-bootloader-s-kernel-arguments.patch
new file mode 100644
index 0000000000..07abd0c648
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/996-generic-Mangle-bootloader-s-kernel-arguments.patch
@@ -0,0 +1,189 @@
+From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001
+From: Adrian Panella <ianchi74@outlook.com>
+Date: Thu, 9 Mar 2017 09:37:17 +0100
+Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments
+
+The command-line arguments provided by the boot loader will be
+appended to a new device tree property: bootloader-args.
+If there is a property "append-rootblock" in DT under /chosen
+and a root= option in bootloaders command line it will be parsed
+and added to DT bootargs with the form: <append-rootblock>XX.
+Only command line ATAG will be processed, the rest of the ATAGs
+sent by bootloader will be ignored.
+This is usefull in dual boot systems, to get the current root partition
+without afecting the rest of the system.
+
+Signed-off-by: Adrian Panella <ianchi74@outlook.com>
+---
+ arch/arm/Kconfig                        | 11 +++++
+ arch/arm/boot/compressed/atags_to_fdt.c | 72 ++++++++++++++++++++++++++++++++-
+ init/main.c                             | 16 ++++++++
+ 3 files changed, 98 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1780,6 +1780,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
+ 	  The command-line arguments provided by the boot loader will be
+ 	  appended to the the device tree bootargs property.
+ 
++config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
++	bool "Append rootblock parsing bootloader's kernel arguments"
++	help
++	  The command-line arguments provided by the boot loader will be
++	  appended to a new device tree property: bootloader-args.
++	  If there is a property "append-rootblock" in DT under /chosen 
++	  and a root= option in bootloaders command line it will be parsed 
++	  and added to DT bootargs with the form: <append-rootblock>XX.
++	  Only command line ATAG will be processed, the rest of the ATAGs
++	  sent by bootloader will be ignored.
++
+ endchoice
+ 
+ config CMDLINE
+--- a/arch/arm/boot/compressed/atags_to_fdt.c
++++ b/arch/arm/boot/compressed/atags_to_fdt.c
+@@ -5,6 +5,8 @@
+ 
+ #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND)
+ #define do_extend_cmdline 1
++#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++#define do_extend_cmdline 1
+ #else
+ #define do_extend_cmdline 0
+ #endif
+@@ -69,6 +71,59 @@ static uint32_t get_cell_size(const void
+ 	return cell_size;
+ }
+ 
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++
++static char *append_rootblock(char *dest, const char *str, int len, void *fdt)
++{
++	char *ptr, *end;
++	char *root="root=";
++	int i, l;
++	const char *rootblock;
++
++	//ARM doesn't have __HAVE_ARCH_STRSTR, so search manually
++	ptr = str - 1;
++
++	do {
++		//first find an 'r' at the begining or after a space
++		do {
++			ptr++;
++			ptr = strchr(ptr, 'r');
++			if(!ptr) return dest;
++
++		} while (ptr != str && *(ptr-1) != ' ');
++
++		//then check for the rest
++		for(i = 1; i <= 4; i++)
++			if(*(ptr+i) != *(root+i)) break;
++
++	} while (i != 5);
++
++	end = strchr(ptr, ' ');
++	end = end ? (end - 1) : (strchr(ptr, 0) - 1);
++
++	//find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX )
++	for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++);
++	ptr = end + 1;
++
++	/* if append-rootblock property is set use it to append to command line */
++	rootblock = getprop(fdt, "/chosen", "append-rootblock", &l);
++	if(rootblock != NULL) {
++		if(*dest != ' ') {
++			*dest = ' ';
++			dest++;
++			len++;
++		}
++		if (len + l + i <= COMMAND_LINE_SIZE) {
++			memcpy(dest, rootblock, l);
++			dest += l - 1;
++			memcpy(dest, ptr, i);
++			dest += i;
++		}
++	}
++	return dest;
++}
++#endif
++
+ static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline)
+ {
+ 	char cmdline[COMMAND_LINE_SIZE];
+@@ -88,12 +143,21 @@ static void merge_fdt_bootargs(void *fdt
+ 
+ 	/* and append the ATAG_CMDLINE */
+ 	if (fdt_cmdline) {
++
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++		//save original bootloader args
++		//and append ubi.mtd with root partition number to current cmdline
++		setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline);
++		ptr = append_rootblock(ptr, fdt_cmdline, len, fdt);
++
++#else
+ 		len = strlen(fdt_cmdline);
+ 		if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) {
+ 			*ptr++ = ' ';
+ 			memcpy(ptr, fdt_cmdline, len);
+ 			ptr += len;
+ 		}
++#endif
+ 	}
+ 	*ptr = '\0';
+ 
+@@ -168,7 +232,9 @@ int atags_to_fdt(void *atag_list, void *
+ 			else
+ 				setprop_string(fdt, "/chosen", "bootargs",
+ 					       atag->u.cmdline.cmdline);
+-		} else if (atag->hdr.tag == ATAG_MEM) {
++		}
++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
++		else if (atag->hdr.tag == ATAG_MEM) {
+ 			if (memcount >= sizeof(mem_reg_property)/4)
+ 				continue;
+ 			if (!atag->u.mem.size)
+@@ -212,6 +278,10 @@ int atags_to_fdt(void *atag_list, void *
+ 		setprop(fdt, "/memory", "reg", mem_reg_property,
+ 			4 * memcount * memsize);
+ 	}
++#else
++
++	}
++#endif
+ 
+ 	return fdt_pack(fdt);
+ }
+--- a/init/main.c
++++ b/init/main.c
+@@ -110,6 +110,10 @@
+ 
+ #include <kunit/test.h>
+ 
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++#include <linux/of.h>
++#endif
++
+ static int kernel_init(void *);
+ 
+ extern void init_IRQ(void);
+@@ -903,6 +907,18 @@ asmlinkage __visible void __init __no_sa
+ 	page_alloc_init();
+ 
+ 	pr_notice("Kernel command line: %s\n", saved_command_line);
++
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++	//Show bootloader's original command line for reference
++	if(of_chosen) {
++		const char *prop = of_get_property(of_chosen, "bootloader-args", NULL);
++		if(prop)
++			pr_notice("Bootloader command line (ignored): %s\n", prop);
++		else
++			pr_notice("Bootloader command line not present\n");
++	}
++#endif
++
+ 	/* parameters may set static keys */
+ 	jump_label_init();
+ 	parse_early_param();
diff --git a/target/linux/oxnas/patches-5.10/999-libata-hacks.patch b/target/linux/oxnas/patches-5.10/999-libata-hacks.patch
new file mode 100644
index 0000000000..b02c506e9f
--- /dev/null
+++ b/target/linux/oxnas/patches-5.10/999-libata-hacks.patch
@@ -0,0 +1,57 @@
+--- a/drivers/ata/libata-core.c
++++ b/drivers/ata/libata-core.c
+@@ -1528,6 +1528,14 @@ unsigned ata_exec_internal_sg(struct ata
+ 		return AC_ERR_SYSTEM;
+ 	}
+ 
++	if (ap->ops->acquire_hw && !ap->ops->acquire_hw(ap, 0, 0)) {
++		spin_unlock_irqrestore(ap->lock, flags);
++		if (!ap->ops->acquire_hw(ap, 1, (2*HZ))) {
++			return AC_ERR_TIMEOUT;
++		}
++		spin_lock_irqsave(ap->lock, flags);
++	}
++
+ 	/* initialize internal qc */
+ 	qc = __ata_qc_from_tag(ap, ATA_TAG_INTERNAL);
+ 
+@@ -4520,6 +4528,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
+ 	if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
+ 		return NULL;
+ 
++	if (ap->ops->qc_new && ap->ops->qc_new(ap))
++		return NULL;
++
+ 	/* libsas case */
+ 	if (ap->flags & ATA_FLAG_SAS_HOST) {
+ 		tag = ata_sas_allocate_tag(ap);
+@@ -4565,6 +4576,8 @@ void ata_qc_free(struct ata_queued_cmd *
+ 		qc->tag = ATA_TAG_POISON;
+ 		if (ap->flags & ATA_FLAG_SAS_HOST)
+ 			ata_sas_free_tag(tag, ap);
++		if (ap->ops->qc_free)
++			ap->ops->qc_free(qc);
+ 	}
+ }
+ 
+--- a/include/linux/libata.h
++++ b/include/linux/libata.h
+@@ -911,6 +911,8 @@ struct ata_port_operations {
+ 	enum ata_completion_errors (*qc_prep)(struct ata_queued_cmd *qc);
+ 	unsigned int (*qc_issue)(struct ata_queued_cmd *qc);
+ 	bool (*qc_fill_rtf)(struct ata_queued_cmd *qc);
++	int (*qc_new)(struct ata_port *ap);
++	void (*qc_free)(struct ata_queued_cmd *qc);
+ 
+ 	/*
+ 	 * Configuration and exception handling
+@@ -1001,6 +1003,9 @@ struct ata_port_operations {
+ 	void (*phy_reset)(struct ata_port *ap);
+ 	void (*eng_timeout)(struct ata_port *ap);
+ 
++	int (*acquire_hw)(struct ata_port *ap, int may_sleep,
++			  int timeout_jiffies);
++
+ 	/*
+ 	 * ->inherits must be the last field and all the preceding
+ 	 * fields must be pointers.