Merge Official Source

Signed-off-by: CN_SZTL <cnsztl@project-openwrt.eu.org>
This commit is contained in:
CN_SZTL 2021-02-02 23:41:15 +08:00
commit 45f1463e86
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
22 changed files with 377 additions and 118 deletions

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@ -6,9 +6,9 @@ ifdef CONFIG_TESTING_KERNEL
KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
LINUX_VERSION-5.4 = .93
LINUX_VERSION-5.4 = .94
LINUX_KERNEL_HASH-5.4.93 = d37449403664cc3b1bac96d0d9a199dbe619885cd899c0ae3108843f42e3d522
LINUX_KERNEL_HASH-5.4.94 = c23df57db7312e9afa5ce477046e227a3c2153efbe1f29045ad23c820aad2b39
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

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@ -0,0 +1,27 @@
From 2114d68b3c755ec8043ae9e43ac8e9753e0cec84 Mon Sep 17 00:00:00 2001
From: Marty Jones <mj8263788@gmail.com>
Date: Sun, 17 Jan 2021 15:26:09 -0500
Subject: [PATCH] rockpro64: disable CONFIG_USE_PREBOOT
On commit https://github.com/u-boot/u-boot/commit/f81f9f0ebac596bae7f27db095f4f0272b606cc3
CONFIG_USE_PREBOOT was enabled on the RockPro64.
When the board is booting, U-Boot hangs as soon as it disables the USB
controller. This is a workaround until a final solution is deployed
upstream.
Signed-off-by: Marty Jones <mj8263788@gmail.com>
---
configs/rockpro64-rk3399_defconfig | 1 -
1 file changed, 1 deletion(-)
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
CONFIG_DEBUG_UART=y
-CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y

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@ -346,7 +346,7 @@ mac80211_hostapd_setup_base() {
append base_cfg "he_rts_threshold=1023" "$N"
append base_cfg "he_su_beamformer=1" "$N"
append base_cfg "he_su_beamformee=1" "$N"
append base_cfg "he_mu_beamformer=1023" "$N"
append base_cfg "he_mu_beamformer=1" "$N"
fi
hostapd_prepare_device_config "$hostapd_conf_file" nl80211

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@ -1,27 +1,26 @@
--- a/drivers/net/wireless/ath/ath9k/channel.c
+++ b/drivers/net/wireless/ath/ath9k/channel.c
@@ -15,6 +15,8 @@
@@ -15,6 +15,7 @@
*/
#include "ath9k.h"
+#include <linux/ath9k_platform.h>
+#include "hsr.h"
/* Set/change channels. If the channel is really being changed, it's done
* by reseting the chip. To accomplish this we must first cleanup any pending
@@ -22,6 +24,7 @@
@@ -22,6 +23,7 @@
*/
static int ath_set_channel(struct ath_softc *sc)
{
+ struct ath9k_platform_data *pdata = sc->dev->platform_data;
+ struct device_node *np = sc->dev->of_node;
struct ath_hw *ah = sc->sc_ah;
struct ath_common *common = ath9k_hw_common(ah);
struct ieee80211_hw *hw = sc->hw;
@@ -42,6 +45,11 @@ static int ath_set_channel(struct ath_so
@@ -42,6 +44,11 @@ static int ath_set_channel(struct ath_so
ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
chan->center_freq, chandef->width);
+ if (pdata && pdata->ubnt_hsr) {
+ if (of_property_read_bool(np, "ubnt,hsr")) {
+ ath9k_hsr_enable(ah, chandef->width, chan->center_freq);
+ ath9k_hsr_status(ah);
+ }
@ -332,30 +331,27 @@
+#endif /* HSR_H */
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -16,8 +16,10 @@
#include <linux/nl80211.h>
@@ -18,6 +18,7 @@
#include <linux/delay.h>
+#include <linux/ath9k_platform.h>
#include "ath9k.h"
#include "btcoex.h"
+#include "hsr.h"
u8 ath9k_parse_mpdudensity(u8 mpdudensity)
{
@@ -649,6 +651,7 @@ void ath_reset_work(struct work_struct *
@@ -649,6 +650,7 @@ void ath_reset_work(struct work_struct *
static int ath9k_start(struct ieee80211_hw *hw)
{
struct ath_softc *sc = hw->priv;
+ struct ath9k_platform_data *pdata = sc->dev->platform_data;
+ struct device_node *np = sc->dev->of_node;
struct ath_hw *ah = sc->sc_ah;
struct ath_common *common = ath9k_hw_common(ah);
struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
@@ -727,6 +730,11 @@ static int ath9k_start(struct ieee80211_
@@ -727,6 +729,11 @@ static int ath9k_start(struct ieee80211_
AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
}
+ if (pdata && pdata->ubnt_hsr) {
+ if (of_property_read_bool(np, "ubnt,hsr")) {
+ ath9k_hsr_init(ah);
+ ath9k_hsr_disable(ah);
+ }
@ -373,17 +369,6 @@
ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o
--- a/include/linux/ath9k_platform.h
+++ b/include/linux/ath9k_platform.h
@@ -53,6 +53,8 @@ struct ath9k_platform_data {
unsigned num_btns;
const struct gpio_keys_button *btns;
unsigned btn_poll_interval;
+
+ bool ubnt_hsr;
};
#endif /* _LINUX_ATH9K_PLATFORM_H */
--- a/local-symbols
+++ b/local-symbols
@@ -112,6 +112,7 @@ ATH9K_WOW=

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@ -0,0 +1,38 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Mon, 1 Feb 2021 00:59:14 +0100
Subject: [PATCH] mac80211: fix station rate table updates on assoc
If the driver uses .sta_add, station entries are only uploaded after the sta
is in assoc state. Fix early station rate table updates by deferring them
until the sta has been uploaded
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/net/mac80211/driver-ops.c
+++ b/net/mac80211/driver-ops.c
@@ -125,8 +125,11 @@ int drv_sta_state(struct ieee80211_local
} else if (old_state == IEEE80211_STA_AUTH &&
new_state == IEEE80211_STA_ASSOC) {
ret = drv_sta_add(local, sdata, &sta->sta);
- if (ret == 0)
+ if (ret == 0) {
sta->uploaded = true;
+ if (rcu_dereference(sta->sta.rates))
+ drv_sta_rate_tbl_update(local, sdata, &sta->sta);
+ }
} else if (old_state == IEEE80211_STA_ASSOC &&
new_state == IEEE80211_STA_AUTH) {
drv_sta_remove(local, sdata, &sta->sta);
--- a/net/mac80211/rate.c
+++ b/net/mac80211/rate.c
@@ -934,7 +934,8 @@ int rate_control_set_rates(struct ieee80
if (old)
kfree_rcu(old, rcu_head);
- drv_sta_rate_tbl_update(hw_to_local(hw), sta->sdata, pubsta);
+ if (sta->uploaded)
+ drv_sta_rate_tbl_update(hw_to_local(hw), sta->sdata, pubsta);
ieee80211_sta_set_expected_throughput(pubsta, sta_get_expected_throughput(sta));

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@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=procd
PKG_RELEASE:=2
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
PKG_SOURCE_DATE:=2020-12-12
PKG_SOURCE_VERSION:=7f12c89d0b99a2f04e91b2327e74c049f6362b67
PKG_MIRROR_HASH:=b71134d96a54327baae532415df430ad91c757c7862c736447f03bd22e2d5ec5
PKG_SOURCE_DATE:=2021-02-02
PKG_SOURCE_VERSION:=fd183797bc527a160958a5dee6b5af35646ccc6b
PKG_MIRROR_HASH:=29c851100a05e077adc12719b867714d38b06e5cfcd84b9485b1cb5552399f2e
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

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@ -0,0 +1,102 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7241_ubnt_unifi.dtsi"
/ {
compatible = "ubnt,unifi-ap-outdoor-plus", "qca,ar7241";
model = "Ubiquiti UniFi AP Outdoor+";
aliases {
led-boot = &led_white;
led-failsafe = &led_white;
led-running = &led_blue;
led-upgrade = &led_blue;
};
leds {
compatible = "gpio-leds";
led_blue: blue {
label = "blue";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
};
led_white: white {
label = "white";
gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0xf60000>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x300000>;
/* Can be resized w/o issues.
* U-Boot can load kernel from the
* entirety of the "firmware" partition space.
*/
};
partition@300000 {
label = "rootfs";
reg = <0x300000 0xc60000>;
};
};
partition@fb0000 {
label = "cfg";
reg = <0xfb0000 0x40000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x10000>;
read-only;
};
};
};
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x6>;
};
&wifi {
ubnt,hsr;
};

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@ -1,9 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7241.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar7241_ubnt_unifi.dtsi"
/ {
compatible = "ubnt,unifi", "qca,ar7241";
@ -14,23 +11,6 @@
led-failsafe = &led_dome_green;
led-running = &led_dome_green;
led-upgrade = &led_dome_green;
label-mac-device = &wifi;
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>;
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
@ -48,14 +28,6 @@
};
};
&uart {
status = "okay";
};
&pll {
clocks = <&extosc>;
};
&spi {
status = "okay";
@ -108,21 +80,6 @@
};
};
&pcie {
status = "okay";
wifi: wifi@0,0 {
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
};
&eth1 {
compatible = "syscon", "simple-mfd";
};

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@ -0,0 +1,52 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7241.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
label-mac-device = &wifi;
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>;
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&uart {
status = "okay";
};
&pll {
clocks = <&extosc>;
};
&pcie {
status = "okay";
wifi: wifi@0,0 {
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
};

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@ -13,6 +13,59 @@
#include "ag71xx.h"
struct ag71xx_statistic {
unsigned short offset;
u32 mask;
const char name[ETH_GSTRING_LEN];
};
static const struct ag71xx_statistic ag71xx_statistics[] = {
{ 0x0080, GENMASK(17, 0), "Tx/Rx 64 Byte", },
{ 0x0084, GENMASK(17, 0), "Tx/Rx 65-127 Byte", },
{ 0x0088, GENMASK(17, 0), "Tx/Rx 128-255 Byte", },
{ 0x008C, GENMASK(17, 0), "Tx/Rx 256-511 Byte", },
{ 0x0090, GENMASK(17, 0), "Tx/Rx 512-1023 Byte", },
{ 0x0094, GENMASK(17, 0), "Tx/Rx 1024-1518 Byte", },
{ 0x0098, GENMASK(17, 0), "Tx/Rx 1519-1522 Byte VLAN", },
{ 0x009C, GENMASK(23, 0), "Rx Byte", },
{ 0x00A0, GENMASK(17, 0), "Rx Packet", },
{ 0x00A4, GENMASK(11, 0), "Rx FCS Error", },
{ 0x00A8, GENMASK(17, 0), "Rx Multicast Packet", },
{ 0x00AC, GENMASK(21, 0), "Rx Broadcast Packet", },
{ 0x00B0, GENMASK(17, 0), "Rx Control Frame Packet", },
{ 0x00B4, GENMASK(11, 0), "Rx Pause Frame Packet", },
{ 0x00B8, GENMASK(11, 0), "Rx Unknown OPCode Packet", },
{ 0x00BC, GENMASK(11, 0), "Rx Alignment Error", },
{ 0x00C0, GENMASK(15, 0), "Rx Frame Length Error", },
{ 0x00C4, GENMASK(11, 0), "Rx Code Error", },
{ 0x00C8, GENMASK(11, 0), "Rx Carrier Sense Error", },
{ 0x00CC, GENMASK(11, 0), "Rx Undersize Packet", },
{ 0x00D0, GENMASK(11, 0), "Rx Oversize Packet", },
{ 0x00D4, GENMASK(11, 0), "Rx Fragments", },
{ 0x00D8, GENMASK(11, 0), "Rx Jabber", },
{ 0x00DC, GENMASK(11, 0), "Rx Dropped Packet", },
{ 0x00E0, GENMASK(23, 0), "Tx Byte", },
{ 0x00E4, GENMASK(17, 0), "Tx Packet", },
{ 0x00E8, GENMASK(17, 0), "Tx Multicast Packet", },
{ 0x00EC, GENMASK(17, 0), "Tx Broadcast Packet", },
{ 0x00F0, GENMASK(11, 0), "Tx Pause Control Frame", },
{ 0x00F4, GENMASK(11, 0), "Tx Deferral Packet", },
{ 0x00F8, GENMASK(11, 0), "Tx Excessive Deferral Packet", },
{ 0x00FC, GENMASK(11, 0), "Tx Single Collision Packet", },
{ 0x0100, GENMASK(11, 0), "Tx Multiple Collision", },
{ 0x0104, GENMASK(11, 0), "Tx Late Collision Packet", },
{ 0x0108, GENMASK(11, 0), "Tx Excessive Collision Packet", },
{ 0x010C, GENMASK(12, 0), "Tx Total Collision", },
{ 0x0110, GENMASK(11, 0), "Tx Pause Frames Honored", },
{ 0x0114, GENMASK(11, 0), "Tx Drop Frame", },
{ 0x0118, GENMASK(11, 0), "Tx Jabber Frame", },
{ 0x011C, GENMASK(11, 0), "Tx FCS Error", },
{ 0x0120, GENMASK(11, 0), "Tx Control Frame", },
{ 0x0124, GENMASK(11, 0), "Tx Oversize Frame", },
{ 0x0128, GENMASK(11, 0), "Tx Undersize Frame", },
{ 0x012C, GENMASK(11, 0), "Tx Fragment", },
};
static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev)
{
struct ag71xx *ag = netdev_priv(dev);
@ -95,6 +148,36 @@ static int ag71xx_ethtool_nway_reset(struct net_device *dev)
return genphy_restart_aneg(phydev);
}
static void ag71xx_ethtool_get_strings(struct net_device *netdev, u32 sset,
u8 *data)
{
if (sset == ETH_SS_STATS) {
int i;
for (i = 0; i < ARRAY_SIZE(ag71xx_statistics); i++)
memcpy(data + i * ETH_GSTRING_LEN,
ag71xx_statistics[i].name, ETH_GSTRING_LEN);
}
}
static void ag71xx_ethtool_get_stats(struct net_device *ndev,
struct ethtool_stats *stats, u64 *data)
{
struct ag71xx *ag = netdev_priv(ndev);
int i;
for (i = 0; i < ARRAY_SIZE(ag71xx_statistics); i++)
*data++ = ag71xx_rr(ag, ag71xx_statistics[i].offset)
& ag71xx_statistics[i].mask;
}
static int ag71xx_ethtool_get_sset_count(struct net_device *ndev, int sset)
{
if (sset == ETH_SS_STATS)
return ARRAY_SIZE(ag71xx_statistics);
return -EOPNOTSUPP;
}
struct ethtool_ops ag71xx_ethtool_ops = {
.get_msglevel = ag71xx_ethtool_get_msglevel,
.set_msglevel = ag71xx_ethtool_set_msglevel,
@ -105,4 +188,7 @@ struct ethtool_ops ag71xx_ethtool_ops = {
.get_link = ethtool_op_get_link,
.get_ts_info = ethtool_op_get_ts_info,
.nway_reset = ag71xx_ethtool_nway_reset,
.get_strings = ag71xx_ethtool_get_strings,
.get_ethtool_stats = ag71xx_ethtool_get_stats,
.get_sset_count = ag71xx_ethtool_get_sset_count,
};

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@ -108,7 +108,8 @@ ath79_setup_interfaces()
alfa-network,n5q|\
devolo,dvl1200e|\
devolo,dvl1750e|\
ocedo,ursus)
ocedo,ursus|\
ubnt,unifi-ap-outdoor-plus)
ucidef_set_interface_lan "eth0 eth1"
;;
avm,fritz4020|\

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@ -74,7 +74,8 @@ case "$FIRMWARE" in
avm,fritz300e)
caldata_extract_reverse "urloader" 0x1541 0x440
;;
buffalo,wzr-hp-g302h-a1a0)
buffalo,wzr-hp-g302h-a1a0|\
ubnt,unifi-ap-outdoor-plus)
caldata_extract "art" 0x1000 0xeb8
;;
buffalo,wzr-hp-g450h|\

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@ -120,6 +120,18 @@ define Device/ubnt-xw
UBNT_VERSION := 6.0.4
endef
define Device/ubnt-unifi-jffs2
$(Device/ubnt)
KERNEL_SIZE := 3072k
IMAGE_SIZE := 15744k
UBNT_TYPE := BZ
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma | jffs2 kernel0
IMAGES := sysupgrade.bin factory.bin
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs |\
pad-rootfs | append-metadata | check-size
IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | mkubntimage2
endef
define Device/ubnt-acb
$(Device/ubnt)
IMAGE_SIZE := 15744k
@ -420,19 +432,19 @@ define Device/ubnt_unifiac-pro
endef
TARGET_DEVICES += ubnt_unifiac-pro
define Device/ubnt_unifi-ap-outdoor-plus
$(Device/ubnt-bz)
$(Device/ubnt-unifi-jffs2)
DEVICE_MODEL := UniFi AP Outdoor+
SUPPORTED_DEVICES += unifi-outdoor-plus
endef
TARGET_DEVICES += ubnt_unifi-ap-outdoor-plus
define Device/ubnt_unifi-ap-pro
$(Device/ubnt-unifi-jffs2)
SOC := ar9344
DEVICE_VENDOR := Ubiquiti
DEVICE_MODEL := UniFi AP Pro
UBNT_TYPE := BZ
UBNT_CHIP := ar934x
KERNEL_SIZE := 3072k
IMAGE_SIZE := 15744k
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma | jffs2 kernel0
IMAGES := sysupgrade.bin factory.bin
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs |\
pad-rootfs | append-metadata | check-size
IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | mkubntimage2
SUPPORTED_DEVICES += uap-pro
endef
TARGET_DEVICES += ubnt_unifi-ap-pro

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@ -19,7 +19,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -187,7 +187,7 @@ static void __init zone_sizes_init(unsig
@@ -181,7 +181,7 @@ static void __init zone_sizes_init(unsig
unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
#ifdef CONFIG_ZONE_DMA32

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@ -18,16 +18,16 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -56,7 +56,7 @@ EXPORT_SYMBOL(physvirt_offset);
struct page *vmemmap __ro_after_init;
EXPORT_SYMBOL(vmemmap);
@@ -50,7 +50,7 @@
s64 memstart_addr __ro_after_init = -1;
EXPORT_SYMBOL(memstart_addr);
-phys_addr_t arm64_dma_phys_limit __ro_after_init;
+phys_addr_t arm64_dma32_phys_limit __ro_after_init;
#ifdef CONFIG_KEXEC_CORE
/*
@@ -174,7 +174,7 @@ static void __init reserve_elfcorehdr(vo
@@ -168,7 +168,7 @@ static void __init reserve_elfcorehdr(vo
* currently assumes that for memory starting above 4G, 32-bit devices will
* use a DMA offset.
*/
@ -36,7 +36,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
{
phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32);
return min(offset + (1ULL << 32), memblock_end_of_DRAM());
@@ -187,7 +187,7 @@ static void __init zone_sizes_init(unsig
@@ -181,7 +181,7 @@ static void __init zone_sizes_init(unsig
unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
#ifdef CONFIG_ZONE_DMA32
@ -45,7 +45,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
#endif
max_zone_pfns[ZONE_NORMAL] = max;
@@ -200,16 +200,16 @@ static void __init zone_sizes_init(unsig
@@ -194,16 +194,16 @@ static void __init zone_sizes_init(unsig
{
struct memblock_region *reg;
unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
@ -66,7 +66,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
memcpy(zhole_size, zone_size, sizeof(zhole_size));
@@ -221,14 +221,14 @@ static void __init zone_sizes_init(unsig
@@ -215,14 +215,14 @@ static void __init zone_sizes_init(unsig
continue;
#ifdef CONFIG_ZONE_DMA32
@ -85,7 +85,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
zhole_size[ZONE_NORMAL] -= normal_end - normal_start;
}
}
@@ -420,9 +420,9 @@ void __init arm64_memblock_init(void)
@@ -410,9 +410,9 @@ void __init arm64_memblock_init(void)
/* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA32))
@ -97,7 +97,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
reserve_crashkernel();
@@ -430,7 +430,7 @@ void __init arm64_memblock_init(void)
@@ -420,7 +420,7 @@ void __init arm64_memblock_init(void)
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
@ -106,7 +106,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
}
void __init bootmem_init(void)
@@ -534,7 +534,7 @@ static void __init free_unused_memmap(vo
@@ -524,7 +524,7 @@ static void __init free_unused_memmap(vo
void __init mem_init(void)
{
if (swiotlb_force == SWIOTLB_FORCE ||

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@ -51,9 +51,9 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
#endif
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -56,6 +56,13 @@ EXPORT_SYMBOL(physvirt_offset);
struct page *vmemmap __ro_after_init;
EXPORT_SYMBOL(vmemmap);
@@ -50,6 +50,13 @@
s64 memstart_addr __ro_after_init = -1;
EXPORT_SYMBOL(memstart_addr);
+/*
+ * We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of
@ -65,7 +65,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
phys_addr_t arm64_dma32_phys_limit __ro_after_init;
#ifdef CONFIG_KEXEC_CORE
@@ -169,15 +176,16 @@ static void __init reserve_elfcorehdr(vo
@@ -163,15 +170,16 @@ static void __init reserve_elfcorehdr(vo
{
}
#endif /* CONFIG_CRASH_DUMP */
@ -88,7 +88,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
}
#ifdef CONFIG_NUMA
@@ -186,6 +194,9 @@ static void __init zone_sizes_init(unsig
@@ -180,6 +188,9 @@ static void __init zone_sizes_init(unsig
{
unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
@ -98,7 +98,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
#ifdef CONFIG_ZONE_DMA32
max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit);
#endif
@@ -201,13 +212,18 @@ static void __init zone_sizes_init(unsig
@@ -195,13 +206,18 @@ static void __init zone_sizes_init(unsig
struct memblock_region *reg;
unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
unsigned long max_dma32 = min;
@ -119,7 +119,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
#endif
zone_size[ZONE_NORMAL] = max - max_dma32;
@@ -219,11 +235,17 @@ static void __init zone_sizes_init(unsig
@@ -213,11 +229,17 @@ static void __init zone_sizes_init(unsig
if (start >= max)
continue;
@ -140,7 +140,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
}
#endif
if (end > max_dma32) {
@@ -418,9 +440,11 @@ void __init arm64_memblock_init(void)
@@ -408,9 +430,11 @@ void __init arm64_memblock_init(void)
early_init_fdt_scan_reserved_mem();
@ -154,7 +154,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
else
arm64_dma32_phys_limit = PHYS_MASK + 1;
@@ -430,7 +454,7 @@ void __init arm64_memblock_init(void)
@@ -420,7 +444,7 @@ void __init arm64_memblock_init(void)
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
@ -163,7 +163,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
}
void __init bootmem_init(void)
@@ -534,7 +558,7 @@ static void __init free_unused_memmap(vo
@@ -524,7 +548,7 @@ static void __init free_unused_memmap(vo
void __init mem_init(void)
{
if (swiotlb_force == SWIOTLB_FORCE ||

View File

@ -50,7 +50,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
/*
* We need to be able to catch inadvertent references to memstart_addr
* that occur (potentially in generic code) before arm64_memblock_init()
@@ -440,8 +443,10 @@ void __init arm64_memblock_init(void)
@@ -430,8 +433,10 @@ void __init arm64_memblock_init(void)
early_init_fdt_scan_reserved_mem();

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@ -24,7 +24,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -91,7 +91,7 @@ static void __init reserve_crashkernel(v
@@ -85,7 +85,7 @@ static void __init reserve_crashkernel(v
if (crash_base == 0) {
/* Current arm64 boot protocol requires 2MB alignment */
@ -33,7 +33,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
crash_size, SZ_2M);
if (crash_base == 0) {
pr_warn("cannot allocate crashkernel (size:0x%llx)\n",
@@ -459,7 +459,7 @@ void __init arm64_memblock_init(void)
@@ -449,7 +449,7 @@ void __init arm64_memblock_init(void)
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;

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@ -50,7 +50,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -214,15 +214,14 @@ static void __init zone_sizes_init(unsig
@@ -208,15 +208,14 @@ static void __init zone_sizes_init(unsig
{
struct memblock_region *reg;
unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
@ -69,7 +69,7 @@ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
#endif
#ifdef CONFIG_ZONE_DMA32
max_dma32 = PFN_DOWN(arm64_dma32_phys_limit);
@@ -236,25 +235,23 @@ static void __init zone_sizes_init(unsig
@@ -230,25 +229,23 @@ static void __init zone_sizes_init(unsig
unsigned long start = memblock_region_memory_base_pfn(reg);
unsigned long end = memblock_region_memory_end_pfn(reg);

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@ -53,8 +53,6 @@ struct ath9k_platform_data {
unsigned num_btns;
const struct gpio_keys_button *btns;
unsigned btn_poll_interval;
bool ubnt_hsr;
};
#endif /* _LINUX_ATH9K_PLATFORM_H */

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@ -14,7 +14,7 @@ Signed-off-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -416,6 +416,8 @@ void __init arm64_memblock_init(void)
@@ -406,6 +406,8 @@ void __init arm64_memblock_init(void)
initrd_end = initrd_start + phys_initrd_size;
}
@ -23,7 +23,7 @@ Signed-off-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
early_init_fdt_scan_reserved_mem();
/* 4GB maximum for 32-bit only capable devices */
@@ -426,8 +428,6 @@ void __init arm64_memblock_init(void)
@@ -416,8 +418,6 @@ void __init arm64_memblock_init(void)
reserve_crashkernel();

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@ -20,7 +20,7 @@ Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -1253,7 +1253,7 @@ static int mvebu_gpio_probe(struct platf
@@ -1248,7 +1248,7 @@ static int mvebu_gpio_probe(struct platf
* pins.
*/
for (i = 0; i < 4; i++) {