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rockchip: backport latest upstreamed patches

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-12-25 11:19:30 +08:00
parent 446b882fb1
commit 494e7859b8
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
16 changed files with 223 additions and 32 deletions
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11
target/linux/rockchip/patches-6.1/104-arm64-dts-rockchip-configure-pad-driver-strength-for.patch → target/linux/rockchip/patches-6.1/014-v6.8-arm64-dts-rockchip-configure-eth-pad-driver-strength-for-.patch
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@ -1,16 +1,17 @@
From f37aefd97d9c1abdba497b9af978f85754b0be8f Mon Sep 17 00:00:00 2001
From fc5a80a432607d05e85bba37971712405f75c546 Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@gmail.com>
Date: Wed, 13 Dec 2023 20:45:27 +0800
Subject: [PATCH] arm64: dts: rockchip: configure pad driver strength for
orangepi r1 plus lts
Date: Sat, 16 Dec 2023 12:07:23 +0800
Subject: [PATCH] arm64: dts: rockchip: configure eth pad driver strength
for orangepi r1 plus lts
The default strength is not enough to provide stable connection
under 3.3v LDO voltage.
Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS")
Cc: stable@vger.kernel.org # 6.6+
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20231216040723.17864-1-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

120
target/linux/rockchip/patches-6.1/050-33-v6.8-arm64-dts-rockchip-Add-vop-on-rk3588.patch Normal file
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@ -0,0 +1,120 @@
From d895dbef3f3a31ab50491bb48552e798cf555987 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Mon, 11 Dec 2023 20:00:04 +0800
Subject: [PATCH] arm64: dts: rockchip: Add vop on rk3588
Add vop dt node for rk3588.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20231211120004.1785616-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 83 +++++++++++++++++++++++
1 file changed, 83 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -385,6 +385,11 @@
#clock-cells = <0>;
};
+ display_subsystem: display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop_out>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -497,6 +502,16 @@
reg = <0x0 0xfd58c000 0x0 0x1000>;
};
+ vop_grf: syscon@fd5a4000 {
+ compatible = "rockchip,rk3588-vop-grf", "syscon";
+ reg = <0x0 0xfd5a4000 0x0 0x2000>;
+ };
+
+ vo1_grf: syscon@fd5a8000 {
+ compatible = "rockchip,rk3588-vo-grf", "syscon";
+ reg = <0x0 0xfd5a8000 0x0 0x100>;
+ };
+
php_grf: syscon@fd5b0000 {
compatible = "rockchip,rk3588-php-grf", "syscon";
reg = <0x0 0xfd5b0000 0x0 0x1000>;
@@ -616,6 +631,74 @@
status = "disabled";
};
+ vop: vop@fdd90000 {
+ compatible = "rockchip,rk3588-vop";
+ reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>;
+ reg-names = "vop", "gamma-lut";
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP>,
+ <&cru HCLK_VOP>,
+ <&cru DCLK_VOP0>,
+ <&cru DCLK_VOP1>,
+ <&cru DCLK_VOP2>,
+ <&cru DCLK_VOP3>,
+ <&cru PCLK_VOP_ROOT>;
+ clock-names = "aclk",
+ "hclk",
+ "dclk_vp0",
+ "dclk_vp1",
+ "dclk_vp2",
+ "dclk_vp3",
+ "pclk_vop";
+ iommus = <&vop_mmu>;
+ power-domains = <&power RK3588_PD_VOP>;
+ rockchip,grf = <&sys_grf>;
+ rockchip,vop-grf = <&vop_grf>;
+ rockchip,vo1-grf = <&vo1_grf>;
+ rockchip,pmu = <&pmu>;
+ status = "disabled";
+
+ vop_out: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vp0: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ vp1: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ vp2: port@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ vp3: port@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+ };
+
+ vop_mmu: iommu@fdd97e00 {
+ compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
+ reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+ clock-names = "aclk", "iface";
+ #iommu-cells = <0>;
+ power-domains = <&power RK3588_PD_VOP>;
+ status = "disabled";
+ };
+
uart0: serial@fd890000 {
compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
reg = <0x0 0xfd890000 0x0 0x100>;

44
target/linux/rockchip/patches-6.1/050-34-v6.8-arm64-dts-rockchip-Fix-rk3588-USB-power-domain-clocks.patch Normal file
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@ -0,0 +1,44 @@
From 44de8996ed5a10f08f2fe947182da6535edcfae5 Mon Sep 17 00:00:00 2001
From: Sam Edwards <cfsworks@gmail.com>
Date: Fri, 15 Dec 2023 19:10:19 -0700
Subject: [PATCH] arm64: dts: rockchip: Fix rk3588 USB power-domain clocks
The QoS blocks saved/restored when toggling the PD_USB power domain are
clocked by ACLK_USB. Attempting to access these memory regions without
that clock running will result in an indefinite CPU stall.
The PD_USB node wasn't specifying this clock dependency, resulting in
hangs when trying to toggle the power domain (either on or off), unless
we get "lucky" and have ACLK_USB running for another reason at the time.
This "luck" can result from the bootloader leaving USB powered/clocked,
and if no built-in driver wants USB, Linux will disable the unused
PD+CLK on boot when {pd,clk}_ignore_unused aren't given. This can also
be unlucky because the two cleanup tasks run in parallel and race: if
the CLK is disabled first, the PD deactivation stalls the boot. In any
case, the PD cannot then be reenabled (if e.g. the driver loads later)
once the clock has been stopped.
Fix this by specifying a dependency on ACLK_USB, instead of only
ACLK_USB_ROOT. The child-parent relationship means the former implies
the latter anyway.
Fixes: c9211fa2602b8 ("arm64: dts: rockchip: Add base DT for rk3588 SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Link: https://lore.kernel.org/r/20231216021019.1543811-1-CFSworks@gmail.com
[changed to only include the missing clock, not dropping the root-clocks]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1022,6 +1022,7 @@
reg = <RK3588_PD_USB>;
clocks = <&cru PCLK_PHP_ROOT>,
<&cru ACLK_USB_ROOT>,
+ <&cru ACLK_USB>,
<&cru HCLK_USB_ROOT>,
<&cru HCLK_HOST0>,
<&cru HCLK_HOST_ARB0>,

26
target/linux/rockchip/patches-6.1/054-04-v6.8-arm64-dts-rockchip-Support-poweroff-on-NanoPC-T6.patch Normal file
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@ -0,0 +1,26 @@
From c699fbfdfd54630fc51b96da577f02e7b772eb37 Mon Sep 17 00:00:00 2001
From: Hugh Cole-Baker <sigmaris@gmail.com>
Date: Sat, 16 Dec 2023 21:21:34 +0000
Subject: [PATCH] arm64: dts: rockchip: Support poweroff on NanoPC-T6
The RK806 on the NanoPC-T6 can be used to power on/off the whole board.
Mark it as the system power controller.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Link: https://lore.kernel.org/r/20231216212134.23314-1-sigmaris@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -570,6 +570,8 @@
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ system-power-controller;
+
vcc1-supply = <&vcc4v0_sys>;
vcc2-supply = <&vcc4v0_sys>;
vcc3-supply = <&vcc4v0_sys>;

8
target/linux/rockchip/patches-6.1/120-01-arm64-dts-rockchip-rk3588-add-cpu-frequency-scaling.patch
View File

@ -305,8 +305,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
cpu-idle-states = <&CPU_SLEEP>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
@@ -385,6 +603,230 @@
#clock-cells = <0>;
@@ -390,6 +608,230 @@
ports = <&vop_out>;
};
+ thermal_zones: thermal-zones {
@ -536,8 +536,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -497,6 +939,16 @@
reg = <0x0 0xfd58c000 0x0 0x1000>;
@@ -512,6 +954,16 @@
reg = <0x0 0xfd5a8000 0x0 0x100>;
};
+ bigcore0_grf: syscon@fd590000 {

6
target/linux/rockchip/patches-6.1/120-04-arm64-dts-rockchip-rk3588s-Add-USBDP-phy-nodes.patch
View File

@ -91,7 +91,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
reg = <0x0 0xfee10000 0x0 0x100>;
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -964,6 +964,37 @@
@@ -979,6 +979,37 @@
reg = <0x0 0xfd5c4000 0x0 0x100>;
};
@ -129,7 +129,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
usb2phy2_grf: syscon@fd5d8000 {
compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfd5d8000 0x0 0x4000>;
@@ -989,6 +1020,17 @@
@@ -1004,6 +1035,17 @@
};
};
@ -147,7 +147,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
usb2phy3_grf: syscon@fd5dc000 {
compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfd5dc000 0x0 0x4000>;
@@ -2720,6 +2762,37 @@
@@ -2804,6 +2846,37 @@
#dma-cells = <1>;
};

2
target/linux/rockchip/patches-6.1/120-05-arm64-dts-rockchip-rk3588s-Add-USB3-DRD-controllers.patch
View File

@ -42,7 +42,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
reg = <0x0 0xfd5b8000 0x0 0x10000>;
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -864,6 +864,28 @@
@@ -869,6 +869,28 @@
};
};

2
target/linux/rockchip/patches-6.1/120-06-arm64-dts-rockchip-enable-RK3588-tsadc-by-default.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -2649,7 +2649,6 @@
@@ -2733,7 +2733,6 @@
pinctrl-1 = <&tsadc_shut>;
pinctrl-names = "gpio", "otpout";
#thermal-sensor-cells = <1>;

8
target/linux/rockchip/patches-6.1/124-02-arm64-dts-rockchip-nanopc-t6-add-lower-USB3-port.patch
View File

@ -40,7 +40,7 @@
};
};
@@ -892,6 +918,11 @@
@@ -894,6 +920,11 @@
status = "okay";
};
@ -52,7 +52,7 @@
&u2phy2_host {
status = "okay";
};
@@ -900,6 +931,10 @@
@@ -902,6 +933,10 @@
status = "okay";
};
@ -63,7 +63,7 @@
&u2phy2 {
status = "okay";
};
@@ -908,6 +943,14 @@
@@ -910,6 +945,14 @@
status = "okay";
};
@ -78,7 +78,7 @@
&usb_host0_ehci {
status = "okay";
};
@@ -923,3 +966,7 @@
@@ -925,3 +968,7 @@
&usb_host1_ohci {
status = "okay";
};

8
target/linux/rockchip/patches-6.1/124-03-arm64-dts-rockchip-nanopc-t6-add-USB-C-support.patch
View File

@ -49,7 +49,7 @@
};
};
@@ -918,6 +960,10 @@
@@ -920,6 +962,10 @@
status = "okay";
};
@ -60,7 +60,7 @@
&u2phy1_otg {
phy-supply = <&vcc5v0_host_30>;
status = "okay";
@@ -931,6 +977,10 @@
@@ -933,6 +979,10 @@
status = "okay";
};
@ -71,7 +71,7 @@
&u2phy1 {
status = "okay";
};
@@ -943,6 +993,33 @@
@@ -945,6 +995,33 @@
status = "okay";
};
@ -105,7 +105,7 @@
&usbdp_phy1 {
status = "okay";
};
@@ -959,6 +1036,21 @@
@@ -961,6 +1038,21 @@
status = "okay";
};

6
target/linux/rockchip/patches-6.1/600-net-ethernet-r8169-add-LED-configuration-from-OF.patch
View File

@ -16,7 +16,7 @@
TxDescStartAddrLow = 0x20,
TxDescStartAddrHigh = 0x24,
TxHDescStartAddrLow = 0x28,
@@ -2111,6 +2113,22 @@ void r8169_apply_firmware(struct rtl8169
@@ -2112,6 +2114,22 @@ void r8169_apply_firmware(struct rtl8169
}
}
@ -39,7 +39,7 @@
static void rtl8168_config_eee_mac(struct rtl8169_private *tp)
{
/* Adjust EEE LED frequency */
@@ -3255,6 +3273,8 @@ static void rtl_hw_start_8168h_1(struct
@@ -3260,6 +3278,8 @@ static void rtl_hw_start_8168h_1(struct
r8168_mac_ocp_write(tp, 0xc094, 0x0000);
r8168_mac_ocp_write(tp, 0xc09e, 0x0000);
@ -48,7 +48,7 @@
rtl_hw_aspm_clkreq_enable(tp, true);
}
@@ -3627,6 +3647,8 @@ static void rtl_hw_start_8125b(struct rt
@@ -3632,6 +3652,8 @@ static void rtl_hw_start_8125b(struct rt
rtl_ephy_init(tp, e_info_8125b);
rtl_hw_start_8125_common(tp);

4
target/linux/rockchip/patches-6.1/602-net-ethernet-r8169-add-devname-configuration-from-OF.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2113,6 +2113,22 @@ void r8169_apply_firmware(struct rtl8169
@@ -2114,6 +2114,22 @@ void r8169_apply_firmware(struct rtl8169
}
}
@ -23,7 +23,7 @@
static int rtl8169_led_configuration(struct rtl8169_private *tp)
{
u32 led_data;
@@ -3647,6 +3663,7 @@ static void rtl_hw_start_8125b(struct rt
@@ -3652,6 +3668,7 @@ static void rtl_hw_start_8125b(struct rt
rtl_ephy_init(tp, e_info_8125b);
rtl_hw_start_8125_common(tp);

4
target/linux/rockchip/patches-6.1/603-net-ethernet-stmmac-add-devname-configuration-from-OF.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7086,6 +7086,7 @@ int stmmac_dvr_probe(struct device *devi
@@ -7091,6 +7091,7 @@ int stmmac_dvr_probe(struct device *devi
{
struct net_device *ndev = NULL;
struct stmmac_priv *priv;
@ -8,7 +8,7 @@
u32 rxq;
int i, ret = 0;
@@ -7094,6 +7095,9 @@ int stmmac_dvr_probe(struct device *devi
@@ -7099,6 +7100,9 @@ int stmmac_dvr_probe(struct device *devi
if (!ndev)
return -ENOMEM;

2
target/linux/rockchip/patches-6.1/801-03-arm64-dts-rockchip-add-rng-node-for-rk3399.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2043,6 +2043,16 @@
@@ -2045,6 +2045,16 @@
};
};

2
target/linux/rockchip/patches-6.1/801-05-arm64-dts-rockchip-rk3588s-add-rng-node.patch
View File

@ -11,7 +11,7 @@ Change-Id: Ifb8964053daa6b593dd2c2c6a3b8caab8526e56d
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -2062,6 +2062,17 @@
@@ -2146,6 +2146,17 @@
status = "disabled";
};

2
target/linux/rockchip/patches-6.1/801-06-arm64-dts-rockchip-rk3588s-rng-use-scmi_clk.patch
View File

@ -14,7 +14,7 @@ Change-Id: I49994529fcc209c2bc173c1abc497536fb920302
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -2066,7 +2066,7 @@
@@ -2150,7 +2150,7 @@
compatible = "rockchip,trngv1";
reg = <0x0 0xfe378000 0x0 0x200>;
interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>;