Merge Official Source

This commit is contained in:
CN_SZTL 2020-04-13 21:44:04 +08:00
commit 4a214bad08
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
334 changed files with 2759 additions and 1241 deletions

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@ -12,7 +12,7 @@ include $(INCLUDE_DIR)/version.mk
include $(INCLUDE_DIR)/feeds.mk
PKG_NAME:=base-files
PKG_RELEASE:=216
PKG_RELEASE:=218
PKG_FLAGS:=nonshared
PKG_FILE_DEPENDS:=$(PLATFORM_DIR)/ $(GENERIC_PLATFORM_DIR)/base-files/
@ -118,12 +118,14 @@ ifdef CONFIG_SIGNED_PACKAGES
endef
ifndef CONFIG_BUILDBOT
define Package/base-files/install-key
mkdir -p $(1)/etc/opkg/keys
$(CP) $(BUILD_KEY).pub $(1)/etc/opkg/keys/`$(STAGING_DIR_HOST)/bin/usign -F -p $(BUILD_KEY).pub`
endef
endif
endif
ifeq ($(CONFIG_NAND_SUPPORT),)
define Package/base-files/nand-support

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@ -33,6 +33,11 @@ preinit_config_switch() {
json_get_vars enable reset
if [ "$reset" -eq "1" ]; then
swconfig dev $name set reset
fi
swconfig dev $name set enable_vlan $enable
if json_is_a roles array; then
json_get_keys roles roles
json_select roles
@ -43,19 +48,15 @@ preinit_config_switch() {
json_select ..
if [ "$device" = "$lan_if" ]; then
if [ "$reset" -eq "1" ]; then
swconfig dev $name set reset
fi
swconfig dev $name set enable_vlan $enable
swconfig dev $name vlan $role set ports "$ports"
swconfig dev $name set apply
fi
done
json_select ..
fi
swconfig dev $name set apply
json_select ..
json_select ..
}

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@ -10,12 +10,12 @@ include $(TOPDIR)/rules.mk
UNPACK_CMD=unzip -q -p $(DL_DIR)/$(PKG_SOURCE) $(PKG_SOURCE_UNZIP) | gzip -dc | $(HOST_TAR) -C $(1) $(TAR_OPTIONS)
PKG_NAME:=cypress-firmware
PKG_VERSION:=v4.14.77-2020_0115
PKG_VERSION:=v5.4.18-2020_0402
PKG_SOURCE_UNZIP:=cypress-firmware-$(PKG_VERSION).tar.gz
PKG_SOURCE:=cypress-fmac-$(PKG_VERSION).zip
PKG_SOURCE_URL:=https://community.cypress.com/servlet/JiveServlet/download/19000-1-51721/
PKG_HASH:=a5510f82aacf585b5d29732b6d6777d4a4b26a667154d91cfcfc0d6d5dc4fef5
PKG_SOURCE_URL:=https://community.cypress.com/servlet/JiveServlet/download/19375-1-53475/
PKG_HASH:=b12b0570f462c2f3c26dde98b10235a845a7109037def1e7e51af728bcc1a958
PKG_MAINTAINER:=Álvaro Fernández Rojas <noltari@gmail.com>
@ -274,6 +274,24 @@ endef
$(eval $(call BuildPackage,cypress-firmware-4373-usb))
# Cypress 54591 PCIe Firmware
define Package/cypress-firmware-54591-pcie
$(Package/cypress-firmware-default)
TITLE:=CYW54591 FullMac PCIe firmware
endef
define Package/cypress-firmware-54591-pcie/install
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/brcmfmac54591-pcie.bin \
$(1)/lib/firmware/brcm/brcmfmac54591-pcie.bin
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/firmware/brcmfmac54591-pcie.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac54591-pcie.clm_blob
endef
$(eval $(call BuildPackage,cypress-firmware-54591-pcie))
# Cypress 89459 PCIe Firmware
define Package/cypress-firmware-89459-pcie
$(Package/cypress-firmware-default)

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@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=dnsmasq
PKG_UPSTREAM_VERSION:=2.81rc5
PKG_UPSTREAM_VERSION:=2.81
PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq/release-candidates
PKG_HASH:=d95439b0f0b3d540fd4a10fc150efa7478e0d70db8168d76550562dadf9fc433
PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq
PKG_HASH:=749ca903537c5197c26444ac24b0dce242cf42595fdfe6b9a5b9e4c7ad32f8fb
PKG_LICENSE:=GPL-2.0
PKG_LICENSE_FILES:=COPYING

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@ -91,6 +91,7 @@ define Device/brcm_bcm96338w
DEVICE_MODEL := 96338W
CFE_BOARD_ID := 6338W
CFE_CHIP_ID := 6338
DEFAULT := n
endef
TARGET_DEVICES += brcm_bcm96338w
@ -112,6 +113,7 @@ define Device/brcm_bcm96348gw
IMAGES += cfe-bc221.bin
CFE_BOARD_ID := 96348GW
CFE_CHIP_ID := 6348
DEFAULT := n
endef
TARGET_DEVICES += brcm_bcm96348gw
@ -121,6 +123,7 @@ define Device/brcm_bcm96348gw-10
DEVICE_MODEL := 96348GW-10
CFE_BOARD_ID := 96348GW-10
CFE_CHIP_ID := 6348
DEFAULT := n
endef
TARGET_DEVICES += brcm_bcm96348gw-10
@ -130,6 +133,7 @@ define Device/brcm_bcm96348gw-11
DEVICE_MODEL := 96348GW-11
CFE_BOARD_ID := 96348GW-11
CFE_CHIP_ID := 6348
DEFAULT := n
endef
TARGET_DEVICES += brcm_bcm96348gw-11
@ -139,6 +143,7 @@ define Device/brcm_bcm96348r
DEVICE_MODEL := 96348R
CFE_BOARD_ID := 96348R
CFE_CHIP_ID := 6348
DEFAULT := n
endef
TARGET_DEVICES += brcm_bcm96348r
@ -513,6 +518,7 @@ define Device/d-link_dsl-274xb-c2
CFE_BOARD_ID := 96358GW
CFE_CHIP_ID := 6358
DEVICE_PACKAGES := $(B43_PACKAGES)
DEFAULT := n
endef
TARGET_DEVICES += d-link_dsl-274xb-c2
@ -528,6 +534,7 @@ define Device/d-link_dsl-274xb-c3
CFE_BOARD_ID := AW4139
CFE_CHIP_ID := 6358
DEVICE_PACKAGES := $(B43_PACKAGES)
DEFAULT := n
endef
TARGET_DEVICES += d-link_dsl-274xb-c3
@ -648,6 +655,7 @@ define Device/huawei_echolife-hg520v
CFE_EXTRAS += --rsa-signature "EchoLife_HG520v"
SOC := bcm6359
DEVICE_PACKAGES := $(B43_PACKAGES)
DEFAULT := n
endef
TARGET_DEVICES += huawei_echolife-hg520v
@ -1057,6 +1065,7 @@ define Device/tecom_gw6000
CFE_BOARD_ID := 96348GW
CFE_CHIP_ID := 6348
DEVICE_PACKAGES := $(BRCMWL_PACKAGES) $(USB1_PACKAGES)
DEFAULT := n
endef
TARGET_DEVICES += tecom_gw6000
@ -1068,6 +1077,7 @@ define Device/tecom_gw6200
CFE_CHIP_ID := 6348
CFE_EXTRAS += --rsa-signature "$(shell printf '\x99')"
DEVICE_PACKAGES := $(BRCMWL_PACKAGES) $(USB1_PACKAGES)
DEFAULT := n
endef
TARGET_DEVICES += tecom_gw6200
@ -1148,5 +1158,6 @@ define Device/zyxel_p870hw-51a-v2
CFE_CHIP_ID := 6368
CFE_EXTRAS += --rsa-signature "ZyXEL" --signature "ZyXEL_0001"
DEVICE_PACKAGES := $(B43_PACKAGES)
DEFAULT := n
endef
TARGET_DEVICES += zyxel_p870hw-51a-v2

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@ -0,0 +1,167 @@
From ea92cbb50a78404e29de2cc3999a240615ffb1c8 Mon Sep 17 00:00:00 2001
From: Chuanhong Guo <gch981213@gmail.com>
Date: Mon, 6 Apr 2020 17:58:48 +0800
Subject: [PATCH] mtd: spi-nor: rework broken-flash-reset support
Instead of resetting flash to 3B address on remove hook, this
implementation only enters 4B mode when needed, which prevents
more unexpected reboot stuck. This implementation makes it only
break when a kernel panic happens during flash operation on 16M+
areas.
*OpenWrt only*: silent broken-flash-reset warning. We are not dealing
with vendors and it's unpleasant for users to se that unnecessary
and long WARN_ON print.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
---
drivers/mtd/spi-nor/spi-nor.c | 52 +++++++++++++++++++++++++++++++++--
1 file changed, 49 insertions(+), 3 deletions(-)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -616,6 +616,22 @@ static void spi_nor_set_4byte_opcodes(st
}
}
+static int spi_nor_check_set_addr_width(struct spi_nor *nor, loff_t addr)
+{
+ u8 addr_width;
+
+ if ((nor->flags & (SNOR_F_4B_OPCODES | SNOR_F_BROKEN_RESET)) !=
+ SNOR_F_BROKEN_RESET)
+ return 0;
+
+ addr_width = addr & 0xff000000 ? 4 : 3;
+ if (nor->addr_width == addr_width)
+ return 0;
+
+ nor->addr_width = addr_width;
+ return nor->params.set_4byte(nor, addr_width == 4);
+}
+
static int macronix_set_4byte(struct spi_nor *nor, bool enable)
{
if (nor->spimem) {
@@ -1259,6 +1275,10 @@ static int spi_nor_erase(struct mtd_info
if (ret)
return ret;
+ ret = spi_nor_check_set_addr_width(nor, instr->addr + instr->len);
+ if (ret < 0)
+ return ret;
+
/* whole-chip erase? */
if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) {
unsigned long timeout;
@@ -1315,6 +1335,7 @@ static int spi_nor_erase(struct mtd_info
write_disable(nor);
erase_err:
+ spi_nor_check_set_addr_width(nor, 0);
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
return ret;
@@ -1621,7 +1642,9 @@ static int spi_nor_lock(struct mtd_info
if (ret)
return ret;
+ spi_nor_check_set_addr_width(nor, ofs + len);
ret = nor->params.locking_ops->lock(nor, ofs, len);
+ spi_nor_check_set_addr_width(nor, 0);
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_UNLOCK);
return ret;
@@ -1636,7 +1659,9 @@ static int spi_nor_unlock(struct mtd_inf
if (ret)
return ret;
+ spi_nor_check_set_addr_width(nor, ofs + len);
ret = nor->params.locking_ops->unlock(nor, ofs, len);
+ spi_nor_check_set_addr_width(nor, 0);
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
return ret;
@@ -1651,7 +1676,9 @@ static int spi_nor_is_locked(struct mtd_
if (ret)
return ret;
+ spi_nor_check_set_addr_width(nor, ofs + len);
ret = nor->params.locking_ops->is_locked(nor, ofs, len);
+ spi_nor_check_set_addr_width(nor, 0);
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
return ret;
@@ -2557,6 +2584,10 @@ static int spi_nor_read(struct mtd_info
if (ret)
return ret;
+ ret = spi_nor_check_set_addr_width(nor, from + len);
+ if (ret < 0)
+ return ret;
+
while (len) {
loff_t addr = from;
@@ -2580,6 +2611,7 @@ static int spi_nor_read(struct mtd_info
ret = 0;
read_err:
+ spi_nor_check_set_addr_width(nor, 0);
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
return ret;
}
@@ -2597,6 +2629,10 @@ static int sst_write(struct mtd_info *mt
if (ret)
return ret;
+ ret = spi_nor_check_set_addr_width(nor, to + len);
+ if (ret < 0)
+ return ret;
+
write_enable(nor);
nor->sst_write_second = false;
@@ -2659,6 +2695,7 @@ static int sst_write(struct mtd_info *mt
}
sst_write_err:
*retlen += actual;
+ spi_nor_check_set_addr_width(nor, 0);
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
return ret;
}
@@ -2681,6 +2718,10 @@ static int spi_nor_write(struct mtd_info
if (ret)
return ret;
+ ret = spi_nor_check_set_addr_width(nor, to + len);
+ if (ret < 0)
+ return ret;
+
for (i = 0; i < len; ) {
ssize_t written;
loff_t addr = to + i;
@@ -2720,6 +2761,7 @@ static int spi_nor_write(struct mtd_info
}
write_err:
+ spi_nor_check_set_addr_width(nor, 0);
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
return ret;
}
@@ -4726,9 +4768,13 @@ static int spi_nor_init(struct spi_nor *
* reboots (e.g., crashes). Warn the user (or hopefully, system
* designer) that this is bad.
*/
- WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET,
- "enabling reset hack; may not recover from unexpected reboots\n");
- nor->params.set_4byte(nor, true);
+ if (nor->flags & SNOR_F_BROKEN_RESET) {
+ dev_warn(nor->dev,
+ "enabling reset hack; may not recover from unexpected reboots\n");
+ nor->addr_width = 3;
+ } else {
+ nor->params.set_4byte(nor, true);
+ }
}
return 0;

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@ -13,6 +13,7 @@ SUBTARGETS:=mt7620 mt7621 mt76x8 rt288x rt305x rt3883
FEATURES:=squashfs gpio
KERNEL_PATCHVER:=4.14
KERNEL_TESTING_PATCHVER:=5.4
define Target/Description
Build firmware images for Ralink RT288x/RT3xxx based boards.

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@ -116,7 +116,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <0>;
ralink,nr-gpio = <24>;
ralink,num-gpios = <24>;
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
@ -133,7 +133,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <24>;
ralink,nr-gpio = <16>;
ralink,num-gpios = <16>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@ -152,7 +152,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <40>;
ralink,nr-gpio = <32>;
ralink,num-gpios = <32>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@ -171,7 +171,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <72>;
ralink,nr-gpio = <1>;
ralink,num-gpios = <1>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@ -315,113 +315,113 @@
pcm_i2s_pins: pcm_i2s {
pcm_i2s {
ralink,group = "uartf";
ralink,function = "pcm i2s";
groups = "uartf";
function = "pcm i2s";
};
};
uartf_gpio_pins: uartf_gpio {
uartf_gpio {
ralink,group = "uartf";
ralink,function = "gpio uartf";
groups = "uartf";
function = "gpio uartf";
};
};
gpio_i2s_pins: gpio_i2s {
gpio_i2s {
ralink,group = "uartf";
ralink,function = "gpio i2s";
groups = "uartf";
function = "gpio i2s";
};
};
spi_pins: spi_pins {
spi_pins {
ralink,group = "spi";
ralink,function = "spi";
groups = "spi";
function = "spi";
};
};
spi_cs1: spi1 {
spi1 {
ralink,group = "spi refclk";
ralink,function = "spi refclk";
groups = "spi refclk";
function = "spi refclk";
};
};
i2c_pins: i2c_pins {
i2c_pins {
ralink,group = "i2c";
ralink,function = "i2c";
groups = "i2c";
function = "i2c";
};
};
uartlite_pins: uartlite {
uart {
ralink,group = "uartlite";
ralink,function = "uartlite";
groups = "uartlite";
function = "uartlite";
};
};
mdio_pins: mdio {
mdio {
ralink,group = "mdio";
ralink,function = "mdio";
groups = "mdio";
function = "mdio";
};
};
mdio_refclk_pins: mdio_refclk {
mdio_refclk {
ralink,group = "mdio";
ralink,function = "refclk";
groups = "mdio";
function = "refclk";
};
};
ephy_pins: ephy {
ephy {
ralink,group = "ephy";
ralink,function = "ephy";
groups = "ephy";
function = "ephy";
};
};
wled_pins: wled {
wled {
ralink,group = "wled";
ralink,function = "wled";
groups = "wled";
function = "wled";
};
};
rgmii1_pins: rgmii1 {
rgmii1 {
ralink,group = "rgmii1";
ralink,function = "rgmii1";
groups = "rgmii1";
function = "rgmii1";
};
};
rgmii2_pins: rgmii2 {
rgmii2 {
ralink,group = "rgmii2";
ralink,function = "rgmii2";
groups = "rgmii2";
function = "rgmii2";
};
};
pcie_pins: pcie {
pcie {
ralink,group = "pcie";
ralink,function = "pcie rst";
groups = "pcie";
function = "pcie rst";
};
};
pa_pins: pa {
pa {
ralink,group = "pa";
ralink,function = "pa";
groups = "pa";
function = "pa";
};
};
sdhci_pins: sdhci {
sdhci {
ralink,group = "nd_sd";
ralink,function = "sd";
groups = "nd_sd";
function = "sd";
};
};
};

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@ -99,8 +99,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
function = "gpio";
};
};

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@ -125,8 +125,8 @@
&state_default {
gpio {
ralink,group = "nd_sd", "spi refclk", "wled";
ralink,function = "gpio";
groups = "nd_sd", "spi refclk", "wled";
function = "gpio";
};
};

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@ -156,8 +156,8 @@
&state_default {
gpio {
ralink,group = "ephy", "pcie", "rgmii1", "wled";
ralink,function = "gpio";
groups = "ephy", "pcie", "rgmii1", "wled";
function = "gpio";
};
};

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@ -133,8 +133,8 @@
&state_default {
gpio {
ralink,group = "ephy", "nd_sd", "pcie", "uartf";
ralink,function = "gpio";
groups = "ephy", "nd_sd", "pcie", "uartf";
function = "gpio";
};
};

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@ -150,8 +150,8 @@
&state_default {
gpio {
ralink,group = "mdio", "rgmii1";
ralink,function = "gpio";
groups = "mdio", "rgmii1";
function = "gpio";
};
};

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@ -127,8 +127,8 @@
&state_default {
gpio {
ralink,group = "i2c", "wled", "uartf";
ralink,function = "gpio";
groups = "i2c", "wled", "uartf";
function = "gpio";
};
};

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@ -144,7 +144,7 @@
&state_default {
default {
ralink,group = "spi refclk", "uartf", "wled";
ralink,function = "gpio";
groups = "spi refclk", "uartf", "wled";
function = "gpio";
};
};

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@ -132,8 +132,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "wled", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "wled", "nd_sd";
function = "gpio";
};
};

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@ -132,8 +132,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
function = "gpio";
};
};

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@ -132,8 +132,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
function = "gpio";
};
};

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@ -163,13 +163,13 @@
&state_default {
gpio {
ralink,group = "wdt", "rgmii1";
ralink,function = "gpio";
groups = "wdt", "rgmii1";
function = "gpio";
};
gpio_i2s {
ralink,group = "uartf";
ralink,function = "gpio i2s";
groups = "uartf";
function = "gpio i2s";
};
};

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@ -131,7 +131,7 @@
&state_default {
default {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

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@ -119,8 +119,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

View File

@ -131,8 +131,8 @@
&state_default {
default {
ralink,group = "ephy", "uartf", "spi refclk", "wled";
ralink,function = "gpio";
groups = "ephy", "uartf", "spi refclk", "wled";
function = "gpio";
};
};

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@ -129,8 +129,8 @@
&state_default {
default {
ralink,group = "ephy", "uartf", "spi refclk", "wled";
ralink,function = "gpio";
groups = "ephy", "uartf", "spi refclk", "wled";
function = "gpio";
};
};

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@ -184,7 +184,7 @@
&state_default {
default {
ralink,group = "i2c", "wled", "spi refclk", "uartf", "ephy";
ralink,function = "gpio";
groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
function = "gpio";
};
};

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@ -154,8 +154,8 @@
&state_default {
gpio {
ralink,group = "uartf", "nd_sd", "wled";
ralink,function = "gpio";
groups = "uartf", "nd_sd", "wled";
function = "gpio";
};
};

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@ -132,8 +132,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "nd_sd";
function = "gpio";
};
};

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@ -117,8 +117,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "nd_sd";
function = "gpio";
};
};

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@ -100,16 +100,16 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "nd_sd", "rgmii2";
ralink,function = "gpio";
groups = "i2c", "uartf", "nd_sd", "rgmii2";
function = "gpio";
};
};
&pinctrl {
phy_reset_pins: phy-reset {
gpio {
ralink,group = "spi refclk";
ralink,function = "gpio";
groups = "spi refclk";
function = "gpio";
};
};
};

View File

@ -167,8 +167,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "nd_sd", "wled";
ralink,function = "gpio";
groups = "i2c", "uartf", "nd_sd", "wled";
function = "gpio";
};
};

View File

@ -100,16 +100,16 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
nd_sd {
ralink,group = "nd_sd";
ralink,function = "sd";
groups = "nd_sd";
function = "sd";
};
spi_cs {
ralink,group = "spi refclk";
ralink,function = "spi refclk";
groups = "spi refclk";
function = "spi refclk";
};
};

View File

@ -147,7 +147,7 @@
&state_default {
gpio {
ralink,group = "wled","ephy","uartf","i2c";
ralink,function = "gpio";
groups = "wled","ephy","uartf","i2c";
function = "gpio";
};
};

View File

@ -138,7 +138,7 @@
&state_default {
gpio {
ralink,group = "wled","ephy","i2c";
ralink,function = "gpio";
groups = "wled","ephy","i2c";
function = "gpio";
};
};

View File

@ -153,7 +153,7 @@
&state_default {
gpio {
ralink,group = "wled","ephy","uartf";
ralink,function = "gpio";
groups = "wled","ephy","uartf";
function = "gpio";
};
};

View File

@ -161,9 +161,9 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "pa", "spi refclk",
groups = "i2c", "uartf", "pa", "spi refclk",
"wled";
ralink,function = "gpio";
function = "gpio";
};
};

View File

@ -127,7 +127,7 @@
&state_default {
gpio {
ralink,group = "uartf", "wled";
ralink,function = "gpio";
groups = "uartf", "wled";
function = "gpio";
};
};

View File

@ -174,8 +174,8 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "spi refclk", "ephy";
ralink,function = "gpio";
groups = "i2c", "uartf", "spi refclk", "ephy";
function = "gpio";
};
};

View File

@ -186,8 +186,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

View File

@ -167,8 +167,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "mdio";
ralink,function = "gpio";
groups = "i2c", "uartf", "mdio";
function = "gpio";
};
};

View File

@ -53,7 +53,7 @@
&state_default {
gpio {
ralink,group = "uartf", "spi refclk";
ralink,function = "gpio";
groups = "uartf", "spi refclk";
function = "gpio";
};
};

View File

@ -107,7 +107,7 @@
&state_default {
default {
ralink,group = "uartf", "ephy", "wled";
ralink,function = "gpio";
groups = "uartf", "ephy", "wled";
function = "gpio";
};
};

View File

@ -172,7 +172,7 @@
&state_default {
gpio {
ralink,group = "uartf", "i2c";
ralink,function = "gpio";
groups = "uartf", "i2c";
function = "gpio";
};
};

View File

@ -101,7 +101,7 @@
&state_default {
gpio {
ralink,group = "uartf", "wled", "nd_sd";
ralink,function = "gpio";
groups = "uartf", "wled", "nd_sd";
function = "gpio";
};
};

View File

@ -99,8 +99,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

View File

@ -99,7 +99,7 @@
&state_default {
default {
ralink,group = "wled", "i2c", "wdt", "uartf";
ralink,function = "gpio";
groups = "wled", "i2c", "wdt", "uartf";
function = "gpio";
};
};

View File

@ -56,7 +56,7 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "spi refclk";
ralink,function = "gpio";
groups = "i2c", "uartf", "spi refclk";
function = "gpio";
};
};

View File

@ -107,7 +107,7 @@
&state_default {
default {
ralink,group = "i2c", "rgmii2", "spi refclk";
ralink,function = "gpio";
groups = "i2c", "rgmii2", "spi refclk";
function = "gpio";
};
};

View File

@ -95,8 +95,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled";
function = "gpio";
};
};

View File

@ -95,8 +95,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

View File

@ -91,8 +91,8 @@
&state_default {
gpio {
ralink,group = "i2c", "spi refclk", "wled";
ralink,function = "gpio";
groups = "i2c", "spi refclk", "wled";
function = "gpio";
};
};

View File

@ -36,8 +36,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
function = "gpio";
};
};

View File

@ -36,8 +36,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "pa";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "pa";
function = "gpio";
};
};

View File

@ -118,12 +118,12 @@
&state_default {
gpio {
ralink,group = "spi refclk", "rgmii1";
ralink,function = "gpio";
groups = "spi refclk", "rgmii1";
function = "gpio";
};
wdt {
ralink,group = "wdt";
ralink,function = "wdt refclk";
groups = "wdt";
function = "wdt refclk";
};
};

View File

@ -82,8 +82,8 @@
&state_default {
gpio {
ralink,group = "i2c", "spi refclk", "rgmii1";
ralink,function = "gpio";
groups = "i2c", "spi refclk", "rgmii1";
function = "gpio";
};
};

View File

@ -102,8 +102,8 @@
&state_default {
gpio {
ralink,group = "i2c", "spi refclk", "rgmii1", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "spi refclk", "rgmii1", "nd_sd";
function = "gpio";
};
};

View File

@ -122,8 +122,8 @@
&state_default {
gpio {
ralink,group = "i2c", "spi refclk", "rgmii1", "wled";
ralink,function = "gpio";
groups = "i2c", "spi refclk", "rgmii1", "wled";
function = "gpio";
};
};

View File

@ -127,8 +127,8 @@
&state_default {
gpio {
ralink,group = "uartf", "nd_sd", "rgmii2", "wled";
ralink,function = "gpio";
groups = "uartf", "nd_sd", "rgmii2", "wled";
function = "gpio";
};
};

View File

@ -68,8 +68,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

View File

@ -49,8 +49,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

View File

@ -62,8 +62,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "spi";
ralink,function = "gpio";
groups = "i2c", "uartf", "spi";
function = "gpio";
};
};

View File

@ -179,8 +179,8 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
ralink,function = "gpio";
groups = "i2c", "uartf", "wled", "spi refclk", "pa";
function = "gpio";
};
/*
@ -193,8 +193,8 @@
* means during pinmux driver load.
*/
gpio_sd {
ralink,group = "nd_sd";
ralink,function = "sd";
groups = "nd_sd";
function = "sd";
};
};

View File

@ -116,13 +116,13 @@
&state_default {
gpio {
ralink,group = "i2c", "rgmii2", "spi", "ephy";
ralink,function = "gpio";
groups = "i2c", "rgmii2", "spi", "ephy";
function = "gpio";
};
uartf_gpio {
ralink,group = "uartf";
ralink,function = "gpio uartf";
groups = "uartf";
function = "gpio uartf";
};
};

View File

@ -159,8 +159,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "wled", "ephy", "spi refclk";
ralink,function = "gpio";
groups = "i2c", "uartf", "wled", "ephy", "spi refclk";
function = "gpio";
};
};

View File

@ -65,8 +65,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "wled", "ephy", "spi refclk", "wdt";
ralink,function = "gpio";
groups = "i2c", "uartf", "wled", "ephy", "spi refclk", "wdt";
function = "gpio";
};
};

View File

@ -49,8 +49,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
function = "gpio";
};
};

View File

@ -65,8 +65,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "ephy", "spi refclk", "mdio", "wdt", "nd_sd";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "ephy", "spi refclk", "mdio", "wdt", "nd_sd";
function = "gpio";
};
};

View File

@ -163,8 +163,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
function = "gpio";
};
};

View File

@ -53,8 +53,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "ephy", "wled", "rgmii1", "spi refclk";
ralink,function = "gpio";
groups = "i2c", "uartf", "ephy", "wled", "rgmii1", "spi refclk";
function = "gpio";
};
};

View File

@ -56,8 +56,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "wled", "rgmii1";
ralink,function = "gpio";
groups = "i2c", "uartf", "wled", "rgmii1";
function = "gpio";
};
};

View File

@ -154,7 +154,7 @@
&state_default {
gpio {
ralink,group = "i2c", "rgmii1";
ralink,function = "gpio";
groups = "i2c", "rgmii1";
function = "gpio";
};
};

View File

@ -112,8 +112,8 @@
&state_default {
default {
ralink,group = "i2c", "rgmii1", "ephy", "wled";
ralink,function = "gpio";
groups = "i2c", "rgmii1", "ephy", "wled";
function = "gpio";
};
};

View File

@ -141,8 +141,8 @@
&state_default {
gpio {
ralink,group = "spi refclk", "rgmii1";
ralink,function = "gpio";
groups = "spi refclk", "rgmii1";
function = "gpio";
};
};

View File

@ -135,7 +135,7 @@
&state_default {
gpio {
ralink,group = "wled", "i2c", "uartf", "wdt";
ralink,function = "gpio";
groups = "wled", "i2c", "uartf", "wdt";
function = "gpio";
};
};

View File

@ -96,7 +96,7 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "spi refclk", "ephy", "wled";
ralink,function = "gpio";
groups = "i2c", "uartf", "spi refclk", "ephy", "wled";
function = "gpio";
};
};

View File

@ -76,7 +76,7 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "wled";
ralink,function = "gpio";
groups = "i2c", "uartf", "wled";
function = "gpio";
};
};

View File

@ -84,8 +84,8 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
ralink,function = "gpio";
groups = "i2c", "uartf", "wled", "spi refclk", "pa";
function = "gpio";
};
};

View File

@ -91,8 +91,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled";
ralink,function = "gpio";
groups = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled";
function = "gpio";
};
};

View File

@ -130,8 +130,8 @@
&state_default {
gpio {
ralink,group = "i2c", "uartf";
ralink,function = "gpio";
groups = "i2c", "uartf";
function = "gpio";
};
};

View File

@ -101,7 +101,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <0>;
ralink,nr-gpio = <24>;
ralink,num-gpios = <24>;
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
@ -118,7 +118,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <24>;
ralink,nr-gpio = <16>;
ralink,num-gpios = <16>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@ -137,7 +137,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <40>;
ralink,nr-gpio = <32>;
ralink,num-gpios = <32>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@ -156,7 +156,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <72>;
ralink,nr-gpio = <1>;
ralink,num-gpios = <1>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@ -250,36 +250,36 @@
ephy_pins: ephy {
ephy {
ralink,group = "ephy";
ralink,function = "ephy";
groups = "ephy";
function = "ephy";
};
};
spi_pins: spi_pins {
spi_pins {
ralink,group = "spi";
ralink,function = "spi";
groups = "spi";
function = "spi";
};
};
spi_cs1: spi1 {
spi1 {
ralink,group = "spi refclk";
ralink,function = "spi refclk";
groups = "spi refclk";
function = "spi refclk";
};
};
i2c_pins: i2c_pins {
i2c_pins {
ralink,group = "i2c";
ralink,function = "i2c";
groups = "i2c";
function = "i2c";
};
};
uartlite_pins: uartlite {
uart {
ralink,group = "uartlite";
ralink,function = "uartlite";
groups = "uartlite";
function = "uartlite";
};
};
};

View File

@ -118,7 +118,7 @@
&state_default {
default {
ralink,group = "ephy", "wled", "i2c", "wdt", "pa", "spi refclk";
ralink,function = "gpio";
groups = "ephy", "wled", "i2c", "wdt", "pa", "spi refclk";
function = "gpio";
};
};

View File

@ -131,7 +131,7 @@
&state_default {
default {
ralink,group = "ephy", "wled", "i2c";
ralink,function = "gpio";
groups = "ephy", "wled", "i2c";
function = "gpio";
};
};

View File

@ -107,7 +107,7 @@
&state_default {
default {
ralink,group = "i2c", "ephy";
ralink,function = "gpio";
groups = "i2c", "ephy";
function = "gpio";
};
};

View File

@ -116,7 +116,7 @@
&state_default {
default {
ralink,group = "ephy", "wled", "spi refclk", "i2c";
ralink,function = "gpio";
groups = "ephy", "wled", "spi refclk", "i2c";
function = "gpio";
};
};

View File

@ -99,8 +99,8 @@
&state_default {
default {
ralink,group = "i2c", "wled";
ralink,function = "gpio";
groups = "i2c", "wled";
function = "gpio";
};
};

View File

@ -143,7 +143,7 @@
&state_default {
default {
ralink,group = "spi refclk", "i2c", "ephy", "wled";
ralink,function = "gpio";
groups = "spi refclk", "i2c", "ephy", "wled";
function = "gpio";
};
};

View File

@ -145,7 +145,7 @@
&state_default {
default {
ralink,group = "spi refclk", "i2c", "ephy", "wled";
ralink,function = "gpio";
groups = "spi refclk", "i2c", "ephy", "wled";
function = "gpio";
};
};

View File

@ -128,7 +128,7 @@
&state_default {
default {
ralink,group = "i2c", "ephy", "wled";
ralink,function = "gpio";
groups = "i2c", "ephy", "wled";
function = "gpio";
};
};

View File

@ -107,7 +107,7 @@
&state_default {
default {
ralink,group = "ephy", "wled";
ralink,function = "gpio";
groups = "ephy", "wled";
function = "gpio";
};
};

View File

@ -123,7 +123,7 @@
&state_default {
default {
ralink,group = "i2c", "ephy", "wled";
ralink,function = "gpio";
groups = "i2c", "ephy", "wled";
function = "gpio";
};
};

View File

@ -123,7 +123,7 @@
&state_default {
default {
ralink,group = "i2c", "ephy", "wled";
ralink,function = "gpio";
groups = "i2c", "ephy", "wled";
function = "gpio";
};
};

View File

@ -53,7 +53,7 @@
&state_default {
default {
ralink,group = "ephy", "wled", "pa", "i2c", "wdt", "uartf";
ralink,function = "gpio";
groups = "ephy", "wled", "pa", "i2c", "wdt", "uartf";
function = "gpio";
};
};

View File

@ -109,7 +109,7 @@
&state_default {
gpio {
ralink,group = "wled", "ephy";
ralink,function = "gpio";
groups = "wled", "ephy";
function = "gpio";
};
};

View File

@ -91,7 +91,7 @@
&state_default {
default {
ralink,group = "i2c";
ralink,function = "gpio";
groups = "i2c";
function = "gpio";
};
};

View File

@ -96,7 +96,7 @@
&state_default {
default {
ralink,group = "ephy", "wled", "pa", "i2c", "wdt", "uartf", "spi refclk";
ralink,function = "gpio";
groups = "ephy", "wled", "pa", "i2c", "wdt", "uartf", "spi refclk";
function = "gpio";
};
};

View File

@ -119,7 +119,7 @@
&state_default {
default {
ralink,group = "i2c", "spi refclk", "wled";
ralink,function = "gpio";
groups = "i2c", "spi refclk", "wled";
function = "gpio";
};
};

View File

@ -123,7 +123,7 @@
&state_default {
default {
ralink,group = "i2c", "spi refclk", "wled";
ralink,function = "gpio";
groups = "i2c", "spi refclk", "wled";
function = "gpio";
};
};

View File

@ -104,7 +104,7 @@
&state_default {
default {
ralink,group = "i2c", "spi refclk", "wled";
ralink,function = "gpio";
groups = "i2c", "spi refclk", "wled";
function = "gpio";
};
};

View File

@ -117,7 +117,7 @@
&state_default {
default {
ralink,group = "i2c", "uartf", "spi refclk", "wled";
ralink,function = "gpio";
groups = "i2c", "uartf", "spi refclk", "wled";
function = "gpio";
};
};

View File

@ -126,8 +126,8 @@
&state_default {
gpio {
ralink,group = "i2c", "wdt", "pa", "spi refclk", "wled";
ralink,function = "gpio";
groups = "i2c", "wdt", "pa", "spi refclk", "wled";
function = "gpio";
};
};

View File

@ -126,8 +126,8 @@
&state_default {
gpio {
ralink,group = "i2c", "wdt", "pa", "spi refclk", "wled";
ralink,function = "gpio";
groups = "i2c", "wdt", "pa", "spi refclk", "wled";
function = "gpio";
};
};

View File

@ -96,7 +96,8 @@
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
spi-max-frequency = <45000000>;
broken-flash-reset;
partitions {
compatible = "fixed-partitions";

Some files were not shown because too many files have changed in this diff Show More