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sunxi: orangepi-3: fixes wrong pcie patches

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Commit f01b7cd introduced 2 gpios for the pcie part by mistake, one
of it is used for usb2phy, and the other is not connected anywhere.
Obviously, we cannot copy the dts of pine-h64 directly, which will
cause usb2 on this board to be unusable.

Note:
  From the datasheet provided by OrangePi open source, it seems that
  the perst part of pcie is controlled by the sw6 button. However,
  let us first guess a gpio to avoid any related error logs.

  By the way, it seems that the usb3 led (red), sw4 and sw6 buttons
  on this board are not controlled by gpio.

Fixes: f01b7cd ("sunxi: add support for OrangePi 3")
Signed-off-by: AmadeusGhost <amadeus@immortalwrt.org>
This commit is contained in:
AmadeusGhost 2021-07-26 12:02:10 +08:00
parent dcb01a89fc
commit 4af9b12df6
1 changed files with 3 additions and 30 deletions
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33
target/linux/sunxi/patches-5.4/801-arm64-dts-allwinner-Enable-PCIe-for-Orange-Pi-3.patch
View File

@ -1,41 +1,14 @@
From 84110d1e78e57a09a391f24dc69ac8b1c99740e4 Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Fri, 11 Jun 2021 15:27:06 +0800
Subject: [PATCH] arm64: dts: allwinner: Enable PCIe for Orange Pi 3
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -55,6 +55,16 @@
};
};
+ reg_pcie_slot: pcie-slot-power {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie-slot-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ gpio = <&pio 2 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC jack */
compatible = "regulator-fixed";
@@ -202,6 +212,14 @@
@@ -208,6 +208,14 @@
status = "okay";
};
+&pcie {
+ vcc-supply = <&reg_bldo2>;
+ vdd-supply = <&reg_dcdcd>;
+ slot-supply = <&reg_pcie_slot>;
+ perst-gpio = <&pio 6 14 GPIO_ACTIVE_LOW>; /* PG14 */
+ slot-supply = <&reg_aldo3>;
+ perst-gpio = <&pio 3 17 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+