fish/immortalwrt
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge Official Source

Browse Source 
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-06-20 13:28:22 +08:00
commit 4dd663ffc7
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
13 changed files with 696 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/linux/bmips/bcm6328/base-files/etc/board.d/01_leds
View File

@ -6,6 +6,7 @@
board_config_update
case "$(board_name)" in
nucom,r5010unv2 |\
sercomm,ad1018)
ucidef_set_led_usbport "usb" "USB" "green:usb" "usb1-port1" "usb2-port1"
;;

3
target/linux/bmips/bcm6328/base-files/etc/board.d/02_network
View File

@ -6,7 +6,8 @@ board_config_update
case "$(board_name)" in
comtrend,ar-5381u |\
comtrend,ar-5387un)
comtrend,ar-5387un |\
nucom,r5010unv2)
ucidef_set_bridge_device switch
ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
;;

3
target/linux/bmips/bcm6328/base-files/etc/uci-defaults/09_fix_crc
View File

@ -4,7 +4,8 @@
case "$(board_name)" in
comtrend,ar-5381u |\
comtrend,ar-5387un)
comtrend,ar-5387un |\
nucom,r5010unv2)
mtd fixtrx firmware
;;
esac

216
target/linux/bmips/dts/bcm6328-nucom-r5010unv2.dts Normal file
View File

@ -0,0 +1,216 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "bcm6328.dtsi"
/ {
model = "NuCom R5010UNv2";
compatible = "nucom,r5010unv2", "brcm,bcm6328";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
reset {
label = "reset";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
wps {
label = "wps";
gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
};
bcm43217-sprom {
compatible = "brcm,bcma-sprom";
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43217-sprom.bin";
};
};
&ehci {
status = "okay";
};
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cell-names = "mac-address";
};
&hsspi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <16666667>;
spi-tx-bus-width = <2>;
spi-rx-bus-width = <2>;
reg = <0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
cfe: partition@0 {
label = "cfe";
reg = <0x000000 0x010000>;
read-only;
};
partition@10000 {
compatible = "brcm,bcm963xx-imagetag";
label = "firmware";
reg = <0x010000 0xfe0000>;
};
partition@ff0000 {
label = "nvram";
reg = <0xff0000 0x010000>;
};
};
};
};
&leds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ephy0_act_led &pinctrl_ephy1_act_led
&pinctrl_ephy2_act_led &pinctrl_ephy3_act_led
&pinctrl_leds>;
led@1 {
reg = <1>;
active-low;
label = "green:internet";
};
led@2 {
reg = <2>;
active-low;
label = "red:internet";
};
led@3 {
reg = <3>;
active-low;
label = "green:dsl";
};
led_power_green: led@4 {
reg = <4>;
active-low;
label = "green:power";
};
led_power_red: led@5 {
reg = <5>;
active-low;
label = "red:power";
panic-indicator;
};
led@10 {
reg = <10>;
active-low;
label = "green:wps";
};
led@11 {
reg = <11>;
active-low;
label = "green:usb";
};
};
&ohci {
status = "okay";
};
&pcie {
status = "okay";
};
&pinctrl {
pinctrl_leds: leds {
function = "led";
pins = "gpio1", "gpio2", "gpio3",
"gpio4", "gpio5", "gpio10",
"gpio11";
};
};
&switch0 {
ports {
port@0 {
reg = <0>;
label = "lan1";
phy-handle = <&phy1>;
phy-mode = "mii";
};
port@1 {
reg = <1>;
label = "lan2";
phy-handle = <&phy2>;
phy-mode = "mii";
};
port@2 {
reg = <2>;
label = "lan3";
phy-handle = <&phy3>;
phy-mode = "mii";
};
port@3 {
reg = <3>;
label = "lan4";
phy-handle = <&phy4>;
phy-mode = "mii";
};
};
};
&uart0 {
status = "okay";
};
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

13
target/linux/bmips/image/bcm6328.mk
View File

@ -26,6 +26,19 @@ define Device/comtrend_ar-5387un
endef
TARGET_DEVICES += comtrend_ar-5387un
define Device/nucom_r5010unv2
$(Device/bcm63xx-cfe)
DEVICE_VENDOR := NuCom
DEVICE_MODEL := R5010UNv2
CHIP_ID := 6328
CFE_BOARD_ID := 96328ang
FLASH_MB := 16
DEVICE_PACKAGES += $(USB2_PACKAGES) \
$(B43_PACKAGES) broadcom-43217-sprom \
kmod-leds-bcm6328
endef
TARGET_DEVICES += nucom_r5010unv2
define Device/sercomm_ad1018
$(Device/sercomm-nand)
DEVICE_VENDOR := Sercomm

84
target/linux/bmips/patches-5.15/203-mips-bmips-dma-fix-CBR-address.patch Normal file
View File

@ -0,0 +1,84 @@
From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Sat, 10 Jun 2023 17:01:40 +0200
Subject: [PATCH] mips: bmips: dma: fix CBR address
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Some BCM63xx SoCs may return CBR address as 0.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/bmips/dma.c | 12 ++++--------
arch/mips/bmips/setup.c | 11 ++++-------
2 files changed, 8 insertions(+), 15 deletions(-)
--- a/arch/mips/bmips/dma.c
+++ b/arch/mips/bmips/dma.c
@@ -64,11 +64,10 @@ phys_addr_t dma_to_phys(struct device *d
return dma_addr;
}
-bool bmips_rac_flush_disable;
+void __iomem *bmips_cbr_addr;
void arch_sync_dma_for_cpu_all(void)
{
- void __iomem *cbr = BMIPS_GET_CBR();
u32 cfg;
if (boot_cpu_type() != CPU_BMIPS3300 &&
@@ -76,13 +75,10 @@ void arch_sync_dma_for_cpu_all(void)
boot_cpu_type() != CPU_BMIPS4380)
return;
- if (unlikely(bmips_rac_flush_disable))
- return;
-
/* Flush stale data out of the readahead cache */
- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
- __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
}
static int __init bmips_init_dma_ranges(void)
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -89,7 +89,7 @@
#define DDR_CSEND_REG 0x8
-extern bool bmips_rac_flush_disable;
+extern void __iomem *bmips_cbr_addr;
static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
@@ -170,12 +170,6 @@ static void bcm6358_quirks(void)
* disable SMP for now
*/
bmips_smp_enabled = 0;
-
- /*
- * RAC flush causes kernel panics on BCM6358 when booting from TP1
- * because the bootloader is not initializing it properly.
- */
- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31));
}
static void bcm6368_quirks(void)
@@ -198,6 +192,11 @@ static const struct bmips_quirk bmips_qu
void __init prom_init(void)
{
+ if (!(read_c0_brcm_cbr() >> 18))
+ bmips_cbr_addr = (void __iomem *)0xff400000;
+ else
+ bmips_cbr_addr = BMIPS_GET_CBR();
+
bmips_cpu_setup();
register_bmips_smp_ops();
}

42
target/linux/bmips/patches-5.15/204-mips-bmips-enable-RAC-on-BMIPS4350.patch Normal file
View File

@ -0,0 +1,42 @@
From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= <dgcbueu@gmail.com>
Date: Sun, 18 Jun 2023 19:59:25 +0200
Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -614,6 +614,20 @@ void bmips_cpu_setup(void)
__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
break;
+ case CPU_BMIPS4350:
+ /* Enable data RAC */
+ if (!(read_c0_brcm_cmt_local() & (1 << 31))) {
+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG);
+ __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ } else {
+ cbr = (void __iomem *)0xff400000;
+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1);
+ __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+ }
+ break;
+
case CPU_BMIPS4380:
/* CBG workaround for early BMIPS4380 CPUs */
switch (read_c0_prid()) {

82
target/linux/bmips/patches-6.1/203-mips-bmips-dma-fix-CBR-address.patch Normal file
View File

@ -0,0 +1,82 @@
From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Sat, 10 Jun 2023 17:01:40 +0200
Subject: [PATCH] mips: bmips: dma: fix CBR address
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Some BCM63xx SoCs may return CBR address as 0.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/bmips/dma.c | 12 ++++--------
arch/mips/bmips/setup.c | 11 ++++-------
2 files changed, 8 insertions(+), 15 deletions(-)
--- a/arch/mips/bmips/dma.c
+++ b/arch/mips/bmips/dma.c
@@ -5,11 +5,10 @@
#include <asm/bmips.h>
#include <asm/io.h>
-bool bmips_rac_flush_disable;
+void __iomem *bmips_cbr_addr;
void arch_sync_dma_for_cpu_all(void)
{
- void __iomem *cbr = BMIPS_GET_CBR();
u32 cfg;
if (boot_cpu_type() != CPU_BMIPS3300 &&
@@ -17,11 +16,8 @@ void arch_sync_dma_for_cpu_all(void)
boot_cpu_type() != CPU_BMIPS4380)
return;
- if (unlikely(bmips_rac_flush_disable))
- return;
-
/* Flush stale data out of the readahead cache */
- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
- __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
}
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -90,7 +90,7 @@
#define DDR_CSEND_REG 0x8
-extern bool bmips_rac_flush_disable;
+extern void __iomem *bmips_cbr_addr;
static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
@@ -171,12 +171,6 @@ static void bcm6358_quirks(void)
* disable SMP for now
*/
bmips_smp_enabled = 0;
-
- /*
- * RAC flush causes kernel panics on BCM6358 when booting from TP1
- * because the bootloader is not initializing it properly.
- */
- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31));
}
static void bcm6368_quirks(void)
@@ -209,6 +203,11 @@ static void __init bmips_init_cfe(void)
void __init prom_init(void)
{
+ if (!(read_c0_brcm_cbr() >> 18))
+ bmips_cbr_addr = (void __iomem *) 0xff400000;
+ else
+ bmips_cbr_addr = BMIPS_GET_CBR();
+
bmips_init_cfe();
bmips_cpu_setup();
register_bmips_smp_ops();

42
target/linux/bmips/patches-6.1/204-mips-bmips-enable-RAC-on-BMIPS4350.patch Normal file
View File

@ -0,0 +1,42 @@
From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= <dgcbueu@gmail.com>
Date: Sun, 18 Jun 2023 19:59:25 +0200
Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -615,6 +615,20 @@ void bmips_cpu_setup(void)
__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
break;
+ case CPU_BMIPS4350:
+ /* Enable data RAC */
+ if (!(read_c0_brcm_cmt_local() & (1 << 31))) {
+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG);
+ __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ } else {
+ cbr = (void __iomem *)0xff400000;
+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1);
+ __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+ }
+ break;
+
case CPU_BMIPS4380:
/* CBG workaround for early BMIPS4380 CPUs */
switch (read_c0_prid()) {

40
target/linux/generic/backport-6.1/890-v6.2-mtd-spinand-winbond-fix-flash-detection.patch Normal file
View File

@ -0,0 +1,40 @@
From dbf70fc204d2fbb0d8ad8f42038a60846502efda Mon Sep 17 00:00:00 2001
From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Date: Mon, 10 Oct 2022 13:51:09 +0300
Subject: [PATCH] mtd: spinand: winbond: fix flash identification
Winbond uses 3 bytes to identify flash: vendor_id, dev_id_0, dev_id_1,
but current driver uses only first 2 bytes of it for devices
identification. As result Winbond W25N02KV flash (id_bytes: EF, AA, 22)
is identified as W25N01GV (id_bytes: EF, AA, 21).
Fix this by adding missed identification bytes.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20221010105110.446674-1-mikhail.kshevetskiy@iopsys.eu
---
drivers/mtd/nand/spi/winbond.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -76,7 +76,7 @@ static int w25m02gv_select_target(struct
static const struct spinand_info winbond_spinand_table[] = {
SPINAND_INFO("W25M02GV",
- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab),
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 2),
NAND_ECCREQ(1, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -86,7 +86,7 @@ static const struct spinand_info winbond
SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
SPINAND_SELECT_TARGET(w25m02gv_select_target)),
SPINAND_INFO("W25N01GV",
- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa),
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x21),
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(1, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,

106
target/linux/generic/backport-6.1/891-v6.2-mtd-spinand-winbond-add-W25N02KV.patch Normal file
View File

@ -0,0 +1,106 @@
From 6154c7a583483d7b69f53bea868efdc369edd563 Mon Sep 17 00:00:00 2001
From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Date: Mon, 10 Oct 2022 13:51:10 +0300
Subject: [PATCH] mtd: spinand: winbond: add Winbond W25N02KV flash support
Add support of Winbond W25N02KV flash
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20221010105110.446674-2-mikhail.kshevetskiy@iopsys.eu
---
drivers/mtd/nand/spi/winbond.c | 75 ++++++++++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -74,6 +74,72 @@ static int w25m02gv_select_target(struct
return spi_mem_exec_op(spinand->spimem, &op);
}
+static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section > 3)
+ return -ERANGE;
+
+ region->offset = 64 + (16 * section);
+ region->length = 13;
+
+ return 0;
+}
+
+static int w25n02kv_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section > 3)
+ return -ERANGE;
+
+ region->offset = (16 * section) + 2;
+ region->length = 14;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops w25n02kv_ooblayout = {
+ .ecc = w25n02kv_ooblayout_ecc,
+ .free = w25n02kv_ooblayout_free,
+};
+
+static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ struct nand_device *nand = spinand_to_nand(spinand);
+ u8 mbf = 0;
+ struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
+
+ switch (status & STATUS_ECC_MASK) {
+ case STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+
+ case STATUS_ECC_HAS_BITFLIPS:
+ /*
+ * Let's try to retrieve the real maximum number of bitflips
+ * in order to avoid forcing the wear-leveling layer to move
+ * data around if it's not necessary.
+ */
+ if (spi_mem_exec_op(spinand->spimem, &op))
+ return nanddev_get_ecc_conf(nand)->strength;
+
+ mbf >>= 4;
+
+ if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
+ return nanddev_get_ecc_conf(nand)->strength;
+
+ return mbf;
+
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
static const struct spinand_info winbond_spinand_table[] = {
SPINAND_INFO("W25M02GV",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),
@@ -94,6 +160,15 @@ static const struct spinand_info winbond
&update_cache_variants),
0,
SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
+ SPINAND_INFO("W25N02KV",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
};
static int winbond_spinand_init(struct spinand_device *spinand)

50
target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-xr450.dts Normal file
View File

@ -0,0 +1,50 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq8065-nighthawk.dtsi"
/ {
model = "Netgear Nighthawk XR450";
compatible = "netgear,xr450", "qcom,ipq8065", "qcom,ipq8064";
};
&leds {
usb1 {
label = "white:usb1";
gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
};
usb2 {
label = "white:usb2";
gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
};
};
&partitions {
partition@1880000 {
label = "ubi";
reg = <0x1880000 0xce00000>;
};
partition@e680000 {
label = "reserve";
reg = <0xe680000 0x0780000>;
read-only;
};
};
&wifi0 {
nvmem-cells = <&macaddr_art_c>, <&precal_art_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&wifi1 {
nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&art {
macaddr_art_c: macaddr@c {
reg = <0xc 0x6>;
};
};

30
target/linux/qualcommax/patches-6.1/0134-arm64-dts-qcom-ipq8074-add-critical-thermal-trips.patch → target/linux/qualcommax/patches-6.1/0023-v6.5-arm64-dts-qcom-ipq8074-add-critical-thermal-trips.patch
View File

@ -1,6 +1,6 @@
From 145bbf2b88990ef3ff00ee541bb7662008683c16 Mon Sep 17 00:00:00 2001
From 56d3067cb694ba60d654e7f5ef231b6fabc4697f Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 7 Jun 2023 20:26:26 +0200
Date: Wed, 7 Jun 2023 20:44:48 +0200
Subject: [PATCH] arm64: dts: qcom: ipq8074: add critical thermal trips
According to bindings, thermal zones must have associated trips as well.
@ -9,13 +9,15 @@ lets start by defining critical trips to protect the devices against
severe overheating.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 96 +++++++++++++++++++++++++++
1 file changed, 96 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -1293,6 +1293,14 @@
@@ -896,6 +896,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 4>;
@ -30,7 +32,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
nss0-thermal {
@@ -1300,6 +1308,14 @@
@@ -903,6 +911,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 5>;
@ -45,7 +47,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
nss1-thermal {
@@ -1307,6 +1323,14 @@
@@ -910,6 +926,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 6>;
@ -60,7 +62,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
wcss-phya0-thermal {
@@ -1314,6 +1338,14 @@
@@ -917,6 +941,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 7>;
@ -75,7 +77,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
wcss-phya1-thermal {
@@ -1321,6 +1353,14 @@
@@ -924,6 +956,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 8>;
@ -90,7 +92,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
cpu0_thermal: cpu0-thermal {
@@ -1328,6 +1368,14 @@
@@ -931,6 +971,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 9>;
@ -105,7 +107,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
cpu1_thermal: cpu1-thermal {
@@ -1335,6 +1383,14 @@
@@ -938,6 +986,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 10>;
@ -120,7 +122,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
cpu2_thermal: cpu2-thermal {
@@ -1342,6 +1398,14 @@
@@ -945,6 +1001,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 11>;
@ -135,7 +137,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
cpu3_thermal: cpu3-thermal {
@@ -1349,6 +1413,14 @@
@@ -952,6 +1016,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 12>;
@ -150,7 +152,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
cluster_thermal: cluster-thermal {
@@ -1356,6 +1428,14 @@
@@ -959,6 +1031,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 13>;
@ -165,7 +167,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
wcss-phyb0-thermal {
@@ -1363,6 +1443,14 @@
@@ -966,6 +1046,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 14>;
@ -180,7 +182,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
};
wcss-phyb1-thermal {
@@ -1370,6 +1458,14 @@
@@ -973,6 +1061,14 @@
polling-delay = <1000>;
thermal-sensors = <&tsens 15>;