diff --git a/package/boot/uboot-envtools/files/apm821xx b/package/boot/uboot-envtools/files/apm821xx index e73aaab7a0..1076f931bb 100644 --- a/package/boot/uboot-envtools/files/apm821xx +++ b/package/boot/uboot-envtools/files/apm821xx @@ -19,6 +19,10 @@ netgear,wndap620|\ netgear,wndap660) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x4000" "0x4000" "4" ;; +netgear,wndr4700) + ubootenv_add_uci_config "/dev/mtd0" "0x40000" "0x20000" "0x20000" "1" + ubootenv_add_uci_config "/dev/mtd0" "0x60000" "0x20000" "0x20000" "1" + ;; wd,mybooklive) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x1000" "1" ubootenv_add_uci_config "/dev/mtd1" "0x1000" "0x1000" "0x1000" "1" diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq60xx b/package/boot/uboot-envtools/files/qualcommax_ipq60xx index 33cb94f99d..749b053aab 100644 --- a/package/boot/uboot-envtools/files/qualcommax_ipq60xx +++ b/package/boot/uboot-envtools/files/qualcommax_ipq60xx @@ -19,6 +19,11 @@ netgear,wax214) [ -n "$idx" ] && \ ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000" "2" ;; +yuncore,fap650) + idx="$(find_mtd_index 0:appsblenv)" + [ -n "$idx" ] && \ + ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x10000" + ;; esac config_load ubootenv diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile index a34e368a5d..86e2337e00 100644 --- a/package/firmware/ipq-wifi/Makefile +++ b/package/firmware/ipq-wifi/Makefile @@ -6,10 +6,9 @@ PKG_RELEASE:=2 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git -PKG_SOURCE_DATE:=2024-03-04 -PKG_SOURCE_VERSION:=38c02ae4302f9cb73f6914574239fe84799caa84 -PKG_MIRROR_HASH:=1e84f576d4161ea932b45a651abebdc05ff3c261ef25fc13d3d68cf9b624abb3 - +PKG_SOURCE_DATE:=2024-03-20 +PKG_SOURCE_VERSION:=87717baa8a7c922942f4202a0ec3de3cb5643941 +PKG_MIRROR_HASH:=5f05f922780b55c0069c4ee9725f2b1aa857f3bc841bec71a44e997ece9cea15 PKG_FLAGS:=nonshared include $(INCLUDE_DIR)/package.mk @@ -52,6 +51,7 @@ ALLWIFIBOARDS:= \ xiaomi_ax9000 \ yyets_le1 \ yuncore_ax880 \ + yuncore_fap650 \ zte_mf269 \ zte_mf287 \ zte_mf287plus \ @@ -169,6 +169,7 @@ $(eval $(call generate-ipq-wifi-package,xiaomi_ax3600,Xiaomi AX3600)) $(eval $(call generate-ipq-wifi-package,xiaomi_ax9000,Xiaomi AX9000)) $(eval $(call generate-ipq-wifi-package,yyets_le1,YYeTs LE1)) $(eval $(call generate-ipq-wifi-package,yuncore_ax880,Yuncore AX880)) +$(eval $(call generate-ipq-wifi-package,yuncore_fap650,Yuncore FAP650)) $(eval $(call generate-ipq-wifi-package,zte_mf269,ZTE MF269)) $(eval $(call generate-ipq-wifi-package,zte_mf287,ZTE MF287)) $(eval $(call generate-ipq-wifi-package,zte_mf287plus,ZTE MF287Plus)) diff --git a/package/kernel/cryptodev-linux/Makefile b/package/kernel/cryptodev-linux/Makefile index 0b794a3cd9..ea1bd24161 100644 --- a/package/kernel/cryptodev-linux/Makefile +++ b/package/kernel/cryptodev-linux/Makefile @@ -29,7 +29,6 @@ define KernelPackage/cryptodev SUBMENU:=Cryptographic API modules TITLE:=Driver for cryptographic acceleration URL:=http://cryptodev-linux.org/ - VERSION:=$(LINUX_VERSION)+$(PKG_VERSION)-$(BOARD)-$(PKG_RELEASE) DEPENDS:=+kmod-crypto-authenc +kmod-crypto-hash FILES:=$(PKG_BUILD_DIR)/cryptodev.$(LINUX_KMOD_SUFFIX) AUTOLOAD:=$(call AutoLoad,50,cryptodev) diff --git a/package/kernel/lantiq/ltq-vmmc/Makefile b/package/kernel/lantiq/ltq-vmmc/Makefile index 4972f1c374..8cd6b3de45 100644 --- a/package/kernel/lantiq/ltq-vmmc/Makefile +++ b/package/kernel/lantiq/ltq-vmmc/Makefile @@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=drv_vmmc PKG_VERSION:=1.9.0 -PKG_RELEASE:=4 +PKG_RELEASE:=5 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_HASH:=707f515eb727c032418c4da67d7e86884bb56cdc2a606e8f6ded6057d8767e57 diff --git a/package/kernel/lantiq/ltq-vmmc/patches/600-fix-compilation-warning-fallthrough.patch b/package/kernel/lantiq/ltq-vmmc/patches/600-fix-compilation-warning-fallthrough.patch index 7282bc446d..aaacf2e7ca 100644 --- a/package/kernel/lantiq/ltq-vmmc/patches/600-fix-compilation-warning-fallthrough.patch +++ b/package/kernel/lantiq/ltq-vmmc/patches/600-fix-compilation-warning-fallthrough.patch @@ -1,6 +1,6 @@ --- a/src/drv_vmmc_bbd.c +++ b/src/drv_vmmc_bbd.c -@@ -1025,6 +1025,7 @@ static IFX_int32_t vmmc_BBD_WhiteListedCmdWr(VMMC_CHANNEL *pCh, +@@ -1025,6 +1025,7 @@ static IFX_int32_t vmmc_BBD_WhiteListedC } } } diff --git a/package/kernel/lantiq/ltq-vmmc/patches/602-fix-compilation-warning-int-conversion.patch b/package/kernel/lantiq/ltq-vmmc/patches/602-fix-compilation-warning-int-conversion.patch new file mode 100644 index 0000000000..f95407b395 --- /dev/null +++ b/package/kernel/lantiq/ltq-vmmc/patches/602-fix-compilation-warning-int-conversion.patch @@ -0,0 +1,26 @@ +--- a/src/mps/drv_mps_vmmc_common.c ++++ b/src/mps/drv_mps_vmmc_common.c +@@ -117,8 +117,8 @@ IFX_void_t ifx_mps_mbx_event_upstream (I + #endif /* CONFIG_MPS_EVENT_MBX */ + IFX_void_t *ifx_mps_fastbuf_malloc (IFX_size_t size, IFX_int32_t priority); + IFX_void_t ifx_mps_fastbuf_free (const IFX_void_t * ptr); +-IFX_int32_t ifx_mps_fastbuf_init (IFX_void_t); +-IFX_int32_t ifx_mps_fastbuf_close (IFX_void_t); ++IFX_return_t ifx_mps_fastbuf_init (IFX_void_t); ++IFX_return_t ifx_mps_fastbuf_close (IFX_void_t); + IFX_uint32_t ifx_mps_reset_structures (mps_comm_dev * pDev); + IFX_boolean_t ifx_mps_ext_bufman (IFX_void_t); + extern IFX_uint32_t danube_get_cpu_ver (IFX_void_t); +--- a/src/mps/drv_mps_vmmc_device.h ++++ b/src/mps/drv_mps_vmmc_device.h +@@ -216,8 +216,8 @@ typedef struct /**< mps buffer monitorin + mps_buffer_state_e buf_state; + IFX_void_t *(*malloc) (IFX_size_t size, IFX_int32_t priority); /**< Buffer alloc function (def. kmalloc) */ + IFX_void_t (*free) (const IFX_void_t *ptr); /**< Buffer free function (def. kfree) */ +- IFX_int32_t (*init) (IFX_void_t); /** Manager init function */ +- IFX_int32_t (*close) (IFX_void_t); /** Manager shutdown function */ ++ IFX_return_t (*init) (IFX_void_t); /** Manager init function */ ++ IFX_return_t (*close) (IFX_void_t); /** Manager shutdown function */ + } mps_buf_mng_t; + + typedef IFX_uint32_t *mem_seg_t[MPS_MAX_PROVISION_SEGMENTS_PER_MSG]; diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index 386dfa99ce..e0f653cf12 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -1807,7 +1807,7 @@ $(eval $(call KernelPackage,atlantic)) define KernelPackage/lan743x SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Microchip LAN743x PCI Express Gigabit Ethernet NIC - DEPENDS:=@PCI_SUPPORT +kmod-ptp +kmod-mdio-devres + DEPENDS:=@PCI_SUPPORT +kmod-ptp +kmod-mdio-devres +!LINUX_6_1:kmod-fixed-phy KCONFIG:=CONFIG_LAN743X FILES:=$(LINUX_DIR)/drivers/net/ethernet/microchip/lan743x.ko AUTOLOAD:=$(call AutoProbe,lan743x) diff --git a/package/kernel/linux/modules/virt.mk b/package/kernel/linux/modules/virt.mk index f45cb17614..4a879f240e 100644 --- a/package/kernel/linux/modules/virt.mk +++ b/package/kernel/linux/modules/virt.mk @@ -22,6 +22,7 @@ define KernelPackage/kvm-x86 KCONFIG:=\ CONFIG_KVM \ CONFIG_KVM_MMU_AUDIT=n \ + CONFIG_KVM_SMM=y@ge6.6 \ CONFIG_VIRTUALIZATION=y FILES:= $(LINUX_DIR)/arch/$(LINUX_KARCH)/kvm/kvm.ko AUTOLOAD:=$(call AutoProbe,kvm.ko) @@ -84,9 +85,9 @@ define KernelPackage/vfio CONFIG_VFIO_MDEV=n FILES:= \ $(LINUX_DIR)/drivers/vfio/vfio.ko \ - $(LINUX_DIR)/drivers/vfio/vfio_virqfd.ko \ + $(LINUX_DIR)/drivers/vfio/vfio_virqfd.ko@lt6.2 \ $(LINUX_DIR)/drivers/vfio/vfio_iommu_type1.ko - AUTOLOAD:=$(call AutoProbe,vfio vfio_iommu_type1 vfio_virqfd) + AUTOLOAD:=$(call AutoProbe,vfio vfio_iommu_type1 +LINUX_6_1:vfio_virqfd) endef define KernelPackage/vfio/description diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile index dce05ee89d..20bf4c4592 100644 --- a/package/kernel/mt76/Makefile +++ b/package/kernel/mt76/Makefile @@ -1,16 +1,16 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mt76 -PKG_RELEASE=2 +PKG_RELEASE=1 PKG_LICENSE:=GPLv2 PKG_LICENSE_FILES:= PKG_SOURCE_URL:=https://github.com/openwrt/mt76 PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2024-03-18 -PKG_SOURCE_VERSION:=2135e201e7a9339e018d4e2d4a33c73266e674d7 -PKG_MIRROR_HASH:=530db8a70d18295677989aafc9c1757b151ef77e359985417f1d36e7d2415d33 +PKG_SOURCE_DATE:=2024-04-03 +PKG_SOURCE_VERSION:=1e336a8582dce2ef32ddd440d423e9afef961e71 +PKG_MIRROR_HASH:=f3801af80d5f9c1aa266c9401d4dfa2d501df0382c81fd249150e17dddc70936 PKG_MAINTAINER:=Felix Fietkau PKG_USE_NINJA:=0 diff --git a/package/kernel/mt76/patches/100-fix-build-on-linux-kernel-6.6.patch b/package/kernel/mt76/patches/100-fix-build-on-linux-kernel-6.6.patch deleted file mode 100644 index 4fdba0c472..0000000000 --- a/package/kernel/mt76/patches/100-fix-build-on-linux-kernel-6.6.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/mac80211.c -+++ b/mac80211.c -@@ -4,7 +4,9 @@ - */ - #include - #include -+#if LINUX_VERSION_CODE < KERNEL_VERSION(6,6,0) - #include -+#endif - #include "mt76.h" - - #define CHAN2G(_idx, _freq) { \ ---- a/mt76.h -+++ b/mt76.h -@@ -13,6 +13,9 @@ - #include - #include - #include -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,6,0) -+#include -+#endif - #include - #include - #include "util.h" diff --git a/package/kernel/mt76/patches/101-wifi-mt76-mt7603-add-debugfs-attr-for-disabling-fram.patch b/package/kernel/mt76/patches/101-wifi-mt76-mt7603-add-debugfs-attr-for-disabling-fram.patch deleted file mode 100644 index 7d2b7eccbf..0000000000 --- a/package/kernel/mt76/patches/101-wifi-mt76-mt7603-add-debugfs-attr-for-disabling-fram.patch +++ /dev/null @@ -1,81 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Mon, 25 Mar 2024 18:54:02 +0100 -Subject: [PATCH] wifi: mt76: mt7603: add debugfs attr for disabling frames - buffering -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -MT7603EN and MT7628AN were reported by multiple users to be unstable -under high traffic. Transmission of packets could stop for seconds often -leading to disconnections. - -Long research & debugging revelaed a close relation between MCU -interrupts of type PKT_TYPE_TXS and slowdowns / stalls. That led to -questioning frames buffering feature. - -It turns out that disabling SKBs loopback code makes mt7603 devices much -more stable under load. There are still some traffic hiccups but those -happen like once every an hour and end up in recovery in most cases. - -Add a debugfs option for disabling frames buffering so users can give it -a try. If this solution yields a success we can make this feature -disabled by default. - -This change was successfully tested using 2 GHz AP interface on: -1. Netgear R6220 - MT7621ST (SoC) + MT7603EN (WiFi) + MT7612EN (WiFi) -2. Xiaomi Mi Router 4C - MT7628AN (Wi-Fi SoC) - -Link: https://lore.kernel.org/linux-wireless/7c96d5ee-86c1-8068-1b58-40db6087a24f@gmail.com/ -Closes: https://github.com/openwrt/mt76/issues/865 -Fixes: c8846e101502 ("mt76: add driver for MT7603E and MT7628/7688") -Signed-off-by: Rafał Miłecki ---- - mt7603/debugfs.c | 2 ++ - mt7603/dma.c | 3 +++ - mt7603/init.c | 1 + - mt7603/mt7603.h | 2 ++ - 4 files changed, 8 insertions(+) - ---- a/mt7603/debugfs.c -+++ b/mt7603/debugfs.c -@@ -115,4 +115,6 @@ void mt7603_init_debugfs(struct mt7603_d - &dev->sensitivity_limit); - debugfs_create_bool("dynamic_sensitivity", 0600, dir, - &dev->dynamic_sensitivity); -+ debugfs_create_bool("frames_buffering", 0600, dir, -+ &dev->frames_buffering); - } ---- a/mt7603/dma.c -+++ b/mt7603/dma.c -@@ -27,6 +27,9 @@ mt7603_rx_loopback_skb(struct mt7603_dev - u32 val; - u8 tid = 0; - -+ if (!dev->frames_buffering) -+ goto free; -+ - if (skb->len < MT_TXD_SIZE + sizeof(struct ieee80211_hdr)) - goto free; - ---- a/mt7603/init.c -+++ b/mt7603/init.c -@@ -517,6 +517,7 @@ int mt7603_register_device(struct mt7603 - dev->slottime = 9; - dev->sensitivity_limit = 28; - dev->dynamic_sensitivity = true; -+ dev->frames_buffering = true; - - ret = mt7603_init_hardware(dev); - if (ret) ---- a/mt7603/mt7603.h -+++ b/mt7603/mt7603.h -@@ -155,6 +155,8 @@ struct mt7603_dev { - u32 reset_test; - - unsigned int reset_cause[__RESET_CAUSE_MAX]; -+ -+ bool frames_buffering; - }; - - extern const struct mt76_driver_ops mt7603_drv_ops; diff --git a/package/libs/libubox/Makefile b/package/libs/libubox/Makefile index 67bc100b60..e9426ee220 100644 --- a/package/libs/libubox/Makefile +++ b/package/libs/libubox/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/libubox.git -PKG_MIRROR_HASH:=e07d0c8b92a9ef18d2459ebbbca38de20eeee657704320d4705578f895b78257 -PKG_SOURCE_DATE:=2024-01-26 -PKG_SOURCE_VERSION:=c1be505732e6d254464973bdeacb955214c76c46 +PKG_MIRROR_HASH:=7fbaa84cfb553bebd780194fe7b8b502b7745e709e45912bce192cd1c8380016 +PKG_SOURCE_DATE:=2024-03-29 +PKG_SOURCE_VERSION:=eb9bcb64185ac155c02cc1a604692c4b00368324 PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE)) CMAKE_INSTALL:=1 diff --git a/package/libs/libxml2/Makefile b/package/libs/libxml2/Makefile index 86fa370771..efd33a5278 100644 --- a/package/libs/libxml2/Makefile +++ b/package/libs/libxml2/Makefile @@ -11,6 +11,7 @@ PKG_HASH:=a972796696afd38073e0f59c283c3a2f5a560b5268b4babc391b286166526b21 PKG_LICENSE:=MIT PKG_LICENSE_FILES:=COPYING PKG_CPE_ID:=cpe:/a:xmlsoft:libxml2 +HOST_BUILD_DEPENDS := libiconv-full/host include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/package.mk diff --git a/package/libs/mbedtls/Makefile b/package/libs/mbedtls/Makefile index 527a791315..d9cea86105 100644 --- a/package/libs/mbedtls/Makefile +++ b/package/libs/mbedtls/Makefile @@ -148,7 +148,10 @@ endef define Build/InstallDev $(INSTALL_DIR) $(1)/usr/include - $(CP) $(PKG_INSTALL_DIR)/usr/include/mbedtls $(1)/usr/include/ + $(CP) \ + $(PKG_INSTALL_DIR)/usr/include/mbedtls \ + $(PKG_INSTALL_DIR)/usr/include/psa \ + $(1)/usr/include/ $(INSTALL_DIR) $(1)/usr/lib $(CP) $(PKG_INSTALL_DIR)/usr/lib/lib*.so* $(1)/usr/lib/ $(CP) $(PKG_INSTALL_DIR)/usr/lib/lib*.a $(1)/usr/lib/ diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile index 2b072bd599..780acc47c4 100644 --- a/package/network/services/hostapd/Makefile +++ b/package/network/services/hostapd/Makefile @@ -5,13 +5,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=hostapd -PKG_RELEASE:=6 +PKG_RELEASE:=1 -PKG_SOURCE_URL:=http://w1.fi/hostap.git +PKG_SOURCE_URL:=https://w1.fi/hostap.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2023-09-08 -PKG_SOURCE_VERSION:=e5ccbfc69ecf297590341ae8b461edba9d8e964c -PKG_MIRROR_HASH:=8be806f6c88e736fff920e0d3e2cde7188fbf640fef47e9aeaad504674bfc0f3 +PKG_SOURCE_DATE:=2024-03-09 +PKG_SOURCE_VERSION:=695277a5b3da08b9a8a4e7117b933deb8b4950a7 +PKG_MIRROR_HASH:=8d6cb89be101bb3dcd84e7eb29484111dfeeeadf49eae85594b08011ba0ed62e PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=BSD-3-Clause diff --git a/package/network/services/hostapd/patches/001-wolfssl-init-RNG-with-ECC-key.patch b/package/network/services/hostapd/patches/001-wolfssl-init-RNG-with-ECC-key.patch deleted file mode 100644 index 269dcaac75..0000000000 --- a/package/network/services/hostapd/patches/001-wolfssl-init-RNG-with-ECC-key.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 21ce83b4ae2b9563175fdb4fc4312096cc399cf8 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Wed, 5 May 2021 00:44:34 +0200 -Subject: [PATCH] wolfssl: add RNG to EC key - -Since upstream commit 6467de5a8840 ("Randomize z ordinates in -scalar mult when timing resistant") WolfSSL requires a RNG for -the EC key when built hardened which is the default. - -Set the RNG for the EC key to fix connections for OWE clients. - -Signed-off-by: David Bauer ---- - src/crypto/crypto_wolfssl.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/src/crypto/crypto_wolfssl.c -+++ b/src/crypto/crypto_wolfssl.c -@@ -1340,6 +1340,7 @@ int ecc_projective_add_point(ecc_point * - - struct crypto_ec { - ecc_key key; -+ WC_RNG rng; - mp_int a; - mp_int prime; - mp_int order; -@@ -1394,6 +1395,8 @@ struct crypto_ec * crypto_ec_init(int gr - return NULL; - - if (wc_ecc_init(&e->key) != 0 || -+ wc_InitRng(&e->rng) != 0 || -+ wc_ecc_set_rng(&e->key, &e->rng) != 0 || - wc_ecc_set_curve(&e->key, 0, curve_id) != 0 || - mp_init(&e->a) != MP_OKAY || - mp_init(&e->prime) != MP_OKAY || -@@ -1425,6 +1428,7 @@ void crypto_ec_deinit(struct crypto_ec* - mp_clear(&e->order); - mp_clear(&e->prime); - mp_clear(&e->a); -+ wc_FreeRng(&e->rng); - wc_ecc_free(&e->key); - os_free(e); - } diff --git a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch index 0a51c84d21..4291f01518 100644 --- a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch +++ b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch @@ -9,12 +9,12 @@ Note: DFS is assumed to be usable if a country code has been set Signed-off-by: Benjamin Berg Signed-off-by: Peter Oh --- - wpa_supplicant/wpa_supplicant.c | 25 +++++++++++++++++++------ - 1 file changed, 19 insertions(+), 6 deletions(-) + wpa_supplicant/wpa_supplicant.c | 38 ++++++++++++++++++++++----------- + 1 file changed, 25 insertions(+), 13 deletions(-) --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -2638,7 +2638,7 @@ static int drv_supports_vht(struct wpa_s +@@ -2698,7 +2698,7 @@ static int drv_supports_vht(struct wpa_s } @@ -23,7 +23,7 @@ Signed-off-by: Peter Oh { int i; -@@ -2647,7 +2647,10 @@ static bool ibss_mesh_is_80mhz_avail(int +@@ -2707,7 +2707,10 @@ static bool ibss_mesh_is_80mhz_avail(int chan = hw_get_channel_chan(mode, i, NULL); if (!chan || @@ -35,7 +35,7 @@ Signed-off-by: Peter Oh return false; } -@@ -2774,7 +2777,7 @@ static void ibss_mesh_select_40mhz(struc +@@ -2834,7 +2837,7 @@ static void ibss_mesh_select_40mhz(struc const struct wpa_ssid *ssid, struct hostapd_hw_modes *mode, struct hostapd_freq_params *freq, @@ -44,7 +44,7 @@ Signed-off-by: Peter Oh int chan_idx; struct hostapd_channel_data *pri_chan = NULL, *sec_chan = NULL; int i, res; -@@ -2798,8 +2801,11 @@ static void ibss_mesh_select_40mhz(struc +@@ -2858,8 +2861,11 @@ static void ibss_mesh_select_40mhz(struc return; /* Check primary channel flags */ @@ -57,7 +57,7 @@ Signed-off-by: Peter Oh #ifdef CONFIG_HT_OVERRIDES if (ssid->disable_ht40) -@@ -2825,8 +2831,11 @@ static void ibss_mesh_select_40mhz(struc +@@ -2885,8 +2891,11 @@ static void ibss_mesh_select_40mhz(struc return; /* Check secondary channel flags */ @@ -70,7 +70,7 @@ Signed-off-by: Peter Oh if (ht40 == -1) { if (!(pri_chan->flag & HOSTAPD_CHAN_HT40MINUS)) -@@ -2880,7 +2889,7 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -2940,7 +2949,7 @@ static bool ibss_mesh_select_80_160mhz(s const struct wpa_ssid *ssid, struct hostapd_hw_modes *mode, struct hostapd_freq_params *freq, @@ -79,7 +79,7 @@ Signed-off-by: Peter Oh static const int bw80[] = { 5180, 5260, 5500, 5580, 5660, 5745, 5825, 5955, 6035, 6115, 6195, 6275, 6355, 6435, -@@ -2925,7 +2934,7 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -2985,7 +2994,7 @@ static bool ibss_mesh_select_80_160mhz(s goto skip_80mhz; /* Use 40 MHz if channel not usable */ @@ -88,7 +88,7 @@ Signed-off-by: Peter Oh goto skip_80mhz; chwidth = CONF_OPER_CHWIDTH_80MHZ; -@@ -2939,7 +2948,7 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -2999,7 +3008,7 @@ static bool ibss_mesh_select_80_160mhz(s if ((mode->he_capab[ieee80211_mode].phy_cap[ HE_PHYCAP_CHANNEL_WIDTH_SET_IDX] & HE_PHYCAP_CHANNEL_WIDTH_SET_160MHZ_IN_5G) && is_6ghz && @@ -97,7 +97,7 @@ Signed-off-by: Peter Oh for (j = 0; j < ARRAY_SIZE(bw160); j++) { if (freq->freq == bw160[j]) { chwidth = CONF_OPER_CHWIDTH_160MHZ; -@@ -2967,10 +2976,12 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -3027,10 +3036,12 @@ static bool ibss_mesh_select_80_160mhz(s if (!chan) continue; @@ -113,15 +113,15 @@ Signed-off-by: Peter Oh /* Found a suitable second segment for 80+80 */ chwidth = CONF_OPER_CHWIDTH_80P80MHZ; -@@ -3025,6 +3036,7 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3085,6 +3096,7 @@ void ibss_mesh_setup_freq(struct wpa_sup int i, obss_scan = 1; u8 channel; - bool is_6ghz; + bool is_6ghz, is_24ghz; + bool dfs_enabled = wpa_s->conf->country[0] && (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR); freq->freq = ssid->frequency; -@@ -3070,9 +3082,9 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3133,9 +3145,9 @@ void ibss_mesh_setup_freq(struct wpa_sup freq->channel = channel; /* Setup higher BW only for 5 GHz */ if (mode->mode == HOSTAPD_MODE_IEEE80211A) { diff --git a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch b/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch index 07b7a5971d..a53fcc480c 100644 --- a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch +++ b/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch @@ -64,11 +64,11 @@ Signed-off-by: Markus Theil return NULL; + chan_idx = _rand % num_available_chandefs; - dfs_find_channel(iface, &chan, chan_idx, type); - if (!chan) { + wpa_printf(MSG_DEBUG, "DFS: Picked random entry from the list: %d/%d", + chan_idx, num_available_chandefs); --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -11017,6 +11017,10 @@ static int nl80211_switch_channel(void * +@@ -11195,6 +11195,10 @@ static int nl80211_switch_channel(void * if (ret) goto error; diff --git a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch b/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch index edf599e3e2..a4a90933b1 100644 --- a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch +++ b/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch @@ -1,6 +1,10 @@ +From: Felix Fietkau +Date: Tue, 25 May 2021 10:50:16 +0200 +Subject: [PATCH] fix adding back stations after a missed deauth/disassoc + --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -4621,6 +4621,13 @@ static int add_associated_sta(struct hos +@@ -4659,6 +4659,13 @@ static int add_associated_sta(struct hos * drivers to accept the STA parameter configuration. Since this is * after a new FT-over-DS exchange, a new TK has been derived, so key * reinstallation is not a concern for this case. @@ -14,7 +18,7 @@ */ wpa_printf(MSG_DEBUG, "Add associated STA " MACSTR " (added_unassoc=%d auth_alg=%u ft_over_ds=%u reassoc=%d authorized=%d ft_tk=%d fils_tk=%d)", -@@ -4634,7 +4641,8 @@ static int add_associated_sta(struct hos +@@ -4672,7 +4679,8 @@ static int add_associated_sta(struct hos (!(sta->flags & WLAN_STA_AUTHORIZED) || (reassoc && sta->ft_over_ds && sta->auth_alg == WLAN_AUTH_FT) || (!wpa_auth_sta_ft_tk_already_set(sta->wpa_sm) && diff --git a/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch b/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch deleted file mode 100644 index 8dec325c98..0000000000 --- a/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch +++ /dev/null @@ -1,25 +0,0 @@ -From: Felix Fietkau -Date: Thu, 8 Jul 2021 16:33:03 +0200 -Subject: [PATCH] hostapd: fix use of uninitialized stack variables - -When a CSA is performed on an 80 MHz channel, hostapd_change_config_freq -unconditionally calls hostapd_set_oper_centr_freq_seg0/1_idx with seg0/1 -filled by ieee80211_freq_to_chan. -However, if ieee80211_freq_to_chan fails (because the freq is 0 or invalid), -seg0/1 remains uninitialized and filled with stack garbage, causing errors -such as "hostapd: 80 MHz: center segment 1 configured" - -Signed-off-by: Felix Fietkau ---- - ---- a/src/ap/hostapd.c -+++ b/src/ap/hostapd.c -@@ -3764,7 +3764,7 @@ static int hostapd_change_config_freq(st - struct hostapd_freq_params *old_params) - { - int channel; -- u8 seg0, seg1; -+ u8 seg0 = 0, seg1 = 0; - struct hostapd_hw_modes *mode; - - if (!params->channel) { diff --git a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch b/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch index ef2bb408fb..c5cf8b1b79 100644 --- a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch +++ b/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch @@ -10,17 +10,17 @@ Signed-off-by: Felix Fietkau --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -16,9 +16,6 @@ - #include +@@ -18,9 +18,6 @@ #include #include + #include -#ifdef CONFIG_LIBNL3_ROUTE -#include -#endif /* CONFIG_LIBNL3_ROUTE */ #include #include #include -@@ -5783,26 +5780,29 @@ fail: +@@ -5859,26 +5856,29 @@ fail: static void rtnl_neigh_delete_fdb_entry(struct i802_bss *bss, const u8 *addr) { @@ -64,7 +64,7 @@ Signed-off-by: Felix Fietkau if (err < 0) { wpa_printf(MSG_DEBUG, "nl80211: bridge FDB entry delete for " MACSTR " ifindex=%d failed: %s", MAC2STR(addr), -@@ -5812,9 +5812,8 @@ static void rtnl_neigh_delete_fdb_entry( +@@ -5888,9 +5888,8 @@ static void rtnl_neigh_delete_fdb_entry( MACSTR, MAC2STR(addr)); } @@ -76,7 +76,7 @@ Signed-off-by: Felix Fietkau } -@@ -8492,7 +8491,6 @@ static void *i802_init(struct hostapd_da +@@ -8615,7 +8614,6 @@ static void *i802_init(struct hostapd_da (params->num_bridge == 0 || !params->bridge[0])) add_ifidx(drv, br_ifindex, drv->ifindex); @@ -84,7 +84,7 @@ Signed-off-by: Felix Fietkau if (bss->added_if_into_bridge || bss->already_in_bridge) { int err; -@@ -8509,7 +8507,6 @@ static void *i802_init(struct hostapd_da +@@ -8632,7 +8630,6 @@ static void *i802_init(struct hostapd_da goto failed; } } @@ -92,7 +92,7 @@ Signed-off-by: Felix Fietkau if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) { wpa_printf(MSG_DEBUG, -@@ -11883,13 +11880,14 @@ static int wpa_driver_br_add_ip_neigh(vo +@@ -12071,13 +12068,14 @@ static int wpa_driver_br_add_ip_neigh(vo const u8 *ipaddr, int prefixlen, const u8 *addr) { @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau int res; if (!ipaddr || prefixlen == 0 || !addr) -@@ -11908,85 +11906,66 @@ static int wpa_driver_br_add_ip_neigh(vo +@@ -12096,85 +12094,66 @@ static int wpa_driver_br_add_ip_neigh(vo } if (version == 4) { @@ -220,7 +220,7 @@ Signed-off-by: Felix Fietkau addrsize = 16; } else { return -EINVAL; -@@ -12004,41 +11983,30 @@ static int wpa_driver_br_delete_ip_neigh +@@ -12192,41 +12171,30 @@ static int wpa_driver_br_delete_ip_neigh return -1; } diff --git a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch b/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch index b7bf9e351e..636ec2d9c8 100644 --- a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch +++ b/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch @@ -16,7 +16,7 @@ Signed-off-by: Felix Fietkau --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -3020,15 +3020,6 @@ static void handle_auth(struct hostapd_d +@@ -3032,15 +3032,6 @@ static void handle_auth(struct hostapd_d seq_ctrl); return; } diff --git a/package/network/services/hostapd/patches/991-Fix-OpenWrt-13156.patch b/package/network/services/hostapd/patches/050-Fix-OpenWrt-13156.patch similarity index 86% rename from package/network/services/hostapd/patches/991-Fix-OpenWrt-13156.patch rename to package/network/services/hostapd/patches/050-Fix-OpenWrt-13156.patch index 097d62abc0..a044409d2d 100644 --- a/package/network/services/hostapd/patches/991-Fix-OpenWrt-13156.patch +++ b/package/network/services/hostapd/patches/050-Fix-OpenWrt-13156.patch @@ -20,7 +20,7 @@ Signed-off-by: Stijn Tintel --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -3564,6 +3564,8 @@ int hostapd_remove_iface(struct hapd_int +@@ -3646,6 +3646,8 @@ int hostapd_remove_iface(struct hapd_int void hostapd_new_assoc_sta(struct hostapd_data *hapd, struct sta_info *sta, int reassoc) { @@ -29,14 +29,14 @@ Signed-off-by: Stijn Tintel if (hapd->tkip_countermeasures) { hostapd_drv_sta_deauth(hapd, sta->addr, WLAN_REASON_MICHAEL_MIC_FAILURE); -@@ -3571,10 +3573,16 @@ void hostapd_new_assoc_sta(struct hostap +@@ -3653,10 +3655,16 @@ void hostapd_new_assoc_sta(struct hostap } #ifdef CONFIG_IEEE80211BE -- if (hapd->conf->mld_ap && sta->mld_info.mld_sta && +- if (ap_sta_is_mld(hapd, sta) && - sta->mld_assoc_link_id != hapd->mld_link_id) - return; -+ if (hapd->conf->mld_ap && sta->mld_info.mld_sta) { ++ if (ap_sta_is_mld(hapd, sta)) { + if (sta->mld_assoc_link_id == hapd->mld_link_id) { + mld_assoc_link_id = sta->mld_assoc_link_id; + } else { @@ -51,7 +51,7 @@ Signed-off-by: Stijn Tintel sta->post_csa_sa_query = 0; --- a/src/ap/sta_info.c +++ b/src/ap/sta_info.c -@@ -1318,9 +1318,6 @@ void ap_sta_set_authorized(struct hostap +@@ -1412,9 +1412,6 @@ bool ap_sta_set_authorized_flag(struct h mld_assoc_link_id = -2; } #endif /* CONFIG_IEEE80211BE */ diff --git a/package/network/services/hostapd/patches/050-build_fix.patch b/package/network/services/hostapd/patches/050-build_fix.patch deleted file mode 100644 index 8680b07c66..0000000000 --- a/package/network/services/hostapd/patches/050-build_fix.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/hostapd/Makefile -+++ b/hostapd/Makefile -@@ -324,6 +324,7 @@ ifdef CONFIG_FILS - CFLAGS += -DCONFIG_FILS - OBJS += ../src/ap/fils_hlp.o - NEED_SHA384=y -+NEED_HMAC_SHA384_KDF=y - NEED_AES_SIV=y - ifdef CONFIG_FILS_SK_PFS - CFLAGS += -DCONFIG_FILS_SK_PFS ---- a/wpa_supplicant/Makefile -+++ b/wpa_supplicant/Makefile -@@ -331,6 +331,7 @@ endif - ifdef CONFIG_FILS - CFLAGS += -DCONFIG_FILS - NEED_SHA384=y -+NEED_HMAC_SHA384_KDF=y - NEED_AES_SIV=y - ifdef CONFIG_FILS_SK_PFS - CFLAGS += -DCONFIG_FILS_SK_PFS diff --git a/package/network/services/hostapd/patches/992-nl80211-add-extra-ies-only-if-allowed-by-driver.patch b/package/network/services/hostapd/patches/051-nl80211-add-extra-ies-only-if-allowed-by-driver.patch similarity index 92% rename from package/network/services/hostapd/patches/992-nl80211-add-extra-ies-only-if-allowed-by-driver.patch rename to package/network/services/hostapd/patches/051-nl80211-add-extra-ies-only-if-allowed-by-driver.patch index c7b595da57..de4d4ad3c2 100644 --- a/package/network/services/hostapd/patches/992-nl80211-add-extra-ies-only-if-allowed-by-driver.patch +++ b/package/network/services/hostapd/patches/051-nl80211-add-extra-ies-only-if-allowed-by-driver.patch @@ -26,7 +26,7 @@ Signed-off-by: David Bauer --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -2283,6 +2283,9 @@ struct wpa_driver_capa { +@@ -2340,6 +2340,9 @@ struct wpa_driver_capa { /** Maximum number of iterations in a single scan plan */ u32 max_sched_scan_plan_iterations; @@ -38,7 +38,7 @@ Signed-off-by: David Bauer --- a/src/drivers/driver_nl80211_capa.c +++ b/src/drivers/driver_nl80211_capa.c -@@ -949,6 +949,10 @@ static int wiphy_info_handler(struct nl_ +@@ -972,6 +972,10 @@ static int wiphy_info_handler(struct nl_ nla_get_u32(tb[NL80211_ATTR_MAX_SCAN_PLAN_ITERATIONS]); } @@ -51,7 +51,7 @@ Signed-off-by: David Bauer nla_get_u8(tb[NL80211_ATTR_MAX_MATCH_SETS]); --- a/src/drivers/driver_nl80211_scan.c +++ b/src/drivers/driver_nl80211_scan.c -@@ -222,7 +222,7 @@ nl80211_scan_common(struct i802_bss *bss +@@ -221,7 +221,7 @@ nl80211_scan_common(struct i802_bss *bss wpa_printf(MSG_DEBUG, "nl80211: Passive scan requested"); } diff --git a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch b/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch index 22107944dc..b786d3bccb 100644 --- a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch +++ b/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch @@ -21,7 +21,7 @@ Signed-off-by: Glenn Strauss --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -745,6 +745,40 @@ endif +@@ -757,6 +757,40 @@ endif CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\" endif @@ -62,7 +62,7 @@ Signed-off-by: Glenn Strauss ifeq ($(CONFIG_TLS), gnutls) ifndef CONFIG_CRYPTO # default to libgcrypt -@@ -924,9 +958,11 @@ endif +@@ -936,9 +970,11 @@ endif ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -74,7 +74,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_EAX AESOBJS += ../src/crypto/aes-eax.o NEED_AES_CTR=y -@@ -936,38 +972,48 @@ AESOBJS += ../src/crypto/aes-siv.o +@@ -948,38 +984,48 @@ AESOBJS += ../src/crypto/aes-siv.o NEED_AES_CTR=y endif ifdef NEED_AES_CTR @@ -123,7 +123,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_DEC ifdef CONFIG_INTERNAL_AES AESOBJS += ../src/crypto/aes-internal-dec.o -@@ -982,12 +1028,16 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -994,12 +1040,16 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -140,7 +140,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA1 SHA1OBJS += ../src/crypto/sha1-internal.o ifdef NEED_FIPS186_2_PRF -@@ -996,16 +1046,22 @@ endif +@@ -1008,16 +1058,22 @@ endif endif ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -163,7 +163,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_SHA1 OBJS += $(SHA1OBJS) -@@ -1015,11 +1071,13 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1027,11 +1083,13 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -177,7 +177,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_MD5 ifdef CONFIG_INTERNAL_MD5 -@@ -1058,56 +1116,81 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1070,56 +1128,81 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -259,7 +259,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA384 CFLAGS += -DCONFIG_INTERNAL_SHA384 -@@ -1152,11 +1235,13 @@ HOBJS += $(SHA1OBJS) +@@ -1164,11 +1247,13 @@ HOBJS += $(SHA1OBJS) ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), wolfssl) @@ -273,7 +273,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_RADIUS_SERVER CFLAGS += -DRADIUS_SERVER -@@ -1329,7 +1414,9 @@ NOBJS += ../src/utils/trace.o +@@ -1341,7 +1426,9 @@ NOBJS += ../src/utils/trace.o endif HOBJS += hlr_auc_gw.o ../src/utils/common.o ../src/utils/wpa_debug.o ../src/utils/os_$(CONFIG_OS).o ../src/utils/wpabuf.o ../src/crypto/milenage.o @@ -283,7 +283,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_AES HOBJS += ../src/crypto/aes-internal.o HOBJS += ../src/crypto/aes-internal-enc.o -@@ -1352,13 +1439,17 @@ SOBJS += ../src/common/sae.o +@@ -1364,13 +1451,17 @@ SOBJS += ../src/common/sae.o SOBJS += ../src/common/sae_pk.o SOBJS += ../src/common/dragonfly.o SOBJS += $(AESOBJS) @@ -326,7 +326,7 @@ Signed-off-by: Glenn Strauss # Driver interface for Host AP driver CONFIG_DRIVER_HOSTAP=y -@@ -278,6 +290,7 @@ CONFIG_IPV6=y +@@ -281,6 +293,7 @@ CONFIG_IPV6=y # openssl = OpenSSL (default) # gnutls = GnuTLS # internal = Internal TLSv1 implementation (experimental) @@ -7765,7 +7765,7 @@ Signed-off-by: Glenn Strauss CONFIG_SIM_SIMULATOR=y --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1163,6 +1163,29 @@ endif +@@ -1229,6 +1229,29 @@ endif CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\" endif @@ -7795,7 +7795,7 @@ Signed-off-by: Glenn Strauss ifeq ($(CONFIG_TLS), gnutls) ifndef CONFIG_CRYPTO # default to libgcrypt -@@ -1355,9 +1378,11 @@ endif +@@ -1421,9 +1444,11 @@ endif ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -7807,7 +7807,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_OPENSSL_INTERNAL_AES_WRAP # Seems to be needed at least with BoringSSL NEED_INTERNAL_AES_WRAP=y -@@ -1371,9 +1396,11 @@ endif +@@ -1437,9 +1462,11 @@ endif ifdef NEED_INTERNAL_AES_WRAP ifneq ($(CONFIG_TLS), linux) @@ -7819,7 +7819,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_EAX AESOBJS += ../src/crypto/aes-eax.o NEED_AES_CTR=y -@@ -1383,35 +1410,45 @@ AESOBJS += ../src/crypto/aes-siv.o +@@ -1449,35 +1476,45 @@ AESOBJS += ../src/crypto/aes-siv.o NEED_AES_CTR=y endif ifdef NEED_AES_CTR @@ -7865,7 +7865,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_ENC ifdef CONFIG_INTERNAL_AES AESOBJS += ../src/crypto/aes-internal-enc.o -@@ -1426,12 +1463,16 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1492,12 +1529,16 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -7882,7 +7882,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA1 SHA1OBJS += ../src/crypto/sha1-internal.o ifdef NEED_FIPS186_2_PRF -@@ -1443,29 +1484,37 @@ CFLAGS += -DCONFIG_NO_PBKDF2 +@@ -1509,29 +1550,37 @@ CFLAGS += -DCONFIG_NO_PBKDF2 else ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -7920,7 +7920,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_MD5 ifdef CONFIG_INTERNAL_MD5 MD5OBJS += ../src/crypto/md5-internal.o -@@ -1520,12 +1569,17 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1586,12 +1635,17 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -7938,7 +7938,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA256 SHA256OBJS += ../src/crypto/sha256-internal.o endif -@@ -1538,50 +1592,68 @@ CFLAGS += -DCONFIG_INTERNAL_SHA512 +@@ -1604,50 +1658,68 @@ CFLAGS += -DCONFIG_INTERNAL_SHA512 SHA256OBJS += ../src/crypto/sha512-internal.o endif ifdef NEED_TLS_PRF_SHA256 @@ -8007,7 +8007,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_ASN1 OBJS += ../src/tls/asn1.o -@@ -1756,10 +1828,12 @@ ifdef CONFIG_FIPS +@@ -1822,10 +1894,12 @@ ifdef CONFIG_FIPS CFLAGS += -DCONFIG_FIPS ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -8041,7 +8041,7 @@ Signed-off-by: Glenn Strauss # Driver interface for generic Linux wireless extensions # Note: WEXT is deprecated in the current Linux kernel version and no new # functionality is added to it. nl80211-based interface is the new -@@ -326,6 +327,7 @@ CONFIG_BACKEND=file +@@ -329,6 +330,7 @@ CONFIG_BACKEND=file # openssl = OpenSSL (default) # gnutls = GnuTLS # internal = Internal TLSv1 implementation (experimental) diff --git a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch b/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch index a48725264f..c101fbf75f 100644 --- a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch +++ b/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch @@ -12,7 +12,7 @@ Signed-off-by: Glenn Strauss --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -759,10 +759,6 @@ endif +@@ -771,10 +771,6 @@ endif OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o HOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o SOBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o @@ -101,7 +101,7 @@ Signed-off-by: Glenn Strauss --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1174,10 +1174,6 @@ endif +@@ -1240,10 +1240,6 @@ endif OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o OBJS_p += ../src/crypto/crypto_$(CONFIG_CRYPTO).o OBJS_priv += ../src/crypto/crypto_$(CONFIG_CRYPTO).o diff --git a/package/network/services/hostapd/patches/135-mbedtls-fix-owe-association.patch b/package/network/services/hostapd/patches/135-mbedtls-fix-owe-association.patch index 0c29432d3f..3733f91505 100644 --- a/package/network/services/hostapd/patches/135-mbedtls-fix-owe-association.patch +++ b/package/network/services/hostapd/patches/135-mbedtls-fix-owe-association.patch @@ -1,10 +1,18 @@ +From: David Bauer +Date: Tue, 24 Oct 2023 03:07:48 +0200 +Subject: [PATCH] hostapd: fix OWE association with mbedtls + The code for hostapd-mbedtls did not work when used for OWE association. -When handling association requests, the buffer offsets and length assumptions were incorrect, leading to never calculating the y point, thus denying association. +When handling association requests, the buffer offsets and length +assumptions were incorrect, leading to never calculating the y point, +thus denying association. -Also when crafting the association response, the buffer contained the trailing key-type. +Also when crafting the association response, the buffer contained the +trailing key-type. -Fix up both issues to adhere to the specification and make hostapd-mbedtls work with the OWE security type. +Fix up both issues to adhere to the specification and make +hostapd-mbedtls work with the OWE security type. --- a/src/crypto/crypto_mbedtls.c +++ b/src/crypto/crypto_mbedtls.c diff --git a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch b/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch index e967cff427..32e8ec3a89 100644 --- a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch +++ b/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch @@ -38,15 +38,15 @@ Signed-off-by: Glenn Strauss src/crypto/Makefile | 129 ++++++++++++++++++++- src/crypto/crypto_module_tests.c | 134 ++++++++++++++++++++++ src/tls/Makefile | 11 ++ - tests/Makefile | 75 +++++++++--- - tests/hwsim/example-hostapd.config | 11 +- - tests/hwsim/example-wpa_supplicant.config | 12 +- + tests/Makefile | 76 +++++++++--- + tests/hwsim/example-hostapd.config | 10 +- + tests/hwsim/example-wpa_supplicant.config | 11 +- tests/hwsim/test_ap_eap.py | 114 +++++++++++++----- tests/hwsim/test_ap_ft.py | 4 +- tests/hwsim/test_authsrv.py | 9 +- tests/hwsim/test_dpp.py | 19 ++- tests/hwsim/test_erp.py | 16 +-- - tests/hwsim/test_fils.py | 5 +- + tests/hwsim/test_fils.py | 4 + tests/hwsim/test_pmksa_cache.py | 4 +- tests/hwsim/test_sae.py | 7 ++ tests/hwsim/test_suite_b.py | 3 + @@ -56,12 +56,12 @@ Signed-off-by: Glenn Strauss tests/test-https.c | 12 +- tests/test-https_server.c | 12 +- wpa_supplicant/Makefile | 6 + - 22 files changed, 524 insertions(+), 91 deletions(-) + 22 files changed, 522 insertions(+), 91 deletions(-) create mode 100644 tests/test-crypto_module.c --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -696,6 +696,7 @@ CFLAGS += -DCONFIG_TLSV12 +@@ -708,6 +708,7 @@ CFLAGS += -DCONFIG_TLSV12 endif ifeq ($(CONFIG_TLS), wolfssl) @@ -69,7 +69,7 @@ Signed-off-by: Glenn Strauss CONFIG_CRYPTO=wolfssl ifdef TLS_FUNCS OBJS += ../src/crypto/tls_wolfssl.o -@@ -716,6 +717,7 @@ endif +@@ -728,6 +729,7 @@ endif endif ifeq ($(CONFIG_TLS), openssl) @@ -77,7 +77,7 @@ Signed-off-by: Glenn Strauss CFLAGS += -DCRYPTO_RSA_OAEP_SHA256 CONFIG_CRYPTO=openssl ifdef TLS_FUNCS -@@ -746,6 +748,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF +@@ -758,6 +760,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF endif ifeq ($(CONFIG_TLS), mbedtls) @@ -85,7 +85,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=mbedtls endif -@@ -776,6 +779,7 @@ endif +@@ -788,6 +791,7 @@ endif endif ifeq ($(CONFIG_TLS), gnutls) @@ -93,7 +93,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO # default to libgcrypt CONFIG_CRYPTO=gnutls -@@ -806,6 +810,7 @@ endif +@@ -818,6 +822,7 @@ endif endif ifeq ($(CONFIG_TLS), internal) @@ -101,7 +101,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=internal endif -@@ -884,6 +889,7 @@ endif +@@ -896,6 +901,7 @@ endif endif ifeq ($(CONFIG_TLS), linux) @@ -271,7 +271,7 @@ Signed-off-by: Glenn Strauss endif --- a/src/crypto/crypto_module_tests.c +++ b/src/crypto/crypto_module_tests.c -@@ -2469,6 +2469,139 @@ static int test_hpke(void) +@@ -2470,6 +2470,139 @@ static int test_hpke(void) } @@ -411,7 +411,7 @@ Signed-off-by: Glenn Strauss static int test_ms_funcs(void) { #ifndef CONFIG_FIPS -@@ -2590,6 +2723,7 @@ int crypto_module_tests(void) +@@ -2591,6 +2724,7 @@ int crypto_module_tests(void) test_fips186_2_prf() || test_extract_expand_hkdf() || test_hpke() || @@ -444,23 +444,25 @@ Signed-off-by: Glenn Strauss include ../lib.rules --- a/tests/Makefile +++ b/tests/Makefile -@@ -1,8 +1,10 @@ +@@ -1,10 +1,12 @@ -ALL=test-base64 test-md4 test-milenage \ - test-rsa-sig-ver \ - test-sha1 \ - test-https test-https_server \ -- test-sha256 test-aes test-x509v3 test-list test-rc4 +- test-sha256 test-aes test-x509v3 test-list test-rc4 \ +RUN_TESTS= \ + test-list \ + test-md4 test-rc4 test-sha1 test-sha256 \ + test-milenage test-aes \ -+ test-crypto_module -+ -+ALL=$(RUN_TESTS) test-base64 test-https test-https_server ++ test-crypto_module \ + test-bss ++ALL=$(RUN_TESTS) test-base64 test-https test-https_server ++ include ../src/build.rules -@@ -24,13 +26,27 @@ CFLAGS += -DCONFIG_IEEE80211R_AP + ifdef LIBFUZZER +@@ -25,13 +27,27 @@ CFLAGS += -DCONFIG_IEEE80211R_AP CFLAGS += -DCONFIG_IEEE80211R CFLAGS += -DCONFIG_TDLS @@ -490,7 +492,7 @@ Signed-off-by: Glenn Strauss _OBJS_VAR := LLIBS include ../src/objs.mk -@@ -42,12 +58,43 @@ include ../src/objs.mk +@@ -43,12 +59,43 @@ include ../src/objs.mk LIBS = $(SLIBS) $(DLIBS) LLIBS = -Wl,--start-group $(DLIBS) -Wl,--end-group $(SLIBS) @@ -534,8 +536,8 @@ Signed-off-by: Glenn Strauss test-base64: $(call BUILDOBJ,test-base64.o) $(LIBS) $(LDO) $(LDFLAGS) -o $@ $^ $(LLIBS) -@@ -83,17 +130,11 @@ test-x509v3: $(call BUILDOBJ,test-x509v3 - +@@ -141,18 +188,11 @@ test-bss: $(call BUILDOBJ,test-bss.o) $( + $(LDO) $(LDFLAGS) -o $@ $< $(LLIBS) $(WPA_CFLAGS) $(WPA_OBJS) $(LIBS) run-tests: $(ALL) - ./test-aes @@ -545,6 +547,7 @@ Signed-off-by: Glenn Strauss - ./test-rsa-sig-ver - ./test-sha1 - ./test-sha256 +- ./test-bss + @set -ex; for i in $(RUN_TESTS); do ./$$i; done @echo @echo All tests completed successfully. @@ -575,14 +578,6 @@ Signed-off-by: Glenn Strauss CONFIG_EAP_EKE=y CONFIG_PKCS12=y CONFIG_RADIUS_SERVER=y -@@ -89,6 +81,7 @@ CFLAGS += -DCONFIG_RADIUS_TEST - CONFIG_MODULE_TESTS=y - - CONFIG_SUITEB=y -+CONFIG_SUITEB192=$(if $(filter openssl mbedtls,$(CONFIG_TLS)),y,) - - # AddressSanitizer (ASan) can be enabled by uncommenting the following lines. - # This can be used as a more efficient memory error detector than valgrind --- a/tests/hwsim/example-wpa_supplicant.config +++ b/tests/hwsim/example-wpa_supplicant.config @@ -35,16 +35,7 @@ LIBS += -rdynamic @@ -603,14 +598,6 @@ Signed-off-by: Glenn Strauss CONFIG_USIM_SIMULATOR=y CONFIG_SIM_SIMULATOR=y -@@ -137,6 +128,7 @@ CONFIG_TESTING_OPTIONS=y - CONFIG_MODULE_TESTS=y - - CONFIG_SUITEB=y -+CONFIG_SUITEB192=$(if $(filter openssl mbedtls,$(CONFIG_TLS)),y,) - - # AddressSanitizer (ASan) can be enabled by uncommenting the following lines. - # This can be used as a more efficient memory error detector than valgrind --- a/tests/hwsim/test_ap_eap.py +++ b/tests/hwsim/test_ap_eap.py @@ -42,20 +42,42 @@ def check_eap_capa(dev, method): @@ -708,10 +695,10 @@ Signed-off-by: Glenn Strauss tls = dev.request("GET tls_library") + if tls.startswith("mbed TLS"): + raise HwsimSkip("TLS v1.3 not supported") - if "run=OpenSSL 1.1.1" not in tls and "run=OpenSSL 3.0" not in tls and "wolfSSL" not in tls: - raise HwsimSkip("TLS v1.3 not supported") - -@@ -118,11 +157,15 @@ def check_pkcs12_support(dev): + ok = ['run=OpenSSL 1.1.1', 'run=OpenSSL 3.0', 'run=OpenSSL 3.1', + 'run=OpenSSL 3.2', 'wolfSSL'] + for s in ok: +@@ -122,11 +161,15 @@ def check_pkcs12_support(dev): # raise HwsimSkip("PKCS#12 not supported with this TLS library: " + tls) if tls.startswith("wolfSSL"): raise HwsimSkip("PKCS#12 not supported with this TLS library: " + tls) @@ -727,7 +714,7 @@ Signed-off-by: Glenn Strauss def check_ec_support(dev): tls = dev.request("GET tls_library") -@@ -1595,7 +1638,7 @@ def test_ap_wpa2_eap_ttls_pap_subject_ma +@@ -1741,7 +1784,7 @@ def test_ap_wpa2_eap_ttls_pap_subject_ma eap_connect(dev[0], hapd, "TTLS", "pap user", anonymous_identity="ttls", password="password", ca_cert="auth_serv/ca.pem", phase2="auth=PAP", @@ -736,7 +723,7 @@ Signed-off-by: Glenn Strauss altsubject_match="EMAIL:noone@example.com;DNS:server.w1.fi;URI:http://example.com/") eap_reauth(dev[0], "TTLS") -@@ -2830,6 +2873,7 @@ def test_ap_wpa2_eap_tls_neg_domain_matc +@@ -2976,6 +3019,7 @@ def test_ap_wpa2_eap_tls_neg_domain_matc def test_ap_wpa2_eap_tls_neg_subject_match(dev, apdev): """WPA2-Enterprise negative test - subject mismatch""" @@ -744,7 +731,7 @@ Signed-off-by: Glenn Strauss params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap") hostapd.add_ap(apdev[0], params) dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS", -@@ -2890,6 +2934,7 @@ def test_ap_wpa2_eap_tls_neg_subject_mat +@@ -3036,6 +3080,7 @@ def test_ap_wpa2_eap_tls_neg_subject_mat def test_ap_wpa2_eap_tls_neg_altsubject_match(dev, apdev): """WPA2-Enterprise negative test - altsubject mismatch""" @@ -752,7 +739,7 @@ Signed-off-by: Glenn Strauss params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap") hostapd.add_ap(apdev[0], params) -@@ -3430,7 +3475,7 @@ def test_ap_wpa2_eap_ikev2_oom(dev, apde +@@ -3582,7 +3627,7 @@ def test_ap_wpa2_eap_ikev2_oom(dev, apde dev[0].request("REMOVE_NETWORK all") tls = dev[0].request("GET tls_library") @@ -761,7 +748,7 @@ Signed-off-by: Glenn Strauss tests = [(1, "os_get_random;dh_init")] else: tests = [(1, "crypto_dh_init;dh_init")] -@@ -4744,7 +4789,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -4896,7 +4941,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca params["private_key"] = "auth_serv/iCA-server/server.key" hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -770,7 +757,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4810,6 +4855,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -4962,6 +5007,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca run_ap_wpa2_eap_tls_intermediate_ca_ocsp(dev, apdev, params, "-sha1") def run_ap_wpa2_eap_tls_intermediate_ca_ocsp(dev, apdev, params, md): @@ -778,7 +765,7 @@ Signed-off-by: Glenn Strauss params = int_eap_server_params() params["ca_cert"] = "auth_serv/iCA-server/ca-and-root.pem" params["server_cert"] = "auth_serv/iCA-server/server.pem" -@@ -4819,7 +4865,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ +@@ -4971,7 +5017,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ try: hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -787,7 +774,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4855,7 +4901,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ +@@ -5007,7 +5053,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ try: hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -796,7 +783,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4905,7 +4951,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -5057,7 +5103,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca try: hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -805,7 +792,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4972,7 +5018,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -5124,7 +5170,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -814,7 +801,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -5230,6 +5276,7 @@ def test_ap_wpa2_eap_ttls_server_cert_ek +@@ -5382,6 +5428,7 @@ def test_ap_wpa2_eap_ttls_server_cert_ek def test_ap_wpa2_eap_ttls_server_pkcs12(dev, apdev): """WPA2-Enterprise using EAP-TTLS and server PKCS#12 file""" @@ -822,7 +809,7 @@ Signed-off-by: Glenn Strauss skip_with_fips(dev[0]) params = int_eap_server_params() del params["server_cert"] -@@ -5242,6 +5289,7 @@ def test_ap_wpa2_eap_ttls_server_pkcs12( +@@ -5394,6 +5441,7 @@ def test_ap_wpa2_eap_ttls_server_pkcs12( def test_ap_wpa2_eap_ttls_server_pkcs12_extra(dev, apdev): """EAP-TTLS and server PKCS#12 file with extra certs""" @@ -830,7 +817,7 @@ Signed-off-by: Glenn Strauss skip_with_fips(dev[0]) params = int_eap_server_params() del params["server_cert"] -@@ -5264,6 +5312,7 @@ def test_ap_wpa2_eap_ttls_dh_params_serv +@@ -5416,6 +5464,7 @@ def test_ap_wpa2_eap_ttls_dh_params_serv def test_ap_wpa2_eap_ttls_dh_params_dsa_server(dev, apdev): """WPA2-Enterprise using EAP-TTLS and alternative server dhparams (DSA)""" @@ -838,7 +825,7 @@ Signed-off-by: Glenn Strauss params = int_eap_server_params() params["dh_file"] = "auth_serv/dsaparam.pem" hapd = hostapd.add_ap(apdev[0], params) -@@ -5575,8 +5624,8 @@ def test_ap_wpa2_eap_non_ascii_identity2 +@@ -5727,8 +5776,8 @@ def test_ap_wpa2_eap_non_ascii_identity2 def test_openssl_cipher_suite_config_wpas(dev, apdev): """OpenSSL cipher suite configuration on wpa_supplicant""" tls = dev[0].request("GET tls_library") @@ -849,7 +836,7 @@ Signed-off-by: Glenn Strauss params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap") hapd = hostapd.add_ap(apdev[0], params) eap_connect(dev[0], hapd, "TTLS", "pap user", -@@ -5602,14 +5651,14 @@ def test_openssl_cipher_suite_config_wpa +@@ -5754,14 +5803,14 @@ def test_openssl_cipher_suite_config_wpa def test_openssl_cipher_suite_config_hapd(dev, apdev): """OpenSSL cipher suite configuration on hostapd""" tls = dev[0].request("GET tls_library") @@ -868,7 +855,7 @@ Signed-off-by: Glenn Strauss eap_connect(dev[0], hapd, "TTLS", "pap user", anonymous_identity="ttls", password="password", ca_cert="auth_serv/ca.pem", phase2="auth=PAP") -@@ -6051,13 +6100,17 @@ def test_ap_wpa2_eap_tls_versions(dev, a +@@ -6207,13 +6256,17 @@ def test_ap_wpa2_eap_tls_versions(dev, a check_tls_ver(dev[0], hapd, "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=1", "TLSv1.2") @@ -888,10 +875,10 @@ Signed-off-by: Glenn Strauss + "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=0 tls_disable_tlsv1_2=1", "TLSv1.1") + check_tls_ver(dev[2], hapd, + "tls_disable_tlsv1_0=0 tls_disable_tlsv1_1=1 tls_disable_tlsv1_2=1", "TLSv1") - if "run=OpenSSL 1.1.1" in tls or "run=OpenSSL 3.0" in tls: + if "run=OpenSSL 1.1.1" in tls or "run=OpenSSL 3." in tls: check_tls_ver(dev[0], hapd, "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=1 tls_disable_tlsv1_2=1 tls_disable_tlsv1_3=0", "TLSv1.3") -@@ -6079,6 +6132,11 @@ def test_ap_wpa2_eap_tls_versions_server +@@ -6235,6 +6288,11 @@ def test_ap_wpa2_eap_tls_versions_server tests = [("TLSv1", "[ENABLE-TLSv1.0][DISABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"), ("TLSv1.1", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"), ("TLSv1.2", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][ENABLE-TLSv1.2][DISABLE-TLSv1.3]")] @@ -903,7 +890,7 @@ Signed-off-by: Glenn Strauss for exp, flags in tests: hapd.disable() hapd.set("tls_flags", flags) -@@ -7138,6 +7196,7 @@ def test_ap_wpa2_eap_assoc_rsn(dev, apde +@@ -7305,6 +7363,7 @@ def test_ap_wpa2_eap_assoc_rsn(dev, apde def test_eap_tls_ext_cert_check(dev, apdev): """EAP-TLS and external server certification validation""" # With internal server certificate chain validation @@ -911,7 +898,7 @@ Signed-off-by: Glenn Strauss id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TLS", identity="tls user", ca_cert="auth_serv/ca.pem", -@@ -7150,6 +7209,7 @@ def test_eap_tls_ext_cert_check(dev, apd +@@ -7317,6 +7376,7 @@ def test_eap_tls_ext_cert_check(dev, apd def test_eap_ttls_ext_cert_check(dev, apdev): """EAP-TTLS and external server certification validation""" # Without internal server certificate chain validation @@ -919,7 +906,7 @@ Signed-off-by: Glenn Strauss id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS", identity="pap user", anonymous_identity="ttls", password="password", phase2="auth=PAP", -@@ -7160,6 +7220,7 @@ def test_eap_ttls_ext_cert_check(dev, ap +@@ -7327,6 +7387,7 @@ def test_eap_ttls_ext_cert_check(dev, ap def test_eap_peap_ext_cert_check(dev, apdev): """EAP-PEAP and external server certification validation""" # With internal server certificate chain validation @@ -927,7 +914,7 @@ Signed-off-by: Glenn Strauss id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="PEAP", identity="user", anonymous_identity="peap", ca_cert="auth_serv/ca.pem", -@@ -7170,6 +7231,7 @@ def test_eap_peap_ext_cert_check(dev, ap +@@ -7337,6 +7398,7 @@ def test_eap_peap_ext_cert_check(dev, ap def test_eap_fast_ext_cert_check(dev, apdev): """EAP-FAST and external server certification validation""" @@ -935,7 +922,7 @@ Signed-off-by: Glenn Strauss check_eap_capa(dev[0], "FAST") # With internal server certificate chain validation dev[0].request("SET blob fast_pac_auth_ext ") -@@ -7184,10 +7246,6 @@ def test_eap_fast_ext_cert_check(dev, ap +@@ -7351,10 +7413,6 @@ def test_eap_fast_ext_cert_check(dev, ap run_ext_cert_check(dev, apdev, id) def run_ext_cert_check(dev, apdev, net_id): @@ -948,7 +935,7 @@ Signed-off-by: Glenn Strauss --- a/tests/hwsim/test_ap_ft.py +++ b/tests/hwsim/test_ap_ft.py -@@ -2474,11 +2474,11 @@ def test_ap_ft_ap_oom5(dev, apdev): +@@ -2486,11 +2486,11 @@ def test_ap_ft_ap_oom5(dev, apdev): # This will fail to roam dev[0].roam(bssid1, check_bssid=False) @@ -992,7 +979,7 @@ Signed-off-by: Glenn Strauss raise HwsimSkip("Crypto library does not support Brainpool curves: " + tls) capa = dev.request("GET_CAPABILITY dpp") ver = 1 -@@ -3892,6 +3893,9 @@ def test_dpp_proto_auth_req_no_i_proto_k +@@ -3902,6 +3903,9 @@ def test_dpp_proto_auth_req_no_i_proto_k def test_dpp_proto_auth_req_invalid_i_proto_key(dev, apdev): """DPP protocol testing - invalid I-proto key in Auth Req""" @@ -1002,7 +989,7 @@ Signed-off-by: Glenn Strauss run_dpp_proto_auth_req_missing(dev, 66, "Invalid Initiator Protocol Key") def test_dpp_proto_auth_req_no_i_nonce(dev, apdev): -@@ -3987,7 +3991,12 @@ def test_dpp_proto_auth_resp_no_r_proto_ +@@ -3997,7 +4001,12 @@ def test_dpp_proto_auth_resp_no_r_proto_ def test_dpp_proto_auth_resp_invalid_r_proto_key(dev, apdev): """DPP protocol testing - invalid R-Proto Key in Auth Resp""" @@ -1016,7 +1003,7 @@ Signed-off-by: Glenn Strauss def test_dpp_proto_auth_resp_no_r_nonce(dev, apdev): """DPP protocol testing - no R-nonce in Auth Resp""" -@@ -4349,11 +4358,17 @@ def test_dpp_proto_pkex_exchange_resp_in +@@ -4359,11 +4368,17 @@ def test_dpp_proto_pkex_exchange_resp_in def test_dpp_proto_pkex_cr_req_invalid_bootstrap_key(dev, apdev): """DPP protocol testing - invalid Bootstrap Key in PKEX Commit-Reveal Request""" @@ -1092,21 +1079,20 @@ Signed-off-by: Glenn Strauss dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS", --- a/tests/hwsim/test_fils.py +++ b/tests/hwsim/test_fils.py -@@ -1422,7 +1422,10 @@ def run_fils_sk_pfs(dev, apdev, group, p - check_erp_capa(dev[0]) - - tls = dev[0].request("GET tls_library") -- if not tls.startswith("wolfSSL"): -+ if tls.startswith("mbed TLS"): +@@ -1472,6 +1472,10 @@ def check_ec_group(dev, group): + tls = dev.request("GET tls_library") + if tls.startswith("wolfSSL"): + return ++ elif tls.startswith("mbed TLS"): + if int(group) == 27: + raise HwsimSkip("Brainpool EC group 27 not supported by mbed TLS") -+ elif not tls.startswith("wolfSSL"): - if int(group) in [25]: - if not (tls.startswith("OpenSSL") and ("build=OpenSSL 1.0.2" in tls or "build=OpenSSL 1.1" in tls or "build=OpenSSL 3.0" in tls) and ("run=OpenSSL 1.0.2" in tls or "run=OpenSSL 1.1" in tls or "run=OpenSSL 3.0" in tls)): - raise HwsimSkip("EC group not supported") ++ return + if int(group) in [25]: + if not (tls.startswith("OpenSSL") and ("build=OpenSSL 1.0.2" in tls or "build=OpenSSL 1.1" in tls or "build=OpenSSL 3." in tls) and ("run=OpenSSL 1.0.2" in tls or "run=OpenSSL 1.1" in tls or "run=OpenSSL 3." in tls)): + raise HwsimSkip("EC group not supported") --- a/tests/hwsim/test_pmksa_cache.py +++ b/tests/hwsim/test_pmksa_cache.py -@@ -955,7 +955,7 @@ def test_pmksa_cache_preauth_wpas_oom(de +@@ -958,7 +958,7 @@ def test_pmksa_cache_preauth_wpas_oom(de eap_connect(dev[0], hapd, "PAX", "pax.user@example.com", password_hex="0123456789abcdef0123456789abcdef", bssid=apdev[0]['bssid']) @@ -1115,7 +1101,7 @@ Signed-off-by: Glenn Strauss with alloc_fail(dev[0], i, "rsn_preauth_init"): res = dev[0].request("PREAUTH f2:11:22:33:44:55").strip() logger.info("Iteration %d - PREAUTH command results: %s" % (i, res)) -@@ -963,7 +963,7 @@ def test_pmksa_cache_preauth_wpas_oom(de +@@ -966,7 +966,7 @@ def test_pmksa_cache_preauth_wpas_oom(de state = dev[0].request('GET_ALLOC_FAIL') if state.startswith('0:'): break @@ -1126,7 +1112,7 @@ Signed-off-by: Glenn Strauss """PMKSA cache control interface operations""" --- a/tests/hwsim/test_sae.py +++ b/tests/hwsim/test_sae.py -@@ -177,6 +177,11 @@ def test_sae_groups(dev, apdev): +@@ -178,6 +178,11 @@ def test_sae_groups(dev, apdev): if tls.startswith("OpenSSL") and "run=OpenSSL 1." in tls: logger.info("Add Brainpool EC groups since OpenSSL is new enough") sae_groups += [27, 28, 29, 30] @@ -1138,7 +1124,7 @@ Signed-off-by: Glenn Strauss heavy_groups = [14, 15, 16] suitable_groups = [15, 16, 17, 18, 19, 20, 21] groups = [str(g) for g in sae_groups] -@@ -2193,6 +2198,8 @@ def run_sae_pwe_group(dev, apdev, group) +@@ -2194,6 +2199,8 @@ def run_sae_pwe_group(dev, apdev, group) logger.info("Add Brainpool EC groups since OpenSSL is new enough") elif tls.startswith("wolfSSL"): logger.info("Make sure Brainpool EC groups were enabled when compiling wolfSSL") @@ -1179,7 +1165,7 @@ Signed-off-by: Glenn Strauss res = dev[0].request(cmd) --- a/tests/hwsim/utils.py +++ b/tests/hwsim/utils.py -@@ -141,7 +141,13 @@ def check_imsi_privacy_support(dev): +@@ -145,7 +145,13 @@ def check_imsi_privacy_support(dev): def check_tls_tod(dev): tls = dev.request("GET tls_library") @@ -1308,7 +1294,7 @@ Signed-off-by: Glenn Strauss if (need_more_data) { --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1122,6 +1122,7 @@ CFLAGS += -DCONFIG_TLSV12 +@@ -1188,6 +1188,7 @@ TLS_FUNCS=y endif ifeq ($(CONFIG_TLS), wolfssl) @@ -1316,7 +1302,7 @@ Signed-off-by: Glenn Strauss ifdef TLS_FUNCS CFLAGS += -DWOLFSSL_DER_LOAD OBJS += ../src/crypto/tls_wolfssl.o -@@ -1137,6 +1138,7 @@ LIBS_p += -lwolfssl -lm +@@ -1203,6 +1204,7 @@ LIBS_p += -lwolfssl -lm endif ifeq ($(CONFIG_TLS), openssl) @@ -1324,7 +1310,7 @@ Signed-off-by: Glenn Strauss CFLAGS += -DCRYPTO_RSA_OAEP_SHA256 ifdef TLS_FUNCS CFLAGS += -DEAP_TLS_OPENSSL -@@ -1164,6 +1166,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF +@@ -1230,6 +1232,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF endif ifeq ($(CONFIG_TLS), mbedtls) @@ -1332,7 +1318,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=mbedtls endif -@@ -1183,6 +1186,7 @@ endif +@@ -1249,6 +1252,7 @@ endif endif ifeq ($(CONFIG_TLS), gnutls) @@ -1340,7 +1326,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO # default to libgcrypt CONFIG_CRYPTO=gnutls -@@ -1213,6 +1217,7 @@ endif +@@ -1279,6 +1283,7 @@ endif endif ifeq ($(CONFIG_TLS), internal) @@ -1348,7 +1334,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=internal endif -@@ -1293,6 +1298,7 @@ endif +@@ -1359,6 +1364,7 @@ endif endif ifeq ($(CONFIG_TLS), linux) diff --git a/package/network/services/hostapd/patches/170-hostapd-update-cfs0-and-cfs1-for-160MHz.patch b/package/network/services/hostapd/patches/170-hostapd-update-cfs0-and-cfs1-for-160MHz.patch index b0151b071f..96f674a77d 100644 --- a/package/network/services/hostapd/patches/170-hostapd-update-cfs0-and-cfs1-for-160MHz.patch +++ b/package/network/services/hostapd/patches/170-hostapd-update-cfs0-and-cfs1-for-160MHz.patch @@ -21,15 +21,15 @@ operation information element instead. Signed-off-by: P Praneesh --- hostapd/config_file.c | 2 ++ - src/ap/ieee802_11_ht.c | 7 +++++++ - src/ap/ieee802_11_vht.c | 16 ++++++++++++++++ + src/ap/ieee802_11_ht.c | 9 +++++++++ + src/ap/ieee802_11_vht.c | 17 +++++++++++++++++ src/common/hw_features_common.c | 1 + - src/common/ieee802_11_defs.h | 1 + - 5 files changed, 27 insertions(+) + src/common/ieee802_11_defs.h | 2 ++ + 5 files changed, 31 insertions(+) --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -1153,6 +1153,8 @@ static int hostapd_config_vht_capab(stru +@@ -1229,6 +1229,8 @@ static int hostapd_config_vht_capab(stru conf->vht_capab |= VHT_CAP_RX_ANTENNA_PATTERN; if (os_strstr(capab, "[TX-ANTENNA-PATTERN]")) conf->vht_capab |= VHT_CAP_TX_ANTENNA_PATTERN; @@ -66,7 +66,7 @@ Signed-off-by: P Praneesh return pos; --- a/src/ap/ieee802_11_vht.c +++ b/src/ap/ieee802_11_vht.c -@@ -25,6 +25,7 @@ u8 * hostapd_eid_vht_capabilities(struct +@@ -26,6 +26,7 @@ u8 * hostapd_eid_vht_capabilities(struct struct ieee80211_vht_capabilities *cap; struct hostapd_hw_modes *mode = hapd->iface->current_mode; u8 *pos = eid; @@ -74,7 +74,7 @@ Signed-off-by: P Praneesh if (!mode || is_6ghz_op_class(hapd->iconf->op_class)) return eid; -@@ -62,6 +63,17 @@ u8 * hostapd_eid_vht_capabilities(struct +@@ -63,6 +64,17 @@ u8 * hostapd_eid_vht_capabilities(struct host_to_le32(nsts << VHT_CAP_BEAMFORMEE_STS_OFFSET); } @@ -92,7 +92,7 @@ Signed-off-by: P Praneesh /* Supported MCS set comes from hw */ os_memcpy(&cap->vht_supported_mcs_set, mode->vht_mcs_set, 8); -@@ -74,6 +86,7 @@ u8 * hostapd_eid_vht_capabilities(struct +@@ -75,6 +87,7 @@ u8 * hostapd_eid_vht_capabilities(struct u8 * hostapd_eid_vht_operation(struct hostapd_data *hapd, u8 *eid) { struct ieee80211_vht_operation *oper; @@ -100,7 +100,7 @@ Signed-off-by: P Praneesh u8 *pos = eid; enum oper_chan_width oper_chwidth = hostapd_get_oper_chwidth(hapd->iconf); -@@ -106,6 +119,7 @@ u8 * hostapd_eid_vht_operation(struct ho +@@ -110,6 +123,7 @@ u8 * hostapd_eid_vht_operation(struct ho oper->vht_op_info_chan_center_freq_seg1_idx = seg1; oper->vht_op_info_chwidth = oper_chwidth; @@ -108,7 +108,7 @@ Signed-off-by: P Praneesh if (oper_chwidth == CONF_OPER_CHWIDTH_160MHZ) { /* * Convert 160 MHz channel width to new style as interop -@@ -119,6 +133,9 @@ u8 * hostapd_eid_vht_operation(struct ho +@@ -123,6 +137,9 @@ u8 * hostapd_eid_vht_operation(struct ho oper->vht_op_info_chan_center_freq_seg0_idx -= 8; else oper->vht_op_info_chan_center_freq_seg0_idx += 8; @@ -120,7 +120,7 @@ Signed-off-by: P Praneesh * Convert 80+80 MHz channel width to new style as interop --- a/src/common/hw_features_common.c +++ b/src/common/hw_features_common.c -@@ -811,6 +811,7 @@ int ieee80211ac_cap_check(u32 hw, u32 co +@@ -898,6 +898,7 @@ int ieee80211ac_cap_check(u32 hw, u32 co VHT_CAP_CHECK(VHT_CAP_VHT_LINK_ADAPTATION_VHT_MRQ_MFB); VHT_CAP_CHECK(VHT_CAP_RX_ANTENNA_PATTERN); VHT_CAP_CHECK(VHT_CAP_TX_ANTENNA_PATTERN); @@ -130,7 +130,7 @@ Signed-off-by: P Praneesh #undef VHT_CAP_CHECK_MAX --- a/src/common/ieee802_11_defs.h +++ b/src/common/ieee802_11_defs.h -@@ -1349,6 +1349,8 @@ struct ieee80211_ampe_ie { +@@ -1397,6 +1397,8 @@ struct ieee80211_ampe_ie { #define VHT_CAP_VHT_LINK_ADAPTATION_VHT_MRQ_MFB ((u32) BIT(26) | BIT(27)) #define VHT_CAP_RX_ANTENNA_PATTERN ((u32) BIT(28)) #define VHT_CAP_TX_ANTENNA_PATTERN ((u32) BIT(29)) diff --git a/package/network/services/hostapd/patches/180-driver_nl80211-fix-setting-QoS-map-on-secondary-BSSs.patch b/package/network/services/hostapd/patches/180-driver_nl80211-fix-setting-QoS-map-on-secondary-BSSs.patch deleted file mode 100644 index 4929c581ce..0000000000 --- a/package/network/services/hostapd/patches/180-driver_nl80211-fix-setting-QoS-map-on-secondary-BSSs.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Felix Fietkau -Date: Thu, 14 Sep 2023 10:53:50 +0200 -Subject: [PATCH] driver_nl80211: fix setting QoS map on secondary BSSs - -The setting is per-BSS, not per PHY - -Signed-off-by: Felix Fietkau ---- - ---- a/src/drivers/driver_nl80211.c -+++ b/src/drivers/driver_nl80211.c -@@ -11341,7 +11341,7 @@ static int nl80211_set_qos_map(void *pri - wpa_hexdump(MSG_DEBUG, "nl80211: Setting QoS Map", - qos_map_set, qos_map_set_len); - -- if (!(msg = nl80211_drv_msg(drv, 0, NL80211_CMD_SET_QOS_MAP)) || -+ if (!(msg = nl80211_bss_msg(bss, 0, NL80211_CMD_SET_QOS_MAP)) || - nla_put(msg, NL80211_ATTR_QOS_MAP, qos_map_set_len, qos_map_set)) { - nlmsg_free(msg); - return -ENOBUFS; diff --git a/package/network/services/hostapd/patches/181-driver_nl80211-update-drv-ifindex-on-removing-the-fi.patch b/package/network/services/hostapd/patches/181-driver_nl80211-update-drv-ifindex-on-removing-the-fi.patch index adfb21fb47..b54abecc4f 100644 --- a/package/network/services/hostapd/patches/181-driver_nl80211-update-drv-ifindex-on-removing-the-fi.patch +++ b/package/network/services/hostapd/patches/181-driver_nl80211-update-drv-ifindex-on-removing-the-fi.patch @@ -8,7 +8,7 @@ Signed-off-by: Felix Fietkau --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -8867,6 +8867,7 @@ static int wpa_driver_nl80211_if_remove( +@@ -8985,6 +8985,7 @@ static int wpa_driver_nl80211_if_remove( if (drv->first_bss->next) { drv->first_bss = drv->first_bss->next; drv->ctx = drv->first_bss->ctx; diff --git a/package/network/services/hostapd/patches/182-nl80211-move-nl80211_put_freq_params-call-outside-of.patch b/package/network/services/hostapd/patches/182-nl80211-move-nl80211_put_freq_params-call-outside-of.patch index 395c645954..e875a82aea 100644 --- a/package/network/services/hostapd/patches/182-nl80211-move-nl80211_put_freq_params-call-outside-of.patch +++ b/package/network/services/hostapd/patches/182-nl80211-move-nl80211_put_freq_params-call-outside-of.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -5226,6 +5226,9 @@ static int wpa_driver_nl80211_set_ap(voi +@@ -5315,6 +5315,9 @@ static int wpa_driver_nl80211_set_ap(voi nla_nest_end(msg, ftm); } @@ -22,13 +22,13 @@ Signed-off-by: Felix Fietkau #ifdef CONFIG_IEEE80211AX if (params->he_spr_ctrl) { struct nlattr *spr; -@@ -5260,9 +5263,6 @@ static int wpa_driver_nl80211_set_ap(voi +@@ -5349,9 +5352,6 @@ static int wpa_driver_nl80211_set_ap(voi nla_nest_end(msg, spr); } - if (params->freq && nl80211_put_freq_params(msg, params->freq) < 0) - goto fail; - - if (params->freq && params->freq->he_enabled) { + if (params->freq && params->freq->he_enabled && + nl80211_attr_supported(drv, NL80211_ATTR_HE_BSS_COLOR)) { struct nlattr *bss_color; - diff --git a/package/network/services/hostapd/patches/183-hostapd-cancel-channel_list_update_timeout-in-hostap.patch b/package/network/services/hostapd/patches/183-hostapd-cancel-channel_list_update_timeout-in-hostap.patch index fe81318385..4d1af1f5c0 100644 --- a/package/network/services/hostapd/patches/183-hostapd-cancel-channel_list_update_timeout-in-hostap.patch +++ b/package/network/services/hostapd/patches/183-hostapd-cancel-channel_list_update_timeout-in-hostap.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -569,6 +569,7 @@ static void sta_track_deinit(struct host +@@ -656,6 +656,7 @@ static void sta_track_deinit(struct host void hostapd_cleanup_iface_partial(struct hostapd_iface *iface) { wpa_printf(MSG_DEBUG, "%s(%p)", __func__, iface); @@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau #ifdef NEED_AP_MLME hostapd_stop_setup_timers(iface); #endif /* NEED_AP_MLME */ -@@ -598,7 +599,6 @@ void hostapd_cleanup_iface_partial(struc +@@ -685,7 +686,6 @@ void hostapd_cleanup_iface_partial(struc static void hostapd_cleanup_iface(struct hostapd_iface *iface) { wpa_printf(MSG_DEBUG, "%s(%p)", __func__, iface); diff --git a/package/network/services/hostapd/patches/200-multicall.patch b/package/network/services/hostapd/patches/200-multicall.patch index e3ed00f2de..1a193b51bb 100644 --- a/package/network/services/hostapd/patches/200-multicall.patch +++ b/package/network/services/hostapd/patches/200-multicall.patch @@ -1,3 +1,10 @@ +From: Felix Fietkau +Date: Sat, 23 Jan 2010 08:28:26 +0000 +Subject: [PATCH] Add option to build a multicall binary + +This allows building both hostapd and wpa_supplicant as a single binary +(wpad). + --- a/hostapd/Makefile +++ b/hostapd/Makefile @@ -1,6 +1,7 @@ @@ -18,7 +25,7 @@ OBJS += ../src/ap/vlan_init.o OBJS += ../src/ap/vlan_ifconfig.o OBJS += ../src/ap/vlan.o -@@ -357,10 +359,14 @@ CFLAGS += -DCONFIG_MBO +@@ -358,10 +360,14 @@ CFLAGS += -DCONFIG_MBO OBJS += ../src/ap/mbo_ap.o endif @@ -36,7 +43,7 @@ LIBS += $(DRV_AP_LIBS) ifdef CONFIG_L2_PACKET -@@ -1380,6 +1386,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) +@@ -1392,6 +1398,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) _OBJS_VAR := OBJS include ../src/objs.mk @@ -49,7 +56,7 @@ hostapd: $(OBJS) $(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS) @$(E) " LD " $@ -@@ -1460,6 +1472,12 @@ include ../src/objs.mk +@@ -1472,6 +1484,12 @@ include ../src/objs.mk _OBJS_VAR := SOBJS include ../src/objs.mk @@ -62,6 +69,86 @@ nt_password_hash: $(NOBJS) $(Q)$(CC) $(LDFLAGS) -o nt_password_hash $(NOBJS) $(LIBS_n) @$(E) " LD " $@ +--- a/hostapd/main.c ++++ b/hostapd/main.c +@@ -705,6 +705,11 @@ fail: + return -1; + } + ++void hostapd_wpa_event(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); ++ ++void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); + + #ifdef CONFIG_WPS + static int gen_uuid(const char *txt_addr) +@@ -798,6 +803,8 @@ int main(int argc, char *argv[]) + return -1; + #endif /* CONFIG_DPP */ + ++ wpa_supplicant_event = hostapd_wpa_event; ++ wpa_supplicant_event_global = hostapd_wpa_event_global; + for (;;) { + c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:vg:G:q"); + if (c < 0) +--- a/src/ap/drv_callbacks.c ++++ b/src/ap/drv_callbacks.c +@@ -2341,8 +2341,8 @@ err: + #endif /* CONFIG_OWE */ + + +-void wpa_supplicant_event(void *ctx, enum wpa_event_type event, +- union wpa_event_data *data) ++void hostapd_wpa_event(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data) + { + struct hostapd_data *hapd = ctx; + struct sta_info *sta; +@@ -2674,7 +2674,7 @@ void wpa_supplicant_event(void *ctx, enu + } + + +-void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event, ++void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event, + union wpa_event_data *data) + { + struct hapd_interfaces *interfaces = ctx; +--- a/src/drivers/driver.h ++++ b/src/drivers/driver.h +@@ -6763,8 +6763,8 @@ union wpa_event_data { + * Driver wrapper code should call this function whenever an event is received + * from the driver. + */ +-void wpa_supplicant_event(void *ctx, enum wpa_event_type event, +- union wpa_event_data *data); ++extern void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); + + /** + * wpa_supplicant_event_global - Report a driver event for wpa_supplicant +@@ -6776,7 +6776,7 @@ void wpa_supplicant_event(void *ctx, enu + * Same as wpa_supplicant_event(), but we search for the interface in + * wpa_global. + */ +-void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event, ++extern void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event, + union wpa_event_data *data); + + /* +--- a/src/drivers/drivers.c ++++ b/src/drivers/drivers.c +@@ -10,6 +10,10 @@ + #include "utils/common.h" + #include "driver.h" + ++void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); ++void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); + + const struct wpa_driver_ops *const wpa_drivers[] = + { --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile @@ -10,6 +10,7 @@ ALL += dbus/fi.w1.wpa_supplicant1.servic @@ -72,7 +159,7 @@ include ../src/build.rules ifdef CONFIG_BUILD_PASN_SO -@@ -382,7 +383,9 @@ endif +@@ -388,7 +389,9 @@ endif ifdef CONFIG_IBSS_RSN NEED_RSN_AUTHENTICATOR=y CFLAGS += -DCONFIG_IBSS_RSN @@ -82,7 +169,7 @@ OBJS += ibss_rsn.o endif -@@ -924,6 +927,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS +@@ -980,6 +983,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS CFLAGS += -DCONFIG_DYNAMIC_EAP_METHODS LIBS += -ldl -rdynamic endif @@ -93,7 +180,7 @@ endif ifdef CONFIG_AP -@@ -931,9 +938,11 @@ NEED_EAP_COMMON=y +@@ -987,9 +994,11 @@ NEED_EAP_COMMON=y NEED_RSN_AUTHENTICATOR=y CFLAGS += -DCONFIG_AP OBJS += ap.o @@ -105,7 +192,7 @@ OBJS += ../src/ap/hostapd.o OBJS += ../src/ap/wpa_auth_glue.o OBJS += ../src/ap/utils.o -@@ -1022,6 +1031,12 @@ endif +@@ -1080,6 +1089,12 @@ endif ifdef CONFIG_HS20 OBJS += ../src/ap/hs20.o endif @@ -118,7 +205,7 @@ endif ifdef CONFIG_MBO -@@ -1030,7 +1045,9 @@ CFLAGS += -DCONFIG_MBO +@@ -1089,7 +1104,9 @@ NEED_GAS=y endif ifdef NEED_RSN_AUTHENTICATOR @@ -128,7 +215,7 @@ NEED_AES_WRAP=y OBJS += ../src/ap/wpa_auth.o OBJS += ../src/ap/wpa_auth_ie.o -@@ -2010,6 +2027,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) +@@ -2079,6 +2096,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) _OBJS_VAR := OBJS include ../src/objs.mk @@ -141,7 +228,7 @@ wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs) $(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS) @$(E) " LD " $@ -@@ -2142,6 +2165,12 @@ eap_gpsk.so: $(SRC_EAP_GPSK) +@@ -2211,6 +2234,12 @@ eap_gpsk.so: $(SRC_EAP_GPSK) $(Q)sed -e 's|\@BINDIR\@|$(BINDIR)|g' $< >$@ @$(E) " sed" $< @@ -154,50 +241,63 @@ wpa_supplicant.exe: wpa_supplicant mv -f $< $@ wpa_cli.exe: wpa_cli ---- a/src/drivers/driver.h -+++ b/src/drivers/driver.h -@@ -6667,8 +6667,8 @@ union wpa_event_data { - * Driver wrapper code should call this function whenever an event is received - * from the driver. - */ --void wpa_supplicant_event(void *ctx, enum wpa_event_type event, -- union wpa_event_data *data); -+extern void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); +--- a/wpa_supplicant/eapol_test.c ++++ b/wpa_supplicant/eapol_test.c +@@ -31,7 +31,12 @@ + #include "ctrl_iface.h" + #include "pcsc_funcs.h" + #include "wpas_glue.h" ++#include "drivers/driver.h" - /** - * wpa_supplicant_event_global - Report a driver event for wpa_supplicant -@@ -6680,7 +6680,7 @@ void wpa_supplicant_event(void *ctx, enu - * Same as wpa_supplicant_event(), but we search for the interface in - * wpa_global. - */ --void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event, -+extern void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event, - union wpa_event_data *data); ++void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); ++void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); - /* ---- a/src/ap/drv_callbacks.c -+++ b/src/ap/drv_callbacks.c -@@ -2184,8 +2184,8 @@ err: - #endif /* CONFIG_OWE */ + const struct wpa_driver_ops *const wpa_drivers[] = { NULL }; + +@@ -1325,6 +1330,10 @@ static void usage(void) + "option several times.\n"); + } + ++extern void supplicant_event(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); ++extern void supplicant_event_global(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data); + + int main(int argc, char *argv[]) + { +@@ -1348,6 +1357,8 @@ int main(int argc, char *argv[]) + if (os_program_init()) + return -1; + ++ wpa_supplicant_event = supplicant_event; ++ wpa_supplicant_event_global = supplicant_event_global; + hostapd_logger_register_cb(hostapd_logger_cb); + + os_memset(&eapol_test, 0, sizeof(eapol_test)); +--- a/wpa_supplicant/events.c ++++ b/wpa_supplicant/events.c +@@ -5919,8 +5919,8 @@ static void wpas_link_reconfig(struct wp + } -void wpa_supplicant_event(void *ctx, enum wpa_event_type event, - union wpa_event_data *data) -+void hostapd_wpa_event(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data) ++void supplicant_event(void *ctx, enum wpa_event_type event, ++ union wpa_event_data *data) { - struct hostapd_data *hapd = ctx; - #ifndef CONFIG_NO_STDOUT_DEBUG -@@ -2489,7 +2489,7 @@ void wpa_supplicant_event(void *ctx, enu + struct wpa_supplicant *wpa_s = ctx; + int resched; +@@ -6872,7 +6872,7 @@ void wpa_supplicant_event(void *ctx, enu } -void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event, -+void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event, ++void supplicant_event_global(void *ctx, enum wpa_event_type event, union wpa_event_data *data) { - struct hapd_interfaces *interfaces = ctx; + struct wpa_supplicant *wpa_s; --- a/wpa_supplicant/wpa_priv.c +++ b/wpa_supplicant/wpa_priv.c @@ -1039,8 +1039,8 @@ static void wpa_priv_send_ft_response(st @@ -229,31 +329,9 @@ wpa_priv_fd_workaround(); os_memset(&global, 0, sizeof(global)); ---- a/wpa_supplicant/events.c -+++ b/wpa_supplicant/events.c -@@ -5353,8 +5353,8 @@ static void wpas_link_reconfig(struct wp - } - - --void wpa_supplicant_event(void *ctx, enum wpa_event_type event, -- union wpa_event_data *data) -+void supplicant_event(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data) - { - struct wpa_supplicant *wpa_s = ctx; - int resched; -@@ -6272,7 +6272,7 @@ void wpa_supplicant_event(void *ctx, enu - } - - --void wpa_supplicant_event_global(void *ctx, enum wpa_event_type event, -+void supplicant_event_global(void *ctx, enum wpa_event_type event, - union wpa_event_data *data) - { - struct wpa_supplicant *wpa_s; --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -7462,7 +7462,6 @@ struct wpa_interface * wpa_supplicant_ma +@@ -7583,7 +7583,6 @@ struct wpa_interface * wpa_supplicant_ma return NULL; } @@ -261,7 +339,7 @@ /** * wpa_supplicant_match_existing - Match existing interfaces * @global: Pointer to global data from wpa_supplicant_init() -@@ -7497,6 +7496,11 @@ static int wpa_supplicant_match_existing +@@ -7618,6 +7617,11 @@ static int wpa_supplicant_match_existing #endif /* CONFIG_MATCH_IFACE */ @@ -273,7 +351,7 @@ /** * wpa_supplicant_add_iface - Add a new network interface -@@ -7753,6 +7757,8 @@ struct wpa_global * wpa_supplicant_init( +@@ -7874,6 +7878,8 @@ struct wpa_global * wpa_supplicant_init( #ifndef CONFIG_NO_WPA_MSG wpa_msg_register_ifname_cb(wpa_supplicant_msg_ifname_cb); #endif /* CONFIG_NO_WPA_MSG */ @@ -282,74 +360,3 @@ if (params->wpa_debug_file_path) wpa_debug_open_file(params->wpa_debug_file_path); ---- a/hostapd/main.c -+++ b/hostapd/main.c -@@ -698,6 +698,11 @@ fail: - return -1; - } - -+void hostapd_wpa_event(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); -+ -+void hostapd_wpa_event_global(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); - - #ifdef CONFIG_WPS - static int gen_uuid(const char *txt_addr) -@@ -791,6 +796,8 @@ int main(int argc, char *argv[]) - return -1; - #endif /* CONFIG_DPP */ - -+ wpa_supplicant_event = hostapd_wpa_event; -+ wpa_supplicant_event_global = hostapd_wpa_event_global; - for (;;) { - c = getopt(argc, argv, "b:Bde:f:hi:KP:sSTtu:vg:G:q"); - if (c < 0) ---- a/src/drivers/drivers.c -+++ b/src/drivers/drivers.c -@@ -10,6 +10,10 @@ - #include "utils/common.h" - #include "driver.h" - -+void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); -+void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); - - const struct wpa_driver_ops *const wpa_drivers[] = - { ---- a/wpa_supplicant/eapol_test.c -+++ b/wpa_supplicant/eapol_test.c -@@ -31,7 +31,12 @@ - #include "ctrl_iface.h" - #include "pcsc_funcs.h" - #include "wpas_glue.h" -+#include "drivers/driver.h" - -+void (*wpa_supplicant_event)(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); -+void (*wpa_supplicant_event_global)(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); - - const struct wpa_driver_ops *const wpa_drivers[] = { NULL }; - -@@ -1303,6 +1308,10 @@ static void usage(void) - "option several times.\n"); - } - -+extern void supplicant_event(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); -+extern void supplicant_event_global(void *ctx, enum wpa_event_type event, -+ union wpa_event_data *data); - - int main(int argc, char *argv[]) - { -@@ -1323,6 +1332,8 @@ int main(int argc, char *argv[]) - if (os_program_init()) - return -1; - -+ wpa_supplicant_event = supplicant_event; -+ wpa_supplicant_event_global = supplicant_event_global; - hostapd_logger_register_cb(hostapd_logger_cb); - - os_memset(&eapol_test, 0, sizeof(eapol_test)); diff --git a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch b/package/network/services/hostapd/patches/201-lto-jobserver-support.patch similarity index 84% rename from package/network/services/hostapd/patches/500-lto-jobserver-support.patch rename to package/network/services/hostapd/patches/201-lto-jobserver-support.patch index 67312c5004..ea0dc29081 100644 --- a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch +++ b/package/network/services/hostapd/patches/201-lto-jobserver-support.patch @@ -1,6 +1,11 @@ +From: Felix Fietkau +Date: Tue, 10 Jul 2018 13:48:17 +0200 +Subject: [PATCH] hostapd: build with LTO enabled (using jobserver for parallel + build) + --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -1396,7 +1396,7 @@ hostapd_multi.a: $(BCHECK) $(OBJS) +@@ -1405,7 +1405,7 @@ hostapd_multi.a: $(BCHECK) $(OBJS) @$(AR) cr $@ hostapd_multi.o $(OBJS) hostapd: $(OBJS) @@ -9,7 +14,7 @@ @$(E) " LD " $@ ifdef CONFIG_WPA_TRACE -@@ -1407,7 +1407,7 @@ _OBJS_VAR := OBJS_c +@@ -1416,7 +1416,7 @@ _OBJS_VAR := OBJS_c include ../src/objs.mk hostapd_cli: $(OBJS_c) @@ -20,7 +25,7 @@ NOBJS = nt_password_hash.o ../src/crypto/ms_funcs.o $(SHA1OBJS) --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -2037,31 +2037,31 @@ wpa_supplicant_multi.a: .config $(BCHECK +@@ -2103,31 +2103,31 @@ wpa_supplicant_multi.a: .config $(BCHECK @$(AR) cr $@ wpa_supplicant_multi.o $(OBJS) wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs) diff --git a/package/network/services/hostapd/patches/210-build-de-duplicate-_DIRS-before-calling-mkdir.patch b/package/network/services/hostapd/patches/210-build-de-duplicate-_DIRS-before-calling-mkdir.patch new file mode 100644 index 0000000000..08d4393c90 --- /dev/null +++ b/package/network/services/hostapd/patches/210-build-de-duplicate-_DIRS-before-calling-mkdir.patch @@ -0,0 +1,23 @@ +From: Felix Fietkau +Date: Thu, 4 Apr 2024 12:59:41 +0200 +Subject: [PATCH] build: de-duplicate _DIRS before calling mkdir + +If the build path is long, the contents of the _DIRS variable can be very long, +since it repeats the same directories very often. +In some cases, this has triggered an "Argument list too long" build error. + +Suggested-by: Eneas U de Queiroz +Signed-off-by: Felix Fietkau +--- + +--- a/src/build.rules ++++ b/src/build.rules +@@ -80,7 +80,7 @@ endif + _DIRS := $(BUILDDIR)/$(PROJ) + .PHONY: _make_dirs + _make_dirs: +- @mkdir -p $(_DIRS) ++ @mkdir -p $(sort $(_DIRS)) + + $(BUILDDIR)/$(PROJ)/src/%.o: $(ROOTDIR)src/%.c $(CONFIG_FILE) | _make_dirs + $(Q)$(CC) -c -o $@ $(CFLAGS) $< diff --git a/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch b/package/network/services/hostapd/patches/211-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch similarity index 90% rename from package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch rename to package/network/services/hostapd/patches/211-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch index 5809a3b7e8..84fdea8c78 100644 --- a/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch +++ b/package/network/services/hostapd/patches/211-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch @@ -13,7 +13,7 @@ Signed-off-by: David Bauer --- a/wpa_supplicant/ctrl_iface.c +++ b/wpa_supplicant/ctrl_iface.c -@@ -12763,7 +12763,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -13214,7 +13214,7 @@ char * wpa_supplicant_ctrl_iface_process if (wpas_ctrl_iface_coloc_intf_report(wpa_s, buf + 18)) reply_len = -1; #endif /* CONFIG_WNM */ @@ -22,7 +22,7 @@ Signed-off-by: David Bauer } else if (os_strncmp(buf, "DISASSOC_IMMINENT ", 18) == 0) { if (ap_ctrl_iface_disassoc_imminent(wpa_s, buf + 18)) reply_len = -1; -@@ -12773,7 +12773,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -13224,7 +13224,7 @@ char * wpa_supplicant_ctrl_iface_process } else if (os_strncmp(buf, "BSS_TM_REQ ", 11) == 0) { if (ap_ctrl_iface_bss_tm_req(wpa_s, buf + 11)) reply_len = -1; diff --git a/package/network/services/hostapd/patches/212-Move-definition-of-WLAN_SUPP_RATES_MAX-to-defs.h.patch b/package/network/services/hostapd/patches/212-Move-definition-of-WLAN_SUPP_RATES_MAX-to-defs.h.patch new file mode 100644 index 0000000000..4c568c924c --- /dev/null +++ b/package/network/services/hostapd/patches/212-Move-definition-of-WLAN_SUPP_RATES_MAX-to-defs.h.patch @@ -0,0 +1,56 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Eneas U de Queiroz +Date: Mon, 12 Feb 2024 14:18:24 -0300 +Subject: [PATCH] Move definition of WLAN_SUPP_RATES_MAX to defs.h + +Patch 460-wpa_supplicant-add-new-config-params-to-be-used-with.patch +("wpa_supplicant: add new config params to be used with the ibss join +command") adds the definition of unsigned char +rates[WLAN_SUPP_RATES_MAX] to driver.h, which needs to have +WLAN_SUPP_RATES_MAX defined. So it includes sta_info.h to get the +definition. + +Commit c74739250a ("AP MLD: Use a helper function to check if a STA is a +non-AP MLD") makes sta_info.h include driver.h before +it defines WLAN_SUPP_RATES_MAX, causing an error: + +src/drivers/driver.h:969:29: error: 'WLAN_SUPP_RATES_MAX' undeclared here (not in a function) + +Move the definition of WLAN_SUPP_RATES_MAX to defs.h to ensure it gets +defined before other headers are included. The inclusion of sta_info.h +in driver.h can be reverted as well. + +Signed-off-by: Eneas U de Queiroz +--- + src/ap/sta_info.h | 4 ---- + src/common/defs.h | 4 ++++ + src/drivers/driver.h | 1 - + wpa_supplicant/config_ssid.h | 1 - + 4 files changed, 4 insertions(+), 6 deletions(-) + +--- a/src/ap/sta_info.h ++++ b/src/ap/sta_info.h +@@ -49,10 +49,6 @@ + #define WLAN_STA_PENDING_DEAUTH_CB BIT(30) + #define WLAN_STA_NONERP BIT(31) + +-/* Maximum number of supported rates (from both Supported Rates and Extended +- * Supported Rates IEs). */ +-#define WLAN_SUPP_RATES_MAX 32 +- + struct hostapd_data; + + struct mbo_non_pref_chan_info { +--- a/src/common/defs.h ++++ b/src/common/defs.h +@@ -63,6 +63,10 @@ + WPA_KEY_MGMT_FT_FILS_SHA256 | \ + WPA_KEY_MGMT_FT_FILS_SHA384) + ++/* Maximum number of supported rates (from both Supported Rates and Extended ++ * Supported Rates IEs). */ ++#define WLAN_SUPP_RATES_MAX 32 ++ + static inline int wpa_key_mgmt_wpa_ieee8021x(int akm) + { + return !!(akm & (WPA_KEY_MGMT_IEEE8021X | diff --git a/package/network/services/hostapd/patches/213-wpa_supplicant-fix-warnings.patch b/package/network/services/hostapd/patches/213-wpa_supplicant-fix-warnings.patch new file mode 100644 index 0000000000..4acd7cafe2 --- /dev/null +++ b/package/network/services/hostapd/patches/213-wpa_supplicant-fix-warnings.patch @@ -0,0 +1,32 @@ +From: "Leon M. George" +Date: Wed, 11 Sep 2019 15:22:55 +0200 +Subject: [PATCH] hostapd: declare struct wpa_bss early + +wps_supplicant.h assumes that 'struct wpa_bss' is forward declared if +CONFIG_WPS is not defined. With the later inclusion of +600-ubus_support, the issue manifests in warnings like these: + +wps_supplicant.h:113:15: warning: 'struct wpa_bss' declared inside parameter list will not be visible outside of this definition or declaration + struct wpa_bss *bss) + ^~~~~~~ +This patch forward declares 'struct wpa_bss' regardless. + +--- a/wpa_supplicant/wps_supplicant.h ++++ b/wpa_supplicant/wps_supplicant.h +@@ -9,6 +9,7 @@ + #ifndef WPS_SUPPLICANT_H + #define WPS_SUPPLICANT_H + ++struct wpa_bss; + struct wpa_scan_results; + + #ifdef CONFIG_WPS +@@ -16,8 +17,6 @@ struct wpa_scan_results; + #include "wps/wps.h" + #include "wps/wps_defs.h" + +-struct wpa_bss; +- + struct wps_new_ap_settings { + const char *ssid_hex; + const char *auth; diff --git a/package/network/services/hostapd/patches/420-indicate-features.patch b/package/network/services/hostapd/patches/220-indicate-features.patch similarity index 79% rename from package/network/services/hostapd/patches/420-indicate-features.patch rename to package/network/services/hostapd/patches/220-indicate-features.patch index 07df8e5a9a..006a567c33 100644 --- a/package/network/services/hostapd/patches/420-indicate-features.patch +++ b/package/network/services/hostapd/patches/220-indicate-features.patch @@ -1,3 +1,9 @@ +From: Jo-Philipp Wich +Date: Mon, 12 Dec 2011 17:26:13 +0000 +Subject: [PATCH] hostapd: support optional argument for the -v switch of + hostapd and wpa_supplicant to query build features, e.g. hostapd -veap to + test whether 802.11i support is compiled in + --- a/hostapd/main.c +++ b/hostapd/main.c @@ -31,7 +31,7 @@ @@ -9,7 +15,7 @@ struct hapd_global { void **drv_priv; -@@ -799,7 +799,7 @@ int main(int argc, char *argv[]) +@@ -806,7 +806,7 @@ int main(int argc, char *argv[]) wpa_supplicant_event = hostapd_wpa_event; wpa_supplicant_event_global = hostapd_wpa_event_global; for (;;) { @@ -18,7 +24,7 @@ if (c < 0) break; switch (c) { -@@ -836,6 +836,8 @@ int main(int argc, char *argv[]) +@@ -843,6 +843,8 @@ int main(int argc, char *argv[]) break; #endif /* CONFIG_DEBUG_LINUX_TRACING */ case 'v': diff --git a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch b/package/network/services/hostapd/patches/250-hostapd_cli_ifdef.patch similarity index 86% rename from package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch rename to package/network/services/hostapd/patches/250-hostapd_cli_ifdef.patch index a21f0bf7ce..b6421e9d75 100644 --- a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch +++ b/package/network/services/hostapd/patches/250-hostapd_cli_ifdef.patch @@ -1,3 +1,8 @@ +From: Felix Fietkau +Date: Thu, 13 Sep 2012 12:39:14 +0000 +Subject: [PATCH] hostapd: support wps in hostapd_cli even when built from the + mini variant + --- a/hostapd/hostapd_cli.c +++ b/hostapd/hostapd_cli.c @@ -401,7 +401,6 @@ static int hostapd_cli_cmd_disassociate( @@ -32,7 +37,7 @@ static int hostapd_cli_cmd_disassoc_imminent(struct wpa_ctrl *ctrl, int argc, -@@ -1610,13 +1606,10 @@ static const struct hostapd_cli_cmd host +@@ -1670,13 +1666,10 @@ static const struct hostapd_cli_cmd host { "disassociate", hostapd_cli_cmd_disassociate, hostapd_complete_stations, " = disassociate a station" }, @@ -46,7 +51,7 @@ { "wps_pin", hostapd_cli_cmd_wps_pin, NULL, " [timeout] [addr] = add WPS Enrollee PIN" }, { "wps_check_pin", hostapd_cli_cmd_wps_check_pin, NULL, -@@ -1641,7 +1634,6 @@ static const struct hostapd_cli_cmd host +@@ -1701,7 +1694,6 @@ static const struct hostapd_cli_cmd host " = configure AP" }, { "wps_get_status", hostapd_cli_cmd_wps_get_status, NULL, "= show current WPS status" }, diff --git a/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch b/package/network/services/hostapd/patches/251-wpa_cli_ifdef.patch similarity index 71% rename from package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch rename to package/network/services/hostapd/patches/251-wpa_cli_ifdef.patch index 65c31c567f..d7f967d779 100644 --- a/package/network/services/hostapd/patches/431-wpa_cli_ifdef.patch +++ b/package/network/services/hostapd/patches/251-wpa_cli_ifdef.patch @@ -1,3 +1,7 @@ +From: Felix Fietkau +Date: Mon, 2 Dec 2013 13:07:46 +0000 +Subject: [PATCH] hostapd: always include p2p options in wpa_cli + --- a/wpa_supplicant/wpa_cli.c +++ b/wpa_supplicant/wpa_cli.c @@ -26,6 +26,15 @@ diff --git a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch b/package/network/services/hostapd/patches/252-disable_ctrl_iface_mib.patch similarity index 82% rename from package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch rename to package/network/services/hostapd/patches/252-disable_ctrl_iface_mib.patch index f7720fce2f..c65b2b181e 100644 --- a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch +++ b/package/network/services/hostapd/patches/252-disable_ctrl_iface_mib.patch @@ -1,3 +1,7 @@ +From: Felix Fietkau +Date: Fri, 18 Mar 2011 02:15:52 +0000 +Subject: [PATCH] Remove some unnecessary control interface functionality + --- a/hostapd/Makefile +++ b/hostapd/Makefile @@ -221,6 +221,9 @@ endif @@ -12,7 +16,7 @@ else --- a/hostapd/ctrl_iface.c +++ b/hostapd/ctrl_iface.c -@@ -3314,6 +3314,7 @@ static int hostapd_ctrl_iface_receive_pr +@@ -3897,6 +3897,7 @@ static int hostapd_ctrl_iface_receive_pr reply_size); } else if (os_strcmp(buf, "STATUS-DRIVER") == 0) { reply_len = hostapd_drv_status(hapd, reply, reply_size); @@ -20,7 +24,7 @@ } else if (os_strcmp(buf, "MIB") == 0) { reply_len = ieee802_11_get_mib(hapd, reply, reply_size); if (reply_len >= 0) { -@@ -3355,6 +3356,7 @@ static int hostapd_ctrl_iface_receive_pr +@@ -3938,6 +3939,7 @@ static int hostapd_ctrl_iface_receive_pr } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { reply_len = hostapd_ctrl_iface_sta_next(hapd, buf + 9, reply, reply_size); @@ -28,69 +32,6 @@ } else if (os_strcmp(buf, "ATTACH") == 0) { if (hostapd_ctrl_iface_attach(hapd, from, fromlen, NULL)) reply_len = -1; ---- a/wpa_supplicant/Makefile -+++ b/wpa_supplicant/Makefile -@@ -983,6 +983,9 @@ ifdef CONFIG_FILS - OBJS += ../src/ap/fils_hlp.o - endif - ifdef CONFIG_CTRL_IFACE -+ifdef CONFIG_CTRL_IFACE_MIB -+CFLAGS += -DCONFIG_CTRL_IFACE_MIB -+endif - OBJS += ../src/ap/ctrl_iface_ap.o - endif - ---- a/wpa_supplicant/ctrl_iface.c -+++ b/wpa_supplicant/ctrl_iface.c -@@ -2326,7 +2326,7 @@ static int wpa_supplicant_ctrl_iface_sta - pos += ret; - } - --#ifdef CONFIG_AP -+#if defined(CONFIG_AP) && defined(CONFIG_CTRL_IFACE_MIB) - if (wpa_s->ap_iface) { - pos += ap_ctrl_iface_wpa_get_status(wpa_s, pos, - end - pos, -@@ -12087,6 +12087,7 @@ char * wpa_supplicant_ctrl_iface_process - reply_len = -1; - } else if (os_strncmp(buf, "NOTE ", 5) == 0) { - wpa_printf(MSG_INFO, "NOTE: %s", buf + 5); -+#ifdef CONFIG_CTRL_IFACE_MIB - } else if (os_strcmp(buf, "MIB") == 0) { - reply_len = wpa_sm_get_mib(wpa_s->wpa, reply, reply_size); - if (reply_len >= 0) { -@@ -12099,6 +12100,7 @@ char * wpa_supplicant_ctrl_iface_process - reply_size - reply_len); - #endif /* CONFIG_MACSEC */ - } -+#endif - } else if (os_strncmp(buf, "STATUS", 6) == 0) { - reply_len = wpa_supplicant_ctrl_iface_status( - wpa_s, buf + 6, reply, reply_size); -@@ -12587,6 +12589,7 @@ char * wpa_supplicant_ctrl_iface_process - reply_len = wpa_supplicant_ctrl_iface_bss( - wpa_s, buf + 4, reply, reply_size); - #ifdef CONFIG_AP -+#ifdef CONFIG_CTRL_IFACE_MIB - } else if (os_strcmp(buf, "STA-FIRST") == 0) { - reply_len = ap_ctrl_iface_sta_first(wpa_s, reply, reply_size); - } else if (os_strncmp(buf, "STA ", 4) == 0) { -@@ -12595,12 +12598,15 @@ char * wpa_supplicant_ctrl_iface_process - } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { - reply_len = ap_ctrl_iface_sta_next(wpa_s, buf + 9, reply, - reply_size); -+#endif -+#ifdef CONFIG_CTRL_IFACE_MIB - } else if (os_strncmp(buf, "DEAUTHENTICATE ", 15) == 0) { - if (ap_ctrl_iface_sta_deauthenticate(wpa_s, buf + 15)) - reply_len = -1; - } else if (os_strncmp(buf, "DISASSOCIATE ", 13) == 0) { - if (ap_ctrl_iface_sta_disassociate(wpa_s, buf + 13)) - reply_len = -1; -+#endif - } else if (os_strncmp(buf, "CHAN_SWITCH ", 12) == 0) { - if (ap_ctrl_iface_chanswitch(wpa_s, buf + 12)) - reply_len = -1; --- a/src/ap/ctrl_iface_ap.c +++ b/src/ap/ctrl_iface_ap.c @@ -26,6 +26,26 @@ @@ -147,7 +88,7 @@ static int hostapd_ctrl_iface_sta_mib(struct hostapd_data *hapd, struct sta_info *sta, char *buf, size_t buflen) -@@ -493,6 +493,7 @@ int hostapd_ctrl_iface_sta_next(struct h +@@ -539,6 +539,7 @@ int hostapd_ctrl_iface_sta_next(struct h return hostapd_ctrl_iface_sta_mib(hapd, sta->next, buf, buflen); } @@ -155,7 +96,7 @@ #ifdef CONFIG_P2P_MANAGER static int p2p_manager_disconnect(struct hostapd_data *hapd, u16 stype, -@@ -884,12 +885,12 @@ int hostapd_ctrl_iface_status(struct hos +@@ -951,12 +952,12 @@ int hostapd_ctrl_iface_status(struct hos return len; len += ret; } @@ -172,7 +113,7 @@ if (os_snprintf_error(buflen - len, ret)) --- a/src/ap/ieee802_1x.c +++ b/src/ap/ieee802_1x.c -@@ -2834,6 +2834,7 @@ static const char * bool_txt(bool val) +@@ -2837,6 +2837,7 @@ static const char * bool_txt(bool val) return val ? "TRUE" : "FALSE"; } @@ -180,7 +121,7 @@ int ieee802_1x_get_mib(struct hostapd_data *hapd, char *buf, size_t buflen) { -@@ -3020,6 +3021,7 @@ int ieee802_1x_get_mib_sta(struct hostap +@@ -3023,6 +3024,7 @@ int ieee802_1x_get_mib_sta(struct hostap return len; } @@ -190,7 +131,7 @@ static void ieee802_1x_wnm_notif_send(void *eloop_ctx, void *timeout_ctx) --- a/src/ap/wpa_auth.c +++ b/src/ap/wpa_auth.c -@@ -5328,6 +5328,7 @@ static const char * wpa_bool_txt(int val +@@ -5583,6 +5583,7 @@ static const char * wpa_bool_txt(int val return val ? "TRUE" : "FALSE"; } @@ -198,7 +139,7 @@ #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ -@@ -5480,7 +5481,7 @@ int wpa_get_mib_sta(struct wpa_state_mac +@@ -5735,7 +5736,7 @@ int wpa_get_mib_sta(struct wpa_state_mac return len; } @@ -209,7 +150,7 @@ { --- a/src/rsn_supp/wpa.c +++ b/src/rsn_supp/wpa.c -@@ -3834,6 +3834,8 @@ static u32 wpa_key_mgmt_suite(struct wpa +@@ -3943,6 +3943,8 @@ static u32 wpa_key_mgmt_suite(struct wpa } @@ -218,7 +159,7 @@ #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ ((s) >> 24) & 0xff, ((s) >> 16) & 0xff, ((s) >> 8) & 0xff, (s) & 0xff -@@ -3915,6 +3917,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch +@@ -4024,6 +4026,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch return (int) len; } @@ -226,9 +167,21 @@ #endif /* CONFIG_CTRL_IFACE */ +--- a/wpa_supplicant/Makefile ++++ b/wpa_supplicant/Makefile +@@ -1038,6 +1038,9 @@ ifdef CONFIG_FILS + OBJS += ../src/ap/fils_hlp.o + endif + ifdef CONFIG_CTRL_IFACE ++ifdef CONFIG_CTRL_IFACE_MIB ++CFLAGS += -DCONFIG_CTRL_IFACE_MIB ++endif + OBJS += ../src/ap/ctrl_iface_ap.o + endif + --- a/wpa_supplicant/ap.c +++ b/wpa_supplicant/ap.c -@@ -1499,7 +1499,7 @@ int wpas_ap_wps_nfc_report_handover(stru +@@ -1520,7 +1520,7 @@ int wpas_ap_wps_nfc_report_handover(stru #endif /* CONFIG_WPS */ @@ -237,3 +190,54 @@ int ap_ctrl_iface_sta_first(struct wpa_supplicant *wpa_s, char *buf, size_t buflen) +--- a/wpa_supplicant/ctrl_iface.c ++++ b/wpa_supplicant/ctrl_iface.c +@@ -2355,7 +2355,7 @@ static int wpa_supplicant_ctrl_iface_sta + pos += ret; + } + +-#ifdef CONFIG_AP ++#if defined(CONFIG_AP) && defined(CONFIG_CTRL_IFACE_MIB) + if (wpa_s->ap_iface) { + pos += ap_ctrl_iface_wpa_get_status(wpa_s, pos, + end - pos, +@@ -12542,6 +12542,7 @@ char * wpa_supplicant_ctrl_iface_process + reply_len = -1; + } else if (os_strncmp(buf, "NOTE ", 5) == 0) { + wpa_printf(MSG_INFO, "NOTE: %s", buf + 5); ++#ifdef CONFIG_CTRL_IFACE_MIB + } else if (os_strcmp(buf, "MIB") == 0) { + reply_len = wpa_sm_get_mib(wpa_s->wpa, reply, reply_size); + if (reply_len >= 0) { +@@ -12554,6 +12555,7 @@ char * wpa_supplicant_ctrl_iface_process + reply_size - reply_len); + #endif /* CONFIG_MACSEC */ + } ++#endif + } else if (os_strncmp(buf, "STATUS", 6) == 0) { + reply_len = wpa_supplicant_ctrl_iface_status( + wpa_s, buf + 6, reply, reply_size); +@@ -13042,6 +13044,7 @@ char * wpa_supplicant_ctrl_iface_process + reply_len = wpa_supplicant_ctrl_iface_bss( + wpa_s, buf + 4, reply, reply_size); + #ifdef CONFIG_AP ++#ifdef CONFIG_CTRL_IFACE_MIB + } else if (os_strcmp(buf, "STA-FIRST") == 0) { + reply_len = ap_ctrl_iface_sta_first(wpa_s, reply, reply_size); + } else if (os_strncmp(buf, "STA ", 4) == 0) { +@@ -13050,12 +13053,15 @@ char * wpa_supplicant_ctrl_iface_process + } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { + reply_len = ap_ctrl_iface_sta_next(wpa_s, buf + 9, reply, + reply_size); ++#endif ++#ifdef CONFIG_CTRL_IFACE_MIB + } else if (os_strncmp(buf, "DEAUTHENTICATE ", 15) == 0) { + if (ap_ctrl_iface_sta_deauthenticate(wpa_s, buf + 15)) + reply_len = -1; + } else if (os_strncmp(buf, "DISASSOCIATE ", 13) == 0) { + if (ap_ctrl_iface_sta_disassociate(wpa_s, buf + 13)) + reply_len = -1; ++#endif + } else if (os_strncmp(buf, "CHAN_SWITCH ", 12) == 0) { + if (ap_ctrl_iface_chanswitch(wpa_s, buf + 12)) + reply_len = -1; diff --git a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch b/package/network/services/hostapd/patches/253-qos_map_set_without_interworking.patch similarity index 75% rename from package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch rename to package/network/services/hostapd/patches/253-qos_map_set_without_interworking.patch index 97c32df704..4072ff5664 100644 --- a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch +++ b/package/network/services/hostapd/patches/253-qos_map_set_without_interworking.patch @@ -1,6 +1,12 @@ +From: Felix Fietkau +Date: Thu, 4 Nov 2021 11:45:18 +0100 +Subject: [PATCH] hostapd: support qos_map_set without CONFIG_INTERWORKING + +This feature is useful on its own even without full interworking support + --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -1604,6 +1604,8 @@ static int parse_anqp_elem(struct hostap +@@ -1680,6 +1680,8 @@ static int parse_anqp_elem(struct hostap return 0; } @@ -9,7 +15,7 @@ static int parse_qos_map_set(struct hostapd_bss_config *bss, char *buf, int line) -@@ -1645,8 +1647,6 @@ static int parse_qos_map_set(struct host +@@ -1721,8 +1723,6 @@ static int parse_qos_map_set(struct host return 0; } @@ -18,7 +24,7 @@ #ifdef CONFIG_HS20 static int hs20_parse_conn_capab(struct hostapd_bss_config *bss, char *buf, -@@ -4062,10 +4062,10 @@ static int hostapd_config_fill(struct ho +@@ -4260,10 +4260,10 @@ static int hostapd_config_fill(struct ho bss->gas_frag_limit = val; } else if (os_strcmp(buf, "gas_comeback_delay") == 0) { bss->gas_comeback_delay = atoi(pos); @@ -32,7 +38,7 @@ os_free(bss->dump_msk_file); --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -1486,6 +1486,7 @@ int hostapd_setup_bss(struct hostapd_dat +@@ -1548,6 +1548,7 @@ static int hostapd_setup_bss(struct host wpa_printf(MSG_ERROR, "GAS server initialization failed"); return -1; } @@ -40,7 +46,7 @@ if (conf->qos_map_set_len && hostapd_drv_set_qos_map(hapd, conf->qos_map_set, -@@ -1493,7 +1494,6 @@ int hostapd_setup_bss(struct hostapd_dat +@@ -1555,7 +1556,6 @@ static int hostapd_setup_bss(struct host wpa_printf(MSG_ERROR, "Failed to initialize QoS Map"); return -1; } @@ -48,40 +54,9 @@ if (conf->bss_load_update_period && bss_load_update_init(hapd)) { wpa_printf(MSG_ERROR, "BSS Load initialization failed"); ---- a/wpa_supplicant/events.c -+++ b/wpa_supplicant/events.c -@@ -2683,8 +2683,6 @@ void wnm_bss_keep_alive_deinit(struct wp - } - - --#ifdef CONFIG_INTERWORKING -- - static int wpas_qos_map_set(struct wpa_supplicant *wpa_s, const u8 *qos_map, - size_t len) - { -@@ -2717,8 +2715,6 @@ static void interworking_process_assoc_r - } - } - --#endif /* CONFIG_INTERWORKING */ -- - - static void wpa_supplicant_set_4addr_mode(struct wpa_supplicant *wpa_s) - { -@@ -3098,10 +3094,8 @@ static int wpa_supplicant_event_associnf - wnm_process_assoc_resp(wpa_s, data->assoc_info.resp_ies, - data->assoc_info.resp_ies_len); - #endif /* CONFIG_WNM */ --#ifdef CONFIG_INTERWORKING - interworking_process_assoc_resp(wpa_s, data->assoc_info.resp_ies, - data->assoc_info.resp_ies_len); --#endif /* CONFIG_INTERWORKING */ - if (wpa_s->hw_capab == CAPAB_VHT && - get_ie(data->assoc_info.resp_ies, - data->assoc_info.resp_ies_len, WLAN_EID_VHT_CAP)) --- a/src/ap/ieee802_11_shared.c +++ b/src/ap/ieee802_11_shared.c -@@ -1116,13 +1116,11 @@ u8 * hostapd_eid_rsnxe(struct hostapd_da +@@ -1138,13 +1138,11 @@ u8 * hostapd_eid_rsnxe(struct hostapd_da u16 check_ext_capab(struct hostapd_data *hapd, struct sta_info *sta, const u8 *ext_capab_ie, size_t ext_capab_ie_len) { @@ -95,3 +70,34 @@ if (ext_capab_ie_len > 0) { sta->ecsa_supported = !!(ext_capab_ie[0] & BIT(2)); +--- a/wpa_supplicant/events.c ++++ b/wpa_supplicant/events.c +@@ -2935,8 +2935,6 @@ void wnm_bss_keep_alive_deinit(struct wp + } + + +-#ifdef CONFIG_INTERWORKING +- + static int wpas_qos_map_set(struct wpa_supplicant *wpa_s, const u8 *qos_map, + size_t len) + { +@@ -2969,8 +2967,6 @@ static void interworking_process_assoc_r + } + } + +-#endif /* CONFIG_INTERWORKING */ +- + + static void wpa_supplicant_set_4addr_mode(struct wpa_supplicant *wpa_s) + { +@@ -3350,10 +3346,8 @@ static int wpa_supplicant_event_associnf + wnm_process_assoc_resp(wpa_s, data->assoc_info.resp_ies, + data->assoc_info.resp_ies_len); + #endif /* CONFIG_WNM */ +-#ifdef CONFIG_INTERWORKING + interworking_process_assoc_resp(wpa_s, data->assoc_info.resp_ies, + data->assoc_info.resp_ies_len); +-#endif /* CONFIG_INTERWORKING */ + if (wpa_s->hw_capab == CAPAB_VHT && + get_ie(data->assoc_info.resp_ies, + data->assoc_info.resp_ies_len, WLAN_EID_VHT_CAP)) diff --git a/package/network/services/hostapd/patches/300-noscan.patch b/package/network/services/hostapd/patches/300-noscan.patch index 3b5f4325de..9b3f401b03 100644 --- a/package/network/services/hostapd/patches/300-noscan.patch +++ b/package/network/services/hostapd/patches/300-noscan.patch @@ -1,6 +1,11 @@ +From c61daab867671af884a7bb707f9bc0f086241bcd Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Wed, 20 Jan 2010 02:26:00 +0000 +Subject: [PATCH] Add noscan, no_ht_coex config options + --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3448,6 +3448,10 @@ static int hostapd_config_fill(struct ho +@@ -3656,6 +3656,10 @@ static int hostapd_config_fill(struct ho if (bss->ocv && !bss->ieee80211w) bss->ieee80211w = 1; #endif /* CONFIG_OCV */ @@ -13,7 +18,7 @@ } else if (os_strcmp(buf, "ht_capab") == 0) { --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h -@@ -1075,6 +1075,8 @@ struct hostapd_config { +@@ -1093,6 +1093,8 @@ struct hostapd_config { int ht_op_mode_fixed; u16 ht_capab; @@ -24,7 +29,7 @@ int no_pri_sec_switch; --- a/src/ap/hw_features.c +++ b/src/ap/hw_features.c -@@ -546,7 +546,8 @@ static int ieee80211n_check_40mhz(struct +@@ -544,7 +544,8 @@ static int ieee80211n_check_40mhz(struct int ret; /* Check that HT40 is used and PRI / SEC switch is allowed */ diff --git a/package/network/services/hostapd/patches/301-mesh-noscan.patch b/package/network/services/hostapd/patches/301-mesh-noscan.patch index ceb6d0c161..64a2eed30e 100644 --- a/package/network/services/hostapd/patches/301-mesh-noscan.patch +++ b/package/network/services/hostapd/patches/301-mesh-noscan.patch @@ -1,6 +1,11 @@ +From: Daniel Golle +Date: Fri, 20 Apr 2018 07:41:03 +0200 +Subject: [PATCH] Allow HT40 also on 2.4GHz if noscan option is set, which also + skips secondary channel scan just like noscan works in AP mode. + --- a/wpa_supplicant/config.c +++ b/wpa_supplicant/config.c -@@ -2600,6 +2600,7 @@ static const struct parse_data ssid_fiel +@@ -2639,6 +2639,7 @@ static const struct parse_data ssid_fiel #else /* CONFIG_MESH */ { INT_RANGE(mode, 0, 4) }, #endif /* CONFIG_MESH */ @@ -18,6 +23,17 @@ INT(mesh_fwding); INT(frequency); INT(enable_edmg); +--- a/wpa_supplicant/config_ssid.h ++++ b/wpa_supplicant/config_ssid.h +@@ -1035,6 +1035,8 @@ struct wpa_ssid { + */ + int no_auto_peer; + ++ int noscan; ++ + /** + * mesh_rssi_threshold - Set mesh parameter mesh_rssi_threshold (dBm) + * --- a/wpa_supplicant/mesh.c +++ b/wpa_supplicant/mesh.c @@ -506,6 +506,8 @@ static int wpa_supplicant_mesh_init(stru @@ -31,7 +47,7 @@ /* --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -2710,7 +2710,7 @@ static bool ibss_mesh_can_use_vht(struct +@@ -2770,7 +2770,7 @@ static bool ibss_mesh_can_use_vht(struct const struct wpa_ssid *ssid, struct hostapd_hw_modes *mode) { @@ -40,25 +56,25 @@ return false; if (!drv_supports_vht(wpa_s, ssid)) -@@ -2783,7 +2783,7 @@ static void ibss_mesh_select_40mhz(struc +@@ -2843,7 +2843,7 @@ static void ibss_mesh_select_40mhz(struc int i, res; unsigned int j; static const int ht40plus[] = { -- 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, 165, 173, -+ 1, 2, 3, 4, 5, 6, 7, 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, 165, 173, - 184, 192 +- 36, 44, 52, 60, 100, 108, 116, 124, 132, 140, ++ 1, 2, 3, 4, 5, 6, 7, 36, 44, 52, 60, 100, 108, 116, 124, 132, 140, + 149, 157, 165, 173, 184, 192 }; int ht40 = -1; -@@ -3033,7 +3033,7 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3093,7 +3093,7 @@ void ibss_mesh_setup_freq(struct wpa_sup int ieee80211_mode = wpas_mode_to_ieee80211_mode(ssid->mode); enum hostapd_hw_mode hw_mode; struct hostapd_hw_modes *mode = NULL; - int i, obss_scan = 1; + int i, obss_scan = !(ssid->noscan); u8 channel; - bool is_6ghz; + bool is_6ghz, is_24ghz; bool dfs_enabled = wpa_s->conf->country[0] && (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR); -@@ -3080,6 +3080,8 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3143,6 +3143,8 @@ void ibss_mesh_setup_freq(struct wpa_sup freq->he_enabled = ibss_mesh_can_use_he(wpa_s, ssid, mode, ieee80211_mode); freq->channel = channel; @@ -67,14 +83,3 @@ /* Setup higher BW only for 5 GHz */ if (mode->mode == HOSTAPD_MODE_IEEE80211A) { ibss_mesh_select_40mhz(wpa_s, ssid, mode, freq, obss_scan, dfs_enabled); ---- a/wpa_supplicant/config_ssid.h -+++ b/wpa_supplicant/config_ssid.h -@@ -1035,6 +1035,8 @@ struct wpa_ssid { - */ - int no_auto_peer; - -+ int noscan; -+ - /** - * mesh_rssi_threshold - Set mesh parameter mesh_rssi_threshold (dBm) - * diff --git a/package/network/services/hostapd/patches/310-rescan_immediately.patch b/package/network/services/hostapd/patches/310-rescan_immediately.patch index 6e0244bca2..57e13dec8b 100644 --- a/package/network/services/hostapd/patches/310-rescan_immediately.patch +++ b/package/network/services/hostapd/patches/310-rescan_immediately.patch @@ -1,6 +1,11 @@ +From 64268c716596edbad395cfa82ff30eb84a2f8488 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Sat, 23 Jan 2010 08:28:26 +0000 +Subject: [PATCH] rescan_immediately.patch + --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -5769,7 +5769,7 @@ wpa_supplicant_alloc(struct wpa_supplica +@@ -5870,7 +5870,7 @@ wpa_supplicant_alloc(struct wpa_supplica if (wpa_s == NULL) return NULL; wpa_s->scan_req = INITIAL_SCAN_REQ; diff --git a/package/network/services/hostapd/patches/320-optional_rfkill.patch b/package/network/services/hostapd/patches/320-optional_rfkill.patch index 01537790e0..dd6fa1d053 100644 --- a/package/network/services/hostapd/patches/320-optional_rfkill.patch +++ b/package/network/services/hostapd/patches/320-optional_rfkill.patch @@ -1,3 +1,7 @@ +From: Felix Fietkau +Date: Thu, 8 Jul 2010 18:36:22 +0000 +Subject: [PATCH] hostapd: make rfkill support optional + --- a/src/drivers/drivers.mak +++ b/src/drivers/drivers.mak @@ -54,7 +54,6 @@ NEED_SME=y diff --git a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch index c11c957216..70ec6dc63b 100644 --- a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch +++ b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch @@ -1,6 +1,11 @@ +From ee68734929edb30f90a95bc3150038333b345476 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Sun, 30 Jun 2013 21:01:13 +0000 +Subject: [PATCH] nl80211_fix_set_freq.patch + --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -5407,7 +5407,7 @@ static int nl80211_set_channel(struct i8 +@@ -5483,7 +5483,7 @@ static int nl80211_set_channel(struct i8 freq->he_enabled, freq->eht_enabled, freq->bandwidth, freq->center_freq1, freq->center_freq2); diff --git a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch b/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch index 8784452876..4a5852af2e 100644 --- a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch +++ b/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch @@ -1,6 +1,11 @@ +From: Felix Fietkau +Date: Mon, 28 Jan 2019 21:36:44 +0100 +Subject: [PATCH] wpa_supplicant: fix calling channel switch via wpa_cli on + mesh interfaces + --- a/wpa_supplicant/ap.c +++ b/wpa_supplicant/ap.c -@@ -1825,15 +1825,35 @@ int ap_switch_channel(struct wpa_supplic +@@ -1846,17 +1846,37 @@ int ap_switch_channel(struct wpa_supplic #ifdef CONFIG_CTRL_IFACE @@ -24,15 +29,19 @@ struct csa_settings settings; int ret = hostapd_parse_csa_settings(pos, &settings); +- if (ret) +- return ret; + if (!(wpa_s->ap_iface && wpa_s->ap_iface->bss[0]) && + !(wpa_s->ifmsh && wpa_s->ifmsh->bss[0])) + return -1; -+ -+ ret = __ap_ctrl_iface_chanswitch(wpa_s->ap_iface, &settings); - if (ret) - return ret; + + settings.link_id = -1; - return ap_switch_channel(wpa_s, &settings); ++ ret = __ap_ctrl_iface_chanswitch(wpa_s->ap_iface, &settings); ++ if (ret) ++ return ret; ++ + return __ap_ctrl_iface_chanswitch(wpa_s->ifmsh, &settings); } #endif /* CONFIG_CTRL_IFACE */ diff --git a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch index 647ca2cbf9..5ad4d6387f 100644 --- a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch +++ b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch @@ -1,6 +1,10 @@ +From: Felix Fietkau +Date: Sat, 23 Oct 2010 23:39:54 +0000 +Subject: [PATCH] nl80211_del_beacon_bss.patch + --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -3008,12 +3008,12 @@ static int wpa_driver_nl80211_del_beacon +@@ -3075,12 +3075,12 @@ static int wpa_driver_nl80211_del_beacon return 0; wpa_printf(MSG_DEBUG, "nl80211: Remove beacon (ifindex=%d)", @@ -15,16 +19,17 @@ if (!msg) return -ENOBUFS; -@@ -6100,7 +6100,7 @@ static void nl80211_teardown_ap(struct i +@@ -6176,8 +6176,7 @@ static void nl80211_teardown_ap(struct i nl80211_mgmt_unsubscribe(bss, "AP teardown"); nl80211_put_wiphy_data_ap(bss); -- bss->flink->beacon_set = 0; +- if (bss->flink) +- bss->flink->beacon_set = 0; + wpa_driver_nl80211_del_beacon_all(bss); } -@@ -8859,8 +8859,6 @@ static int wpa_driver_nl80211_if_remove( +@@ -8977,8 +8976,6 @@ static int wpa_driver_nl80211_if_remove( } else { wpa_printf(MSG_DEBUG, "nl80211: First BSS - reassign context"); nl80211_teardown_ap(bss); diff --git a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch b/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch index e9083f6ecc..e68edacb44 100644 --- a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch +++ b/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch @@ -1,6 +1,17 @@ +From: Denton Gentry +Date: Wed, 30 May 2018 15:05:42 +0000 +Subject: [PATCH] hostapd: make cli treat UNKNOWN COMMAND as failing + +Avoid infinite loop at 100% CPU when running hostapd_cli +if CONFIG_CTRL_IFACE_MIB is not defined. + + _newselect(4, [3], NULL, NULL, ...) + recvfrom(3, "UNKNOWN COMMAND\n", 4095, 0, NULL, NULL) = 16 + sendto(3, "STA-NEXT UNKNOWN COMMAND", 24, 0, NULL, 0) = 24 + --- a/hostapd/hostapd_cli.c +++ b/hostapd/hostapd_cli.c -@@ -757,7 +757,7 @@ static int wpa_ctrl_command_sta(struct w +@@ -753,7 +753,7 @@ static int wpa_ctrl_command_sta(struct w } buf[len] = '\0'; diff --git a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch b/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch deleted file mode 100644 index 4592c34127..0000000000 --- a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch +++ /dev/null @@ -1,56 +0,0 @@ ---- a/src/common/wpa_common.c -+++ b/src/common/wpa_common.c -@@ -2841,6 +2841,31 @@ u32 wpa_akm_to_suite(int akm) - } - - -+static void wpa_fixup_wpa_ie_rsn(u8 *assoc_ie, const u8 *wpa_msg_ie, -+ size_t rsn_ie_len) -+{ -+ int pos, count; -+ -+ pos = sizeof(struct rsn_ie_hdr) + RSN_SELECTOR_LEN; -+ if (rsn_ie_len < pos + 2) -+ return; -+ -+ count = WPA_GET_LE16(wpa_msg_ie + pos); -+ pos += 2 + count * RSN_SELECTOR_LEN; -+ if (rsn_ie_len < pos + 2) -+ return; -+ -+ count = WPA_GET_LE16(wpa_msg_ie + pos); -+ pos += 2 + count * RSN_SELECTOR_LEN; -+ if (rsn_ie_len < pos + 2) -+ return; -+ -+ if (!assoc_ie[pos] && !assoc_ie[pos + 1] && -+ (wpa_msg_ie[pos] || wpa_msg_ie[pos + 1])) -+ memcpy(&assoc_ie[pos], &wpa_msg_ie[pos], 2); -+} -+ -+ - int wpa_compare_rsn_ie(int ft_initial_assoc, - const u8 *ie1, size_t ie1len, - const u8 *ie2, size_t ie2len) -@@ -2848,8 +2873,19 @@ int wpa_compare_rsn_ie(int ft_initial_as - if (ie1 == NULL || ie2 == NULL) - return -1; - -- if (ie1len == ie2len && os_memcmp(ie1, ie2, ie1len) == 0) -- return 0; /* identical IEs */ -+ if (ie1len == ie2len) { -+ u8 *ie_tmp; -+ -+ if (os_memcmp(ie1, ie2, ie1len) == 0) -+ return 0; /* identical IEs */ -+ -+ ie_tmp = alloca(ie1len); -+ memcpy(ie_tmp, ie1, ie1len); -+ wpa_fixup_wpa_ie_rsn(ie_tmp, ie2, ie1len); -+ -+ if (os_memcmp(ie_tmp, ie2, ie1len) == 0) -+ return 0; /* only mismatch in RSN capabilties */ -+ } - - #ifdef CONFIG_IEEE80211R - if (ft_initial_assoc) { diff --git a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch b/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch index edcd985257..65452a7c40 100644 --- a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch +++ b/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch @@ -1,3 +1,10 @@ +From: Felix Fietkau +Date: Sat, 9 Jul 2011 07:19:55 +0000 +Subject: [PATCH] hostapd: only advertise a single encryption type via WPS if + multiple are supported + +Fixes windows 7 interop issues + --- a/src/ap/wps_hostapd.c +++ b/src/ap/wps_hostapd.c @@ -394,9 +394,8 @@ static int hapd_wps_reconfig_in_memory(s diff --git a/package/network/services/hostapd/patches/410-limit_debug_messages.patch b/package/network/services/hostapd/patches/410-limit_debug_messages.patch index 48a5589200..58dd415f09 100644 --- a/package/network/services/hostapd/patches/410-limit_debug_messages.patch +++ b/package/network/services/hostapd/patches/410-limit_debug_messages.patch @@ -1,3 +1,8 @@ +From: Felix Fietkau +Date: Mon, 20 Feb 2012 23:41:52 +0000 +Subject: [PATCH] hostapd: add configurable debug message minimum priority to + cut down on bloat generated by excessive debug messages + --- a/src/utils/wpa_debug.c +++ b/src/utils/wpa_debug.c @@ -206,7 +206,7 @@ void wpa_debug_close_linux_tracing(void) diff --git a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch index dc19553e26..ac1c9280b7 100644 --- a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch +++ b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch @@ -14,15 +14,7 @@ Signed-hostap: Antonio Quartulli --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -19,6 +19,7 @@ - - #define WPA_SUPPLICANT_DRIVER_VERSION 4 - -+#include "ap/sta_info.h" - #include "common/defs.h" - #include "common/ieee802_11_defs.h" - #include "common/wpa_common.h" -@@ -953,6 +954,9 @@ struct wpa_driver_associate_params { +@@ -971,6 +971,9 @@ struct wpa_driver_associate_params { * responsible for selecting with which BSS to associate. */ const u8 *bssid; @@ -42,7 +34,7 @@ Signed-hostap: Antonio Quartulli #include "config.h" -@@ -2389,6 +2390,97 @@ static char * wpa_config_write_mac_value +@@ -2421,6 +2422,97 @@ static char * wpa_config_write_mac_value #endif /* NO_CONFIG_WRITE */ @@ -140,7 +132,7 @@ Signed-hostap: Antonio Quartulli /* Helper macros for network block parser */ #ifdef OFFSET -@@ -2674,6 +2766,8 @@ static const struct parse_data ssid_fiel +@@ -2713,6 +2805,8 @@ static const struct parse_data ssid_fiel { INT(ap_max_inactivity) }, { INT(dtim_period) }, { INT(beacon_int) }, @@ -151,18 +143,7 @@ Signed-hostap: Antonio Quartulli { INT_RANGE(macsec_integ_only, 0, 1) }, --- a/wpa_supplicant/config_ssid.h +++ b/wpa_supplicant/config_ssid.h -@@ -10,8 +10,10 @@ - #define CONFIG_SSID_H - - #include "common/defs.h" -+#include "ap/sta_info.h" - #include "utils/list.h" - #include "eap_peer/eap_config.h" -+#include "drivers/nl80211_copy.h" - - - #define DEFAULT_EAP_WORKAROUND ((unsigned int) -1) -@@ -879,6 +881,9 @@ struct wpa_ssid { +@@ -879,6 +879,9 @@ struct wpa_ssid { */ void *parent_cred; @@ -174,7 +155,7 @@ Signed-hostap: Antonio Quartulli * macsec_policy - Determines the policy for MACsec secure session --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -4177,6 +4177,12 @@ static void wpas_start_assoc_cb(struct w +@@ -4249,6 +4249,12 @@ static void wpas_start_assoc_cb(struct w params.beacon_int = ssid->beacon_int; else params.beacon_int = wpa_s->conf->beacon_int; diff --git a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch index daa36c2f35..c24ca46e96 100644 --- a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch +++ b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch @@ -19,7 +19,7 @@ Tested-by: Simon Wunderlich --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -1827,6 +1827,7 @@ struct wpa_driver_mesh_join_params { +@@ -1876,6 +1876,7 @@ struct wpa_driver_mesh_join_params { #define WPA_DRIVER_MESH_FLAG_AMPE 0x00000008 unsigned int flags; bool handle_dfs; @@ -29,7 +29,7 @@ Tested-by: Simon Wunderlich struct wpa_driver_set_key_params { --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -11667,6 +11667,18 @@ static int nl80211_put_mesh_id(struct nl +@@ -11850,6 +11850,18 @@ static int nl80211_put_mesh_id(struct nl } @@ -48,7 +48,7 @@ Tested-by: Simon Wunderlich static int nl80211_put_mesh_config(struct nl_msg *msg, struct wpa_driver_mesh_bss_params *params) { -@@ -11728,6 +11740,7 @@ static int nl80211_join_mesh(struct i802 +@@ -11911,6 +11923,7 @@ static int nl80211_join_mesh(struct i802 nl80211_put_basic_rates(msg, params->basic_rates) || nl80211_put_mesh_id(msg, params->meshid, params->meshid_len) || nl80211_put_beacon_int(msg, params->beacon_int) || diff --git a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch index 4d7d85f4ab..664f27bd63 100644 --- a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch +++ b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch @@ -1,6 +1,11 @@ +From: Felix Fietkau +Date: Tue, 14 Nov 2017 12:38:08 +0100 +Subject: [PATCH] Fix issues with disabling obss scan when using fixed_freq on + mesh + --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -3040,6 +3040,10 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -3100,6 +3100,10 @@ void ibss_mesh_setup_freq(struct wpa_sup freq->freq = ssid->frequency; diff --git a/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch b/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch index 7d3d94648e..8da7a2948e 100644 --- a/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch +++ b/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch @@ -13,7 +13,7 @@ Signed-off-by: David Bauer --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3500,6 +3500,8 @@ static int hostapd_config_fill(struct ho +@@ -3708,6 +3708,8 @@ static int hostapd_config_fill(struct ho } else if (os_strcmp(buf, "he_bss_color") == 0) { conf->he_op.he_bss_color = atoi(pos) & 0x3f; conf->he_op.he_bss_color_disabled = 0; diff --git a/package/network/services/hostapd/patches/470-survey_data_fallback.patch b/package/network/services/hostapd/patches/470-survey_data_fallback.patch index 79ab48c5c2..1ae2c599eb 100644 --- a/package/network/services/hostapd/patches/470-survey_data_fallback.patch +++ b/package/network/services/hostapd/patches/470-survey_data_fallback.patch @@ -1,6 +1,10 @@ +From: Felix Fietkau +Date: Wed, 15 Jun 2016 17:31:48 +0200 +Subject: [PATCH] hostapd: implement fallback for incomplete survey data + --- a/src/ap/acs.c +++ b/src/ap/acs.c -@@ -455,17 +455,17 @@ static int acs_get_bw_center_chan(int fr +@@ -467,17 +467,17 @@ static int acs_get_bw_center_chan(int fr static int acs_survey_is_sufficient(struct freq_survey *survey) { if (!(survey->filled & SURVEY_HAS_NF)) { @@ -20,7 +24,7 @@ } if (!(survey->filled & SURVEY_HAS_CHAN_TIME_BUSY) && -@@ -473,7 +473,6 @@ static int acs_survey_is_sufficient(stru +@@ -485,7 +485,6 @@ static int acs_survey_is_sufficient(stru wpa_printf(MSG_INFO, "ACS: Survey for freq %d is missing RX and busy time (at least one is required)", survey->freq); diff --git a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch b/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch index 0efa6db908..e1bb37ea55 100644 --- a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch +++ b/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch @@ -1,3 +1,13 @@ +From: David Bauer +Date: Sat, 27 Nov 2021 22:08:28 +0100 +Subject: [PATCH] hostapd: add OpenWrt specific statistic counters + +This adds a new struct for storing statistics not (yet) tracked by +hostapd regarding RRM and WNM activity. + +These statistics can be read using the get_status hostapd interface ubus +method. + --- a/src/ap/hostapd.h +++ b/src/ap/hostapd.h @@ -163,6 +163,21 @@ struct hostapd_sae_commit_queue { @@ -32,9 +42,20 @@ int num_sta; /* number of entries in sta_list */ struct sta_info *sta_list; /* STA info list head */ #define STA_HASH_SIZE 256 +--- a/src/ap/rrm.c ++++ b/src/ap/rrm.c +@@ -269,6 +269,8 @@ static void hostapd_send_nei_report_resp + } + } + ++ hapd->openwrt_stats.rrm.neighbor_report_tx++; ++ + hostapd_drv_send_action(hapd, hapd->iface->freq, 0, addr, + wpabuf_head(buf), wpabuf_len(buf)); + wpabuf_free(buf); --- a/src/ap/wnm_ap.c +++ b/src/ap/wnm_ap.c -@@ -386,6 +386,7 @@ static int ieee802_11_send_bss_trans_mgm +@@ -410,6 +410,7 @@ static int ieee802_11_send_bss_trans_mgm mgmt->u.action.u.bss_tm_req.validity_interval = 1; pos = mgmt->u.action.u.bss_tm_req.variable; @@ -42,7 +63,7 @@ wpa_printf(MSG_DEBUG, "WNM: Send BSS Transition Management Request to " MACSTR " dialog_token=%u req_mode=0x%x disassoc_timer=%u " "validity_interval=%u", -@@ -790,10 +791,12 @@ int ieee802_11_rx_wnm_action_ap(struct h +@@ -814,10 +815,12 @@ int ieee802_11_rx_wnm_action_ap(struct h plen); return 0; case WNM_BSS_TRANS_MGMT_QUERY: @@ -55,7 +76,7 @@ ieee802_11_rx_bss_trans_mgmt_resp(hapd, mgmt->sa, payload, plen); return 0; -@@ -840,6 +843,7 @@ int wnm_send_disassoc_imminent(struct ho +@@ -865,6 +868,7 @@ int wnm_send_disassoc_imminent(struct ho pos = mgmt->u.action.u.bss_tm_req.variable; @@ -63,7 +84,7 @@ wpa_printf(MSG_DEBUG, "WNM: Send BSS Transition Management Request frame to indicate imminent disassociation (disassoc_timer=%d) to " MACSTR, disassoc_timer, MAC2STR(sta->addr)); if (hostapd_drv_send_mlme(hapd, buf, pos - buf, 0, NULL, 0, 0) < 0) { -@@ -921,6 +925,7 @@ int wnm_send_ess_disassoc_imminent(struc +@@ -947,6 +951,7 @@ int wnm_send_ess_disassoc_imminent(struc return -1; } @@ -71,22 +92,11 @@ if (disassoc_timer) { /* send disassociation frame after time-out */ set_disassoc_timer(hapd, sta, disassoc_timer); -@@ -1001,6 +1006,7 @@ int wnm_send_bss_tm_req(struct hostapd_d +@@ -1028,6 +1033,7 @@ int wnm_send_bss_tm_req(struct hostapd_d } os_free(buf); + hapd->openwrt_stats.wnm.bss_transition_request_tx++; if (disassoc_timer) { - /* send disassociation frame after time-out */ - set_disassoc_timer(hapd, sta, disassoc_timer); ---- a/src/ap/rrm.c -+++ b/src/ap/rrm.c -@@ -269,6 +269,8 @@ static void hostapd_send_nei_report_resp - } - } - -+ hapd->openwrt_stats.rrm.neighbor_report_tx++; -+ - hostapd_drv_send_action(hapd, hapd->iface->freq, 0, addr, - wpabuf_head(buf), wpabuf_len(buf)); - wpabuf_free(buf); + #ifdef CONFIG_IEEE80211BE + if (ap_sta_is_mld(hapd, sta)) { diff --git a/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch b/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch deleted file mode 100644 index e70dc61419..0000000000 --- a/package/network/services/hostapd/patches/599-wpa_supplicant-fix-warnings.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/wpa_supplicant/wps_supplicant.h -+++ b/wpa_supplicant/wps_supplicant.h -@@ -9,6 +9,7 @@ - #ifndef WPS_SUPPLICANT_H - #define WPS_SUPPLICANT_H - -+struct wpa_bss; - struct wpa_scan_results; - - #ifdef CONFIG_WPS -@@ -16,8 +17,6 @@ struct wpa_scan_results; - #include "wps/wps.h" - #include "wps/wps_defs.h" - --struct wpa_bss; -- - struct wps_new_ap_settings { - const char *ssid_hex; - const char *auth; diff --git a/package/network/services/hostapd/patches/600-ubus_support.patch b/package/network/services/hostapd/patches/600-ubus_support.patch index a6ccf83331..0457f37f74 100644 --- a/package/network/services/hostapd/patches/600-ubus_support.patch +++ b/package/network/services/hostapd/patches/600-ubus_support.patch @@ -1,3 +1,10 @@ +From: Felix Fietkau +Date: Sun, 17 Mar 2013 20:47:18 +0000 +Subject: [PATCH] hostapd: initial prototype of an ubus binding + +Supports listing, removing and banning clients, and hooking into +probe/assoc/auth requests via object subscribe. + --- a/hostapd/Makefile +++ b/hostapd/Makefile @@ -166,6 +166,12 @@ OBJS += ../src/common/hw_features_common @@ -12,7 +19,146 @@ +endif ifdef CONFIG_CODE_COVERAGE - CFLAGS += -O0 -fprofile-arcs -ftest-coverage + CFLAGS += -O0 -fprofile-arcs -ftest-coverage -U_FORTIFY_SOURCE +--- a/src/ap/airtime_policy.c ++++ b/src/ap/airtime_policy.c +@@ -112,8 +112,14 @@ static void set_sta_weights(struct hosta + { + struct sta_info *sta; + +- for (sta = hapd->sta_list; sta; sta = sta->next) +- sta_set_airtime_weight(hapd, sta, weight); ++ for (sta = hapd->sta_list; sta; sta = sta->next) { ++ unsigned int sta_weight = weight; ++ ++ if (sta->dyn_airtime_weight) ++ sta_weight = (weight * sta->dyn_airtime_weight) / 256; ++ ++ sta_set_airtime_weight(hapd, sta, sta_weight); ++ } + } + + +@@ -244,7 +250,10 @@ int airtime_policy_new_sta(struct hostap + unsigned int weight; + + if (hapd->iconf->airtime_mode == AIRTIME_MODE_STATIC) { +- weight = get_weight_for_sta(hapd, sta->addr); ++ if (sta->dyn_airtime_weight) ++ weight = sta->dyn_airtime_weight; ++ else ++ weight = get_weight_for_sta(hapd, sta->addr); + if (weight) + return sta_set_airtime_weight(hapd, sta, weight); + } +--- a/src/ap/beacon.c ++++ b/src/ap/beacon.c +@@ -1351,6 +1351,12 @@ void handle_probe_req(struct hostapd_dat + int mld_id; + u16 links; + #endif /* CONFIG_IEEE80211BE */ ++ struct hostapd_ubus_request req = { ++ .type = HOSTAPD_UBUS_PROBE_REQ, ++ .mgmt_frame = mgmt, ++ .ssi_signal = ssi_signal, ++ .elems = &elems, ++ }; + + if (hapd->iconf->rssi_ignore_probe_request && ssi_signal && + ssi_signal < hapd->iconf->rssi_ignore_probe_request) +@@ -1537,6 +1543,12 @@ void handle_probe_req(struct hostapd_dat + } + #endif /* CONFIG_P2P */ + ++ if (hostapd_ubus_handle_event(hapd, &req)) { ++ wpa_printf(MSG_DEBUG, "Probe request for " MACSTR " rejected by ubus handler.\n", ++ MAC2STR(mgmt->sa)); ++ return; ++ } ++ + /* TODO: verify that supp_rates contains at least one matching rate + * with AP configuration */ + +--- a/src/ap/dfs.c ++++ b/src/ap/dfs.c +@@ -1225,6 +1225,8 @@ int hostapd_dfs_pre_cac_expired(struct h + "freq=%d ht_enabled=%d chan_offset=%d chan_width=%d cf1=%d cf2=%d", + freq, ht_enabled, chan_offset, chan_width, cf1, cf2); + ++ hostapd_ubus_notify_radar_detected(iface, freq, chan_width, cf1, cf2); ++ + /* Proceed only if DFS is not offloaded to the driver */ + if (iface->drv_flags & WPA_DRIVER_FLAGS_DFS_OFFLOAD) + return 0; +--- a/src/ap/drv_callbacks.c ++++ b/src/ap/drv_callbacks.c +@@ -268,6 +268,10 @@ int hostapd_notif_assoc(struct hostapd_d + struct hostapd_iface *iface = hapd->iface; + #endif /* CONFIG_OWE */ + bool updated = false; ++ struct hostapd_ubus_request req = { ++ .type = HOSTAPD_UBUS_ASSOC_REQ, ++ .addr = addr, ++ }; + + if (addr == NULL) { + /* +@@ -412,6 +416,12 @@ int hostapd_notif_assoc(struct hostapd_d + goto fail; + } + ++ if (hostapd_ubus_handle_event(hapd, &req)) { ++ wpa_printf(MSG_DEBUG, "Station " MACSTR " assoc rejected by ubus handler.\n", ++ MAC2STR(req.addr)); ++ goto fail; ++ } ++ + #ifdef CONFIG_P2P + if (elems.p2p) { + wpabuf_free(sta->p2p_ie); +--- a/src/ap/hostapd.c ++++ b/src/ap/hostapd.c +@@ -493,6 +493,7 @@ void hostapd_free_hapd_data(struct hosta + hapd->beacon_set_done = 0; + + wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface); ++ hostapd_ubus_free_bss(hapd); + accounting_deinit(hapd); + hostapd_deinit_wpa(hapd); + vlan_deinit(hapd); +@@ -1274,6 +1275,8 @@ static int hostapd_start_beacon(struct h + if (hapd->driver && hapd->driver->set_operstate) + hapd->driver->set_operstate(hapd->drv_priv, 1); + ++ hostapd_ubus_add_bss(hapd); ++ + return 0; + } + +@@ -2367,6 +2370,7 @@ static int hostapd_setup_interface_compl + if (err) + goto fail; + ++ hostapd_ubus_add_iface(iface); + wpa_printf(MSG_DEBUG, "Completing interface initialization"); + if (iface->freq) { + #ifdef NEED_AP_MLME +@@ -2586,6 +2590,7 @@ dfs_offload: + + fail: + wpa_printf(MSG_ERROR, "Interface initialization failed"); ++ hostapd_ubus_free_iface(iface); + + if (iface->is_no_ir) { + hostapd_set_state(iface, HAPD_IFACE_NO_IR); +@@ -3076,6 +3081,7 @@ void hostapd_interface_deinit_free(struc + (unsigned int) iface->conf->num_bss); + driver = iface->bss[0]->driver; + drv_priv = iface->bss[0]->drv_priv; ++ hostapd_ubus_free_iface(iface); + hostapd_interface_deinit(iface); + wpa_printf(MSG_DEBUG, "%s: driver=%p drv_priv=%p -> hapd_deinit", + __func__, driver, drv_priv); --- a/src/ap/hostapd.h +++ b/src/ap/hostapd.h @@ -18,6 +18,7 @@ @@ -31,7 +177,7 @@ int interface_added; /* virtual interface added for this BSS */ unsigned int started:1; unsigned int disabled:1; -@@ -695,6 +697,7 @@ hostapd_alloc_bss_data(struct hostapd_if +@@ -707,6 +709,7 @@ hostapd_alloc_bss_data(struct hostapd_if struct hostapd_bss_config *bss); int hostapd_setup_interface(struct hostapd_iface *iface); int hostapd_setup_interface_complete(struct hostapd_iface *iface, int err); @@ -39,52 +185,9 @@ void hostapd_interface_deinit(struct hostapd_iface *iface); void hostapd_interface_free(struct hostapd_iface *iface); struct hostapd_iface * hostapd_alloc_iface(void); ---- a/src/ap/hostapd.c -+++ b/src/ap/hostapd.c -@@ -435,6 +435,7 @@ void hostapd_free_hapd_data(struct hosta - hapd->beacon_set_done = 0; - - wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface); -+ hostapd_ubus_free_bss(hapd); - accounting_deinit(hapd); - hostapd_deinit_wpa(hapd); - vlan_deinit(hapd); -@@ -1187,6 +1188,8 @@ static int hostapd_start_beacon(struct h - if (hapd->driver && hapd->driver->set_operstate) - hapd->driver->set_operstate(hapd->drv_priv, 1); - -+ hostapd_ubus_add_bss(hapd); -+ - return 0; - } - -@@ -2275,6 +2278,7 @@ static int hostapd_setup_interface_compl - if (err) - goto fail; - -+ hostapd_ubus_add_iface(iface); - wpa_printf(MSG_DEBUG, "Completing interface initialization"); - if (iface->freq) { - #ifdef NEED_AP_MLME -@@ -2494,6 +2498,7 @@ dfs_offload: - - fail: - wpa_printf(MSG_ERROR, "Interface initialization failed"); -+ hostapd_ubus_free_iface(iface); - - if (iface->is_no_ir) { - hostapd_set_state(iface, HAPD_IFACE_NO_IR); -@@ -2984,6 +2989,7 @@ void hostapd_interface_deinit_free(struc - (unsigned int) iface->conf->num_bss); - driver = iface->bss[0]->driver; - drv_priv = iface->bss[0]->drv_priv; -+ hostapd_ubus_free_iface(iface); - hostapd_interface_deinit(iface); - wpa_printf(MSG_DEBUG, "%s: driver=%p drv_priv=%p -> hapd_deinit", - __func__, driver, drv_priv); --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -2786,7 +2786,7 @@ static void handle_auth(struct hostapd_d +@@ -2798,7 +2798,7 @@ static void handle_auth(struct hostapd_d u16 auth_alg, auth_transaction, status_code; u16 resp = WLAN_STATUS_SUCCESS; struct sta_info *sta = NULL; @@ -93,7 +196,7 @@ u16 fc; const u8 *challenge = NULL; u8 resp_ies[2 + WLAN_AUTH_CHALLENGE_LEN]; -@@ -2795,6 +2795,11 @@ static void handle_auth(struct hostapd_d +@@ -2807,6 +2807,11 @@ static void handle_auth(struct hostapd_d struct radius_sta rad_info; const u8 *dst, *sa, *bssid; bool mld_sta = false; @@ -105,7 +208,7 @@ if (len < IEEE80211_HDRLEN + sizeof(mgmt->u.auth)) { wpa_printf(MSG_INFO, "handle_auth - too short payload (len=%lu)", -@@ -2986,6 +2991,13 @@ static void handle_auth(struct hostapd_d +@@ -2998,6 +3003,13 @@ static void handle_auth(struct hostapd_d resp = WLAN_STATUS_UNSPECIFIED_FAILURE; goto fail; } @@ -119,7 +222,7 @@ if (res == HOSTAPD_ACL_PENDING) return; -@@ -5161,7 +5173,7 @@ static void handle_assoc(struct hostapd_ +@@ -5242,7 +5254,7 @@ static void handle_assoc(struct hostapd_ int resp = WLAN_STATUS_SUCCESS; u16 reply_res = WLAN_STATUS_UNSPECIFIED_FAILURE; const u8 *pos; @@ -128,7 +231,7 @@ struct sta_info *sta; u8 *tmp = NULL; #ifdef CONFIG_FILS -@@ -5374,6 +5386,11 @@ static void handle_assoc(struct hostapd_ +@@ -5484,6 +5496,11 @@ static void handle_assoc(struct hostapd_ left = res; } #endif /* CONFIG_FILS */ @@ -140,9 +243,9 @@ /* followed by SSID and Supported rates; and HT capabilities if 802.11n * is used */ -@@ -5472,6 +5489,13 @@ static void handle_assoc(struct hostapd_ - } - #endif /* CONFIG_FILS */ +@@ -5586,6 +5603,13 @@ static void handle_assoc(struct hostapd_ + if (set_beacon) + ieee802_11_set_beacons(hapd->iface); + ubus_resp = hostapd_ubus_handle_event(hapd, &req); + if (ubus_resp) { @@ -154,7 +257,7 @@ fail: /* -@@ -5753,6 +5777,7 @@ static void handle_disassoc(struct hosta +@@ -5836,6 +5860,7 @@ static void handle_disassoc(struct hosta (unsigned long) len); return; } @@ -162,7 +265,7 @@ sta = ap_get_sta(hapd, mgmt->sa); if (!sta) { -@@ -5784,6 +5809,8 @@ static void handle_deauth(struct hostapd +@@ -5867,6 +5892,8 @@ static void handle_deauth(struct hostapd /* Clear the PTKSA cache entries for PASN */ ptksa_cache_flush(hapd->ptksa, mgmt->sa, WPA_CIPHER_NONE); @@ -171,63 +274,31 @@ sta = ap_get_sta(hapd, mgmt->sa); if (!sta) { wpa_msg(hapd->msg_ctx, MSG_DEBUG, "Station " MACSTR ---- a/src/ap/beacon.c -+++ b/src/ap/beacon.c -@@ -1036,6 +1036,12 @@ void handle_probe_req(struct hostapd_dat - u16 csa_offs[2]; - size_t csa_offs_len; - struct radius_sta rad_info; -+ struct hostapd_ubus_request req = { -+ .type = HOSTAPD_UBUS_PROBE_REQ, -+ .mgmt_frame = mgmt, -+ .ssi_signal = ssi_signal, -+ .elems = &elems, -+ }; - - if (hapd->iconf->rssi_ignore_probe_request && ssi_signal && - ssi_signal < hapd->iconf->rssi_ignore_probe_request) -@@ -1222,6 +1228,12 @@ void handle_probe_req(struct hostapd_dat - } - #endif /* CONFIG_P2P */ - -+ if (hostapd_ubus_handle_event(hapd, &req)) { -+ wpa_printf(MSG_DEBUG, "Probe request for " MACSTR " rejected by ubus handler.\n", -+ MAC2STR(mgmt->sa)); +--- a/src/ap/rrm.c ++++ b/src/ap/rrm.c +@@ -89,6 +89,9 @@ static void hostapd_handle_beacon_report + return; + wpa_msg(hapd->msg_ctx, MSG_INFO, BEACON_RESP_RX MACSTR " %u %02x %s", + MAC2STR(addr), token, rep_mode, report); ++ if (len < sizeof(struct rrm_measurement_beacon_report)) + return; -+ } -+ - /* TODO: verify that supp_rates contains at least one matching rate - * with AP configuration */ ++ hostapd_ubus_notify_beacon_report(hapd, addr, token, rep_mode, (struct rrm_measurement_beacon_report*) pos, len); + } ---- a/src/ap/drv_callbacks.c -+++ b/src/ap/drv_callbacks.c -@@ -260,6 +260,10 @@ int hostapd_notif_assoc(struct hostapd_d - u16 reason = WLAN_REASON_UNSPECIFIED; - int status = WLAN_STATUS_SUCCESS; - const u8 *p2p_dev_addr = NULL; -+ struct hostapd_ubus_request req = { -+ .type = HOSTAPD_UBUS_ASSOC_REQ, -+ .addr = addr, -+ }; - if (addr == NULL) { - /* -@@ -396,6 +400,12 @@ int hostapd_notif_assoc(struct hostapd_d - goto fail; - } +@@ -352,6 +355,9 @@ void hostapd_handle_radio_measurement(st + mgmt->u.action.u.rrm.action, MAC2STR(mgmt->sa)); -+ if (hostapd_ubus_handle_event(hapd, &req)) { -+ wpa_printf(MSG_DEBUG, "Station " MACSTR " assoc rejected by ubus handler.\n", -+ MAC2STR(req.addr)); -+ goto fail; -+ } -+ - #ifdef CONFIG_P2P - if (elems.p2p) { - wpabuf_free(sta->p2p_ie); + switch (mgmt->u.action.u.rrm.action) { ++ case WLAN_RRM_LINK_MEASUREMENT_REPORT: ++ hostapd_ubus_handle_link_measurement(hapd, buf, len); ++ break; + case WLAN_RRM_RADIO_MEASUREMENT_REPORT: + hostapd_handle_radio_msmt_report(hapd, buf, len); + break; --- a/src/ap/sta_info.c +++ b/src/ap/sta_info.c -@@ -471,6 +471,7 @@ void ap_handle_timer(void *eloop_ctx, vo +@@ -476,6 +476,7 @@ void ap_handle_timer(void *eloop_ctx, vo hostapd_logger(hapd, sta->addr, HOSTAPD_MODULE_IEEE80211, HOSTAPD_LEVEL_INFO, "deauthenticated due to " "local deauth request"); @@ -235,7 +306,7 @@ ap_free_sta(hapd, sta); return; } -@@ -626,6 +627,7 @@ skip_poll: +@@ -631,6 +632,7 @@ skip_poll: mlme_deauthenticate_indication( hapd, sta, WLAN_REASON_PREV_AUTH_NOT_VALID); @@ -243,8 +314,8 @@ ap_free_sta(hapd, sta); break; } -@@ -1344,15 +1346,28 @@ void ap_sta_set_authorized(struct hostap - sta->addr, authorized, dev_addr); +@@ -1448,15 +1450,28 @@ void ap_sta_set_authorized_event(struct + os_snprintf(buf, sizeof(buf), MACSTR, MAC2STR(sta->addr)); if (authorized) { + static const char * const auth_algs[] = { @@ -272,7 +343,7 @@ #ifdef CONFIG_P2P if (wpa_auth_get_ip_addr(sta->wpa_sm, ip_addr_buf) == 0) { os_snprintf(ip_addr, sizeof(ip_addr), -@@ -1362,6 +1377,13 @@ void ap_sta_set_authorized(struct hostap +@@ -1467,6 +1482,13 @@ void ap_sta_set_authorized_event(struct } #endif /* CONFIG_P2P */ @@ -286,7 +357,7 @@ keyid = ap_sta_wpa_get_keyid(hapd, sta); if (keyid) { os_snprintf(keyid_buf, sizeof(keyid_buf), -@@ -1380,17 +1402,19 @@ void ap_sta_set_authorized(struct hostap +@@ -1485,17 +1507,19 @@ void ap_sta_set_authorized_event(struct dpp_pkhash, SHA256_MAC_LEN); } @@ -310,164 +381,16 @@ if (hapd->msg_ctx_parent && hapd->msg_ctx_parent != hapd->msg_ctx) ---- a/src/ap/wpa_auth_glue.c -+++ b/src/ap/wpa_auth_glue.c -@@ -269,6 +269,7 @@ static void hostapd_wpa_auth_psk_failure - struct hostapd_data *hapd = ctx; - wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_POSSIBLE_PSK_MISMATCH MACSTR, - MAC2STR(addr)); -+ hostapd_ubus_notify(hapd, "key-mismatch", addr); - } +--- a/src/ap/sta_info.h ++++ b/src/ap/sta_info.h +@@ -319,6 +319,7 @@ struct sta_info { + #endif /* CONFIG_TESTING_OPTIONS */ + #ifdef CONFIG_AIRTIME_POLICY + unsigned int airtime_weight; ++ unsigned int dyn_airtime_weight; + struct os_reltime backlogged_until; + #endif /* CONFIG_AIRTIME_POLICY */ - ---- a/wpa_supplicant/Makefile -+++ b/wpa_supplicant/Makefile -@@ -192,6 +192,13 @@ ifdef CONFIG_EAPOL_TEST - CFLAGS += -Werror -DEAPOL_TEST - endif - -+ifdef CONFIG_UBUS -+CFLAGS += -DUBUS_SUPPORT -+OBJS += ubus.o -+OBJS += ../src/utils/uloop.o -+LIBS += -lubox -lubus -+endif -+ - ifdef CONFIG_CODE_COVERAGE - CFLAGS += -O0 -fprofile-arcs -ftest-coverage - LIBS += -lgcov -@@ -987,6 +994,9 @@ ifdef CONFIG_CTRL_IFACE_MIB - CFLAGS += -DCONFIG_CTRL_IFACE_MIB - endif - OBJS += ../src/ap/ctrl_iface_ap.o -+ifdef CONFIG_UBUS -+OBJS += ../src/ap/ubus.o -+endif - endif - - CFLAGS += -DEAP_SERVER -DEAP_SERVER_IDENTITY ---- a/wpa_supplicant/wpa_supplicant.c -+++ b/wpa_supplicant/wpa_supplicant.c -@@ -7595,6 +7595,8 @@ struct wpa_supplicant * wpa_supplicant_a - } - #endif /* CONFIG_P2P */ - -+ wpas_ubus_add_bss(wpa_s); -+ - return wpa_s; - } - -@@ -7621,6 +7623,8 @@ int wpa_supplicant_remove_iface(struct w - struct wpa_supplicant *parent = wpa_s->parent; - #endif /* CONFIG_MESH */ - -+ wpas_ubus_free_bss(wpa_s); -+ - /* Remove interface from the global list of interfaces */ - prev = global->ifaces; - if (prev == wpa_s) { -@@ -7967,8 +7971,12 @@ int wpa_supplicant_run(struct wpa_global - eloop_register_signal_terminate(wpa_supplicant_terminate, global); - eloop_register_signal_reconfig(wpa_supplicant_reconfig, global); - -+ wpas_ubus_add(global); -+ - eloop_run(); - -+ wpas_ubus_free(global); -+ - return 0; - } - ---- a/wpa_supplicant/wpa_supplicant_i.h -+++ b/wpa_supplicant/wpa_supplicant_i.h -@@ -21,6 +21,7 @@ - #include "config_ssid.h" - #include "wmm_ac.h" - #include "pasn/pasn_common.h" -+#include "ubus.h" - - extern const char *const wpa_supplicant_version; - extern const char *const wpa_supplicant_license; -@@ -319,6 +320,8 @@ struct wpa_global { - #endif /* CONFIG_WIFI_DISPLAY */ - - struct psk_list_entry *add_psk; /* From group formation */ -+ -+ struct ubus_object ubus_global; - }; - - -@@ -685,6 +688,7 @@ struct wpa_supplicant { - unsigned char own_addr[ETH_ALEN]; - unsigned char perm_addr[ETH_ALEN]; - char ifname[100]; -+ struct wpas_ubus_bss ubus; - #ifdef CONFIG_MATCH_IFACE - int matched; - #endif /* CONFIG_MATCH_IFACE */ ---- a/wpa_supplicant/wps_supplicant.c -+++ b/wpa_supplicant/wps_supplicant.c -@@ -33,6 +33,7 @@ - #include "p2p/p2p.h" - #include "p2p_supplicant.h" - #include "wps_supplicant.h" -+#include "ubus.h" - - - #ifndef WPS_PIN_SCAN_IGNORE_SEL_REG -@@ -402,6 +403,8 @@ static int wpa_supplicant_wps_cred(void - wpa_hexdump_key(MSG_DEBUG, "WPS: Received Credential attribute", - cred->cred_attr, cred->cred_attr_len); - -+ wpas_ubus_notify(wpa_s, cred); -+ - if (wpa_s->conf->wps_cred_processing == 1) - return 0; - ---- a/wpa_supplicant/main.c -+++ b/wpa_supplicant/main.c -@@ -203,7 +203,7 @@ int main(int argc, char *argv[]) - - for (;;) { - c = getopt(argc, argv, -- "b:Bc:C:D:de:f:g:G:hi:I:KLMm:No:O:p:P:qsTtuv::W"); -+ "b:Bc:C:D:de:f:g:G:hi:I:KLMm:nNo:O:p:P:qsTtuv::W"); - if (c < 0) - break; - switch (c) { -@@ -268,6 +268,9 @@ int main(int argc, char *argv[]) - params.conf_p2p_dev = optarg; - break; - #endif /* CONFIG_P2P */ -+ case 'n': -+ iface_count = 0; -+ break; - case 'o': - params.override_driver = optarg; - break; ---- a/src/ap/rrm.c -+++ b/src/ap/rrm.c -@@ -89,6 +89,9 @@ static void hostapd_handle_beacon_report - return; - wpa_msg(hapd->msg_ctx, MSG_INFO, BEACON_RESP_RX MACSTR " %u %02x %s", - MAC2STR(addr), token, rep_mode, report); -+ if (len < sizeof(struct rrm_measurement_beacon_report)) -+ return; -+ hostapd_ubus_notify_beacon_report(hapd, addr, token, rep_mode, (struct rrm_measurement_beacon_report*) pos, len); - } - - -@@ -352,6 +355,9 @@ void hostapd_handle_radio_measurement(st - mgmt->u.action.u.rrm.action, MAC2STR(mgmt->sa)); - - switch (mgmt->u.action.u.rrm.action) { -+ case WLAN_RRM_LINK_MEASUREMENT_REPORT: -+ hostapd_ubus_handle_link_measurement(hapd, buf, len); -+ break; - case WLAN_RRM_RADIO_MEASUREMENT_REPORT: - hostapd_handle_radio_msmt_report(hapd, buf, len); - break; --- a/src/ap/vlan_init.c +++ b/src/ap/vlan_init.c @@ -22,6 +22,7 @@ @@ -506,61 +429,9 @@ return hostapd_vlan_if_remove(hapd, vlan->ifname); } ---- a/src/ap/dfs.c -+++ b/src/ap/dfs.c -@@ -1216,6 +1216,8 @@ int hostapd_dfs_pre_cac_expired(struct h - "freq=%d ht_enabled=%d chan_offset=%d chan_width=%d cf1=%d cf2=%d", - freq, ht_enabled, chan_offset, chan_width, cf1, cf2); - -+ hostapd_ubus_notify_radar_detected(iface, freq, chan_width, cf1, cf2); -+ - /* Proceed only if DFS is not offloaded to the driver */ - if (iface->drv_flags & WPA_DRIVER_FLAGS_DFS_OFFLOAD) - return 0; ---- a/src/ap/airtime_policy.c -+++ b/src/ap/airtime_policy.c -@@ -112,8 +112,14 @@ static void set_sta_weights(struct hosta - { - struct sta_info *sta; - -- for (sta = hapd->sta_list; sta; sta = sta->next) -- sta_set_airtime_weight(hapd, sta, weight); -+ for (sta = hapd->sta_list; sta; sta = sta->next) { -+ unsigned int sta_weight = weight; -+ -+ if (sta->dyn_airtime_weight) -+ sta_weight = (weight * sta->dyn_airtime_weight) / 256; -+ -+ sta_set_airtime_weight(hapd, sta, sta_weight); -+ } - } - - -@@ -244,7 +250,10 @@ int airtime_policy_new_sta(struct hostap - unsigned int weight; - - if (hapd->iconf->airtime_mode == AIRTIME_MODE_STATIC) { -- weight = get_weight_for_sta(hapd, sta->addr); -+ if (sta->dyn_airtime_weight) -+ weight = sta->dyn_airtime_weight; -+ else -+ weight = get_weight_for_sta(hapd, sta->addr); - if (weight) - return sta_set_airtime_weight(hapd, sta, weight); - } ---- a/src/ap/sta_info.h -+++ b/src/ap/sta_info.h -@@ -322,6 +322,7 @@ struct sta_info { - #endif /* CONFIG_TESTING_OPTIONS */ - #ifdef CONFIG_AIRTIME_POLICY - unsigned int airtime_weight; -+ unsigned int dyn_airtime_weight; - struct os_reltime backlogged_until; - #endif /* CONFIG_AIRTIME_POLICY */ - --- a/src/ap/wnm_ap.c +++ b/src/ap/wnm_ap.c -@@ -455,7 +455,8 @@ static void ieee802_11_rx_bss_trans_mgmt +@@ -479,7 +479,8 @@ static void ieee802_11_rx_bss_trans_mgmt MAC2STR(addr), reason, hex ? " neighbor=" : "", hex); os_free(hex); @@ -570,7 +441,7 @@ } -@@ -477,7 +478,7 @@ static void ieee802_11_rx_bss_trans_mgmt +@@ -501,7 +502,7 @@ static void ieee802_11_rx_bss_trans_mgmt size_t len) { u8 dialog_token, status_code, bss_termination_delay; @@ -579,7 +450,7 @@ int enabled = hapd->conf->bss_transition; struct sta_info *sta; -@@ -524,6 +525,7 @@ static void ieee802_11_rx_bss_trans_mgmt +@@ -548,6 +549,7 @@ static void ieee802_11_rx_bss_trans_mgmt wpa_printf(MSG_DEBUG, "WNM: not enough room for Target BSSID field"); return; } @@ -587,7 +458,7 @@ sta->agreed_to_steer = 1; eloop_cancel_timeout(ap_sta_reset_steer_flag_timer, hapd, sta); eloop_register_timeout(2, 0, ap_sta_reset_steer_flag_timer, -@@ -543,6 +545,10 @@ static void ieee802_11_rx_bss_trans_mgmt +@@ -567,6 +569,10 @@ static void ieee802_11_rx_bss_trans_mgmt MAC2STR(addr), status_code, bss_termination_delay); } @@ -598,6 +469,16 @@ wpa_hexdump(MSG_DEBUG, "WNM: BSS Transition Candidate List Entries", pos, end - pos); } +--- a/src/ap/wpa_auth_glue.c ++++ b/src/ap/wpa_auth_glue.c +@@ -275,6 +275,7 @@ static void hostapd_wpa_auth_psk_failure + struct hostapd_data *hapd = ctx; + wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_POSSIBLE_PSK_MISMATCH MACSTR, + MAC2STR(addr)); ++ hostapd_ubus_notify(hapd, "key-mismatch", addr); + } + + --- a/src/utils/eloop.c +++ b/src/utils/eloop.c @@ -77,6 +77,9 @@ struct eloop_sock_table { @@ -746,3 +627,129 @@ + + eloop_register_cb(uloop_poll_handler, uloop_timeout_poll_handler); +} +--- a/wpa_supplicant/Makefile ++++ b/wpa_supplicant/Makefile +@@ -189,6 +189,13 @@ ifdef CONFIG_EAPOL_TEST + CFLAGS += -Werror -DEAPOL_TEST + endif + ++ifdef CONFIG_UBUS ++CFLAGS += -DUBUS_SUPPORT ++OBJS += ubus.o ++OBJS += ../src/utils/uloop.o ++LIBS += -lubox -lubus ++endif ++ + ifdef CONFIG_CODE_COVERAGE + CFLAGS += -O0 -fprofile-arcs -ftest-coverage -U_FORTIFY_SOURCE + LIBS += -lgcov +@@ -1042,6 +1049,9 @@ ifdef CONFIG_CTRL_IFACE_MIB + CFLAGS += -DCONFIG_CTRL_IFACE_MIB + endif + OBJS += ../src/ap/ctrl_iface_ap.o ++ifdef CONFIG_UBUS ++OBJS += ../src/ap/ubus.o ++endif + endif + + CFLAGS += -DEAP_SERVER -DEAP_SERVER_IDENTITY +--- a/wpa_supplicant/main.c ++++ b/wpa_supplicant/main.c +@@ -203,7 +203,7 @@ int main(int argc, char *argv[]) + + for (;;) { + c = getopt(argc, argv, +- "b:Bc:C:D:de:f:g:G:hi:I:KLMm:No:O:p:P:qsTtuv::W"); ++ "b:Bc:C:D:de:f:g:G:hi:I:KLMm:nNo:O:p:P:qsTtuv::W"); + if (c < 0) + break; + switch (c) { +@@ -268,6 +268,9 @@ int main(int argc, char *argv[]) + params.conf_p2p_dev = optarg; + break; + #endif /* CONFIG_P2P */ ++ case 'n': ++ iface_count = 0; ++ break; + case 'o': + params.override_driver = optarg; + break; +--- a/wpa_supplicant/wpa_supplicant.c ++++ b/wpa_supplicant/wpa_supplicant.c +@@ -7716,6 +7716,8 @@ struct wpa_supplicant * wpa_supplicant_a + } + #endif /* CONFIG_P2P */ + ++ wpas_ubus_add_bss(wpa_s); ++ + return wpa_s; + } + +@@ -7742,6 +7744,8 @@ int wpa_supplicant_remove_iface(struct w + struct wpa_supplicant *parent = wpa_s->parent; + #endif /* CONFIG_MESH */ + ++ wpas_ubus_free_bss(wpa_s); ++ + /* Remove interface from the global list of interfaces */ + prev = global->ifaces; + if (prev == wpa_s) { +@@ -8088,8 +8092,12 @@ int wpa_supplicant_run(struct wpa_global + eloop_register_signal_terminate(wpa_supplicant_terminate, global); + eloop_register_signal_reconfig(wpa_supplicant_reconfig, global); + ++ wpas_ubus_add(global); ++ + eloop_run(); + ++ wpas_ubus_free(global); ++ + return 0; + } + +--- a/wpa_supplicant/wpa_supplicant_i.h ++++ b/wpa_supplicant/wpa_supplicant_i.h +@@ -21,6 +21,7 @@ + #include "config_ssid.h" + #include "wmm_ac.h" + #include "pasn/pasn_common.h" ++#include "ubus.h" + + extern const char *const wpa_supplicant_version; + extern const char *const wpa_supplicant_license; +@@ -319,6 +320,8 @@ struct wpa_global { + #endif /* CONFIG_WIFI_DISPLAY */ + + struct psk_list_entry *add_psk; /* From group formation */ ++ ++ struct ubus_object ubus_global; + }; + + +@@ -693,6 +696,7 @@ struct wpa_supplicant { + unsigned char own_addr[ETH_ALEN]; + unsigned char perm_addr[ETH_ALEN]; + char ifname[100]; ++ struct wpas_ubus_bss ubus; + #ifdef CONFIG_MATCH_IFACE + int matched; + #endif /* CONFIG_MATCH_IFACE */ +--- a/wpa_supplicant/wps_supplicant.c ++++ b/wpa_supplicant/wps_supplicant.c +@@ -33,6 +33,7 @@ + #include "p2p/p2p.h" + #include "p2p_supplicant.h" + #include "wps_supplicant.h" ++#include "ubus.h" + + + #ifndef WPS_PIN_SCAN_IGNORE_SEL_REG +@@ -401,6 +402,8 @@ static int wpa_supplicant_wps_cred(void + wpa_hexdump_key(MSG_DEBUG, "WPS: Received Credential attribute", + cred->cred_attr, cred->cred_attr_len); + ++ wpas_ubus_notify(wpa_s, cred); ++ + if (wpa_s->conf->wps_cred_processing == 1) + return 0; + diff --git a/package/network/services/hostapd/patches/601-ucode_support.patch b/package/network/services/hostapd/patches/601-ucode_support.patch index cfdb51f356..b826363248 100644 --- a/package/network/services/hostapd/patches/601-ucode_support.patch +++ b/package/network/services/hostapd/patches/601-ucode_support.patch @@ -1,3 +1,11 @@ +From: Felix Fietkau +Date: Fri, 26 May 2023 10:23:59 +0200 +Subject: [PATCH] Add ucode support, use ucode for the main ubus object + +This implements vastly improved dynamic configuration reload support. +It can handle configuration changes on individual wifi interfaces, as well +as adding/removing interfaces. + --- a/hostapd/Makefile +++ b/hostapd/Makefile @@ -168,9 +168,21 @@ OBJS += ../src/eapol_auth/eapol_auth_sm. @@ -24,9 +32,27 @@ endif ifdef CONFIG_CODE_COVERAGE +--- a/hostapd/ctrl_iface.c ++++ b/hostapd/ctrl_iface.c +@@ -5487,6 +5487,7 @@ try_again: + return -1; + } + ++ interface->ctrl_iface_recv = hostapd_ctrl_iface_receive_process; + wpa_msg_register_cb(hostapd_ctrl_iface_msg_cb); + + return 0; +@@ -5588,6 +5589,7 @@ fail: + os_free(fname); + + interface->global_ctrl_sock = s; ++ interface->ctrl_iface_recv = hostapd_ctrl_iface_receive_process; + eloop_register_read_sock(s, hostapd_global_ctrl_iface_receive, + interface, NULL); + --- a/hostapd/main.c +++ b/hostapd/main.c -@@ -1007,6 +1007,7 @@ int main(int argc, char *argv[]) +@@ -1014,6 +1014,7 @@ int main(int argc, char *argv[]) } hostapd_global_ctrl_iface_init(&interfaces); @@ -34,7 +60,7 @@ if (hostapd_global_run(&interfaces, daemonize, pid_file)) { wpa_printf(MSG_ERROR, "Failed to start eloop"); -@@ -1016,6 +1017,7 @@ int main(int argc, char *argv[]) +@@ -1023,6 +1024,7 @@ int main(int argc, char *argv[]) ret = 0; out: @@ -42,6 +68,96 @@ hostapd_global_ctrl_iface_deinit(&interfaces); /* Deinitialize all interfaces */ for (i = 0; i < interfaces.count; i++) { +--- a/src/ap/ap_drv_ops.h ++++ b/src/ap/ap_drv_ops.h +@@ -399,6 +399,23 @@ static inline int hostapd_drv_stop_ap(st + return hapd->driver->stop_ap(hapd->drv_priv, link_id); + } + ++static inline int hostapd_drv_if_rename(struct hostapd_data *hapd, ++ enum wpa_driver_if_type type, ++ const char *ifname, ++ const char *new_name) ++{ ++ if (!hapd->driver || !hapd->driver->if_rename || !hapd->drv_priv) ++ return -1; ++ return hapd->driver->if_rename(hapd->drv_priv, type, ifname, new_name); ++} ++ ++static inline int hostapd_drv_set_first_bss(struct hostapd_data *hapd) ++{ ++ if (!hapd->driver || !hapd->driver->set_first_bss || !hapd->drv_priv) ++ return 0; ++ return hapd->driver->set_first_bss(hapd->drv_priv); ++} ++ + static inline int hostapd_drv_channel_info(struct hostapd_data *hapd, + struct wpa_channel_info *ci) + { +--- a/src/ap/hostapd.c ++++ b/src/ap/hostapd.c +@@ -255,6 +255,8 @@ int hostapd_reload_config(struct hostapd + struct hostapd_config *newconf, *oldconf; + size_t j; + ++ hostapd_ucode_reload_bss(hapd); ++ + if (iface->config_fname == NULL) { + /* Only in-memory config in use - assume it has been updated */ + hostapd_clear_old(iface); +@@ -493,6 +495,7 @@ void hostapd_free_hapd_data(struct hosta + hapd->beacon_set_done = 0; + + wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface); ++ hostapd_ucode_free_bss(hapd); + hostapd_ubus_free_bss(hapd); + accounting_deinit(hapd); + hostapd_deinit_wpa(hapd); +@@ -687,6 +690,7 @@ void hostapd_cleanup_iface_partial(struc + static void hostapd_cleanup_iface(struct hostapd_iface *iface) + { + wpa_printf(MSG_DEBUG, "%s(%p)", __func__, iface); ++ hostapd_ucode_free_iface(iface); + eloop_cancel_timeout(hostapd_interface_setup_failure_handler, iface, + NULL); + +@@ -1276,6 +1280,7 @@ static int hostapd_start_beacon(struct h + hapd->driver->set_operstate(hapd->drv_priv, 1); + + hostapd_ubus_add_bss(hapd); ++ hostapd_ucode_add_bss(hapd); + + return 0; + } +@@ -1298,8 +1303,7 @@ static int hostapd_start_beacon(struct h + * initialized. Most of the modules that are initialized here will be + * deinitialized in hostapd_cleanup(). + */ +-static int hostapd_setup_bss(struct hostapd_data *hapd, int first, +- bool start_beacon) ++int hostapd_setup_bss(struct hostapd_data *hapd, int first, bool start_beacon) + { + struct hostapd_bss_config *conf = hapd->conf; + u8 ssid[SSID_MAX_LEN + 1]; +@@ -2790,7 +2794,7 @@ hostapd_alloc_bss_data(struct hostapd_if + } + + +-static void hostapd_bss_deinit(struct hostapd_data *hapd) ++void hostapd_bss_deinit(struct hostapd_data *hapd) + { + if (!hapd) + return; +@@ -3608,7 +3612,8 @@ int hostapd_remove_iface(struct hapd_int + hapd_iface = interfaces->iface[i]; + if (hapd_iface == NULL) + return -1; +- if (!os_strcmp(hapd_iface->conf->bss[0]->iface, buf)) { ++ if (!os_strcmp(hapd_iface->phy, buf) || ++ !os_strcmp(hapd_iface->conf->bss[0]->iface, buf)) { + wpa_printf(MSG_INFO, "Remove interface '%s'", buf); + hapd_iface->driver_ap_teardown = + !!(hapd_iface->drv_flags & --- a/src/ap/hostapd.h +++ b/src/ap/hostapd.h @@ -19,6 +19,7 @@ @@ -71,7 +187,7 @@ int interface_added; /* virtual interface added for this BSS */ unsigned int started:1; unsigned int disabled:1; -@@ -506,6 +512,7 @@ struct hostapd_sta_info { +@@ -518,6 +524,7 @@ struct hostapd_sta_info { */ struct hostapd_iface { struct hapd_interfaces *interfaces; @@ -79,7 +195,7 @@ void *owner; char *config_fname; struct hostapd_config *conf; -@@ -706,6 +713,8 @@ struct hostapd_iface * hostapd_init(stru +@@ -718,6 +725,8 @@ struct hostapd_iface * hostapd_init(stru struct hostapd_iface * hostapd_interface_init_bss(struct hapd_interfaces *interfaces, const char *phy, const char *config_fname, int debug); @@ -88,199 +204,9 @@ void hostapd_new_assoc_sta(struct hostapd_data *hapd, struct sta_info *sta, int reassoc); void hostapd_interface_deinit_free(struct hostapd_iface *iface); ---- a/src/ap/hostapd.c -+++ b/src/ap/hostapd.c -@@ -252,6 +252,8 @@ int hostapd_reload_config(struct hostapd - struct hostapd_config *newconf, *oldconf; - size_t j; - -+ hostapd_ucode_reload_bss(hapd); -+ - if (iface->config_fname == NULL) { - /* Only in-memory config in use - assume it has been updated */ - hostapd_clear_old(iface); -@@ -435,6 +437,7 @@ void hostapd_free_hapd_data(struct hosta - hapd->beacon_set_done = 0; - - wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface); -+ hostapd_ucode_free_bss(hapd); - hostapd_ubus_free_bss(hapd); - accounting_deinit(hapd); - hostapd_deinit_wpa(hapd); -@@ -600,6 +603,7 @@ void hostapd_cleanup_iface_partial(struc - static void hostapd_cleanup_iface(struct hostapd_iface *iface) - { - wpa_printf(MSG_DEBUG, "%s(%p)", __func__, iface); -+ hostapd_ucode_free_iface(iface); - eloop_cancel_timeout(hostapd_interface_setup_failure_handler, iface, - NULL); - -@@ -1189,6 +1193,7 @@ static int hostapd_start_beacon(struct h - hapd->driver->set_operstate(hapd->drv_priv, 1); - - hostapd_ubus_add_bss(hapd); -+ hostapd_ucode_add_bss(hapd); - - return 0; - } -@@ -1211,8 +1216,7 @@ static int hostapd_start_beacon(struct h - * initialized. Most of the modules that are initialized here will be - * deinitialized in hostapd_cleanup(). - */ --static int hostapd_setup_bss(struct hostapd_data *hapd, int first, -- bool start_beacon) -+int hostapd_setup_bss(struct hostapd_data *hapd, int first, bool start_beacon) - { - struct hostapd_bss_config *conf = hapd->conf; - u8 ssid[SSID_MAX_LEN + 1]; -@@ -2698,7 +2702,7 @@ hostapd_alloc_bss_data(struct hostapd_if - } - - --static void hostapd_bss_deinit(struct hostapd_data *hapd) -+void hostapd_bss_deinit(struct hostapd_data *hapd) - { - if (!hapd) - return; -@@ -3491,7 +3495,8 @@ int hostapd_remove_iface(struct hapd_int - hapd_iface = interfaces->iface[i]; - if (hapd_iface == NULL) - return -1; -- if (!os_strcmp(hapd_iface->conf->bss[0]->iface, buf)) { -+ if (!os_strcmp(hapd_iface->phy, buf) || -+ !os_strcmp(hapd_iface->conf->bss[0]->iface, buf)) { - wpa_printf(MSG_INFO, "Remove interface '%s'", buf); - hapd_iface->driver_ap_teardown = - !!(hapd_iface->drv_flags & ---- a/wpa_supplicant/Makefile -+++ b/wpa_supplicant/Makefile -@@ -195,8 +195,20 @@ endif - ifdef CONFIG_UBUS - CFLAGS += -DUBUS_SUPPORT - OBJS += ubus.o -+LIBS += -lubus -+NEED_ULOOP:=y -+endif -+ -+ifdef CONFIG_UCODE -+CFLAGS += -DUCODE_SUPPORT -+OBJS += ../src/utils/ucode.o -+OBJS += ucode.o -+NEED_ULOOP:=y -+endif -+ -+ifdef NEED_ULOOP - OBJS += ../src/utils/uloop.o --LIBS += -lubox -lubus -+LIBS += -lubox - endif - - ifdef CONFIG_CODE_COVERAGE -@@ -997,6 +1009,9 @@ OBJS += ../src/ap/ctrl_iface_ap.o - ifdef CONFIG_UBUS - OBJS += ../src/ap/ubus.o - endif -+ifdef CONFIG_UCODE -+OBJS += ../src/ap/ucode.o -+endif - endif - - CFLAGS += -DEAP_SERVER -DEAP_SERVER_IDENTITY ---- a/wpa_supplicant/wpa_supplicant.c -+++ b/wpa_supplicant/wpa_supplicant.c -@@ -1044,6 +1044,7 @@ void wpa_supplicant_set_state(struct wpa - sme_sched_obss_scan(wpa_s, 0); - } - wpa_s->wpa_state = state; -+ wpas_ucode_update_state(wpa_s); - - #ifdef CONFIG_BGSCAN - if (state == WPA_COMPLETED && wpa_s->current_ssid != wpa_s->bgscan_ssid) -@@ -7594,6 +7595,7 @@ struct wpa_supplicant * wpa_supplicant_a - #endif /* CONFIG_P2P */ - - wpas_ubus_add_bss(wpa_s); -+ wpas_ucode_add_bss(wpa_s); - - return wpa_s; - } -@@ -7621,6 +7623,7 @@ int wpa_supplicant_remove_iface(struct w - struct wpa_supplicant *parent = wpa_s->parent; - #endif /* CONFIG_MESH */ - -+ wpas_ucode_free_bss(wpa_s); - wpas_ubus_free_bss(wpa_s); - - /* Remove interface from the global list of interfaces */ -@@ -7931,6 +7934,7 @@ struct wpa_global * wpa_supplicant_init( - - eloop_register_timeout(WPA_SUPPLICANT_CLEANUP_INTERVAL, 0, - wpas_periodic, global, NULL); -+ wpas_ucode_init(global); - - return global; - } -@@ -7969,12 +7973,8 @@ int wpa_supplicant_run(struct wpa_global - eloop_register_signal_terminate(wpa_supplicant_terminate, global); - eloop_register_signal_reconfig(wpa_supplicant_reconfig, global); - -- wpas_ubus_add(global); -- - eloop_run(); - -- wpas_ubus_free(global); -- - return 0; - } - -@@ -8007,6 +8007,8 @@ void wpa_supplicant_deinit(struct wpa_gl - - wpas_notify_supplicant_deinitialized(global); - -+ wpas_ucode_free(); -+ - eap_peer_unregister_methods(); - #ifdef CONFIG_AP - eap_server_unregister_methods(); ---- a/wpa_supplicant/wpa_supplicant_i.h -+++ b/wpa_supplicant/wpa_supplicant_i.h -@@ -22,6 +22,7 @@ - #include "wmm_ac.h" - #include "pasn/pasn_common.h" - #include "ubus.h" -+#include "ucode.h" - - extern const char *const wpa_supplicant_version; - extern const char *const wpa_supplicant_license; -@@ -689,6 +690,7 @@ struct wpa_supplicant { - unsigned char perm_addr[ETH_ALEN]; - char ifname[100]; - struct wpas_ubus_bss ubus; -+ struct wpas_ucode_bss ucode; - #ifdef CONFIG_MATCH_IFACE - int matched; - #endif /* CONFIG_MATCH_IFACE */ ---- a/hostapd/ctrl_iface.c -+++ b/hostapd/ctrl_iface.c -@@ -4856,6 +4856,7 @@ try_again: - return -1; - } - -+ interface->ctrl_iface_recv = hostapd_ctrl_iface_receive_process; - wpa_msg_register_cb(hostapd_ctrl_iface_msg_cb); - - return 0; -@@ -4957,6 +4958,7 @@ fail: - os_free(fname); - - interface->global_ctrl_sock = s; -+ interface->ctrl_iface_recv = hostapd_ctrl_iface_receive_process; - eloop_register_read_sock(s, hostapd_global_ctrl_iface_receive, - interface, NULL); - --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -3787,6 +3787,25 @@ struct wpa_driver_ops { +@@ -3856,6 +3856,25 @@ struct wpa_driver_ops { const char *ifname); /** @@ -306,7 +232,7 @@ * set_sta_vlan - Bind a station into a specific interface (AP only) * @priv: Private driver interface data * @ifname: Interface (main or virtual BSS or VLAN) -@@ -6440,6 +6459,7 @@ union wpa_event_data { +@@ -6510,6 +6529,7 @@ union wpa_event_data { /** * struct ch_switch @@ -314,7 +240,7 @@ * @freq: Frequency of new channel in MHz * @ht_enabled: Whether this is an HT channel * @ch_offset: Secondary channel offset -@@ -6450,6 +6470,7 @@ union wpa_event_data { +@@ -6520,6 +6540,7 @@ union wpa_event_data { * @punct_bitmap: Puncturing bitmap */ struct ch_switch { @@ -322,80 +248,9 @@ int freq; int ht_enabled; int ch_offset; ---- a/src/drivers/driver_nl80211_event.c -+++ b/src/drivers/driver_nl80211_event.c -@@ -1202,6 +1202,7 @@ static void mlme_event_ch_switch(struct - struct nlattr *bw, struct nlattr *cf1, - struct nlattr *cf2, - struct nlattr *punct_bitmap, -+ struct nlattr *count, - int finished) - { - struct i802_bss *bss; -@@ -1265,6 +1266,8 @@ static void mlme_event_ch_switch(struct - data.ch_switch.cf1 = nla_get_u32(cf1); - if (cf2) - data.ch_switch.cf2 = nla_get_u32(cf2); -+ if (count) -+ data.ch_switch.count = nla_get_u32(count); - - if (finished) - bss->flink->freq = data.ch_switch.freq; -@@ -3912,6 +3915,7 @@ static void do_process_drv_event(struct - tb[NL80211_ATTR_CENTER_FREQ1], - tb[NL80211_ATTR_CENTER_FREQ2], - tb[NL80211_ATTR_PUNCT_BITMAP], -+ tb[NL80211_ATTR_CH_SWITCH_COUNT], - 0); - break; - case NL80211_CMD_CH_SWITCH_NOTIFY: -@@ -3924,6 +3928,7 @@ static void do_process_drv_event(struct - tb[NL80211_ATTR_CENTER_FREQ1], - tb[NL80211_ATTR_CENTER_FREQ2], - tb[NL80211_ATTR_PUNCT_BITMAP], -+ NULL, - 1); - break; - case NL80211_CMD_DISCONNECT: ---- a/wpa_supplicant/events.c -+++ b/wpa_supplicant/events.c -@@ -5389,6 +5389,7 @@ void supplicant_event(void *ctx, enum wp - event_to_string(event), event); - #endif /* CONFIG_NO_STDOUT_DEBUG */ - -+ wpas_ucode_event(wpa_s, event, data); - switch (event) { - case EVENT_AUTH: - #ifdef CONFIG_FST ---- a/src/ap/ap_drv_ops.h -+++ b/src/ap/ap_drv_ops.h -@@ -393,6 +393,23 @@ static inline int hostapd_drv_stop_ap(st - return hapd->driver->stop_ap(hapd->drv_priv); - } - -+static inline int hostapd_drv_if_rename(struct hostapd_data *hapd, -+ enum wpa_driver_if_type type, -+ const char *ifname, -+ const char *new_name) -+{ -+ if (!hapd->driver || !hapd->driver->if_rename || !hapd->drv_priv) -+ return -1; -+ return hapd->driver->if_rename(hapd->drv_priv, type, ifname, new_name); -+} -+ -+static inline int hostapd_drv_set_first_bss(struct hostapd_data *hapd) -+{ -+ if (!hapd->driver || !hapd->driver->set_first_bss || !hapd->drv_priv) -+ return 0; -+ return hapd->driver->set_first_bss(hapd->drv_priv); -+} -+ - static inline int hostapd_drv_channel_info(struct hostapd_data *hapd, - struct wpa_channel_info *ci) - { --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -73,6 +73,16 @@ enum nlmsgerr_attrs { +@@ -75,6 +75,16 @@ enum nlmsgerr_attrs { #endif /* ANDROID */ @@ -412,7 +267,7 @@ static struct nl_sock * nl_create_handle(struct nl_cb *cb, const char *dbg) { -@@ -379,6 +389,11 @@ static int no_seq_check(struct nl_msg *m +@@ -429,6 +439,11 @@ static int no_seq_check(struct nl_msg *m return NL_OK; } @@ -424,23 +279,24 @@ static void nl80211_nlmsg_clear(struct nl_msg *msg) { -@@ -415,6 +430,7 @@ static int send_and_recv(struct nl80211_ +@@ -502,6 +517,8 @@ int send_and_recv(struct nl80211_global if (!msg) return -ENOMEM; + handle_nl_debug_hook(msg, 1); - cb = nl_cb_clone(global->nl_cb); - if (!cb) - goto out; -@@ -443,6 +459,7 @@ static int send_and_recv(struct nl80211_ ++ + err.err = -ENOMEM; - err = 1; + s_nl_cb = nl_socket_get_cb(nl_handle); +@@ -536,6 +553,7 @@ int send_and_recv(struct nl80211_global + err.orig_msg = msg; + err.err_info = err_info; + nl_cb_set(cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL); nl_cb_err(cb, NL_CB_CUSTOM, error_handler, &err); - nl_cb_set(cb, NL_CB_FINISH, NL_CB_CUSTOM, finish_handler, &err); + nl_cb_set(cb, NL_CB_FINISH, NL_CB_CUSTOM, finish_handler, &err.err); if (ack_handler_custom) { -@@ -919,6 +936,7 @@ nl80211_get_wiphy_data_ap(struct i802_bs +@@ -939,6 +957,7 @@ nl80211_get_wiphy_data_ap(struct i802_bs os_free(w); return NULL; } @@ -448,7 +304,7 @@ nl_cb_set(w->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM, no_seq_check, NULL); nl_cb_set(w->nl_cb, NL_CB_VALID, NL_CB_CUSTOM, -@@ -1333,7 +1351,7 @@ static void wpa_driver_nl80211_event_rtm +@@ -1353,7 +1372,7 @@ static void wpa_driver_nl80211_event_rtm } wpa_printf(MSG_DEBUG, "nl80211: Interface down (%s/%s)", namebuf, ifname); @@ -457,7 +313,7 @@ wpa_printf(MSG_DEBUG, "nl80211: Not the main interface (%s) - do not indicate interface down", drv->first_bss->ifname); -@@ -1369,7 +1387,7 @@ static void wpa_driver_nl80211_event_rtm +@@ -1389,7 +1408,7 @@ static void wpa_driver_nl80211_event_rtm } wpa_printf(MSG_DEBUG, "nl80211: Interface up (%s/%s)", namebuf, ifname); @@ -466,15 +322,15 @@ wpa_printf(MSG_DEBUG, "nl80211: Not the main interface (%s) - do not indicate interface up", drv->first_bss->ifname); -@@ -1992,6 +2010,7 @@ static int wpa_driver_nl80211_init_nl_gl - /* Continue without vendor events */ - } +@@ -2035,6 +2054,7 @@ static int wpa_driver_nl80211_init_nl_gl + genl_family_put(family); + nl_cache_free(cache); + nl_cb_set(global->nl_cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL); nl_cb_set(global->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM, no_seq_check, NULL); nl_cb_set(global->nl_cb, NL_CB_VALID, NL_CB_CUSTOM, -@@ -2160,6 +2179,7 @@ static int nl80211_init_bss(struct i802_ +@@ -2205,6 +2225,7 @@ static int nl80211_init_bss(struct i802_ if (!bss->nl_cb) return -1; @@ -482,7 +338,7 @@ nl_cb_set(bss->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM, no_seq_check, NULL); nl_cb_set(bss->nl_cb, NL_CB_VALID, NL_CB_CUSTOM, -@@ -8432,6 +8452,7 @@ static void *i802_init(struct hostapd_da +@@ -8554,6 +8575,7 @@ static void *i802_init(struct hostapd_da char master_ifname[IFNAMSIZ]; int ifindex, br_ifindex = 0; int br_added = 0; @@ -490,7 +346,7 @@ bss = wpa_driver_nl80211_drv_init(hapd, params->ifname, params->global_priv, 1, -@@ -8491,21 +8512,17 @@ static void *i802_init(struct hostapd_da +@@ -8613,21 +8635,17 @@ static void *i802_init(struct hostapd_da (params->num_bridge == 0 || !params->bridge[0])) add_ifidx(drv, br_ifindex, drv->ifindex); @@ -522,7 +378,7 @@ } if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) { -@@ -8875,6 +8892,50 @@ static int wpa_driver_nl80211_if_remove( +@@ -8992,6 +9010,50 @@ static int wpa_driver_nl80211_if_remove( return 0; } @@ -573,7 +429,7 @@ static int cookie_handler(struct nl_msg *msg, void *arg) { -@@ -10513,6 +10574,37 @@ static int driver_nl80211_if_remove(void +@@ -10688,6 +10750,37 @@ static int driver_nl80211_if_remove(void } @@ -611,7 +467,7 @@ static int driver_nl80211_send_mlme(void *priv, const u8 *data, size_t data_len, int noack, unsigned int freq, -@@ -13697,6 +13789,8 @@ const struct wpa_driver_ops wpa_driver_n +@@ -13881,6 +13974,8 @@ const struct wpa_driver_ops wpa_driver_n .set_acl = wpa_driver_nl80211_set_acl, .if_add = wpa_driver_nl80211_if_add, .if_remove = driver_nl80211_if_remove, @@ -620,6 +476,41 @@ .send_mlme = driver_nl80211_send_mlme, .get_hw_feature_data = nl80211_get_hw_feature_data, .sta_add = wpa_driver_nl80211_sta_add, +--- a/src/drivers/driver_nl80211_event.c ++++ b/src/drivers/driver_nl80211_event.c +@@ -1196,6 +1196,7 @@ static void mlme_event_ch_switch(struct + struct nlattr *bw, struct nlattr *cf1, + struct nlattr *cf2, + struct nlattr *punct_bitmap, ++ struct nlattr *count, + int finished) + { + struct i802_bss *bss; +@@ -1259,6 +1260,8 @@ static void mlme_event_ch_switch(struct + data.ch_switch.cf1 = nla_get_u32(cf1); + if (cf2) + data.ch_switch.cf2 = nla_get_u32(cf2); ++ if (count) ++ data.ch_switch.count = nla_get_u32(count); + + if (finished) + bss->flink->freq = data.ch_switch.freq; +@@ -3961,6 +3964,7 @@ static void do_process_drv_event(struct + tb[NL80211_ATTR_CENTER_FREQ1], + tb[NL80211_ATTR_CENTER_FREQ2], + tb[NL80211_ATTR_PUNCT_BITMAP], ++ tb[NL80211_ATTR_CH_SWITCH_COUNT], + 0); + break; + case NL80211_CMD_CH_SWITCH_NOTIFY: +@@ -3973,6 +3977,7 @@ static void do_process_drv_event(struct + tb[NL80211_ATTR_CENTER_FREQ1], + tb[NL80211_ATTR_CENTER_FREQ2], + tb[NL80211_ATTR_PUNCT_BITMAP], ++ NULL, + 1); + break; + case NL80211_CMD_DISCONNECT: --- a/src/utils/wpa_debug.c +++ b/src/utils/wpa_debug.c @@ -26,6 +26,10 @@ static FILE *wpa_debug_tracing_file = NU @@ -669,3 +560,121 @@ extern int wpa_debug_level; extern int wpa_debug_show_keys; extern int wpa_debug_timestamp; +--- a/wpa_supplicant/Makefile ++++ b/wpa_supplicant/Makefile +@@ -192,8 +192,20 @@ endif + ifdef CONFIG_UBUS + CFLAGS += -DUBUS_SUPPORT + OBJS += ubus.o ++LIBS += -lubus ++NEED_ULOOP:=y ++endif ++ ++ifdef CONFIG_UCODE ++CFLAGS += -DUCODE_SUPPORT ++OBJS += ../src/utils/ucode.o ++OBJS += ucode.o ++NEED_ULOOP:=y ++endif ++ ++ifdef NEED_ULOOP + OBJS += ../src/utils/uloop.o +-LIBS += -lubox -lubus ++LIBS += -lubox + endif + + ifdef CONFIG_CODE_COVERAGE +@@ -1052,6 +1064,9 @@ OBJS += ../src/ap/ctrl_iface_ap.o + ifdef CONFIG_UBUS + OBJS += ../src/ap/ubus.o + endif ++ifdef CONFIG_UCODE ++OBJS += ../src/ap/ucode.o ++endif + endif + + CFLAGS += -DEAP_SERVER -DEAP_SERVER_IDENTITY +--- a/wpa_supplicant/events.c ++++ b/wpa_supplicant/events.c +@@ -5949,6 +5949,7 @@ void supplicant_event(void *ctx, enum wp + event_to_string(event), event); + #endif /* CONFIG_NO_STDOUT_DEBUG */ + ++ wpas_ucode_event(wpa_s, event, data); + switch (event) { + case EVENT_AUTH: + #ifdef CONFIG_FST +--- a/wpa_supplicant/wpa_supplicant.c ++++ b/wpa_supplicant/wpa_supplicant.c +@@ -1060,6 +1060,7 @@ void wpa_supplicant_set_state(struct wpa + sme_sched_obss_scan(wpa_s, 0); + } + wpa_s->wpa_state = state; ++ wpas_ucode_update_state(wpa_s); + + #ifdef CONFIG_BGSCAN + if (state == WPA_COMPLETED && wpa_s->current_ssid != wpa_s->bgscan_ssid) +@@ -7717,6 +7718,7 @@ struct wpa_supplicant * wpa_supplicant_a + #endif /* CONFIG_P2P */ + + wpas_ubus_add_bss(wpa_s); ++ wpas_ucode_add_bss(wpa_s); + + return wpa_s; + } +@@ -7744,6 +7746,7 @@ int wpa_supplicant_remove_iface(struct w + struct wpa_supplicant *parent = wpa_s->parent; + #endif /* CONFIG_MESH */ + ++ wpas_ucode_free_bss(wpa_s); + wpas_ubus_free_bss(wpa_s); + + /* Remove interface from the global list of interfaces */ +@@ -8054,6 +8057,7 @@ struct wpa_global * wpa_supplicant_init( + + eloop_register_timeout(WPA_SUPPLICANT_CLEANUP_INTERVAL, 0, + wpas_periodic, global, NULL); ++ wpas_ucode_init(global); + + return global; + } +@@ -8092,12 +8096,8 @@ int wpa_supplicant_run(struct wpa_global + eloop_register_signal_terminate(wpa_supplicant_terminate, global); + eloop_register_signal_reconfig(wpa_supplicant_reconfig, global); + +- wpas_ubus_add(global); +- + eloop_run(); + +- wpas_ubus_free(global); +- + return 0; + } + +@@ -8130,6 +8130,8 @@ void wpa_supplicant_deinit(struct wpa_gl + + wpas_notify_supplicant_deinitialized(global); + ++ wpas_ucode_free(); ++ + eap_peer_unregister_methods(); + #ifdef CONFIG_AP + eap_server_unregister_methods(); +--- a/wpa_supplicant/wpa_supplicant_i.h ++++ b/wpa_supplicant/wpa_supplicant_i.h +@@ -22,6 +22,7 @@ + #include "wmm_ac.h" + #include "pasn/pasn_common.h" + #include "ubus.h" ++#include "ucode.h" + + extern const char *const wpa_supplicant_version; + extern const char *const wpa_supplicant_license; +@@ -697,6 +698,7 @@ struct wpa_supplicant { + unsigned char perm_addr[ETH_ALEN]; + char ifname[100]; + struct wpas_ubus_bss ubus; ++ struct wpas_ucode_bss ucode; + #ifdef CONFIG_MATCH_IFACE + int matched; + #endif /* CONFIG_MATCH_IFACE */ diff --git a/package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch b/package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch index a03fcc9f92..30f675573a 100644 --- a/package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch +++ b/package/network/services/hostapd/patches/610-hostapd_cli_ujail_permission.patch @@ -1,3 +1,43 @@ +From: Mark Mentovai +Date: Tue, 23 Nov 2021 12:28:55 -0500 +Subject: [PATCH] hostapd: allow hostapd under ujail to communicate with + hostapd_cli + +When procd-ujail is available, 1f78538 runs hostapd as user +"network", with only limited additional capabilities (CAP_NET_ADMIN and +CAP_NET_RAW). + +hostapd_cli (CONFIG_PACKAGE_hostapd-utils) communicates with hostapd +over a named UNIX-domain socket. hostapd_cli is responsible for creating +this socket at /tmp/wpa_ctrl_$pid_$counter. Since it typically runs as +root, this endpoint is normally created with uid root, gid root, mode +0755. As a result, hostapd running as uid network is able to receive +control messages sent through this interface, but is not able to respond +to them. If debug-level logging is enabled (CONFIG_WPA_MSG_MIN_PRIORITY +<= 2 at build, and log_level <= 2 in /etc/config/wireless wifi-device), +this message will appear from hostapd: + +CTRL: sendto failed: Permission denied + +As a fix, hostapd_cli should create the socket node in the filesystem +with uid network, gid network, mode 0770. This borrows the presently +Android-only strategy already in hostapd intended to solve the same +problem on Android. + +If procd-ujail is not available and hostapd falls back to running as +root, it will still be able to read from and write to the socket even if +the node in the filesystem has been restricted to the network user and +group. This matches the logic in +package/network/services/hostapd/files/wpad.init, which sets the uid and +gid of /var/run/hostapd to network regardless of whether procd-ujail is +available. + +As it appears that the "network" user and group are statically allocated +uid 101 and gid 101, respectively, per +package/base-files/files/etc/passwd and USERID in +package/network/services/hostapd/Makefile, this patch also uses a +constant 101 for the uid and gid. + --- a/src/common/wpa_ctrl.c +++ b/src/common/wpa_ctrl.c @@ -135,7 +135,7 @@ try_again: diff --git a/package/network/services/hostapd/patches/701-reload_config_inline.patch b/package/network/services/hostapd/patches/701-reload_config_inline.patch index 3c62bf670f..260e832ddb 100644 --- a/package/network/services/hostapd/patches/701-reload_config_inline.patch +++ b/package/network/services/hostapd/patches/701-reload_config_inline.patch @@ -1,6 +1,14 @@ +From: Felix Fietkau +Date: Fri, 26 May 2023 10:23:59 +0200 +Subject: [PATCH] Add ucode support, use ucode for the main ubus object #2 + +This implements vastly improved dynamic configuration reload support. +It can handle configuration changes on individual wifi interfaces, as well +as adding/removing interfaces. + --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -4816,7 +4816,12 @@ struct hostapd_config * hostapd_config_r +@@ -5065,7 +5065,12 @@ struct hostapd_config * hostapd_config_r int errors = 0; size_t i; diff --git a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch b/package/network/services/hostapd/patches/710-vlan_no_bridge.patch index 63d1b8a3b8..d3f797ed35 100644 --- a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch +++ b/package/network/services/hostapd/patches/710-vlan_no_bridge.patch @@ -1,3 +1,22 @@ +From: Felix Fietkau +Date: Tue, 18 May 2021 12:50:17 +0200 +Subject: [PATCH] hostapd: add patch for disabling automatic bridging of vlan + interfaces + +netifd is responsible for handling that, except if the vlan bridge +was provided by the config + +--- a/hostapd/config_file.c ++++ b/hostapd/config_file.c +@@ -3559,6 +3559,8 @@ static int hostapd_config_fill(struct ho + #ifndef CONFIG_NO_VLAN + } else if (os_strcmp(buf, "dynamic_vlan") == 0) { + bss->ssid.dynamic_vlan = atoi(pos); ++ } else if (os_strcmp(buf, "vlan_no_bridge") == 0) { ++ bss->ssid.vlan_no_bridge = atoi(pos); + } else if (os_strcmp(buf, "per_sta_vif") == 0) { + bss->ssid.per_sta_vif = atoi(pos); + } else if (os_strcmp(buf, "vlan_file") == 0) { --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h @@ -121,6 +121,7 @@ struct hostapd_ssid { @@ -28,14 +47,3 @@ ifconfig_up(ifname); } ---- a/hostapd/config_file.c -+++ b/hostapd/config_file.c -@@ -3351,6 +3351,8 @@ static int hostapd_config_fill(struct ho - #ifndef CONFIG_NO_VLAN - } else if (os_strcmp(buf, "dynamic_vlan") == 0) { - bss->ssid.dynamic_vlan = atoi(pos); -+ } else if (os_strcmp(buf, "vlan_no_bridge") == 0) { -+ bss->ssid.vlan_no_bridge = atoi(pos); - } else if (os_strcmp(buf, "per_sta_vif") == 0) { - bss->ssid.per_sta_vif = atoi(pos); - } else if (os_strcmp(buf, "vlan_file") == 0) { diff --git a/package/network/services/hostapd/patches/711-wds_bridge_force.patch b/package/network/services/hostapd/patches/711-wds_bridge_force.patch index c0f2c31c44..dbd75658ae 100644 --- a/package/network/services/hostapd/patches/711-wds_bridge_force.patch +++ b/package/network/services/hostapd/patches/711-wds_bridge_force.patch @@ -1,6 +1,17 @@ +From: Felix Fietkau +Date: Wed, 20 Oct 2021 21:13:10 +0200 +Subject: [PATCH] hostpad: fix a race condition on adding AP mode wds sta + interfaces + +Both hostapd and netifd attempt to add a VLAN device to a bridge. +Depending on which one wins the race, bridge vlan settings might be incomplete, +or hostapd might run into an error and refuse to service the client. +Fix this by preventing hostapd from adding interfaces to the bridge and +instead rely entirely on netifd handling this properly + --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -2318,6 +2318,8 @@ static int hostapd_config_fill(struct ho +@@ -2447,6 +2447,8 @@ static int hostapd_config_fill(struct ho sizeof(conf->bss[0]->iface)); } else if (os_strcmp(buf, "bridge") == 0) { os_strlcpy(bss->bridge, pos, sizeof(bss->bridge)); @@ -11,7 +22,7 @@ } else if (os_strcmp(buf, "vlan_bridge") == 0) { --- a/src/ap/ap_drv_ops.c +++ b/src/ap/ap_drv_ops.c -@@ -348,8 +348,6 @@ int hostapd_set_wds_sta(struct hostapd_d +@@ -387,8 +387,6 @@ int hostapd_set_wds_sta(struct hostapd_d return -1; if (hapd->conf->wds_bridge[0]) bridge = hapd->conf->wds_bridge; diff --git a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch b/package/network/services/hostapd/patches/720-iface_max_num_sta.patch index 089c1ddc24..fb00313f3d 100644 --- a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch +++ b/package/network/services/hostapd/patches/720-iface_max_num_sta.patch @@ -1,6 +1,14 @@ +From: Felix Fietkau +Date: Wed, 26 May 2021 14:34:46 +0200 +Subject: [PATCH] hostapd: add support for specifying the maxassoc parameter as + a device option + +It allows enforcing a limit on associated stations to be enforced for the +full device, e.g. in order to deal with hardware/driver limitations + --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -2848,6 +2848,14 @@ static int hostapd_config_fill(struct ho +@@ -3041,6 +3041,14 @@ static int hostapd_config_fill(struct ho line, bss->max_num_sta, MAX_STA_COUNT); return 1; } @@ -15,19 +23,31 @@ } else if (os_strcmp(buf, "wpa") == 0) { bss->wpa = atoi(pos); } else if (os_strcmp(buf, "extended_key_id") == 0) { ---- a/src/ap/hostapd.h -+++ b/src/ap/hostapd.h -@@ -742,6 +742,7 @@ void hostapd_cleanup_cs_params(struct ho - void hostapd_periodic_iface(struct hostapd_iface *iface); - int hostapd_owe_trans_get_info(struct hostapd_data *hapd); - void hostapd_ocv_check_csa_sa_query(void *eloop_ctx, void *timeout_ctx); -+int hostapd_check_max_sta(struct hostapd_data *hapd); +--- a/src/ap/ap_config.h ++++ b/src/ap/ap_config.h +@@ -1057,6 +1057,8 @@ struct hostapd_config { + unsigned int track_sta_max_num; + unsigned int track_sta_max_age; - void hostapd_switch_color(struct hostapd_data *hapd, u64 bitmap); - void hostapd_cleanup_cca_params(struct hostapd_data *hapd); ++ int max_num_sta; ++ + char country[3]; /* first two octets: country code as described in + * ISO/IEC 3166-1. Third octet: + * ' ' (ascii 32): all environments +--- a/src/ap/beacon.c ++++ b/src/ap/beacon.c +@@ -1567,7 +1567,7 @@ void handle_probe_req(struct hostapd_dat + if (hapd->conf->no_probe_resp_if_max_sta && + is_multicast_ether_addr(mgmt->da) && + is_multicast_ether_addr(mgmt->bssid) && +- hapd->num_sta >= hapd->conf->max_num_sta && ++ hostapd_check_max_sta(hapd) && + !ap_get_sta(hapd, mgmt->sa)) { + wpa_printf(MSG_MSGDUMP, "%s: Ignore Probe Request from " MACSTR + " since no room for additional STA", --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -244,6 +244,29 @@ static int hostapd_iface_conf_changed(st +@@ -247,6 +247,29 @@ static int hostapd_iface_conf_changed(st return 0; } @@ -57,25 +77,13 @@ int hostapd_reload_config(struct hostapd_iface *iface) { ---- a/src/ap/beacon.c -+++ b/src/ap/beacon.c -@@ -1252,7 +1252,7 @@ void handle_probe_req(struct hostapd_dat - if (hapd->conf->no_probe_resp_if_max_sta && - is_multicast_ether_addr(mgmt->da) && - is_multicast_ether_addr(mgmt->bssid) && -- hapd->num_sta >= hapd->conf->max_num_sta && -+ hostapd_check_max_sta(hapd) && - !ap_get_sta(hapd, mgmt->sa)) { - wpa_printf(MSG_MSGDUMP, "%s: Ignore Probe Request from " MACSTR - " since no room for additional STA", ---- a/src/ap/ap_config.h -+++ b/src/ap/ap_config.h -@@ -1039,6 +1039,8 @@ struct hostapd_config { - unsigned int track_sta_max_num; - unsigned int track_sta_max_age; +--- a/src/ap/hostapd.h ++++ b/src/ap/hostapd.h +@@ -754,6 +754,7 @@ void hostapd_cleanup_cs_params(struct ho + void hostapd_periodic_iface(struct hostapd_iface *iface); + int hostapd_owe_trans_get_info(struct hostapd_data *hapd); + void hostapd_ocv_check_csa_sa_query(void *eloop_ctx, void *timeout_ctx); ++int hostapd_check_max_sta(struct hostapd_data *hapd); -+ int max_num_sta; -+ - char country[3]; /* first two octets: country code as described in - * ISO/IEC 3166-1. Third octet: - * ' ' (ascii 32): all environments + void hostapd_switch_color(struct hostapd_data *hapd, u64 bitmap); + void hostapd_cleanup_cca_params(struct hostapd_data *hapd); diff --git a/package/network/services/hostapd/patches/730-ft_iface.patch b/package/network/services/hostapd/patches/730-ft_iface.patch index 0795ed15a1..2f47f17d96 100644 --- a/package/network/services/hostapd/patches/730-ft_iface.patch +++ b/package/network/services/hostapd/patches/730-ft_iface.patch @@ -1,6 +1,14 @@ +From: Felix Fietkau +Date: Fri, 4 Jun 2021 09:12:07 +0200 +Subject: [PATCH] hostapd: configure inter-AP communication interface for + 802.11r + +In setups using VLAN bridge filtering, hostapd may need to communicate using +a VLAN interface on top of the bridge, instead of using the bridge directly + --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3007,6 +3007,8 @@ static int hostapd_config_fill(struct ho +@@ -3200,6 +3200,8 @@ static int hostapd_config_fill(struct ho wpa_printf(MSG_INFO, "Line %d: Obsolete peerkey parameter ignored", line); #ifdef CONFIG_IEEE80211R_AP @@ -21,7 +29,7 @@ int bridge_hairpin; /* hairpin_mode on bridge members */ --- a/src/ap/wpa_auth_glue.c +++ b/src/ap/wpa_auth_glue.c -@@ -1727,8 +1727,12 @@ int hostapd_setup_wpa(struct hostapd_dat +@@ -1777,8 +1777,12 @@ int hostapd_setup_wpa(struct hostapd_dat wpa_key_mgmt_ft(hapd->conf->wpa_key_mgmt)) { const char *ft_iface; diff --git a/package/network/services/hostapd/patches/740-snoop_iface.patch b/package/network/services/hostapd/patches/740-snoop_iface.patch index ce64513a42..f4b3ac33b1 100644 --- a/package/network/services/hostapd/patches/740-snoop_iface.patch +++ b/package/network/services/hostapd/patches/740-snoop_iface.patch @@ -1,3 +1,22 @@ +From: Felix Fietkau +Date: Tue, 27 Jul 2021 20:28:58 +0200 +Subject: [PATCH] hostapd: make the snooping interface (for proxyarp) + configurable + +Use the VLAN interface instead of the bridge, to ensure that hostapd receives +untagged DHCP packets + +--- a/hostapd/config_file.c ++++ b/hostapd/config_file.c +@@ -2451,6 +2451,8 @@ static int hostapd_config_fill(struct ho + os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge)); + } else if (os_strcmp(buf, "bridge_hairpin") == 0) { + bss->bridge_hairpin = atoi(pos); ++ } else if (os_strcmp(buf, "snoop_iface") == 0) { ++ os_strlcpy(bss->snoop_iface, pos, sizeof(bss->snoop_iface)); + } else if (os_strcmp(buf, "vlan_bridge") == 0) { + os_strlcpy(bss->vlan_bridge, pos, sizeof(bss->vlan_bridge)); + } else if (os_strcmp(buf, "wds_bridge") == 0) { --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h @@ -284,6 +284,7 @@ struct hostapd_bss_config { @@ -8,6 +27,23 @@ char vlan_bridge[IFNAMSIZ + 1]; char wds_bridge[IFNAMSIZ + 1]; int bridge_hairpin; /* hairpin_mode on bridge members */ +--- a/src/ap/ap_drv_ops.h ++++ b/src/ap/ap_drv_ops.h +@@ -366,12 +366,12 @@ static inline int hostapd_drv_br_port_se + + static inline int hostapd_drv_br_set_net_param(struct hostapd_data *hapd, + enum drv_br_net_param param, +- unsigned int val) ++ const char *ifname, unsigned int val) + { + if (hapd->driver == NULL || hapd->drv_priv == NULL || + hapd->driver->br_set_net_param == NULL) + return -1; +- return hapd->driver->br_set_net_param(hapd->drv_priv, param, val); ++ return hapd->driver->br_set_net_param(hapd->drv_priv, param, ifname, val); + } + + static inline int hostapd_drv_vendor_cmd(struct hostapd_data *hapd, --- a/src/ap/x_snoop.c +++ b/src/ap/x_snoop.c @@ -33,28 +33,31 @@ int x_snoop_init(struct hostapd_data *ha @@ -74,37 +110,9 @@ hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_PROXYARP, 0); hostapd_drv_br_port_set_attr(hapd, DRV_BR_PORT_ATTR_HAIRPIN_MODE, 0); hapd->x_snoop_initialized = false; ---- a/hostapd/config_file.c -+++ b/hostapd/config_file.c -@@ -2322,6 +2322,8 @@ static int hostapd_config_fill(struct ho - os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge)); - } else if (os_strcmp(buf, "bridge_hairpin") == 0) { - bss->bridge_hairpin = atoi(pos); -+ } else if (os_strcmp(buf, "snoop_iface") == 0) { -+ os_strlcpy(bss->snoop_iface, pos, sizeof(bss->snoop_iface)); - } else if (os_strcmp(buf, "vlan_bridge") == 0) { - os_strlcpy(bss->vlan_bridge, pos, sizeof(bss->vlan_bridge)); - } else if (os_strcmp(buf, "wds_bridge") == 0) { ---- a/src/ap/ap_drv_ops.h -+++ b/src/ap/ap_drv_ops.h -@@ -366,12 +366,12 @@ static inline int hostapd_drv_br_port_se - - static inline int hostapd_drv_br_set_net_param(struct hostapd_data *hapd, - enum drv_br_net_param param, -- unsigned int val) -+ const char *ifname, unsigned int val) - { - if (hapd->driver == NULL || hapd->drv_priv == NULL || - hapd->driver->br_set_net_param == NULL) - return -1; -- return hapd->driver->br_set_net_param(hapd->drv_priv, param, val); -+ return hapd->driver->br_set_net_param(hapd->drv_priv, param, ifname, val); - } - - static inline int hostapd_drv_vendor_cmd(struct hostapd_data *hapd, --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -4209,7 +4209,7 @@ struct wpa_driver_ops { +@@ -4278,7 +4278,7 @@ struct wpa_driver_ops { * Returns: 0 on success, negative (<0) on failure */ int (*br_set_net_param)(void *priv, enum drv_br_net_param param, @@ -115,7 +123,7 @@ * get_wowlan - Get wake-on-wireless status --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -12168,7 +12168,7 @@ static const char * drv_br_net_param_str +@@ -12376,7 +12376,7 @@ static const char * drv_br_net_param_str static int wpa_driver_br_set_net_param(void *priv, enum drv_br_net_param param, @@ -124,7 +132,7 @@ { struct i802_bss *bss = priv; char path[128]; -@@ -12194,8 +12194,11 @@ static int wpa_driver_br_set_net_param(v +@@ -12402,8 +12402,11 @@ static int wpa_driver_br_set_net_param(v return -EINVAL; } diff --git a/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch b/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch index f5ebab70d1..86394d78a4 100644 --- a/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch +++ b/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch @@ -1,6 +1,13 @@ +From: Felix Fietkau +Date: Thu, 23 Dec 2021 19:18:33 +0100 +Subject: [PATCH] hostapd: only attempt to set qos map if supported by the + driver + +Fixes issues with brcmfmac + --- a/src/ap/ap_drv_ops.c +++ b/src/ap/ap_drv_ops.c -@@ -927,7 +927,8 @@ int hostapd_start_dfs_cac(struct hostapd +@@ -998,7 +998,8 @@ int hostapd_start_dfs_cac(struct hostapd int hostapd_drv_set_qos_map(struct hostapd_data *hapd, const u8 *qos_map_set, u8 qos_map_set_len) { diff --git a/package/network/services/hostapd/patches/760-dynamic_own_ip.patch b/package/network/services/hostapd/patches/760-dynamic_own_ip.patch index 2c705a68cf..c4b14d41b0 100644 --- a/package/network/services/hostapd/patches/760-dynamic_own_ip.patch +++ b/package/network/services/hostapd/patches/760-dynamic_own_ip.patch @@ -1,3 +1,21 @@ +From: Felix Fietkau +Date: Thu, 15 Dec 2022 13:57:04 +0100 +Subject: [PATCH] hostapd: add support for automatically setting RADIUS own-ip + dynamically + +Some servers use the NAS-IP-Address attribute as a destination address + +--- a/hostapd/config_file.c ++++ b/hostapd/config_file.c +@@ -2819,6 +2819,8 @@ static int hostapd_config_fill(struct ho + } else if (os_strcmp(buf, "iapp_interface") == 0) { + wpa_printf(MSG_INFO, "DEPRECATED: iapp_interface not used"); + #endif /* CONFIG_IAPP */ ++ } else if (os_strcmp(buf, "dynamic_own_ip_addr") == 0) { ++ bss->dynamic_own_ip_addr = atoi(pos); + } else if (os_strcmp(buf, "own_ip_addr") == 0) { + if (hostapd_parse_ip_addr(pos, &bss->own_ip_addr)) { + wpa_printf(MSG_ERROR, --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h @@ -310,6 +310,7 @@ struct hostapd_bss_config { @@ -8,9 +26,22 @@ char *nas_identifier; struct hostapd_radius_servers *radius; int acct_interim_interval; +--- a/src/ap/ieee802_1x.c ++++ b/src/ap/ieee802_1x.c +@@ -601,6 +601,10 @@ int add_common_radius_attr(struct hostap + struct hostapd_radius_attr *attr; + int len; + ++ if (hapd->conf->dynamic_own_ip_addr) ++ radius_client_get_local_addr(hapd->radius, ++ &hapd->conf->own_ip_addr); ++ + if (!hostapd_config_get_radius_attr(req_attr, + RADIUS_ATTR_NAS_IP_ADDRESS) && + hapd->conf->own_ip_addr.af == AF_INET && --- a/src/radius/radius_client.c +++ b/src/radius/radius_client.c -@@ -163,6 +163,8 @@ struct radius_client_data { +@@ -165,6 +165,8 @@ struct radius_client_data { */ void *ctx; @@ -19,7 +50,7 @@ /** * conf - RADIUS client configuration (list of RADIUS servers to use) */ -@@ -720,6 +722,30 @@ static void radius_client_list_add(struc +@@ -819,6 +821,30 @@ static void radius_close_acct_socket(str /** @@ -50,7 +81,7 @@ * radius_client_send - Send a RADIUS request * @radius: RADIUS client context from radius_client_init() * @msg: RADIUS message to be sent -@@ -1238,6 +1264,10 @@ radius_change_server(struct radius_clien +@@ -1711,6 +1737,10 @@ radius_change_server(struct radius_clien wpa_printf(MSG_DEBUG, "RADIUS local address: %s:%u", inet_ntoa(claddr.sin_addr), ntohs(claddr.sin_port)); @@ -61,7 +92,7 @@ } break; #ifdef CONFIG_IPV6 -@@ -1249,6 +1279,10 @@ radius_change_server(struct radius_clien +@@ -1722,6 +1752,10 @@ radius_change_server(struct radius_clien inet_ntop(AF_INET6, &claddr6.sin6_addr, abuf, sizeof(abuf)), ntohs(claddr6.sin6_port)); @@ -74,7 +105,7 @@ } --- a/src/radius/radius_client.h +++ b/src/radius/radius_client.h -@@ -249,6 +249,8 @@ int radius_client_register(struct radius +@@ -274,6 +274,8 @@ int radius_client_register(struct radius void radius_client_set_interim_error_cb(struct radius_client_data *radius, void (*cb)(const u8 *addr, void *ctx), void *ctx); @@ -83,27 +114,3 @@ int radius_client_send(struct radius_client_data *radius, struct radius_msg *msg, RadiusType msg_type, const u8 *addr); ---- a/src/ap/ieee802_1x.c -+++ b/src/ap/ieee802_1x.c -@@ -598,6 +598,10 @@ int add_common_radius_attr(struct hostap - struct hostapd_radius_attr *attr; - int len; - -+ if (hapd->conf->dynamic_own_ip_addr) -+ radius_client_get_local_addr(hapd->radius, -+ &hapd->conf->own_ip_addr); -+ - if (!hostapd_config_get_radius_attr(req_attr, - RADIUS_ATTR_NAS_IP_ADDRESS) && - hapd->conf->own_ip_addr.af == AF_INET && ---- a/hostapd/config_file.c -+++ b/hostapd/config_file.c -@@ -2688,6 +2688,8 @@ static int hostapd_config_fill(struct ho - } else if (os_strcmp(buf, "iapp_interface") == 0) { - wpa_printf(MSG_INFO, "DEPRECATED: iapp_interface not used"); - #endif /* CONFIG_IAPP */ -+ } else if (os_strcmp(buf, "dynamic_own_ip_addr") == 0) { -+ bss->dynamic_own_ip_addr = atoi(pos); - } else if (os_strcmp(buf, "own_ip_addr") == 0) { - if (hostapd_parse_ip_addr(pos, &bss->own_ip_addr)) { - wpa_printf(MSG_ERROR, diff --git a/package/network/services/hostapd/patches/761-shared_das_port.patch b/package/network/services/hostapd/patches/761-shared_das_port.patch index cbb2a1be3c..5ca10d23bd 100644 --- a/package/network/services/hostapd/patches/761-shared_das_port.patch +++ b/package/network/services/hostapd/patches/761-shared_das_port.patch @@ -1,16 +1,13 @@ ---- a/src/radius/radius_das.h -+++ b/src/radius/radius_das.h -@@ -44,6 +44,7 @@ struct radius_das_attrs { - struct radius_das_conf { - int port; - const u8 *shared_secret; -+ const u8 *nas_identifier; - size_t shared_secret_len; - const struct hostapd_ip_addr *client_addr; - unsigned int time_window; +From: Felix Fietkau +Date: Fri, 16 Dec 2022 13:32:48 +0100 +Subject: [PATCH] hostapd: allow sharing the incoming DAS port across multiple + interfaces + +Use the NAS identifier to find the right receiver context on incoming messages + --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -1423,6 +1423,7 @@ int hostapd_setup_bss(struct hostapd_dat +@@ -1510,6 +1510,7 @@ int hostapd_setup_bss(struct hostapd_dat os_memset(&das_conf, 0, sizeof(das_conf)); das_conf.port = conf->radius_das_port; @@ -296,3 +293,13 @@ os_free(das->shared_secret); os_free(das); } +--- a/src/radius/radius_das.h ++++ b/src/radius/radius_das.h +@@ -44,6 +44,7 @@ struct radius_das_attrs { + struct radius_das_conf { + int port; + const u8 *shared_secret; ++ const u8 *nas_identifier; + size_t shared_secret_len; + const struct hostapd_ip_addr *client_addr; + unsigned int time_window; diff --git a/package/network/services/hostapd/patches/770-radius_server.patch b/package/network/services/hostapd/patches/770-radius_server.patch index 8837a26257..73b2c8643b 100644 --- a/package/network/services/hostapd/patches/770-radius_server.patch +++ b/package/network/services/hostapd/patches/770-radius_server.patch @@ -1,3 +1,11 @@ +From: Felix Fietkau +Date: Thu, 16 Mar 2023 11:35:50 +0100 +Subject: [PATCH] hostapd: add experimental radius server + +This can be used to run a standalone EAP server that can be used from +other APs. It uses json as user database format and can automatically +handle reload. + --- a/hostapd/Makefile +++ b/hostapd/Makefile @@ -63,6 +63,10 @@ endif @@ -21,7 +29,7 @@ #ifndef CONFIG_NO_HOSTAPD_LOGGER static void hostapd_logger_cb(void *ctx, const u8 *addr, unsigned int module, -@@ -771,6 +772,11 @@ int main(int argc, char *argv[]) +@@ -778,6 +779,11 @@ int main(int argc, char *argv[]) if (os_program_init()) return -1; diff --git a/package/network/services/hostapd/patches/993-2023-10-28-ACS-Fix-typo-in-bw_40-frequency-array.patch b/package/network/services/hostapd/patches/993-2023-10-28-ACS-Fix-typo-in-bw_40-frequency-array.patch deleted file mode 100644 index 948c51b196..0000000000 --- a/package/network/services/hostapd/patches/993-2023-10-28-ACS-Fix-typo-in-bw_40-frequency-array.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 7a733993211ad46cf3032038c1e7e6bdc2322336 Mon Sep 17 00:00:00 2001 -From: Michael-CY Lee -Date: Tue, 5 Sep 2023 09:43:25 +0800 -Subject: [PATCH] ACS: Fix typo in bw_40 frequency array - -The range for the 5 GHz channel 118 was encoded with an incorrect -channel number. - -Fixes: ed8e13decc71 (ACS: Extract bw40/80/160 freqs out of acs_usable_bwXXX_chan()) -Signed-off-by: Michael Lee ---- - src/ap/acs.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/src/ap/acs.c -+++ b/src/ap/acs.c -@@ -256,7 +256,7 @@ struct bw_item { - static const struct bw_item bw_40[] = { - { 5180, 5200, 38 }, { 5220, 5240, 46 }, { 5260, 5280, 54 }, - { 5300, 5320, 62 }, { 5500, 5520, 102 }, { 5540, 5560, 110 }, -- { 5580, 5600, 110 }, { 5620, 5640, 126}, { 5660, 5680, 134 }, -+ { 5580, 5600, 118 }, { 5620, 5640, 126 }, { 5660, 5680, 134 }, - { 5700, 5720, 142 }, { 5745, 5765, 151 }, { 5785, 5805, 159 }, - { 5825, 5845, 167 }, { 5865, 5885, 175 }, - { 5955, 5975, 3 }, { 5995, 6015, 11 }, { 6035, 6055, 19 }, diff --git a/package/network/services/hostapd/patches/999-build-make-_make_dirs-robust-against-too-long-argume.patch b/package/network/services/hostapd/patches/999-build-make-_make_dirs-robust-against-too-long-argume.patch deleted file mode 100644 index cb8171551d..0000000000 --- a/package/network/services/hostapd/patches/999-build-make-_make_dirs-robust-against-too-long-argume.patch +++ /dev/null @@ -1,27 +0,0 @@ -From beeef79701082a82b2581a674e702ea60a358ce7 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Sun, 24 Mar 2024 20:47:06 +0100 -Subject: [PATCH] build: make _make_dirs robust against too long argument error - -_make_dirs currently can fail as _DIRS can be really long and thus go over -the MAX_ARG_STRLEN limit so it will fail with: -/bin/sh: Argument list too long - -Lets avoid this by stripping the $(BUILDDIR) prefix and then restoring it. - -Signed-off-by: Robert Marko ---- - src/build.rules | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/src/build.rules -+++ b/src/build.rules -@@ -80,7 +80,7 @@ endif - _DIRS := $(BUILDDIR)/$(PROJ) - .PHONY: _make_dirs - _make_dirs: -- @mkdir -p $(_DIRS) -+ @printf '$(BUILDDIR)/%s ' $(patsubst $(BUILDDIR)/%,%,$(_DIRS)) | xargs mkdir -p - - $(BUILDDIR)/$(PROJ)/src/%.o: $(ROOTDIR)src/%.c $(CONFIG_FILE) | _make_dirs - $(Q)$(CC) -c -o $@ $(CFLAGS) $< diff --git a/package/network/services/hostapd/src/src/ap/ubus.c b/package/network/services/hostapd/src/src/ap/ubus.c index 66eba99901..8689494bcf 100644 --- a/package/network/services/hostapd/src/src/ap/ubus.c +++ b/package/network/services/hostapd/src/src/ap/ubus.c @@ -774,7 +774,8 @@ hostapd_switch_chan(struct ubus_context *ctx, struct ubus_object *obj, mode ? &mode->he_capab[IEEE80211_MODE_AP] : NULL, mode ? &mode->eht_capab[IEEE80211_MODE_AP] : - NULL); + NULL, + hostapd_get_punct_bitmap(hapd)); for (i = 0; i < hapd->iface->num_bss; i++) { struct hostapd_data *bss = hapd->iface->bss[i]; diff --git a/package/network/services/hostapd/src/src/ap/ubus.h b/package/network/services/hostapd/src/src/ap/ubus.h index b0f7c44ab5..22767d67ee 100644 --- a/package/network/services/hostapd/src/src/ap/ubus.h +++ b/package/network/services/hostapd/src/src/ap/ubus.h @@ -8,6 +8,8 @@ #ifndef __HOSTAPD_UBUS_H #define __HOSTAPD_UBUS_H +#include "sta_info.h" + enum hostapd_ubus_event_type { HOSTAPD_UBUS_PROBE_REQ, HOSTAPD_UBUS_AUTH_REQ, @@ -27,6 +29,7 @@ struct hostapd_iface; struct hostapd_data; struct hapd_interfaces; struct rrm_measurement_beacon_report; +struct sta_info; #ifdef UBUS_SUPPORT diff --git a/package/network/services/unetd/Makefile b/package/network/services/unetd/Makefile index 02814cb78c..680b8b7b3c 100644 --- a/package/network/services/unetd/Makefile +++ b/package/network/services/unetd/Makefile @@ -12,7 +12,7 @@ PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/unetd.git PKG_SOURCE_DATE:=2024-03-31 PKG_SOURCE_VERSION:=806457664ab6e952a7f4febb82e891f596fe577c -PKG_MIRROR_HASH:=fbdac59581742bf208c18995b1d69d9848c93bfce487e57ba780d959e0d62fc4 +PKG_MIRROR_HASH:=a62bef497078c7b825f11fc8358c1a43f5db3e6d4b97812044f7653d60747d5b PKG_LICENSE:=GPL-2.0 PKG_MAINTAINER:=Felix Fietkau diff --git a/target/linux/apm821xx/Makefile b/target/linux/apm821xx/Makefile index 66bbf3ef47..6719a69779 100644 --- a/target/linux/apm821xx/Makefile +++ b/target/linux/apm821xx/Makefile @@ -10,6 +10,7 @@ FEATURES:=fpu dt gpio ramdisk squashfs usb SUBTARGETS:=nand sata KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 define Target/Description Build images for AppliedMicro APM821xx based boards. diff --git a/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version b/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version index 0be0b6112a..d34b4051be 100644 --- a/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version +++ b/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version @@ -3,7 +3,8 @@ case "$(board_name)" in meraki,mx60|\ netgear,wndap620|\ -netgear,wndap660) +netgear,wndap660|\ +netgear,wndr4700) uci set system.@system[0].compat_version="2.0" uci commit system ;; diff --git a/target/linux/apm821xx/config-6.6 b/target/linux/apm821xx/config-6.6 new file mode 100644 index 0000000000..8814e5bdca --- /dev/null +++ b/target/linux/apm821xx/config-6.6 @@ -0,0 +1,274 @@ +# CONFIG_40x is not set +# CONFIG_440_CPU is not set +CONFIG_44x=y +CONFIG_464_CPU=y +CONFIG_4xx=y +CONFIG_4xx_SOC=y +# CONFIG_ADVANCED_OPTIONS is not set +CONFIG_APM821xx=y +# CONFIG_APOLLO3G is not set +# CONFIG_ARCHES is not set +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_MMAP_RND_BITS=11 +CONFIG_ARCH_MMAP_RND_BITS_MAX=17 +CONFIG_ARCH_MMAP_RND_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SPLIT_ARG64=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y +CONFIG_AUDIT_ARCH=y +# CONFIG_BAMBOO is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_MQ_PCI=y +CONFIG_BLUESTONE=y +CONFIG_BOOKE=y +CONFIG_BOOKE_OR_40x=y +CONFIG_BOOKE_WDT=y +# CONFIG_CANYONLANDS is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs noinitrd" +CONFIG_CMDLINE_FROM_BOOTLOADER=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CRC16=y +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_SLICEBY8=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_MD5_PPC is not set +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +# CONFIG_CRYPTO_SHA1_PPC is not set +CONFIG_CRYPTO_SHA3=y +CONFIG_DATA_SHIFT=12 +CONFIG_DMADEVICES=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DTC=y +CONFIG_DW_DMAC=y +CONFIG_DW_DMAC_CORE=y +CONFIG_EARLY_PRINTK=y +# CONFIG_EBONY is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +# CONFIG_EIGER is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_EXTRA_TARGETS="uImage" +CONFIG_FIXED_PHY=y +CONFIG_FORCE_PCI=y +# CONFIG_FSL_LBC is not set +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOREMAP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GEN_RTC is not set +# CONFIG_GLACIER is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_IBM_IIC=y +CONFIG_IBM_EMAC=y +CONFIG_IBM_EMAC_EMAC4=y +CONFIG_IBM_EMAC_POLL_WEIGHT=32 +CONFIG_IBM_EMAC_RGMII=y +CONFIG_IBM_EMAC_RXB=128 +CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256 +CONFIG_IBM_EMAC_TAH=y +CONFIG_IBM_EMAC_TXB=128 +# CONFIG_ICON is not set +CONFIG_ILLEGAL_POINTER_VALUE=0 +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_ISA_DMA_API=y +# CONFIG_JFFS2_FS is not set +# CONFIG_KATMAI is not set +CONFIG_KERNEL_START=0xc0000000 +CONFIG_LEDS_TRIGGER_MTD=y +CONFIG_LEDS_TRIGGER_PATTERN=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +# CONFIG_MATH_EMULATION is not set +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MIGRATION=y +CONFIG_MMU_GATHER_MERGE_VMAS=y +CONFIG_MMU_GATHER_PAGE_SIZE=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_XGRESS=y +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=1 +CONFIG_NR_IRQS=512 +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_U_BOOT_ENV=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_GPIO_MM_GPIOCHIP=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND=y +CONFIG_PACKING=y +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_ARCH_FALLBACKS=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_PHYS_64BIT=y +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_PMU_SYSFS is not set +CONFIG_PPC=y +CONFIG_PPC32=y +CONFIG_PPC44x_SIMPLE=y +CONFIG_PPC4xx_GPIO=y +CONFIG_PPC4xx_PCI_EXPRESS=y +# CONFIG_PPC64 is not set +# CONFIG_PPC_47x is not set +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +CONFIG_PPC_ADV_DEBUG_DACS=2 +CONFIG_PPC_ADV_DEBUG_DAC_RANGE=y +CONFIG_PPC_ADV_DEBUG_DVCS=2 +CONFIG_PPC_ADV_DEBUG_IACS=4 +CONFIG_PPC_ADV_DEBUG_REGS=y +# CONFIG_PPC_BOOK3S_32 is not set +CONFIG_PPC_DCR=y +CONFIG_PPC_DCR_NATIVE=y +# CONFIG_PPC_EARLY_DEBUG is not set +CONFIG_PPC_FPU=y +CONFIG_PPC_FPU_REGS=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_PPC_KUAP=y +# CONFIG_PPC_KUAP_DEBUG is not set +CONFIG_PPC_KUEP=y +CONFIG_PPC_MMU_NOHASH=y +CONFIG_PPC_PAGE_SHIFT=12 +# CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT is not set +CONFIG_PPC_UDBG_16550=y +CONFIG_PPC_WERROR=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTE_64BIT=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +# CONFIG_RAINIER is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_REGULATOR=y +CONFIG_RSEQ=y +# CONFIG_SAM440EP is not set +# CONFIG_SCOM_DEBUGFS is not set +# CONFIG_SEQUOIA is not set +# CONFIG_SERIAL_8250_FSL is not set +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SGL_ALLOC=y +# CONFIG_SMT_NUM_THREADS_DYNAMIC is not set +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SPARSE_IRQ=y +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_STATIC_CALL_SELFTEST is not set +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +# CONFIG_TAISHAN is not set +CONFIG_TARGET_CPU="464" +CONFIG_TARGET_CPU_BOOL=y +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_THREAD_SHIFT=13 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +# CONFIG_TOOLCHAIN_DEFAULT_CPU is not set +CONFIG_USB_SUPPORT=y +CONFIG_VDSO32=y +# CONFIG_VIRTIO_MENU is not set +# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set +# CONFIG_WARP is not set +CONFIG_WATCHDOG_CORE=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_XZ_DEC_POWERPC=y +# CONFIG_YOSEMITE is not set +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/apm821xx/dts/netgear-wndr4700.dts b/target/linux/apm821xx/dts/netgear-wndr4700.dts index 0788037981..851a3192b3 100644 --- a/target/linux/apm821xx/dts/netgear-wndr4700.dts +++ b/target/linux/apm821xx/dts/netgear-wndr4700.dts @@ -183,7 +183,27 @@ partition@0 { label = "uboot"; reg = <0x00000000 0x00180000>; + compatible = "fixed-partitions"; read-only; + + partition@40000 { + label = "u-boot-env-main"; + compatible = "u-boot,env-redundant-count"; + reg = <0x00040000 0x20000>; /* one block is 128k */ + read-only; + }; + +/* + * Causes u_boot_env: probe of 4e4000000.ndfc:nand:partitions:partition@0:partition@60000 + * failed with error -17 + * + * partition@60000 { + * label = "u-boot-env-redundant"; + * compatible = "u-boot,env-redundant-count"; + * reg = <0x00060000 0x20000>; + * read-only; + * }; + */ }; partition@180000 { @@ -196,7 +216,7 @@ partition@0 { label = "kernel"; - reg = <0x00000000 0x00380000>; + reg = <0x00000000 0x00480000>; compatible = "fixed-partitions"; #address-cells = <1>; @@ -218,9 +238,9 @@ */ }; - partition@380000 { + partition@480000 { label = "ubi"; - reg = <0x00380000 0x014e0000>; + reg = <0x00480000 0x013e0000>; }; }; diff --git a/target/linux/apm821xx/image/nand.mk b/target/linux/apm821xx/image/nand.mk index 469bf58c1d..69eb386126 100644 --- a/target/linux/apm821xx/image/nand.mk +++ b/target/linux/apm821xx/image/nand.mk @@ -105,7 +105,7 @@ define Device/netgear_wndr4700 IMAGE_SIZE := 24960k IMAGES := factory.img sysupgrade.bin ARTIFACTS := device-tree.dtb - KERNEL_SIZE := 3584k + KERNEL_SIZE := 4608k # append a fake/empty rootfs to fool netgear's uboot # CHECK_DNI_FIRMWARE_ROOTFS_INTEGRITY in do_chk_dniimg() KERNEL := kernel-bin | lzma -d16 | uImage lzma | pad-offset $$(BLOCKSIZE) 64 | \ @@ -119,5 +119,8 @@ define Device/netgear_wndr4700 NETGEAR_HW_ID := 29763875+128+256 UBINIZE_OPTS := -E 5 SUPPORTED_DEVICES += wndr4700 + DEVICE_COMPAT_VERSION := 2.0 + DEVICE_COMPAT_MESSAGE := kernel and ubi partitions had to be resized. \ + Upgrade via sysupgrade mechanism is not possible. endef TARGET_DEVICES += netgear_wndr4700 diff --git a/target/linux/apm821xx/patches-6.6/201-add-amcc-apollo3g-support.patch b/target/linux/apm821xx/patches-6.6/201-add-amcc-apollo3g-support.patch new file mode 100644 index 0000000000..d26e74dfb7 --- /dev/null +++ b/target/linux/apm821xx/patches-6.6/201-add-amcc-apollo3g-support.patch @@ -0,0 +1,30 @@ +--- a/arch/powerpc/platforms/44x/Kconfig ++++ b/arch/powerpc/platforms/44x/Kconfig +@@ -118,6 +118,17 @@ config CANYONLANDS + help + This option enables support for the AMCC PPC460EX evaluation board. + ++config APOLLO3G ++ bool "Apollo3G" ++ depends on 44x ++ default n ++ select PPC44x_SIMPLE ++ select APM821xx ++ select IBM_EMAC_RGMII ++ select 460EX ++ help ++ This option enables support for the AMCC Apollo 3G board. ++ + config GLACIER + bool "Glacier" + depends on 44x +--- a/arch/powerpc/platforms/44x/ppc44x_simple.c ++++ b/arch/powerpc/platforms/44x/ppc44x_simple.c +@@ -46,6 +46,7 @@ machine_device_initcall(ppc44x_simple, p + * board.c file for it rather than adding it to this list. + */ + static char *board[] __initdata = { ++ "amcc,apollo3g", + "amcc,arches", + "amcc,bamboo", + "apm,bluestone", diff --git a/target/linux/apm821xx/patches-6.6/300-fix-atheros-nics-on-apm82181.patch b/target/linux/apm821xx/patches-6.6/300-fix-atheros-nics-on-apm82181.patch new file mode 100644 index 0000000000..48c57acde8 --- /dev/null +++ b/target/linux/apm821xx/patches-6.6/300-fix-atheros-nics-on-apm82181.patch @@ -0,0 +1,51 @@ +--- a/arch/powerpc/platforms/4xx/pci.c ++++ b/arch/powerpc/platforms/4xx/pci.c +@@ -1058,15 +1058,24 @@ static int __init apm821xx_pciex_init_po + u32 val; + + /* +- * Do a software reset on PCIe ports. +- * This code is to fix the issue that pci drivers doesn't re-assign +- * bus number for PCIE devices after Uboot +- * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 +- * PT quad port, SAS LSI 1064E) ++ * Only reset the PHY when no link is currently established. ++ * This is for the Atheros PCIe board which has problems to establish ++ * the link (again) after this PHY reset. All other currently tested ++ * PCIe boards don't show this problem. + */ +- +- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); +- mdelay(10); ++ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); ++ if (!(val & 0x00001000)) { ++ /* ++ * Do a software reset on PCIe ports. ++ * This code is to fix the issue that pci drivers doesn't re-assign ++ * bus number for PCIE devices after Uboot ++ * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 ++ * PT quad port, SAS LSI 1064E) ++ */ ++ ++ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); ++ mdelay(10); ++ } + + if (port->endpoint) + val = PTYPE_LEGACY_ENDPOINT << 20; +@@ -1083,9 +1092,12 @@ static int __init apm821xx_pciex_init_po + mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130); + mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); + +- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); +- mdelay(50); +- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); ++ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); ++ if (!(val & 0x00001000)) { ++ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); ++ mdelay(50); ++ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); ++ } + + mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, + mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | diff --git a/target/linux/apm821xx/patches-6.6/301-fix-memory-map-wndr4700.patch b/target/linux/apm821xx/patches-6.6/301-fix-memory-map-wndr4700.patch new file mode 100644 index 0000000000..bd022ca220 --- /dev/null +++ b/target/linux/apm821xx/patches-6.6/301-fix-memory-map-wndr4700.patch @@ -0,0 +1,14 @@ +--- a/arch/powerpc/platforms/4xx/pci.c ++++ b/arch/powerpc/platforms/4xx/pci.c +@@ -1900,9 +1900,9 @@ static void __init ppc4xx_configure_pcie + * if it works + */ + out_le32(mbase + PECFG_PIM0LAL, 0x00000000); +- out_le32(mbase + PECFG_PIM0LAH, 0x00000000); ++ out_le32(mbase + PECFG_PIM0LAH, 0x00000008); + out_le32(mbase + PECFG_PIM1LAL, 0x00000000); +- out_le32(mbase + PECFG_PIM1LAH, 0x00000000); ++ out_le32(mbase + PECFG_PIM1LAH, 0x0000000c); + out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); + out_le32(mbase + PECFG_PIM01SAL, 0x00000000); + diff --git a/target/linux/apm821xx/patches-6.6/900-powerpc-bootwrapper-force-gzip-as-mkimage-s-compress.patch b/target/linux/apm821xx/patches-6.6/900-powerpc-bootwrapper-force-gzip-as-mkimage-s-compress.patch new file mode 100644 index 0000000000..3ea4faf202 --- /dev/null +++ b/target/linux/apm821xx/patches-6.6/900-powerpc-bootwrapper-force-gzip-as-mkimage-s-compress.patch @@ -0,0 +1,29 @@ +From c9395ad54e2cabb87d408becc37566f3d8248933 Mon Sep 17 00:00:00 2001 +From: Christian Lamparter +Date: Sun, 1 Dec 2019 02:08:23 +0100 +Subject: [PATCH] powerpc: bootwrapper: force gzip as mkimage's compression + method + +Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to +instruct the mkimage to use the xz compression, which isn't +supported. This patch forces the gzip compression, which is +supported and doesn't matter because the generated uImage for +the apm821xx target gets ignored as the OpenWrt toolchain will +do separate U-Boot kernel images for each device individually. + +Signed-off-by: Christian Lamparter +--- + arch/powerpc/boot/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/powerpc/boot/Makefile ++++ b/arch/powerpc/boot/Makefile +@@ -276,7 +276,7 @@ compressor-$(CONFIG_KERNEL_LZO) := lzo + + # args (to if_changed): 1 = (this rule), 2 = platform, 3 = dts 4=dtb 5=initrd + quiet_cmd_wrap = WRAP $@ +- cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z $(compressor-y) -c -o $@ -p $2 \ ++ cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z gzip -c -o $@ -p $2 \ + $(CROSSWRAP) $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) \ + vmlinux + diff --git a/target/linux/bcm27xx/patches-6.1/950-0286-phy-broadcom-split-out-the-BCM54213PE-from-the-BCM54.patch b/target/linux/bcm27xx/patches-6.1/950-0286-phy-broadcom-split-out-the-BCM54213PE-from-the-BCM54.patch index 55c881286e..2cf011fafc 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0286-phy-broadcom-split-out-the-BCM54213PE-from-the-BCM54.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0286-phy-broadcom-split-out-the-BCM54213PE-from-the-BCM54.patch @@ -49,7 +49,7 @@ Signed-off-by: Jonathan Bell .phy_id = PHY_ID_BCM5461, .phy_id_mask = 0xfffffff0, .name = "Broadcom BCM5461", -@@ -1156,7 +1164,8 @@ module_phy_driver(broadcom_drivers); +@@ -1158,7 +1166,8 @@ module_phy_driver(broadcom_drivers); static struct mdio_device_id __maybe_unused broadcom_tbl[] = { { PHY_ID_BCM5411, 0xfffffff0 }, { PHY_ID_BCM5421, 0xfffffff0 }, diff --git a/target/linux/generic/hack-6.6/212-tools_portability.patch b/target/linux/generic/hack-6.6/212-tools_portability.patch deleted file mode 100644 index ec10f4b966..0000000000 --- a/target/linux/generic/hack-6.6/212-tools_portability.patch +++ /dev/null @@ -1,342 +0,0 @@ -From 48232d3d931c95953ce2ddfe7da7bb164aef6a73 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:03:16 +0200 -Subject: fix portability of some includes files in tools/ used on the host - -Signed-off-by: Felix Fietkau ---- - tools/include/tools/be_byteshift.h | 4 ++++ - tools/include/tools/le_byteshift.h | 4 ++++ - tools/include/tools/linux_types.h | 22 ++++++++++++++++++++++ - 3 files changed, 30 insertions(+) - create mode 100644 tools/include/tools/linux_types.h - ---- a/tools/include/tools/be_byteshift.h -+++ b/tools/include/tools/be_byteshift.h -@@ -2,6 +2,10 @@ - #ifndef _TOOLS_BE_BYTESHIFT_H - #define _TOOLS_BE_BYTESHIFT_H - -+#ifndef __linux__ -+#include "linux_types.h" -+#endif -+ - #include - - static inline uint16_t __get_unaligned_be16(const uint8_t *p) ---- a/tools/include/tools/le_byteshift.h -+++ b/tools/include/tools/le_byteshift.h -@@ -2,6 +2,10 @@ - #ifndef _TOOLS_LE_BYTESHIFT_H - #define _TOOLS_LE_BYTESHIFT_H - -+#ifndef __linux__ -+#include "linux_types.h" -+#endif -+ - #include - - static inline uint16_t __get_unaligned_le16(const uint8_t *p) ---- /dev/null -+++ b/tools/include/tools/linux_types.h -@@ -0,0 +1,18 @@ -+#ifndef __LINUX_TYPES_H -+#define __LINUX_TYPES_H -+ -+#include -+ -+typedef int8_t __s8; -+typedef uint8_t __u8; -+ -+typedef int16_t __s16; -+typedef uint16_t __u16; -+ -+typedef int32_t __s32; -+typedef uint32_t __u32; -+ -+typedef int64_t __s64; -+typedef uint64_t __u64; -+ -+#endif ---- a/tools/include/linux/types.h -+++ b/tools/include/linux/types.h -@@ -10,8 +10,12 @@ - #define __SANE_USERSPACE_TYPES__ /* For PPC64, to get LL64 types */ - #endif - -+#ifndef __linux__ -+#include -+#else - #include - #include -+#endif - - struct page; - struct kmem_cache; -@@ -56,7 +60,9 @@ typedef __s8 s8; - #define __user - #endif - #define __must_check -+#ifndef __cold - #define __cold -+#endif - - typedef __u16 __bitwise __le16; - typedef __u16 __bitwise __be16; ---- a/tools/perf/pmu-events/jevents.py -+++ b/tools/perf/pmu-events/jevents.py -@@ -1197,6 +1197,7 @@ such as "arm/cortex-a34".''', - #include "util/header.h" - #include "util/pmu.h" - #include -+#include - #include - - struct compact_pmu_event { ---- a/tools/arch/x86/include/asm/insn.h -+++ b/tools/arch/x86/include/asm/insn.h -@@ -7,8 +7,8 @@ - * Copyright (C) IBM Corporation, 2009 - */ - --#include - /* insn_attr_t is defined in inat.h */ -+#include - #include "inat.h" /* __ignore_sync_check__ */ - - #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) ---- a/tools/arch/x86/include/asm/orc_types.h -+++ b/tools/arch/x86/include/asm/orc_types.h -@@ -46,7 +46,6 @@ - #define ORC_TYPE_REGS_PARTIAL 4 - - #ifndef __ASSEMBLY__ --#include - - /* - * This struct is more or less a vastly simplified version of the DWARF Call -@@ -59,12 +58,12 @@ - struct orc_entry { - s16 sp_offset; - s16 bp_offset; --#if defined(__LITTLE_ENDIAN_BITFIELD) -+#if __BYTE_ORDER == __LITTLE_ENDIAN - unsigned sp_reg:4; - unsigned bp_reg:4; - unsigned type:3; - unsigned signal:1; --#elif defined(__BIG_ENDIAN_BITFIELD) -+#elif __BYTE_ORDER == __BIG_ENDIAN - unsigned bp_reg:4; - unsigned sp_reg:4; - unsigned unused:4; ---- a/tools/arch/x86/lib/insn.c -+++ b/tools/arch/x86/lib/insn.c -@@ -15,7 +15,11 @@ - #include "../include/asm/insn.h" /* __ignore_sync_check__ */ - #include "../include/asm-generic/unaligned.h" /* __ignore_sync_check__ */ - -+#ifdef __KERNEL__ - #include -+#else -+#include -+#endif - #include - - #include "../include/asm/emulate_prefix.h" /* __ignore_sync_check__ */ ---- a/tools/include/asm-generic/bitops/fls.h -+++ b/tools/include/asm-generic/bitops/fls.h -@@ -2,6 +2,8 @@ - #ifndef _ASM_GENERIC_BITOPS_FLS_H_ - #define _ASM_GENERIC_BITOPS_FLS_H_ - -+#include -+ - /** - * fls - find last (most-significant) bit set - * @x: the word to search -@@ -10,7 +12,7 @@ - * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. - */ - --static __always_inline int fls(unsigned int x) -+static __always_inline int __generic_fls(unsigned int x) - { - int r = 32; - -@@ -38,5 +40,6 @@ static __always_inline int fls(unsigned - } - return r; - } -+#define fls __generic_fls - - #endif /* _ASM_GENERIC_BITOPS_FLS_H_ */ ---- a/tools/include/asm-generic/bitsperlong.h -+++ b/tools/include/asm-generic/bitsperlong.h -@@ -4,11 +4,13 @@ - - #include - -+#ifndef BITS_PER_LONG - #ifdef __SIZEOF_LONG__ - #define BITS_PER_LONG (__CHAR_BIT__ * __SIZEOF_LONG__) - #else - #define BITS_PER_LONG __WORDSIZE - #endif -+#endif - - #if BITS_PER_LONG != __BITS_PER_LONG - #error Inconsistent word size. Check asm/bitsperlong.h ---- a/tools/include/linux/rbtree.h -+++ b/tools/include/linux/rbtree.h -@@ -18,7 +18,6 @@ - #define __TOOLS_LINUX_PERF_RBTREE_H - - #include --#include - - struct rb_node { - unsigned long __rb_parent_color; ---- a/tools/objtool/Makefile -+++ b/tools/objtool/Makefile -@@ -40,7 +40,7 @@ elfshdr := $(shell echo '$(pound)include - OBJTOOL_CFLAGS += $(if $(elfshdr),,-DLIBELF_USE_DEPRECATED) - - # Always want host compilation. --HOST_OVERRIDES := CC="$(HOSTCC)" LD="$(HOSTLD)" AR="$(HOSTAR)" -+HOST_OVERRIDES := CC="$(HOSTCC) $(HOST_EXTRACFLAGS)" LD="$(HOSTLD)" AR="$(HOSTAR)" - - AWK = awk - MKDIR = mkdir -@@ -55,6 +55,7 @@ BUILD_ORC := n - - ifeq ($(SRCARCH),x86) - BUILD_ORC := y -+ CFLAGS += -DBUILD_ORC - endif - - export BUILD_ORC ---- a/tools/objtool/check.c -+++ b/tools/objtool/check.c -@@ -1288,11 +1288,12 @@ static int add_ignore_alternatives(struc - return 0; - } - -+#ifndef BUILD_ORC - /* - * Symbols that replace INSN_CALL_DYNAMIC, every (tail) call to such a symbol - * will be added to the .retpoline_sites section. - */ --__weak bool arch_is_retpoline(struct symbol *sym) -+bool arch_is_retpoline(struct symbol *sym) - { - return false; - } -@@ -1301,7 +1302,7 @@ __weak bool arch_is_retpoline(struct sym - * Symbols that replace INSN_RETURN, every (tail) call to such a symbol - * will be added to the .return_sites section. - */ --__weak bool arch_is_rethunk(struct symbol *sym) -+bool arch_is_rethunk(struct symbol *sym) - { - return false; - } -@@ -1310,10 +1311,11 @@ __weak bool arch_is_rethunk(struct symbo - * Symbols that are embedded inside other instructions, because sometimes crazy - * code exists. These are mostly ignored for validation purposes. - */ --__weak bool arch_is_embedded_insn(struct symbol *sym) -+bool arch_is_embedded_insn(struct symbol *sym) - { - return false; - } -+#endif - - static struct reloc *insn_reloc(struct objtool_file *file, struct instruction *insn) - { ---- a/tools/objtool/include/objtool/objtool.h -+++ b/tools/objtool/include/objtool/objtool.h -@@ -12,7 +12,9 @@ - - #include - -+#ifndef __weak - #define __weak __attribute__((weak)) -+#endif - - struct pv_state { - bool clean; ---- a/tools/objtool/orc_dump.c -+++ b/tools/objtool/orc_dump.c -@@ -4,10 +4,10 @@ - */ - - #include --#include - #include - #include - #include -+#include - - static const char *reg_name(unsigned int reg) - { ---- a/tools/objtool/orc_gen.c -+++ b/tools/objtool/orc_gen.c -@@ -7,11 +7,11 @@ - #include - - #include --#include - - #include - #include - #include -+#include - - static int init_orc_entry(struct orc_entry *orc, struct cfi_state *cfi, - struct instruction *insn) ---- a/tools/objtool/special.c -+++ b/tools/objtool/special.c -@@ -54,9 +54,11 @@ static const struct special_entry entrie - {}, - }; - --void __weak arch_handle_alternative(unsigned short feature, struct special_alt *alt) -+#ifndef BUILD_ORC -+void arch_handle_alternative(unsigned short feature, struct special_alt *alt) - { - } -+#endif - - static void reloc_to_sec_off(struct reloc *reloc, struct section **sec, - unsigned long *off) ---- a/tools/objtool/weak.c -+++ b/tools/objtool/weak.c -@@ -15,12 +15,14 @@ - return ENOSYS; \ - }) - --int __weak orc_dump(const char *_objname) -+#ifndef BUILD_ORC -+int orc_dump(const char *_objname) - { - UNSUPPORTED("ORC"); - } - --int __weak orc_create(struct objtool_file *file) -+int orc_create(struct objtool_file *file) - { - UNSUPPORTED("ORC"); - } -+#endif ---- a/tools/scripts/Makefile.include -+++ b/tools/scripts/Makefile.include -@@ -92,7 +92,7 @@ LLVM_OBJCOPY ?= llvm-objcopy - LLVM_STRIP ?= llvm-strip - - ifeq ($(CC_NO_CLANG), 1) --EXTRA_WARNINGS += -Wstrict-aliasing=3 -+# EXTRA_WARNINGS += -Wstrict-aliasing=3 - - else ifneq ($(CROSS_COMPILE),) - # Allow userspace to override CLANG_CROSS_FLAGS to specify their own diff --git a/target/linux/generic/pending-6.6/350-mips-kernel-fix-detect_memory_region-function.patch b/target/linux/generic/pending-6.6/350-mips-kernel-fix-detect_memory_region-function.patch new file mode 100644 index 0000000000..4654bc14ef --- /dev/null +++ b/target/linux/generic/pending-6.6/350-mips-kernel-fix-detect_memory_region-function.patch @@ -0,0 +1,56 @@ +From: Shiji Yang +Date: Wed, 13 Mar 2024 20:28:37 +0800 +Subject: [PATCH] mips: kernel: fix detect_memory_region() function + +1. Do not use memcmp() on unallocated memory, as the new introduced + fortify dynamic object size check[1] will report unexpected result. +2. Use a fixed pattern instead of a random function pointer as the + magic value. +3. Flip magic value and double check it. + +[1] 439a1bcac648 ("fortify: Use __builtin_dynamic_object_size() when available") +Signed-off-by: Shiji Yang +--- + arch/mips/kernel/setup.c | 16 +++++++++++----- + 1 file changed, 11 insertions(+), 5 deletions(-) + +--- a/arch/mips/kernel/setup.c ++++ b/arch/mips/kernel/setup.c +@@ -46,6 +46,8 @@ + #include + #include + ++#define MIPS_MEM_TEST_PATTERN 0xaa5555aa ++ + #ifdef CONFIG_MIPS_ELF_APPENDED_DTB + char __section(".appended_dtb") __appended_dtb[0x100000]; + #endif /* CONFIG_MIPS_ELF_APPENDED_DTB */ +@@ -90,7 +92,7 @@ static struct resource bss_resource = { + unsigned long __kaslr_offset __ro_after_init; + EXPORT_SYMBOL(__kaslr_offset); + +-static void *detect_magic __initdata = detect_memory_region; ++static u32 detect_magic __initdata; + + #ifdef CONFIG_MIPS_AUTO_PFN_OFFSET + unsigned long ARCH_PFN_OFFSET; +@@ -99,12 +101,16 @@ EXPORT_SYMBOL(ARCH_PFN_OFFSET); + + void __init detect_memory_region(phys_addr_t start, phys_addr_t sz_min, phys_addr_t sz_max) + { +- void *dm = &detect_magic; ++ void *dm = (void *)KSEG1ADDR(&detect_magic); + phys_addr_t size; + + for (size = sz_min; size < sz_max; size <<= 1) { +- if (!memcmp(dm, dm + size, sizeof(detect_magic))) +- break; ++ __raw_writel(MIPS_MEM_TEST_PATTERN, dm); ++ if (__raw_readl(dm) == __raw_readl(dm + size)) { ++ __raw_writel(~MIPS_MEM_TEST_PATTERN, dm); ++ if (__raw_readl(dm) == __raw_readl(dm + size)) ++ break; ++ } + } + + pr_debug("Memory: %lluMB of RAM detected at 0x%llx (min: %lluMB, max: %lluMB)\n", diff --git a/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch b/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch deleted file mode 100644 index 03f45d7a9a..0000000000 --- a/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 540dcef6f39d6356d2a65230a8d4e9738ee2d25b Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 20 Mar 2024 16:43:01 +0100 -Subject: [PATCH] mtd: limit OTP nvmem to non nand devices - -MTD OTP logic is very fragile and can be problematic with some specific -kind of devices. - -NVMEM across the years had various iteration on how Cells could be -declared in DT and MTD OTP probably was left behind and -add_legacy_fixed_of_cells was enabled without thinking of the consequences. - -That option enables NVMEM to scan the provided of_node and treat each -child as a NVMEM Cell, this was to support legacy NVMEM implementation -and don't cause regression. - -This is problematic if we have devices like Nand where the OTP is -triggered by setting a special mode in the flash. In this context real -partitions declared in the Nand node are registered as OTP Cells and -this cause probe fail with -EINVAL error. - -This was never notice due to the fact that till now, no Nand supported -the OTP feature. With commit e87161321a40 ("mtd: rawnand: macronix: OTP -access for MX30LFxG18AC") this changed and coincidentally this Nand is -used on an FritzBox 7530 supported on OpenWrt. - -Alternative and more robust way to declare OTP Cells are already -prossible by using the fixed-layout node or by declaring a child node -with the compatible set to "otp-user" or "otp-factory". - -To fix this and limit any regression with other MTD that makes use of -declaring OTP as direct child of the dev node, disable -add_legacy_fixed_of_cells if we have a node called nand since it's the -standard property name to identify Nand devices attached to a Nand -Controller. - -With the following logic, the OTP NVMEM entry is correctly created with -no Cells and the MTD Nand is correctly probed and partitions are -correctly exposed. - -Fixes: 2cc3b37f5b6d ("nvmem: add explicit config option to read old syntax fixed OF cells") -Cc: -Signed-off-by: Christian Marangi ---- - drivers/mtd/mtdcore.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/mtd/mtdcore.c -+++ b/drivers/mtd/mtdcore.c -@@ -933,7 +933,7 @@ static struct nvmem_device *mtd_otp_nvme - config.name = compatible; - config.id = NVMEM_DEVID_AUTO; - config.owner = THIS_MODULE; -- config.add_legacy_fixed_of_cells = true; -+ config.add_legacy_fixed_of_cells = !of_node_name_eq(mtd->dev.of_node, "nand"); - config.type = NVMEM_TYPE_OTP; - config.root_only = true; - config.ignore_wp = true; diff --git a/target/linux/ipq40xx/patches-6.6/991-ipq40xx-unlock-cpu-frequency.patch b/target/linux/ipq40xx/patches-6.6/991-ipq40xx-unlock-cpu-frequency.patch new file mode 100644 index 0000000000..d5aa5ebc83 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.6/991-ipq40xx-unlock-cpu-frequency.patch @@ -0,0 +1,54 @@ +From: William +Subject: [PATCH] ipq40xx: improve CPU clock +Date: Tue, 15 Dec 2020 15:26:35 +0800 + +This patch will match the clock-latency-ns values in the device tree +for those found inside the OEM device tree and kernel source code and +unlock 896Mhz CPU operating points. + +Signed-off-by: William +--- + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -114,20 +114,24 @@ + + opp-48000000 { + opp-hz = /bits/ 64 <48000000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; + opp-716000000 { + opp-hz = /bits/ 64 <716000000>; +- clock-latency-ns = <256000>; ++ clock-latency-ns = <100000>; + }; ++ opp-896000000 { ++ opp-hz = /bits/ 64 <896000000>; ++ clock-latency-ns = <100000>; ++ }; + }; + + memory { +--- a/drivers/clk/qcom/gcc-ipq4019.c ++++ b/drivers/clk/qcom/gcc-ipq4019.c +@@ -579,6 +579,9 @@ static const struct freq_tbl ftbl_gcc_ap + F(632000000, P_DDRPLLAPSS, 1, 0, 0), + F(672000000, P_DDRPLLAPSS, 1, 0, 0), + F(716000000, P_DDRPLLAPSS, 1, 0, 0), ++ F(768000000, P_DDRPLLAPSS, 1, 0, 0), ++ F(823000000, P_DDRPLLAPSS, 1, 0, 0), ++ F(896000000, P_DDRPLLAPSS, 1, 0, 0), + { } + }; + diff --git a/target/linux/kirkwood/Makefile b/target/linux/kirkwood/Makefile index 241fc614c4..44eaf925a1 100644 --- a/target/linux/kirkwood/Makefile +++ b/target/linux/kirkwood/Makefile @@ -12,6 +12,7 @@ CPU_TYPE:=xscale SUBTARGETS:=generic KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/kirkwood/config-6.6 b/target/linux/kirkwood/config-6.6 new file mode 100644 index 0000000000..b3320dac1f --- /dev/null +++ b/target/linux/kirkwood/config-6.6 @@ -0,0 +1,318 @@ +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_CPU_AUTO=y +# CONFIG_ARCH_MULTI_V4 is not set +# CONFIG_ARCH_MULTI_V4T is not set +CONFIG_ARCH_MULTI_V4_V5=y +CONFIG_ARCH_MULTI_V5=y +CONFIG_ARCH_MVEBU=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +# CONFIG_ARMADA_37XX_WATCHDOG is not set +# CONFIG_ARMADA_THERMAL is not set +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y +CONFIG_ARM_HAS_GROUP_RELOCS=y +# CONFIG_ARM_KIRKWOOD_CPUIDLE is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_THUMB is not set +CONFIG_ARM_UNWIND=y +CONFIG_ATA=y +CONFIG_ATAGS=y +CONFIG_ATA_LEDS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CACHE_FEROCEON_L2=y +# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set +CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_FEROCEON=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FEROCEON=y +# CONFIG_CPU_FEROCEON_OLD_ID is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_PABRT_LEGACY=y +CONFIG_CPU_PM=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_FEROCEON=y +CONFIG_CPU_USE_DOMAINS=y +CONFIG_CRC16=y +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_SLICEBY8=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_MARVELL=y +CONFIG_CRYPTO_DEV_MARVELL_CESA=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" +CONFIG_DEBUG_MVEBU_UART0_ALTERNATE=y +# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set +CONFIG_DEBUG_UART_8250=y +CONFIG_DEBUG_UART_8250_SHIFT=2 +CONFIG_DEBUG_UART_PHYS=0xf1012000 +CONFIG_DEBUG_UART_VIRT=0xfed12000 +CONFIG_DMA_OPS=y +CONFIG_DNOTIFY=y +CONFIG_DTC=y +# CONFIG_EARLY_PRINTK is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FORCE_PCI=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_MVEBU=y +CONFIG_GRO_CELLS=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HWMON=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OMAP=y +CONFIG_HZ_FIXED=0 +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MV64XXX=y +# CONFIG_I2C_PXA is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQSTACKS=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_KIRKWOOD_CLK=y +CONFIG_KIRKWOOD_THERMAL=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_NETXBIG=y +CONFIG_LEDS_NS2=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MACH_KIRKWOOD=y +CONFIG_MACH_MVEBU_ANY=y +CONFIG_MANGLE_BOOTARGS=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MIGRATION=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_MARVELL is not set +CONFIG_MTD_NAND_ORION=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MV643XX_ETH=y +CONFIG_MVEBU_CLK_COMMON=y +CONFIG_MVEBU_MBUS=y +CONFIG_MVMDIO=y +# CONFIG_MVNETA is not set +# CONFIG_MVPP2 is not set +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_KUSER_HELPERS=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_DSA_COMMON=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NET_XGRESS=y +CONFIG_NLS=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_ORION_IRQCHIP=y +CONFIG_ORION_TIMER=y +CONFIG_ORION_WATCHDOG=y +CONFIG_OUTER_CACHE=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_BRIDGE_EMUL=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MVEBU=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +CONFIG_PHYLINK=y +# CONFIG_PHY_MVEBU_A3700_UTMI is not set +# CONFIG_PHY_MVEBU_A38X_COMPHY is not set +CONFIG_PHY_MVEBU_SATA=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_KIRKWOOD=y +CONFIG_PINCTRL_MVEBU=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PINCTRL_SX150X=y +CONFIG_PLAT_ORION=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_LINKSTATION=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_MV=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_SCSI=y +CONFIG_SCSI_COMMON=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_MVEBU_UART is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SGL_ALLOC=y +CONFIG_SG_POOL=y +CONFIG_SOC_BUS=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +# CONFIG_SPI_ARMADA_3700 is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_ORION=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SRAM=y +CONFIG_SRAM_EXEC=y +CONFIG_SWPHY=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_LED_TRIG=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +# CONFIG_VFP is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WAN=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-e4200-v2.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-e4200-v2.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-e4200-v2.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-e4200-v2.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea3500.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-ea3500.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea3500.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-ea3500.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea4500.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-ea4500.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea4500.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-ea4500.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-goflexhome.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-goflexhome.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-goflexhome.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-goflexhome.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ix4-200d.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-ix4-200d.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ix4-200d.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-ix4-200d.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nas1.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-nas1.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nas1.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-nas1.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nsa310b.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-nsa310b.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nsa310b.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-nsa310b.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-on100.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-on100.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-on100.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-on100.dts diff --git a/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-stora.dts b/target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-stora.dts similarity index 100% rename from target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-stora.dts rename to target/linux/kirkwood/files-6.1/arch/arm/boot/dts/kirkwood-stora.dts diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-e4200-v2.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-e4200-v2.dts new file mode 100644 index 0000000000..bfd708a677 --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-e4200-v2.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "kirkwood-linksys-viper.dts" + +/ { + model = "Linksys E4200 v2 (Viper)"; + compatible = "linksys,e4200-v2", "linksys,viper", "marvell,kirkwood-88f6282", "marvell,kirkwood"; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ea3500.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ea3500.dts new file mode 100644 index 0000000000..e9f9e30bb4 --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ea3500.dts @@ -0,0 +1,243 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * kirkwood-linksys-audi.dts - Device Tree file for Linksys EA3500 + * + * (c) 2013 Jonas Gorski + * (c) 2013 Deutsche Telekom Innovation Laboratories + * (c) 2014 Luka Perkov + * (c) 2014 Dan Walters + * + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6282.dtsi" + +/ { + model = "Linksys EA3500 (Audi)"; + compatible = "linksys,ea3500", "linksys,audi", "marvell,kirkwood-88f6282", "marvell,kirkwood"; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x4000000>; + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&pmx_btn_wps &pmx_btn_reset>; + pinctrl-names = "default"; + + wps { + label = "WPS Button"; + linux,code = ; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + pinctrl-0 = <&pmx_led_green_power>; + pinctrl-names = "default"; + + led_power: power { + label = "audi:green:power"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; +}; + +&pinctrl { + pmx_led_green_power: pmx-led-green-power { + marvell,pins = "mpp7"; + marvell,function = "gpo"; + }; + + pmx_btn_wps: pmx-btn-wps { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + + pmx_btn_reset: pmx-btn-reset { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; +}; + +&mdio { + status = "okay"; + + switch@10 { + compatible = "marvell,mv88e6085"; + #address-cells = <1>; + #size-cells = <0>; + reg = <16>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "ethernet1"; + }; + + port@1 { + reg = <1>; + label = "ethernet2"; + }; + + port@2 { + reg = <2>; + label = "ethernet3"; + }; + + port@3 { + reg = <3>; + label = "ethernet4"; + }; + + port@4 { + reg = <4>; + label = "internet"; + }; + + port@5 { + reg = <5>; + phy-mode = "rgmii-id"; + ethernet = <ð0port>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; +}; + +&nand { + status = "okay"; + + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "u_env"; + reg = <0x80000 0x4000>; + }; + + partition@84000 { + label = "s_env"; + reg = <0x84000 0x4000>; + }; + + partition@200000 { + label = "kernel1"; + reg = <0x200000 0x1400000>; + }; + + partition@600000 { + label = "rootfs1"; + reg = <0x600000 0x1000000>; + }; + + partition@1600000 { + label = "kernel2"; + reg = <0x1600000 0x1400000>; + }; + + partition@1a00000 { + label = "rootfs2"; + reg = <0x1a00000 0x1000000>; + }; + + partition@2a00000 { + label = "syscfg"; + reg = <0x2a00000 0x1600000>; + }; + + partition@88000 { + label = "unused"; + reg = <0x88000 0x178000>; + }; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +/* eth0 is connected to a Marvell 88E6171 switch, without a PHY. So set + * fixed speed and duplex. + */ +ð0 { + status = "okay"; + + ethernet0-port@0 { + speed = <1000>; + duplex = <1>; + phy-mode = "rgmii"; + }; +}; + +/* eth1 is connected to the switch at port 6. However DSA only supports a + * single CPU port. This port is disabled to avoid confusion. + */ +ð1 { + status = "disabled"; +}; + +/* There is no battery on the board, so the RTC does not keep + * time when there is no power, making it useless. + */ +&rtc { + status = "disabled"; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ea4500.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ea4500.dts new file mode 100644 index 0000000000..495cff34a4 --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ea4500.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "kirkwood-linksys-viper.dts" + +/ { + model = "Linksys EA4500 (Viper)"; + compatible = "linksys,ea4500", "linksys,viper", "marvell,kirkwood-88f6282", "marvell,kirkwood"; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-goflexhome.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-goflexhome.dts new file mode 100644 index 0000000000..b0b69b46cd --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-goflexhome.dts @@ -0,0 +1,135 @@ +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Seagate GoFlex Home"; + compatible = "seagate,goflexhome", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + aliases { + led-boot = &led_health; + led-failsafe = &led_fault; + led-running = &led_health; + led-upgrade = &led_fault; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_usb_power_enable: pmx-usb-power-enable { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_led_white: pmx-led-white { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + + pmx_led_green: pmx-led_green { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + + pmx_led_orange: pmx-led-orange { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + }; + + serial@12000 { + status = "okay"; + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led_health: health { + label = "status:green:health"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + led_fault: fault { + label = "status:orange:fault"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + + misc { + label = "status:white:misc"; + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + }; + }; + + regulators { + compatible = "simple-bus"; + + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&pmx_usb_power_enable>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&nand { + status = "okay"; + + chip-delay = <40>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "ubi"; + reg = <0x0100000 0xff00000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ix4-200d.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ix4-200d.dts new file mode 100644 index 0000000000..6220fbf137 --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-ix4-200d.dts @@ -0,0 +1,199 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" +#include + +/ { + model = "Iomega ix4-200d"; + compatible = "iom,ix4-200d", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + aliases { + led-boot = &led_status_white; + led-failsafe = &led_status_red; + led-running = &led_power_white; + led-upgrade = &led_status_red; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + ocp@f1000000 { + i2c@11000 { + status = "okay"; + + adt7473@2e { + compatible = "adi,adt7473"; + reg = <0x2e>; + }; + }; + + pinctrl: pin-controller@10000 { + pmx_spi: pmx-spi { + marvell,pins = "mpp12", "mpp13", "mpp14"; + marvell,function = "gpio"; + }; + + pmx_keys: pmx-keys { + marvell,pins = "mpp16", "mpp29", "mpp47", "mpp49"; + marvell,function = "gpio"; + }; + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + + serial@12000 { + status = "okay"; + }; + + spi3 { + compatible = "spi-gpio"; + #address-cells = <0x1>; + ranges; + status = "okay"; + sck-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + mosi-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + num-chipselects = <1>; + #size-cells = <0>; + + gpio_spi: gpio_spi@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + spi-max-frequency = <100000>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_keys>; + pinctrl-names = "default"; + + button-0 { + label = "Next Button"; + linux,code = ; + gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; + }; + + button-1 { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + button-2 { + label = "Cancel Button"; + linux,code = ; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + + button-3 { + label = "Power Button"; + linux,code = ; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led_status_white: led-0 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio_spi 4 GPIO_ACTIVE_LOW>; + }; + + led_status_red: led-1 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio_spi 5 GPIO_ACTIVE_LOW>; + }; + + led_power_white: led-2 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpio_spi 7 GPIO_ACTIVE_HIGH>; + }; + }; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; + + ethphy1: ethernet-phy@9 { + reg = <9>; + }; +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@a0000 { + label = "u-boot environment"; + reg = <0xa0000 0x20000>; + read-only; + }; + + partition@100000 { + label = "kernel"; + reg = <0x100000 0x400000>; + }; + + partition@500000 { + label = "ubi"; + reg = <0x500000 0x1B00000>; + }; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-nas1.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-nas1.dts new file mode 100644 index 0000000000..379db8acd8 --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-nas1.dts @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "ipTIME NAS1"; + compatible = "iptime,nas1", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + aliases { + serial0 = &uart0; + led-boot = &led_ready; + led-failsafe = &led_ready; + led-running = &led_ready; + led-upgrade = &led_ready; + }; + + chosen { + /* + * "root" argument from the stock bootloader should be ignored + * as it'll prevent the kernel from finding the correct rootfs. + */ + bootargs-append = " console=ttyS0,115200 root="; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + gpio-leds { + compatible = "gpio-leds"; + + pinctrl-0 = <&pmx_led>; + pinctrl-names = "default"; + + hdd { + label = "blue:hdd"; + gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "ata1"; + }; + + usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + trigger-sources = <&ehci_port1>; + linux,default-trigger = "usbport"; + }; + + led_ready: ready { + label = "blue:ready"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&pmx_button>; + pinctrl-names = "default"; + + reset-copy { + label = "Reset/Copy Button"; + linux,code = ; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + }; + + power { + label = "Power Button"; + linux,code = ; + gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-fan { + compatible = "gpio-fan"; + + pinctrl-0 = <&pmx_fan>; + pinctrl-names = "default"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>, + <&gpio1 10 GPIO_ACTIVE_HIGH>; + /* We don't know the exact rpm, just use dummy values here. */ + gpio-fan,speed-map = <0 0>, <1 1>, <2 2>; + #cooling-cells = <2>; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&pca9536 0 GPIO_ACTIVE_LOW>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&pmx_usb_vbus>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&pinctrl { + pmx_led: pmx-led { + marvell,pins = "mpp35", "mpp45", "mpp46"; + marvell,function = "gpio"; + }; + + pmx_fan: pmx-fan { + marvell,pins = "mpp41", "mpp42"; + marvell,function = "gpio"; + }; + + pmx_usb_vbus: pmx-usb-vbus { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + + pmx_button: pmx-button { + marvell,pins = "mpp44", "mpp48"; + marvell,function = "gpio"; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + compatible = "openwrt,uimage", "denx,uimage"; + openwrt,offset = <0x400>; + label = "firmware"; + reg = <0x40000 0xf80000>; + }; + + partition@fc0000 { + label = "config"; + reg = <0xfc0000 0x40000>; + read-only; + }; + }; + }; +}; + +&rtc { + status = "disabled"; +}; + +&i2c0 { + status = "okay"; + + pca9536: gpio@41 { + compatible = "nxp,pca9536"; + reg = <0x41>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + ehci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&mdio { + status = "okay"; + + ethphyb: ethernet-phy@b { + reg = <0x0b>; + }; +}; + +ð1 { + status = "okay"; +}; + +ð1port { + phy-handle = <ðphyb>; + phy-connection-type = "rgmii-id"; +}; + +&sata { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + nr-ports = <1>; + + sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-nsa310b.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-nsa310b.dts new file mode 100644 index 0000000000..12e51d6656 --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-nsa310b.dts @@ -0,0 +1,144 @@ +/dts-v1/; + +#include "kirkwood-nsa3x0-common.dtsi" + +/* + * There are at least two different NSA310 designs. This variant has + * a red/green USB Led (same as nsa310) and a lm85 temp/fan controller. + */ + +/ { + model = "ZyXEL NSA310b"; + compatible = "zyxel,nsa310b", "zyxel,nsa310", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + aliases { + led-boot = &led_green_sys; + led-failsafe = &led_red_sys; + led-running = &led_green_sys; + led-upgrade = &led_red_sys; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pinctrl-names = "default"; + + pmx_led_esata_green: pmx-led-esata-green { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + + pmx_led_esata_red: pmx-led-esata-red { + marvell,pins = "mpp13"; + marvell,function = "gpio"; + }; + + pmx_led_usb_green: pmx-led-usb-green { + marvell,pins = "mpp15"; + marvell,function = "gpio"; + }; + + pmx_led_usb_red: pmx-led-usb-red { + marvell,pins = "mpp16"; + marvell,function = "gpio"; + }; + + pmx_led_sys_green: pmx-led-sys-green { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + pmx_led_sys_red: pmx-led-sys-red { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_led_hdd_green: pmx-led-hdd-green { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + + pmx_led_hdd_red: pmx-led-hdd-red { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + + }; + + i2c@11000 { + status = "okay"; + + lm85: lm85@2e { + compatible = "national,lm85"; + reg = <0x2e>; + }; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led_green_sys: green-sys { + label = "nsa310:green:sys"; + gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led_red_sys: red-sys { + label = "nsa310:red:sys"; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + green-hdd { + label = "nsa310:green:hdd"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "ata1"; + }; + + red-hdd { + label = "nsa310:red:hdd"; + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + }; + + green-esata { + label = "nsa310:green:esata"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "ata2"; + }; + + red-esata { + label = "nsa310:red:esata"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + }; + + green-usb { + label = "nsa310:green:usb"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "usb-host"; + }; + + red-usb { + label = "nsa310:red:usb"; + gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; + }; + + green-copy { + label = "nsa310:green:copy"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + }; + + red-copy { + label = "nsa310:red:copy"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; + }; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-on100.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-on100.dts new file mode 100644 index 0000000000..5ae66ede2f --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-on100.dts @@ -0,0 +1,165 @@ +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6282.dtsi" + +/ { + model = "Cisco Systems ON100"; + compatible = "cisco,on100", "marvell,kirkwood-88f6282", "marvell,kirkwood"; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + aliases { + led-boot = &led_health_green; + led-failsafe = &led_health_red; + led-running = &led_health_green; + led-upgrade = &led_health_red; + serial0 = &uart0; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&pmx_btn_reset>; + pinctrl-names = "default"; + + reset { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + pinctrl-0 = <&pmx_led_health_red &pmx_led_health_green>; + pinctrl-names = "default"; + + led_health_green: health-green { + label = "on100:green:health"; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + led_health_red: health-red { + label = "on100:red:health"; + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + }; + + health2-green { + label = "on100:green:health2"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + + health2-red { + label = "on100:red:health2"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; + }; +}; + +ð1 { + status = "okay"; + + ethernet1-port@0 { + phy-handle = <ðphy1>; + phy-connection-type = "rgmii-id"; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + /* Marvell 88E1121R */ + compatible = "ethernet-phy-id0141.0cb0", + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + /* Marvell 88E1121R */ + compatible = "ethernet-phy-id0141.0cb0", + "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x00000000 0x000a0000>; + read-only; + }; + + partition@a0000 { + label = "u-boot environment"; + reg = <0x000a0000 0x00020000>; + read-only; + }; + + partition@c0000 { + label = "kernel"; + reg = <0x000c0000 0x00540000>; + }; + + partition@600000 { + label = "ubi"; + reg = <0x00600000 0x1fa00000>; + }; +}; + +&pinctrl { + pmx_led_health_red: pmx-led-health-red { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + + pmx_led_health_green: pmx-led-health-green { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_led_health2_red: pmx-led-health2-red { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + + pmx_led_health2_green: pmx-led-health2-green { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + + pmx_btn_reset: pmx-btn-reset { + marvell,pins = "mpp31"; + marvell,function = "gpio"; + }; +}; + +&sdio { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; diff --git a/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-stora.dts b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-stora.dts new file mode 100644 index 0000000000..577c009144 --- /dev/null +++ b/target/linux/kirkwood/files-6.6/arch/arm/boot/dts/marvell/kirkwood-stora.dts @@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Device Tree file for NETGEAR Stora (MS2000/2110) + * + * Copyright (C) 2013, Arnaud EBALARD + * Copyright (C) 2021, Zoltan HERPAI + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "NETGEAR Stora (MS2000/2110)"; + compatible = "netgear,stora", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { /* 128 MB */ + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_button_power: pmx-button-power { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + + pmx_button_reset: pmx-button-reset { + marvell,pins = "mpp38"; + marvell,function = "gpio"; + }; + + pmx_led_blue_power: pmx-led-blue-power { + marvell,pins = "mpp31"; + marvell,function = "gpio"; + }; + + pmx_led_green_disk1: pmx-led-green-disk1 { + marvell,pins = "mpp21"; + marvell,function = "gpio"; + }; + + pmx_led_green_disk2: pmx-led-green-disk2 { + marvell,pins = "mpp20"; + marvell,function = "gpio"; + }; + + pmx_led_red_disk1: pmx-led-red-disk1 { + marvell,pins = "mpp23"; + marvell,function = "gpio"; + }; + + pmx_led_red_disk2: pmx-led-red-disk2 { + marvell,pins = "mpp22"; + marvell,function = "gpio"; + }; + + pmx_poweroff: pmx-poweroff { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + + pmx_fan_tacho: pmx-fan-tacho { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + }; + + clocks { + pcf8563_clk: pcf8563-oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2048>; + }; + }; + + i2c@11000 { + status = "okay"; + + tc654@1b { + compatible = "microchip,tc654"; + reg = <0x1b>; + }; + + lm75@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + + pcf8563@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + }; + + serial@12000 { + status = "okay"; + }; + + sata@80000 { + status = "okay"; + phy-names = "port0", "port1"; + nr-ports = <2>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = < &pmx_led_blue_power + &pmx_led_green_disk1 &pmx_led_green_disk2 + &pmx_led_red_disk1 &pmx_led_red_disk2 >; + pinctrl-names = "default"; + + led_power: power { + label = "blue:power"; + gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + disk1 { + label = "green:disk1"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata1"; + }; + + disk2 { + label = "green:disk2"; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata2"; + }; + + disk1_fail { + label = "red:disk1_fail"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + }; + + disk2_fail { + label = "red:disk2_fail"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_button_power &pmx_button_reset >; + pinctrl-names = "default"; + + power { + label = "Power Button"; + linux,code = ; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + pinctrl-0 = <&pmx_poweroff>; + pinctrl-names = "default"; + gpios = <&gpio0 40 GPIO_ACTIVE_LOW>; + }; +}; + +&nand { + status = "okay"; + chip-delay = <40>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x0e0000>; + read-only; + }; + + partition@e0000 { + label = "u-boot-env"; + reg = <0x0e00000 0x020000>; + }; + + partition@100000 { + label = "ubi"; + reg = <0x0100000 0xff00000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */ + compatible = "marvell,88e1116"; + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/target/linux/kirkwood/image/Makefile b/target/linux/kirkwood/image/Makefile index c51f2d868d..ca47413897 100644 --- a/target/linux/kirkwood/image/Makefile +++ b/target/linux/kirkwood/image/Makefile @@ -112,6 +112,9 @@ endef define Device/Default PROFILES := Default +ifdef CONFIG_LINUX_6_6 + DEVICE_DTS_DIR := $(DTS_DIR)/marvell +endif DEVICE_DTS = kirkwood-$(lastword $(subst _, ,$(1))) KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts) KERNEL := kernel-bin | append-dtb | uImage none diff --git a/target/linux/kirkwood/patches-6.6/100-ib62x0.patch b/target/linux/kirkwood/patches-6.6/100-ib62x0.patch new file mode 100644 index 0000000000..1ee05f837f --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/100-ib62x0.patch @@ -0,0 +1,53 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts +@@ -6,7 +6,14 @@ + + / { + model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; +- compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; ++ compatible = "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; ++ ++ aliases { ++ led-boot = &led_green_os; ++ led-failsafe = &led_red_os; ++ led-running = &led_green_os; ++ led-upgrade = &led_red_os; ++ }; + + memory { + device_type = "memory"; +@@ -81,12 +88,12 @@ + &pmx_led_usb_transfer>; + pinctrl-names = "default"; + +- green-os { ++ led_green_os: green-os { + label = "ib62x0:green:os"; + gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; +- default-state = "keep"; ++ default-state = "on"; + }; +- red-os { ++ led_red_os: red-os { + label = "ib62x0:red:os"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + }; +@@ -118,13 +125,13 @@ + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x600000>; ++ label = "second stage u-boot"; ++ reg = <0x100000 0x200000>; + }; + +- partition@700000 { +- label = "root"; +- reg = <0x0700000 0xf900000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x200000 0xfe00000>; + }; + + }; diff --git a/target/linux/kirkwood/patches-6.6/101-iconnect.patch b/target/linux/kirkwood/patches-6.6/101-iconnect.patch new file mode 100644 index 0000000000..cd1813d0a6 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/101-iconnect.patch @@ -0,0 +1,80 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts +@@ -8,6 +8,13 @@ + model = "Iomega Iconnect"; + compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_power_blue; ++ led-failsafe = &led_power_red; ++ led-running = &led_power_blue; ++ led-upgrade = &led_power_red; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; +@@ -16,8 +23,6 @@ + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; +- linux,initrd-start = <0x4500040>; +- linux,initrd-end = <0x4800000>; + }; + + ocp@f1000000 { +@@ -89,12 +94,12 @@ + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; +- power-blue { ++ led_power_blue: power-blue { + label = "power:blue"; + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; +- default-state = "keep"; ++ default-state = "on"; + }; +- power-red { ++ led_power_red: power-red { + label = "power:red"; + gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; +@@ -146,28 +151,23 @@ + status = "okay"; + + partition@0 { +- label = "uboot"; +- reg = <0x0000000 0xc0000>; ++ label = "u-boot"; ++ reg = <0x0000000 0xe0000>; + }; + +- partition@a0000 { +- label = "env"; +- reg = <0xa0000 0x20000>; ++ partition@e0000 { ++ label = "u-boot environment"; ++ reg = <0xe0000 0x100000>; + }; + + partition@100000 { +- label = "zImage"; +- reg = <0x100000 0x300000>; +- }; +- +- partition@540000 { +- label = "initrd"; +- reg = <0x540000 0x300000>; ++ label = "second stage u-boot"; ++ reg = <0x100000 0x200000>; + }; + +- partition@980000 { +- label = "boot"; +- reg = <0x980000 0x1f400000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x200000 0x1fe00000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-6.6/102-dockstar.patch b/target/linux/kirkwood/patches-6.6/102-dockstar.patch new file mode 100644 index 0000000000..e97f15cab4 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/102-dockstar.patch @@ -0,0 +1,62 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts +@@ -8,6 +8,13 @@ + model = "Seagate FreeAgent Dockstar"; + compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_health; ++ led-failsafe = &led_fault; ++ led-running = &led_health; ++ led-upgrade = &led_fault; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; +@@ -42,12 +49,12 @@ + pinctrl-0 = <&pmx_led_green &pmx_led_orange>; + pinctrl-names = "default"; + +- health { ++ led_health: health { + label = "status:green:health"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; +- default-state = "keep"; ++ default-state = "on"; + }; +- fault { ++ led_fault: fault { + label = "status:orange:fault"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; +@@ -78,18 +85,22 @@ + + partition@0 { + label = "u-boot"; +- reg = <0x0000000 0x100000>; +- read-only; ++ reg = <0x0000000 0xe0000>; ++ }; ++ ++ partition@e0000 { ++ label = "u-boot environment"; ++ reg = <0xe0000 0x100000>; + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x400000>; ++ label = "second stage u-boot"; ++ reg = <0x100000 0x200000>; + }; + +- partition@500000 { +- label = "data"; +- reg = <0x0500000 0xfb00000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x200000 0xfe00000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-6.6/103-iomega-ix2-200.patch b/target/linux/kirkwood/patches-6.6/103-iomega-ix2-200.patch new file mode 100644 index 0000000000..0251a10600 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/103-iomega-ix2-200.patch @@ -0,0 +1,71 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts +@@ -8,6 +8,13 @@ + model = "Iomega StorCenter ix2-200"; + compatible = "iom,ix2-200", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_power; ++ led-failsafe = &led_health; ++ led-running = &led_power; ++ led-upgrade = &led_health; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; +@@ -127,16 +134,16 @@ + &pmx_led_rebuild &pmx_led_health >; + pinctrl-names = "default"; + +- power_led { ++ led_power: power_led { + label = "status:white:power_led"; + gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; +- default-state = "keep"; ++ default-state = "on"; + }; + rebuild_led { + label = "status:white:rebuild_led"; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + }; +- health_led { ++ led_health: health_led { + label = "status:red:health_led"; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + }; +@@ -186,19 +193,19 @@ + }; + + partition@a0000 { +- label = "env"; ++ label = "u-boot environment"; + reg = <0xa0000 0x20000>; + read-only; + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x100000 0x300000>; ++ label = "kernel"; ++ reg = <0x100000 0x400000>; + }; + +- partition@400000 { +- label = "rootfs"; +- reg = <0x400000 0x1C00000>; ++ partition@500000 { ++ label = "ubi"; ++ reg = <0x500000 0x1C00000>; + }; + }; + +@@ -211,7 +218,7 @@ + }; + + ð0 { +- status = "okay"; ++ status = "disabled"; + ethernet0-port@0 { + speed = <1000>; + duplex = <1>; diff --git a/target/linux/kirkwood/patches-6.6/105-linksys-viper-dts.patch b/target/linux/kirkwood/patches-6.6/105-linksys-viper-dts.patch new file mode 100644 index 0000000000..6eb83003a2 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/105-linksys-viper-dts.patch @@ -0,0 +1,59 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts +@@ -24,6 +24,10 @@ + }; + + aliases { ++ led-boot = &led_white_health; ++ led-failsafe = &led_white_health; ++ led-running = &led_white_health; ++ led-upgrade = &led_white_health; + serial0 = &uart0; + }; + +@@ -56,9 +60,10 @@ + pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >; + pinctrl-names = "default"; + +- white-health { ++ led_white_health: white-health { + label = "viper:white:health"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; + }; + + white-pulse { +@@ -114,23 +119,23 @@ + }; + + partition@200000 { +- label = "kernel"; +- reg = <0x200000 0x2A0000>; ++ label = "kernel1"; ++ reg = <0x200000 0x1A00000>; + }; + +- partition@4a0000 { +- label = "rootfs"; +- reg = <0x4A0000 0x1760000>; ++ partition@600000 { ++ label = "rootfs1"; ++ reg = <0x600000 0x1600000>; + }; + + partition@1c00000 { +- label = "alt_kernel"; +- reg = <0x1C00000 0x2A0000>; ++ label = "kernel2"; ++ reg = <0x1C00000 0x1A00000>; + }; + +- partition@1ea0000 { +- label = "alt_rootfs"; +- reg = <0x1EA0000 0x1760000>; ++ partition@2000000 { ++ label = "rootfs2"; ++ reg = <0x2000000 0x1600000>; + }; + + partition@3600000 { diff --git a/target/linux/kirkwood/patches-6.6/106-goflexnet.patch b/target/linux/kirkwood/patches-6.6/106-goflexnet.patch new file mode 100644 index 0000000000..b664009b85 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/106-goflexnet.patch @@ -0,0 +1,53 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts +@@ -8,6 +8,13 @@ + model = "Seagate GoFlex Net"; + compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_health; ++ led-failsafe = &led_fault; ++ led-running = &led_health; ++ led-upgrade = &led_fault; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; +@@ -85,12 +92,12 @@ + >; + pinctrl-names = "default"; + +- health { ++ led_health: health { + label = "status:green:health"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; +- default-state = "keep"; ++ default-state = "on"; + }; +- fault { ++ led_fault: fault { + label = "status:orange:fault"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; +@@ -159,18 +166,8 @@ + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x400000>; +- }; +- +- partition@500000 { +- label = "pogoplug"; +- reg = <0x0500000 0x2000000>; +- }; +- +- partition@2500000 { +- label = "root"; +- reg = <0x02500000 0xd800000>; ++ label = "ubi"; ++ reg = <0x0100000 0x0ff00000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-6.6/107-01-zyxel-nsa3x0-common-nand-partitions.patch b/target/linux/kirkwood/patches-6.6/107-01-zyxel-nsa3x0-common-nand-partitions.patch new file mode 100644 index 0000000000..a73d82b892 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/107-01-zyxel-nsa3x0-common-nand-partitions.patch @@ -0,0 +1,48 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi ++++ b/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi +@@ -112,40 +112,16 @@ + + partition@0 { + label = "uboot"; +- reg = <0x0000000 0x0100000>; ++ reg = <0x0000000 0x00c0000>; + read-only; + }; + partition@100000 { + label = "uboot_env"; +- reg = <0x0100000 0x0080000>; ++ reg = <0x00c0000 0x0080000>; + }; +- partition@180000 { +- label = "key_store"; +- reg = <0x0180000 0x0080000>; +- }; +- partition@200000 { +- label = "info"; +- reg = <0x0200000 0x0080000>; +- }; +- partition@280000 { +- label = "etc"; +- reg = <0x0280000 0x0a00000>; +- }; +- partition@c80000 { +- label = "kernel_1"; +- reg = <0x0c80000 0x0a00000>; +- }; +- partition@1680000 { +- label = "rootfs1"; +- reg = <0x1680000 0x2fc0000>; +- }; +- partition@4640000 { +- label = "kernel_2"; +- reg = <0x4640000 0x0a00000>; +- }; +- partition@5040000 { +- label = "rootfs2"; +- reg = <0x5040000 0x2fc0000>; ++ partition@140000 { ++ label = "ubi"; ++ reg = <0x0140000 0x7ec0000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-6.6/107-03-nsa325.patch b/target/linux/kirkwood/patches-6.6/107-03-nsa325.patch new file mode 100644 index 0000000000..b3f19924db --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/107-03-nsa325.patch @@ -0,0 +1,54 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts +@@ -15,6 +15,13 @@ + model = "ZyXEL NSA325"; + compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_green_sys; ++ led-failsafe = &led_orange_sys; ++ led-running = &led_green_sys; ++ led-upgrade = &led_orange_sys; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; +@@ -162,17 +169,19 @@ + &pmx_led_hdd1_green &pmx_led_hdd1_red>; + pinctrl-names = "default"; + +- green-sys { ++ led_green_sys: green-sys { + label = "nsa325:green:sys"; + gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; + }; +- orange-sys { ++ led_orange_sys: orange-sys { + label = "nsa325:orange:sys"; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + green-hdd1 { + label = "nsa325:green:hdd1"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "ata1"; + }; + red-hdd1 { + label = "nsa325:red:hdd1"; +@@ -181,6 +190,7 @@ + green-hdd2 { + label = "nsa325:green:hdd2"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "ata2"; + }; + red-hdd2 { + label = "nsa325:red:hdd2"; +@@ -189,6 +199,7 @@ + green-usb { + label = "nsa325:green:usb"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "usb-host"; + }; + green-copy { + label = "nsa325:green:copy"; diff --git a/target/linux/kirkwood/patches-6.6/109-pogoplug_v4.patch b/target/linux/kirkwood/patches-6.6/109-pogoplug_v4.patch new file mode 100644 index 0000000000..ed7e4e4ff0 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/109-pogoplug_v4.patch @@ -0,0 +1,87 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts +@@ -18,12 +18,20 @@ + compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192", + "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_health; ++ led-failsafe = &led_fault; ++ led-running = &led_health; ++ led-upgrade = &led_fault; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; + }; + + chosen { ++ bootargs = "console=ttyS0,115200"; + stdout-path = "uart0:115200n8"; + }; + +@@ -37,8 +45,8 @@ + eject { + debounce-interval = <50>; + wakeup-source; +- linux,code = ; +- label = "Eject Button"; ++ linux,code = ; ++ label = "Reset"; + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + }; +@@ -48,12 +56,12 @@ + pinctrl-0 = <&pmx_led_green &pmx_led_red>; + pinctrl-names = "default"; + +- health { ++ led_health: health { + label = "pogoplugv4:green:health"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; +- fault { ++ led_fault: fault { + label = "pogoplugv4:red:fault"; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; + }; +@@ -137,29 +145,19 @@ + #size-cells = <1>; + + partition@0 { +- label = "u-boot"; +- reg = <0x00000000 0x200000>; ++ label = "uboot"; ++ reg = <0x00000000 0x1c0000>; + read-only; + }; + +- partition@200000 { +- label = "uImage"; +- reg = <0x00200000 0x300000>; +- }; +- +- partition@500000 { +- label = "uImage2"; +- reg = <0x00500000 0x300000>; +- }; +- +- partition@800000 { +- label = "failsafe"; +- reg = <0x00800000 0x800000>; ++ partition@1c0000 { ++ label = "uboot_env"; ++ reg = <0x001c0000 0x40000>; + }; + +- partition@1000000 { +- label = "root"; +- reg = <0x01000000 0x7000000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x00200000 0x7e00000>; + }; + }; + }; diff --git a/target/linux/kirkwood/patches-6.6/110-pogo_e02.patch b/target/linux/kirkwood/patches-6.6/110-pogo_e02.patch new file mode 100644 index 0000000000..21b929dda7 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/110-pogo_e02.patch @@ -0,0 +1,68 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts +@@ -20,6 +20,13 @@ + compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281", + "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_health; ++ led-failsafe = &led_fault; ++ led-running = &led_health; ++ led-upgrade = &led_fault; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; +@@ -33,12 +40,12 @@ + gpio-leds { + compatible = "gpio-leds"; + +- health { ++ led_health: health { + label = "pogo_e02:green:health"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; +- default-state = "keep"; ++ default-state = "on"; + }; +- fault { ++ led_fault: fault { + label = "pogo_e02:orange:fault"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; +@@ -95,24 +102,24 @@ + status = "okay"; + + partition@0 { +- label = "u-boot"; +- reg = <0x0000000 0x100000>; ++ label = "uboot"; ++ reg = <0x0 0xe0000>; + read-only; + }; + +- partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x400000>; ++ partition@e0000 { ++ label = "uboot_env"; ++ reg = <0xe0000 0x20000>; + }; + +- partition@500000 { +- label = "pogoplug"; +- reg = <0x0500000 0x2000000>; ++ partition@100000 { ++ label = "second_stage_uboot"; ++ reg = <0x100000 0x100000>; + }; + +- partition@2500000 { +- label = "root"; +- reg = <0x02500000 0x5b00000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x200000 0x7e00000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-6.6/111-l-50.patch b/target/linux/kirkwood/patches-6.6/111-l-50.patch new file mode 100644 index 0000000000..af6aa80b6d --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/111-l-50.patch @@ -0,0 +1,47 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts +@@ -18,6 +18,13 @@ + reg = <0x00000000 0x20000000>; + }; + ++ aliases { ++ led-boot = &led_status_green; ++ led-failsafe = &led_status_red; ++ led-running = &led_status_green; ++ led-upgrade = &led_status_red; ++ }; ++ + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; +@@ -97,12 +104,12 @@ + leds { + compatible = "gpio-leds"; + +- status_green { ++ led_status_green: status_green { + label = "l-50:green:status"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + +- status_red { ++ led_status_red: status_red { + label = "l-50:red:status"; + gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; + }; +@@ -351,13 +358,8 @@ + }; + + partition@100000 { +- label = "kernel-1"; +- reg = <0x00100000 0x00800000>; +- }; +- +- partition@900000 { +- label = "rootfs-1"; +- reg = <0x00900000 0x07100000>; ++ label = "ubi"; ++ reg = <0x00100000 0x07900000>; + }; + + partition@7a00000 { diff --git a/target/linux/kirkwood/patches-6.6/112-sheevaplug.patch b/target/linux/kirkwood/patches-6.6/112-sheevaplug.patch new file mode 100644 index 0000000000..e8e83bdbba --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/112-sheevaplug.patch @@ -0,0 +1,47 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-common.dtsi ++++ b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-common.dtsi +@@ -78,13 +78,8 @@ + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x400000>; +- }; +- +- partition@500000 { +- label = "root"; +- reg = <0x0500000 0x1fb00000>; ++ label = "ubi"; ++ reg = <0x0100000 0x1ff00000>; + }; + }; + +--- a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts +@@ -13,6 +13,13 @@ + model = "Globalscale Technologies SheevaPlug"; + compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_health; ++ led-failsafe = &led_health; ++ led-running = &led_health; ++ led-upgrade = &led_health; ++ }; ++ + ocp@f1000000 { + mvsdio@90000 { + pinctrl-0 = <&pmx_sdio>; +@@ -28,10 +35,10 @@ + pinctrl-0 = <&pmx_led_blue &pmx_led_red>; + pinctrl-names = "default"; + +- health { ++ led_health: health { + label = "sheevaplug:blue:health"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; +- default-state = "keep"; ++ default-state = "on"; + }; + + misc { diff --git a/target/linux/kirkwood/patches-6.6/113-readynas_duo_v2.patch b/target/linux/kirkwood/patches-6.6/113-readynas_duo_v2.patch new file mode 100644 index 0000000000..9cb2ad102c --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/113-readynas_duo_v2.patch @@ -0,0 +1,76 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-netgear_readynas_duo_v2.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-netgear_readynas_duo_v2.dts +@@ -19,6 +19,13 @@ + reg = <0x00000000 0x10000000>; + }; + ++ aliases { ++ led-boot = &led_power; ++ led-failsafe = &led_power; ++ led-running = &led_power; ++ led-upgrade = &led_power; ++ }; ++ + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; +@@ -115,7 +122,7 @@ + &pmx_led_blue_backup >; + pinctrl-names = "default"; + +- power_led { ++ led_power: power_led { + label = "status:blue:power_led"; + gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; + default-state = "keep"; +@@ -129,11 +136,13 @@ + disk1_led { + label = "status:blue:disk1_led"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "ata1"; + }; + + disk2_led { + label = "status:blue:disk2_led"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "ata2"; + }; + + backup_led { +@@ -150,7 +159,13 @@ + + power-button { + label = "Power Button"; +- linux,code = ; ++ /* Power button and INT pin from PHY are both connected ++ * to this GPIO. Every network restart causes PHY restart ++ * and button is pressed. It's difficult to use it as ++ * KEY_POWER without changes in kernel (or netifd) so ++ * the button is configured as regular one. ++ */ ++ linux,code = ; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + +@@ -208,18 +223,13 @@ + }; + + partition@200000 { +- label = "uImage"; ++ label = "kernel"; + reg = <0x0200000 0x600000>; + }; + + partition@800000 { +- label = "minirootfs"; +- reg = <0x0800000 0x1000000>; +- }; +- +- partition@1800000 { +- label = "jffs2"; +- reg = <0x1800000 0x6800000>; ++ label = "ubi"; ++ reg = <0x0800000 0x7800000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-6.6/114-ctera-c-200-v1.patch b/target/linux/kirkwood/patches-6.6/114-ctera-c-200-v1.patch new file mode 100644 index 0000000000..7e93089616 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/114-ctera-c-200-v1.patch @@ -0,0 +1,58 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts +@@ -14,6 +14,14 @@ + model = "Ctera C200 V1"; + compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + ++ ++ aliases { ++ led-boot = &led_status_green; ++ led-failsafe = &led_status_red; ++ led-running = &led_status_green; ++ led-upgrade = &led_status_red; ++ }; ++ + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; +@@ -78,6 +86,7 @@ + function-enumerator = <1>; + color = ; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "ata1"; + }; + + led-2 { +@@ -85,6 +94,7 @@ + function-enumerator = <2>; + color = ; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "ata2"; + }; + + led-3 { +@@ -94,13 +104,13 @@ + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + }; + +- led-4 { ++ led_status_red: led-4 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + +- led-5 { ++ led_status_green: led-5 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; +@@ -240,7 +250,7 @@ + }; + + partition@7a00000 { +- label = "rootfs"; ++ label = "ubi"; + reg = <0x7a00000 0x8600000>; + }; + }; diff --git a/target/linux/kirkwood/patches-6.6/115-nsa310s.patch b/target/linux/kirkwood/patches-6.6/115-nsa310s.patch new file mode 100644 index 0000000000..2f43dd960c --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/115-nsa310s.patch @@ -0,0 +1,35 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts +@@ -16,6 +16,13 @@ + model = "ZyXEL NSA310S"; + compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_green_sys; ++ led-failsafe = &led_red_sys; ++ led-running = &led_green_sys; ++ led-upgrade = &led_red_sys; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; +@@ -96,14 +103,16 @@ + gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>; + }; + +- led-6 { ++ led_green_sys: led-6 { ++ label = "nsa310s:green:sys"; + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + +- led-7 { ++ led_red_sys: led-7 { ++ label = "nsa310s:red:sys"; + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/kirkwood/patches-6.6/116-4i-edge-200.patch b/target/linux/kirkwood/patches-6.6/116-4i-edge-200.patch new file mode 100644 index 0000000000..62a3074097 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/116-4i-edge-200.patch @@ -0,0 +1,34 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-4i-edge-200.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-4i-edge-200.dts +@@ -20,6 +20,13 @@ + reg = <0x00000000 0x20000000>; + }; + ++ aliases { ++ led-boot = &led_status_green; ++ led-failsafe = &led_status_orange; ++ led-running = &led_status_green; ++ led-upgrade = &led_status_orange; ++ }; ++ + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; +@@ -37,13 +44,15 @@ + linux,default-trigger = "mmc0"; + }; + +- led-2 { ++ led_status_orange: led-2 { ++ label = "orange:status"; + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + }; + +- led-3 { ++ led_status_green: led-3 { ++ label = "green:status"; + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/kirkwood/patches-6.6/117-netgear_stora.patch b/target/linux/kirkwood/patches-6.6/117-netgear_stora.patch new file mode 100644 index 0000000000..db0bdb4228 --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/117-netgear_stora.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/boot/dts/marvell/Makefile ++++ b/arch/arm/boot/dts/marvell/Makefile +@@ -157,6 +157,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \ + kirkwood-rs411.dtb \ + kirkwood-sheevaplug.dtb \ + kirkwood-sheevaplug-esata.dtb \ ++ kirkwood-stora.dtb \ + kirkwood-t5325.dtb \ + kirkwood-topkick.dtb \ + kirkwood-ts219-6281.dtb \ diff --git a/target/linux/kirkwood/patches-6.6/201-enable-sata-port-specific-led-triggers.patch b/target/linux/kirkwood/patches-6.6/201-enable-sata-port-specific-led-triggers.patch new file mode 100644 index 0000000000..3db362de9f --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/201-enable-sata-port-specific-led-triggers.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/mach-mvebu/Kconfig ++++ b/arch/arm/mach-mvebu/Kconfig +@@ -115,6 +115,7 @@ config MACH_DOVE + config MACH_KIRKWOOD + bool "Marvell Kirkwood boards" + depends on ARCH_MULTI_V5 ++ select ARCH_WANT_LIBATA_LEDS + select CPU_FEROCEON + select GPIOLIB + select KIRKWOOD_CLK diff --git a/target/linux/kirkwood/patches-6.6/202-linksys-find-active-root.patch b/target/linux/kirkwood/patches-6.6/202-linksys-find-active-root.patch new file mode 100644 index 0000000000..5029b1791c --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/202-linksys-find-active-root.patch @@ -0,0 +1,62 @@ +The WRT1900AC among other Linksys routers uses a dual-firmware layout. +Dynamically rename the active partition to "ubi". + +Signed-off-by: Imre Kaloz +--- +--- a/drivers/mtd/parsers/ofpart_core.c ++++ b/drivers/mtd/parsers/ofpart_core.c +@@ -38,6 +38,8 @@ static bool node_has_compatible(struct d + return of_get_property(pp, "compatible", NULL); + } + ++static int mangled_rootblock; ++ + static int parse_fixed_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +@@ -47,6 +49,7 @@ static int parse_fixed_partitions(struct + struct mtd_partition *parts; + struct device_node *mtd_node; + struct device_node *ofpart_node; ++ const char *owrtpart = "ubi"; + const char *partname; + struct device_node *pp; + int nr_parts, i, ret = 0; +@@ -152,9 +155,15 @@ static int parse_fixed_partitions(struct + parts[i].size = of_read_number(reg + a_cells, s_cells); + parts[i].of_node = pp; + +- partname = of_get_property(pp, "label", &len); +- if (!partname) +- partname = of_get_property(pp, "name", &len); ++ if (mangled_rootblock && (i == mangled_rootblock)) { ++ partname = owrtpart; ++ } else { ++ partname = of_get_property(pp, "label", &len); ++ ++ if (!partname) ++ partname = of_get_property(pp, "name", &len); ++ } ++ + parts[i].name = partname; + + if (of_get_property(pp, "read-only", &len)) +@@ -271,6 +280,18 @@ static int __init ofpart_parser_init(voi + return 0; + } + ++static int __init active_root(char *str) ++{ ++ get_option(&str, &mangled_rootblock); ++ ++ if (!mangled_rootblock) ++ return 1; ++ ++ return 1; ++} ++ ++__setup("mangled_rootblock=", active_root); ++ + static void __exit ofpart_parser_exit(void) + { + deregister_mtd_parser(&ofpart_parser); diff --git a/target/linux/kirkwood/patches-6.6/203-blackarmor-nas220.patch b/target/linux/kirkwood/patches-6.6/203-blackarmor-nas220.patch new file mode 100644 index 0000000000..8ceac179cb --- /dev/null +++ b/target/linux/kirkwood/patches-6.6/203-blackarmor-nas220.patch @@ -0,0 +1,99 @@ +--- a/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts ++++ b/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts +@@ -17,6 +17,13 @@ + compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192", + "marvell,kirkwood"; + ++ aliases { ++ led-boot = &led_status_amber; ++ led-failsafe = &led_status_amber; ++ led-running = &led_status_blue; ++ led-upgrade = &led_status_amber; ++ }; ++ + memory { /* 128 MB */ + device_type = "memory"; + reg = <0x00000000 0x8000000>; +@@ -36,14 +43,14 @@ + compatible = "gpio-keys"; + + reset { +- label = "Reset"; +- linux,code = ; ++ label = "Reset Button"; ++ linux,code = ; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + +- button { +- label = "Power"; +- linux,code = ; ++ power { ++ label = "Power Button"; ++ linux,code = ; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; + }; +@@ -51,11 +58,27 @@ + gpio-leds { + compatible = "gpio-leds"; + +- blue-power { ++ led_power_blue: power_blue { + label = "nas220:blue:power"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; ++ ++ disk_blue { ++ label = "nas220:blue:disk"; ++ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "disk-activity"; ++ }; ++ ++ led_status_blue: status_blue { ++ label = "nas220:blue:status"; ++ gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led_status_amber: status_amber { ++ label = "nas220:amber:status"; ++ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; ++ }; + }; + + regulators { +@@ -153,6 +176,33 @@ + + &nand { + status = "okay"; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0x0 0xa0000>; ++ read-only; ++ }; ++ ++ partition@a0000 { ++ label = "uboot-env"; ++ reg = <0xa0000 0x10000>; ++ read-only; ++ }; ++ ++ partition@b0000 { ++ label = "reserved"; ++ reg = <0xb0000 0x10000>; ++ read-only; ++ }; ++ ++ partition@c0000 { ++ label = "ubi"; ++ reg = <0xc0000 0x1e80000>; ++ }; ++ }; + }; + + &mdio { diff --git a/target/linux/mvebu/Makefile b/target/linux/mvebu/Makefile index 316bf1dfa0..26bd4d4240 100644 --- a/target/linux/mvebu/Makefile +++ b/target/linux/mvebu/Makefile @@ -10,6 +10,7 @@ FEATURES:=fpu usb pci pcie gpio nand squashfs ramdisk boot-part rootfs-part lega SUBTARGETS:=cortexa9 cortexa53 cortexa72 KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/mvebu/config-6.6 b/target/linux/mvebu/config-6.6 new file mode 100644 index 0000000000..88e5fff4d9 --- /dev/null +++ b/target/linux/mvebu/config-6.6 @@ -0,0 +1,447 @@ +CONFIG_AHCI_MVEBU=y +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MVEBU=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARMADA_370_CLK=y +CONFIG_ARMADA_370_XP_IRQ=y +CONFIG_ARMADA_370_XP_TIMER=y +# CONFIG_ARMADA_37XX_WATCHDOG is not set +CONFIG_ARMADA_38X_CLK=y +CONFIG_ARMADA_THERMAL=y +CONFIG_ARMADA_XP_CLK=y +CONFIG_ARM_APPENDED_DTB=y +# CONFIG_ARM_ARMADA_37XX_CPUFREQ is not set +# CONFIG_ARM_ARMADA_8K_CPUFREQ is not set +CONFIG_ARM_ATAG_DTB_COMPAT=y +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GLOBAL_TIMER=y +CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1 +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_MVEBU_V7_CPUIDLE=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_ATA=y +CONFIG_ATAGS=y +CONFIG_ATA_LEDS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NVME=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOUNCE=y +# CONFIG_CACHE_FEROCEON_L2 is not set +CONFIG_CACHE_L2X0=y +CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PJ4B=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRYPTO_AES_ARM=y +CONFIG_CRYPTO_AES_ARM_BS=y +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_MARVELL=y +CONFIG_CRYPTO_DEV_MARVELL_CESA=y +CONFIG_CRYPTO_ESSIV=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA1_ARM=y +CONFIG_CRYPTO_SHA1_ARM_NEON=y +CONFIG_CRYPTO_SHA256_ARM=y +CONFIG_CRYPTO_SHA512_ARM=y +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_ALIGN_RODATA=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" +CONFIG_DEBUG_MVEBU_UART0=y +# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set +# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set +CONFIG_DEBUG_UART_8250=y +CONFIG_DEBUG_UART_8250_SHIFT=2 +CONFIG_DEBUG_UART_PHYS=0xd0012000 +CONFIG_DEBUG_UART_VIRT=0xfec12000 +CONFIG_DEBUG_USER=y +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_ENGINE_RAID=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_EXT4_FS=y +CONFIG_EXTCON=y +CONFIG_F2FS_FS=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_MVEBU=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GRO_CELLS=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HWBM=y +CONFIG_HWMON=y +CONFIG_HW_RANDOM=y +CONFIG_HZ_FIXED=0 +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MV64XXX=y +# CONFIG_I2C_PXA is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +# CONFIG_IWMMXT is not set +CONFIG_JBD2=y +CONFIG_KMAP_LOCAL=y +CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PCA963X=y +CONFIG_LEDS_TLC591XX=y +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MACH_ARMADA_370=y +# CONFIG_MACH_ARMADA_375 is not set +CONFIG_MACH_ARMADA_38X=y +# CONFIG_MACH_ARMADA_39X is not set +CONFIG_MACH_ARMADA_XP=y +# CONFIG_MACH_DOVE is not set +CONFIG_MACH_MVEBU_ANY=y +CONFIG_MACH_MVEBU_V7=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MANGLE_BOOTARGS=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_I2C=y +CONFIG_MEMFD_CREATE=y +CONFIG_MEMORY=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_MVSDIO=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_PXAV3=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_MARVELL=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_MVEBU_CLK_COMMON=y +CONFIG_MVEBU_CLK_COREDIV=y +CONFIG_MVEBU_CLK_CPU=y +CONFIG_MVEBU_DEVBUS=y +CONFIG_MVEBU_MBUS=y +CONFIG_MVMDIO=y +CONFIG_MVNETA=y +CONFIG_MVNETA_BM=y +CONFIG_MVNETA_BM_ENABLE=y +# CONFIG_MVPP2 is not set +CONFIG_MV_XOR=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_DSA_COMMON=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NLS=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +CONFIG_NVME_CORE=y +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_MULTIPATH is not set +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_ORION_WATCHDOG=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PAGE_POOL_STATS=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_BRIDGE_EMUL=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_MVEBU=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +# CONFIG_PHY_MVEBU_A3700_COMPHY is not set +# CONFIG_PHY_MVEBU_A3700_UTMI is not set +# CONFIG_PHY_MVEBU_A38X_COMPHY is not set +# CONFIG_PHY_MVEBU_CP110_COMPHY is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_370=y +CONFIG_PINCTRL_ARMADA_38X=y +CONFIG_PINCTRL_ARMADA_XP=y +CONFIG_PINCTRL_MVEBU=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PJ4B_ERRATA_4742=y +CONFIG_PL310_ERRATA_753970=y +CONFIG_PLAT_ORION=y +CONFIG_PM_OPP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_ARMADA38X=y +# CONFIG_RTC_DRV_MV is not set +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_HOST=y +CONFIG_SATA_MV=y +CONFIG_SATA_PMP=y +CONFIG_SCSI=y +CONFIG_SCSI_COMMON=y +CONFIG_SENSORS_PWM_FAN=y +CONFIG_SENSORS_TMP421=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_MVEBU_CONSOLE=y +CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SFP=y +CONFIG_SGL_ALLOC=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BUS=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +# CONFIG_SPI_ARMADA_3700 is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_ORION=y +CONFIG_SRAM=y +CONFIG_SRAM_EXEC=y +CONFIG_SRCU=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_ORION=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_LEDS_TRIGGER_USBPORT=y +CONFIG_USB_PHY=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_MVEBU=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/mvebu/cortexa53/config-6.6 b/target/linux/mvebu/cortexa53/config-6.6 new file mode 100644 index 0000000000..3534537b54 --- /dev/null +++ b/target/linux/mvebu/cortexa53/config-6.6 @@ -0,0 +1,91 @@ +CONFIG_64BIT=y +CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARMADA_37XX_CLK=y +CONFIG_ARMADA_37XX_RWTM_MBOX=y +CONFIG_ARMADA_37XX_WATCHDOG=y +CONFIG_ARMADA_AP806_SYSCON=y +CONFIG_ARMADA_AP_CP_HELPER=y +CONFIG_ARMADA_CP110_SYSCON=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +CONFIG_ARM_ARMADA_37XX_CPUFREQ=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_ARM_MHU_V2 is not set +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_ARM_PSCI_FW=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_FRAME_POINTER=y +CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_IOREMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MFD_SYSCON=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MVEBU_GICP=y +CONFIG_MVEBU_ICU=y +CONFIG_MVEBU_ODMI=y +CONFIG_MVEBU_PIC=y +CONFIG_MVEBU_SEI=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCI_AARDVARK=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_MVEBU_A3700_COMPHY=y +CONFIG_PHY_MVEBU_A3700_UTMI=y +CONFIG_PINCTRL_AC5=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_PINCTRL_ARMADA_AP806=y +CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POWER_SUPPLY=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_REGULATOR_GPIO=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPI_ARMADA_3700=y +CONFIG_SWIOTLB=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_TURRIS_MOX_RWTM=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_VMAP_STACK=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6 new file mode 100644 index 0000000000..3c398dcd8f --- /dev/null +++ b/target/linux/mvebu/cortexa72/config-6.6 @@ -0,0 +1,111 @@ +CONFIG_64BIT=y +CONFIG_AQUANTIA_PHY=y +CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_SVE=y +# CONFIG_ARM64_TAGGED_ADDR_ABI is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARMADA_37XX_CLK=y +CONFIG_ARMADA_AP806_SYSCON=y +CONFIG_ARMADA_AP_CPU_CLK=y +CONFIG_ARMADA_AP_CP_HELPER=y +CONFIG_ARMADA_CP110_SYSCON=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +CONFIG_ARM_ARMADA_8K_CPUFREQ=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_ARM_PSCI_FW=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CRC_CCITT=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_EEPROM_AT24=y +CONFIG_FRAME_POINTER=y +CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_IOREMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_HW_RANDOM_OMAP=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LEDS_IEI_WT61P803_PUZZLE=y +CONFIG_LEDS_IS31FL319X=y +CONFIG_MARVELL_10G_PHY=y +CONFIG_MFD_CORE=y +CONFIG_MFD_IEI_WT61P803_PUZZLE=y +CONFIG_MFD_SYSCON=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MVEBU_GICP=y +CONFIG_MVEBU_ICU=y +CONFIG_MVEBU_ODMI=y +CONFIG_MVEBU_PIC=y +CONFIG_MVEBU_SEI=y +CONFIG_MVPP2=y +CONFIG_MV_XOR_V2=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_NVMEM_LAYOUT_ONIE_TLV=y +CONFIG_NVMEM_SYSFS=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_ARMADA_8K=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCI_AARDVARK is not set +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB_LEDS=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_MVEBU_CP110_COMPHY=y +CONFIG_PHY_MVEBU_CP110_UTMI=y +CONFIG_PINCTRL_AC5=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_PINCTRL_ARMADA_AP806=y +CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POWER_SUPPLY=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RAS=y +# CONFIG_RAVE_SP_CORE is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set +CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SWIOTLB=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_VMAP_STACK=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa9/config-6.6 b/target/linux/mvebu/cortexa9/config-6.6 new file mode 100644 index 0000000000..7f825a806b --- /dev/null +++ b/target/linux/mvebu/cortexa9/config-6.6 @@ -0,0 +1,12 @@ +CONFIG_ARM_HAS_GROUP_RELOCS=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CURRENT_POINTER_IN_TPIDRURO=y +CONFIG_IRQSTACKS=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_MTD_SPLIT_SEIL_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_PHY_MVEBU_A38X_COMPHY=y +CONFIG_POWER_RESET_QNAP=y +CONFIG_RTC_DRV_MV=y +CONFIG_THREAD_INFO_IN_TASK=y diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls220de.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-370-buffalo-ls220de.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls220de.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-370-buffalo-ls220de.dts diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-c200-v2.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-370-c200-v2.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-370-c200-v2.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-370-c200-v2.dts diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-380-iij-sa-w2.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-380-iij-sa-w2.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-380-iij-sa-w2.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-380-iij-sa-w2.dts diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-venom.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-linksys-venom.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-venom.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-linksys-venom.dts diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts b/target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-nas1dual.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts rename to target/linux/mvebu/files-6.1/arch/arm/boot/dts/armada-385-nas1dual.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi b/target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi similarity index 100% rename from target/linux/mvebu/files/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi rename to target/linux/mvebu/files-6.1/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls220de.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls220de.dts new file mode 100644 index 0000000000..11be6a4028 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls220de.dts @@ -0,0 +1,376 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Device Tree file for Buffalo LinkStation LS220DE + * + * Copyright (C) 2023 Daniel González Cabanelas + */ + +/dts-v1/; + +#include "armada-370.dtsi" +#include "mvebu-linkstation-fan.dtsi" +#include +#include +#include +#include + +/ { + model = "Buffalo LinkStation LS220DE"; + compatible = "buffalo,ls220de", "marvell,armada370", "marvell,armada-370-xp"; + + aliases { + led-boot = &led_boot; + led-failsafe = &led_failsafe; + led-running = &led_power; + led-upgrade = &led_upgrade; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + append-rootblock = "nullparameter="; /* override the bootloader args */ + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; /* 256 MB */ + }; + + soc { + ranges = ; + }; + + system_fan: gpio_fan { + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH + &gpio0 14 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + + #cooling-cells = <2>; + }; + + thermal-zones { + hdd-thermal { + polling-delay = <20000>; + polling-delay-passive = <2000>; + + thermal-sensors = <&hdd0_temp>; /* only one drivetemp sensor is supported */ + + trips { + hdd_alert1: trip1 { + temperature = <34000>; + hysteresis = <2000>; + type = "active"; + }; + hdd_alert2: trip2 { + temperature = <40000>; + hysteresis = <2000>; + type = "active"; + }; + hdd_alert3: trip3 { + temperature = <45000>; + hysteresis = <2000>; + type = "passive"; + }; + hdd_hot { + temperature = <50000>; + hysteresis = <2000>; + type = "hot"; + }; + hdd_crit { + temperature = <60000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map1 { + trip = <&hdd_alert1>; + cooling-device = <&system_fan THERMAL_NO_LIMIT 1>; + }; + map2 { + trip = <&hdd_alert2>; + cooling-device = <&system_fan 2 2>; + }; + map3 { + trip = <&hdd_alert3>; + cooling-device = <&system_fan 3 THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_buttons>; + pinctrl-names = "default"; + + power { + label = "Power Switch"; + linux,code = ; + linux,input-type = ; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + + function { + label = "Function Button"; + linux,code = ; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pmx_leds1 &pmx_leds2>; + + indicator_red { + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led_power: power_white { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led_failsafe: power_red { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + }; + + led_upgrade: power_orange { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; + }; + + led_boot: indicator_white { + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; + }; + + hdd1_red { + function = LED_FUNCTION_DISK; + color = ; + gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "ata1"; + function-enumerator = <1>; + }; + + hdd2_red { + function = LED_FUNCTION_DISK; + color = ; + gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "ata2"; + function-enumerator = <2>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_power_hdd1 &pmx_power_hdd2>; + pinctrl-names = "default"; + + sata1_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "HDD1"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + startup-delay-us = <2000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>; + }; + + sata2_power: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "HDD2"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + startup-delay-us = <4000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&coherencyfab { + broken-idle; +}; + +ð1 { + pinctrl-0 = <&ge1_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */ + reg = <0>; + marvell,reg-init = <0x3 0x10 0xf000 0x091A>, /* LED function */ + <0x3 0x11 0x0000 0x4401>, /* LED polarity */ + <0x3 0x12 0x0000 0x4905>; /* LED timer */ + #thermal-sensor-cells = <0>; + }; +}; + +&nand_controller { + status = "okay"; + + nand@0 { + reg = <0>; + label = "pxa3xx_nand-0"; + nand-rb = <0>; + marvell,nand-keep-config; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi_kernel"; + reg = <0x00000000 0x02000000>; /* 32 MiB */ + }; + + partition@2000000 { + label = "ubi"; + reg = <0x02000000 0x1df00000>; /* 479 MiB */ + }; + }; + }; +}; + +&sata { + nr-ports = <2>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + hdd0_temp: sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; + + hdd1_temp: sata-port@1 { + reg = <1>; + #thermal-sensor-cells = <0>; + }; +}; + +&spi0 { + status = "okay"; + pinctrl-0 = <&spi0_pins2>; + pinctrl-names = "default"; + + spi-flash@0 { + compatible = "mxicy,mx25l8005", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x00000 0xf0000>; /* 960 KiB*/ + label = "u-boot"; + read-only; + }; + partition@f0000 { + reg = <0xf0000 0x10000>; /* 64 KiB */ + label = "u-boot-env"; + }; + }; + }; +}; + +&pmsu { + pinctrl-0 = <&pmx_power_cpu>; + pinctrl-names = "default"; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&pinctrl { + pmx_power_hdd2: pmx-power-hdd2 { + marvell,pins = "mpp2"; + marvell,function = "gpio"; + }; + + pmx_power_cpu: pmx-power-cpu { + marvell,pins = "mpp4"; + marvell,function = "vdd"; + }; + + pmx_power_hdd1: pmx-power-hdd1 { + marvell,pins = "mpp8"; + marvell,function = "gpio"; + }; + + pmx_fan_lock: pmx-fan-lock { + marvell,pins = "mpp10"; + marvell,function = "gpio"; + }; + + pmx_hdd_present: pmx-hdd-present { + marvell,pins = "mpp11", "mpp12"; + marvell,function = "gpio"; + }; + + pmx_fan_high: pmx-fan-high { + marvell,pins = "mpp13"; + marvell,function = "gpio"; + }; + + pmx_fan_low: pmx-fan-low { + marvell,pins = "mpp14"; + marvell,function = "gpio"; + }; + + pmx_buttons: pmx-buttons { + marvell,pins = "mpp15", "mpp16"; + marvell,function = "gpio"; + }; + + pmx_leds1: pmx-leds { + marvell,pins = "mpp7", "mpp54", "mpp59", "mpp61"; + marvell,function = "gpo"; + }; + + pmx_leds2: pmx-leds { + marvell,pins = "mpp55", "mpp57", "mpp62"; + marvell,function = "gpio"; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls421de.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls421de.dts new file mode 100644 index 0000000000..59400839a7 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls421de.dts @@ -0,0 +1,448 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Device Tree file for Buffalo LinkStation LS421DE + * + * Copyright (C) 2020 Daniel González Cabanelas + */ + +/dts-v1/; + +#include "armada-370.dtsi" +#include "mvebu-linkstation-fan.dtsi" +#include +#include +#include + +/ { + model = "Buffalo LinkStation LS421DE"; + compatible = "buffalo,ls421de", "marvell,armada370", "marvell,armada-370-xp"; + + aliases { + led-boot = &led_boot; + led-failsafe = &led_failsafe; + led-running = &led_power; + led-upgrade = &led_upgrade; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + append-rootblock = "nullparameter="; /* override the bootloader args */ + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; /* 512 MB */ + }; + + soc { + ranges = ; + }; + + system_fan: gpio_fan { + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH + &gpio0 14 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + + #cooling-cells = <2>; + }; + + thermal-zones { + hdd-thermal { + polling-delay = <20000>; + polling-delay-passive = <2000>; + + thermal-sensors = <&hdd0_temp>; /* only one drivetemp sensor is supported */ + + trips { + hdd_alert1: trip1 { + temperature = <36000>; + hysteresis = <2000>; + type = "active"; + }; + hdd_alert2: trip2 { + temperature = <44000>; + hysteresis = <2000>; + type = "active"; + }; + hdd_alert3: trip3 { + temperature = <52000>; + hysteresis = <2000>; + type = "passive"; + }; + hdd_crit: trip4 { + temperature = <60000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map1 { + trip = <&hdd_alert1>; + cooling-device = <&system_fan THERMAL_NO_LIMIT 1>; + }; + map2 { + trip = <&hdd_alert2>; + cooling-device = <&system_fan 2 2>; + }; + map3 { + trip = <&hdd_alert3>; + cooling-device = <&system_fan 3 THERMAL_NO_LIMIT>; + }; + }; + }; + + ethphy-thermal { + polling-delay = <20000>; + polling-delay-passive = <2000>; + + thermal-sensors = <ðphy0>; + + trips { + ethphy_alert1: trip1 { + temperature = <65000>; + hysteresis = <4000>; + type = "passive"; + }; + + ethphy_crit: trip2 { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map1 { + trip = <ðphy_alert1>; + cooling-device = <&system_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_buttons>; + pinctrl-names = "default"; + + power { + label = "Power Switch"; + linux,code = ; + linux,input-type = ; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + + function { + label = "Function Button"; + linux,code = ; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pmx_leds1 &pmx_leds2>; + + system_red { + label = "ls421de:red:system"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + }; + + led_power: power_white { + label = "ls421de:white:power"; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led_failsafe: power_red { + label = "ls421de:red:power"; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + }; + + led_upgrade: power_orange { + label = "ls421de:orange:power"; + gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; + }; + + led_boot: system_white { + label = "ls421de:white:system"; + gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; + }; + + hdd1_red { + label = "ls421de:red:hdd1"; + gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "ata1"; + }; + + hdd2_red { + label = "ls421de:red:hdd2"; + gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "ata2"; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_power_usb &pmx_power_hdd1 &pmx_power_hdd2>; + pinctrl-names = "default"; + + usb_power: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "USB"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>; + }; + + sata1_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "HDD1"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + startup-delay-us = <2000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>; + }; + + sata2_power: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "HDD2"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + startup-delay-us = <4000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&coherencyfab { + broken-idle; +}; + +ð1 { + pinctrl-0 = <&ge1_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "okay"; + + rs5c372a: rs5c372a@32 { + compatible = "ricoh,rs5c372a"; + reg = <0x32>; + wakeup-source; + }; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + ethphy0: ethernet-phy@0 { /* Marvell 88E1518 */ + reg = <0>; + marvell,reg-init = <0x2 0x10 0xffff 0x0006>, /* disable CLK125 */ + <0x3 0x10 0x0000 0x1991>, /* LED function */ + <0x3 0x11 0x0000 0x4401>, /* LED polarity */ + <0x3 0x12 0x0000 0x4905>; /* LED timer */ + #thermal-sensor-cells = <0>; + }; +}; + +&pciec { + status = "okay"; + pinctrl-0 = <&pmx_pcie>; + pinctrl-names = "default"; + + /* Connected to uPD720202 USB 3.0 Host */ + pcie@1,0 { + status = "okay"; + }; +}; + +&pmsu { + pinctrl-0 = <&pmx_power_cpu>; + pinctrl-names = "default"; +}; + +&rtc { + status = "disabled"; +}; + +&sata { + nr-ports = <2>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + hdd0_temp: sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; + + hdd1_temp: sata-port@1 { + reg = <1>; + #thermal-sensor-cells = <0>; + }; +}; + +&sdio { + pinctrl-0 = <&sdio_pins2>; + pinctrl-names = "default"; + status = "okay"; + /* No CD or WP GPIOs */ + broken-cd; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&nand_controller { + status = "okay"; + + nand@0 { + reg = <0>; + label = "pxa3xx_nand-0"; + nand-rb = <0>; + marvell,nand-keep-config; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x02000000>; /* 32 MiB */ + }; + + partition@2000000 { + label = "ubi"; + reg = <0x02000000 0x1e000000>; /* 480 MiB */ + }; + }; + }; +}; + +&spi0 { + status = "okay"; + pinctrl-0 = <&spi0_pins2>; + pinctrl-names = "default"; + + spi-flash@0 { + compatible = "mxicy,mx25l8005", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x00000 0xf0000>; /* 960 KiB*/ + label = "u-boot"; + read-only; + }; + partition@f0000 { + reg = <0xf0000 0x10000>; /* 64 KiB */ + label = "u-boot-env"; + }; + }; + }; +}; + +&pinctrl { + pmx_power_cpu: pmx-power-cpu { + marvell,pins = "mpp4"; + marvell,function = "vdd"; + }; + + pmx_power_usb: pmx-power-usb { + marvell,pins = "mpp5"; + marvell,function = "gpo"; + }; + + pmx_power_hdd1: pmx-power-hdd1 { + marvell,pins = "mpp8"; + marvell,function = "gpio"; + }; + + pmx_power_hdd2: pmx-power-hdd2 { + marvell,pins = "mpp9"; + marvell,function = "gpo"; + }; + + pmx_fan_lock: pmx-fan-lock { + marvell,pins = "mpp10"; + marvell,function = "gpio"; + }; + + pmx_hdd_present: pmx-hdd-present { + marvell,pins = "mpp11", "mpp12"; + marvell,function = "gpio"; + }; + + pmx_fan_high: pmx-fan-high { + marvell,pins = "mpp13"; + marvell,function = "gpio"; + }; + + pmx_fan_low: pmx-fan-low { + marvell,pins = "mpp14"; + marvell,function = "gpio"; + }; + + pmx_buttons: pmx-buttons { + marvell,pins = "mpp15", "mpp16"; + marvell,function = "gpio"; + }; + + pmx_leds1: pmx-leds { + marvell,pins = "mpp7", "mpp54", "mpp59", "mpp61"; + marvell,function = "gpo"; + }; + + pmx_leds2: pmx-leds { + marvell,pins = "mpp55", "mpp57", "mpp62"; + marvell,function = "gpio"; + }; + + pmx_pcie: pmx-pcie { + marvell,pins = "mpp56", "mpp60"; + marvell,function = "pcie"; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-c200-v2.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-c200-v2.dts new file mode 100644 index 0000000000..0d5ec567ea --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-c200-v2.dts @@ -0,0 +1,424 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Device Tree file for Ctera C200-V2 + * + * Copyright (C) 2021 Pawel Dembicki + */ + +/dts-v1/; + +#include "armada-370.dtsi" +#include +#include +#include +#include + +/ { + model = "Ctera C200 V2"; + compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp"; + + aliases { + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_red; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x40000000>; /* 1024 MB */ + }; + + soc { + ranges = ; + }; + + thermal-zones { + ethphy-thermal { + polling-delay = <20000>; + polling-delay-passive = <2000>; + + thermal-sensors = <ðphy0>; + + trips { + ethphy_alert1: trip1 { + temperature = <65000>; + hysteresis = <4000>; + type = "passive"; + }; + + ethphy_crit: trip2 { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_buttons>; + pinctrl-names = "default"; + + power { + label = "Power Button"; + linux,code = ; + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + }; + + reset { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + }; + + usb1 { + label = "USB1 Button"; + linux,code = ; + gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; + }; + + usb2 { + label = "USB2 Button"; + linux,code = ; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + pinctrl-0 = <&pmx_poweroff>; + pinctrl-names = "default"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_leds1 &pmx_leds2>; + pinctrl-names = "default"; + + led-0 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = ; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + }; + + led-1 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = ; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&usb1_port 1>, <&usb2_port 1>; + }; + + led-2 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = ; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + + led-3 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = ; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&usb1_port 2>, <&usb2_port 2>; + }; + + led-4 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = ; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata2"; + }; + + led-5 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = ; + gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; + }; + + led-6 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = ; + gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + }; + + led-7 { + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + }; + + led-8 { + function = LED_FUNCTION_DISK_ERR; + color = ; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; + }; + + led-9 { + function = LED_FUNCTION_DISK_ERR; + color = ; + gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; + }; + + led_status_red: led-10 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; + }; + + led-11 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = ; + gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata1"; + }; + + led_status_green: led-12 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&coherencyfab { + broken-idle; +}; + +ð1 { + pinctrl-0 = <&ge1_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "okay"; + + hwmon@2a { + compatible = "nuvoton,nct7802"; + reg = <0x2a>; + }; + + rtc@30 { + compatible = "sii,s35390a"; + reg = <0x30>; + }; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */ + reg = <0>; + #thermal-sensor-cells = <0>; + }; +}; + +&nand_controller { + status = "okay"; + + nand@0 { + reg = <0>; + label = "pxa3xx_nand-0"; + nand-rb = <0>; + marvell,nand-keep-config; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0x200000>; + read-only; + }; + + partition@200000 { + label = "certificate"; + reg = <0x0200000 0x100000>; + read-only; + }; + + partition@300000 { + label = "preset_cfg"; + reg = <0x0300000 0x100000>; + read-only; + }; + + partition@400000 { + label = "dev_params"; + reg = <0x0400000 0x100000>; + read-only; + }; + partition@500000 { + label = "active_bank"; + reg = <0x0500000 0x0100000>; + }; + + partition@600000 { + label = "magic"; + reg = <0x0600000 0x0100000>; + read-only; + }; + + partition@700000 { + label = "bank1"; + reg = <0x0700000 0x2800000>; + }; + + partition@2f00000 { + label = "bank2"; + reg = <0x2f00000 0x2800000>; + }; + + /* 0x5700000-0x5a00000 undefined in vendor firmware */ + + partition@5a00000 { + label = "reserved"; + reg = <0x5a00000 0x2000000>; + }; + + partition@7a00000 { + label = "ubi"; + reg = <0x7a00000 0x8600000>; + }; + }; + }; +}; + +&pciec { + status = "okay"; + + pcie@1,0 { + pinctrl-0 = <&pmx_pcie>; + pinctrl-names = "default"; + status = "okay"; + reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; + + /* -[0000:00]---01.0-[01]----00.0 */ + /* usbport trigger won't work */ + bridge@0,1 { + compatible = "pci11ab,6710"; + reg = <0x3800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + usb@1,0 { + /* Renesas uPD720202 */ + compatible = "pci1912,0015"; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + usb1_port: port@1 { + reg = <1>; + #trigger-source-cells = <1>; + }; + + usb2_port: port@2 { + reg = <2>; + #trigger-source-cells = <1>; + }; + }; + }; + }; +}; + +&pinctrl { + pmx_poweroff: pmx-poweroff { + marvell,pins = "mpp7"; + marvell,function = "gpo"; + }; + + pmx_power_cpu: pmx-power-cpu { + marvell,pins = "mpp4"; + marvell,function = "vdd"; + }; + + pmx_buttons: pmx-buttons { + marvell,pins = "mpp6", "mpp10", "mpp14", "mpp32"; + marvell,function = "gpio"; + }; + + pmx_leds1: pmx-leds1 { + marvell,pins = "mpp47"; + marvell,function = "gpo"; + }; + + pmx_leds2: pmx-leds2 { + marvell,pins = "mpp12", "mpp13", "mpp15", "mpp16", "mpp50", "mpp51", + "mpp52", "mpp53", "mpp55", "mpp56", "mpp57", "mpp58"; + marvell,function = "gpio"; + }; + + pmx_pcie: pmx-pcie { + marvell,pins = "mpp59"; + marvell,function = "gpio"; + }; + + /* this gpio is connected to the pin of buzzer + * leave it as is due lack of proper driver + */ + pmx_buzzer: pmx-buzzer { + marvell,pins = "mpp63"; + marvell,function = "gpio"; + }; +}; + +&pmsu { + pinctrl-0 = <&pmx_power_cpu>; + pinctrl-names = "default"; +}; + +&rtc { + status = "disabled"; +}; + +&sata { + nr-ports = <2>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + hdd0_temp: sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; + + hdd1_temp: sata-port@1 { + reg = <1>; + #thermal-sensor-cells = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-380-iij-sa-w2.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-380-iij-sa-w2.dts new file mode 100644 index 0000000000..335a2ecf96 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-380-iij-sa-w2.dts @@ -0,0 +1,377 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include +#include +#include +#include "armada-380.dtsi" + +/ { + model = "IIJ SA-W2"; + compatible = "iij,sa-w2", "marvell,armada380"; + + aliases { + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_green; + label-mac-device = &ge0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x10000000>; /* 256MB */ + }; + + soc { + ranges = ; + + pcie { + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + + pcie@3,0 { + status = "okay"; + }; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pmx_keys_pins>; + + button-init { + label = "init"; + linux,code = ; + gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pmx_leds_pins>; + + led-0 { + gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "phy0tpt"; + }; + + led-1 { + gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led-2 { + gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + led-3 { + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + led-4 { + gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led-5 { + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led-6 { + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "phy1tpt"; + }; + + led-7 { + gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led_power_green: led-8 { + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + color = ; + }; + + led_power_red: led-9 { + gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led-10 { + gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "usbport"; + trigger-sources = <&hub_port2>; + }; + + led-11 { + gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "usbport"; + trigger-sources = <&hub_port1>; + }; + }; + + regulator-vbus-usb0 { + compatible = "regulator-fixed"; + regulator-name = "vbus-usb0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + regulator-vbus-usb1 { + compatible = "regulator-fixed"; + regulator-name = "vbus-usb1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 21 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&pinctrl { + pmx_usb_pins: usb-pins { + marvell,pins = "mpp2", /* smsc usb2514b reset */ + "mpp48", "mpp49", /* port over current */ + "mpp52", "mpp53"; /* port vbus */ + marvell,function = "gpio"; + }; + + pmx_keys_pins: keys-pins { + marvell,pins = "mpp18"; + marvell,function = "gpio"; + }; + + pmx_leds_pins: leds-pins { + marvell,pins = "mpp19", "mpp20", "mpp33", "mpp34", "mpp35", + "mpp36", "mpp44", "mpp45", "mpp46", "mpp47", + "mpp54", "mpp55"; + marvell,function = "gpio"; + }; +}; + +&gpio0 { + usb-hub-reset { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&usb0 { + pinctrl-names = "default"; + pinctrl-0 = <&pmx_usb_pins>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + /* SMSC USB2514B on PCB */ + hub@1 { + compatible = "usb424,2514"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + hub_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + hub_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; +}; + +&bm { + status = "okay"; +}; + +&bm_bppi { + status = "okay"; +}; + +ð1 { + pinctrl-names = "default"; + pinctrl-0 = <&ge1_rgmii_pins>; + status = "okay"; + + phy-connection-type = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <2>; + bm,pool-short = <3>; + + nvmem-cells = <&macaddr_bdinfo_6 1>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&mdio { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + status = "okay"; + + /* Marvell 88E6172 */ + switch@0 { + compatible = "marvell,mv88e6085"; + reg = <0x0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpio1>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "ge1_0"; + }; + + port@1 { + reg = <1>; + label = "ge1_1"; + }; + + port@2 { + reg = <2>; + label = "ge1_2"; + }; + + port@3 { + reg = <3>; + label = "ge1_3"; + }; + + ge0: port@4 { + reg = <4>; + label = "ge0"; + nvmem-cells = <&macaddr_bdinfo_6 0>; + nvmem-cell-names = "mac-address"; + }; + + /* + * eth0 is connected to port5 for WAN connection + * on port4 ("GE0") + */ + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <ð1>; + phy-connection-type = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; +}; + +&rtc { + status = "disabled"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x100000>; + label = "bootloader"; + read-only; + }; + + partition@100000 { + reg = <0x100000 0x10000>; + label = "bootloader-env"; + read-only; + }; + + partition@110000 { + reg = <0x110000 0xf0000>; + label = "board_info"; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_bdinfo_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@200000 { + compatible = "iij,seil-firmware"; + reg = <0x200000 0xf00000>; + label = "firmware"; + iij,bootdev-name = "flash"; + iij,seil-id = <0x5345494c 0x32303135>; + }; + + partition@1100000 { + compatible = "iij,seil-firmware"; + reg = <0x1100000 0xf00000>; + label = "rescue"; + iij,bootdev-name = "rescue"; + iij,seil-id = <0x5345494c 0x32303135>; + }; + }; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-30e.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-30e.dts new file mode 100644 index 0000000000..c0900d7126 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-30e.dts @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "armada-385-fortinet-fg-x0e.dtsi" + +/ { + model = "Fortinet FortiGate 30E"; + compatible = "fortinet,fg-30e", "marvell,armada385", "marvell,armada380"; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x40000000>; /* 1GB */ + }; +}; + +&gpio_leds { + led-14 { + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "mv88e6xxx-1:00:100Mbps"; + }; + + led-15 { + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "mv88e6xxx-1:00:1Gbps"; + }; +}; + +&pinctrl { + pmx_switch_pins: switch-pins { + marvell,pins = "mpp19"; + marvell,function = "gpio"; + }; +}; + +&mdio { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>, <&pmx_switch_pins>; + + /* Marvell 88E6176 */ + switch@2 { + compatible = "marvell,mv88e6085"; + reg = <0x2>; + reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "wan"; + nvmem-cells = <&macaddr_bdinfo_d880 1>; + nvmem-cell-names = "mac-address"; + }; + + port@1 { + reg = <1>; + label = "lan4"; + nvmem-cells = <&macaddr_bdinfo_d880 5>; + nvmem-cell-names = "mac-address"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + nvmem-cells = <&macaddr_bdinfo_d880 4>; + nvmem-cell-names = "mac-address"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + nvmem-cells = <&macaddr_bdinfo_d880 3>; + nvmem-cell-names = "mac-address"; + }; + + port@4 { + reg = <4>; + label = "lan1"; + nvmem-cells = <&macaddr_bdinfo_d880 2>; + nvmem-cell-names = "mac-address"; + }; + + port@6 { + reg = <6>; + ethernet = <ð0>; + phy-connection-type = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-50e.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-50e.dts new file mode 100644 index 0000000000..d202d71c7f --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-50e.dts @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "armada-385-fortinet-fg-x0e.dtsi" + +/ { + model = "Fortinet FortiGate 50E"; + compatible = "fortinet,fg-50e", "marvell,armada385", "marvell,armada380"; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x80000000>; /* 2GB */ + }; +}; + +&gpio_leds { + led-14 { + gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "f1072004.mdio-mii:00:1Gbps"; + }; + + led-15 { + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "f1072004.mdio-mii:01:1Gbps"; + }; + + led-16 { + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "mv88e6xxx-1:00:100Mbps"; + }; + + led-17 { + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "mv88e6xxx-1:00:1Gbps"; + }; +}; + +&pinctrl { + pmx_phy_switch_pins: phy-switch-pins { + marvell,pins = "mpp19", "mpp20", "mpp23", "mpp34", "mpp41"; + marvell,function = "gpio"; + }; +}; + +ð1 { + status = "okay"; + + phy-handle = <ðphy0>; + phy-connection-type = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <2>; + nvmem-cells = <&macaddr_bdinfo_d880 1>; + nvmem-cell-names = "mac-address"; +}; + +ð2 { + status = "okay"; + + phy-handle = <ðphy1>; + phy-connection-type = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <3>; + nvmem-cells = <&macaddr_bdinfo_d880 2>; + nvmem-cell-names = "mac-address"; +}; + +&mdio { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>, <&pmx_phy_switch_pins>; + + /* Marvell 88E1512 */ + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0141,0dd1", + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + interrupt-parent = <&gpio0>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <10000>; + /* + * LINK/ACT (Green): LED[0], Active Low + * SPEED 100M (Amber): LED[1], Active High + */ + marvell,reg-init = <3 16 0 0x71>, + <3 17 0 0x4>; + }; + + /* Marvell 88E1512 */ + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-id0141,0dd1", + "ethernet-phy-ieee802.3-c22"; + reg = <1>; + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <10000>; + /* + * LINK/ACT (Green): LED[0], Active Low + * SPEED 100M (Amber): LED[1], Active High + */ + marvell,reg-init = <3 16 0 0x71>, + <3 17 0 0x4>; + }; + + /* Marvell 88E6176 */ + switch@2 { + compatible = "marvell,mv88e6085"; + reg = <0x2>; + reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan5"; + nvmem-cells = <&macaddr_bdinfo_d880 7>; + nvmem-cell-names = "mac-address"; + }; + + port@1 { + reg = <1>; + label = "lan4"; + nvmem-cells = <&macaddr_bdinfo_d880 6>; + nvmem-cell-names = "mac-address"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + nvmem-cells = <&macaddr_bdinfo_d880 5>; + nvmem-cell-names = "mac-address"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + nvmem-cells = <&macaddr_bdinfo_d880 4>; + nvmem-cell-names = "mac-address"; + }; + + port@4 { + reg = <4>; + label = "lan1"; + nvmem-cells = <&macaddr_bdinfo_d880 3>; + nvmem-cell-names = "mac-address"; + }; + + port@6 { + reg = <6>; + ethernet = <ð0>; + phy-connection-type = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-x0e.dtsi b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-x0e.dtsi new file mode 100644 index 0000000000..8cc2d6bc4a --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-x0e.dtsi @@ -0,0 +1,328 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include +#include +#include +#include "armada-385.dtsi" + +/ { + aliases { + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_green; + label-mac-device = ð0; + }; + + chosen { + stdout-path = "serial0:9600n8"; + }; + + soc { + ranges = ; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pmx_gpio_keys_pins>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pmx_gpio_leds_pins>; + + led-0 { + gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_ALARM; + }; + + led-1 { + gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; + color = ; + }; + + led_status_green: led-2 { + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + led-3 { + gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + color = ; + }; + + led-4 { + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_ALARM; + }; + + led_status_red: led-5 { + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + led-6 { + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:01:1Gbps"; + }; + + led-7 { + gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:01:100Mbps"; + }; + + led-8 { + gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:02:100Mbps"; + }; + + led-9 { + gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:02:1Gbps"; + }; + + led-10 { + gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:04:1Gbps"; + }; + + led-11 { + gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:04:100Mbps"; + }; + + led-12 { + gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:03:1Gbps"; + }; + + led-13 { + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + color = ; + linux,default-trigger = "mv88e6xxx-1:03:100Mbps"; + }; + }; + + reg_usb_vbus: regulator-usb-vbus { + compatible = "fixed-regulator"; + regulator-name = "usb-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 21 GPIO_ACTIVE_LOW>; + regulator-always-on; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + gpio2: gpio@24 { + compatible = "nxp,pca9555"; + reg = <0x24>; + gpio-controller; + #gpio-cells = <0x2>; + }; + + hwmon@28 { + compatible = "nuvoton,nct7802"; + reg = <0x28>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&pinctrl { + pmx_gpio_leds_pins: gpio-leds-pins { + marvell,pins = "mpp30", "mpp32", "mpp33", "mpp35", + "mpp45", "mpp47"; + marvell,function = "gpio"; + }; + + pmx_usb_pins: usb-pins { + marvell,pins = "mpp53"; + marvell,function = "gpio"; + }; + + pmx_gpio_keys_pins: gpio-keys-pins { + marvell,pins = "mpp54"; + marvell,function = "gpio"; + }; +}; + +&bm { + status = "okay"; +}; + +&bm_bppi { + status = "okay"; +}; + +ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&ge0_rgmii_pins>; + status = "okay"; + + phy-connection-type = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <0>; + bm,pool-short = <1>; + nvmem-cells = <&macaddr_bdinfo_d880 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&usb3_0 { + pinctrl-names = "default"; + pinctrl-0 = <&pmx_usb_pins>; + status = "okay"; + + vbus-supply = <®_usb_vbus>; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x1c0000>; + label = "u-boot"; + read-only; + }; + + partition@1c0000 { + reg = <0x1c0000 0x10000>; + label = "firmware-info"; + + /* + * 0x10 - 0x2f : image name (image1) + * 0x30 - 0x4f : image name (image2) + * 0x170 (1byte): active image (0x0/0x1) + * 0x184 - 0x185: kernel block count (image1) + * 0x18c - 0x18d: rootfs block count (image1) + * 0x194 - 0x195: kernel block count (image2) + * 0x19c - 0x19d: rootfs block count (image2) + * 0x1be (1byte): bit7 -> active flag (image1)? + * 0x1ce (1byte): bit7 -> active flag (image2)? + * + * Note: block size --> 0x200 (512 bytes) + */ + }; + + partition@1d0000 { + reg = <0x1d0000 0x10000>; + label = "dtb"; + read-only; + }; + + partition@1e0000 { + reg = <0x1e0000 0x10000>; + label = "u-boot-env"; + read-only; + }; + + partition@1f0000 { + reg = <0x1f0000 0x10000>; + label = "board-info"; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_bdinfo_d880: macaddr@d880 { + compatible = "mac-base"; + reg = <0xd880 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@200000 { + reg = <0x200000 0x600000>; + label = "kernel"; + }; + + partition@800000 { + reg = <0x800000 0x1800000>; + label = "rootfs"; + }; + + partition@2000000 { + reg = <0x2000000 0x600000>; + label = "kn2"; + read-only; + }; + + partition@2600000 { + reg = <0x2600000 0x1800000>; + label = "rfs2"; + read-only; + }; + + partition@3e00000 { + reg = <0x3e00000 0x1200000>; + label = "part1"; + read-only; + }; + + partition@5000000 { + reg = <0x5000000 0x1200000>; + label = "part2"; + read-only; + }; + + partition@6200000 { + reg = <0x6200000 0x1e00000>; + label = "config"; + read-only; + }; + }; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-linksys-venom.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-linksys-venom.dts new file mode 100644 index 0000000000..a2ca3158cf --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-linksys-venom.dts @@ -0,0 +1,213 @@ +/* + * Device Tree file for the Linksys WRT32X (Venom) + * + * Copyright (C) 2017 Imre Kaloz + * + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include +#include +#include "armada-385-linksys.dtsi" + +/ { + model = "Linksys WRT32X"; + compatible = "linksys,wrt32x", "linksys,venom", "linksys,armada385", + "marvell,armada385", "marvell,armada380"; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; + append-rootblock = "root=/dev/mtdblock"; + }; +}; + +&expander0 { + wan_amber@0 { + label = "venom:amber:wan"; + reg = <0x0>; + }; + + wan_blue@1 { + label = "venom:blue:wan"; + reg = <0x1>; + }; + + usb2@5 { + label = "venom:blue:usb2"; + reg = <0x5>; + }; + + usb3_1@6 { + label = "venom:blue:usb3_1"; + reg = <0x6>; + }; + + usb3_2@7 { + label = "venom:blue:usb3_2"; + reg = <0x7>; + }; + + wps_blue@8 { + label = "venom:blue:wps"; + reg = <0x8>; + }; + + wps_amber@9 { + label = "venom:amber:wps"; + reg = <0x9>; + }; +}; + +&gpio_leds { + power { + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; + label = "venom:blue:power"; + }; + + sata { + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; + label = "venom:blue:sata"; + }; + + wlan_2g { + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + label = "venom:blue:wlan_2g"; + }; + + wlan_5g { + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + label = "venom:blue:wlan_5g"; + }; +}; + +&gpio_leds_pins { + marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56"; +}; + +&nand { + /* Spansion S34ML02G2 256MiB, OEM Layout */ + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x200000>; /* 2MB */ + read-only; + }; + + partition@200000 { + label = "u_env"; + reg = <0x200000 0x20000>; /* 128KB */ + }; + + partition@220000 { + label = "s_env"; + reg = <0x220000 0x40000>; /* 256KB */ + }; + + partition@180000 { + label = "unused_area"; + reg = <0x260000 0x5c0000>; /* 5.75MB */ + }; + + partition@7e0000 { + label = "devinfo"; + reg = <0x7e0000 0x40000>; /* 256KB */ + read-only; + }; + + /* kernel1 overlaps with rootfs1 by design */ + partition@900000 { + label = "kernel1"; + reg = <0x900000 0x7b00000>; /* 123MB */ + }; + + partition@f00000 { + label = "rootfs1"; + reg = <0xf00000 0x7500000>; /* 117MB */ + }; + + /* kernel2 overlaps with rootfs2 by design */ + partition@8400000 { + label = "kernel2"; + reg = <0x8400000 0x7b00000>; /* 123MB */ + }; + + partition@8a00000 { + label = "rootfs2"; + reg = <0x8a00000 0x7500000>; /* 117MB */ + }; + + /* last MB is for the BBT, not writable */ + partition@ff00000 { + label = "BBT"; + reg = <0xff00000 0x100000>; + }; + }; +}; + + +&pcie1 { + mwlwifi { + marvell,chainmask = <4 4>; + }; +}; + +&pcie2 { + mwlwifi { + marvell,chainmask = <4 4>; + }; +}; + +&sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + no-1-8-v; + non-removable; + wp-inverted; + bus-width = <8>; + status = "okay"; +}; + +&usb3_1_vbus { + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; +}; + +&usb3_1_vbus_pins { + marvell,pins = "mpp44"; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-nas1dual.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-nas1dual.dts new file mode 100644 index 0000000000..f1fd72a93c --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-nas1dual.dts @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +/* + * Device Tree file for ipTIME NAS1dual + * + * Copyright (C) 2020 Sungbo Eo + * + * Based on armada-385-linksys.dtsi + * Copyright (C) 2015 Imre Kaloz + */ + +/dts-v1/; + +#include +#include +#include +#include "armada-385.dtsi" + +/ { + model = "ipTIME NAS1dual"; + compatible = "iptime,nas1dual", "marvell,armada385", "marvell,armada380"; + + aliases { + led-boot = &led_ready; + led-failsafe = &led_ready; + led-running = &led_ready; + led-upgrade = &led_ready; + label-mac-device = ð0; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x80000000>; /* 2GB */ + }; + + soc { + ranges = ; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pins>; + + power { + label = "Power Button"; + linux,input-type = ; + linux,code = ; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; + + copy { + label = "USB Copy Button"; + linux,code = ; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_leds_pins>; + + led_ready: ready { + label = "blue:ready"; + gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; + }; + + hdd { + label = "blue:hdd"; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + }; + + usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; + trigger-sources = <&usb3_0_port1 &usb3_0_port2>; + linux,default-trigger = "usbport"; + }; + }; + + gpio-fan { + compatible = "gpio-fan"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_fan_pins>; + gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>, + <&gpio1 18 GPIO_ACTIVE_HIGH>; + /* We don't know the exact rpm, just use dummy values here. */ + gpio-fan,speed-map = <0 0>, <1 1>, <2 2>; + #cooling-cells = <2>; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&pca9536 1 GPIO_ACTIVE_LOW>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&sata_power_pins>; + + reg_sata_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "sata-power"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&gpio1 20 GPIO_ACTIVE_LOW>; + regulator-always-on; + }; + }; +}; + +&ahci0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + sata-port@0 { + reg = <0>; + target-supply = <®_sata_power>; + #thermal-sensor-cells = <0>; + }; +}; + +&bm { + status = "okay"; +}; + +&bm_bppi { + status = "okay"; +}; + +ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&ge0_rgmii_pins>; + status = "okay"; + phy-handle = <ðphy1>; + phy-connection-type = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <0>; + bm,pool-short = <1>; + nvmem-cells = <&macaddr_uboot_fffa8>; + nvmem-cell-names = "mac-address"; +}; + +ð1 { + pinctrl-names = "default"; + pinctrl-0 = <&ge1_rgmii_pins>; + status = "okay"; + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <2>; + bm,pool-short = <3>; + nvmem-cells = <&macaddr_uboot_fffa8>; + nvmem-cell-names = "mac-address"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + pca9536: gpio@41 { + compatible = "nxp,pca9536"; + reg = <0x41>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "power-led", "power-board"; + }; +}; + +&mdio { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + /* LED1: On - Link, Blink - Activity, Off - No Link */ + + ethphy0: ethernet-phy@0 { + reg = <0>; + marvell,reg-init = <3 16 0 0x1017>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + marvell,reg-init = <3 16 0 0x1017>; + }; +}; + +&pinctrl { + gpio_keys_pins: gpio-keys-pins { + marvell,pins = "mpp24", "mpp26", "mpp48"; + marvell,function = "gpio"; + }; + + gpio_leds_pins: gpio-leds-pins { + marvell,pins = "mpp18", "mpp20", "mpp51"; + marvell,function = "gpio"; + }; + + gpio_fan_pins: gpio-fan-pins { + marvell,pins = "mpp25", "mpp50"; + marvell,function = "gpio"; + }; + + sata_power_pins: sata-power-pins { + marvell,pins = "mpp52"; + marvell,function = "gpio"; + }; + + uart1_pins_alt: uart-pins-1-alt { + marvell,pins = "mpp45", "mpp46"; + marvell,function = "ua1"; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x00000000 0x00100000>; + label = "u-boot"; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_uboot_fffa8: macaddr@fffa8 { + reg = <0xfffa8 0x6>; + }; + }; + }; + + partition@100000 { + reg = <0x00100000 0x03ec0000>; + label = "firmware"; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x00000000 0x00600000>; + label = "kernel"; + }; + + partition@600000 { + reg = <0x00600000 0x038c0000>; + label = "rootfs"; + }; + }; + + partition@3fc0000 { + reg = <0x03fc0000 0x00040000>; + label = "config"; + read-only; + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_alt>; + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + usb3_0_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_0_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts new file mode 100644 index 0000000000..35f107b63b --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "armada-3720-uDPU.dtsi" + +/ { + model = "Methode eDPU Board"; + compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710"; +}; + +/* PHY mode is set to 1000Base-X despite Maxlinear IC being capable of + * 2500Base-X since until 5.15 support for mvebu is available trying to + * use 2500Base-X will cause buffer overruns for which the fix is not + * easily backportable. + */ +ð0 { + phy-mode = "1000base-x"; +}; + +/* + * External MV88E6361 switch is only available on v2 of the board. + * U-Boot will enable the MDIO bus and switch nodes. + */ +&mdio { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&smi_pins>; + + /* Actual device is MV88E6361 */ + switch: switch@0 { + compatible = "marvell,mv88e6190"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + phy-mode = "2500base-x"; + managed = "in-band-status"; + ethernet = <ð0>; + }; + + port@9 { + reg = <9>; + label = "downlink"; + phy-mode = "2500base-x"; + managed = "in-band-status"; + }; + + port@a { + reg = <10>; + label = "uplink"; + phy-mode = "2500base-x"; + managed = "in-band-status"; + sfp = <&sfp_eth1>; + }; + }; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts new file mode 100644 index 0000000000..1a6594e3cd --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for ESPRESSObin-Ultra + * Copyright (C) 2019 Globalscale technologies, Inc. + * + * Jason Hung + */ + +/dts-v1/; + +#include +#include "armada-372x.dtsi" + +/ { + model = "Globalscale Marvell ESPRESSOBin Ultra Board"; + compatible = "globalscale,espressobin-ultra", "marvell,armada3720", + "marvell,armada3710"; + + aliases { + /* for dsa slave device */ + ethernet1 = &switch0port1; + ethernet2 = &switch0port2; + ethernet3 = &switch0port3; + ethernet4 = &switch0port4; + ethernet5 = &switch0port5; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb3-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpionb 19 GPIO_ACTIVE_HIGH>; + }; + + usb3_phy: usb3-phy { + compatible = "usb-nop-xceiv"; + vcc-supply = <®_usb3_vbus>; + }; + + leds { + pinctrl-names = "default"; + compatible = "gpio-leds"; + /* No assigned functions to the LEDs by default */ + led1 { + label = "ebin-ultra:blue:led1"; + gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; + }; + led2 { + label = "ebin-ultra:green:led2"; + gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; + }; + led3 { + label = "ebin-ultra:red:led3"; + gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; + }; + led4 { + label = "ebin-ultra:yellow:led4"; + gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pcie0 { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&sdhci0 { + status = "okay"; + non-removable; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + marvell,pad-type = "fixed-1-8v"; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_quad_pins>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <108000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "firmware"; + reg = <0x0 0x3e0000>; + }; + partition@3e0000 { + label = "hw-info"; + reg = <0x3e0000 0x10000>; + read-only; + }; + partition@3f0000 { + label = "u-boot-env"; + reg = <0x3f0000 0x10000>; + }; + }; + }; +}; + +&uart0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + clock-frequency = <100000>; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&usb3 { + status = "okay"; + usb-phy = <&usb3_phy>; +}; + +&usb2 { + status = "okay"; +}; + +ð0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&mdio { + status = "okay"; + + extphy: ethernet-phy@0 { + reg = <1>; + }; + + switch0: switch0@1 { + compatible = "marvell,mv88e6085"; + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + dsa,member = <0 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + switch0port0: port@0 { + reg = <0>; + ethernet = <ð0>; + }; + + switch0port1: port@1 { + reg = <1>; + label = "lan0"; + phy-handle = <&switch0phy1>; + }; + + switch0port2: port@2 { + reg = <2>; + label = "lan1"; + phy-handle = <&switch0phy2>; + }; + + switch0port3: port@3 { + reg = <3>; + label = "lan2"; + phy-handle = <&switch0phy3>; + }; + + switch0port4: port@4 { + reg = <4>; + label = "lan3"; + phy-handle = <&switch0phy4>; + }; + + switch0port5: port@5 { + reg = <5>; + label = "wan"; + phy-handle = <&extphy>; + phy-mode = "sgmii"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0phy1: switch0phy1@11 { + reg = <0x11>; + }; + switch0phy2: switch0phy2@12 { + reg = <0x12>; + }; + switch0phy3: switch0phy3@13 { + reg = <0x13>; + }; + switch0phy4: switch0phy4@14 { + reg = <0x14>; + }; + }; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts new file mode 100644 index 0000000000..07400fce3a --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) + +/dts-v1/; +#include +#include +#include +#include "armada-372x.dtsi" + +/ { + model = "GL.iNet GL-MV1000"; + compatible = "glinet,gl-mv1000", "marvell,armada3720"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + vcc_sd_reg1: regulator { + compatible = "regulator-gpio"; + regulator-name = "vcc_sd1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + + gpios-states = <0>; + states = <1800000 0x1 + 3300000 0x0>; + enable-active-high; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; + }; + + switch { + label = "switch"; + linux,code = ; + gpios = <&gpiosb 22 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + vpn { + label = "green:vpn"; + gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; + }; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <104000000>; + m25p,fast-read; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0 0xf0000>; + read-only; + }; + + partition@f0000 { + label = "u-boot-env"; + reg = <0xf0000 0x8000>; + read-only; + }; + + factory: partition@f8000 { + label = "factory"; + reg = <0xf8000 0x8000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; + }; + + partition@100000 { + label = "gl-firmware-dtb"; + reg = <0x100000 0x10000>; + read-only; + }; + + partition@110000 { + label = "gl-firmware"; + reg = <0x110000 0xef0000>; + read-only; + }; + + partition@ef0000 { + label = "gl-firmware-jffs2"; + reg = <0xef0000 0x110000>; + read-only; + }; + }; + }; +}; + +&sdhci1 { + wp-inverted; + bus-width = <4>; + cd-gpios = <&gpionb 17 GPIO_ACTIVE_LOW>; + marvell,pad-type = "sd"; + no-1-8-v; + vqmmc-supply = <&vcc_sd_reg1>; + status = "okay"; +}; + +&sdhci0 { + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + non-removable; + no-sd; + no-sdio; + marvell,pad-type = "fixed-1-8v"; + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&mdio { + switch0: switch0@1 { + compatible = "marvell,mv88e6085"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + dsa,member = <0 0>; + + ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ethernet = <ð0>; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-handle = <&switch0phy0>; + }; + + port@2 { + reg = <2>; + label = "lan0"; + phy-handle = <&switch0phy1>; + + nvmem-cells = <&macaddr_factory_6>; + nvmem-cell-names = "mac-address"; + }; + + port@3 { + reg = <3>; + label = "lan1"; + phy-handle = <&switch0phy2>; + + nvmem-cells = <&macaddr_factory_6>; + nvmem-cell-names = "mac-address"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0phy0: switch0phy0@11 { + reg = <0x11>; + }; + switch0phy1: switch0phy1@12 { + reg = <0x12>; + }; + switch0phy2: switch0phy2@13 { + reg = <0x13>; + }; + }; + }; +}; + +ð0 { + nvmem-cells = <&macaddr_factory_0>; + nvmem-cell-names = "mac-address"; + phy-mode = "rgmii-id"; + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts new file mode 100644 index 0000000000..186a5e7d7d --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "armada-3720-uDPU.dtsi" + +/ { + model = "Methode uDPU Board"; + compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710"; + + sfp_eth0: sfp-eth0 { + compatible = "sff,sfp"; + i2c-bus = <&i2c0>; + los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; + maximum-power-milliwatt = <3000>; + }; +}; + +&pinctrl_nb { + i2c1_recovery_pins: i2c1-recovery-pins { + groups = "i2c1"; + function = "gpio"; + }; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default", "recovery"; + pinctrl-0 = <&i2c1_pins>; + pinctrl-1 = <&i2c1_recovery_pins>; + /delete-property/mrvl,i2c-fast-mode; + scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +ð0 { + phy-mode = "2500base-x"; + sfp = <&sfp_eth0>; +}; + +ð1 { + phy-mode = "2500base-x"; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..bc8d1f1020 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree for the uDPU board. + * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) + * Copyright (C) 2016 Marvell + * Copyright (C) 2019 Methode Electronics + * Copyright (C) 2019 Telus + * + * Vladimir Vid + */ + +/dts-v1/; + +#include +#include "armada-372x.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + aliases { + ethernet0 = ð0; + ethernet1 = ð1; + }; + + leds { + compatible = "gpio-leds"; + + led-power1 { + label = "udpu:green:power"; + gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; + }; + + led-power2 { + label = "udpu:red:power"; + gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; + }; + + led-network1 { + label = "udpu:green:network"; + gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; + }; + + led-network2 { + label = "udpu:red:network"; + gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; + }; + + led-alarm1 { + label = "udpu:green:alarm"; + gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; + }; + + led-alarm2 { + label = "udpu:red:alarm"; + gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; + }; + }; + + sfp_eth1: sfp-eth1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; + maximum-power-milliwatt = <3000>; + }; +}; + +&sdhci0 { + status = "okay"; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + marvell,pad-type = "fixed-1-8v"; + non-removable; + no-sd; + no-sdio; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_quad_pins>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <54000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "firmware"; + reg = <0x0 0x180000>; + }; + + partition@180000 { + label = "u-boot-env"; + reg = <0x180000 0x10000>; + }; + }; + }; +}; + +&pinctrl_nb { + i2c2_recovery_pins: i2c2-recovery-pins { + groups = "i2c2"; + function = "gpio"; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default", "recovery"; + pinctrl-0 = <&i2c2_pins>; + pinctrl-1 = <&i2c2_recovery_pins>; + /delete-property/mrvl,i2c-fast-mode; + scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + temp-sensor@48 { + compatible = "ti,tmp75c"; + reg = <0x48>; + }; + + temp-sensor@49 { + compatible = "ti,tmp75c"; + reg = <0x49>; + }; +}; + +ð0 { + status = "okay"; + managed = "in-band-status"; + phys = <&comphy1 0>; +}; + +ð1 { + phy-mode = "sgmii"; + status = "okay"; + managed = "in-band-status"; + phys = <&comphy0 1>; + sfp = <&sfp_eth1>; +}; + +&usb3 { + status = "okay"; + phys = <&usb2_utmi_otg_phy>; + phy-names = "usb2-utmi-otg-phy"; +}; + +&uart0 { + status = "okay"; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts new file mode 100644 index 0000000000..26804a4875 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts @@ -0,0 +1,448 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Device Tree file for Globalscale MOCHAbin + * Copyright (C) 2019 Globalscale technologies, Inc. + * Copyright (C) 2021 Sartura Ltd. + * + */ + +/dts-v1/; + +#include +#include "armada-7040.dtsi" + +/ { + model = "Globalscale MOCHAbin"; + compatible = "globalscale,mochabin", "marvell,armada7040", + "marvell,armada-ap806-quad", "marvell,armada-ap806"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + ethernet3 = &swport1; + ethernet4 = &swport2; + ethernet5 = &swport3; + ethernet6 = &swport4; + }; + + /* SFP+ 10G */ + sfp_eth0: sfp-eth0 { + compatible = "sff,sfp"; + i2c-bus = <&cp0_i2c1>; + los-gpio = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&sfp_gpio 2 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>; + }; + + /* SFP 1G */ + sfp_eth2: sfp-eth2 { + compatible = "sff,sfp"; + i2c-bus = <&cp0_i2c0>; + los-gpio = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&sfp_gpio 6 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>; + }; +}; + +/* microUSB UART console */ +&uart0 { + status = "okay"; + + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; +}; + +/* eMMC */ +&ap_sdhci0 { + status = "okay"; + + bus-width = <4>; + non-removable; + /delete-property/ marvell,xenon-phy-slow-mode; + no-1-8-v; +}; + +&cp0_pinctrl { + cp0_uart0_pins: cp0-uart0-pins { + marvell,pins = "mpp6", "mpp7"; + marvell,function = "uart0"; + }; + + cp0_spi0_pins: cp0-spi0-pins { + marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59"; + marvell,function = "spi0"; + }; + + cp0_spi1_pins: cp0-spi1-pins { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + + cp0_i2c0_pins: cp0-i2c0-pins { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + + cp0_i2c1_pins: cp0-i2c1-pins { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "i2c1"; + }; + + pca9554_int_pins: pca9554-int-pins { + marvell,pins = "mpp27"; + marvell,function = "gpio"; + }; + + cp0_rgmii1_pins: cp0-rgmii1-pins { + marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49", + "mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55"; + marvell,function = "ge1"; + }; + + is31_sdb_pins: is31-sdb-pins { + marvell,pins = "mpp30"; + marvell,function = "gpio"; + }; + + cp0_pcie_reset_pins: cp0-pcie-reset-pins { + marvell,pins = "mpp9"; + marvell,function = "gpio"; + }; + + cp0_switch_pins: cp0-switch-pins { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "gpio"; + }; + + cp0_phy_pins: cp0-phy-pins { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; +}; + +/* mikroBUS UART */ +&cp0_uart0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_uart0_pins>; +}; + +/* mikroBUS SPI */ +&cp0_spi0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi0_pins>; +}; + +/* SPI-NOR */ +&cp0_spi1{ + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi1_pins>; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x3e0000>; + read-only; + }; + + partition@3e0000 { + label = "hw-info"; + reg = <0x3e0000 0x10000>; + read-only; + }; + + partition@3f0000 { + label = "u-boot-env"; + reg = <0x3f0000 0x10000>; + }; + }; + }; +}; + +/* mikroBUS, 1G SFP and GPIO expander */ +&cp0_i2c0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c0_pins>; + clock-frequency = <100000>; + + sfp_gpio: pca9554@39 { + compatible = "nxp,pca9554"; + pinctrl-names = "default"; + pinctrl-0 = <&pca9554_int_pins>; + reg = <0x39>; + + interrupt-parent = <&cp0_gpio1>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + gpio-controller; + #gpio-cells = <2>; + + /* + * IO0_0: SFP+_TX_FAULT + * IO0_1: SFP+_TX_DISABLE + * IO0_2: SFP+_PRSNT + * IO0_3: SFP+_LOSS + * IO0_4: SFP_TX_FAULT + * IO0_5: SFP_TX_DISABLE + * IO0_6: SFP_PRSNT + * IO0_7: SFP_LOSS + */ + }; +}; + +/* IS31FL3199, mini-PCIe and 10G SFP+ */ +&cp0_i2c1 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c1_pins>; + clock-frequency = <100000>; + + leds@64 { + compatible = "issi,is31fl3199"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&is31_sdb_pins>; + shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>; + reg = <0x64>; + + led1_red: led@1 { + label = "red:led1"; + reg = <1>; + led-max-microamp = <20000>; + }; + + led1_green: led@2 { + label = "green:led1"; + reg = <2>; + }; + + led1_blue: led@3 { + label = "blue:led1"; + reg = <3>; + }; + + led2_red: led@4 { + label = "red:led2"; + reg = <4>; + }; + + led2_green: led@5 { + label = "green:led2"; + reg = <5>; + }; + + led2_blue: led@6 { + label = "blue:led2"; + reg = <6>; + }; + + led3_red: led@7 { + label = "red:led3"; + reg = <7>; + }; + + led3_green: led@8 { + label = "green:led3"; + reg = <8>; + }; + + led3_blue: led@9 { + label = "blue:led3"; + reg = <9>; + }; + }; +}; + +&cp0_mdio { + status = "okay"; + + /* 88E1512 PHY */ + eth2phy: ethernet-phy@1 { + reg = <1>; + sfp = <&sfp_eth2>; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_phy_pins>; + reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>; + }; + + /* 88E6141 Topaz switch */ + switch: switch@3 { + compatible = "marvell,mv88e6085"; + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_switch_pins>; + reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&cp0_gpio1>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + swport1: port@1 { + reg = <1>; + label = "lan0"; + phy-handle = <&swphy1>; + }; + + swport2: port@2 { + reg = <2>; + label = "lan1"; + phy-handle = <&swphy2>; + }; + + swport3: port@3 { + reg = <3>; + label = "lan2"; + phy-handle = <&swphy3>; + }; + + swport4: port@4 { + reg = <4>; + label = "lan3"; + phy-handle = <&swphy4>; + }; + + port@5 { + reg = <5>; + ethernet = <&cp0_eth1>; + phy-mode = "2500base-x"; + managed = "in-band-status"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + swphy1: swphy1@17 { + reg = <17>; + }; + + swphy2: swphy2@18 { + reg = <18>; + }; + + swphy3: swphy3@19 { + reg = <19>; + }; + + swphy4: swphy4@20 { + reg = <20>; + }; + }; + }; +}; + +&cp0_ethernet { + status = "okay"; +}; + +/* 10G SFP+ */ +&cp0_eth0 { + status = "okay"; + + phy-mode = "10gbase-r"; + phys = <&cp0_comphy4 0>; + managed = "in-band-status"; + sfp = <&sfp_eth0>; +}; + +/* Topaz switch uplink */ +&cp0_eth1 { + status = "okay"; + + phy-mode = "2500base-x"; + phys = <&cp0_comphy0 1>; + + fixed-link { + speed = <2500>; + full-duplex; + }; +}; + +/* 1G SFP or 1G RJ45 */ +&cp0_eth2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_rgmii1_pins>; + + phy = <ð2phy>; + phy-mode = "rgmii-id"; +}; + +/* SMSC USB5434B hub */ +&cp0_usb3_0 { + status = "okay"; + + phys = <&cp0_comphy1 0>; + phy-names = "cp0-usb3h0-comphy"; +}; + +/* miniPCI-E USB */ +&cp0_usb3_1 { + status = "okay"; +}; + +&cp0_sata0 { + status = "okay"; + + /* 7 + 12 SATA connector (J24) */ + sata-port@0 { + phys = <&cp0_comphy2 0>; + phy-names = "cp0-sata0-0-phy"; + }; + + /* M.2-2250 B-key (J39) */ + sata-port@1 { + phys = <&cp0_comphy3 1>; + phy-names = "cp0-sata0-1-phy"; + }; +}; + +/* miniPCI-E (J5) */ +&cp0_pcie2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&cp0_pcie_reset_pins>; + phys = <&cp0_comphy5 2>; + phy-names = "cp0-pcie2-x1-phy"; + reset-gpio = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>; + ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x8000000>; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts new file mode 100644 index 0000000000..b5cc630781 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts @@ -0,0 +1,513 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright SolidRun Ltd. + * Copyright (C) 2024 Tobias Schramm + * + * Device tree for the CN9130-based ClearFog Pro + */ + +#include "cn9130.dtsi" + +#include +#include + +/ { + model = "SolidRun ClearFog Pro"; + compatible = "solidrun,clearfog-pro", "marvell,armada-ap807-quad", + "marvell,armada-ap807"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; + i2c0 = &cp0_i2c0; + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + spi1 = &cp0_spi1; + }; + + memory@00000000 { + reg = <0x0 0x0 0x1 0x0>; + device_type = "memory"; + }; + + /* Virtual regulator, root of power tree */ + vin: regulator-vin { + compatible = "regulator-fixed"; + regulator-name = "vin"; + regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + /* Regulators supplied by vin */ + v_5v0: regulator-v_5v0 { + compatible = "regulator-fixed"; + regulator-name = "v_5v0"; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vin>; + }; + + v_3v3: regulator-v_3v3 { + compatible = "regulator-fixed"; + regulator-name = "v_3v3"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vin>; + }; + + /* Regulators supplied by v_5v0 */ + v_1v8: regulator-v_1v8 { + compatible = "regulator-fixed"; + regulator-name = "v_1v8"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&v_5v0>; + }; + + v_5v0_usb3_hst_vbus: regulator-v_5v0_usb3_hst_vbus { + compatible = "regulator-fixed"; + regulator-name = "v_5v0_usb3_hst_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&expander0 6 GPIO_ACTIVE_LOW>; + vin-supply = <&v_5v0>; + }; + + /* Regulators internal to SOM */ + vqmmc: regulator-vqmmc { + compatible = "regulator-fixed"; + regulator-name = "vqmmc"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&v_5v0>; + }; + + cp0_usb3_0_phy1: cp0_usb3_phy@1 { + compatible = "usb-nop-xceiv"; + vbus-supply = <&v_5v0_usb3_hst_vbus>; + }; + + cp0_sfp_eth0: sfp-eth@0 { + compatible = "sff,sfp"; + i2c-bus = <&cp0_i2c1>; + los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>; + maximum-power-milliwatt = <2000>; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_button_pin>; + + reset { + label = "Reset"; + linux,code = ; + gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +/* on-board eMMC */ +&ap_sdhci0 { + bus-width = <8>; + pinctrl-names = "default"; + vqmmc-supply = <&vqmmc>; + status = "okay"; +}; + +&cp0_crypto { + status = "okay"; +}; + +&cp0_ethernet { + status = "okay"; +}; + +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +}; + +&cp0_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c0_pins>; + clock-frequency = <100000>; + + /* + * PCA9655 GPIO expander, up to 1MHz clock. + * 0-CON3 CLKREQ# + * 1-CON3 PERST# + * 2-CON2 PERST# + * 3-CON3 W_DISABLE + * 4-CON2 CLKREQ# + * 5-USB3 overcurrent + * 6-USB3 power + * 7-CON2 W_DISABLE + * 8-JP4 P1 + * 9-JP4 P4 + * 10-JP4 P5 + * 11-m.2 DEVSLP + * 12-SFP_LOS + * 13-SFP_TX_FAULT + * 14-SFP_TX_DISABLE + * 15-SFP_MOD_DEF0 + */ + expander0: gpio-expander@20 { + compatible = "nxp,pca9555"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cp0_gpio1>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_expander0_pins>; + vcc-supply = <&v_3v3>; + + pcie1_0_clkreq { + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + input; + line-name = "pcie1.0-clkreq"; + }; + + pcie1_0_w_disable { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + output-low; + line-name = "pcie1.0-w-disable"; + }; + + pcie2_0_clkreq { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + input; + line-name = "pcie2.0-clkreq"; + }; + + pcie2_0_w_disable { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-low; + line-name = "pcie2.0-w-disable"; + }; + + usb3_ilimit { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + input; + line-name = "usb3-current-limit"; + }; + + m2_devslp { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "m.2 devslp"; + }; + }; + + /* ADC only for mikroBUS connector */ + mcp3021@4c { + compatible = "microchip,mcp3021"; + reg = <0x4c>; + }; + + /* EEPROM on the SOM */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + pagesize = <16>; + read-only; + + nvmem-layout { + compatible = "onie,tlv-layout"; + + onie_tlv_macaddr: mac-address { + #nvmem-cell-cells = <1>; + }; + }; + }; +}; + +/* SMBUS on mini PCIe sockets */ +&cp0_i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c1_pins>; + clock-frequency = <100000>; +}; + +&cp0_mdio { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + /* Green led blinks on activity, orange LED on link */ + marvell,reg-init = <3 16 0 0x0064>; + }; + + switch@4 { + compatible = "marvell,mv88e6085"; + reg = <4>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cp0_gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_dsa0_pins>; + reset-gpios = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>; + + mdio-external { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + + /* 88E1512 PHY */ + port6_phy: ethernet-phy@1 { + reg = <1>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan5"; + }; + + port@1 { + reg = <1>; + label = "lan4"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan1"; + }; + + port@5 { + reg = <5>; + ethernet = <&cp0_eth1>; + label = "cpu"; + phy-mode = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@6 { + /* 88E1512 external phy */ + reg = <6>; + label = "lan6"; + phy-handle = <&port6_phy>; + phy-mode = "rgmii-id"; + }; + }; + }; +}; + +/* SRDS #0 - SATA on bottom M.2 B-Key connector */ +&cp0_sata0 { + status = "okay"; + + sata-port@0 { + status = "disabled"; + }; + + sata-port@1 { + phys = <&cp0_comphy0 1>; + target-supply = <&v_3v3>; + }; +}; + +&cp0_utmi { + status = "okay"; +}; + +/* mini PCIe slot far from SOM, USB 2.0 only, SS lanes unused */ +&cp0_usb3_0 { + status = "okay"; + phys = <&cp0_utmi0>; + phy-names = "utmi"; + dr_mode = "host"; +}; + +/* SRDS #1 - USB-A 3.0 host port */ +&cp0_usb3_1 { + status = "okay"; + phys = <&cp0_utmi1>, <&cp0_comphy1 0>; + phy-names = "utmi", "usb"; + usb-phy = <&cp0_usb3_0_phy1>; + dr_mode = "host"; +}; + +/* SRDS #2 - SFP+ 10GE */ +&cp0_eth0 { + status = "okay"; + phy-mode = "10gbase-r"; + phys = <&cp0_comphy2 0>; + managed = "in-band-status"; + nvmem-cells = <&onie_tlv_macaddr 0>; + nvmem-cell-names = "mac-address"; + sfp = <&cp0_sfp_eth0>; +}; + +/* SRDS #3 - SGMII 1GE to L2 switch */ +&cp0_eth1 { + status = "okay"; + phys = <&cp0_comphy3 1>; + phy-mode = "sgmii"; + nvmem-cells = <&onie_tlv_macaddr 1>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +/* SRDS #4 - mini PCIe slot near SOM */ +&cp0_pcie1 { + status = "okay"; + phys = <&cp0_comphy4 1>; + num-lanes = <1>; + reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; +}; + +/* SRDS #5 - mini PCIe slot far from SOM */ +&cp0_pcie2 { + status = "okay"; + phys = <&cp0_comphy5 2>; + num-lanes = <1>; + reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; +}; + +/* GE PHY RGMII */ +&cp0_eth2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_ge2_rgmii_pins>; + phy = <&phy0>; + phy-mode = "rgmii-id"; + nvmem-cells = <&onie_tlv_macaddr 2>; + nvmem-cell-names = "mac-address"; +}; + +/* micro SD card slot */ +&cp0_sdhci0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_sdhci_pins &cp0_sdhci_cd_pins>; + bus-width = <4>; + cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>; + no-1-8-v; + vqmmc-supply = <&v_3v3>; + vmmc-supply = <&v_3v3>; +}; + +&cp0_spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi1_pins>; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + #address-cells = <0x1>; + #size-cells = <0x1>; + spi-max-frequency = <10000000>; + }; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + + cp0_i2c0_pins: cp0-i2c0-pins { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + + cp0_i2c1_pins: cp0-i2c1-pins { + marvell,pins = "mpp35", "mpp36"; + marvell,function = "i2c1"; + }; + + cp0_ge2_rgmii_pins: cp0-ge2-rgmii-pins { + marvell,pins = "mpp44", "mpp45", "mpp46", + "mpp47", "mpp48", "mpp49", + "mpp50", "mpp51", "mpp52", + "mpp53", "mpp54", "mpp55"; + marvell,function = "ge1"; + }; + + cp0_sdhci_cd_pins: cp0-sdhci-cd-pins { + marvell,pins = "mpp43"; + marvell,function = "sdio"; + }; + + cp0_sdhci_pins: cp0-sdhci-pins { + marvell,pins = "mpp56", "mpp57", "mpp58", + "mpp59", "mpp60", "mpp61"; + marvell,function = "sdio"; + }; + + cp0_spi1_pins: cp0-spi1-pins { + marvell,pins = "mpp12", "mpp13", "mpp14", + "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + + cp0_dsa0_pins: cp0-dsa0-pins { + marvell,pins = "mpp27", "mpp29"; + marvell,function = "gpio"; + }; + + cp0_button_pin: cp0-button-pin { + marvell,pins = "mpp32"; + marvell,function = "gpio"; + }; + + cp0_expander0_pins: cp0-expander0-pins { + marvell,pins = "mpp4"; + marvell,function = "gpio"; + }; + }; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts new file mode 100644 index 0000000000..d214853f1b --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts @@ -0,0 +1,410 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (C) 2019 Marvell International Ltd. + * + * Device tree for the CN9131-DB board. + */ + +#include "cn9130.dtsi" +#include "puzzle-thermal.dtsi" + +#include +#include +#include + +/ { + model = "iEi Puzzle-M901"; + compatible = "iei,puzzle-m901", + "marvell,armada-ap807-quad", "marvell,armada-ap807"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + i2c0 = &cp1_i2c0; + i2c1 = &cp0_i2c0; + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + ethernet3 = &cp1_eth0; + ethernet4 = &cp1_eth1; + ethernet5 = &cp1_eth2; + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; + gpio3 = &cp1_gpio1; + gpio4 = &cp1_gpio2; + led-boot = &led_power; + led-failsafe = &led_info; + led-running = &led_power; + led-upgrade = &led_info; + }; + + memory@00000000 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + gpio_keys { + compatible = "gpio-keys"; + + reset { + label = "Reset"; + linux,code = ; + gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&cp0_uart0 { + status = "okay"; + + puzzle-mcu { + compatible = "iei,wt61p803-puzzle"; + #address-cells = <1>; + #size-cells = <1>; + current-speed = <115200>; + enable-beep; + status = "okay"; + + leds { + compatible = "iei,wt61p803-puzzle-leds"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + led@0 { + reg = <0>; + label = "white:network"; + active-low; + }; + + led@1 { + reg = <1>; + label = "green:cloud"; + active-low; + }; + + led_info: led@2 { + reg = <2>; + label = "orange:info"; + active-low; + }; + + led_power: led@3 { + reg = <3>; + function = LED_FUNCTION_POWER; + color = ; + active-low; + default-state = "on"; + }; + }; + + hwmon { + compatible = "iei,wt61p803-puzzle-hwmon"; + #address-cells = <1>; + #size-cells = <0>; + + chassis_fan_group0: fan-group@0 { + #cooling-cells = <2>; + reg = <0x00>; + cooling-levels = <0 159 195 211 223 241 255>; + }; + }; + }; +}; + +&ap_thermal_ic { + PUZZLE_FAN_THERMAL(ic, &chassis_fan_group0); +}; + +&cp0_thermal_ic { + PUZZLE_FAN_THERMAL(cp0, &chassis_fan_group0); +}; + +/* on-board eMMC - U9 */ +&ap_sdhci0 { + pinctrl-names = "default"; + bus-width = <8>; + status = "okay"; + mmc-ddr-1_8v; + mmc-hs400-1_8v; +}; + +&cp0_crypto { + status = "okay"; +}; + +&cp0_xmdio { + status = "okay"; + cp0_nbaset_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp0_nbaset_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp0_nbaset_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp0_ethernet { + status = "okay"; +}; + +/* SLM-1521-V2, CON9 */ +&cp0_eth0 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy2 0>; + phy = <&cp0_nbaset_phy0>; +}; + +&cp0_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy4 1>; + phy = <&cp0_nbaset_phy1>; +}; + +&cp0_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy5 2>; + phy = <&cp0_nbaset_phy2>; +}; + +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +}; + +&cp0_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; + rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + wakeup-source; + }; +}; + +/* SLM-1521-V2, CON6 */ +&cp0_pcie0 { + status = "okay"; + num-lanes = <2>; + num-viewport = <8>; + phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>; +}; + +/* U55 */ +&cp0_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi0_pins>; + reg = <0x700680 0x50>, /* control */ + <0x2000000 0x1000000>; /* CS0 */ + status = "okay"; + spi-flash@0 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <40000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "U-Boot"; + reg = <0x0 0x1f0000>; + }; + partition@1f0000 { + label = "U-Boot ENV Factory"; + reg = <0x1f0000 0x10000>; + }; + partition@200000 { + label = "Reserved"; + reg = <0x200000 0x1f0000>; + }; + partition@3f0000 { + label = "U-Boot ENV"; + reg = <0x3f0000 0x10000>; + }; + }; + }; +}; + +&cp0_rtc { + status = "disabled"; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp0_i2c0_pins: cp0-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp0_i2c1_pins: cp0-i2c-pins-1 { + marvell,pins = "mpp35", "mpp36"; + marvell,function = "i2c1"; + }; + cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 { + marvell,pins = "mpp0", "mpp1", "mpp2", + "mpp3", "mpp4", "mpp5", + "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 { + marvell,pins = "mpp44", "mpp45", "mpp46", + "mpp47", "mpp48", "mpp49", + "mpp50", "mpp51", "mpp52", + "mpp53", "mpp54", "mpp55"; + marvell,function = "ge1"; + }; + cp0_spi0_pins: cp0-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + }; +}; + +/* + * Instantiate the first connected CP115 + */ + +#define CP11X_NAME cp1 +#define CP11X_BASE f6000000 +#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000)) +#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 +#define CP11X_PCIE0_BASE f6600000 +#define CP11X_PCIE1_BASE f6620000 +#define CP11X_PCIE2_BASE f6640000 + +#include "armada-cp115.dtsi" + +#undef CP11X_NAME +#undef CP11X_BASE +#undef CP11X_PCIEx_MEM_BASE +#undef CP11X_PCIEx_MEM_SIZE +#undef CP11X_PCIE0_BASE +#undef CP11X_PCIE1_BASE +#undef CP11X_PCIE2_BASE + +&cp1_crypto { + status = "okay"; +}; + +&cp1_xmdio { + status = "okay"; + cp1_nbaset_phy0: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp1_nbaset_phy1: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp1_nbaset_phy2: ethernet-phy@5 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp1_ethernet { + status = "okay"; +}; + +/* CON50 */ +&cp1_eth0 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy2 0>; + phy = <&cp1_nbaset_phy0>; +}; + +&cp1_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy4 1>; + phy = <&cp1_nbaset_phy1>; +}; + +&cp1_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy5 2>; + phy = <&cp1_nbaset_phy2>; +}; + +&cp1_sata0 { + status = "okay"; + sata-port@1 { + status = "okay"; + phys = <&cp1_comphy0 1>; + }; +}; + +&cp1_gpio1 { + status = "okay"; +}; + +&cp1_gpio2 { + status = "okay"; +}; + +&cp1_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp1_i2c0_pins>; + clock-frequency = <100000>; +}; + +&cp1_rtc { + status = "disabled"; +}; + +&cp1_syscon0 { + cp1_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp1_i2c0_pins: cp1-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp1_spi0_pins: cp1-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins { + marvell,pins = "mpp3"; + marvell,function = "gpio"; + }; + cp1_sfp_pins: sfp-pins { + marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11"; + marvell,function = "gpio"; + }; + }; +}; + +&cp1_thermal_ic { + PUZZLE_FAN_THERMAL(cp1, &chassis_fan_group0); +}; + +&cp1_usb3_1 { + status = "okay"; + phys = <&cp1_comphy3 1>; + phy-names = "usb"; +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts new file mode 100644 index 0000000000..8c775e4a4f --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts @@ -0,0 +1,580 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (C) 2019 Marvell International Ltd. + * + * Device tree for the CN9132-DB board. + */ + +#include "cn9130.dtsi" +#include "puzzle-thermal.dtsi" + +#include +#include +#include + +/ { + model = "iEi Puzzle-M902"; + compatible = "iei,puzzle-m902", + "marvell,armada-ap807-quad", "marvell,armada-ap807"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + i2c0 = &cp1_i2c0; + i2c1 = &cp0_i2c0; + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; + gpio3 = &cp1_gpio1; + gpio4 = &cp1_gpio2; + gpio5 = &cp2_gpio1; + gpio6 = &cp2_gpio2; + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + ethernet3 = &cp1_eth0; + ethernet4 = &cp1_eth1; + ethernet5 = &cp1_eth2; + ethernet6 = &cp2_eth0; + ethernet7 = &cp2_eth1; + ethernet8 = &cp2_eth2; + spi1 = &cp0_spi0; + spi2 = &cp0_spi1; + led-boot = &led_power; + led-failsafe = &led_info; + led-running = &led_power; + led-upgrade = &led_info; + }; + + memory@00000000 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + gpio_keys { + compatible = "gpio-keys"; + + reset { + label = "Reset"; + linux,code = ; + gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>; + }; + }; + + cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 { + compatible = "regulator-fixed"; + regulator-name = "cp2-xhci0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + cp2_usb3_0_phy0: cp2_usb3_phy0 { + compatible = "usb-nop-xceiv"; + vcc-supply = <&cp2_reg_usb3_vbus0>; + }; + + cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 { + compatible = "regulator-fixed"; + regulator-name = "cp2-xhci1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>; + }; + + cp2_usb3_0_phy1: cp2_usb3_phy1 { + compatible = "usb-nop-xceiv"; + vcc-supply = <&cp2_reg_usb3_vbus1>; + }; + + cp2_sfp_eth0: sfp-eth0 { + compatible = "sff,sfp"; + i2c-bus = <&cp2_sfpp0_i2c>; + los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&cp0_uart0 { + status = "okay"; + + puzzle-mcu { + compatible = "iei,wt61p803-puzzle"; + #address-cells = <1>; + #size-cells = <1>; + current-speed = <115200>; + enable-beep; + status = "okay"; + + leds { + compatible = "iei,wt61p803-puzzle-leds"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + led@0 { + reg = <0>; + label = "white:network"; + active-low; + }; + + led@1 { + reg = <1>; + label = "green:cloud"; + active-low; + }; + + led_info: led@2 { + reg = <2>; + label = "orange:info"; + active-low; + }; + + led_power: led@3 { + reg = <3>; + function = LED_FUNCTION_POWER; + color = ; + active-low; + default-state = "on"; + }; + }; + + hwmon { + compatible = "iei,wt61p803-puzzle-hwmon"; + #address-cells = <1>; + #size-cells = <0>; + + chassis_fan_group0: fan-group@0 { + #cooling-cells = <2>; + reg = <0x00>; + cooling-levels = <0 159 195 211 223 241 255>; + }; + }; + }; +}; + +&ap_thermal_ic { + PUZZLE_FAN_THERMAL(ic, &chassis_fan_group0); +}; + +&cp0_thermal_ic { + PUZZLE_FAN_THERMAL(cp0, &chassis_fan_group0); +}; + + +/* on-board eMMC - U9 */ +&ap_sdhci0 { + pinctrl-names = "default"; + bus-width = <8>; + status = "okay"; + mmc-ddr-1_8v; + mmc-hs400-1_8v; +}; + +&cp0_crypto { + status = "okay"; +}; + +&cp0_xmdio { + status = "okay"; + cp0_nbaset_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp0_nbaset_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp0_nbaset_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp0_ethernet { + status = "okay"; +}; + +/* SLM-1521-V2, CON9 */ +&cp0_eth0 { + status = "okay"; + phy-mode = "10gbase-kr"; + phys = <&cp0_comphy2 0>; + phy = <&cp0_nbaset_phy0>; +}; + +&cp0_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy4 1>; + phy = <&cp0_nbaset_phy1>; +}; + +&cp0_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy1 2>; + phy = <&cp0_nbaset_phy2>; +}; + +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +}; + +&cp0_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; + rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + wakeup-source; + }; +}; + +&cp0_i2c1 { + clock-frequency = <100000>; +}; + +/* SLM-1521-V2, CON6 */ +&cp0_sata0 { + status = "okay"; + sata-port@1 { + status = "okay"; + phys = <&cp0_comphy0 1>; + }; +}; + +&cp0_pcie2 { + status = "okay"; + num-lanes = <1>; + num-viewport = <8>; + phys = <&cp0_comphy5 2>; +}; + +/* U55 */ +&cp0_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi0_pins>; + reg = <0x700680 0x50>, /* control */ + <0x2000000 0x1000000>; /* CS0 */ + status = "okay"; + spi-flash@0 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <40000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "U-Boot"; + reg = <0x0 0x1f0000>; + }; + partition@1f0000 { + label = "U-Boot ENV Factory"; + reg = <0x1f0000 0x10000>; + }; + partition@200000 { + label = "Reserved"; + reg = <0x200000 0x1f0000>; + }; + partition@3f0000 { + label = "U-Boot ENV"; + reg = <0x3f0000 0x10000>; + }; + }; + }; +}; + +&cp0_rtc { + status = "disabled"; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp0_i2c0_pins: cp0-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp0_i2c1_pins: cp0-i2c-pins-1 { + marvell,pins = "mpp35", "mpp36"; + marvell,function = "i2c1"; + }; + cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 { + marvell,pins = "mpp0", "mpp1", "mpp2", + "mpp3", "mpp4", "mpp5", + "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 { + marvell,pins = "mpp44", "mpp45", "mpp46", + "mpp47", "mpp48", "mpp49", + "mpp50", "mpp51", "mpp52", + "mpp53", "mpp54", "mpp55"; + marvell,function = "ge1"; + }; + cp0_spi0_pins: cp0-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + }; +}; + +&cp0_usb3_1 { + status = "okay"; + phys = <&cp0_comphy3 1>; + phy-names = "usb"; +}; + +/* + * Instantiate the first connected CP115 + */ + +#define CP11X_NAME cp1 +#define CP11X_BASE f4000000 +#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000)) +#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 +#define CP11X_PCIE0_BASE f4600000 +#define CP11X_PCIE1_BASE f4620000 +#define CP11X_PCIE2_BASE f4640000 + +#include "armada-cp115.dtsi" + +#undef CP11X_NAME +#undef CP11X_BASE +#undef CP11X_PCIEx_MEM_BASE +#undef CP11X_PCIEx_MEM_SIZE +#undef CP11X_PCIE0_BASE +#undef CP11X_PCIE1_BASE +#undef CP11X_PCIE2_BASE + +&cp1_crypto { + status = "okay"; +}; + +&cp1_xmdio { + status = "okay"; + cp1_nbaset_phy0: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp1_nbaset_phy1: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp1_nbaset_phy2: ethernet-phy@5 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp1_ethernet { + status = "okay"; +}; + +/* CON50 */ +&cp1_eth0 { + status = "okay"; + phy-mode = "10gbase-kr"; + phys = <&cp1_comphy2 0>; + phy = <&cp1_nbaset_phy0>; +}; + +&cp1_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy4 1>; + phy = <&cp1_nbaset_phy1>; +}; + +&cp1_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy1 2>; + phy = <&cp1_nbaset_phy2>; +}; + +&cp1_gpio1 { + status = "okay"; +}; + +&cp1_gpio2 { + status = "okay"; +}; + +&cp1_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp1_i2c0_pins>; + clock-frequency = <100000>; +}; + +&cp1_rtc { + status = "disabled"; +}; + +&cp1_syscon0 { + cp1_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp1_i2c0_pins: cp1-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp1_spi0_pins: cp1-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins { + marvell,pins = "mpp3"; + marvell,function = "gpio"; + }; + }; +}; + +&cp1_thermal_ic { + PUZZLE_FAN_THERMAL(cp1, &chassis_fan_group0); +}; + +/* + * Instantiate the second connected CP115 + */ + +#define CP11X_NAME cp2 +#define CP11X_BASE f6000000 +#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000)) +#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 +#define CP11X_PCIE0_BASE f6600000 +#define CP11X_PCIE1_BASE f6620000 +#define CP11X_PCIE2_BASE f6640000 + +#include "armada-cp115.dtsi" + +#undef CP11X_NAME +#undef CP11X_BASE +#undef CP11X_PCIEx_MEM_BASE +#undef CP11X_PCIEx_MEM_SIZE +#undef CP11X_PCIE0_BASE +#undef CP11X_PCIE1_BASE +#undef CP11X_PCIE2_BASE + +&cp2_crypto { + status = "okay"; +}; + +&cp2_ethernet { + status = "okay"; +}; + +&cp2_xmdio { + status = "okay"; + cp2_nbaset_phy0: ethernet-phy@6 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp2_nbaset_phy1: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp2_nbaset_phy2: ethernet-phy@8 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +/* SLM-1521-V2, CON9 */ +&cp2_eth0 { + status = "okay"; + phy-mode = "10gbase-kr"; + phys = <&cp2_comphy2 0>; + phy = <&cp2_nbaset_phy0>; +}; + +&cp2_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp2_comphy4 1>; + phy = <&cp2_nbaset_phy1>; +}; + +&cp2_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp2_comphy1 2>; + phy = <&cp2_nbaset_phy2>; +}; + +&cp2_gpio1 { + status = "okay"; +}; + +&cp2_gpio2 { + status = "okay"; +}; + +&cp2_i2c0 { + clock-frequency = <100000>; + /* SLM-1521-V2 - U3 */ + i2c-mux@72 { + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x72>; + cp2_sfpp0_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* U12 */ + cp2_module_expander1: pca9555@21 { + compatible = "nxp,pca9555"; + pinctrl-names = "default"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x21>; + }; + }; + }; +}; + +&cp2_rtc { + status = "disabled"; +}; + +&cp2_syscon0 { + cp2_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp2_i2c0_pins: cp2-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + }; +}; + +&cp2_thermal_ic { + PUZZLE_FAN_THERMAL(cp2, &chassis_fan_group0); +}; diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi new file mode 100644 index 0000000000..ea79ab224e --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi @@ -0,0 +1,68 @@ +#define PUZZLE_FAN_THERMAL(_cname, _fan) \ + polling-delay-passive = <500>; \ + polling-delay = <1000>; \ + \ + trips { \ + cpu-hot { \ + temperature = <75000>; \ + hysteresis = <5000>; \ + type = "hot"; \ + }; \ + _cname##_active_full: cpu-active-full { \ + temperature = <70000>; \ + hysteresis = <5000>; \ + type = "active"; \ + }; \ + _cname##_active_high: cpu-active-high { \ + temperature = <65000>; \ + hysteresis = <5000>; \ + type = "active"; \ + }; \ + _cname##_active_med: cpu-active-med { \ + temperature = <62500>; \ + hysteresis = <3000>; \ + type = "active"; \ + }; \ + _cname##_active_low: cpu-active-low { \ + temperature = <60000>; \ + hysteresis = <3000>; \ + type = "active"; \ + }; \ + _cname##_active_min: cpu-active-min { \ + temperature = <55000>; \ + hysteresis = <5000>; \ + type = "active"; \ + }; \ + _cname##_active_idle: cpu-active-idle { \ + temperature = <50000>; \ + hysteresis = <5000>; \ + type = "active"; \ + }; \ + }; \ + cooling-maps { \ + cpu-active-full { \ + trip = <&_cname##_active_full>; \ + cooling-device = <_fan THERMAL_NO_LIMIT \ + THERMAL_NO_LIMIT>; \ + }; \ + cpu-active-high { \ + trip = <&_cname##_active_high>; \ + cooling-device = <_fan 4 5>; \ + }; \ + cpu-active-med { \ + trip = <&_cname##_active_med>; \ + cooling-device = <_fan 3 4>; \ + }; \ + cpu-active-low { \ + trip = <&_cname##_active_low>; \ + cooling-device = <_fan 2 3>; \ + }; \ + cpu-active-min { \ + trip = <&_cname##_active_min>; \ + cooling-device = <_fan 1 2>; \ + }; \ + cpu-active-idle { \ + trip = <&_cname##_active_idle>; \ + cooling-device = <_fan 0 0>; \ + }; \ + } diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk index 43b4edb266..9dfe61d590 100644 --- a/target/linux/mvebu/image/cortexa9.mk +++ b/target/linux/mvebu/image/cortexa9.mk @@ -3,6 +3,10 @@ # Copyright (C) 2012-2016 OpenWrt.org # Copyright (C) 2016 LEDE-project.org +ifneq ($(KERNEL),6.1) +DTS_DIR := $(DTS_DIR)/marvell +endif + define Build/fortigate-header ( \ dd if=/dev/zero bs=384 count=1 2>/dev/null; \ diff --git a/target/linux/mvebu/patches-6.6/100-aardvark-workaround-PCIe.patch b/target/linux/mvebu/patches-6.6/100-aardvark-workaround-PCIe.patch new file mode 100644 index 0000000000..4936f6ad16 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/100-aardvark-workaround-PCIe.patch @@ -0,0 +1,81 @@ +Subject: [PATCH v2] PCI: aardvark: Implement workaround for PCIe Completion Timeout +Date: Tue, 2 Aug 2022 14:38:16 +0200 +Message-Id: <20220802123816.21817-1-pali@kernel.org> +X-Mailer: git-send-email 2.20.1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit +Precedence: bulk +List-ID: +X-Mailing-List: linux-pci@vger.kernel.org + +Marvell Armada 3700 Functional Errata, Guidelines, and Restrictions +document describes in erratum 3.12 PCIe Completion Timeout (Ref #: 251), +that PCIe IP does not support a strong-ordered model for inbound posted vs. +outbound completion. + +As a workaround for this erratum, DIS_ORD_CHK flag in Debug Mux Control +register must be set. It disables the ordering check in the core between +Completions and Posted requests received from the link. + +Marvell also suggests to do full memory barrier at the beginning of +aardvark summary interrupt handler before calling interrupt handlers of +endpoint drivers in order to minimize the risk for the race condition +documented in the Erratum between the DMA done status reading and the +completion of writing to the host memory. + +More details about this issue and suggested workarounds are in discussion: +https://lore.kernel.org/linux-pci/BN9PR18MB425154FE5019DCAF2028A1D5DB8D9@BN9PR18MB4251.namprd18.prod.outlook.com/t/#u + +It was reported that enabling this workaround fixes instability issues and +"Unhandled fault" errors when using 60 GHz WiFi 802.11ad card with Qualcomm +QCA6335 chip under significant load which were caused by interrupt status +stuck in the outbound CMPLT queue traced back to this erratum. + +This workaround fixes also kernel panic triggered after some minutes of +usage 5 GHz WiFi 802.11ax card with Mediatek MT7915 chip: + + Internal error: synchronous external abort: 96000210 [#1] SMP + Kernel panic - not syncing: Fatal exception in interrupt + +Signed-off-by: Thomas Petazzoni +Signed-off-by: Pali Rohár +Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") +Cc: stable@vger.kernel.org +--- + drivers/pci/controller/pci-aardvark.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -212,6 +212,8 @@ enum { + }; + + #define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) ++#define DEBUG_MUX_CTRL_REG (LMI_BASE_ADDR + 0x208) ++#define DIS_ORD_CHK BIT(30) + + /* PCIe core controller registers */ + #define CTRL_CORE_BASE_ADDR 0x18000 +@@ -560,6 +562,11 @@ static void advk_pcie_setup_hw(struct ad + PCIE_CORE_CTRL2_TD_ENABLE; + advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); + ++ /* Disable ordering checks, workaround for erratum 3.12 "PCIe completion timeout" */ ++ reg = advk_readl(pcie, DEBUG_MUX_CTRL_REG); ++ reg |= DIS_ORD_CHK; ++ advk_writel(pcie, reg, DEBUG_MUX_CTRL_REG); ++ + /* Set lane X1 */ + reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); + reg &= ~LANE_CNT_MSK; +@@ -1661,6 +1668,9 @@ static irqreturn_t advk_pcie_irq_handler + struct advk_pcie *pcie = arg; + u32 status; + ++ /* Full memory barrier (ARM dsb sy), workaround for erratum 3.12 "PCIe completion timeout" */ ++ mb(); ++ + status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); + if (!(status & PCIE_IRQ_CORE_INT)) + return IRQ_NONE; diff --git a/target/linux/mvebu/patches-6.6/105-power-reset-linkstation-poweroff-add-ls220de.patch b/target/linux/mvebu/patches-6.6/105-power-reset-linkstation-poweroff-add-ls220de.patch new file mode 100644 index 0000000000..3223861234 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/105-power-reset-linkstation-poweroff-add-ls220de.patch @@ -0,0 +1,15 @@ +--- a/drivers/power/reset/linkstation-poweroff.c ++++ b/drivers/power/reset/linkstation-poweroff.c +@@ -142,6 +142,12 @@ static void linkstation_poweroff(void) + } + + static const struct of_device_id ls_poweroff_of_match[] = { ++ { .compatible = "buffalo,ls220d", ++ .data = &linkstation_power_off_cfg, ++ }, ++ { .compatible = "buffalo,ls220de", ++ .data = &linkstation_power_off_cfg, ++ }, + { .compatible = "buffalo,ls421d", + .data = &linkstation_power_off_cfg, + }, diff --git a/target/linux/mvebu/patches-6.6/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-6.6/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch new file mode 100644 index 0000000000..0cb1e75591 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -0,0 +1,279 @@ +From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001 +From: Adrian Panella +Date: Thu, 9 Mar 2017 09:37:17 +0100 +Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments + +The command-line arguments provided by the boot loader will be +appended to a new device tree property: bootloader-args. +If there is a property "append-rootblock" in DT under /chosen +and a root= option in bootloaders command line it will be parsed +and added to DT bootargs with the form: XX. +Only command line ATAG will be processed, the rest of the ATAGs +sent by bootloader will be ignored. +This is usefull in dual boot systems, to get the current root partition +without afecting the rest of the system. + +Signed-off-by: Adrian Panella + +This patch has been modified to be mvebu specific. The original patch +did not pass the bootloader cmdline on if no append-rootblock stanza +was found, resulting in blank cmdline and failure to boot. + +Signed-off-by: Michael Gray +--- + arch/arm/Kconfig | 11 ++++ + arch/arm/boot/compressed/atags_to_fdt.c | 85 ++++++++++++++++++++++++- + init/main.c | 16 +++++ + 3 files changed, 111 insertions(+), 1 deletion(-) + +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1566,6 +1566,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN + The command-line arguments provided by the boot loader will be + appended to the the device tree bootargs property. + ++config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE ++ bool "Append rootblock parsing bootloader's kernel arguments" ++ help ++ The command-line arguments provided by the boot loader will be ++ appended to a new device tree property: bootloader-args. ++ If there is a property "append-rootblock" in DT under /chosen ++ and a root= option in bootloaders command line it will be parsed ++ and added to DT bootargs with the form: XX. ++ Only command line ATAG will be processed, the rest of the ATAGs ++ sent by bootloader will be ignored. ++ + endchoice + + config CMDLINE +--- a/arch/arm/boot/compressed/atags_to_fdt.c ++++ b/arch/arm/boot/compressed/atags_to_fdt.c +@@ -6,6 +6,8 @@ + + #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) + #define do_extend_cmdline 1 ++#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++#define do_extend_cmdline 1 + #else + #define do_extend_cmdline 0 + #endif +@@ -21,6 +23,7 @@ static int node_offset(void *fdt, const + return offset; + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static int setprop(void *fdt, const char *node_path, const char *property, + void *val_array, int size) + { +@@ -29,6 +32,7 @@ static int setprop(void *fdt, const char + return offset; + return fdt_setprop(fdt, offset, property, val_array, size); + } ++#endif + + static int setprop_string(void *fdt, const char *node_path, + const char *property, const char *string) +@@ -39,6 +43,7 @@ static int setprop_string(void *fdt, con + return fdt_setprop_string(fdt, offset, property, string); + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static int setprop_cell(void *fdt, const char *node_path, + const char *property, uint32_t val) + { +@@ -47,6 +52,7 @@ static int setprop_cell(void *fdt, const + return offset; + return fdt_setprop_cell(fdt, offset, property, val); + } ++#endif + + static const void *getprop(const void *fdt, const char *node_path, + const char *property, int *len) +@@ -59,6 +65,7 @@ static const void *getprop(const void *f + return fdt_getprop(fdt, offset, property, len); + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static uint32_t get_cell_size(const void *fdt) + { + int len; +@@ -70,6 +77,74 @@ static uint32_t get_cell_size(const void + return cell_size; + } + ++#endif ++ ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++ ++static char *append_rootblock(char *dest, const char *str, int len, void *fdt) ++{ ++ const char *ptr, *end; ++ const char *root="root="; ++ int i, l; ++ const char *rootblock; ++ ++ //ARM doesn't have __HAVE_ARCH_STRSTR, so search manually ++ ptr = str - 1; ++ ++ do { ++ //first find an 'r' at the begining or after a space ++ do { ++ ptr++; ++ ptr = strchr(ptr, 'r'); ++ if (!ptr) ++ goto no_append; ++ ++ } while (ptr != str && *(ptr-1) != ' '); ++ ++ //then check for the rest ++ for(i = 1; i <= 4; i++) ++ if(*(ptr+i) != *(root+i)) break; ++ ++ } while (i != 5); ++ ++ end = strchr(ptr, ' '); ++ end = end ? (end - 1) : (strchr(ptr, 0) - 1); ++ ++ //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX ) ++ for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++); ++ ptr = end + 1; ++ ++ /* if append-rootblock property is set use it to append to command line */ ++ rootblock = getprop(fdt, "/chosen", "append-rootblock", &l); ++ if (rootblock == NULL) ++ goto no_append; ++ ++ if (*dest != ' ') { ++ *dest = ' '; ++ dest++; ++ len++; ++ } ++ ++ if (len + l + i <= COMMAND_LINE_SIZE) { ++ memcpy(dest, rootblock, l); ++ dest += l - 1; ++ memcpy(dest, ptr, i); ++ dest += i; ++ } ++ ++ return dest; ++ ++no_append: ++ len = strlen(str); ++ if (len + 1 < COMMAND_LINE_SIZE) { ++ memcpy(dest, str, len); ++ dest += len; ++ } ++ ++ return dest; ++} ++#endif ++ + static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) + { + char cmdline[COMMAND_LINE_SIZE]; +@@ -89,18 +164,28 @@ static void merge_fdt_bootargs(void *fdt + + /* and append the ATAG_CMDLINE */ + if (fdt_cmdline) { ++ ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++ //save original bootloader args ++ //and append ubi.mtd with root partition number to current cmdline ++ setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline); ++ ptr = append_rootblock(ptr, fdt_cmdline, len, fdt); ++ ++#else + len = strlen(fdt_cmdline); + if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { + *ptr++ = ' '; + memcpy(ptr, fdt_cmdline, len); + ptr += len; + } ++#endif + } + *ptr = '\0'; + + setprop_string(fdt, "/chosen", "bootargs", cmdline); + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static void hex_str(char *out, uint32_t value) + { + uint32_t digit; +@@ -118,6 +203,7 @@ static void hex_str(char *out, uint32_t + } + *out = '\0'; + } ++#endif + + /* + * Convert and fold provided ATAGs into the provided FDT. +@@ -132,9 +218,11 @@ int atags_to_fdt(void *atag_list, void * + struct tag *atag = atag_list; + /* In the case of 64 bits memory size, need to reserve 2 cells for + * address and size for each bank */ ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + __be32 mem_reg_property[2 * 2 * NR_BANKS]; +- int memcount = 0; +- int ret, memsize; ++ int memsize, memcount = 0; ++#endif ++ int ret; + + /* make sure we've got an aligned pointer */ + if ((u32)atag_list & 0x3) +@@ -169,7 +257,9 @@ int atags_to_fdt(void *atag_list, void * + else + setprop_string(fdt, "/chosen", "bootargs", + atag->u.cmdline.cmdline); +- } else if (atag->hdr.tag == ATAG_MEM) { ++ } ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE ++ else if (atag->hdr.tag == ATAG_MEM) { + if (memcount >= sizeof(mem_reg_property)/4) + continue; + if (!atag->u.mem.size) +@@ -213,6 +303,10 @@ int atags_to_fdt(void *atag_list, void * + setprop(fdt, "/memory", "reg", mem_reg_property, + 4 * memcount * memsize); + } ++#else ++ ++ } ++#endif + + return fdt_pack(fdt); + } +--- a/init/main.c ++++ b/init/main.c +@@ -112,6 +112,10 @@ + + #include + ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++#include ++#endif ++ + static int kernel_init(void *); + + /* +@@ -928,6 +932,18 @@ void start_kernel(void) + boot_cpu_hotplug_init(); + + pr_notice("Kernel command line: %s\n", saved_command_line); ++ ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++ //Show bootloader's original command line for reference ++ if(of_chosen) { ++ const char *prop = of_get_property(of_chosen, "bootloader-args", NULL); ++ if(prop) ++ pr_notice("Bootloader command line (ignored): %s\n", prop); ++ else ++ pr_notice("Bootloader command line not present\n"); ++ } ++#endif ++ + /* parameters may set static keys */ + jump_label_init(); + parse_early_param(); diff --git a/target/linux/mvebu/patches-6.6/301-mvebu-armada-38x-enable-libata-leds.patch b/target/linux/mvebu/patches-6.6/301-mvebu-armada-38x-enable-libata-leds.patch new file mode 100644 index 0000000000..b75dcf596a --- /dev/null +++ b/target/linux/mvebu/patches-6.6/301-mvebu-armada-38x-enable-libata-leds.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/mach-mvebu/Kconfig ++++ b/arch/arm/mach-mvebu/Kconfig +@@ -66,6 +66,7 @@ config MACH_ARMADA_38X + select HAVE_ARM_TWD if SMP + select MACH_MVEBU_V7 + select PINCTRL_ARMADA_38X ++ select ARCH_WANT_LIBATA_LEDS + help + Say 'Y' here if you want your kernel to support boards based + on the Marvell Armada 380/385 SoC with device tree. diff --git a/target/linux/mvebu/patches-6.6/302-add_powertables.patch b/target/linux/mvebu/patches-6.6/302-add_powertables.patch new file mode 100644 index 0000000000..36117d0cd1 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/302-add_powertables.patch @@ -0,0 +1,770 @@ +--- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +@@ -214,11 +214,19 @@ + &pcie1 { + /* Marvell 88W8864, 5GHz-only */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,2ghz = <0>; ++ }; + }; + + &pcie2 { + /* Marvell 88W8864, 2GHz-only */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,5ghz = <0>; ++ }; + }; + + &pinctrl { +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-caiman.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-caiman.dts +@@ -142,3 +142,205 @@ + }; + }; + }; ++ ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <2 2>; ++ marvell,powertable { ++ AU = ++ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>; ++ CA = ++ <36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; ++ CN = ++ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>; ++ ETSI = ++ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>; ++ FCC = ++ <36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; ++ }; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <2 2>; ++ marvell,powertable { ++ AU = ++ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; ++ CA = ++ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>, ++ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>; ++ CN = ++ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; ++ ETSI = ++ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; ++ FCC = ++ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-cobra.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-cobra.dts +@@ -142,3 +142,205 @@ + }; + }; + }; ++ ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; ++ CA = ++ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ CN = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; ++ ETSI = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; ++ FCC = ++ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, ++ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ }; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ CA = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ CN = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ ETSI = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ FCC = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-shelby.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-shelby.dts +@@ -142,3 +142,205 @@ + }; + }; + }; ++ ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; ++ CA = ++ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ CN = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; ++ ETSI = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; ++ FCC = ++ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, ++ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ }; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ CA = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ CN = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ ETSI = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ FCC = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-rango.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-rango.dts +@@ -157,6 +157,18 @@ + }; + }; + ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ }; ++}; ++ + &sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; +--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +@@ -223,12 +223,100 @@ + pcie@2,0 { + /* Port 0, Lane 1 */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,5ghz = <0>; ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ FCC = ++ <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>; ++ ++ ETSI = ++ <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; + }; + + /* Second mini-PCIe port */ + pcie@3,0 { + /* Port 0, Lane 3 */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,2ghz = <0>; ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ FCC = ++ <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>; ++ ++ ETSI = ++ <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>; ++ }; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-6.6/304-revert_i2c_delay.patch b/target/linux/mvebu/patches-6.6/304-revert_i2c_delay.patch new file mode 100644 index 0000000000..3802b0f16e --- /dev/null +++ b/target/linux/mvebu/patches-6.6/304-revert_i2c_delay.patch @@ -0,0 +1,15 @@ +--- a/arch/arm/boot/dts/marvell/armada-xp.dtsi ++++ b/arch/arm/boot/dts/marvell/armada-xp.dtsi +@@ -237,12 +237,10 @@ + }; + + &i2c0 { +- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11000 0x100>; + }; + + &i2c1 { +- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11100 0x100>; + }; + diff --git a/target/linux/mvebu/patches-6.6/305-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-6.6/305-armada-385-rd-mtd-partitions.patch new file mode 100644 index 0000000000..6fd4fa0e20 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/305-armada-385-rd-mtd-partitions.patch @@ -0,0 +1,19 @@ +--- a/arch/arm/boot/dts/marvell/armada-388-rd.dts ++++ b/arch/arm/boot/dts/marvell/armada-388-rd.dts +@@ -103,6 +103,16 @@ + compatible = "st,m25p128", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0 0x400000>; ++ }; ++ ++ partition@1 { ++ label = "firmware"; ++ reg = <0x400000 0xc00000>; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-6.6/306-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-6.6/306-ARM-mvebu-385-ap-Add-partitions.patch new file mode 100644 index 0000000000..fbdab2fb94 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/306-ARM-mvebu-385-ap-Add-partitions.patch @@ -0,0 +1,35 @@ +From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Tue, 13 Jan 2015 11:14:09 +0100 +Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions + +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/marvell/armada-385-db-ap.dts | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/marvell/armada-385-db-ap.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-db-ap.dts +@@ -218,19 +218,19 @@ + #size-cells = <1>; + + partition@0 { +- label = "U-Boot"; ++ label = "u-boot"; + reg = <0x00000000 0x00800000>; + read-only; + }; + + partition@800000 { +- label = "uImage"; ++ label = "kernel"; + reg = <0x00800000 0x00400000>; + read-only; + }; + + partition@c00000 { +- label = "Root"; ++ label = "ubi"; + reg = <0x00c00000 0x3f400000>; + }; + }; diff --git a/target/linux/mvebu/patches-6.6/307-armada-xp-linksys-mamba-broken-idle.patch b/target/linux/mvebu/patches-6.6/307-armada-xp-linksys-mamba-broken-idle.patch new file mode 100644 index 0000000000..b801b54435 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/307-armada-xp-linksys-mamba-broken-idle.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +@@ -483,3 +483,7 @@ + }; + }; + }; ++ ++&coherencyfab { ++ broken-idle; ++}; diff --git a/target/linux/mvebu/patches-6.6/308-armada-xp-linksys-mamba-wan.patch b/target/linux/mvebu/patches-6.6/308-armada-xp-linksys-mamba-wan.patch new file mode 100644 index 0000000000..5d8c5811b6 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/308-armada-xp-linksys-mamba-wan.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +@@ -385,7 +385,7 @@ + + port@4 { + reg = <4>; +- label = "internet"; ++ label = "wan"; + }; + + port@5 { diff --git a/target/linux/mvebu/patches-6.6/309-linksys-status-led.patch b/target/linux/mvebu/patches-6.6/309-linksys-status-led.patch new file mode 100644 index 0000000000..4ad9abc3a1 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/309-linksys-status-led.patch @@ -0,0 +1,50 @@ +--- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +@@ -14,6 +14,13 @@ + compatible = "linksys,armada385", "marvell,armada385", + "marvell,armada380"; + ++ aliases { ++ led-boot = &led_power; ++ led-failsafe = &led_power; ++ led-running = &led_power; ++ led-upgrade = &led_power; ++ }; ++ + chosen { + stdout-path = "serial0:115200n8"; + }; +@@ -71,7 +78,7 @@ + pinctrl-0 = <&gpio_leds_pins>; + pinctrl-names = "default"; + +- led-power { ++ led_power: power { + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; +--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +@@ -26,6 +26,13 @@ + compatible = "linksys,mamba", "marvell,armadaxp-mv78230", + "marvell,armadaxp", "marvell,armada-370-xp"; + ++ aliases { ++ led-boot = &led_power; ++ led-failsafe = &led_power; ++ led-running = &led_power; ++ led-upgrade = &led_power; ++ }; ++ + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; +@@ -195,7 +202,7 @@ + pinctrl-0 = <&power_led_pin>; + pinctrl-names = "default"; + +- led-power { ++ led_power: power { + label = "mamba:white:power"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + default-state = "on"; diff --git a/target/linux/mvebu/patches-6.6/310-linksys-use-eth0-as-cpu-port.patch b/target/linux/mvebu/patches-6.6/310-linksys-use-eth0-as-cpu-port.patch new file mode 100644 index 0000000000..683a5ebe51 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/310-linksys-use-eth0-as-cpu-port.patch @@ -0,0 +1,25 @@ +--- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +@@ -116,7 +116,7 @@ + }; + + ð2 { +- status = "okay"; ++ status = "disabled"; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <2>; +@@ -200,10 +200,10 @@ + label = "wan"; + }; + +- port@5 { +- reg = <5>; ++ port@6 { ++ reg = <6>; + phy-mode = "sgmii"; +- ethernet = <ð2>; ++ ethernet = <ð0>; + + fixed-link { + speed = <1000>; diff --git a/target/linux/mvebu/patches-6.6/311-adjust-compatible-for-linksys.patch b/target/linux/mvebu/patches-6.6/311-adjust-compatible-for-linksys.patch new file mode 100644 index 0000000000..6722248df7 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/311-adjust-compatible-for-linksys.patch @@ -0,0 +1,68 @@ +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-rango.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-rango.dts +@@ -12,8 +12,8 @@ + + / { + model = "Linksys WRT3200ACM"; +- compatible = "linksys,rango", "linksys,armada385", "marvell,armada385", +- "marvell,armada380"; ++ compatible = "linksys,wrt3200acm", "linksys,rango", "linksys,armada385", ++ "marvell,armada385", "marvell,armada380"; + }; + + &expander0 { +--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +@@ -22,9 +22,10 @@ + #include "armada-xp-mv78230.dtsi" + + / { +- model = "Linksys WRT1900AC"; +- compatible = "linksys,mamba", "marvell,armadaxp-mv78230", +- "marvell,armadaxp", "marvell,armada-370-xp"; ++ model = "Linksys WRT1900AC v1"; ++ compatible = "linksys,wrt1900ac-v1", "linksys,mamba", ++ "marvell,armadaxp-mv78230", "marvell,armadaxp", ++ "marvell,armada-370-xp"; + + aliases { + led-boot = &led_power; +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-cobra.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-cobra.dts +@@ -9,8 +9,9 @@ + #include "armada-385-linksys.dtsi" + + / { +- model = "Linksys WRT1900ACv2"; +- compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385", ++ model = "Linksys WRT1900AC v2"; ++ compatible = "linksys,wrt1900ac-v2", "linksys,cobra", ++ "linksys,armada385", "marvell,armada385", + "marvell,armada380"; + }; + +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-caiman.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-caiman.dts +@@ -10,8 +10,8 @@ + + / { + model = "Linksys WRT1200AC"; +- compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385", +- "marvell,armada380"; ++ compatible = "linksys,wrt1200ac", "linksys,caiman", "linksys,armada385", ++ "marvell,armada385", "marvell,armada380"; + }; + + &expander0 { +--- a/arch/arm/boot/dts/marvell/armada-385-linksys-shelby.dts ++++ b/arch/arm/boot/dts/marvell/armada-385-linksys-shelby.dts +@@ -10,7 +10,8 @@ + + / { + model = "Linksys WRT1900ACS"; +- compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385", ++ compatible = "linksys,wrt1900acs", "linksys,shelby", ++ "linksys,armada385", "marvell,armada385", + "marvell,armada380"; + }; + diff --git a/target/linux/mvebu/patches-6.6/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch b/target/linux/mvebu/patches-6.6/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch new file mode 100644 index 0000000000..5f84a34769 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch @@ -0,0 +1,87 @@ +From 8137da20701c776ad3481115305a5e8e410871ba Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Tue, 29 Nov 2016 10:15:45 +0000 +Subject: ARM: dts: armada388-clearfog: emmc on clearfog base + +Signed-off-by: Russell King +--- + .../arm/boot/dts/marvell/armada-388-clearfog-base.dts | 1 + + .../armada-38x-solidrun-microsom-emmc.dtsi | 62 +++++++++++++++++++ + 2 files changed, 63 insertions(+) + create mode 100644 arch/arm/boot/dts/marvell/armada-38x-solidrun-microsom-emmc.dtsi + +--- a/arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts ++++ b/arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts +@@ -7,6 +7,7 @@ + + /dts-v1/; + #include "armada-388-clearfog.dtsi" ++#include "armada-38x-solidrun-microsom-emmc.dtsi" + + / { + model = "SolidRun Clearfog Base A1"; +--- /dev/null ++++ b/arch/arm/boot/dts/marvell/armada-38x-solidrun-microsom-emmc.dtsi +@@ -0,0 +1,62 @@ ++/* ++ * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC ++ * ++ * Copyright (C) 2015 Russell King ++ * ++ * This board is in development; the contents of this file work with ++ * the A1 rev 2.0 of the board, which does not represent final ++ * production board. Things will change, don't expect this file to ++ * remain compatible info the future. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This file is distributed in the hope that it will be useful ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++/ { ++ soc { ++ internal-regs { ++ sdhci@d8000 { ++ bus-width = <4>; ++ no-1-8-v; ++ non-removable; ++ pinctrl-0 = <µsom_sdhci_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ wp-inverted; ++ }; ++ }; ++ }; ++}; diff --git a/target/linux/mvebu/patches-6.6/313-helios4-dts-status-led-alias.patch b/target/linux/mvebu/patches-6.6/313-helios4-dts-status-led-alias.patch new file mode 100644 index 0000000000..50b970aabb --- /dev/null +++ b/target/linux/mvebu/patches-6.6/313-helios4-dts-status-led-alias.patch @@ -0,0 +1,28 @@ +--- a/arch/arm/boot/dts/marvell/armada-388-helios4.dts ++++ b/arch/arm/boot/dts/marvell/armada-388-helios4.dts +@@ -15,6 +15,13 @@ + model = "Helios4"; + compatible = "kobol,helios4", "marvell,armada388", + "marvell,armada385", "marvell,armada380"; ++ ++ aliases { ++ led-boot = &led_status; ++ led-failsafe = &led_status; ++ led-running = &led_status; ++ led-upgrade = &led_status; ++ }; + + memory { + device_type = "memory"; +@@ -73,10 +80,9 @@ + pinctrl-names = "default"; + pinctrl-0 = <&helios_system_led_pins>; + +- status-led { ++ led_status: status-led { + label = "helios4:green:status"; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; +- linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + diff --git a/target/linux/mvebu/patches-6.6/314-arm64-dts-marvell-enable-heartbeat-LED-by-default.patch b/target/linux/mvebu/patches-6.6/314-arm64-dts-marvell-enable-heartbeat-LED-by-default.patch new file mode 100644 index 0000000000..7221e04de1 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/314-arm64-dts-marvell-enable-heartbeat-LED-by-default.patch @@ -0,0 +1,22 @@ +From: Tomasz Maciej Nowak +Date: Fri, 7 Jul 2023 19:06:05 +0200 +Subject: [PATCH] arm64: dts: marvell: enable heartbeat LED by default + +Some boards could be placed in an enclosure, so enable LED18 by default, +since that'll be the only visible indicator that the board is operating. + +Signed-off-by: Tomasz Maciej Nowak +--- + arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts ++++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts +@@ -25,6 +25,7 @@ + function = LED_FUNCTION_HEARTBEAT; + color = ; + linux,default-trigger = "heartbeat"; ++ default-state = "on"; + }; + }; + }; diff --git a/target/linux/mvebu/patches-6.6/315-armada-xp-linksys-mamba-resize-kernel.patch b/target/linux/mvebu/patches-6.6/315-armada-xp-linksys-mamba-resize-kernel.patch new file mode 100644 index 0000000000..d36fe7441c --- /dev/null +++ b/target/linux/mvebu/patches-6.6/315-armada-xp-linksys-mamba-resize-kernel.patch @@ -0,0 +1,37 @@ +From 258233f00bcd013050efee00c5d9128ef8cd62dd Mon Sep 17 00:00:00 2001 +From: Tad +Date: Fri, 5 Feb 2021 22:32:11 -0500 +Subject: [PATCH] ARM: dts: armada-xp-linksys-mamba: Increase kernel + partition to 4MB + +Signed-off-by: Tad Davanzo +--- + arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +@@ -454,9 +454,9 @@ + reg = <0xa00000 0x2800000>; /* 40MB */ + }; + +- partition@d00000 { ++ partition@e00000 { + label = "rootfs1"; +- reg = <0xd00000 0x2500000>; /* 37MB */ ++ reg = <0xe00000 0x2400000>; /* 36MB */ + }; + + /* kernel2 overlaps with rootfs2 by design */ +@@ -465,9 +465,9 @@ + reg = <0x3200000 0x2800000>; /* 40MB */ + }; + +- partition@3500000 { ++ partition@3600000 { + label = "rootfs2"; +- reg = <0x3500000 0x2500000>; /* 37MB */ ++ reg = <0x3600000 0x2400000>; /* 36MB */ + }; + + /* diff --git a/target/linux/mvebu/patches-6.6/316-armada-370-dts-fix-crypto-engine.patch b/target/linux/mvebu/patches-6.6/316-armada-370-dts-fix-crypto-engine.patch new file mode 100644 index 0000000000..653c2b0a18 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/316-armada-370-dts-fix-crypto-engine.patch @@ -0,0 +1,29 @@ +--- a/arch/arm/boot/dts/marvell/armada-370.dtsi ++++ b/arch/arm/boot/dts/marvell/armada-370.dtsi +@@ -254,7 +254,7 @@ + clocks = <&gateclk 23>; + clock-names = "cesa0"; + marvell,crypto-srams = <&crypto_sram>; +- marvell,crypto-sram-size = <0x7e0>; ++ marvell,crypto-sram-size = <0x800>; + }; + }; + +@@ -275,12 +275,17 @@ + * cpuidle workaround. + */ + idle-sram@0 { ++ status = "disabled"; + reg = <0x0 0x20>; + }; + }; + }; + }; + ++&coherencyfab { ++ broken-idle; ++}; ++ + /* + * Default UART pinctrl setting without RTS/CTS, can be overwritten on + * board level if a different configuration is used. diff --git a/target/linux/mvebu/patches-6.6/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch b/target/linux/mvebu/patches-6.6/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch new file mode 100644 index 0000000000..1f02ff74b0 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch @@ -0,0 +1,134 @@ +--- a/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts ++++ b/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts +@@ -31,6 +31,7 @@ + + chosen { + stdout-path = "serial0:115200n8"; ++ append-rootblock = "nullparameter="; /* override the bootloader args */ + }; + + memory@0 { +@@ -94,6 +95,8 @@ + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; ++ nvmem-cells = <&macaddr_vendor_0>; ++ nvmem-cell-names = "mac-address"; + }; + + sata@a0000 { +@@ -175,6 +178,24 @@ + phy1: ethernet-phy@1 { /* Marvell 88E1512 */ + reg = <1>; + }; ++ ++ virtual_flash { ++ compatible = "mtd-concat"; ++ ++ devices = <&mtd_kernel &mtd_gap &mtd_gap2>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ compatible = "openwrt,uimage", "denx,uimage"; ++ label = "firmware"; ++ reg = <0x0 0x0>; ++ }; ++ }; ++ }; + }; + + &pinctrl { +@@ -259,48 +280,52 @@ + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <20000000>; + +- /* +- * Warning! +- * +- * Synology u-boot uses its compiled-in environment +- * and it seems Synology did not care to change u-boot +- * default configuration in order to allow saving a +- * modified environment at a sensible location. So, +- * if you do a 'saveenv' under u-boot, your modified +- * environment will be saved at 1MB after the start +- * of the flash, i.e. in the middle of the uImage. +- * For that reason, it is strongly advised not to +- * change the default environment, unless you know +- * what you are doing. +- */ +- partition@0 { /* u-boot */ +- label = "RedBoot"; +- reg = <0x00000000 0x000c0000>; /* 768KB */ +- }; ++ partitions { ++ compatible = "fixed-partitions"; + +- partition@c0000 { /* uImage */ +- label = "zImage"; +- reg = <0x000c0000 0x002d0000>; /* 2880KB */ +- }; ++ partition@0 { /* u-boot */ ++ label = "u-boot"; ++ reg = <0x00000000 0x000c0000>; /* 768KB */ ++ read-only; ++ }; + +- partition@390000 { /* uInitramfs */ +- label = "rd.gz"; +- reg = <0x00390000 0x00440000>; /* 4250KB */ +- }; ++ mtd_gap: partition@c0000 { /* gap */ ++ label = "gap"; ++ reg = <0x000c0000 0x00040000>; /* 256KB */ ++ }; + +- partition@7d0000 { /* MAC address and serial number */ +- label = "vendor"; +- reg = <0x007d0000 0x00010000>; /* 64KB */ +- }; ++ partition@100000 { /* u-boot-env */ ++ label = "u-boot-env"; ++ reg = <0x00100000 0x00010000>; /* 64KB */ ++ }; + +- partition@7e0000 { +- label = "RedBoot config"; +- reg = <0x007e0000 0x00010000>; /* 64KB */ +- }; ++ mtd_kernel: partition@110000 { ++ label = "kernel"; ++ reg = <0x00110000 0x006c0000>; /* 6912KB */ ++ }; + +- partition@7f0000 { +- label = "FIS directory"; +- reg = <0x007f0000 0x00010000>; /* 64KB */ ++ partition@7d0000 { /* MAC address and serial number */ ++ reg = <0x007d0000 0x00010000>; /* 64KB */ ++ label = "vendor"; ++ read-only; ++ ++ compatible = "nvmem-cells"; ++ ++ nvmem-layout { ++ compatible = "fixed-layout"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ macaddr_vendor_0: macaddr@0 { ++ reg = <0x0 0x6>; ++ }; ++ }; ++ }; ++ ++ mtd_gap2: partition@7e0000 { ++ label = "gap2"; ++ reg = <0x007e0000 0x00020000>; /* 128KB */ ++ }; + }; + }; + }; diff --git a/target/linux/mvebu/patches-6.6/400-find_active_root.patch b/target/linux/mvebu/patches-6.6/400-find_active_root.patch new file mode 100644 index 0000000000..90164adcd4 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/400-find_active_root.patch @@ -0,0 +1,60 @@ +The WRT1900AC among other Linksys routers uses a dual-firmware layout. +Dynamically rename the active partition to "ubi". + +Signed-off-by: Imre Kaloz + +--- a/drivers/mtd/parsers/ofpart_core.c ++++ b/drivers/mtd/parsers/ofpart_core.c +@@ -38,6 +38,8 @@ static bool node_has_compatible(struct d + return of_get_property(pp, "compatible", NULL); + } + ++static int mangled_rootblock; ++ + static int parse_fixed_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +@@ -48,6 +50,7 @@ static int parse_fixed_partitions(struct + struct device_node *mtd_node; + struct device_node *ofpart_node; + const char *partname; ++ const char *owrtpart = "ubi"; + struct device_node *pp; + int nr_parts, i, ret = 0; + bool dedicated = true; +@@ -152,9 +155,13 @@ static int parse_fixed_partitions(struct + parts[i].size = of_read_number(reg + a_cells, s_cells); + parts[i].of_node = pp; + +- partname = of_get_property(pp, "label", &len); +- if (!partname) +- partname = of_get_property(pp, "name", &len); ++ if (mangled_rootblock && (i == mangled_rootblock)) { ++ partname = owrtpart; ++ } else { ++ partname = of_get_property(pp, "label", &len); ++ if (!partname) ++ partname = of_get_property(pp, "name", &len); ++ } + parts[i].name = partname; + + if (of_get_property(pp, "read-only", &len)) +@@ -271,6 +278,18 @@ static int __init ofpart_parser_init(voi + return 0; + } + ++static int __init active_root(char *str) ++{ ++ get_option(&str, &mangled_rootblock); ++ ++ if (!mangled_rootblock) ++ return 1; ++ ++ return 1; ++} ++ ++__setup("mangled_rootblock=", active_root); ++ + static void __exit ofpart_parser_exit(void) + { + deregister_mtd_parser(&ofpart_parser); diff --git a/target/linux/mvebu/patches-6.6/700-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-6.6/700-mvneta-tx-queue-workaround.patch new file mode 100644 index 0000000000..099281e048 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/700-mvneta-tx-queue-workaround.patch @@ -0,0 +1,43 @@ +From: Felix Fietkau +Subject: mvneta: tx queue workaround + +The hardware queue scheduling is apparently configured with fixed +priorities, which creates a nasty fairness issue where traffic from one +CPU can starve traffic from all other CPUs. + +Work around this issue by forcing all tx packets to go through one CPU, +until this issue is fixed properly. + +Ref: https://github.com/openwrt/openwrt/issues/5411 + +Signed-off-by: Felix Fietkau +--- +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -5294,6 +5294,16 @@ static int mvneta_setup_tc(struct net_de + } + } + ++#ifndef CONFIG_ARM64 ++static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb, ++ struct net_device *sb_dev) ++{ ++ /* XXX: hardware queue scheduling is broken, ++ * use only one queue until it is fixed */ ++ return 0; ++} ++#endif ++ + static const struct net_device_ops mvneta_netdev_ops = { + .ndo_open = mvneta_open, + .ndo_stop = mvneta_stop, +@@ -5304,6 +5314,9 @@ static const struct net_device_ops mvnet + .ndo_fix_features = mvneta_fix_features, + .ndo_get_stats64 = mvneta_get_stats64, + .ndo_eth_ioctl = mvneta_ioctl, ++#ifndef CONFIG_ARM64 ++ .ndo_select_queue = mvneta_select_queue, ++#endif + .ndo_bpf = mvneta_xdp, + .ndo_xdp_xmit = mvneta_xdp_xmit, + .ndo_setup_tc = mvneta_setup_tc, diff --git a/target/linux/mvebu/patches-6.6/701-mvpp2-read-mac-address-from-nvmem.patch b/target/linux/mvebu/patches-6.6/701-mvpp2-read-mac-address-from-nvmem.patch new file mode 100644 index 0000000000..c5bad1772f --- /dev/null +++ b/target/linux/mvebu/patches-6.6/701-mvpp2-read-mac-address-from-nvmem.patch @@ -0,0 +1,27 @@ +From: Tobias Schramm +Subject: mvpp2: support fetching mac address from nvmem + +The mvpp2 driver did not query nvmem for hardware mac addresses. This +patch adds querying of mac addresses stored in nvmem cells as a further +fallback option before assigning a random address. +Purposely added separately to fwnode_get_mac_address() above to maintain +existing behaviour with builtin adapter mac address still taking +precedence. + +Signed-off-by: Tobias Schramm +--- +--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c ++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +@@ -6153,6 +6153,12 @@ static int mvpp2_port_copy_mac_addr(stru + return 0; + } + ++ if (!of_get_mac_address(to_of_node(fwnode), hw_mac_addr)) { ++ *mac_from = "nvmem cell"; ++ eth_hw_addr_set(dev, hw_mac_addr); ++ return 0; ++ } ++ + *mac_from = "random"; + eth_hw_addr_random(dev); + diff --git a/target/linux/mvebu/patches-6.6/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch b/target/linux/mvebu/patches-6.6/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch new file mode 100644 index 0000000000..5df5aca5dc --- /dev/null +++ b/target/linux/mvebu/patches-6.6/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch @@ -0,0 +1,40 @@ +From c28b2d367da8a471482e6a4aa8337ab6369a80c2 Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Sat, 3 Oct 2015 09:13:05 +0100 +Subject: cpuidle: mvebu: indicate failure to enter deeper sleep states + +The cpuidle ->enter method expects the return value to be the sleep +state we entered. Returning negative numbers or other codes is not +permissible since coupled CPU idle was merged. + +At least some of the mvebu_v7_cpu_suspend() implementations return the +value from cpu_suspend(), which returns zero if the CPU vectors back +into the kernel via cpu_resume() (the success case), or the non-zero +return value of the suspend actor, or one (failure cases). + +We do not want to be returning the failure case value back to CPU idle +as that indicates that we successfully entered one of the deeper idle +states. Always return zero instead, indicating that we slept for the +shortest amount of time. + +Signed-off-by: Russell King +--- + drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/cpuidle/cpuidle-mvebu-v7.c ++++ b/drivers/cpuidle/cpuidle-mvebu-v7.c +@@ -42,8 +42,12 @@ static __cpuidle int mvebu_v7_enter_idle + + cpu_pm_exit(); + ++ /* ++ * If we failed to enter the desired state, indicate that we ++ * slept lightly. ++ */ + if (ret) +- return ret; ++ return 0; + + return index; + } diff --git a/target/linux/mvebu/patches-6.6/801-pci-mvebu-time-out-reset-on-link-up.patch b/target/linux/mvebu/patches-6.6/801-pci-mvebu-time-out-reset-on-link-up.patch new file mode 100644 index 0000000000..f1832c8940 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/801-pci-mvebu-time-out-reset-on-link-up.patch @@ -0,0 +1,60 @@ +From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Sat, 9 Jul 2016 10:58:16 +0100 +Subject: pci: mvebu: time out reset on link up + +If the port reports that the link is up while we are resetting, there's +little point in waiting for the full duration. + +Signed-off-by: Russell King +--- + drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++------ + 1 file changed, 14 insertions(+), 6 deletions(-) + +--- a/drivers/pci/controller/pci-mvebu.c ++++ b/drivers/pci/controller/pci-mvebu.c +@@ -1397,6 +1397,7 @@ static int mvebu_pcie_powerup(struct mve + + if (port->reset_gpio) { + u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000; ++ unsigned int i; + + of_property_read_u32(port->dn, "reset-delay-us", + &reset_udelay); +@@ -1404,7 +1405,13 @@ static int mvebu_pcie_powerup(struct mve + udelay(100); + + gpiod_set_value_cansleep(port->reset_gpio, 0); +- msleep(reset_udelay / 1000); ++ for (i = 0; i < reset_udelay; i += 1000) { ++ if (mvebu_pcie_link_up(port)) ++ break; ++ msleep(1); ++ } ++ ++ printk("%s: reset completed in %dus\n", port->name, i); + } + + return 0; +@@ -1521,15 +1528,16 @@ static int mvebu_pcie_probe(struct platf + if (!child) + continue; + +- ret = mvebu_pcie_powerup(port); +- if (ret < 0) +- continue; +- + port->base = mvebu_pcie_map_registers(pdev, child, port); + if (IS_ERR(port->base)) { + dev_err(dev, "%s: cannot map registers\n", port->name); + port->base = NULL; +- mvebu_pcie_powerdown(port); ++ continue; ++ } ++ ++ ret = mvebu_pcie_powerup(port); ++ if (ret < 0) { ++ port->base = NULL; + continue; + } + diff --git a/target/linux/mvebu/patches-6.6/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch b/target/linux/mvebu/patches-6.6/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch new file mode 100644 index 0000000000..e9c1d57d24 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch @@ -0,0 +1,218 @@ +From aa4a0ccc41997f2da172165c92803abace43bd1c Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:32 +0000 +Subject: [PATCH 1/7] dt-bindings: Add IEI vendor prefix and IEI WT61P803 + PUZZLE driver bindings + +Add the IEI WT61P803 PUZZLE Device Tree bindings for MFD, HWMON and LED +drivers. A new vendor prefix is also added accordingly for +IEI Integration Corp. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + .../hwmon/iei,wt61p803-puzzle-hwmon.yaml | 53 ++++++++++++ + .../leds/iei,wt61p803-puzzle-leds.yaml | 39 +++++++++ + .../bindings/mfd/iei,wt61p803-puzzle.yaml | 82 +++++++++++++++++++ + .../devicetree/bindings/vendor-prefixes.yaml | 2 + + 4 files changed, 176 insertions(+) + create mode 100644 Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml + create mode 100644 Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml + create mode 100644 Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml +@@ -0,0 +1,53 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: IEI WT61P803 PUZZLE MCU HWMON module from IEI Integration Corp. ++ ++maintainers: ++ - Luka Kovacic ++ ++description: | ++ This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details ++ see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. ++ ++ The HWMON module is a sub-node of the MCU node in the Device Tree. ++ ++properties: ++ compatible: ++ const: iei,wt61p803-puzzle-hwmon ++ ++ "#address-cells": ++ const: 1 ++ ++ "#size-cells": ++ const: 0 ++ ++patternProperties: ++ "^fan-group@[0-1]$": ++ type: object ++ properties: ++ reg: ++ minimum: 0 ++ maximum: 1 ++ description: ++ Fan group ID ++ ++ cooling-levels: ++ minItems: 1 ++ maxItems: 255 ++ description: ++ Cooling levels for the fans (PWM value mapping) ++ description: | ++ Properties for each fan group. ++ required: ++ - reg ++ ++required: ++ - compatible ++ - "#address-cells" ++ - "#size-cells" ++ ++additionalProperties: false +--- /dev/null ++++ b/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml +@@ -0,0 +1,39 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/leds/iei,wt61p803-puzzle-leds.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: IEI WT61P803 PUZZLE MCU LED module from IEI Integration Corp. ++ ++maintainers: ++ - Luka Kovacic ++ ++description: | ++ This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details ++ see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. ++ ++ The LED module is a sub-node of the MCU node in the Device Tree. ++ ++properties: ++ compatible: ++ const: iei,wt61p803-puzzle-leds ++ ++ "#address-cells": ++ const: 1 ++ ++ "#size-cells": ++ const: 0 ++ ++ led@0: ++ type: object ++ $ref: common.yaml ++ description: | ++ Properties for a single LED. ++ ++required: ++ - compatible ++ - "#address-cells" ++ - "#size-cells" ++ ++additionalProperties: false +--- /dev/null ++++ b/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml +@@ -0,0 +1,82 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/mfd/iei,wt61p803-puzzle.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: IEI WT61P803 PUZZLE MCU from IEI Integration Corp. ++ ++maintainers: ++ - Luka Kovacic ++ ++description: | ++ IEI WT61P803 PUZZLE MCU is embedded in some IEI Puzzle series boards. ++ It's used for controlling system power states, fans, LEDs and temperature ++ sensors. ++ ++ For Device Tree bindings of other sub-modules (HWMON, LEDs) refer to the ++ binding documents under the respective subsystem directories. ++ ++properties: ++ compatible: ++ const: iei,wt61p803-puzzle ++ ++ current-speed: ++ description: ++ Serial bus speed in bps ++ maxItems: 1 ++ ++ enable-beep: true ++ ++ hwmon: ++ $ref: /schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml ++ ++ leds: ++ $ref: /schemas/leds/iei,wt61p803-puzzle-leds.yaml ++ ++required: ++ - compatible ++ - current-speed ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ serial { ++ mcu { ++ compatible = "iei,wt61p803-puzzle"; ++ current-speed = <115200>; ++ enable-beep; ++ ++ leds { ++ compatible = "iei,wt61p803-puzzle-leds"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ function = LED_FUNCTION_POWER; ++ color = ; ++ }; ++ }; ++ ++ hwmon { ++ compatible = "iei,wt61p803-puzzle-hwmon"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ fan-group@0 { ++ #cooling-cells = <2>; ++ reg = <0x00>; ++ cooling-levels = <64 102 170 230 250>; ++ }; ++ ++ fan-group@1 { ++ #cooling-cells = <2>; ++ reg = <0x01>; ++ cooling-levels = <64 102 170 230 250>; ++ }; ++ }; ++ }; ++ }; +--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml ++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml +@@ -609,6 +609,8 @@ patternProperties: + description: IC Plus Corp. + "^idt,.*": + description: Integrated Device Technologies, Inc. ++ "^iei,.*": ++ description: IEI Integration Corp. + "^ifi,.*": + description: Ingenieurburo Fur Ic-Technologie (I/F/I) + "^ilitek,.*": diff --git a/target/linux/mvebu/patches-6.6/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch b/target/linux/mvebu/patches-6.6/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch new file mode 100644 index 0000000000..1046b15e4b --- /dev/null +++ b/target/linux/mvebu/patches-6.6/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch @@ -0,0 +1,1034 @@ +From 692cfa85272dd12995b427c0a7a585ced5d54f32 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:33 +0000 +Subject: [PATCH 2/7] drivers: mfd: Add a driver for IEI WT61P803 PUZZLE MCU + +Add a driver for the IEI WT61P803 PUZZLE microcontroller, used in some +IEI Puzzle series devices. The microcontroller controls system power, +temperature sensors, fans and LEDs. + +This driver implements the core functionality for device communication +over the system serial (serdev bus). It handles MCU messages and the +internal MCU properties. Some properties can be managed over sysfs. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + drivers/mfd/Kconfig | 9 + + drivers/mfd/Makefile | 1 + + drivers/mfd/iei-wt61p803-puzzle.c | 908 ++++++++++++++++++++++++ + include/linux/mfd/iei-wt61p803-puzzle.h | 66 ++ + 4 files changed, 984 insertions(+) + create mode 100644 drivers/mfd/iei-wt61p803-puzzle.c + create mode 100644 include/linux/mfd/iei-wt61p803-puzzle.h + +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -2274,6 +2274,15 @@ config SGI_MFD_IOC3 + If you have an SGI Origin, Octane, or a PCI IOC3 card, + then say Y. Otherwise say N. + ++config MFD_IEI_WT61P803_PUZZLE ++ tristate "IEI WT61P803 PUZZLE MCU driver" ++ depends on SERIAL_DEV_BUS ++ select MFD_CORE ++ help ++ IEI WT61P803 PUZZLE is a system power management microcontroller ++ used for fan control, temperature sensor reading, LED control ++ and system identification. ++ + config MFD_INTEL_M10_BMC_CORE + tristate + select MFD_CORE +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -244,6 +244,7 @@ obj-$(CONFIG_MFD_RT4831) += rt4831.o + obj-$(CONFIG_MFD_RT5033) += rt5033.o + obj-$(CONFIG_MFD_RT5120) += rt5120.o + obj-$(CONFIG_MFD_SKY81452) += sky81452.o ++obj-$(CONFIG_MFD_IEI_WT61P803_PUZZLE) += iei-wt61p803-puzzle.o + + obj-$(CONFIG_INTEL_SOC_PMIC) += intel_soc_pmic_crc.o + obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC) += intel_soc_pmic_bxtwc.o +--- /dev/null ++++ b/drivers/mfd/iei-wt61p803-puzzle.c +@@ -0,0 +1,908 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* IEI WT61P803 PUZZLE MCU Driver ++ * System management microcontroller for fan control, temperature sensor reading, ++ * LED control and system identification on IEI Puzzle series ARM-based appliances. ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* start, payload and XOR checksum at end */ ++#define IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH (1 + 20 + 1) ++#define IEI_WT61P803_PUZZLE_RESP_BUF_SIZE 512 ++ ++#define IEI_WT61P803_PUZZLE_MAC_LENGTH 17 ++#define IEI_WT61P803_PUZZLE_SN_LENGTH 36 ++#define IEI_WT61P803_PUZZLE_VERSION_LENGTH 6 ++#define IEI_WT61P803_PUZZLE_BUILD_INFO_LENGTH 16 ++#define IEI_WT61P803_PUZZLE_PROTOCOL_VERSION_LENGTH 8 ++#define IEI_WT61P803_PUZZLE_NB_MAC 8 ++ ++/* Use HZ as a timeout value throughout the driver */ ++#define IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT HZ ++ ++enum iei_wt61p803_puzzle_attribute_type { ++ IEI_WT61P803_PUZZLE_VERSION, ++ IEI_WT61P803_PUZZLE_BUILD_INFO, ++ IEI_WT61P803_PUZZLE_BOOTLOADER_MODE, ++ IEI_WT61P803_PUZZLE_PROTOCOL_VERSION, ++ IEI_WT61P803_PUZZLE_SERIAL_NUMBER, ++ IEI_WT61P803_PUZZLE_MAC_ADDRESS, ++ IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS, ++ IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY, ++ IEI_WT61P803_PUZZLE_POWER_STATUS, ++}; ++ ++struct iei_wt61p803_puzzle_device_attribute { ++ struct device_attribute dev_attr; ++ enum iei_wt61p803_puzzle_attribute_type type; ++ u8 index; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_mcu_status - MCU flags state ++ * @ac_recovery_status_flag: AC Recovery Status Flag ++ * @power_loss_recovery: System recovery after power loss ++ * @power_status: System Power-on Method ++ */ ++struct iei_wt61p803_puzzle_mcu_status { ++ u8 ac_recovery_status_flag; ++ u8 power_loss_recovery; ++ u8 power_status; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_reply - MCU reply ++ * @size: Size of the MCU reply ++ * @data: Full MCU reply buffer ++ * @state: Current state of the packet ++ * @received: Was the response fullfilled ++ */ ++struct iei_wt61p803_puzzle_reply { ++ size_t size; ++ unsigned char data[IEI_WT61P803_PUZZLE_RESP_BUF_SIZE]; ++ struct completion received; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_mcu_version - MCU version status ++ * @version: Primary firmware version ++ * @build_info: Build date and time ++ * @bootloader_mode: Status of the MCU operation ++ * @protocol_version: MCU communication protocol version ++ * @serial_number: Device factory serial number ++ * @mac_address: Device factory MAC addresses ++ * ++ * Last element of arrays is reserved for '\0'. ++ */ ++struct iei_wt61p803_puzzle_mcu_version { ++ char version[IEI_WT61P803_PUZZLE_VERSION_LENGTH + 1]; ++ char build_info[IEI_WT61P803_PUZZLE_BUILD_INFO_LENGTH + 1]; ++ bool bootloader_mode; ++ char protocol_version[IEI_WT61P803_PUZZLE_PROTOCOL_VERSION_LENGTH + 1]; ++ char serial_number[IEI_WT61P803_PUZZLE_SN_LENGTH + 1]; ++ char mac_address[IEI_WT61P803_PUZZLE_NB_MAC][IEI_WT61P803_PUZZLE_MAC_LENGTH + 1]; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle - IEI WT61P803 PUZZLE MCU Driver ++ * @serdev: Pointer to underlying serdev device ++ * @dev: Pointer to underlying dev device ++ * @reply_lock: Reply mutex lock ++ * @reply: Pointer to the iei_wt61p803_puzzle_reply struct ++ * @version: MCU version related data ++ * @status: MCU status related data ++ * @response_buffer Command response buffer allocation ++ * @lock General member mutex lock ++ */ ++struct iei_wt61p803_puzzle { ++ struct serdev_device *serdev; ++ struct device *dev; ++ struct mutex reply_lock; /* lock to prevent multiple firmware calls */ ++ struct iei_wt61p803_puzzle_reply *reply; ++ struct iei_wt61p803_puzzle_mcu_version version; ++ struct iei_wt61p803_puzzle_mcu_status status; ++ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ struct mutex lock; /* lock to protect response buffer */ ++}; ++ ++static unsigned char iei_wt61p803_puzzle_checksum(unsigned char *buf, size_t len) ++{ ++ unsigned char checksum = 0; ++ size_t i; ++ ++ for (i = 0; i < len; i++) ++ checksum ^= buf[i]; ++ return checksum; ++} ++ ++static int iei_wt61p803_puzzle_process_resp(struct iei_wt61p803_puzzle *mcu, ++ const unsigned char *raw_resp_data, size_t size) ++{ ++ unsigned char checksum; ++ ++ /* Check the incoming frame header */ ++ if (!(raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START || ++ raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER || ++ (raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM && ++ raw_resp_data[1] == IEI_WT61P803_PUZZLE_CMD_EEPROM_READ))) { ++ if (mcu->reply->size + size >= sizeof(mcu->reply->data)) ++ return -EIO; ++ ++ /* Append the frame to existing data */ ++ memcpy(mcu->reply->data + mcu->reply->size, raw_resp_data, size); ++ mcu->reply->size += size; ++ } else { ++ if (size >= sizeof(mcu->reply->data)) ++ return -EIO; ++ ++ /* Start processing a new frame */ ++ memcpy(mcu->reply->data, raw_resp_data, size); ++ mcu->reply->size = size; ++ } ++ ++ checksum = iei_wt61p803_puzzle_checksum(mcu->reply->data, mcu->reply->size - 1); ++ if (checksum != mcu->reply->data[mcu->reply->size - 1]) { ++ /* The checksum isn't matched yet, wait for new frames */ ++ return size; ++ } ++ ++ /* Received all the data */ ++ complete(&mcu->reply->received); ++ ++ return size; ++} ++ ++static int iei_wt61p803_puzzle_recv_buf(struct serdev_device *serdev, ++ const unsigned char *data, size_t size) ++{ ++ struct iei_wt61p803_puzzle *mcu = serdev_device_get_drvdata(serdev); ++ int ret; ++ ++ ret = iei_wt61p803_puzzle_process_resp(mcu, data, size); ++ /* Return the number of processed bytes if function returns error, ++ * discard the remaining incoming data, since the frame this data ++ * belongs to is broken anyway ++ */ ++ if (ret < 0) ++ return size; ++ ++ return ret; ++} ++ ++static const struct serdev_device_ops iei_wt61p803_puzzle_serdev_device_ops = { ++ .receive_buf = iei_wt61p803_puzzle_recv_buf, ++ .write_wakeup = serdev_device_write_wakeup, ++}; ++ ++/** ++ * iei_wt61p803_puzzle_write_command_watchdog() - Watchdog of the normal cmd ++ * @mcu: Pointer to the iei_wt61p803_puzzle core MFD struct ++ * @cmd: Pointer to the char array to send (size should be content + 1 (xor)) ++ * @size: Size of the cmd char array ++ * @reply_data: Pointer to the reply/response data array (should be allocated) ++ * @reply_size: Pointer to size_t (size of reply_data) ++ * @retry_count: Number of times to retry sending the command to the MCU ++ */ ++int iei_wt61p803_puzzle_write_command_watchdog(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, ++ size_t *reply_size, int retry_count) ++{ ++ struct device *dev = &mcu->serdev->dev; ++ int ret, i; ++ ++ for (i = 0; i < retry_count; i++) { ++ ret = iei_wt61p803_puzzle_write_command(mcu, cmd, size, ++ reply_data, reply_size); ++ if (ret != -ETIMEDOUT) ++ return ret; ++ } ++ ++ dev_err(dev, "Command response timed out. Retries: %d\n", retry_count); ++ ++ return -ETIMEDOUT; ++} ++EXPORT_SYMBOL_GPL(iei_wt61p803_puzzle_write_command_watchdog); ++ ++/** ++ * iei_wt61p803_puzzle_write_command() - Send a structured command to the MCU ++ * @mcu: Pointer to the iei_wt61p803_puzzle core MFD struct ++ * @cmd: Pointer to the char array to send (size should be content + 1 (xor)) ++ * @size: Size of the cmd char array ++ * @reply_data: Pointer to the reply/response data array (should be allocated) ++ * ++ * Sends a structured command to the MCU. ++ */ ++int iei_wt61p803_puzzle_write_command(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, ++ size_t *reply_size) ++{ ++ struct device *dev = &mcu->serdev->dev; ++ int ret; ++ ++ if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH) ++ return -EINVAL; ++ ++ mutex_lock(&mcu->reply_lock); ++ ++ cmd[size - 1] = iei_wt61p803_puzzle_checksum(cmd, size - 1); ++ ++ /* Initialize reply struct */ ++ reinit_completion(&mcu->reply->received); ++ mcu->reply->size = 0; ++ usleep_range(2000, 10000); ++ serdev_device_write_flush(mcu->serdev); ++ ret = serdev_device_write_buf(mcu->serdev, cmd, size); ++ if (ret < 0) ++ goto exit; ++ ++ serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ ret = wait_for_completion_timeout(&mcu->reply->received, ++ IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ if (ret == 0) { ++ dev_err(dev, "Command reply receive timeout\n"); ++ ret = -ETIMEDOUT; ++ goto exit; ++ } ++ ++ *reply_size = mcu->reply->size; ++ /* Copy the received data, as it will not be available after a new frame is received */ ++ memcpy(reply_data, mcu->reply->data, mcu->reply->size); ++ ret = 0; ++exit: ++ mutex_unlock(&mcu->reply_lock); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(iei_wt61p803_puzzle_write_command); ++ ++static int iei_wt61p803_puzzle_buzzer(struct iei_wt61p803_puzzle *mcu, bool long_beep) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char buzzer_cmd[4] = {}; ++ size_t reply_size; ++ int ret; ++ ++ buzzer_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ buzzer_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_SINGLE; ++ buzzer_cmd[2] = long_beep ? '3' : '2'; /* Buzzer 1.5 / 0.5 second beep */ ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, buzzer_cmd, sizeof(buzzer_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EPROTO; ++ goto exit; ++ } ++exit: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_version(struct iei_wt61p803_puzzle *mcu) ++{ ++ unsigned char version_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_VERSION, ++ }; ++ unsigned char build_info_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_BUILD, ++ }; ++ unsigned char bootloader_mode_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_BOOTLOADER_MODE, ++ }; ++ unsigned char protocol_version_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_PROTOCOL_VERSION, ++ }; ++ unsigned char *rb = mcu->response_buffer; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, version_cmd, sizeof(version_cmd), ++ rb, &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 7) { ++ ret = -EIO; ++ goto err; ++ } ++ sprintf(mcu->version.version, "v%c.%.3s", rb[2], &rb[3]); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, build_info_cmd, ++ sizeof(build_info_cmd), rb, ++ &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 15) { ++ ret = -EIO; ++ goto err; ++ } ++ sprintf(mcu->version.build_info, "%c%c/%c%c/%.4s %c%c:%c%c", ++ rb[8], rb[9], rb[6], rb[7], &rb[2], rb[10], rb[11], ++ rb[12], rb[13]); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, bootloader_mode_cmd, ++ sizeof(bootloader_mode_cmd), rb, ++ &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 4) { ++ ret = -EIO; ++ goto err; ++ } ++ if (rb[2] == IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_APPS) ++ mcu->version.bootloader_mode = false; ++ else if (rb[2] == IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_BOOTLOADER) ++ mcu->version.bootloader_mode = true; ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, protocol_version_cmd, ++ sizeof(protocol_version_cmd), rb, ++ &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 9) { ++ ret = -EIO; ++ goto err; ++ } ++ sprintf(mcu->version.protocol_version, "v%c.%c%c%c%c%c", ++ rb[7], rb[6], rb[5], rb[4], rb[3], rb[2]); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_mcu_status(struct iei_wt61p803_puzzle *mcu) ++{ ++ unsigned char mcu_status_cmd[5] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START, ++ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS, ++ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS, ++ }; ++ unsigned char *resp_buf = mcu->response_buffer; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, mcu_status_cmd, sizeof(mcu_status_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto exit; ++ if (reply_size < 20) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ /* Response format: ++ * (IDX RESPONSE) ++ * 0 @ ++ * 1 O ++ * 2 S ++ * 3 S ++ * ... ++ * 5 AC Recovery Status Flag ++ * ... ++ * 10 Power Loss Recovery ++ * ... ++ * 19 Power Status (system power on method) ++ * 20 XOR checksum ++ */ ++ if (resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS && ++ resp_buf[3] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS) { ++ mcu->status.ac_recovery_status_flag = resp_buf[5]; ++ mcu->status.power_loss_recovery = resp_buf[10]; ++ mcu->status.power_status = resp_buf[19]; ++ } ++exit: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_serial_number(struct iei_wt61p803_puzzle *mcu) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char serial_number_cmd[5] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_READ, ++ 0x00, /* EEPROM read address */ ++ 0x24, /* Data length */ ++ }; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, serial_number_cmd, ++ sizeof(serial_number_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ ++ if (reply_size < IEI_WT61P803_PUZZLE_SN_LENGTH + 4) { ++ ret = -EIO; ++ goto err; ++ } ++ ++ sprintf(mcu->version.serial_number, "%.*s", ++ IEI_WT61P803_PUZZLE_SN_LENGTH, resp_buf + 4); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_write_serial_number(struct iei_wt61p803_puzzle *mcu, ++ unsigned char serial_number[36]) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char serial_number_header[4] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE, ++ 0x00, /* EEPROM write address */ ++ 0xC, /* Data length */ ++ }; ++ unsigned char serial_number_cmd[4 + 12 + 1]; /* header, serial number, XOR checksum */ ++ int ret, sn_counter; ++ size_t reply_size; ++ ++ /* The MCU can only handle 22 byte messages, send the S/N in 12 byte chunks */ ++ mutex_lock(&mcu->lock); ++ for (sn_counter = 0; sn_counter < 3; sn_counter++) { ++ serial_number_header[2] = 0x0 + 0xC * sn_counter; ++ ++ memcpy(serial_number_cmd, serial_number_header, sizeof(serial_number_header)); ++ memcpy(serial_number_cmd + sizeof(serial_number_header), ++ serial_number + 0xC * sn_counter, 0xC); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, serial_number_cmd, ++ sizeof(serial_number_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto err; ++ } ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EPROTO; ++ goto err; ++ } ++ } ++ ++ sprintf(mcu->version.serial_number, "%.*s", ++ IEI_WT61P803_PUZZLE_SN_LENGTH, serial_number); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_mac_address(struct iei_wt61p803_puzzle *mcu, int index) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char mac_address_cmd[5] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_READ, ++ 0x00, /* EEPROM read address */ ++ 0x11, /* Data length */ ++ }; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ mac_address_cmd[2] = 0x24 + 0x11 * index; ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, mac_address_cmd, ++ sizeof(mac_address_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ ++ if (reply_size < 22) { ++ ret = -EIO; ++ goto err; ++ } ++ ++ sprintf(mcu->version.mac_address[index], "%.*s", ++ IEI_WT61P803_PUZZLE_MAC_LENGTH, resp_buf + 4); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int ++iei_wt61p803_puzzle_write_mac_address(struct iei_wt61p803_puzzle *mcu, ++ unsigned char mac_address[IEI_WT61P803_PUZZLE_MAC_LENGTH], ++ int mac_address_idx) ++{ ++ unsigned char mac_address_cmd[4 + IEI_WT61P803_PUZZLE_MAC_LENGTH + 1]; ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char mac_address_header[4] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE, ++ 0x00, /* EEPROM write address */ ++ 0x11, /* Data length */ ++ }; ++ size_t reply_size; ++ int ret; ++ ++ if (mac_address_idx < 0 || mac_address_idx >= IEI_WT61P803_PUZZLE_NB_MAC) ++ return -EINVAL; ++ ++ mac_address_header[2] = 0x24 + 0x11 * mac_address_idx; ++ ++ /* Concat mac_address_header, mac_address to mac_address_cmd */ ++ memcpy(mac_address_cmd, mac_address_header, sizeof(mac_address_header)); ++ memcpy(mac_address_cmd + sizeof(mac_address_header), mac_address, ++ IEI_WT61P803_PUZZLE_MAC_LENGTH); ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, mac_address_cmd, ++ sizeof(mac_address_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto err; ++ } ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EPROTO; ++ goto err; ++ } ++ ++ sprintf(mcu->version.mac_address[mac_address_idx], "%.*s", ++ IEI_WT61P803_PUZZLE_MAC_LENGTH, mac_address); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_write_power_loss_recovery(struct iei_wt61p803_puzzle *mcu, ++ int power_loss_recovery_action) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char power_loss_recovery_cmd[5] = {}; ++ size_t reply_size; ++ int ret; ++ ++ if (power_loss_recovery_action < 0 || power_loss_recovery_action > 4) ++ return -EINVAL; ++ ++ power_loss_recovery_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ power_loss_recovery_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER; ++ power_loss_recovery_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS; ++ power_loss_recovery_cmd[3] = hex_asc[power_loss_recovery_action]; ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, power_loss_recovery_cmd, ++ sizeof(power_loss_recovery_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto exit; ++ mcu->status.power_loss_recovery = power_loss_recovery_action; ++exit: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++#define to_puzzle_dev_attr(_attr) \ ++ container_of(_attr, struct iei_wt61p803_puzzle_device_attribute, dev_attr) ++ ++static ssize_t show_output(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); ++ struct iei_wt61p803_puzzle_device_attribute *pattr = to_puzzle_dev_attr(attr); ++ int ret; ++ ++ switch (pattr->type) { ++ case IEI_WT61P803_PUZZLE_VERSION: ++ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.version); ++ case IEI_WT61P803_PUZZLE_BUILD_INFO: ++ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.build_info); ++ case IEI_WT61P803_PUZZLE_BOOTLOADER_MODE: ++ return scnprintf(buf, PAGE_SIZE, "%d\n", mcu->version.bootloader_mode); ++ case IEI_WT61P803_PUZZLE_PROTOCOL_VERSION: ++ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.protocol_version); ++ case IEI_WT61P803_PUZZLE_SERIAL_NUMBER: ++ ret = iei_wt61p803_puzzle_get_serial_number(mcu); ++ if (!ret) ++ ret = scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.serial_number); ++ else ++ ret = 0; ++ return ret; ++ case IEI_WT61P803_PUZZLE_MAC_ADDRESS: ++ ret = iei_wt61p803_puzzle_get_mac_address(mcu, pattr->index); ++ if (!ret) ++ ret = scnprintf(buf, PAGE_SIZE, "%s\n", ++ mcu->version.mac_address[pattr->index]); ++ else ++ ret = 0; ++ return ret; ++ case IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS: ++ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: ++ case IEI_WT61P803_PUZZLE_POWER_STATUS: ++ ret = iei_wt61p803_puzzle_get_mcu_status(mcu); ++ if (ret) ++ return ret; ++ ++ mutex_lock(&mcu->lock); ++ switch (pattr->type) { ++ case IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS: ++ ret = scnprintf(buf, PAGE_SIZE, "%x\n", ++ mcu->status.ac_recovery_status_flag); ++ break; ++ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: ++ ret = scnprintf(buf, PAGE_SIZE, "%x\n", mcu->status.power_loss_recovery); ++ break; ++ case IEI_WT61P803_PUZZLE_POWER_STATUS: ++ ret = scnprintf(buf, PAGE_SIZE, "%x\n", mcu->status.power_status); ++ break; ++ default: ++ ret = 0; ++ break; ++ } ++ mutex_unlock(&mcu->lock); ++ return ret; ++ default: ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static ssize_t store_output(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t len) ++{ ++ unsigned char serial_number[IEI_WT61P803_PUZZLE_SN_LENGTH]; ++ unsigned char mac_address[IEI_WT61P803_PUZZLE_MAC_LENGTH]; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); ++ struct iei_wt61p803_puzzle_device_attribute *pattr = to_puzzle_dev_attr(attr); ++ int power_loss_recovery_action = 0; ++ int ret; ++ ++ switch (pattr->type) { ++ case IEI_WT61P803_PUZZLE_SERIAL_NUMBER: ++ if (len != (size_t)(IEI_WT61P803_PUZZLE_SN_LENGTH + 1)) ++ return -EINVAL; ++ memcpy(serial_number, buf, sizeof(serial_number)); ++ ret = iei_wt61p803_puzzle_write_serial_number(mcu, serial_number); ++ if (ret) ++ return ret; ++ return len; ++ case IEI_WT61P803_PUZZLE_MAC_ADDRESS: ++ if (len != (size_t)(IEI_WT61P803_PUZZLE_MAC_LENGTH + 1)) ++ return -EINVAL; ++ ++ memcpy(mac_address, buf, sizeof(mac_address)); ++ ++ if (strlen(attr->attr.name) != 13) ++ return -EIO; ++ ++ ret = iei_wt61p803_puzzle_write_mac_address(mcu, mac_address, pattr->index); ++ if (ret) ++ return ret; ++ return len; ++ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: ++ ret = kstrtoint(buf, 10, &power_loss_recovery_action); ++ if (ret) ++ return ret; ++ ret = iei_wt61p803_puzzle_write_power_loss_recovery(mcu, ++ power_loss_recovery_action); ++ if (ret) ++ return ret; ++ return len; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++#define IEI_WT61P803_PUZZLE_ATTR(_name, _mode, _show, _store, _type, _index) \ ++ struct iei_wt61p803_puzzle_device_attribute dev_attr_##_name = \ ++ { .dev_attr = __ATTR(_name, _mode, _show, _store), \ ++ .type = _type, \ ++ .index = _index } ++ ++#define IEI_WT61P803_PUZZLE_ATTR_RO(_name, _type, _id) \ ++ IEI_WT61P803_PUZZLE_ATTR(_name, 0444, show_output, NULL, _type, _id) ++ ++#define IEI_WT61P803_PUZZLE_ATTR_RW(_name, _type, _id) \ ++ IEI_WT61P803_PUZZLE_ATTR(_name, 0644, show_output, store_output, _type, _id) ++ ++static IEI_WT61P803_PUZZLE_ATTR_RO(version, IEI_WT61P803_PUZZLE_VERSION, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(build_info, IEI_WT61P803_PUZZLE_BUILD_INFO, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(bootloader_mode, IEI_WT61P803_PUZZLE_BOOTLOADER_MODE, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(protocol_version, IEI_WT61P803_PUZZLE_PROTOCOL_VERSION, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(serial_number, IEI_WT61P803_PUZZLE_SERIAL_NUMBER, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_0, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_1, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 1); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_2, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 2); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_3, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 3); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_4, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 4); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_5, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 5); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_6, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 6); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_7, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 7); ++static IEI_WT61P803_PUZZLE_ATTR_RO(ac_recovery_status, IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(power_loss_recovery, IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(power_status, IEI_WT61P803_PUZZLE_POWER_STATUS, 0); ++ ++static struct attribute *iei_wt61p803_puzzle_attrs[] = { ++ &dev_attr_version.dev_attr.attr, ++ &dev_attr_build_info.dev_attr.attr, ++ &dev_attr_bootloader_mode.dev_attr.attr, ++ &dev_attr_protocol_version.dev_attr.attr, ++ &dev_attr_serial_number.dev_attr.attr, ++ &dev_attr_mac_address_0.dev_attr.attr, ++ &dev_attr_mac_address_1.dev_attr.attr, ++ &dev_attr_mac_address_2.dev_attr.attr, ++ &dev_attr_mac_address_3.dev_attr.attr, ++ &dev_attr_mac_address_4.dev_attr.attr, ++ &dev_attr_mac_address_5.dev_attr.attr, ++ &dev_attr_mac_address_6.dev_attr.attr, ++ &dev_attr_mac_address_7.dev_attr.attr, ++ &dev_attr_ac_recovery_status.dev_attr.attr, ++ &dev_attr_power_loss_recovery.dev_attr.attr, ++ &dev_attr_power_status.dev_attr.attr, ++ NULL ++}; ++ATTRIBUTE_GROUPS(iei_wt61p803_puzzle); ++ ++static int iei_wt61p803_puzzle_sysfs_create(struct device *dev, ++ struct iei_wt61p803_puzzle *mcu) ++{ ++ int ret; ++ ++ ret = sysfs_create_groups(&mcu->dev->kobj, iei_wt61p803_puzzle_groups); ++ if (ret) ++ mfd_remove_devices(mcu->dev); ++ ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_sysfs_remove(struct device *dev, ++ struct iei_wt61p803_puzzle *mcu) ++{ ++ /* Remove sysfs groups */ ++ sysfs_remove_groups(&mcu->dev->kobj, iei_wt61p803_puzzle_groups); ++ mfd_remove_devices(mcu->dev); ++ ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_probe(struct serdev_device *serdev) ++{ ++ struct device *dev = &serdev->dev; ++ struct iei_wt61p803_puzzle *mcu; ++ u32 baud; ++ int ret; ++ ++ /* Read the baud rate from 'current-speed', because the MCU supports different rates */ ++ if (device_property_read_u32(dev, "current-speed", &baud)) { ++ dev_err(dev, ++ "'current-speed' is not specified in device node\n"); ++ return -EINVAL; ++ } ++ dev_dbg(dev, "Driver baud rate: %d\n", baud); ++ ++ /* Allocate the memory */ ++ mcu = devm_kzalloc(dev, sizeof(*mcu), GFP_KERNEL); ++ if (!mcu) ++ return -ENOMEM; ++ ++ mcu->reply = devm_kzalloc(dev, sizeof(*mcu->reply), GFP_KERNEL); ++ if (!mcu->reply) ++ return -ENOMEM; ++ ++ /* Initialize device struct data */ ++ mcu->serdev = serdev; ++ mcu->dev = dev; ++ init_completion(&mcu->reply->received); ++ mutex_init(&mcu->reply_lock); ++ mutex_init(&mcu->lock); ++ ++ /* Setup UART interface */ ++ serdev_device_set_drvdata(serdev, mcu); ++ serdev_device_set_client_ops(serdev, &iei_wt61p803_puzzle_serdev_device_ops); ++ ret = devm_serdev_device_open(dev, serdev); ++ if (ret) ++ return ret; ++ serdev_device_set_baudrate(serdev, baud); ++ serdev_device_set_flow_control(serdev, false); ++ ret = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE); ++ if (ret) { ++ dev_err(dev, "Failed to set parity\n"); ++ return ret; ++ } ++ ++ ret = iei_wt61p803_puzzle_get_version(mcu); ++ if (ret) ++ return ret; ++ ++ dev_dbg(dev, "MCU version: %s\n", mcu->version.version); ++ dev_dbg(dev, "MCU firmware build info: %s\n", mcu->version.build_info); ++ dev_dbg(dev, "MCU in bootloader mode: %s\n", ++ mcu->version.bootloader_mode ? "true" : "false"); ++ dev_dbg(dev, "MCU protocol version: %s\n", mcu->version.protocol_version); ++ ++ if (device_property_read_bool(dev, "enable-beep")) { ++ ret = iei_wt61p803_puzzle_buzzer(mcu, false); ++ if (ret) ++ return ret; ++ } ++ ++ ret = iei_wt61p803_puzzle_sysfs_create(dev, mcu); ++ if (ret) ++ return ret; ++ ++ return devm_of_platform_populate(dev); ++} ++ ++static void iei_wt61p803_puzzle_remove(struct serdev_device *serdev) ++{ ++ struct device *dev = &serdev->dev; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); ++ ++ iei_wt61p803_puzzle_sysfs_remove(dev, mcu); ++} ++ ++static const struct of_device_id iei_wt61p803_puzzle_dt_ids[] = { ++ { .compatible = "iei,wt61p803-puzzle" }, ++ { } ++}; ++ ++MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_dt_ids); ++ ++static struct serdev_device_driver iei_wt61p803_puzzle_drv = { ++ .probe = iei_wt61p803_puzzle_probe, ++ .remove = iei_wt61p803_puzzle_remove, ++ .driver = { ++ .name = "iei-wt61p803-puzzle", ++ .of_match_table = iei_wt61p803_puzzle_dt_ids, ++ }, ++}; ++ ++module_serdev_device_driver(iei_wt61p803_puzzle_drv); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Luka Kovacic "); ++MODULE_DESCRIPTION("IEI WT61P803 PUZZLE MCU Driver"); +--- /dev/null ++++ b/include/linux/mfd/iei-wt61p803-puzzle.h +@@ -0,0 +1,66 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* IEI WT61P803 PUZZLE MCU Driver ++ * System management microcontroller for fan control, temperature sensor reading, ++ * LED control and system identification on IEI Puzzle series ARM-based appliances. ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#ifndef _MFD_IEI_WT61P803_PUZZLE_H_ ++#define _MFD_IEI_WT61P803_PUZZLE_H_ ++ ++#define IEI_WT61P803_PUZZLE_BUF_SIZE 512 ++ ++/* Command magic numbers */ ++#define IEI_WT61P803_PUZZLE_CMD_HEADER_START 0x40 /* @ */ ++#define IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER 0x25 /* % */ ++#define IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM 0xF7 ++ ++#define IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK 0x30 /* 0 */ ++#define IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK 0x70 ++ ++#define IEI_WT61P803_PUZZLE_CMD_EEPROM_READ 0xA1 ++#define IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE 0xA0 ++ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_VERSION 0x56 /* V */ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_BUILD 0x42 /* B */ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_BOOTLOADER_MODE 0x4D /* M */ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_BOOTLOADER 0x30 ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_APPS 0x31 ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_PROTOCOL_VERSION 0x50 /* P */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_SINGLE 0x43 /* C */ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER 0x4F /* O */ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS 0x53 /* S */ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS 0x41 /* A */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_LED 0x52 /* R */ ++#define IEI_WT61P803_PUZZLE_CMD_LED_POWER 0x31 /* 1 */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_TEMP 0x54 /* T */ ++#define IEI_WT61P803_PUZZLE_CMD_TEMP_ALL 0x41 /* A */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_FAN 0x46 /* F */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ 0x5A /* Z */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_WRITE 0x57 /* W */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_BASE 0x30 ++#define IEI_WT61P803_PUZZLE_CMD_FAN_RPM_BASE 0x41 /* A */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM(x) (IEI_WT61P803_PUZZLE_CMD_FAN_PWM_BASE + (x)) /* 0 - 1 */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_RPM(x) (IEI_WT61P803_PUZZLE_CMD_FAN_RPM_BASE + (x)) /* 0 - 5 */ ++ ++struct iei_wt61p803_puzzle_mcu_version; ++struct iei_wt61p803_puzzle_reply; ++struct iei_wt61p803_puzzle; ++ ++int iei_wt61p803_puzzle_write_command_watchdog(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, size_t *reply_size, ++ int retry_count); ++ ++int iei_wt61p803_puzzle_write_command(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, size_t *reply_size); ++ ++#endif /* _MFD_IEI_WT61P803_PUZZLE_H_ */ diff --git a/target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch b/target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch new file mode 100644 index 0000000000..d4a533917b --- /dev/null +++ b/target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch @@ -0,0 +1,501 @@ +From e3310a638cd310bfd93dbbc6d2732ab6aea18dd2 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:34 +0000 +Subject: [PATCH 3/7] drivers: hwmon: Add the IEI WT61P803 PUZZLE HWMON driver + +Add the IEI WT61P803 PUZZLE HWMON driver, that handles the fan speed +control via PWM, reading fan speed and reading on-board temperature +sensors. + +The driver registers a HWMON device and a simple thermal cooling device to +enable in-kernel fan management. + +This driver depends on the IEI WT61P803 PUZZLE MFD driver. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Acked-by: Guenter Roeck +Cc: Luka Perkov +Cc: Robert Marko +--- + drivers/hwmon/Kconfig | 8 + + drivers/hwmon/Makefile | 1 + + drivers/hwmon/iei-wt61p803-puzzle-hwmon.c | 445 ++++++++++++++++++++++ + 3 files changed, 454 insertions(+) + create mode 100644 drivers/hwmon/iei-wt61p803-puzzle-hwmon.c + +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -783,6 +783,14 @@ config SENSORS_IBMPOWERNV + This driver can also be built as a module. If so, the module + will be called ibmpowernv. + ++config SENSORS_IEI_WT61P803_PUZZLE_HWMON ++ tristate "IEI WT61P803 PUZZLE MFD HWMON Driver" ++ depends on MFD_IEI_WT61P803_PUZZLE ++ help ++ The IEI WT61P803 PUZZLE MFD HWMON Driver handles reading fan speed ++ and writing fan PWM values. It also supports reading on-board ++ temperature sensors. ++ + config SENSORS_IIO_HWMON + tristate "Hwmon driver that uses channels specified via iio maps" + depends on IIO +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -90,6 +90,7 @@ obj-$(CONFIG_SENSORS_HS3001) += hs3001.o + obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o + obj-$(CONFIG_SENSORS_I5500) += i5500_temp.o + obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o ++obj-$(CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON) += iei-wt61p803-puzzle-hwmon.o + obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o + obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o + obj-$(CONFIG_SENSORS_IBMPOWERNV)+= ibmpowernv.o +--- /dev/null ++++ b/drivers/hwmon/iei-wt61p803-puzzle-hwmon.c +@@ -0,0 +1,445 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* IEI WT61P803 PUZZLE MCU HWMON Driver ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define IEI_WT61P803_PUZZLE_HWMON_MAX_PWM 2 ++#define IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL 255 ++ ++/** ++ * struct iei_wt61p803_puzzle_thermal_cooling_device - Thermal cooling device instance ++ * @mcu_hwmon: Parent driver struct pointer ++ * @tcdev: Thermal cooling device pointer ++ * @name: Thermal cooling device name ++ * @pwm_channel: Controlled PWM channel (0 or 1) ++ * @cooling_levels: Thermal cooling device cooling levels (DT) ++ * @cur_level: Current cooling level ++ * @num_levels: Number of cooling levels ++ */ ++struct iei_wt61p803_puzzle_thermal_cooling_device { ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon; ++ struct thermal_cooling_device *tcdev; ++ char name[THERMAL_NAME_LENGTH]; ++ int pwm_channel; ++ u32 *cooling_levels; ++ int cur_level; ++ u8 num_levels; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_hwmon - MCU HWMON Driver ++ * @mcu: MCU struct pointer ++ * @response_buffer Global MCU response buffer ++ * @thermal_cooling_dev_present: Per-channel thermal cooling device control indicator ++ * @cdev: Per-channel thermal cooling device private structure ++ */ ++struct iei_wt61p803_puzzle_hwmon { ++ struct iei_wt61p803_puzzle *mcu; ++ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ bool thermal_cooling_dev_present[IEI_WT61P803_PUZZLE_HWMON_MAX_PWM]; ++ struct iei_wt61p803_puzzle_thermal_cooling_device ++ *cdev[IEI_WT61P803_PUZZLE_HWMON_MAX_PWM]; ++ struct mutex lock; /* mutex to protect response_buffer array */ ++}; ++ ++#define raw_temp_to_milidegree_celsius(x) (((x) - 0x80) * 1000) ++static int iei_wt61p803_puzzle_read_temp_sensor(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long *value) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char temp_sensor_ntc_cmd[4] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START, ++ IEI_WT61P803_PUZZLE_CMD_TEMP, ++ IEI_WT61P803_PUZZLE_CMD_TEMP_ALL, ++ }; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu_hwmon->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, temp_sensor_ntc_cmd, ++ sizeof(temp_sensor_ntc_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 7) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ /* Check the number of NTC values */ ++ if (resp_buf[3] != '2') { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ *value = raw_temp_to_milidegree_celsius(resp_buf[4 + channel]); ++exit: ++ mutex_unlock(&mcu_hwmon->lock); ++ return ret; ++} ++ ++#define raw_fan_val_to_rpm(x, y) ((((x) << 8 | (y)) / 2) * 60) ++static int iei_wt61p803_puzzle_read_fan_speed(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long *value) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char fan_speed_cmd[4] = {}; ++ size_t reply_size; ++ int ret; ++ ++ fan_speed_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ fan_speed_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; ++ fan_speed_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_RPM(channel); ++ ++ mutex_lock(&mcu_hwmon->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, fan_speed_cmd, ++ sizeof(fan_speed_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 7) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ *value = raw_fan_val_to_rpm(resp_buf[3], resp_buf[4]); ++exit: ++ mutex_unlock(&mcu_hwmon->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_write_pwm_channel(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long pwm_set_val) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char pwm_set_cmd[6] = {}; ++ size_t reply_size; ++ int ret; ++ ++ pwm_set_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ pwm_set_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; ++ pwm_set_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM_WRITE; ++ pwm_set_cmd[3] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM(channel); ++ pwm_set_cmd[4] = pwm_set_val; ++ ++ mutex_lock(&mcu_hwmon->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, pwm_set_cmd, ++ sizeof(pwm_set_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EIO; ++ goto exit; ++ } ++exit: ++ mutex_unlock(&mcu_hwmon->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_read_pwm_channel(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long *value) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char pwm_get_cmd[5] = {}; ++ size_t reply_size; ++ int ret; ++ ++ pwm_get_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ pwm_get_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; ++ pwm_get_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ; ++ pwm_get_cmd[3] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM(channel); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, pwm_get_cmd, ++ sizeof(pwm_get_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ return ret; ++ ++ if (reply_size != 5) ++ return -EIO; ++ ++ if (resp_buf[2] != IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ) ++ return -EIO; ++ ++ *value = resp_buf[3]; ++ ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_read(struct device *dev, enum hwmon_sensor_types type, ++ u32 attr, int channel, long *val) ++{ ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = dev_get_drvdata(dev->parent); ++ ++ switch (type) { ++ case hwmon_pwm: ++ return iei_wt61p803_puzzle_read_pwm_channel(mcu_hwmon, channel, val); ++ case hwmon_fan: ++ return iei_wt61p803_puzzle_read_fan_speed(mcu_hwmon, channel, val); ++ case hwmon_temp: ++ return iei_wt61p803_puzzle_read_temp_sensor(mcu_hwmon, channel, val); ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int iei_wt61p803_puzzle_write(struct device *dev, enum hwmon_sensor_types type, ++ u32 attr, int channel, long val) ++{ ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = dev_get_drvdata(dev->parent); ++ ++ return iei_wt61p803_puzzle_write_pwm_channel(mcu_hwmon, channel, val); ++} ++ ++static umode_t iei_wt61p803_puzzle_is_visible(const void *data, enum hwmon_sensor_types type, ++ u32 attr, int channel) ++{ ++ const struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = data; ++ ++ switch (type) { ++ case hwmon_pwm: ++ if (mcu_hwmon->thermal_cooling_dev_present[channel]) ++ return 0444; ++ if (attr == hwmon_pwm_input) ++ return 0644; ++ break; ++ case hwmon_fan: ++ if (attr == hwmon_fan_input) ++ return 0444; ++ break; ++ case hwmon_temp: ++ if (attr == hwmon_temp_input) ++ return 0444; ++ break; ++ default: ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static const struct hwmon_ops iei_wt61p803_puzzle_hwmon_ops = { ++ .is_visible = iei_wt61p803_puzzle_is_visible, ++ .read = iei_wt61p803_puzzle_read, ++ .write = iei_wt61p803_puzzle_write, ++}; ++ ++static const struct hwmon_channel_info *iei_wt61p803_puzzle_info[] = { ++ HWMON_CHANNEL_INFO(pwm, ++ HWMON_PWM_INPUT, ++ HWMON_PWM_INPUT), ++ HWMON_CHANNEL_INFO(fan, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT), ++ HWMON_CHANNEL_INFO(temp, ++ HWMON_T_INPUT, ++ HWMON_T_INPUT), ++ NULL ++}; ++ ++static const struct hwmon_chip_info iei_wt61p803_puzzle_chip_info = { ++ .ops = &iei_wt61p803_puzzle_hwmon_ops, ++ .info = iei_wt61p803_puzzle_info, ++}; ++ ++static int iei_wt61p803_puzzle_get_max_state(struct thermal_cooling_device *tcdev, ++ unsigned long *state) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; ++ ++ if (!cdev) ++ return -EINVAL; ++ ++ *state = cdev->num_levels - 1; ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_get_cur_state(struct thermal_cooling_device *tcdev, ++ unsigned long *state) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; ++ ++ if (!cdev) ++ return -EINVAL; ++ ++ if (cdev->cur_level < 0) ++ return -EAGAIN; ++ ++ *state = cdev->cur_level; ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_set_cur_state(struct thermal_cooling_device *tcdev, ++ unsigned long state) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; ++ u8 pwm_level; ++ ++ if (!cdev) ++ return -EINVAL; ++ ++ if (state >= cdev->num_levels) ++ return -EINVAL; ++ ++ if (state == cdev->cur_level) ++ return 0; ++ ++ cdev->cur_level = state; ++ pwm_level = cdev->cooling_levels[state]; ++ ++ return iei_wt61p803_puzzle_write_pwm_channel(cdev->mcu_hwmon, cdev->pwm_channel, pwm_level); ++} ++ ++static const struct thermal_cooling_device_ops iei_wt61p803_puzzle_cooling_ops = { ++ .get_max_state = iei_wt61p803_puzzle_get_max_state, ++ .get_cur_state = iei_wt61p803_puzzle_get_cur_state, ++ .set_cur_state = iei_wt61p803_puzzle_set_cur_state, ++}; ++ ++static int ++iei_wt61p803_puzzle_enable_thermal_cooling_dev(struct device *dev, ++ struct fwnode_handle *child, ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev; ++ u32 pwm_channel; ++ u8 num_levels; ++ int i, ret; ++ ++ ret = fwnode_property_read_u32(child, "reg", &pwm_channel); ++ if (ret) ++ return ret; ++ ++ mcu_hwmon->thermal_cooling_dev_present[pwm_channel] = true; ++ ++ num_levels = fwnode_property_count_u32(child, "cooling-levels"); ++ if (!num_levels) ++ return -EINVAL; ++ ++ cdev = devm_kzalloc(dev, sizeof(*cdev), GFP_KERNEL); ++ if (!cdev) ++ return -ENOMEM; ++ ++ cdev->cooling_levels = devm_kmalloc_array(dev, num_levels, sizeof(u32), GFP_KERNEL); ++ if (!cdev->cooling_levels) ++ return -ENOMEM; ++ ++ ret = fwnode_property_read_u32_array(child, "cooling-levels", ++ cdev->cooling_levels, ++ num_levels); ++ if (ret) { ++ dev_err(dev, "Couldn't read property 'cooling-levels'\n"); ++ return ret; ++ } ++ ++ for (i = 0; i < num_levels; i++) { ++ if (cdev->cooling_levels[i] > ++ IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL) { ++ dev_err(dev, "iei_wt61p803_fan state[%d]:%d > %d\n", i, ++ cdev->cooling_levels[i], ++ IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL); ++ return -EINVAL; ++ } ++ } ++ ++ cdev->mcu_hwmon = mcu_hwmon; ++ cdev->pwm_channel = pwm_channel; ++ cdev->num_levels = num_levels; ++ cdev->cur_level = -1; ++ mcu_hwmon->cdev[pwm_channel] = cdev; ++ ++ snprintf(cdev->name, THERMAL_NAME_LENGTH, "wt61p803_puzzle_%d", pwm_channel); ++ cdev->tcdev = devm_thermal_of_cooling_device_register(dev, to_of_node(child), cdev->name, ++ cdev, &iei_wt61p803_puzzle_cooling_ops); ++ if (IS_ERR(cdev->tcdev)) ++ return PTR_ERR(cdev->tcdev); ++ ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_hwmon_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon; ++ struct fwnode_handle *child; ++ struct device *hwmon_dev; ++ int ret; ++ ++ mcu_hwmon = devm_kzalloc(dev, sizeof(*mcu_hwmon), GFP_KERNEL); ++ if (!mcu_hwmon) ++ return -ENOMEM; ++ ++ mcu_hwmon->mcu = mcu; ++ platform_set_drvdata(pdev, mcu_hwmon); ++ mutex_init(&mcu_hwmon->lock); ++ ++ hwmon_dev = devm_hwmon_device_register_with_info(dev, "iei_wt61p803_puzzle", ++ mcu_hwmon, ++ &iei_wt61p803_puzzle_chip_info, ++ NULL); ++ if (IS_ERR(hwmon_dev)) ++ return PTR_ERR(hwmon_dev); ++ ++ /* Control fans via PWM lines via Linux Kernel */ ++ if (IS_ENABLED(CONFIG_THERMAL)) { ++ device_for_each_child_node(dev, child) { ++ ret = iei_wt61p803_puzzle_enable_thermal_cooling_dev(dev, child, mcu_hwmon); ++ if (ret) { ++ dev_err(dev, "Enabling the PWM fan failed\n"); ++ fwnode_handle_put(child); ++ return ret; ++ } ++ } ++ } ++ return 0; ++} ++ ++static const struct of_device_id iei_wt61p803_puzzle_hwmon_id_table[] = { ++ { .compatible = "iei,wt61p803-puzzle-hwmon" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_hwmon_id_table); ++ ++static struct platform_driver iei_wt61p803_puzzle_hwmon_driver = { ++ .driver = { ++ .name = "iei-wt61p803-puzzle-hwmon", ++ .of_match_table = iei_wt61p803_puzzle_hwmon_id_table, ++ }, ++ .probe = iei_wt61p803_puzzle_hwmon_probe, ++}; ++ ++module_platform_driver(iei_wt61p803_puzzle_hwmon_driver); ++ ++MODULE_DESCRIPTION("IEI WT61P803 PUZZLE MCU HWMON Driver"); ++MODULE_AUTHOR("Luka Kovacic "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/mvebu/patches-6.6/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch b/target/linux/mvebu/patches-6.6/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch new file mode 100644 index 0000000000..a9cb46bbd8 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch @@ -0,0 +1,207 @@ +From f3b44eb69cc561cf05d00506dcec0dd9be003ed8 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:35 +0000 +Subject: [PATCH 4/7] drivers: leds: Add the IEI WT61P803 PUZZLE LED driver + +Add support for the IEI WT61P803 PUZZLE LED driver. +Currently only the front panel power LED is supported, +since it is the only LED on this board wired through the +MCU. + +The LED is wired directly to the on-board MCU controller +and is toggled using an MCU command. + +Support for more LEDs is going to be added in case more +boards implement this microcontroller, as LEDs use many +different GPIOs. + +This driver depends on the IEI WT61P803 PUZZLE MFD driver. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + drivers/leds/Kconfig | 8 ++ + drivers/leds/Makefile | 1 + + drivers/leds/leds-iei-wt61p803-puzzle.c | 147 ++++++++++++++++++++++++ + 3 files changed, 156 insertions(+) + create mode 100644 drivers/leds/leds-iei-wt61p803-puzzle.c + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -316,6 +316,14 @@ config LEDS_IPAQ_MICRO + Choose this option if you want to use the notification LED on + Compaq/HP iPAQ h3100 and h3600. + ++config LEDS_IEI_WT61P803_PUZZLE ++ tristate "LED Support for the IEI WT61P803 PUZZLE MCU" ++ depends on LEDS_CLASS ++ depends on MFD_IEI_WT61P803_PUZZLE ++ help ++ This option enables support for LEDs controlled by the IEI WT61P803 ++ M801 MCU. ++ + config LEDS_HP6XX + tristate "LED Support for the HP Jornada 6xx" + depends on LEDS_CLASS +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -34,6 +34,7 @@ obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx. + obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o + obj-$(CONFIG_LEDS_IP30) += leds-ip30.o + obj-$(CONFIG_LEDS_IPAQ_MICRO) += leds-ipaq-micro.o ++obj-$(CONFIG_LEDS_IEI_WT61P803_PUZZLE) += leds-iei-wt61p803-puzzle.o + obj-$(CONFIG_LEDS_IS31FL319X) += leds-is31fl319x.o + obj-$(CONFIG_LEDS_IS31FL32XX) += leds-is31fl32xx.o + obj-$(CONFIG_LEDS_LM3530) += leds-lm3530.o +--- /dev/null ++++ b/drivers/leds/leds-iei-wt61p803-puzzle.c +@@ -0,0 +1,147 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* IEI WT61P803 PUZZLE MCU LED Driver ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++enum iei_wt61p803_puzzle_led_state { ++ IEI_LED_OFF = 0x30, ++ IEI_LED_ON = 0x31, ++ IEI_LED_BLINK_5HZ = 0x32, ++ IEI_LED_BLINK_1HZ = 0x33, ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_led - MCU LED Driver ++ * @cdev: LED classdev ++ * @mcu: MCU struct pointer ++ * @response_buffer Global MCU response buffer ++ * @lock: General mutex lock to protect simultaneous R/W access to led_power_state ++ * @led_power_state: State of the front panel power LED ++ */ ++struct iei_wt61p803_puzzle_led { ++ struct led_classdev cdev; ++ struct iei_wt61p803_puzzle *mcu; ++ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ struct mutex lock; /* mutex to protect led_power_state */ ++ int led_power_state; ++}; ++ ++static inline struct iei_wt61p803_puzzle_led *cdev_to_iei_wt61p803_puzzle_led ++ (struct led_classdev *led_cdev) ++{ ++ return container_of(led_cdev, struct iei_wt61p803_puzzle_led, cdev); ++} ++ ++static int iei_wt61p803_puzzle_led_brightness_set_blocking(struct led_classdev *cdev, ++ enum led_brightness brightness) ++{ ++ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); ++ unsigned char *resp_buf = priv->response_buffer; ++ unsigned char led_power_cmd[5] = {}; ++ size_t reply_size; ++ int ret; ++ ++ led_power_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ led_power_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; ++ led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_POWER; ++ led_power_cmd[3] = brightness == LED_OFF ? IEI_LED_OFF : IEI_LED_ON; ++ ++ ret = iei_wt61p803_puzzle_write_command(priv->mcu, led_power_cmd, ++ sizeof(led_power_cmd), ++ resp_buf, ++ &reply_size); ++ if (ret) ++ return ret; ++ ++ if (reply_size != 3) ++ return -EIO; ++ ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) ++ return -EIO; ++ ++ mutex_lock(&priv->lock); ++ priv->led_power_state = brightness; ++ mutex_unlock(&priv->lock); ++ ++ return 0; ++} ++ ++static enum led_brightness iei_wt61p803_puzzle_led_brightness_get(struct led_classdev *cdev) ++{ ++ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); ++ int led_state; ++ ++ mutex_lock(&priv->lock); ++ led_state = priv->led_power_state; ++ mutex_unlock(&priv->lock); ++ ++ return led_state; ++} ++ ++static int iei_wt61p803_puzzle_led_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); ++ struct iei_wt61p803_puzzle_led *priv; ++ struct led_init_data init_data = {}; ++ struct fwnode_handle *child; ++ int ret; ++ ++ if (device_get_child_node_count(dev) != 1) ++ return -EINVAL; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->mcu = mcu; ++ priv->led_power_state = 1; ++ mutex_init(&priv->lock); ++ dev_set_drvdata(dev, priv); ++ ++ child = device_get_next_child_node(dev, NULL); ++ init_data.fwnode = child; ++ ++ priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; ++ priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; ++ priv->cdev.max_brightness = 1; ++ ++ ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); ++ if (ret) ++ dev_err(dev, "Could not register LED\n"); ++ ++ fwnode_handle_put(child); ++ return ret; ++} ++ ++static const struct of_device_id iei_wt61p803_puzzle_led_of_match[] = { ++ { .compatible = "iei,wt61p803-puzzle-leds" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_led_of_match); ++ ++static struct platform_driver iei_wt61p803_puzzle_led_driver = { ++ .driver = { ++ .name = "iei-wt61p803-puzzle-led", ++ .of_match_table = iei_wt61p803_puzzle_led_of_match, ++ }, ++ .probe = iei_wt61p803_puzzle_led_probe, ++}; ++module_platform_driver(iei_wt61p803_puzzle_led_driver); ++ ++MODULE_DESCRIPTION("IEI WT61P803 PUZZLE front panel LED driver"); ++MODULE_AUTHOR("Luka Kovacic "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:leds-iei-wt61p803-puzzle"); diff --git a/target/linux/mvebu/patches-6.6/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch b/target/linux/mvebu/patches-6.6/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch new file mode 100644 index 0000000000..b1d420ef0a --- /dev/null +++ b/target/linux/mvebu/patches-6.6/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch @@ -0,0 +1,82 @@ +From 2fab3b4956c5b2f83c1e1abffc1df39de2933d83 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:36 +0000 +Subject: [PATCH 5/7] Documentation/ABI: Add iei-wt61p803-puzzle driver sysfs + interface documentation + +Add the iei-wt61p803-puzzle driver sysfs interface documentation to allow +monitoring and control of the microcontroller from user space. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + .../testing/sysfs-driver-iei-wt61p803-puzzle | 61 +++++++++++++++++++ + 1 file changed, 61 insertions(+) + create mode 100644 Documentation/ABI/testing/sysfs-driver-iei-wt61p803-puzzle + +--- /dev/null ++++ b/Documentation/ABI/testing/sysfs-driver-iei-wt61p803-puzzle +@@ -0,0 +1,61 @@ ++What: /sys/bus/serial/devices/.../mac_address_* ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RW) Internal factory assigned MAC address values ++ ++What: /sys/bus/serial/devices/.../serial_number ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RW) Internal factory assigned serial number ++ ++What: /sys/bus/serial/devices/.../version ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU firmware version ++ ++What: /sys/bus/serial/devices/.../protocol_version ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU communication protocol version ++ ++What: /sys/bus/serial/devices/.../power_loss_recovery ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RW) Host platform power loss recovery settings ++ Value mapping: 0 - Always-On, 1 - Always-Off, 2 - Always-AC, 3 - Always-WA ++ ++What: /sys/bus/serial/devices/.../bootloader_mode ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU bootloader mode status ++ Value mapping: ++ 0 - normal mode ++ 1 - bootloader mode ++ ++What: /sys/bus/serial/devices/.../power_status ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Power status indicates the host platform power on method. ++ Value mapping (bitwise list): ++ 0x80 - Null ++ 0x40 - Firmware flag ++ 0x20 - Power loss detection flag (powered off) ++ 0x10 - Power loss detection flag (AC mode) ++ 0x08 - Button power on ++ 0x04 - Wake-on-LAN power on ++ 0x02 - RTC alarm power on ++ 0x01 - AC recover power on ++ ++What: /sys/bus/serial/devices/.../build_info ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU firmware build date ++ Format: yyyy/mm/dd hh:mm ++ ++What: /sys/bus/serial/devices/.../ac_recovery_status ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Host platform AC recovery status value ++ Value mapping: ++ 0 - board has not been recovered from power down ++ 1 - board has been recovered from power down diff --git a/target/linux/mvebu/patches-6.6/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch b/target/linux/mvebu/patches-6.6/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch new file mode 100644 index 0000000000..77e9fa298e --- /dev/null +++ b/target/linux/mvebu/patches-6.6/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch @@ -0,0 +1,74 @@ +From 0aff3e5923fecc6842473ad07a688d6e2f2c2d55 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:37 +0000 +Subject: [PATCH 6/7] Documentation/hwmon: Add iei-wt61p803-puzzle hwmon driver + documentation + +Add the iei-wt61p803-puzzle driver hwmon driver interface documentation. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + .../hwmon/iei-wt61p803-puzzle-hwmon.rst | 43 +++++++++++++++++++ + Documentation/hwmon/index.rst | 1 + + 2 files changed, 44 insertions(+) + create mode 100644 Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst + +--- /dev/null ++++ b/Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst +@@ -0,0 +1,43 @@ ++.. SPDX-License-Identifier: GPL-2.0-only ++ ++Kernel driver iei-wt61p803-puzzle-hwmon ++======================================= ++ ++Supported chips: ++ * IEI WT61P803 PUZZLE for IEI Puzzle M801 ++ ++ Prefix: 'iei-wt61p803-puzzle-hwmon' ++ ++Author: Luka Kovacic ++ ++ ++Description ++----------- ++ ++This driver adds fan and temperature sensor reading for some IEI Puzzle ++series boards. ++ ++Sysfs attributes ++---------------- ++ ++The following attributes are supported: ++ ++- IEI WT61P803 PUZZLE for IEI Puzzle M801 ++ ++/sys files in hwmon subsystem ++----------------------------- ++ ++================= == ===================================================== ++fan[1-5]_input RO files for fan speed (in RPM) ++pwm[1-2] RW files for fan[1-2] target duty cycle (0..255) ++temp[1-2]_input RO files for temperature sensors, in millidegree Celsius ++================= == ===================================================== ++ ++/sys files in thermal subsystem ++------------------------------- ++ ++================= == ===================================================== ++cur_state RW file for current cooling state of the cooling device ++ (0..max_state) ++max_state RO file for maximum cooling state of the cooling device ++================= == ===================================================== +--- a/Documentation/hwmon/index.rst ++++ b/Documentation/hwmon/index.rst +@@ -82,6 +82,7 @@ Hardware Monitoring Kernel Drivers + ibmaem + ibm-cffps + ibmpowernv ++ iei-wt61p803-puzzle-hwmon + ina209 + ina2xx + ina238 diff --git a/target/linux/mvebu/patches-6.6/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch b/target/linux/mvebu/patches-6.6/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch new file mode 100644 index 0000000000..2a8397d0b5 --- /dev/null +++ b/target/linux/mvebu/patches-6.6/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch @@ -0,0 +1,41 @@ +From 12479baad28d2a08c6cb9e83471057635fa1635c Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:38 +0000 +Subject: [PATCH 7/7] MAINTAINERS: Add an entry for the IEI WT61P803 PUZZLE + driver + +Add an entry for the IEI WT61P803 PUZZLE driver (MFD, HWMON, LED drivers). + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + MAINTAINERS | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -10138,6 +10138,22 @@ IFCVF VIRTIO DATA PATH ACCELERATOR + R: Zhu Lingshan + F: drivers/vdpa/ifcvf/ + ++IEI WT61P803 M801 MFD DRIVER ++M: Luka Kovacic ++M: Luka Perkov ++M: Goran Medic ++L: linux-kernel@vger.kernel.org ++S: Maintained ++F: Documentation/ABI/stable/sysfs-driver-iei-wt61p803-puzzle ++F: Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml ++F: Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml ++F: Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml ++F: Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst ++F: drivers/hwmon/iei-wt61p803-puzzle-hwmon.c ++F: drivers/leds/leds-iei-wt61p803-puzzle.c ++F: drivers/mfd/iei-wt61p803-puzzle.c ++F: include/linux/mfd/iei-wt61p803-puzzle.h ++ + IFE PROTOCOL + M: Yotam Gigi + M: Jamal Hadi Salim diff --git a/target/linux/mvebu/patches-6.6/910-drivers-leds-wt61p803-puzzle-improvements.patch b/target/linux/mvebu/patches-6.6/910-drivers-leds-wt61p803-puzzle-improvements.patch new file mode 100644 index 0000000000..150a65498c --- /dev/null +++ b/target/linux/mvebu/patches-6.6/910-drivers-leds-wt61p803-puzzle-improvements.patch @@ -0,0 +1,271 @@ +--- a/drivers/leds/leds-iei-wt61p803-puzzle.c ++++ b/drivers/leds/leds-iei-wt61p803-puzzle.c +@@ -9,9 +9,13 @@ + #include + #include + #include ++#include + #include + #include + #include ++#include ++ ++#define IEI_LEDS_MAX 4 + + enum iei_wt61p803_puzzle_led_state { + IEI_LED_OFF = 0x30, +@@ -33,7 +37,11 @@ struct iei_wt61p803_puzzle_led { + struct iei_wt61p803_puzzle *mcu; + unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; + struct mutex lock; /* mutex to protect led_power_state */ ++ struct work_struct work; + int led_power_state; ++ int id; ++ u8 blinking; ++ bool active_low; + }; + + static inline struct iei_wt61p803_puzzle_led *cdev_to_iei_wt61p803_puzzle_led +@@ -51,10 +59,18 @@ static int iei_wt61p803_puzzle_led_brigh + size_t reply_size; + int ret; + ++ if (priv->blinking) { ++ if (brightness == LED_OFF) ++ priv->blinking = 0; ++ else ++ return 0; ++ } ++ + led_power_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; + led_power_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; +- led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_POWER; +- led_power_cmd[3] = brightness == LED_OFF ? IEI_LED_OFF : IEI_LED_ON; ++ led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_SET(priv->id); ++ led_power_cmd[3] = ((brightness == LED_OFF) ^ priv->active_low) ? ++ IEI_LED_OFF : priv->blinking?priv->blinking:IEI_LED_ON; + + ret = iei_wt61p803_puzzle_write_command(priv->mcu, led_power_cmd, + sizeof(led_power_cmd), +@@ -90,39 +106,166 @@ static enum led_brightness iei_wt61p803_ + return led_state; + } + ++static void iei_wt61p803_puzzle_led_apply_blink(struct work_struct *work) ++{ ++ struct iei_wt61p803_puzzle_led *priv = container_of(work, struct iei_wt61p803_puzzle_led, work); ++ unsigned char led_blink_cmd[5] = {}; ++ unsigned char resp_buf[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ size_t reply_size; ++ ++ led_blink_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ led_blink_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; ++ led_blink_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_SET(priv->id); ++ led_blink_cmd[3] = priv->blinking; ++ ++ iei_wt61p803_puzzle_write_command(priv->mcu, led_blink_cmd, ++ sizeof(led_blink_cmd), ++ resp_buf, ++ &reply_size); ++ ++ return; ++} ++ ++static int iei_wt61p803_puzzle_led_set_blink(struct led_classdev *cdev, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); ++ u8 blink_mode = 0; ++ int ret = 0; ++ ++ /* set defaults */ ++ if (!*delay_on && !*delay_off) { ++ *delay_on = 500; ++ *delay_off = 500; ++ } ++ ++ /* minimum delay for soft-driven blinking is 100ms to keep load low */ ++ if (*delay_on < 100) ++ *delay_on = 100; ++ ++ if (*delay_off < 100) ++ *delay_off = 100; ++ ++ /* offload blinking to hardware, if possible */ ++ if (*delay_on != *delay_off) { ++ ret = -EINVAL; ++ } else if (*delay_on == 100) { ++ blink_mode = IEI_LED_BLINK_5HZ; ++ *delay_on = 100; ++ *delay_off = 100; ++ } else if (*delay_on <= 500) { ++ blink_mode = IEI_LED_BLINK_1HZ; ++ *delay_on = 500; ++ *delay_off = 500; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ mutex_lock(&priv->lock); ++ priv->blinking = blink_mode; ++ mutex_unlock(&priv->lock); ++ ++ if (blink_mode) ++ schedule_work(&priv->work); ++ ++ return ret; ++} ++ ++ ++static int iei_wt61p803_puzzle_led_set_dt_default(struct led_classdev *cdev, ++ struct device_node *np) ++{ ++ const char *state; ++ int ret = 0; ++ ++ state = of_get_property(np, "default-state", NULL); ++ if (state) { ++ if (!strcmp(state, "on")) { ++ ret = ++ iei_wt61p803_puzzle_led_brightness_set_blocking( ++ cdev, cdev->max_brightness); ++ } else { ++ ret = iei_wt61p803_puzzle_led_brightness_set_blocking( ++ cdev, LED_OFF); ++ } ++ } ++ ++ return ret; ++} ++ + static int iei_wt61p803_puzzle_led_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; ++ struct device_node *np = dev_of_node(dev); ++ struct device_node *child; + struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); + struct iei_wt61p803_puzzle_led *priv; +- struct led_init_data init_data = {}; +- struct fwnode_handle *child; + int ret; ++ u32 reg; + +- if (device_get_child_node_count(dev) != 1) ++ if (device_get_child_node_count(dev) > IEI_LEDS_MAX) + return -EINVAL; + +- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); +- if (!priv) +- return -ENOMEM; +- +- priv->mcu = mcu; +- priv->led_power_state = 1; +- mutex_init(&priv->lock); +- dev_set_drvdata(dev, priv); +- +- child = device_get_next_child_node(dev, NULL); +- init_data.fwnode = child; +- +- priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; +- priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; +- priv->cdev.max_brightness = 1; ++ for_each_available_child_of_node(np, child) { ++ struct led_init_data init_data = {}; + +- ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); +- if (ret) +- dev_err(dev, "Could not register LED\n"); ++ ret = of_property_read_u32(child, "reg", ®); ++ if (ret) { ++ dev_err(dev, "Failed to read led 'reg' property\n"); ++ goto put_child_node; ++ } ++ ++ if (reg > IEI_LEDS_MAX) { ++ dev_err(dev, "Invalid led reg %u\n", reg); ++ ret = -EINVAL; ++ goto put_child_node; ++ } ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) { ++ ret = -ENOMEM; ++ goto put_child_node; ++ } ++ ++ mutex_init(&priv->lock); ++ ++ dev_set_drvdata(dev, priv); ++ ++ if (of_property_read_bool(child, "active-low")) ++ priv->active_low = true; ++ ++ priv->mcu = mcu; ++ priv->id = reg; ++ priv->led_power_state = 1; ++ priv->blinking = 0; ++ init_data.fwnode = of_fwnode_handle(child); ++ ++ priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; ++ priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; ++ priv->cdev.blink_set = iei_wt61p803_puzzle_led_set_blink; ++ ++ priv->cdev.max_brightness = 1; ++ ++ INIT_WORK(&priv->work, iei_wt61p803_puzzle_led_apply_blink); ++ ++ ret = iei_wt61p803_puzzle_led_set_dt_default(&priv->cdev, child); ++ if (ret) { ++ dev_err(dev, "Could apply default from DT\n"); ++ goto put_child_node; ++ } ++ ++ ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); ++ if (ret) { ++ dev_err(dev, "Could not register LED\n"); ++ goto put_child_node; ++ } ++ } ++ ++ return ret; + +- fwnode_handle_put(child); ++put_child_node: ++ of_node_put(child); + return ret; + } + +--- a/include/linux/mfd/iei-wt61p803-puzzle.h ++++ b/include/linux/mfd/iei-wt61p803-puzzle.h +@@ -36,7 +36,7 @@ + #define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS 0x41 /* A */ + + #define IEI_WT61P803_PUZZLE_CMD_LED 0x52 /* R */ +-#define IEI_WT61P803_PUZZLE_CMD_LED_POWER 0x31 /* 1 */ ++#define IEI_WT61P803_PUZZLE_CMD_LED_SET(n) (0x30 | (n)) + + #define IEI_WT61P803_PUZZLE_CMD_TEMP 0x54 /* T */ + #define IEI_WT61P803_PUZZLE_CMD_TEMP_ALL 0x41 /* A */ +--- a/drivers/mfd/iei-wt61p803-puzzle.c ++++ b/drivers/mfd/iei-wt61p803-puzzle.c +@@ -176,6 +176,9 @@ static int iei_wt61p803_puzzle_recv_buf( + struct iei_wt61p803_puzzle *mcu = serdev_device_get_drvdata(serdev); + int ret; + ++ print_hex_dump_debug("puzzle-mcu rx: ", DUMP_PREFIX_NONE, ++ 16, 1, data, size, false); ++ + ret = iei_wt61p803_puzzle_process_resp(mcu, data, size); + /* Return the number of processed bytes if function returns error, + * discard the remaining incoming data, since the frame this data +@@ -246,6 +249,9 @@ int iei_wt61p803_puzzle_write_command(st + + cmd[size - 1] = iei_wt61p803_puzzle_checksum(cmd, size - 1); + ++ print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE, ++ 16, 1, cmd, size, false); ++ + /* Initialize reply struct */ + reinit_completion(&mcu->reply->received); + mcu->reply->size = 0; diff --git a/target/linux/mvebu/patches-6.6/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch b/target/linux/mvebu/patches-6.6/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch new file mode 100644 index 0000000000..2f0b1788ff --- /dev/null +++ b/target/linux/mvebu/patches-6.6/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch @@ -0,0 +1,63 @@ +--- a/drivers/mfd/iei-wt61p803-puzzle.c ++++ b/drivers/mfd/iei-wt61p803-puzzle.c +@@ -241,6 +241,7 @@ int iei_wt61p803_puzzle_write_command(st + { + struct device *dev = &mcu->serdev->dev; + int ret; ++ int retries; + + if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH) + return -EINVAL; +@@ -252,24 +253,36 @@ int iei_wt61p803_puzzle_write_command(st + print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE, + 16, 1, cmd, size, false); + ++ retries = 3; + /* Initialize reply struct */ +- reinit_completion(&mcu->reply->received); +- mcu->reply->size = 0; +- usleep_range(2000, 10000); +- serdev_device_write_flush(mcu->serdev); +- ret = serdev_device_write_buf(mcu->serdev, cmd, size); +- if (ret < 0) +- goto exit; +- +- serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); +- ret = wait_for_completion_timeout(&mcu->reply->received, +- IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); +- if (ret == 0) { +- dev_err(dev, "Command reply receive timeout\n"); +- ret = -ETIMEDOUT; +- goto exit; ++ while (retries) { ++ reinit_completion(&mcu->reply->received); ++ mcu->reply->size = 0; ++ usleep_range(2000, 10000); ++ serdev_device_write_flush(mcu->serdev); ++ ret = serdev_device_write_buf(mcu->serdev, cmd, size); ++ if (ret < 0) ++ goto exit; ++ ++ serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ ret = wait_for_completion_timeout(&mcu->reply->received, ++ IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ retries--; ++ if (ret == 0) { ++ if (retries == 0) { ++ dev_err(dev, "Command reply receive timeout\n"); ++ ret = -ETIMEDOUT; ++ goto exit; ++ } ++ } ++ else { ++ if (mcu->reply->data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ mcu->reply->data[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ mcu->reply->data[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK) { ++ break; ++ } ++ } + } +- + *reply_size = mcu->reply->size; + /* Copy the received data, as it will not be available after a new frame is received */ + memcpy(reply_data, mcu->reply->data, mcu->reply->size); diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-512m.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-512m.dtsi new file mode 100644 index 0000000000..d46a852404 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-512m.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include "ipq6018.dtsi" + +&rpm_msg_ram { + reg = <0x0 0x00060000 0x0 0x6000>; + no-map; +}; + +&tz { + reg = <0x0 0x4a600000 0x0 0x00400000>; + no-map; +}; + +&smem_region { + reg = <0x0 0x4aa00000 0x0 0x00100000>; + no-map; +}; + +&q6_region { + reg = <0x0 0x4ab00000 0x0 0x03700000>; + no-map; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-fap650.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-fap650.dts new file mode 100644 index 0000000000..e9ebcc9063 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-fap650.dts @@ -0,0 +1,365 @@ +// SPDX-License-Identifier: MIT, GPL-2.0 or later +/* Copyright (c) 2023, Ruslan Isaev */ + +/dts-v1/; + +#include "ipq6018-512m.dtsi" +#include "ipq6018-cp-cpu.dtsi" +#include "ipq6018-ess.dtsi" +#include +#include +#include + +/ { + model = "Yuncore FAP650"; + compatible = "yuncore,fap650", "qcom,ipq6018"; + + aliases { + ethernet0 = &dp5; + ethernet1 = &dp4; + ethernet2 = &dp3; + ethernet3 = &dp2; + ethernet4 = &dp1; + label-mac-device = &dp5; + serial0 = &blsp1_uart3; + led-boot = &led_system; + led-failsafe = &led_system; + led-running = &led_system; + led-upgrade = &led_system; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 19 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_system: system { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; + }; + + wlan5g { + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&blsp1_uart3 { + pinctrl-0 = <&serial_3_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio-pins { + mdc { + pins = "gpio64"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio { + pins = "gpio65"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; + reset-delay-us = <10000>; + reset-post-delay-us = <50000>; + + ethernet-phy-package@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,qca8075-package"; + reg = <0>; + + qcom,package-mode = "psgmii"; + + qca8075_0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + + qca8075_1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + + qca8075_2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + }; + + qca8075_3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + }; + + qca8075_4: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <4>; + }; + }; +}; + +&switch { + status = "okay"; + switch_lan_bmp = <(ESS_PORT1|ESS_PORT2|ESS_PORT3|ESS_PORT4)>; /* lan port bitmap */ + switch_wan_bmp = ; /* wan port bitmap */ + switch_mac_mode = ; /* mac mode for uniphy instance0*/ + + qcom,port_phyinfo { + port@1 { + port_id = <1>; + phy_address = <0>; + }; + + port@2 { + port_id = <2>; + phy_address = <1>; + }; + + port@3 { + port_id = <3>; + phy_address = <2>; + }; + + port@4 { + port_id = <4>; + phy_address = <3>; + }; + + port@5 { + port_id = <5>; + phy_address = <4>; + }; + }; +}; + +&usb2 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&edma { + status = "okay"; +}; + +&dp1 { + status = "okay"; + phy-handle = <&qca8075_0>; + label = "lan1"; +}; + +&dp2 { + status = "okay"; + phy-handle = <&qca8075_1>; + label = "lan2"; +}; + +&dp3 { + status = "okay"; + phy-handle = <&qca8075_2>; + label = "lan3"; +}; + +&dp4 { + status = "okay"; + phy-handle = <&qca8075_3>; + label = "lan4"; +}; + +&dp5 { + status = "okay"; + phy-handle = <&qca8075_4>; + phy-mode = "psgmii"; + label = "wan"; +}; + +&qpic_bam { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + + partition@0 { + reg = <0x00000000 0x000c0000>; + label = "0:sbl1"; + }; + + partition@c0000 { + reg = <0x000c0000 0x00010000>; + label = "0:mibib"; + }; + + partition@d0000 { + reg = <0x000d0000 0x00020000>; + label = "0:bootconfig"; + }; + + partition@f0000 { + reg = <0x000f0000 0x00020000>; + label = "0:bootconfig1"; + }; + + partition@110000 { + reg = <0x00110000 0x001a0000>; + label = "0:qsee"; + }; + + partition@2b0000 { + reg = <0x002b0000 0x001a0000>; + label = "0:qsee_1"; + }; + + partition@450000 { + reg = <0x00450000 0x00010000>; + label = "0:devcfg"; + }; + + partition@460000 { + reg = <0x00460000 0x00010000>; + label = "0:devcfg_1"; + }; + + partition@470000 { + reg = <0x00470000 0x00040000>; + label = "0:rpm"; + }; + + partition@4b0000 { + reg = <0x004b0000 0x00040000>; + label = "0:rpm_1"; + }; + + partition@4f0000 { + reg = <0x004f0000 0x00010000>; + label = "0:cdt"; + }; + + partition@500000 { + reg = <0x00500000 0x00010000>; + label = "0:cdt_1"; + }; + + partition@510000 { + reg = <0x00510000 0x00010000>; + label = "0:appsblenv"; + }; + + partition@520000 { + reg = <0x00520000 0x000a0000>; + label = "0:appsbl"; + }; + + partition@5c0000 { + reg = <0x005c0000 0x000a0000>; + label = "0:appsbl_1"; + }; + + partition@660000 { + reg = <0x00660000 0x00040000>; + label = "0:art"; + }; + }; + }; +}; + +&qpic_nand { + status = "okay"; + + nand@0 { + reg = <0>; + + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs"; + reg = <0x00000000 0x03c00000>; + }; + + partition@3c00000 { + label = "rootfs_1"; + reg = <0x03c00000 0x03c00000>; + }; + }; + }; +}; + +&wifi { + qcom,ath11k-calibration-variant = "Yuncore-FAP650"; + qcom,ath11k-fw-memory-mode = <1>; + status = "okay"; +}; + +&qusb_phy_0 { + status = "okay"; +}; + +&qusb_phy_1 { + status = "okay"; +}; + +&ssphy_0 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; diff --git a/target/linux/qualcommax/image/ipq60xx.mk b/target/linux/qualcommax/image/ipq60xx.mk index a7851e3dc5..79822ceb01 100644 --- a/target/linux/qualcommax/image/ipq60xx.mk +++ b/target/linux/qualcommax/image/ipq60xx.mk @@ -23,3 +23,19 @@ define Device/netgear_wax214 DEVICE_PACKAGES := ipq-wifi-netgear_wax214 endef TARGET_DEVICES += netgear_wax214 + +define Device/yuncore_fap650 + $(call Device/FitImage) + $(call Device/UbiFit) + DEVICE_VENDOR := Yuncore + DEVICE_MODEL := FAP650 + BLOCKSIZE := 128k + PAGESIZE := 2048 + DEVICE_DTS_CONFIG := config@cp03-c1 + SOC := ipq6018 + DEVICE_PACKAGES := ipq-wifi-yuncore_fap650 + IMAGES := factory.ubi factory.ubin sysupgrade.bin + IMAGE/factory.ubin := append-ubi | qsdk-ipq-factory-nand +endef +TARGET_DEVICES += yuncore_fap650 + diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/01_leds b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/01_leds new file mode 100644 index 0000000000..189822157f --- /dev/null +++ b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/01_leds @@ -0,0 +1,18 @@ + +. /lib/functions/leds.sh +. /lib/functions/uci-defaults.sh + +board_config_update + +board=$(board_name) + +case "$board" in +yuncore,fap650) + ucidef_set_led_netdev "wlan5ghz" "WLAN 5GHz LED" "blue:wlan-5ghz" "wlan0" "tx rx" + ucidef_set_led_netdev "wlan2ghz" "WLAN 2.4GHz LED" "green:wlan-2ghz" "wlan1" "tx rx" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network index aaa2522c92..f5fd35cf44 100644 --- a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network +++ b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network @@ -17,6 +17,9 @@ ipq60xx_setup_interfaces() netgear,wax214) ucidef_set_interfaces_lan_wan "lan" ;; + yuncore,fap650) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan" + ;; *) echo "Unsupported hardware. Network interfaces not initialized" ;; diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata index 89d4c265ab..23a3da0b4b 100644 --- a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata +++ b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata @@ -15,6 +15,9 @@ case "$FIRMWARE" in netgear,wax214) caldata_extract "0:art" 0x1000 0x10000 ;; + yuncore,fap650) + caldata_extract "0:art" 0x1000 0x20000 + ;; esac ;; *) diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/init.d/bootcount b/target/linux/qualcommax/ipq60xx/base-files/etc/init.d/bootcount new file mode 100755 index 0000000000..6347976372 --- /dev/null +++ b/target/linux/qualcommax/ipq60xx/base-files/etc/init.d/bootcount @@ -0,0 +1,14 @@ +#!/bin/sh /etc/rc.common + +START=99 + +. /lib/functions.sh + +boot() { + case $(board_name) in + yuncore,fap650) + fw_setenv owrt_bootcount 0 + ;; + esac +} + diff --git a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh index 4008cb0224..a8e4872cdd 100644 --- a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh @@ -8,11 +8,46 @@ platform_check_image() { return 0; } + +yuncore_fap650_env_setup() { + local ubifile=$(board_name) + local active=$(fw_printenv -n owrt_slotactive) + [ -z "$active" ] && active=$(hexdump -s 0x94 -n 4 -e '4 "%d"' /dev/mtd$(find_mtd_index 0:bootconfig)) + cat > /tmp/env_tmp << EOF +owrt_slotactive=${active} +owrt_bootcount=0 +bootfile=${ubifile}.ubi +owrt_bootcountcheck=if test \$owrt_bootcount > 4; then run owrt_tftprecover; fi; if test \$owrt_bootcount = 3; then run owrt_slotswap; else echo bootcountcheck successfull; fi +owrt_bootinc=if test \$owrt_bootcount < 5; then echo save env part; setexpr owrt_bootcount \${owrt_bootcount} + 1 && saveenv; else echo save env skipped; fi; echo current bootcount: \$owrt_bootcount +bootcmd=run owrt_bootinc && run owrt_bootcountcheck && run owrt_slotselect && run owrt_bootlinux +owrt_bootlinux=echo booting linux... && ubi part fs && ubi read 0x44000000 kernel && bootm; reset +owrt_setslot0=setenv bootargs console=ttyMSM0,115200n8 ubi.mtd=rootfs root=mtd:rootfs rootfstype=squashfs rootwait swiotlb=1 && setenv mtdparts mtdparts=nand0:0x3c00000@0(fs) +owrt_setslot1=setenv bootargs console=ttyMSM0,115200n8 ubi.mtd=rootfs_1 root=mtd:rootfs rootfstype=squashfs rootwait swiotlb=1 && setenv mtdparts mtdparts=nand0:0x3c00000@0x3c00000(fs) +owrt_slotswap=setexpr owrt_slotactive 1 - \${owrt_slotactive} && saveenv && echo slot swapped. new active slot: \$owrt_slotactive +owrt_slotselect=setenv mtdids nand0=nand0,nand1=spi0.0; if test \$owrt_slotactive = 0; then run owrt_setslot0; else run owrt_setslot1; fi +owrt_tftprecover=echo trying to recover firmware with tftp... && sleep 10 && dhcp && flash rootfs && flash rootfs_1 && setenv owrt_bootcount 0 && setenv owrt_slotactive 0 && saveenv && reset +owrt_env_ver=7 +EOF + fw_setenv --script /tmp/env_tmp +} + platform_do_upgrade() { case "$(board_name)" in netgear,wax214) nand_do_upgrade "$1" ;; + yuncore,fap650) + [ "$(fw_printenv -n owrt_env_ver 2>/dev/null)" != "7" ] && yuncore_fap650_env_setup + local active="$(fw_printenv -n owrt_slotactive 2>/dev/null)" + if [ "$active" = "1" ]; then + CI_UBIPART="rootfs" + else + CI_UBIPART="rootfs_1" + fi + fw_setenv owrt_bootcount 0 + fw_setenv owrt_slotactive $((1 - active)) + nand_do_upgrade "$1" + ;; *) default_do_upgrade "$1" ;; diff --git a/target/linux/ramips/Makefile b/target/linux/ramips/Makefile index 787b2e94cc..fec2a2b1f8 100644 --- a/target/linux/ramips/Makefile +++ b/target/linux/ramips/Makefile @@ -11,6 +11,7 @@ SUBTARGETS:=mt7620 mt7621 mt76x8 rt288x rt305x rt3883 FEATURES:=squashfs gpio KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 define Target/Description Build firmware images for Ralink RT288x/RT3xxx based boards. diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ethtool.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/ethtool.c index 9b028fbbc9..ca3b6fb302 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ethtool.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ethtool.c @@ -199,12 +199,20 @@ static void fe_get_ethtool_stats(struct net_device *dev, do { data_src = &hwstats->tx_bytes; data_dst = data; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0) + start = u64_stats_fetch_begin(&hwstats->syncp); +#else start = u64_stats_fetch_begin_irq(&hwstats->syncp); +#endif for (i = 0; i < ARRAY_SIZE(fe_gdma_str); i++) *data_dst++ = *data_src++; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0) + } while (u64_stats_fetch_retry(&hwstats->syncp, start)); +#else } while (u64_stats_fetch_retry_irq(&hwstats->syncp, start)); +#endif } static struct ethtool_ops fe_ethtool_ops = { diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c index 3748264dad..4365e398d3 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c @@ -487,7 +487,11 @@ static void fe_get_stats64(struct net_device *dev, } do { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0) + start = u64_stats_fetch_begin(&hwstats->syncp); +#else start = u64_stats_fetch_begin_irq(&hwstats->syncp); +#endif storage->rx_packets = hwstats->rx_packets; storage->tx_packets = hwstats->tx_packets; storage->rx_bytes = hwstats->rx_bytes; @@ -499,7 +503,11 @@ static void fe_get_stats64(struct net_device *dev, storage->rx_crc_errors = hwstats->rx_fcs_errors; storage->rx_errors = hwstats->rx_checksum_errors; storage->tx_aborted_errors = hwstats->tx_skip; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0) + } while (u64_stats_fetch_retry(&hwstats->syncp, start)); +#else } while (u64_stats_fetch_retry_irq(&hwstats->syncp, start)); +#endif storage->tx_errors = priv->netdev->stats.tx_errors; storage->rx_dropped = priv->netdev->stats.rx_dropped; diff --git a/target/linux/ramips/files/drivers/pinctrl/pinctrl-aw9523.c b/target/linux/ramips/files/drivers/pinctrl/pinctrl-aw9523.c index 65babf9946..a429bb82a3 100644 --- a/target/linux/ramips/files/drivers/pinctrl/pinctrl-aw9523.c +++ b/target/linux/ramips/files/drivers/pinctrl/pinctrl-aw9523.c @@ -810,7 +810,11 @@ static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins) gpiochip->set_multiple = aw9523_gpio_set_multiple; gpiochip->set_config = gpiochip_generic_config; gpiochip->parent = dev; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0) + gpiochip->fwnode = dev->fwnode; +#else gpiochip->of_node = dev->of_node; +#endif gpiochip->owner = THIS_MODULE; gpiochip->can_sleep = true; @@ -984,8 +988,12 @@ static int aw9523_hw_init(struct aw9523 *awi) return regmap_reinit_cache(awi->regmap, &aw9523_regmap); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0) +static int aw9523_probe(struct i2c_client *client) +#else static int aw9523_probe(struct i2c_client *client, const struct i2c_device_id *id) +#endif { struct device *dev = &client->dev; struct pinctrl_desc *pdesc; diff --git a/target/linux/ramips/mt7620/config-6.6 b/target/linux/ramips/mt7620/config-6.6 new file mode 100644 index 0000000000..839b201cf1 --- /dev/null +++ b/target/linux/ramips/mt7620/config-6.6 @@ -0,0 +1,224 @@ +CONFIG_AR8216_PHY=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +CONFIG_CEVT_SYSTICK_QUIRK=y +CONFIG_CLKEVT_RT3352=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_MT7620A_EVAL is not set +# CONFIG_DTB_OMEGA2P is not set +CONFIG_DTB_RT_NONE=y +# CONFIG_DTB_VOCORE2 is not set +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIO_CDEV=y +# CONFIG_GPIO_MT7621 is not set +CONFIG_GPIO_RALINK=y +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_ICPLUS_PHY=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MT7621_WDT is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_JIMAGE_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_GSW_MT7620=y +CONFIG_NET_RALINK_MDIO=y +CONFIG_NET_RALINK_MDIO_MT7620=y +CONFIG_NET_RALINK_MT7620=y +# CONFIG_NET_RALINK_RT3050 is not set +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +# CONFIG_NET_VENDOR_MEDIATEK is not set +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MT7620=y +# CONFIG_PINCTRL_MT76X8 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +CONFIG_SOC_MT7620=y +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/mt7621/config-6.6 b/target/linux/ramips/mt7621/config-6.6 new file mode 100644 index 0000000000..9225a9c35c --- /dev/null +++ b/target/linux/ramips/mt7621/config-6.6 @@ -0,0 +1,317 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_AT803X_PHY=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOARD_SCACHE=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +CONFIG_CLKSRC_MIPS_GIC=y +CONFIG_CLK_MT7621=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100 +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MIPSR2_IRQ_EI=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DIMLIB=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MT7621=y +# CONFIG_GPIO_RALINK is not set +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set +CONFIG_GRO_CELLS=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_GPIO=y +CONFIG_I2C_MT7621=y +CONFIG_ICPLUS_PHY=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEDIATEK_GE_PHY=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIKROTIK=y +CONFIG_MIKROTIK_RB_SYSFS=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +CONFIG_MIPS_CM=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_CPC=y +CONFIG_MIPS_CPS=y +# CONFIG_MIPS_CPS_NS16550_BOOL is not set +CONFIG_MIPS_CPU_SCACHE=y +CONFIG_MIPS_GIC=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_MIPS_MT=y +CONFIG_MIPS_MT_FPAFF=y +CONFIG_MIPS_MT_SMP=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=4 +CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MT7621_WDT=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_MT7621=y +CONFIG_MTD_NAND_MTK_BMT=y +# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_ROUTERBOOT_PARTS=y +CONFIG_MTD_SERCOMM_PARTS=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_MTD_SPLIT_MINOR_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_TRX_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MT7530=y +CONFIG_NET_DSA_MT7530_MDIO=y +# CONFIG_NET_DSA_MT7530_MMIO is not set +CONFIG_NET_DSA_TAG_MTK=y +CONFIG_NET_EGRESS=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y +CONFIG_NET_MEDIATEK_SOC=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NET_VENDOR_MEDIATEK=y +# CONFIG_NET_VENDOR_RALINK is not set +CONFIG_NET_XGRESS=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_POOL_STATS=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIE_MT7621=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_DRIVERS_GENERIC=y +CONFIG_PCS_MTK_LYNXI=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +CONFIG_PHYLINK=y +CONFIG_PHY_MT7621_PCI=y +# CONFIG_PHY_RALINK_USB is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AW9523=y +CONFIG_PINCTRL_MT7621=y +CONFIG_PINCTRL_MTK_MTMIPS=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PINCTRL_SX150X=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QCOM_NET_PHYLIB=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RALINK=y +# CONFIG_RALINK_WDT is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_BQ32K=y +CONFIG_RTC_DRV_PCF8563=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +# CONFIG_SCHED_CORE is not set +CONFIG_SCHED_SMT=y +CONFIG_SERIAL_8250_NR_UARTS=3 +CONFIG_SERIAL_8250_RUNTIME_UARTS=3 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +CONFIG_SOC_MT7621=y +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_MT7621=y +# CONFIG_SPI_RT2880 is not set +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_HIGHMEM=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_MIPS_CPS=y +CONFIG_SYS_SUPPORTS_MULTITHREADING=y +CONFIG_SYS_SUPPORTS_SCHED_SMT=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ramips/mt76x8/config-6.6 b/target/linux/ramips/mt76x8/config-6.6 new file mode 100644 index 0000000000..b03b220a71 --- /dev/null +++ b/target/linux/ramips/mt76x8/config-6.6 @@ -0,0 +1,224 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +CONFIG_CEVT_SYSTICK_QUIRK=y +CONFIG_CLKEVT_RT3352=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_MT7620A_EVAL is not set +# CONFIG_DTB_OMEGA2P is not set +CONFIG_DTB_RT_NONE=y +# CONFIG_DTB_VOCORE2 is not set +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MT7621=y +# CONFIG_GPIO_RALINK is not set +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_ICPLUS_PHY=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MT7621_WDT=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set +CONFIG_MTD_PARSER_TRX=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_ESW_RT3050=y +# CONFIG_NET_RALINK_MT7620 is not set +CONFIG_NET_RALINK_RT3050=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +# CONFIG_NET_VENDOR_MEDIATEK is not set +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +# CONFIG_PINCTRL_MT7620 is not set +CONFIG_PINCTRL_MT76X8=y +CONFIG_PINCTRL_MTK_MTMIPS=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +# CONFIG_RALINK_WDT is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_SERIAL_8250_NR_UARTS=3 +CONFIG_SERIAL_8250_RUNTIME_UARTS=3 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +CONFIG_SOC_MT7620=y +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_MT7621=y +# CONFIG_SPI_RT2880 is not set +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/patches-6.6/200-add-ralink-eth.patch b/target/linux/ramips/patches-6.6/200-add-ralink-eth.patch new file mode 100644 index 0000000000..c52c12526b --- /dev/null +++ b/target/linux/ramips/patches-6.6/200-add-ralink-eth.patch @@ -0,0 +1,20 @@ +--- a/drivers/net/ethernet/Kconfig ++++ b/drivers/net/ethernet/Kconfig +@@ -166,6 +166,7 @@ source "drivers/net/ethernet/pensando/Kc + source "drivers/net/ethernet/qlogic/Kconfig" + source "drivers/net/ethernet/brocade/Kconfig" + source "drivers/net/ethernet/qualcomm/Kconfig" ++source "drivers/net/ethernet/ralink/Kconfig" + source "drivers/net/ethernet/rdc/Kconfig" + source "drivers/net/ethernet/realtek/Kconfig" + source "drivers/net/ethernet/renesas/Kconfig" +--- a/drivers/net/ethernet/Makefile ++++ b/drivers/net/ethernet/Makefile +@@ -77,6 +77,7 @@ obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES) + obj-$(CONFIG_NET_VENDOR_PASEMI) += pasemi/ + obj-$(CONFIG_NET_VENDOR_QLOGIC) += qlogic/ + obj-$(CONFIG_NET_VENDOR_QUALCOMM) += qualcomm/ ++obj-$(CONFIG_NET_VENDOR_RALINK) += ralink/ + obj-$(CONFIG_NET_VENDOR_REALTEK) += realtek/ + obj-$(CONFIG_NET_VENDOR_RENESAS) += renesas/ + obj-$(CONFIG_NET_VENDOR_RDC) += rdc/ diff --git a/target/linux/ramips/patches-6.6/300-mt7620-export-chip-version-and-pkg.patch b/target/linux/ramips/patches-6.6/300-mt7620-export-chip-version-and-pkg.patch new file mode 100644 index 0000000000..6b80acec98 --- /dev/null +++ b/target/linux/ramips/patches-6.6/300-mt7620-export-chip-version-and-pkg.patch @@ -0,0 +1,19 @@ +--- a/arch/mips/include/asm/mach-ralink/mt7620.h ++++ b/arch/mips/include/asm/mach-ralink/mt7620.h +@@ -62,4 +62,16 @@ static inline int mt7620_get_eco(void) + return rt_sysc_r32(SYSC_REG_CHIP_REV) & CHIP_REV_ECO_MASK; + } + ++static inline int mt7620_get_chipver(void) ++{ ++ return (rt_sysc_r32(SYSC_REG_CHIP_REV) >> CHIP_REV_VER_SHIFT) & ++ CHIP_REV_VER_MASK; ++} ++ ++static inline int mt7620_get_pkg(void) ++{ ++ return (rt_sysc_r32(SYSC_REG_CHIP_REV) >> CHIP_REV_PKG_SHIFT) & ++ CHIP_REV_PKG_MASK; ++} ++ + #endif diff --git a/target/linux/ramips/patches-6.6/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch b/target/linux/ramips/patches-6.6/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch new file mode 100644 index 0000000000..172cf98ad1 --- /dev/null +++ b/target/linux/ramips/patches-6.6/311-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch @@ -0,0 +1,100 @@ +From ce3d4a4111a5f7e6b4e74bceae5faa6ce388e8ec Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 14 Jul 2013 23:08:11 +0200 +Subject: [PATCH 05/53] MIPS: use set_mode() to enable/disable the cevt-r4k + irq + +Signed-off-by: John Crispin +--- + arch/mips/ralink/Kconfig | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/mips/ralink/Kconfig ++++ b/arch/mips/ralink/Kconfig +@@ -1,12 +1,17 @@ + # SPDX-License-Identifier: GPL-2.0 + if RALINK + ++config CEVT_SYSTICK_QUIRK ++ bool ++ default n ++ + config CLKEVT_RT3352 + bool + depends on SOC_RT305X || SOC_MT7620 + default y + select TIMER_OF + select CLKSRC_MMIO ++ select CEVT_SYSTICK_QUIRK + + config RALINK_ILL_ACC + bool +--- a/arch/mips/kernel/cevt-r4k.c ++++ b/arch/mips/kernel/cevt-r4k.c +@@ -16,6 +16,31 @@ + #include + #include + ++#ifdef CONFIG_CEVT_SYSTICK_QUIRK ++static int mips_state_oneshot(struct clock_event_device *evt) ++{ ++ unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED; ++ if (!cp0_timer_irq_installed) { ++ cp0_timer_irq_installed = 1; ++ if (request_irq(evt->irq, c0_compare_interrupt, flags, "timer", ++ c0_compare_interrupt)) ++ pr_err("Failed to request irq %d (timer)\n", evt->irq); ++ } ++ ++ return 0; ++} ++ ++static int mips_state_shutdown(struct clock_event_device *evt) ++{ ++ if (cp0_timer_irq_installed) { ++ cp0_timer_irq_installed = 0; ++ free_irq(evt->irq, NULL); ++ } ++ ++ return 0; ++} ++#endif ++ + static int mips_next_event(unsigned long delta, + struct clock_event_device *evt) + { +@@ -292,7 +317,9 @@ core_initcall(r4k_register_cpufreq_notif + + int r4k_clockevent_init(void) + { ++#ifndef CONFIG_CEVT_SYSTICK_QUIRK + unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED; ++#endif + unsigned int cpu = smp_processor_id(); + struct clock_event_device *cd; + unsigned int irq, min_delta; +@@ -322,11 +349,16 @@ int r4k_clockevent_init(void) + cd->rating = 300; + cd->irq = irq; + cd->cpumask = cpumask_of(cpu); ++#ifdef CONFIG_CEVT_SYSTICK_QUIRK ++ cd->set_state_shutdown = mips_state_shutdown; ++ cd->set_state_oneshot = mips_state_oneshot; ++#endif + cd->set_next_event = mips_next_event; + cd->event_handler = mips_event_handler; + + clockevents_config_and_register(cd, mips_hpt_frequency, min_delta, 0x7fffffff); + ++#ifndef CONFIG_CEVT_SYSTICK_QUIRK + if (cp0_timer_irq_installed) + return 0; + +@@ -335,6 +367,7 @@ int r4k_clockevent_init(void) + if (request_irq(irq, c0_compare_interrupt, flags, "timer", + c0_compare_interrupt)) + pr_err("Failed to request irq %d (timer)\n", irq); ++#endif + + return 0; + } diff --git a/target/linux/ramips/patches-6.6/312-MIPS-ralink-add-cpu-frequency-scaling.patch b/target/linux/ramips/patches-6.6/312-MIPS-ralink-add-cpu-frequency-scaling.patch new file mode 100644 index 0000000000..0d70770941 --- /dev/null +++ b/target/linux/ramips/patches-6.6/312-MIPS-ralink-add-cpu-frequency-scaling.patch @@ -0,0 +1,195 @@ +From bd30f19a006fb52bac80c6463c49dd2f4159f4ac Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 28 Jul 2013 16:26:41 +0200 +Subject: [PATCH 06/53] MIPS: ralink: add cpu frequency scaling + +This feature will break udelay() and cause the delay loop to have longer delays +when the frequency is scaled causing a performance hit. + +Signed-off-by: John Crispin +--- + arch/mips/ralink/cevt-rt3352.c | 38 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + +--- a/arch/mips/ralink/cevt-rt3352.c ++++ b/arch/mips/ralink/cevt-rt3352.c +@@ -29,6 +29,10 @@ + /* enable the counter */ + #define CFG_CNT_EN 0x1 + ++/* mt7620 frequency scaling defines */ ++#define CLK_LUT_CFG 0x40 ++#define SLEEP_EN BIT(31) ++ + struct systick_device { + void __iomem *membase; + struct clock_event_device dev; +@@ -36,21 +40,53 @@ struct systick_device { + int freq_scale; + }; + ++static void (*systick_freq_scaling)(struct systick_device *sdev, int status); ++ + static int systick_set_oneshot(struct clock_event_device *evt); + static int systick_shutdown(struct clock_event_device *evt); + ++static inline void mt7620_freq_scaling(struct systick_device *sdev, int status) ++{ ++ if (sdev->freq_scale == status) ++ return; ++ ++ sdev->freq_scale = status; ++ ++ pr_info("%s: %s autosleep mode\n", sdev->dev.name, ++ (status) ? ("enable") : ("disable")); ++ if (status) ++ rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) | SLEEP_EN, CLK_LUT_CFG); ++ else ++ rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) & ~SLEEP_EN, CLK_LUT_CFG); ++} ++ ++static inline unsigned int read_count(struct systick_device *sdev) ++{ ++ return ioread32(sdev->membase + SYSTICK_COUNT); ++} ++ ++static inline unsigned int read_compare(struct systick_device *sdev) ++{ ++ return ioread32(sdev->membase + SYSTICK_COMPARE); ++} ++ ++static inline void write_compare(struct systick_device *sdev, unsigned int val) ++{ ++ iowrite32(val, sdev->membase + SYSTICK_COMPARE); ++} ++ + static int systick_next_event(unsigned long delta, + struct clock_event_device *evt) + { + struct systick_device *sdev; +- u32 count; ++ int res; + + sdev = container_of(evt, struct systick_device, dev); +- count = ioread32(sdev->membase + SYSTICK_COUNT); +- count = (count + delta) % SYSTICK_FREQ; +- iowrite32(count, sdev->membase + SYSTICK_COMPARE); ++ delta += read_count(sdev); ++ write_compare(sdev, delta); ++ res = ((int)(read_count(sdev) - delta) >= 0) ? -ETIME : 0; + +- return 0; ++ return res; + } + + static void systick_event_handler(struct clock_event_device *dev) +@@ -60,20 +96,25 @@ static void systick_event_handler(struct + + static irqreturn_t systick_interrupt(int irq, void *dev_id) + { +- struct clock_event_device *dev = (struct clock_event_device *) dev_id; ++ int ret = 0; ++ struct clock_event_device *cdev; ++ struct systick_device *sdev; + +- dev->event_handler(dev); ++ if (read_c0_cause() & STATUSF_IP7) { ++ cdev = (struct clock_event_device *) dev_id; ++ sdev = container_of(cdev, struct systick_device, dev); ++ ++ /* Clear Count/Compare Interrupt */ ++ write_compare(sdev, read_compare(sdev)); ++ cdev->event_handler(cdev); ++ ret = 1; ++ } + +- return IRQ_HANDLED; ++ return IRQ_RETVAL(ret); + } + + static struct systick_device systick = { + .dev = { +- /* +- * cevt-r4k uses 300, make sure systick +- * gets used if available +- */ +- .rating = 310, + .features = CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = systick_next_event, + .set_state_shutdown = systick_shutdown, +@@ -91,7 +132,13 @@ static int systick_shutdown(struct clock + if (sdev->irq_requested) + free_irq(systick.dev.irq, &systick.dev); + sdev->irq_requested = 0; +- iowrite32(0, systick.membase + SYSTICK_CONFIG); ++ iowrite32(CFG_CNT_EN, systick.membase + SYSTICK_CONFIG); ++ ++ if (systick_freq_scaling) ++ systick_freq_scaling(sdev, 0); ++ ++ if (systick_freq_scaling) ++ systick_freq_scaling(sdev, 1); + + return 0; + } +@@ -116,33 +163,46 @@ static int systick_set_oneshot(struct cl + return 0; + } + ++static const struct of_device_id systick_match[] = { ++ { .compatible = "ralink,mt7620a-systick", .data = mt7620_freq_scaling}, ++ {}, ++}; ++ + static int __init ralink_systick_init(struct device_node *np) + { +- int ret; ++ const struct of_device_id *match; ++ int rating = 200; + + systick.membase = of_iomap(np, 0); + if (!systick.membase) + return -ENXIO; + +- systick.dev.name = np->name; +- clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60); +- systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev); +- systick.dev.max_delta_ticks = 0x7fff; +- systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev); +- systick.dev.min_delta_ticks = 0x3; ++ match = of_match_node(systick_match, np); ++ if (match) { ++ systick_freq_scaling = match->data; ++ /* ++ * cevt-r4k uses 300, make sure systick ++ * gets used if available ++ */ ++ rating = 310; ++ } ++ ++ /* enable counter than register clock source */ ++ iowrite32(CFG_CNT_EN, systick.membase + SYSTICK_CONFIG); ++ clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, ++ SYSTICK_FREQ, rating, 16, clocksource_mmio_readl_up); ++ ++ /* register clock event */ + systick.dev.irq = irq_of_parse_and_map(np, 0); + if (!systick.dev.irq) { + pr_err("%pOFn: request_irq failed", np); + return -EINVAL; + } + +- ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, +- SYSTICK_FREQ, 301, 16, +- clocksource_mmio_readl_up); +- if (ret) +- return ret; +- +- clockevents_register_device(&systick.dev); ++ systick.dev.name = np->name; ++ systick.dev.rating = rating; ++ systick.dev.cpumask = cpumask_of(0); ++ clockevents_config_and_register(&systick.dev, SYSTICK_FREQ, 0x3, 0x7fff); + + pr_info("%pOFn: running - mult: %d, shift: %d\n", + np, systick.dev.mult, systick.dev.shift); diff --git a/target/linux/ramips/patches-6.6/314-MIPS-add-bootargs-override-property.patch b/target/linux/ramips/patches-6.6/314-MIPS-add-bootargs-override-property.patch new file mode 100644 index 0000000000..f9975986fe --- /dev/null +++ b/target/linux/ramips/patches-6.6/314-MIPS-add-bootargs-override-property.patch @@ -0,0 +1,63 @@ +From f15d27f9c90ede4b16eb37f9ae573ef81c2b6996 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Thu, 31 Dec 2020 18:49:12 +0100 +Subject: [PATCH] MIPS: add bootargs-override property + +Add support for the bootargs-override property to the chosen node +similar to the one used on ipq806x or mpc85xx. + +This is necessary, as the U-Boot used on some boards, notably the +Ubiquiti UniFi 6 Lite, overwrite the bootargs property of the chosen +node leading to a kernel panic when loading OpenWrt. + +Signed-off-by: David Bauer +--- + arch/mips/kernel/setup.c | 30 ++++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +--- a/arch/mips/kernel/setup.c ++++ b/arch/mips/kernel/setup.c +@@ -563,8 +563,28 @@ static int __init bootcmdline_scan_chose + + #endif /* CONFIG_OF_EARLY_FLATTREE */ + ++static int __init bootcmdline_scan_chosen_override(unsigned long node, const char *uname, ++ int depth, void *data) ++{ ++ bool *dt_bootargs = data; ++ const char *p; ++ int l; ++ ++ if (depth != 1 || !data || strcmp(uname, "chosen") != 0) ++ return 0; ++ ++ p = of_get_flat_dt_prop(node, "bootargs-override", &l); ++ if (p != NULL && l > 0) { ++ strlcpy(boot_command_line, p, COMMAND_LINE_SIZE); ++ *dt_bootargs = true; ++ } ++ ++ return 1; ++} ++ + static void __init bootcmdline_init(void) + { ++ bool dt_bootargs_override = false; + bool dt_bootargs = false; + + /* +@@ -578,6 +598,14 @@ static void __init bootcmdline_init(void + } + + /* ++ * If bootargs-override in the chosen node is set, use this as the ++ * command line ++ */ ++ of_scan_flat_dt(bootcmdline_scan_chosen_override, &dt_bootargs_override); ++ if (dt_bootargs_override) ++ return; ++ ++ /* + * If the user specified a built-in command line & + * MIPS_CMDLINE_BUILTIN_EXTEND, then the built-in command line is + * prepended to arguments from the bootloader or DT so we'll copy them diff --git a/target/linux/ramips/patches-6.6/315-owrt-hack-fix-mt7688-cache-issue.patch b/target/linux/ramips/patches-6.6/315-owrt-hack-fix-mt7688-cache-issue.patch new file mode 100644 index 0000000000..04f0a67325 --- /dev/null +++ b/target/linux/ramips/patches-6.6/315-owrt-hack-fix-mt7688-cache-issue.patch @@ -0,0 +1,28 @@ +From 5ede027f6c4a57ed25da872420508b7f1168b36b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 7 Dec 2015 17:15:32 +0100 +Subject: [PATCH 13/53] owrt: hack: fix mt7688 cache issue + +Signed-off-by: John Crispin +--- + arch/mips/kernel/setup.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/kernel/setup.c ++++ b/arch/mips/kernel/setup.c +@@ -705,7 +705,6 @@ static void __init arch_mem_init(char ** + mips_reserve_vmcore(); + + mips_parse_crashkernel(); +- device_tree_init(); + + /* + * In order to reduce the possibility of kernel panic when failed to +@@ -841,6 +840,7 @@ void __init setup_arch(char **cmdline_p) + + cpu_cache_init(); + paging_init(); ++ device_tree_init(); + + memblock_dump_all(); + diff --git a/target/linux/ramips/patches-6.6/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch b/target/linux/ramips/patches-6.6/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch new file mode 100644 index 0000000000..1dc54ccf23 --- /dev/null +++ b/target/linux/ramips/patches-6.6/316-arch-mips-do-not-select-illegal-access-driver-by-def.patch @@ -0,0 +1,25 @@ +From 9e6ce539092a1dd605a20bf73c655a9de58d8641 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 7 Dec 2015 17:18:05 +0100 +Subject: [PATCH 15/53] arch: mips: do not select illegal access driver by + default + +Signed-off-by: John Crispin +--- + arch/mips/ralink/Kconfig | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/mips/ralink/Kconfig ++++ b/arch/mips/ralink/Kconfig +@@ -14,9 +14,9 @@ config CLKEVT_RT3352 + select CEVT_SYSTICK_QUIRK + + config RALINK_ILL_ACC +- bool ++ bool "illegal access irq" + depends on SOC_RT305X +- default y ++ default n + + config IRQ_INTC + bool diff --git a/target/linux/ramips/patches-6.6/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch b/target/linux/ramips/patches-6.6/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch new file mode 100644 index 0000000000..ef54835f89 --- /dev/null +++ b/target/linux/ramips/patches-6.6/320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch @@ -0,0 +1,75 @@ +From 6decd1aad15f56b169217789630a0098b496de0e Mon Sep 17 00:00:00 2001 +From: Ilya Lipnitskiy +Date: Wed, 7 Apr 2021 13:07:38 -0700 +Subject: [PATCH] MIPS: add support for buggy MT7621S core detection + +Most MT7621 SoCs have 2 cores, which is detected and supported properly +by CPS. + +Unfortunately, MT7621 SoC has a less common S variant with only one core. +On MT7621S, GCR_CONFIG still reports 2 cores, which leads to hangs when +starting SMP. CPULAUNCH registers can be used in that case to detect the +absence of the second core and override the GCR_CONFIG PCORES field. + +Rework a long-standing OpenWrt patch to override the value of +mips_cps_numcores on single-core MT7621 systems. + +Tested on a dual-core MT7621 device (Ubiquiti ER-X) and a single-core +MT7621 device (Netgear R6220). + +Original 4.14 OpenWrt patch: +Link: https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=4cdbc90a376dd0555201c1434a2081e055e9ceb7 +Current 5.10 OpenWrt patch: +Link: https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/ramips/patches-5.10/320-mt7621-core-detect-hack.patch;h=c63f0f4c1ec742e24d8480e80553863744b58f6a;hb=10267e17299806f9885d086147878f6c492cb904 + +Suggested-by: Felix Fietkau +Signed-off-by: Ilya Lipnitskiy +Signed-off-by: Thomas Bogendoerfer +--- + arch/mips/include/asm/mips-cps.h | 23 ++++++++++++++++++++++- + 1 file changed, 22 insertions(+), 1 deletion(-) + +--- a/arch/mips/include/asm/mips-cps.h ++++ b/arch/mips/include/asm/mips-cps.h +@@ -11,6 +11,8 @@ + #include + #include + ++#include ++ + extern unsigned long __cps_access_bad_size(void) + __compiletime_error("Bad size for CPS accessor"); + +@@ -162,12 +164,31 @@ static inline uint64_t mips_cps_cluster_ + */ + static inline unsigned int mips_cps_numcores(unsigned int cluster) + { ++ unsigned int ncores; ++ + if (!mips_cm_present()) + return 0; + + /* Add one before masking to handle 0xff indicating no cores */ +- return FIELD_GET(CM_GCR_CONFIG_PCORES, ++ ncores = FIELD_GET(CM_GCR_CONFIG_PCORES, + mips_cps_cluster_config(cluster) + 1); ++ ++ if (IS_ENABLED(CONFIG_SOC_MT7621)) { ++ struct cpulaunch *launch; ++ ++ /* ++ * Ralink MT7621S SoC is single core, but the GCR_CONFIG method ++ * always reports 2 cores. Check the second core's LAUNCH_FREADY ++ * flag to detect if the second core is missing. This method ++ * only works before the core has been started. ++ */ ++ launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); ++ launch += 2; /* MT7621 has 2 VPEs per core */ ++ if (!(launch->flags & LAUNCH_FREADY)) ++ ncores = 1; ++ } ++ ++ return ncores; + } + + /** diff --git a/target/linux/ramips/patches-6.6/324-mt7621-perfctr-fix.patch b/target/linux/ramips/patches-6.6/324-mt7621-perfctr-fix.patch new file mode 100644 index 0000000000..dfeac7eb99 --- /dev/null +++ b/target/linux/ramips/patches-6.6/324-mt7621-perfctr-fix.patch @@ -0,0 +1,15 @@ +--- a/arch/mips/ralink/irq-gic.c ++++ b/arch/mips/ralink/irq-gic.c +@@ -13,6 +13,12 @@ + + int get_c0_perfcount_int(void) + { ++ /* ++ * Performance counter events are routed through GIC. ++ * Prevent them from firing on CPU IRQ7 as well ++ */ ++ clear_c0_status(IE_SW0 << 7); ++ + return gic_get_c0_perfcount_int(); + } + EXPORT_SYMBOL_GPL(get_c0_perfcount_int); diff --git a/target/linux/ramips/patches-6.6/400-mtd-cfi-cmdset-0002-force-word-write.patch b/target/linux/ramips/patches-6.6/400-mtd-cfi-cmdset-0002-force-word-write.patch new file mode 100644 index 0000000000..a1b861e412 --- /dev/null +++ b/target/linux/ramips/patches-6.6/400-mtd-cfi-cmdset-0002-force-word-write.patch @@ -0,0 +1,20 @@ +From ee9081b2726a5ca8cde5497afdc5425e21ff8f8b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 15 Jul 2013 00:39:21 +0200 +Subject: [PATCH 37/53] mtd: cfi cmdset 0002 force word write + +--- + drivers/mtd/chips/cfi_cmdset_0002.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/mtd/chips/cfi_cmdset_0002.c ++++ b/drivers/mtd/chips/cfi_cmdset_0002.c +@@ -38,7 +38,7 @@ + #include + + #define AMD_BOOTLOC_BUG +-#define FORCE_WORD_WRITE 0 ++#define FORCE_WORD_WRITE 1 + + #define MAX_RETRIES 3 + diff --git a/target/linux/ramips/patches-6.6/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch b/target/linux/ramips/patches-6.6/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch new file mode 100644 index 0000000000..0e68aa5907 --- /dev/null +++ b/target/linux/ramips/patches-6.6/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch @@ -0,0 +1,75 @@ +From 52d14545d2fc276b1bf9ccf48d4612fab6edfb6a Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Thu, 6 May 2021 17:49:55 +0200 +Subject: [PATCH] mtd: spi-nor: Add support for BoHong bh25q128as + +Add MTD support for the BoHong bh25q128as SPI NOR chip. +The chip has 16MB of total capacity, divided into a total of 256 +sectors, each 64KB sized. The chip also supports 4KB sectors. +Additionally, it supports dual and quad read modes. + +Functionality was verified on an Tenbay WR1800K / MTK MT7621 board. + +Signed-off-by: David Bauer +--- + drivers/mtd/spi-nor/Makefile | 1 + + drivers/mtd/spi-nor/bohong.c | 21 +++++++++++++++++++++ + drivers/mtd/spi-nor/core.c | 1 + + drivers/mtd/spi-nor/core.h | 1 + + 4 files changed, 24 insertions(+) + create mode 100644 drivers/mtd/spi-nor/bohong.c + +--- a/drivers/mtd/spi-nor/Makefile ++++ b/drivers/mtd/spi-nor/Makefile +@@ -2,6 +2,7 @@ + + spi-nor-objs := core.o sfdp.o swp.o otp.o sysfs.o + spi-nor-objs += atmel.o ++spi-nor-objs += bohong.o + spi-nor-objs += catalyst.o + spi-nor-objs += eon.o + spi-nor-objs += esmt.o +--- /dev/null ++++ b/drivers/mtd/spi-nor/bohong.c +@@ -0,0 +1,21 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2005, Intec Automation Inc. ++ * Copyright (C) 2014, Freescale Semiconductor, Inc. ++ */ ++ ++#include ++ ++#include "core.h" ++ ++static const struct flash_info bohong_parts[] = { ++ /* BoHong Microelectronics */ ++ { "bh25q128as", INFO(0x684018, 0, 64 * 1024, 256) ++ NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++}; ++ ++const struct spi_nor_manufacturer spi_nor_bohong = { ++ .name = "bohong", ++ .parts = bohong_parts, ++ .nparts = ARRAY_SIZE(bohong_parts), ++}; +--- a/drivers/mtd/spi-nor/core.c ++++ b/drivers/mtd/spi-nor/core.c +@@ -2001,6 +2001,7 @@ int spi_nor_sr2_bit7_quad_enable(struct + + static const struct spi_nor_manufacturer *manufacturers[] = { + &spi_nor_atmel, ++ &spi_nor_bohong, + &spi_nor_catalyst, + &spi_nor_eon, + &spi_nor_esmt, +--- a/drivers/mtd/spi-nor/core.h ++++ b/drivers/mtd/spi-nor/core.h +@@ -631,6 +631,7 @@ struct sfdp { + + /* Manufacturer drivers. */ + extern const struct spi_nor_manufacturer spi_nor_atmel; ++extern const struct spi_nor_manufacturer spi_nor_bohong; + extern const struct spi_nor_manufacturer spi_nor_catalyst; + extern const struct spi_nor_manufacturer spi_nor_eon; + extern const struct spi_nor_manufacturer spi_nor_esmt; diff --git a/target/linux/ramips/patches-6.6/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/target/linux/ramips/patches-6.6/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch new file mode 100644 index 0000000000..51f1a5ec5e --- /dev/null +++ b/target/linux/ramips/patches-6.6/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch @@ -0,0 +1,47 @@ +From e84e2430ee0e483842b4ff013ae8a6e7e2fa2734 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Wed, 1 Apr 2020 02:07:58 +0800 +Subject: [PATCH 1/2] mtd: rawnand: add driver support for MT7621 nand + flash controller + +This patch adds NAND flash controller driver for MediaTek MT7621 SoC. + +The NAND flash controller is similar with controllers described in +mtk_nand.c, except that the controller from MT7621 doesn't support DMA +transmission, and some registers' offset and fields are different. + +Signed-off-by: Weijie Gao +--- + drivers/mtd/nand/raw/Kconfig | 8 + + drivers/mtd/nand/raw/Makefile | 1 + + drivers/mtd/nand/raw/mt7621_nand.c | 1348 ++++++++++++++++++++++++++++++++++++ + 3 files changed, 1357 insertions(+) + create mode 100644 drivers/mtd/nand/raw/mt7621_nand.c + +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -338,6 +338,14 @@ config MTD_NAND_QCOM + Enables support for NAND flash chips on SoCs containing the EBI2 NAND + controller. This controller is found on IPQ806x SoC. + ++config MTD_NAND_MT7621 ++ tristate "MT7621 NAND controller" ++ depends on SOC_MT7621 || COMPILE_TEST ++ depends on HAS_IOMEM ++ help ++ Enables support for NAND controller on MT7621 SoC. ++ This driver uses PIO mode for data transmission instead of DMA mode. ++ + config MTD_NAND_MTK + tristate "MTK NAND controller" + depends on MTD_NAND_ECC_MEDIATEK +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -46,6 +46,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI) += sunxi_n + obj-$(CONFIG_MTD_NAND_HISI504) += hisi504_nand.o + obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand/ + obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nandc.o ++obj-$(CONFIG_MTD_NAND_MT7621) += mt7621_nand.o + obj-$(CONFIG_MTD_NAND_MTK) += mtk_nand.o + obj-$(CONFIG_MTD_NAND_MXIC) += mxic_nand.o + obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o diff --git a/target/linux/ramips/patches-6.6/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch b/target/linux/ramips/patches-6.6/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch new file mode 100644 index 0000000000..3d122c10c0 --- /dev/null +++ b/target/linux/ramips/patches-6.6/411-dt-bindings-add-documentation-for-mt7621-nand-driver.patch @@ -0,0 +1,85 @@ +From 3d5f4da8296b23eb3abf8b13122b0d06a215e79c Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Wed, 1 Apr 2020 02:07:59 +0800 +Subject: [PATCH 2/2] dt-bindings: add documentation for mt7621-nand driver + +This patch adds documentation for MediaTek MT7621 NAND flash controller +driver. + +Signed-off-by: Weijie Gao +--- + .../bindings/mtd/mediatek,mt7621-nfc.yaml | 68 ++++++++++++++++++++++ + 1 file changed, 68 insertions(+) + create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml +@@ -0,0 +1,68 @@ ++# SPDX-License-Identifier: GPL-2.0 ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/mtd/mediatek,mt7621-nfc.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: MediaTek MT7621 SoC NAND Flash Controller (NFC) DT binding ++ ++maintainers: ++ - Weijie Gao ++ ++description: | ++ This driver uses a single node to describe both NAND Flash controller ++ interface (NFI) and ECC engine for MT7621 SoC. ++ MT7621 supports only one chip select. ++ ++properties: ++ "#address-cells": false ++ "#size-cells": false ++ ++ compatible: ++ enum: ++ - mediatek,mt7621-nfc ++ ++ reg: ++ items: ++ - description: Register base of NFI core ++ - description: Register base of ECC engine ++ ++ reg-names: ++ items: ++ - const: nfi ++ - const: ecc ++ ++ clocks: ++ items: ++ - description: Source clock for NFI core, fixed 125MHz ++ ++ clock-names: ++ items: ++ - const: nfi_clk ++ ++required: ++ - compatible ++ - reg ++ - reg-names ++ - clocks ++ - clock-names ++ ++examples: ++ - | ++ nficlock: nficlock { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ ++ clock-frequency = <125000000>; ++ }; ++ ++ nand@1e003000 { ++ compatible = "mediatek,mt7621-nfc"; ++ ++ reg = <0x1e003000 0x800 ++ 0x1e003800 0x800>; ++ reg-names = "nfi", "ecc"; ++ ++ clocks = <&nficlock>; ++ clock-names = "nfi_clk"; ++ }; diff --git a/target/linux/ramips/patches-6.6/700-net-ethernet-mediatek-support-net-labels.patch b/target/linux/ramips/patches-6.6/700-net-ethernet-mediatek-support-net-labels.patch new file mode 100644 index 0000000000..0a7f7785db --- /dev/null +++ b/target/linux/ramips/patches-6.6/700-net-ethernet-mediatek-support-net-labels.patch @@ -0,0 +1,34 @@ +From bd0f89de5476ca25e73fae829ba3e1dafae1d90d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= +Date: Fri, 21 Jun 2019 10:04:05 +0200 +Subject: [PATCH] net: ethernet: mediatek: support net-labels + +With this patch, device name can be set within dts file in the same way as dsa +port can. +Add: label = "wan"; to GMAC node. + +Signed-off-by: René van Dorst +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -4662,6 +4662,7 @@ static const struct net_device_ops mtk_n + + static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) + { ++ const char *name = of_get_property(np, "label", NULL); + const __be32 *_id = of_get_property(np, "reg", NULL); + struct device_node *pcs_np; + phy_interface_t phy_mode; +@@ -4875,6 +4876,9 @@ static int mtk_add_mac(struct mtk_eth *e + NETDEV_XDP_ACT_NDO_XMIT | + NETDEV_XDP_ACT_NDO_XMIT_SG; + ++ if (name) ++ strlcpy(eth->netdev[id]->name, name, IFNAMSIZ); ++ + return 0; + + free_netdev: diff --git a/target/linux/ramips/patches-6.6/720-Revert-net-phy-simplify-phy_link_change-arguments.patch b/target/linux/ramips/patches-6.6/720-Revert-net-phy-simplify-phy_link_change-arguments.patch new file mode 100644 index 0000000000..f45544369d --- /dev/null +++ b/target/linux/ramips/patches-6.6/720-Revert-net-phy-simplify-phy_link_change-arguments.patch @@ -0,0 +1,118 @@ +From ffbb1b37a3e1ce1a5c574a6bd4f5aede8bc468ac Mon Sep 17 00:00:00 2001 +From: Ilya Lipnitskiy +Date: Sat, 27 Feb 2021 20:20:07 -0800 +Subject: [PATCH] Revert "net: phy: simplify phy_link_change arguments" + +This reverts commit a307593a644443db12888f45eed0dafb5869e2cc. + +This brings back the do_carrier flags used by the (hacky) next patch, +still required by target/linux/ramips/files/drivers/net/ethernet/ralink/mdio.c +--- + drivers/net/phy/phy.c | 12 ++++++------ + drivers/net/phy/phy_device.c | 12 +++++++----- + drivers/net/phy/phylink.c | 3 ++- + include/linux/phy.h | 2 +- + 4 files changed, 16 insertions(+), 13 deletions(-) + +--- a/drivers/net/phy/phy.c ++++ b/drivers/net/phy/phy.c +@@ -72,13 +72,13 @@ static void phy_process_state_change(str + + static void phy_link_up(struct phy_device *phydev) + { +- phydev->phy_link_change(phydev, true); ++ phydev->phy_link_change(phydev, true, true); + phy_led_trigger_change_speed(phydev); + } + +-static void phy_link_down(struct phy_device *phydev) ++static void phy_link_down(struct phy_device *phydev, bool do_carrier) + { +- phydev->phy_link_change(phydev, false); ++ phydev->phy_link_change(phydev, false, do_carrier); + phy_led_trigger_change_speed(phydev); + WRITE_ONCE(phydev->link_down_events, phydev->link_down_events + 1); + } +@@ -823,7 +823,7 @@ int phy_start_cable_test(struct phy_devi + goto out; + + /* Mark the carrier down until the test is complete */ +- phy_link_down(phydev); ++ phy_link_down(phydev, true); + + netif_testing_on(dev); + err = phydev->drv->cable_test_start(phydev); +@@ -894,7 +894,7 @@ int phy_start_cable_test_tdr(struct phy_ + goto out; + + /* Mark the carrier down until the test is complete */ +- phy_link_down(phydev); ++ phy_link_down(phydev, true); + + netif_testing_on(dev); + err = phydev->drv->cable_test_tdr_start(phydev, config); +@@ -966,7 +966,7 @@ static int phy_check_link_status(struct + phy_link_up(phydev); + } else if (!phydev->link && phydev->state != PHY_NOLINK) { + phydev->state = PHY_NOLINK; +- phy_link_down(phydev); ++ phy_link_down(phydev, true); + } + + return 0; +@@ -1485,7 +1485,7 @@ void phy_state_machine(struct work_struc + case PHY_ERROR: + if (phydev->link) { + phydev->link = 0; +- phy_link_down(phydev); ++ phy_link_down(phydev, true); + } + do_suspend = true; + break; +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -1069,14 +1069,16 @@ struct phy_device *phy_find_first(struct + } + EXPORT_SYMBOL(phy_find_first); + +-static void phy_link_change(struct phy_device *phydev, bool up) ++static void phy_link_change(struct phy_device *phydev, bool up, bool do_carrier) + { + struct net_device *netdev = phydev->attached_dev; + +- if (up) +- netif_carrier_on(netdev); +- else +- netif_carrier_off(netdev); ++ if (do_carrier) { ++ if (up) ++ netif_carrier_on(netdev); ++ else ++ netif_carrier_off(netdev); ++ } + phydev->adjust_link(netdev); + if (phydev->mii_ts && phydev->mii_ts->link_state) + phydev->mii_ts->link_state(phydev->mii_ts, phydev); +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -1724,7 +1724,8 @@ bool phylink_expects_phy(struct phylink + } + EXPORT_SYMBOL_GPL(phylink_expects_phy); + +-static void phylink_phy_change(struct phy_device *phydev, bool up) ++static void phylink_phy_change(struct phy_device *phydev, bool up, ++ bool do_carrier) + { + struct phylink *pl = phydev->phylink; + bool tx_pause, rx_pause; +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -758,7 +758,7 @@ struct phy_device { + + unsigned int link_down_events; + +- void (*phy_link_change)(struct phy_device *phydev, bool up); ++ void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); + void (*adjust_link)(struct net_device *dev); + + #if IS_ENABLED(CONFIG_MACSEC) diff --git a/target/linux/ramips/patches-6.6/721-NET-no-auto-carrier-off-support.patch b/target/linux/ramips/patches-6.6/721-NET-no-auto-carrier-off-support.patch new file mode 100644 index 0000000000..e594ead86f --- /dev/null +++ b/target/linux/ramips/patches-6.6/721-NET-no-auto-carrier-off-support.patch @@ -0,0 +1,47 @@ +From 0b6eb1e68290243d439ee330ea8d0b239a5aec69 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 27 Jul 2014 09:38:50 +0100 +Subject: [PATCH 34/53] NET: multi phy support + +Signed-off-by: John Crispin +--- + drivers/net/phy/phy.c | 9 ++++++--- + include/linux/phy.h | 1 + + 2 files changed, 7 insertions(+), 3 deletions(-) + +--- a/drivers/net/phy/phy.c ++++ b/drivers/net/phy/phy.c +@@ -966,7 +966,10 @@ static int phy_check_link_status(struct + phy_link_up(phydev); + } else if (!phydev->link && phydev->state != PHY_NOLINK) { + phydev->state = PHY_NOLINK; +- phy_link_down(phydev, true); ++ if (!phydev->no_auto_carrier_off) ++ phy_link_down(phydev, true); ++ else ++ phy_link_down(phydev, false); + } + + return 0; +@@ -1485,7 +1488,10 @@ void phy_state_machine(struct work_struc + case PHY_ERROR: + if (phydev->link) { + phydev->link = 0; +- phy_link_down(phydev, true); ++ if (!phydev->no_auto_carrier_off) ++ phy_link_down(phydev, true); ++ else ++ phy_link_down(phydev, false); + } + do_suspend = true; + break; +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -659,6 +659,7 @@ struct phy_device { + unsigned downshifted_rate:1; + unsigned is_on_sfp_module:1; + unsigned mac_managed_pm:1; ++ unsigned no_auto_carrier_off:1; + unsigned wol_enabled:1; + + unsigned autoneg:1; diff --git a/target/linux/ramips/patches-6.6/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch b/target/linux/ramips/patches-6.6/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch new file mode 100644 index 0000000000..a793011223 --- /dev/null +++ b/target/linux/ramips/patches-6.6/800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch @@ -0,0 +1,37 @@ +From d94fc5ce1dc395747c3934ecffcdec0396583755 Mon Sep 17 00:00:00 2001 +From: Nick Hainke +Date: Fri, 26 May 2023 19:46:33 +0200 +Subject: [PATCH] dmaengine: mediatek: add HSDMA support for mt7621 + +Commit 87dd67f496f7 ("staging: mt7621-dma: remove driver from tree") +removed the mt7621-dma driver. Move the driver from staging to the +folder "drivers/dma/mediatek" containing already other mediatek dma +driver implementations and maintain it downstream in OpenWrt. + +This patch will not be sent to upstream linux. It is just a workaround. + +Signed-off-by: Nick Hainke +--- + drivers/dma/mediatek/Kconfig | 6 ++++++ + drivers/dma/mediatek/Makefile | 1 + + 2 files changed, 7 insertions(+) + +--- a/drivers/dma/mediatek/Kconfig ++++ b/drivers/dma/mediatek/Kconfig +@@ -36,3 +36,9 @@ config MTK_UART_APDMA + When SERIAL_8250_MT6577 is enabled, and if you want to use DMA, + you can enable the config. The DMA engine can only be used + with MediaTek SoCs. ++ ++config MTK_HSDMA ++ tristate "MTK HSDMA support" ++ depends on RALINK && SOC_MT7621 ++ select DMA_ENGINE ++ select DMA_VIRTUAL_CHANNELS +--- a/drivers/dma/mediatek/Makefile ++++ b/drivers/dma/mediatek/Makefile +@@ -2,3 +2,4 @@ + obj-$(CONFIG_MTK_UART_APDMA) += mtk-uart-apdma.o + obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o + obj-$(CONFIG_MTK_CQDMA) += mtk-cqdma.o ++obj-$(CONFIG_MTK_HSDMA) += hsdma-mt7621.o diff --git a/target/linux/ramips/patches-6.6/801-DT-Add-documentation-for-gpio-ralink.patch b/target/linux/ramips/patches-6.6/801-DT-Add-documentation-for-gpio-ralink.patch new file mode 100644 index 0000000000..93dabf8776 --- /dev/null +++ b/target/linux/ramips/patches-6.6/801-DT-Add-documentation-for-gpio-ralink.patch @@ -0,0 +1,59 @@ +From d410e5478c622c01fcf31427533df5f433df9146 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 28 Jul 2013 19:45:30 +0200 +Subject: [PATCH 26/53] DT: Add documentation for gpio-ralink + +Describe gpio-ralink binding. + +Signed-off-by: John Crispin +Cc: linux-mips@linux-mips.org +Cc: devicetree@vger.kernel.org +Cc: linux-gpio@vger.kernel.org +--- + .../devicetree/bindings/gpio/gpio-ralink.txt | 40 ++++++++++++++++++++ + 1 file changed, 40 insertions(+) + create mode 100644 Documentation/devicetree/bindings/gpio/gpio-ralink.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt +@@ -0,0 +1,40 @@ ++Ralink SoC GPIO controller bindings ++ ++Required properties: ++- compatible: ++ - "ralink,rt2880-gpio" for Ralink controllers ++- #gpio-cells : Should be two. ++ - first cell is the pin number ++ - second cell is used to specify optional parameters (unused) ++- gpio-controller : Marks the device node as a GPIO controller ++- reg : Physical base address and length of the controller's registers ++- interrupt-parent: phandle to the INTC device node ++- interrupts : Specify the INTC interrupt number ++- ngpios : Specify the number of GPIOs ++- ralink,register-map : The register layout depends on the GPIO bank and actual ++ SoC type. Register offsets need to be in this order. ++ [ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ] ++ ++Optional properties: ++- ralink,gpio-base : Specify the GPIO chips base number ++ ++Example: ++ ++ gpio0: gpio@600 { ++ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio"; ++ ++ #gpio-cells = <2>; ++ gpio-controller; ++ ++ reg = <0x600 0x34>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <6>; ++ ++ ngpios = <24>; ++ ralink,gpio-base = <0>; ++ ralink,register-map = [ 00 04 08 0c ++ 20 24 28 2c ++ 30 34 ]; ++ ++ }; diff --git a/target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch b/target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch new file mode 100644 index 0000000000..75a7374054 --- /dev/null +++ b/target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch @@ -0,0 +1,416 @@ +From 69fdd2c4f937796b934e89c33acde9d082e27bfd Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 4 Aug 2014 20:36:29 +0200 +Subject: [PATCH 27/53] GPIO: MIPS: ralink: add gpio driver for ralink SoC + +Add gpio driver for Ralink SoC. This driver makes the gpio core on +RT2880, RT305x, rt3352, rt3662, rt3883, rt5350 and mt7620 work. + +Signed-off-by: John Crispin +Cc: linux-mips@linux-mips.org +Cc: linux-gpio@vger.kernel.org +--- + arch/mips/include/asm/mach-ralink/gpio.h | 24 ++ + drivers/gpio/Kconfig | 6 + + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-ralink.c | 355 ++++++++++++++++++++++++++++++ + 4 files changed, 386 insertions(+) + create mode 100644 arch/mips/include/asm/mach-ralink/gpio.h + create mode 100644 drivers/gpio/gpio-ralink.c + +--- /dev/null ++++ b/arch/mips/include/asm/mach-ralink/gpio.h +@@ -0,0 +1,24 @@ ++/* ++ * Ralink SoC GPIO API support ++ * ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ */ ++ ++#ifndef __ASM_MACH_RALINK_GPIO_H ++#define __ASM_MACH_RALINK_GPIO_H ++ ++#define ARCH_NR_GPIOS 128 ++#include ++ ++#define gpio_get_value __gpio_get_value ++#define gpio_set_value __gpio_set_value ++#define gpio_cansleep __gpio_cansleep ++#define gpio_to_irq __gpio_to_irq ++ ++#endif /* __ASM_MACH_RALINK_GPIO_H */ +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -594,6 +594,12 @@ config GPIO_SNPS_CREG + where only several fields in register belong to GPIO lines and + each GPIO line owns a field with different length and on/off value. + ++config GPIO_RALINK ++ bool "Ralink GPIO Support" ++ depends on RALINK ++ help ++ Say yes here to support the Ralink SoC GPIO device ++ + config GPIO_SPEAR_SPICS + bool "ST SPEAr13xx SPI Chip Select as GPIO support" + depends on PLAT_SPEAR +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -130,6 +130,7 @@ obj-$(CONFIG_GPIO_PISOSR) += gpio-pisos + obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o + obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o + obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o ++obj-$(CONFIG_GPIO_RALINK) += gpio-ralink.o + obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o + obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o + obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o +--- /dev/null ++++ b/drivers/gpio/gpio-ralink.c +@@ -0,0 +1,341 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ * Copyright (C) 2009-2011 Gabor Juhos ++ * Copyright (C) 2013 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++enum ralink_gpio_reg { ++ GPIO_REG_INT = 0, ++ GPIO_REG_EDGE, ++ GPIO_REG_RENA, ++ GPIO_REG_FENA, ++ GPIO_REG_DATA, ++ GPIO_REG_DIR, ++ GPIO_REG_POL, ++ GPIO_REG_SET, ++ GPIO_REG_RESET, ++ GPIO_REG_TOGGLE, ++ GPIO_REG_MAX ++}; ++ ++struct ralink_gpio_chip { ++ struct gpio_chip chip; ++ u8 regs[GPIO_REG_MAX]; ++ ++ spinlock_t lock; ++ void __iomem *membase; ++ struct irq_domain *domain; ++ int irq; ++ ++ u32 rising; ++ u32 falling; ++}; ++ ++#define MAP_MAX 4 ++static struct irq_domain *irq_map[MAP_MAX]; ++static int irq_map_count; ++static atomic_t irq_refcount = ATOMIC_INIT(0); ++ ++static inline struct ralink_gpio_chip *to_ralink_gpio(struct gpio_chip *chip) ++{ ++ struct ralink_gpio_chip *rg; ++ ++ rg = container_of(chip, struct ralink_gpio_chip, chip); ++ ++ return rg; ++} ++ ++static inline void rt_gpio_w32(struct ralink_gpio_chip *rg, u8 reg, u32 val) ++{ ++ iowrite32(val, rg->membase + rg->regs[reg]); ++} ++ ++static inline u32 rt_gpio_r32(struct ralink_gpio_chip *rg, u8 reg) ++{ ++ return ioread32(rg->membase + rg->regs[reg]); ++} ++ ++static void ralink_gpio_set(struct gpio_chip *chip, unsigned offset, int value) ++{ ++ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); ++ ++ rt_gpio_w32(rg, (value) ? GPIO_REG_SET : GPIO_REG_RESET, BIT(offset)); ++} ++ ++static int ralink_gpio_get(struct gpio_chip *chip, unsigned offset) ++{ ++ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); ++ ++ return !!(rt_gpio_r32(rg, GPIO_REG_DATA) & BIT(offset)); ++} ++ ++static int ralink_gpio_direction_input(struct gpio_chip *chip, unsigned offset) ++{ ++ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); ++ unsigned long flags; ++ u32 t; ++ ++ spin_lock_irqsave(&rg->lock, flags); ++ t = rt_gpio_r32(rg, GPIO_REG_DIR); ++ t &= ~BIT(offset); ++ rt_gpio_w32(rg, GPIO_REG_DIR, t); ++ spin_unlock_irqrestore(&rg->lock, flags); ++ ++ return 0; ++} ++ ++static int ralink_gpio_direction_output(struct gpio_chip *chip, ++ unsigned offset, int value) ++{ ++ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); ++ unsigned long flags; ++ u32 t; ++ ++ spin_lock_irqsave(&rg->lock, flags); ++ ralink_gpio_set(chip, offset, value); ++ t = rt_gpio_r32(rg, GPIO_REG_DIR); ++ t |= BIT(offset); ++ rt_gpio_w32(rg, GPIO_REG_DIR, t); ++ spin_unlock_irqrestore(&rg->lock, flags); ++ ++ return 0; ++} ++ ++static int ralink_gpio_to_irq(struct gpio_chip *chip, unsigned pin) ++{ ++ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); ++ ++ if (rg->irq < 1) ++ return -1; ++ ++ return irq_create_mapping(rg->domain, pin); ++} ++ ++static void ralink_gpio_irq_handler(struct irq_desc *desc) ++{ ++ int i; ++ ++ for (i = 0; i < irq_map_count; i++) { ++ struct irq_domain *domain = irq_map[i]; ++ struct ralink_gpio_chip *rg; ++ unsigned long pending; ++ int bit; ++ ++ rg = (struct ralink_gpio_chip *) domain->host_data; ++ pending = rt_gpio_r32(rg, GPIO_REG_INT); ++ ++ for_each_set_bit(bit, &pending, rg->chip.ngpio) { ++ u32 map = irq_find_mapping(domain, bit); ++ generic_handle_irq(map); ++ rt_gpio_w32(rg, GPIO_REG_INT, BIT(bit)); ++ } ++ } ++} ++ ++static void ralink_gpio_irq_unmask(struct irq_data *d) ++{ ++ struct ralink_gpio_chip *rg; ++ unsigned long flags; ++ u32 rise, fall; ++ ++ rg = (struct ralink_gpio_chip *) d->domain->host_data; ++ rise = rt_gpio_r32(rg, GPIO_REG_RENA); ++ fall = rt_gpio_r32(rg, GPIO_REG_FENA); ++ ++ spin_lock_irqsave(&rg->lock, flags); ++ rt_gpio_w32(rg, GPIO_REG_RENA, rise | (BIT(d->hwirq) & rg->rising)); ++ rt_gpio_w32(rg, GPIO_REG_FENA, fall | (BIT(d->hwirq) & rg->falling)); ++ spin_unlock_irqrestore(&rg->lock, flags); ++} ++ ++static void ralink_gpio_irq_mask(struct irq_data *d) ++{ ++ struct ralink_gpio_chip *rg; ++ unsigned long flags; ++ u32 rise, fall; ++ ++ rg = (struct ralink_gpio_chip *) d->domain->host_data; ++ rise = rt_gpio_r32(rg, GPIO_REG_RENA); ++ fall = rt_gpio_r32(rg, GPIO_REG_FENA); ++ ++ spin_lock_irqsave(&rg->lock, flags); ++ rt_gpio_w32(rg, GPIO_REG_FENA, fall & ~BIT(d->hwirq)); ++ rt_gpio_w32(rg, GPIO_REG_RENA, rise & ~BIT(d->hwirq)); ++ spin_unlock_irqrestore(&rg->lock, flags); ++} ++ ++static int ralink_gpio_irq_type(struct irq_data *d, unsigned int type) ++{ ++ struct ralink_gpio_chip *rg; ++ u32 mask = BIT(d->hwirq); ++ ++ rg = (struct ralink_gpio_chip *) d->domain->host_data; ++ ++ if (type == IRQ_TYPE_PROBE) { ++ if ((rg->rising | rg->falling) & mask) ++ return 0; ++ ++ type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; ++ } ++ ++ if (type & IRQ_TYPE_EDGE_RISING) ++ rg->rising |= mask; ++ else ++ rg->rising &= ~mask; ++ ++ if (type & IRQ_TYPE_EDGE_FALLING) ++ rg->falling |= mask; ++ else ++ rg->falling &= ~mask; ++ ++ return 0; ++} ++ ++static struct irq_chip ralink_gpio_irq_chip = { ++ .name = "GPIO", ++ .irq_unmask = ralink_gpio_irq_unmask, ++ .irq_mask = ralink_gpio_irq_mask, ++ .irq_mask_ack = ralink_gpio_irq_mask, ++ .irq_set_type = ralink_gpio_irq_type, ++}; ++ ++static int gpio_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) ++{ ++ irq_set_chip_and_handler(irq, &ralink_gpio_irq_chip, handle_level_irq); ++ irq_set_handler_data(irq, d); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops irq_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = gpio_map, ++}; ++ ++static void ralink_gpio_irq_init(struct device_node *np, ++ struct ralink_gpio_chip *rg) ++{ ++ if (irq_map_count >= MAP_MAX) ++ return; ++ ++ rg->irq = irq_of_parse_and_map(np, 0); ++ if (!rg->irq) ++ return; ++ ++ rg->domain = irq_domain_add_linear(np, rg->chip.ngpio, ++ &irq_domain_ops, rg); ++ if (!rg->domain) { ++ dev_err(rg->chip.parent, "irq_domain_add_linear failed\n"); ++ return; ++ } ++ ++ irq_map[irq_map_count++] = rg->domain; ++ ++ rt_gpio_w32(rg, GPIO_REG_RENA, 0x0); ++ rt_gpio_w32(rg, GPIO_REG_FENA, 0x0); ++ ++ if (!atomic_read(&irq_refcount)) ++ irq_set_chained_handler(rg->irq, ralink_gpio_irq_handler); ++ atomic_inc(&irq_refcount); ++ ++ dev_info(rg->chip.parent, "registering %d irq handlers\n", rg->chip.ngpio); ++} ++ ++static int ralink_gpio_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ struct ralink_gpio_chip *rg; ++ const __be32 *ngpio, *gpiobase; ++ ++ if (!res) { ++ dev_err(&pdev->dev, "failed to find resource\n"); ++ return -ENOMEM; ++ } ++ ++ rg = devm_kzalloc(&pdev->dev, ++ sizeof(struct ralink_gpio_chip), GFP_KERNEL); ++ if (!rg) ++ return -ENOMEM; ++ ++ rg->membase = devm_ioremap_resource(&pdev->dev, res); ++ if (!rg->membase) { ++ dev_err(&pdev->dev, "cannot remap I/O memory region\n"); ++ return -ENOMEM; ++ } ++ ++ if (of_property_read_u8_array(np, "ralink,register-map", ++ rg->regs, GPIO_REG_MAX)) { ++ dev_err(&pdev->dev, "failed to read register definition\n"); ++ return -EINVAL; ++ } ++ ++ ngpio = of_get_property(np, "ngpios", NULL); ++ if (!ngpio) { ++ dev_err(&pdev->dev, "failed to read number of pins\n"); ++ return -EINVAL; ++ } ++ ++ gpiobase = of_get_property(np, "ralink,gpio-base", NULL); ++ if (gpiobase) ++ rg->chip.base = be32_to_cpu(*gpiobase); ++ else ++ rg->chip.base = -1; ++ ++ spin_lock_init(&rg->lock); ++ ++ rg->chip.parent = &pdev->dev; ++ rg->chip.label = dev_name(&pdev->dev); ++ rg->chip.fwnode = of_node_to_fwnode(np); ++ rg->chip.ngpio = be32_to_cpu(*ngpio); ++ rg->chip.direction_input = ralink_gpio_direction_input; ++ rg->chip.direction_output = ralink_gpio_direction_output; ++ rg->chip.get = ralink_gpio_get; ++ rg->chip.set = ralink_gpio_set; ++ rg->chip.request = gpiochip_generic_request; ++ rg->chip.to_irq = ralink_gpio_to_irq; ++ rg->chip.free = gpiochip_generic_free; ++ ++ /* set polarity to low for all lines */ ++ rt_gpio_w32(rg, GPIO_REG_POL, 0); ++ ++ dev_info(&pdev->dev, "registering %d gpios\n", rg->chip.ngpio); ++ ++ ralink_gpio_irq_init(np, rg); ++ ++ return gpiochip_add(&rg->chip); ++} ++ ++static const struct of_device_id ralink_gpio_match[] = { ++ { .compatible = "ralink,rt2880-gpio" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ralink_gpio_match); ++ ++static struct platform_driver ralink_gpio_driver = { ++ .probe = ralink_gpio_probe, ++ .driver = { ++ .name = "rt2880_gpio", ++ .owner = THIS_MODULE, ++ .of_match_table = ralink_gpio_match, ++ }, ++}; ++ ++static int __init ralink_gpio_init(void) ++{ ++ return platform_driver_register(&ralink_gpio_driver); ++} ++ ++subsys_initcall(ralink_gpio_init); diff --git a/target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch b/target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch new file mode 100644 index 0000000000..8520ce32ff --- /dev/null +++ b/target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch @@ -0,0 +1,44 @@ +From 57fa7f2f4ef6f78ce1d30509c0d111aa3791b524 Mon Sep 17 00:00:00 2001 +From: Daniel Santos +Date: Sun, 4 Nov 2018 20:24:32 -0600 +Subject: gpio-ralink: Add support for GPIO as interrupt-controller + +Signed-off-by: Daniel Santos +--- + Documentation/devicetree/bindings/gpio/gpio-ralink.txt | 6 ++++++ + drivers/gpio/gpio-ralink.c | 2 +- + 2 files changed, 7 insertions(+), 1 deletion(-) + +--- a/Documentation/devicetree/bindings/gpio/gpio-ralink.txt ++++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt +@@ -17,6 +17,9 @@ Required properties: + + Optional properties: + - ralink,gpio-base : Specify the GPIO chips base number ++- interrupt-controller : marks this as an interrupt controller ++- #interrupt-cells : a standard two-cell interrupt flag, see ++ interrupt-controller/interrupts.txt + + Example: + +@@ -28,6 +31,9 @@ Example: + + reg = <0x600 0x34>; + ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ + interrupt-parent = <&intc>; + interrupts = <6>; + +--- a/drivers/gpio/gpio-ralink.c ++++ b/drivers/gpio/gpio-ralink.c +@@ -220,7 +220,7 @@ static int gpio_map(struct irq_domain *d + } + + static const struct irq_domain_ops irq_domain_ops = { +- .xlate = irq_domain_xlate_onecell, ++ .xlate = irq_domain_xlate_twocell, + .map = gpio_map, + }; + diff --git a/target/linux/ramips/patches-6.6/805-pinctrl-AW9523.patch b/target/linux/ramips/patches-6.6/805-pinctrl-AW9523.patch new file mode 100644 index 0000000000..f9fa791fe1 --- /dev/null +++ b/target/linux/ramips/patches-6.6/805-pinctrl-AW9523.patch @@ -0,0 +1,72 @@ +From: AngeloGioacchino Del Regno + +To: linus.walleij@linaro.org +Cc: linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, + marijn.suijten@somainline.org, martin.botka@somainline.org, + phone-devel@vger.kernel.org, linux-gpio@vger.kernel.org, + devicetree@vger.kernel.org, robh+dt@kernel.org, + AngeloGioacchino Del Regno + +Subject: [PATCH v5 1/2] pinctrl: Add driver for Awinic AW9523/B I2C GPIO + Expander +Date: Mon, 25 Jan 2021 19:22:18 +0100 + +The Awinic AW9523(B) is a multi-function I2C gpio expander in a +TQFN-24L package, featuring PWM (max 37mA per pin, or total max +power 3.2Watts) for LED driving capability. + +It has two ports with 8 pins per port (for a total of 16 pins), +configurable as either PWM with 1/256 stepping or GPIO input/output, +1.8V logic input; each GPIO can be configured as input or output +independently from each other. + +This IC also has an internal interrupt controller, which is capable +of generating an interrupt for each GPIO, depending on the +configuration, and will raise an interrupt on the INTN pin to +advertise this to an external interrupt controller. + +Signed-off-by: AngeloGioacchino Del Regno +--- + drivers/pinctrl/Kconfig | 17 + + drivers/pinctrl/Makefile | 1 + + drivers/pinctrl/pinctrl-aw9523.c | 1122 ++++++++++++++++++++++++++++++ + 3 files changed, 1140 insertions(+) + create mode 100644 drivers/pinctrl/pinctrl-aw9523.c + +--- a/drivers/pinctrl/Kconfig ++++ b/drivers/pinctrl/Kconfig +@@ -113,6 +113,24 @@ config PINCTRL_AT91PIO4 + Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4 + controller available on sama5d2 SoC. + ++config PINCTRL_AW9523 ++ bool "Awinic AW9523/AW9523B I2C GPIO expander pinctrl driver" ++ depends on OF && I2C ++ select PINMUX ++ select PINCONF ++ select GENERIC_PINCONF ++ select GPIOLIB ++ select GPIOLIB_IRQCHIP ++ select REGMAP ++ select REGMAP_I2C ++ help ++ The Awinic AW9523/AW9523B is a multi-function I2C GPIO ++ expander with PWM functionality. This driver bundles a ++ pinctrl driver to select the function muxing and a GPIO ++ driver to handle GPIO, when the GPIO function is selected. ++ ++ Say yes to enable pinctrl and GPIO support for the AW9523(B). ++ + config PINCTRL_AXP209 + tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support" + depends on MFD_AXP20X +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -15,6 +15,7 @@ obj-$(CONFIG_PINCTRL_ARTPEC6) += pinctrl + obj-$(CONFIG_PINCTRL_AS3722) += pinctrl-as3722.o + obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o + obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o ++obj-$(CONFIG_PINCTRL_AW9523) += pinctrl-aw9523.o + obj-$(CONFIG_PINCTRL_AXP209) += pinctrl-axp209.o + obj-$(CONFIG_PINCTRL_BM1880) += pinctrl-bm1880.o + obj-$(CONFIG_PINCTRL_CY8C95X0) += pinctrl-cy8c95x0.o diff --git a/target/linux/ramips/patches-6.6/808-pinctrl-mtmips-support-requesting-different-function.patch b/target/linux/ramips/patches-6.6/808-pinctrl-mtmips-support-requesting-different-function.patch new file mode 100644 index 0000000000..e5b03507aa --- /dev/null +++ b/target/linux/ramips/patches-6.6/808-pinctrl-mtmips-support-requesting-different-function.patch @@ -0,0 +1,45 @@ +From: Shiji Yang +Date: Wed, 26 Jul 2023 01:32:55 +0800 +Subject: [PATCH] pinctrl: mtmips: support requesting different functions for + same group + +Sometimes pinctrl consumers may request different functions for the +same pin group in different situations. This patch can help to reset +the group function flag when requesting a different function. + +Signed-off-by: Shiji Yang +--- + drivers/pinctrl/mediatek/pinctrl-mtmips.c | 21 +++++++++++++++++---- + 1 file changed, 17 insertions(+), 4 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-mtmips.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.c +@@ -123,11 +123,24 @@ static int mtmips_pmx_group_enable(struc + int i; + int shift; + +- /* dont allow double use */ ++ /* ++ * for the same pin group, if request a different function, ++ * then clear the group function flag and continue, else exit. ++ */ + if (p->groups[group].enabled) { +- dev_err(p->dev, "%s is already enabled\n", +- p->groups[group].name); +- return 0; ++ for (i = 0; i < p->groups[group].func_count; i++) { ++ if (p->groups[group].func[i].enabled == 1) { ++ if (!strcmp(p->func[func]->name, ++ p->groups[group].func[i].name)) ++ return 0; ++ p->groups[group].func[i].enabled = 0; ++ break; ++ } ++ } ++ ++ /* exit if request the "gpio" function again */ ++ if (i == p->groups[group].func_count && func == 0) ++ return 0; + } + + p->groups[group].enabled = 1; diff --git a/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch new file mode 100644 index 0000000000..80d5ec3b4a --- /dev/null +++ b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch @@ -0,0 +1,244 @@ +From 975e76214cd2516eb6cfff4c3eec581872645e88 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 19 Sep 2013 01:50:59 +0200 +Subject: [PATCH 31/53] uvc: add iPassion iP2970 support + +Signed-off-by: John Crispin +--- + drivers/media/usb/uvc/uvc_driver.c | 12 +++ + drivers/media/usb/uvc/uvc_status.c | 2 + + drivers/media/usb/uvc/uvc_video.c | 147 ++++++++++++++++++++++++++++++++++++ + drivers/media/usb/uvc/uvcvideo.h | 5 +- + 4 files changed, 165 insertions(+), 1 deletion(-) + +--- a/drivers/media/usb/uvc/uvc_driver.c ++++ b/drivers/media/usb/uvc/uvc_driver.c +@@ -3120,6 +3120,18 @@ static const struct usb_device_id uvc_id + .bInterfaceSubClass = 1, + .bInterfaceProtocol = 0, + .driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) }, ++ /* iPassion iP2970 */ ++ { .match_flags = USB_DEVICE_ID_MATCH_DEVICE ++ | USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = 0x1B3B, ++ .idProduct = 0x2970, ++ .bInterfaceClass = USB_CLASS_VIDEO, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = 0, ++ .driver_info = UVC_QUIRK_PROBE_MINMAX ++ | UVC_QUIRK_STREAM_NO_FID ++ | UVC_QUIRK_MOTION ++ | UVC_QUIRK_SINGLE_ISO }, + /* Generic USB Video Class */ + { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_UNDEFINED) }, + { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_15) }, +--- a/drivers/media/usb/uvc/uvc_status.c ++++ b/drivers/media/usb/uvc/uvc_status.c +@@ -228,6 +228,7 @@ static void uvc_status_complete(struct u + if (uvc_event_control(urb, dev->status, len)) + /* The URB will be resubmitted in work context. */ + return; ++ dev->motion = 1; + break; + } + +@@ -273,6 +274,7 @@ int uvc_status_init(struct uvc_device *d + } + + pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress); ++ dev->motion = 0; + + /* + * For high-speed interrupt endpoints, the bInterval value is used as +--- a/drivers/media/usb/uvc/uvc_video.c ++++ b/drivers/media/usb/uvc/uvc_video.c +@@ -19,6 +19,11 @@ + #include + #include + #include ++#include ++#include ++#include ++#include ++#include + + #include + +@@ -1235,9 +1240,149 @@ static void uvc_video_decode_data(struct + uvc_urb->async_operations++; + } + ++struct bh_priv { ++ unsigned long seen; ++}; ++ ++struct bh_event { ++ const char *name; ++ struct sk_buff *skb; ++ struct work_struct work; ++}; ++ ++#define BH_ERR(fmt, args...) printk(KERN_ERR "%s: " fmt, "webcam", ##args ) ++#define BH_DBG(fmt, args...) do {} while (0) ++#define BH_SKB_SIZE 2048 ++ ++extern u64 uevent_next_seqnum(void); ++static int seen = 0; ++ ++static int bh_event_add_var(struct bh_event *event, int argv, ++ const char *format, ...) ++{ ++ static char buf[128]; ++ char *s; ++ va_list args; ++ int len; ++ ++ if (argv) ++ return 0; ++ ++ va_start(args, format); ++ len = vsnprintf(buf, sizeof(buf), format, args); ++ va_end(args); ++ ++ if (len >= sizeof(buf)) { ++ BH_ERR("buffer size too small\n"); ++ WARN_ON(1); ++ return -ENOMEM; ++ } ++ ++ s = skb_put(event->skb, len + 1); ++ strcpy(s, buf); ++ ++ BH_DBG("added variable '%s'\n", s); ++ ++ return 0; ++} ++ ++static int motion_hotplug_fill_event(struct bh_event *event) ++{ ++ int s = jiffies; ++ int ret; ++ ++ if (!seen) ++ seen = jiffies; ++ ++ ret = bh_event_add_var(event, 0, "HOME=%s", "/"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "PATH=%s", ++ "/sbin:/bin:/usr/sbin:/usr/bin"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "SUBSYSTEM=usb"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "ACTION=motion"); ++ if (ret) ++ return ret; ++ ++ ret = bh_event_add_var(event, 0, "SEEN=%d", s - seen); ++ if (ret) ++ return ret; ++ seen = s; ++ ++ ret = bh_event_add_var(event, 0, "SEQNUM=%llu", uevent_next_seqnum()); ++ ++ return ret; ++} ++ ++static void motion_hotplug_work(struct work_struct *work) ++{ ++ struct bh_event *event = container_of(work, struct bh_event, work); ++ int ret = 0; ++ ++ event->skb = alloc_skb(BH_SKB_SIZE, GFP_KERNEL); ++ if (!event->skb) ++ goto out_free_event; ++ ++ ret = bh_event_add_var(event, 0, "%s@", "add"); ++ if (ret) ++ goto out_free_skb; ++ ++ ret = motion_hotplug_fill_event(event); ++ if (ret) ++ goto out_free_skb; ++ ++ NETLINK_CB(event->skb).dst_group = 1; ++ broadcast_uevent(event->skb, 0, 1, GFP_KERNEL); ++ ++out_free_skb: ++ if (ret) { ++ BH_ERR("work error %d\n", ret); ++ kfree_skb(event->skb); ++ } ++out_free_event: ++ kfree(event); ++} ++ ++static int motion_hotplug_create_event(void) ++{ ++ struct bh_event *event; ++ ++ event = kzalloc(sizeof(*event), GFP_KERNEL); ++ if (!event) ++ return -ENOMEM; ++ ++ event->name = "motion"; ++ ++ INIT_WORK(&event->work, (void *)(void *)motion_hotplug_work); ++ schedule_work(&event->work); ++ ++ return 0; ++} ++ ++#define MOTION_FLAG_OFFSET 4 + static void uvc_video_decode_end(struct uvc_streaming *stream, + struct uvc_buffer *buf, const u8 *data, int len) + { ++ if ((stream->dev->quirks & UVC_QUIRK_MOTION) && ++ (data[len - 2] == 0xff) && (data[len - 1] == 0xd9)) { ++ u8 *mem; ++ buf->state = UVC_BUF_STATE_READY; ++ mem = (u8 *) (buf->mem + MOTION_FLAG_OFFSET); ++ if ( stream->dev->motion ) { ++ stream->dev->motion = 0; ++ motion_hotplug_create_event(); ++ } else { ++ *mem &= 0x7f; ++ } ++ } ++ + /* Mark the buffer as done if the EOF marker is set. */ + if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) { + uvc_dbg(stream->dev, FRAME, "Frame complete (EOF found)\n"); +@@ -1819,6 +1964,8 @@ static int uvc_init_video_isoc(struct uv + if (npackets == 0) + return -ENOMEM; + ++ if (stream->dev->quirks & UVC_QUIRK_SINGLE_ISO) ++ npackets = 1; + size = npackets * psize; + + for_each_uvc_urb(uvc_urb, stream) { +--- a/drivers/media/usb/uvc/uvcvideo.h ++++ b/drivers/media/usb/uvc/uvcvideo.h +@@ -73,6 +73,8 @@ + #define UVC_QUIRK_FORCE_Y8 0x00000800 + #define UVC_QUIRK_FORCE_BPP 0x00001000 + #define UVC_QUIRK_WAKE_AUTOSUSPEND 0x00002000 ++#define UVC_QUIRK_MOTION 0x00004000 ++#define UVC_QUIRK_SINGLE_ISO 0x00008000 + + /* Format flags */ + #define UVC_FMT_FLAG_COMPRESSED 0x00000001 +@@ -582,6 +584,7 @@ struct uvc_device { + + struct input_dev *input; + char input_phys[64]; ++ int motion; + + struct uvc_ctrl_work { + struct work_struct work; diff --git a/target/linux/ramips/patches-6.6/820-DT-Add-documentation-for-spi-rt2880.patch b/target/linux/ramips/patches-6.6/820-DT-Add-documentation-for-spi-rt2880.patch new file mode 100644 index 0000000000..e2643e3f25 --- /dev/null +++ b/target/linux/ramips/patches-6.6/820-DT-Add-documentation-for-spi-rt2880.patch @@ -0,0 +1,44 @@ +From da6015e7f19d749f135f7ac55c4ec47b06faa868 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Fri, 9 Aug 2013 20:12:59 +0200 +Subject: [PATCH 41/53] DT: Add documentation for spi-rt2880 + +Describe the SPI master found on the MIPS based Ralink RT2880 SoC. + +Signed-off-by: John Crispin +--- + .../devicetree/bindings/spi/spi-rt2880.txt | 28 ++++++++++++++++++++ + 1 file changed, 28 insertions(+) + create mode 100644 Documentation/devicetree/bindings/spi/spi-rt2880.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/spi/spi-rt2880.txt +@@ -0,0 +1,28 @@ ++Ralink SoC RT2880 SPI master controller. ++ ++This SPI controller is found on most wireless SoCs made by ralink. ++ ++Required properties: ++- compatible : "ralink,rt2880-spi" ++- reg : The register base for the controller. ++- #address-cells : <1>, as required by generic SPI binding. ++- #size-cells : <0>, also as required by generic SPI binding. ++ ++Child nodes as per the generic SPI binding. ++ ++Example: ++ ++ spi@b00 { ++ compatible = "ralink,rt2880-spi"; ++ reg = <0xb00 0x100>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ m25p80@0 { ++ compatible = "m25p80"; ++ reg = <0>; ++ spi-max-frequency = <10000000>; ++ }; ++ }; ++ diff --git a/target/linux/ramips/patches-6.6/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch b/target/linux/ramips/patches-6.6/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch new file mode 100644 index 0000000000..6760d9f56c --- /dev/null +++ b/target/linux/ramips/patches-6.6/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch @@ -0,0 +1,579 @@ +From 683af4ebb91a1600df1946ac4769d916b8a1be65 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 27 Jul 2014 11:15:12 +0100 +Subject: [PATCH 42/53] SPI: ralink: add Ralink SoC spi driver + +Add the driver needed to make SPI work on Ralink SoC. + +Signed-off-by: Gabor Juhos +Acked-by: John Crispin +--- + drivers/spi/Kconfig | 6 + + drivers/spi/Makefile | 1 + + drivers/spi/spi-rt2880.c | 530 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 537 insertions(+) + create mode 100644 drivers/spi/spi-rt2880.c + +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -895,6 +895,12 @@ config SPI_QCOM_GENI + This driver can also be built as a module. If so, the module + will be called spi-geni-qcom. + ++config SPI_RT2880 ++ tristate "Ralink RT288x SPI Controller" ++ depends on RALINK ++ help ++ This selects a driver for the Ralink RT288x/RT305x SPI Controller. ++ + config SPI_S3C64XX + tristate "Samsung S3C64XX/Exynos SoC series type SPI" + depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -117,6 +117,7 @@ obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o + obj-$(CONFIG_MACH_REALTEK_RTL) += spi-realtek-rtl.o + obj-$(CONFIG_SPI_RPCIF) += spi-rpc-if.o + obj-$(CONFIG_SPI_RSPI) += spi-rspi.o ++obj-$(CONFIG_SPI_RT2880) += spi-rt2880.o + obj-$(CONFIG_SPI_RZV2M_CSI) += spi-rzv2m-csi.o + obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o + obj-$(CONFIG_SPI_SC18IS602) += spi-sc18is602.o +--- /dev/null ++++ b/drivers/spi/spi-rt2880.c +@@ -0,0 +1,535 @@ ++/* ++ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver ++ * ++ * Copyright (C) 2011 Sergiy ++ * Copyright (C) 2011-2013 Gabor Juhos ++ * ++ * Some parts are based on spi-orion.c: ++ * Author: Shadi Ammouri ++ * Copyright (C) 2007-2008 Marvell Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "spi-rt2880" ++ ++#define RAMIPS_SPI_STAT 0x00 ++#define RAMIPS_SPI_CFG 0x10 ++#define RAMIPS_SPI_CTL 0x14 ++#define RAMIPS_SPI_DATA 0x20 ++#define RAMIPS_SPI_ADDR 0x24 ++#define RAMIPS_SPI_BS 0x28 ++#define RAMIPS_SPI_USER 0x2C ++#define RAMIPS_SPI_TXFIFO 0x30 ++#define RAMIPS_SPI_RXFIFO 0x34 ++#define RAMIPS_SPI_FIFO_STAT 0x38 ++#define RAMIPS_SPI_MODE 0x3C ++#define RAMIPS_SPI_DEV_OFFSET 0x40 ++#define RAMIPS_SPI_DMA 0x80 ++#define RAMIPS_SPI_DMASTAT 0x84 ++#define RAMIPS_SPI_ARBITER 0xF0 ++ ++/* SPISTAT register bit field */ ++#define SPISTAT_BUSY BIT(0) ++ ++/* SPICFG register bit field */ ++#define SPICFG_ADDRMODE BIT(12) ++#define SPICFG_RXENVDIS BIT(11) ++#define SPICFG_RXCAP BIT(10) ++#define SPICFG_SPIENMODE BIT(9) ++#define SPICFG_MSBFIRST BIT(8) ++#define SPICFG_SPICLKPOL BIT(6) ++#define SPICFG_RXCLKEDGE_FALLING BIT(5) ++#define SPICFG_TXCLKEDGE_FALLING BIT(4) ++#define SPICFG_HIZSPI BIT(3) ++#define SPICFG_SPICLK_PRESCALE_MASK 0x7 ++#define SPICFG_SPICLK_DIV2 0 ++#define SPICFG_SPICLK_DIV4 1 ++#define SPICFG_SPICLK_DIV8 2 ++#define SPICFG_SPICLK_DIV16 3 ++#define SPICFG_SPICLK_DIV32 4 ++#define SPICFG_SPICLK_DIV64 5 ++#define SPICFG_SPICLK_DIV128 6 ++#define SPICFG_SPICLK_DISABLE 7 ++ ++/* SPICTL register bit field */ ++#define SPICTL_START BIT(4) ++#define SPICTL_HIZSDO BIT(3) ++#define SPICTL_STARTWR BIT(2) ++#define SPICTL_STARTRD BIT(1) ++#define SPICTL_SPIENA BIT(0) ++ ++/* SPIUSER register bit field */ ++#define SPIUSER_USERMODE BIT(21) ++#define SPIUSER_INSTR_PHASE BIT(20) ++#define SPIUSER_ADDR_PHASE_MASK 0x7 ++#define SPIUSER_ADDR_PHASE_OFFSET 17 ++#define SPIUSER_MODE_PHASE BIT(16) ++#define SPIUSER_DUMMY_PHASE_MASK 0x3 ++#define SPIUSER_DUMMY_PHASE_OFFSET 14 ++#define SPIUSER_DATA_PHASE_MASK 0x3 ++#define SPIUSER_DATA_PHASE_OFFSET 12 ++#define SPIUSER_DATA_READ (BIT(0) << SPIUSER_DATA_PHASE_OFFSET) ++#define SPIUSER_DATA_WRITE (BIT(1) << SPIUSER_DATA_PHASE_OFFSET) ++#define SPIUSER_ADDR_TYPE_OFFSET 9 ++#define SPIUSER_MODE_TYPE_OFFSET 6 ++#define SPIUSER_DUMMY_TYPE_OFFSET 3 ++#define SPIUSER_DATA_TYPE_OFFSET 0 ++#define SPIUSER_TRANSFER_MASK 0x7 ++#define SPIUSER_TRANSFER_SINGLE BIT(0) ++#define SPIUSER_TRANSFER_DUAL BIT(1) ++#define SPIUSER_TRANSFER_QUAD BIT(2) ++ ++#define SPIUSER_TRANSFER_TYPE(type) ( \ ++ (type << SPIUSER_ADDR_TYPE_OFFSET) | \ ++ (type << SPIUSER_MODE_TYPE_OFFSET) | \ ++ (type << SPIUSER_DUMMY_TYPE_OFFSET) | \ ++ (type << SPIUSER_DATA_TYPE_OFFSET) \ ++) ++ ++/* SPIFIFOSTAT register bit field */ ++#define SPIFIFOSTAT_TXEMPTY BIT(19) ++#define SPIFIFOSTAT_RXEMPTY BIT(18) ++#define SPIFIFOSTAT_TXFULL BIT(17) ++#define SPIFIFOSTAT_RXFULL BIT(16) ++#define SPIFIFOSTAT_FIFO_MASK 0xff ++#define SPIFIFOSTAT_TX_OFFSET 8 ++#define SPIFIFOSTAT_RX_OFFSET 0 ++ ++#define SPI_FIFO_DEPTH 16 ++ ++/* SPIMODE register bit field */ ++#define SPIMODE_MODE_OFFSET 24 ++#define SPIMODE_DUMMY_OFFSET 0 ++ ++/* SPIARB register bit field */ ++#define SPICTL_ARB_EN BIT(31) ++#define SPICTL_CSCTL1 BIT(16) ++#define SPI1_POR BIT(1) ++#define SPI0_POR BIT(0) ++ ++#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | \ ++ SPI_CS_HIGH) ++ ++static atomic_t hw_reset_count = ATOMIC_INIT(0); ++ ++struct rt2880_spi { ++ struct spi_master *master; ++ void __iomem *base; ++ u32 speed; ++ u16 wait_loops; ++ u16 mode; ++ struct clk *clk; ++}; ++ ++static inline struct rt2880_spi *spidev_to_rt2880_spi(struct spi_device *spi) ++{ ++ return spi_master_get_devdata(spi->master); ++} ++ ++static inline u32 rt2880_spi_read(struct rt2880_spi *rs, u32 reg) ++{ ++ return ioread32(rs->base + reg); ++} ++ ++static inline void rt2880_spi_write(struct rt2880_spi *rs, u32 reg, ++ const u32 val) ++{ ++ iowrite32(val, rs->base + reg); ++} ++ ++static inline void rt2880_spi_setbits(struct rt2880_spi *rs, u32 reg, u32 mask) ++{ ++ void __iomem *addr = rs->base + reg; ++ ++ iowrite32((ioread32(addr) | mask), addr); ++} ++ ++static inline void rt2880_spi_clrbits(struct rt2880_spi *rs, u32 reg, u32 mask) ++{ ++ void __iomem *addr = rs->base + reg; ++ ++ iowrite32((ioread32(addr) & ~mask), addr); ++} ++ ++static u32 rt2880_spi_baudrate_get(struct spi_device *spi, unsigned int speed) ++{ ++ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi); ++ u32 rate; ++ u32 prescale; ++ ++ /* ++ * the supported rates are: 2, 4, 8, ... 128 ++ * round up as we look for equal or less speed ++ */ ++ rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed); ++ rate = roundup_pow_of_two(rate); ++ ++ /* Convert the rate to SPI clock divisor value. */ ++ prescale = ilog2(rate / 2); ++ ++ /* some tolerance. double and add 100 */ ++ rs->wait_loops = (8 * HZ * loops_per_jiffy) / ++ (clk_get_rate(rs->clk) / rate); ++ rs->wait_loops = (rs->wait_loops << 1) + 100; ++ rs->speed = speed; ++ ++ dev_dbg(&spi->dev, "speed: %lu/%u, rate: %u, prescal: %u, loops: %hu\n", ++ clk_get_rate(rs->clk) / rate, speed, rate, prescale, ++ rs->wait_loops); ++ ++ return prescale; ++} ++ ++static u32 get_arbiter_offset(struct spi_master *master) ++{ ++ u32 offset; ++ ++ offset = RAMIPS_SPI_ARBITER; ++ if (master->bus_num == 1) ++ offset -= RAMIPS_SPI_DEV_OFFSET; ++ ++ return offset; ++} ++ ++static void rt2880_spi_set_cs(struct spi_device *spi, bool enable) ++{ ++ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi); ++ ++ if (enable) ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA); ++ else ++ rt2880_spi_clrbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA); ++} ++ ++static int rt2880_spi_wait_ready(struct rt2880_spi *rs, int len) ++{ ++ int loop = rs->wait_loops * len; ++ ++ while ((rt2880_spi_read(rs, RAMIPS_SPI_STAT) & SPISTAT_BUSY) && --loop) ++ cpu_relax(); ++ ++ if (loop) ++ return 0; ++ ++ return -ETIMEDOUT; ++} ++ ++static void rt2880_dump_reg(struct spi_master *master) ++{ ++ struct rt2880_spi *rs = spi_master_get_devdata(master); ++ ++ dev_dbg(&master->dev, "stat: %08x, cfg: %08x, ctl: %08x, " \ ++ "data: %08x, arb: %08x\n", ++ rt2880_spi_read(rs, RAMIPS_SPI_STAT), ++ rt2880_spi_read(rs, RAMIPS_SPI_CFG), ++ rt2880_spi_read(rs, RAMIPS_SPI_CTL), ++ rt2880_spi_read(rs, RAMIPS_SPI_DATA), ++ rt2880_spi_read(rs, get_arbiter_offset(master))); ++} ++ ++static int rt2880_spi_transfer_one(struct spi_master *master, ++ struct spi_device *spi, struct spi_transfer *xfer) ++{ ++ struct rt2880_spi *rs = spi_master_get_devdata(master); ++ unsigned len; ++ const u8 *tx = xfer->tx_buf; ++ u8 *rx = xfer->rx_buf; ++ int err = 0; ++ ++ /* change clock speed */ ++ if (unlikely(rs->speed != xfer->speed_hz)) { ++ u32 reg; ++ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG); ++ reg &= ~SPICFG_SPICLK_PRESCALE_MASK; ++ reg |= rt2880_spi_baudrate_get(spi, xfer->speed_hz); ++ rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg); ++ } ++ ++ if (tx) { ++ len = xfer->len; ++ while (len-- > 0) { ++ rt2880_spi_write(rs, RAMIPS_SPI_DATA, *tx++); ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTWR); ++ err = rt2880_spi_wait_ready(rs, 1); ++ if (err) { ++ dev_err(&spi->dev, "TX failed, err=%d\n", err); ++ goto out; ++ } ++ } ++ } ++ ++ if (rx) { ++ len = xfer->len; ++ while (len-- > 0) { ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTRD); ++ err = rt2880_spi_wait_ready(rs, 1); ++ if (err) { ++ dev_err(&spi->dev, "RX failed, err=%d\n", err); ++ goto out; ++ } ++ *rx++ = (u8) rt2880_spi_read(rs, RAMIPS_SPI_DATA); ++ } ++ } ++ ++out: ++ return err; ++} ++ ++/* copy from spi.c */ ++static void spi_set_cs(struct spi_device *spi, bool enable) ++{ ++ if (spi->mode & SPI_CS_HIGH) ++ enable = !enable; ++ ++ if (spi->cs_gpiod) ++ gpiod_set_value(spi->cs_gpiod, !enable); ++ else if (spi->master->set_cs) ++ spi->master->set_cs(spi, !enable); ++} ++ ++static int rt2880_spi_setup(struct spi_device *spi) ++{ ++ struct spi_master *master = spi->master; ++ struct rt2880_spi *rs = spi_master_get_devdata(master); ++ u32 reg, old_reg, arbit_off; ++ ++ if ((spi->max_speed_hz > master->max_speed_hz) || ++ (spi->max_speed_hz < master->min_speed_hz)) { ++ dev_err(&spi->dev, "invalide requested speed %d Hz\n", ++ spi->max_speed_hz); ++ return -EINVAL; ++ } ++ ++ if (!(master->bits_per_word_mask & ++ BIT(spi->bits_per_word - 1))) { ++ dev_err(&spi->dev, "invalide bits_per_word %d\n", ++ spi->bits_per_word); ++ return -EINVAL; ++ } ++ ++ /* the hardware seems can't work on mode0 force it to mode3 */ ++ if ((spi->mode & (SPI_CPOL | SPI_CPHA)) == SPI_MODE_0) { ++ dev_warn(&spi->dev, "force spi mode3\n"); ++ spi->mode |= SPI_MODE_3; ++ } ++ ++ /* chip polarity */ ++ arbit_off = get_arbiter_offset(master); ++ reg = old_reg = rt2880_spi_read(rs, arbit_off); ++ if (spi->mode & SPI_CS_HIGH) { ++ switch (master->bus_num) { ++ case 1: ++ reg |= SPI1_POR; ++ break; ++ default: ++ reg |= SPI0_POR; ++ break; ++ } ++ } else { ++ switch (master->bus_num) { ++ case 1: ++ reg &= ~SPI1_POR; ++ break; ++ default: ++ reg &= ~SPI0_POR; ++ break; ++ } ++ } ++ ++ /* enable spi1 */ ++ if (master->bus_num == 1) ++ reg |= SPICTL_ARB_EN; ++ ++ if (reg != old_reg) ++ rt2880_spi_write(rs, arbit_off, reg); ++ ++ /* deselected the spi device */ ++ spi_set_cs(spi, false); ++ ++ rt2880_dump_reg(master); ++ ++ return 0; ++} ++ ++static int rt2880_spi_prepare_message(struct spi_master *master, ++ struct spi_message *msg) ++{ ++ struct rt2880_spi *rs = spi_master_get_devdata(master); ++ struct spi_device *spi = msg->spi; ++ u32 reg; ++ ++ if ((rs->mode == spi->mode) && (rs->speed == spi->max_speed_hz)) ++ return 0; ++ ++#if 0 ++ /* set spido to tri-state */ ++ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_HIZSDO); ++#endif ++ ++ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG); ++ ++ reg &= ~(SPICFG_MSBFIRST | SPICFG_SPICLKPOL | ++ SPICFG_RXCLKEDGE_FALLING | ++ SPICFG_TXCLKEDGE_FALLING | ++ SPICFG_SPICLK_PRESCALE_MASK); ++ ++ /* MSB */ ++ if (!(spi->mode & SPI_LSB_FIRST)) ++ reg |= SPICFG_MSBFIRST; ++ ++ /* spi mode */ ++ switch (spi->mode & (SPI_CPOL | SPI_CPHA)) { ++ case SPI_MODE_0: ++ reg |= SPICFG_TXCLKEDGE_FALLING; ++ break; ++ case SPI_MODE_1: ++ reg |= SPICFG_RXCLKEDGE_FALLING; ++ break; ++ case SPI_MODE_2: ++ reg |= SPICFG_SPICLKPOL | SPICFG_RXCLKEDGE_FALLING; ++ break; ++ case SPI_MODE_3: ++ reg |= SPICFG_SPICLKPOL | SPICFG_TXCLKEDGE_FALLING; ++ break; ++ } ++ rs->mode = spi->mode; ++ ++#if 0 ++ /* set spiclk and spiena to tri-state */ ++ reg |= SPICFG_HIZSPI; ++#endif ++ ++ /* clock divide */ ++ reg |= rt2880_spi_baudrate_get(spi, spi->max_speed_hz); ++ ++ rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg); ++ ++ return 0; ++} ++ ++static int rt2880_spi_probe(struct platform_device *pdev) ++{ ++ struct spi_master *master; ++ struct rt2880_spi *rs; ++ void __iomem *base; ++ struct resource *r; ++ struct clk *clk; ++ int ret; ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ base = devm_ioremap_resource(&pdev->dev, r); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ ++ clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(clk)) { ++ dev_err(&pdev->dev, "unable to get SYS clock\n"); ++ return PTR_ERR(clk); ++ } ++ ++ ret = clk_prepare_enable(clk); ++ if (ret) ++ goto err_clk; ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(*rs)); ++ if (master == NULL) { ++ dev_dbg(&pdev->dev, "master allocation failed\n"); ++ ret = -ENOMEM; ++ goto err_clk; ++ } ++ ++ master->dev.of_node = pdev->dev.of_node; ++ master->mode_bits = RT2880_SPI_MODE_BITS; ++ master->bits_per_word_mask = SPI_BPW_MASK(8); ++ master->min_speed_hz = clk_get_rate(clk) / 128; ++ master->max_speed_hz = clk_get_rate(clk) / 2; ++ master->flags = SPI_MASTER_HALF_DUPLEX; ++ master->setup = rt2880_spi_setup; ++ master->prepare_message = rt2880_spi_prepare_message; ++ master->set_cs = rt2880_spi_set_cs; ++ master->transfer_one = rt2880_spi_transfer_one, ++ ++ dev_set_drvdata(&pdev->dev, master); ++ ++ rs = spi_master_get_devdata(master); ++ rs->master = master; ++ rs->base = base; ++ rs->clk = clk; ++ ++ if (atomic_inc_return(&hw_reset_count) == 1) { ++ ret = device_reset(&pdev->dev); ++ if (ret) { ++ dev_err(&pdev->dev, "device_reset error.\n"); ++ goto err_master; ++ } ++ } ++ ++ ret = devm_spi_register_master(&pdev->dev, master); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "devm_spi_register_master error.\n"); ++ goto err_master; ++ } ++ ++ return ret; ++ ++err_master: ++ spi_master_put(master); ++ kfree(master); ++err_clk: ++ clk_disable_unprepare(clk); ++ ++ return ret; ++} ++ ++static int rt2880_spi_remove(struct platform_device *pdev) ++{ ++ struct spi_master *master; ++ struct rt2880_spi *rs; ++ ++ master = dev_get_drvdata(&pdev->dev); ++ rs = spi_master_get_devdata(master); ++ ++ clk_disable_unprepare(rs->clk); ++ atomic_dec(&hw_reset_count); ++ ++ return 0; ++} ++ ++MODULE_ALIAS("platform:" DRIVER_NAME); ++ ++static const struct of_device_id rt2880_spi_match[] = { ++ { .compatible = "ralink,rt2880-spi" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, rt2880_spi_match); ++ ++static struct platform_driver rt2880_spi_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = rt2880_spi_match, ++ }, ++ .probe = rt2880_spi_probe, ++ .remove = rt2880_spi_remove, ++}; ++ ++module_platform_driver(rt2880_spi_driver); ++ ++MODULE_DESCRIPTION("Ralink SPI driver"); ++MODULE_AUTHOR("Sergiy "); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch b/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch new file mode 100644 index 0000000000..609ea71735 --- /dev/null +++ b/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch @@ -0,0 +1,512 @@ +From 723b8beaabf3c3c4b1ce69480141f1e926f3f3b2 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 27 Jul 2014 09:52:56 +0100 +Subject: [PATCH 44/53] i2c: MIPS: adds ralink I2C driver + +Signed-off-by: John Crispin +--- + .../devicetree/bindings/i2c/i2c-ralink.txt | 27 ++ + drivers/i2c/busses/Kconfig | 4 + + drivers/i2c/busses/Makefile | 1 + + drivers/i2c/busses/i2c-ralink.c | 327 ++++++++++++++++++++ + 4 files changed, 359 insertions(+) + create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ralink.txt + create mode 100644 drivers/i2c/busses/i2c-ralink.c + +--- /dev/null ++++ b/Documentation/devicetree/bindings/i2c/i2c-ralink.txt +@@ -0,0 +1,27 @@ ++I2C for Ralink platforms ++ ++Required properties : ++- compatible : Must be "link,rt3052-i2c" ++- reg: physical base address of the controller and length of memory mapped ++ region. ++- #address-cells = <1>; ++- #size-cells = <0>; ++ ++Optional properties: ++- Child nodes conforming to i2c bus binding ++ ++Example : ++ ++palmbus@10000000 { ++ i2c@900 { ++ compatible = "link,rt3052-i2c"; ++ reg = <0x900 0x100>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ hwmon@4b { ++ compatible = "national,lm92"; ++ reg = <0x4b>; ++ }; ++ }; ++}; +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -1021,6 +1021,11 @@ config I2C_RK3X + This driver can also be built as a module. If so, the module will + be called i2c-rk3x. + ++config I2C_RALINK ++ tristate "Ralink I2C Controller" ++ depends on RALINK && !SOC_MT7621 ++ select OF_I2C ++ + config I2C_RZV2M + tristate "Renesas RZ/V2M adapter" + depends on ARCH_RENESAS || COMPILE_TEST +--- a/drivers/i2c/busses/Makefile ++++ b/drivers/i2c/busses/Makefile +@@ -96,6 +96,7 @@ obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pc + obj-$(CONFIG_I2C_PNX) += i2c-pnx.o + obj-$(CONFIG_I2C_PXA) += i2c-pxa.o + obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o ++obj-$(CONFIG_I2C_RALINK) += i2c-ralink.o + obj-$(CONFIG_I2C_QCOM_CCI) += i2c-qcom-cci.o + obj-$(CONFIG_I2C_QCOM_GENI) += i2c-qcom-geni.o + obj-$(CONFIG_I2C_QUP) += i2c-qup.o +--- /dev/null ++++ b/drivers/i2c/busses/i2c-ralink.c +@@ -0,0 +1,440 @@ ++/* ++ * drivers/i2c/busses/i2c-ralink.c ++ * ++ * Copyright (C) 2013 Steven Liu ++ * Copyright (C) 2016 Michael Lee ++ * ++ * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus. ++ * (C) 2014 Sittisak ++ * ++ * This software is licensed under the terms of the GNU General Public ++ * License version 2, as published by the Free Software Foundation, and ++ * may be copied, distributed, and modified under those terms. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define REG_CONFIG_REG 0x00 ++#define REG_CLKDIV_REG 0x04 ++#define REG_DEVADDR_REG 0x08 ++#define REG_ADDR_REG 0x0C ++#define REG_DATAOUT_REG 0x10 ++#define REG_DATAIN_REG 0x14 ++#define REG_STATUS_REG 0x18 ++#define REG_STARTXFR_REG 0x1C ++#define REG_BYTECNT_REG 0x20 ++ ++/* REG_CONFIG_REG */ ++#define I2C_ADDRLEN_OFFSET 5 ++#define I2C_DEVADLEN_OFFSET 2 ++#define I2C_ADDRLEN_MASK 0x3 ++#define I2C_ADDR_DIS BIT(1) ++#define I2C_DEVADDR_DIS BIT(0) ++#define I2C_ADDRLEN_8 (7 << I2C_ADDRLEN_OFFSET) ++#define I2C_DEVADLEN_7 (6 << I2C_DEVADLEN_OFFSET) ++#define I2C_CONF_DEFAULT (I2C_ADDRLEN_8 | I2C_DEVADLEN_7) ++ ++/* REG_CLKDIV_REG */ ++#define I2C_CLKDIV_MASK 0xffff ++ ++/* REG_DEVADDR_REG */ ++#define I2C_DEVADDR_MASK 0x7f ++ ++/* REG_ADDR_REG */ ++#define I2C_ADDR_MASK 0xff ++ ++/* REG_STATUS_REG */ ++#define I2C_STARTERR BIT(4) ++#define I2C_ACKERR BIT(3) ++#define I2C_DATARDY BIT(2) ++#define I2C_SDOEMPTY BIT(1) ++#define I2C_BUSY BIT(0) ++ ++/* REG_STARTXFR_REG */ ++#define NOSTOP_CMD BIT(2) ++#define NODATA_CMD BIT(1) ++#define READ_CMD BIT(0) ++ ++/* REG_BYTECNT_REG */ ++#define BYTECNT_MAX 64 ++#define SET_BYTECNT(x) (x - 1) ++ ++/* timeout waiting for I2C devices to respond (clock streching) */ ++#define TIMEOUT_MS 1000 ++#define DELAY_INTERVAL_US 100 ++ ++struct rt_i2c { ++ void __iomem *base; ++ struct clk *clk; ++ struct device *dev; ++ struct i2c_adapter adap; ++ u32 cur_clk; ++ u32 clk_div; ++ u32 flags; ++}; ++ ++static void rt_i2c_w32(struct rt_i2c *i2c, u32 val, unsigned reg) ++{ ++ iowrite32(val, i2c->base + reg); ++} ++ ++static u32 rt_i2c_r32(struct rt_i2c *i2c, unsigned reg) ++{ ++ return ioread32(i2c->base + reg); ++} ++ ++static int poll_down_timeout(void __iomem *addr, u32 mask) ++{ ++ unsigned long timeout = jiffies + msecs_to_jiffies(TIMEOUT_MS); ++ ++ do { ++ if (!(readl_relaxed(addr) & mask)) ++ return 0; ++ ++ usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50); ++ } while (time_before(jiffies, timeout)); ++ ++ return (readl_relaxed(addr) & mask) ? -EAGAIN : 0; ++} ++ ++static int rt_i2c_wait_idle(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = poll_down_timeout(i2c->base + REG_STATUS_REG, I2C_BUSY); ++ if (ret < 0) ++ dev_dbg(i2c->dev, "idle err(%d)\n", ret); ++ ++ return ret; ++} ++ ++static int poll_up_timeout(void __iomem *addr, u32 mask) ++{ ++ unsigned long timeout = jiffies + msecs_to_jiffies(TIMEOUT_MS); ++ u32 status; ++ ++ do { ++ status = readl_relaxed(addr); ++ ++ /* check error status */ ++ if (status & I2C_STARTERR) ++ return -EAGAIN; ++ else if (status & I2C_ACKERR) ++ return -ENXIO; ++ else if (status & mask) ++ return 0; ++ ++ usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50); ++ } while (time_before(jiffies, timeout)); ++ ++ return -ETIMEDOUT; ++} ++ ++static int rt_i2c_wait_rx_done(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = poll_up_timeout(i2c->base + REG_STATUS_REG, I2C_DATARDY); ++ if (ret < 0) ++ dev_dbg(i2c->dev, "rx err(%d)\n", ret); ++ ++ return ret; ++} ++ ++static int rt_i2c_wait_tx_done(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = poll_up_timeout(i2c->base + REG_STATUS_REG, I2C_SDOEMPTY); ++ if (ret < 0) ++ dev_dbg(i2c->dev, "tx err(%d)\n", ret); ++ ++ return ret; ++} ++ ++static void rt_i2c_reset(struct rt_i2c *i2c) ++{ ++ int ret; ++ ++ ret = device_reset(i2c->adap.dev.parent); ++ if (ret) ++ dev_err(i2c->dev, "Failed to reset device"); ++ ++ barrier(); ++ rt_i2c_w32(i2c, i2c->clk_div, REG_CLKDIV_REG); ++} ++ ++static void rt_i2c_dump_reg(struct rt_i2c *i2c) ++{ ++ dev_dbg(i2c->dev, "conf %08x, clkdiv %08x, devaddr %08x, " \ ++ "addr %08x, dataout %08x, datain %08x, " \ ++ "status %08x, startxfr %08x, bytecnt %08x\n", ++ rt_i2c_r32(i2c, REG_CONFIG_REG), ++ rt_i2c_r32(i2c, REG_CLKDIV_REG), ++ rt_i2c_r32(i2c, REG_DEVADDR_REG), ++ rt_i2c_r32(i2c, REG_ADDR_REG), ++ rt_i2c_r32(i2c, REG_DATAOUT_REG), ++ rt_i2c_r32(i2c, REG_DATAIN_REG), ++ rt_i2c_r32(i2c, REG_STATUS_REG), ++ rt_i2c_r32(i2c, REG_STARTXFR_REG), ++ rt_i2c_r32(i2c, REG_BYTECNT_REG)); ++} ++ ++static int rt_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, ++ int num) ++{ ++ struct rt_i2c *i2c; ++ struct i2c_msg *pmsg; ++ unsigned char addr; ++ int i, j, ret; ++ u32 cmd; ++ ++ i2c = i2c_get_adapdata(adap); ++ ++ for (i = 0; i < num; i++) { ++ pmsg = &msgs[i]; ++ if (i == (num - 1)) ++ cmd = 0; ++ else ++ cmd = NOSTOP_CMD; ++ ++ dev_dbg(i2c->dev, "addr: 0x%x, len: %d, flags: 0x%x, stop: %d\n", ++ pmsg->addr, pmsg->len, pmsg->flags, ++ (cmd == 0)? 1 : 0); ++ ++ /* wait hardware idle */ ++ if ((ret = rt_i2c_wait_idle(i2c))) ++ goto err_timeout; ++ ++ if (pmsg->flags & I2C_M_TEN) { ++ rt_i2c_w32(i2c, I2C_CONF_DEFAULT, REG_CONFIG_REG); ++ /* 10 bits address */ ++ addr = 0x78 | ((pmsg->addr >> 8) & 0x03); ++ rt_i2c_w32(i2c, addr & I2C_DEVADDR_MASK, ++ REG_DEVADDR_REG); ++ rt_i2c_w32(i2c, pmsg->addr & I2C_ADDR_MASK, ++ REG_ADDR_REG); ++ } else { ++ rt_i2c_w32(i2c, I2C_CONF_DEFAULT | I2C_ADDR_DIS, ++ REG_CONFIG_REG); ++ /* 7 bits address */ ++ rt_i2c_w32(i2c, pmsg->addr & I2C_DEVADDR_MASK, ++ REG_DEVADDR_REG); ++ } ++ ++ /* buffer length */ ++ if (pmsg->len == 0) ++ cmd |= NODATA_CMD; ++ else ++ rt_i2c_w32(i2c, SET_BYTECNT(pmsg->len), ++ REG_BYTECNT_REG); ++ ++ j = 0; ++ if (pmsg->flags & I2C_M_RD) { ++ cmd |= READ_CMD; ++ /* start transfer */ ++ barrier(); ++ rt_i2c_w32(i2c, cmd, REG_STARTXFR_REG); ++ do { ++ /* wait */ ++ if ((ret = rt_i2c_wait_rx_done(i2c))) ++ goto err_timeout; ++ /* read data */ ++ if (pmsg->len) ++ pmsg->buf[j] = rt_i2c_r32(i2c, ++ REG_DATAIN_REG); ++ j++; ++ } while (j < pmsg->len); ++ } else { ++ do { ++ /* write data */ ++ if (pmsg->len) ++ rt_i2c_w32(i2c, pmsg->buf[j], ++ REG_DATAOUT_REG); ++ /* start transfer */ ++ if (j == 0) { ++ barrier(); ++ rt_i2c_w32(i2c, cmd, REG_STARTXFR_REG); ++ } ++ /* wait */ ++ if ((ret = rt_i2c_wait_tx_done(i2c))) ++ goto err_timeout; ++ j++; ++ } while (j < pmsg->len); ++ } ++ } ++ /* the return value is number of executed messages */ ++ ret = i; ++ ++ return ret; ++ ++err_timeout: ++ rt_i2c_dump_reg(i2c); ++ rt_i2c_reset(i2c); ++ return ret; ++} ++ ++static u32 rt_i2c_func(struct i2c_adapter *a) ++{ ++ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; ++} ++ ++static const struct i2c_algorithm rt_i2c_algo = { ++ .master_xfer = rt_i2c_master_xfer, ++ .functionality = rt_i2c_func, ++}; ++ ++static const struct of_device_id i2c_rt_dt_ids[] = { ++ { .compatible = "ralink,rt2880-i2c" }, ++ { /* sentinel */ } ++}; ++ ++MODULE_DEVICE_TABLE(of, i2c_rt_dt_ids); ++ ++static struct i2c_adapter_quirks rt_i2c_quirks = { ++ .max_write_len = BYTECNT_MAX, ++ .max_read_len = BYTECNT_MAX, ++}; ++ ++static int rt_i2c_init(struct rt_i2c *i2c) ++{ ++ u32 reg; ++ ++ /* i2c_sclk = periph_clk / ((2 * clk_div) + 5) */ ++ i2c->clk_div = (clk_get_rate(i2c->clk) - (5 * i2c->cur_clk)) / ++ (2 * i2c->cur_clk); ++ if (i2c->clk_div < 8) ++ i2c->clk_div = 8; ++ if (i2c->clk_div > I2C_CLKDIV_MASK) ++ i2c->clk_div = I2C_CLKDIV_MASK; ++ ++ /* check support combinde/repeated start message */ ++ rt_i2c_w32(i2c, NOSTOP_CMD, REG_STARTXFR_REG); ++ reg = rt_i2c_r32(i2c, REG_STARTXFR_REG) & NOSTOP_CMD; ++ ++ rt_i2c_reset(i2c); ++ ++ return reg; ++} ++ ++static int rt_i2c_probe(struct platform_device *pdev) ++{ ++ struct resource *res; ++ struct rt_i2c *i2c; ++ struct i2c_adapter *adap; ++ const struct of_device_id *match; ++ int ret, restart; ++ ++ match = of_match_device(i2c_rt_dt_ids, &pdev->dev); ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ dev_err(&pdev->dev, "no memory resource found\n"); ++ return -ENODEV; ++ } ++ ++ i2c = devm_kzalloc(&pdev->dev, sizeof(struct rt_i2c), GFP_KERNEL); ++ if (!i2c) { ++ dev_err(&pdev->dev, "failed to allocate i2c_adapter\n"); ++ return -ENOMEM; ++ } ++ ++ i2c->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(i2c->base)) ++ return PTR_ERR(i2c->base); ++ ++ i2c->clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(i2c->clk)) { ++ dev_err(&pdev->dev, "no clock defined\n"); ++ return -ENODEV; ++ } ++ clk_prepare_enable(i2c->clk); ++ i2c->dev = &pdev->dev; ++ ++ if (of_property_read_u32(pdev->dev.of_node, ++ "clock-frequency", &i2c->cur_clk)) ++ i2c->cur_clk = 100000; ++ ++ adap = &i2c->adap; ++ adap->owner = THIS_MODULE; ++ adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; ++ adap->algo = &rt_i2c_algo; ++ adap->retries = 3; ++ adap->dev.parent = &pdev->dev; ++ i2c_set_adapdata(adap, i2c); ++ adap->dev.of_node = pdev->dev.of_node; ++ strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name)); ++ adap->quirks = &rt_i2c_quirks; ++ ++ platform_set_drvdata(pdev, i2c); ++ ++ restart = rt_i2c_init(i2c); ++ ++ ret = i2c_add_adapter(adap); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "failed to add adapter\n"); ++ clk_disable_unprepare(i2c->clk); ++ return ret; ++ } ++ ++ dev_info(&pdev->dev, "clock %uKHz, re-start %ssupport\n", ++ i2c->cur_clk/1000, restart ? "" : "not "); ++ ++ return ret; ++} ++ ++static int rt_i2c_remove(struct platform_device *pdev) ++{ ++ struct rt_i2c *i2c = platform_get_drvdata(pdev); ++ ++ i2c_del_adapter(&i2c->adap); ++ clk_disable_unprepare(i2c->clk); ++ ++ return 0; ++} ++ ++static struct platform_driver rt_i2c_driver = { ++ .probe = rt_i2c_probe, ++ .remove = rt_i2c_remove, ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "i2c-ralink", ++ .of_match_table = i2c_rt_dt_ids, ++ }, ++}; ++ ++static int __init i2c_rt_init (void) ++{ ++ return platform_driver_register(&rt_i2c_driver); ++} ++subsys_initcall(i2c_rt_init); ++ ++static void __exit i2c_rt_exit (void) ++{ ++ platform_driver_unregister(&rt_i2c_driver); ++} ++module_exit(i2c_rt_exit); ++ ++MODULE_AUTHOR("Steven Liu "); ++MODULE_DESCRIPTION("Ralink I2c host driver"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:Ralink-I2C"); diff --git a/target/linux/ramips/patches-6.6/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch b/target/linux/ramips/patches-6.6/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch new file mode 100644 index 0000000000..c19b0606a1 --- /dev/null +++ b/target/linux/ramips/patches-6.6/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch @@ -0,0 +1,46 @@ +From 23147af14531cbdada194b94120ef8774f46292d Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 13 Nov 2014 19:08:40 +0100 +Subject: [PATCH 46/53] mmc: MIPS: ralink: add sdhci for mt7620a SoC + +Signed-off-by: John Crispin +--- + drivers/mmc/host/Kconfig | 2 + + drivers/mmc/host/Makefile | 1 + + drivers/mmc/host/mtk-mmc/Kconfig | 16 + + drivers/mmc/host/mtk-mmc/Makefile | 42 + + drivers/mmc/host/mtk-mmc/board.h | 137 ++ + drivers/mmc/host/mtk-mmc/dbg.c | 347 ++++ + drivers/mmc/host/mtk-mmc/dbg.h | 156 ++ + drivers/mmc/host/mtk-mmc/mt6575_sd.h | 1001 +++++++++++ + drivers/mmc/host/mtk-mmc/sd.c | 3060 ++++++++++++++++++++++++++++++++++ + 9 files changed, 4762 insertions(+) + create mode 100644 drivers/mmc/host/mtk-mmc/Kconfig + create mode 100644 drivers/mmc/host/mtk-mmc/Makefile + create mode 100644 drivers/mmc/host/mtk-mmc/board.h + create mode 100644 drivers/mmc/host/mtk-mmc/dbg.c + create mode 100644 drivers/mmc/host/mtk-mmc/dbg.h + create mode 100644 drivers/mmc/host/mtk-mmc/mt6575_sd.h + create mode 100644 drivers/mmc/host/mtk-mmc/sd.c + +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -1059,6 +1059,8 @@ config MMC_OWL + config MMC_SDHCI_EXTERNAL_DMA + bool + ++source "drivers/mmc/host/mtk-mmc/Kconfig" ++ + config MMC_LITEX + tristate "LiteX MMC Host Controller support" + depends on ((PPC_MICROWATT || LITEX) && OF && HAVE_CLK) || COMPILE_TEST +--- a/drivers/mmc/host/Makefile ++++ b/drivers/mmc/host/Makefile +@@ -3,6 +3,7 @@ + # Makefile for MMC/SD host controller drivers + # + ++obj-$(CONFIG_MTK_MMC) += mtk-mmc/ + obj-$(CONFIG_MMC_ARMMMCI) += armmmci.o + armmmci-y := mmci.o + armmmci-$(CONFIG_MMC_QCOM_DML) += mmci_qcom_dml.o diff --git a/target/linux/ramips/patches-6.6/835-asoc-add-mt7620-support.patch b/target/linux/ramips/patches-6.6/835-asoc-add-mt7620-support.patch new file mode 100644 index 0000000000..8e1095ab00 --- /dev/null +++ b/target/linux/ramips/patches-6.6/835-asoc-add-mt7620-support.patch @@ -0,0 +1,1031 @@ +From 7f29222b1731e8182ba94a331531dec18865a1e4 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 27 Jul 2014 09:31:47 +0100 +Subject: [PATCH 48/53] asoc: add mt7620 support + +Signed-off-by: John Crispin +--- + arch/mips/ralink/of.c | 2 + + sound/soc/Kconfig | 1 + + sound/soc/Makefile | 1 + + sound/soc/ralink/Kconfig | 15 ++ + sound/soc/ralink/Makefile | 11 + + sound/soc/ralink/mt7620-i2s.c | 436 ++++++++++++++++++++++++++++++++++++++ + sound/soc/ralink/mt7620-wm8960.c | 233 ++++++++++++++++++++ + 7 files changed, 699 insertions(+) + create mode 100644 sound/soc/ralink/Kconfig + create mode 100644 sound/soc/ralink/Makefile + create mode 100644 sound/soc/ralink/mt7620-i2s.c + create mode 100644 sound/soc/ralink/mt7620-wm8960.c + +--- a/sound/soc/Kconfig ++++ b/sound/soc/Kconfig +@@ -99,6 +99,7 @@ source "sound/soc/mxs/Kconfig" + source "sound/soc/pxa/Kconfig" + source "sound/soc/qcom/Kconfig" + source "sound/soc/rockchip/Kconfig" ++source "sound/soc/ralink/Kconfig" + source "sound/soc/samsung/Kconfig" + source "sound/soc/sh/Kconfig" + source "sound/soc/sof/Kconfig" +--- a/sound/soc/Makefile ++++ b/sound/soc/Makefile +@@ -56,6 +56,7 @@ obj-$(CONFIG_SND_SOC) += kirkwood/ + obj-$(CONFIG_SND_SOC) += pxa/ + obj-$(CONFIG_SND_SOC) += qcom/ + obj-$(CONFIG_SND_SOC) += rockchip/ ++obj-$(CONFIG_SND_SOC) += ralink/ + obj-$(CONFIG_SND_SOC) += samsung/ + obj-$(CONFIG_SND_SOC) += sh/ + obj-$(CONFIG_SND_SOC) += sof/ +--- /dev/null ++++ b/sound/soc/ralink/Kconfig +@@ -0,0 +1,8 @@ ++config SND_RALINK_SOC_I2S ++ depends on RALINK && SND_SOC && !SOC_RT288X ++ select SND_SOC_GENERIC_DMAENGINE_PCM ++ select REGMAP_MMIO ++ tristate "SoC Audio (I2S protocol) for Ralink SoC" ++ help ++ Say Y if you want to use I2S protocol and I2S codec on Ralink/MediaTek ++ based boards. +--- /dev/null ++++ b/sound/soc/ralink/Makefile +@@ -0,0 +1,6 @@ ++# ++# Ralink/MediaTek Platform Support ++# ++snd-soc-ralink-i2s-objs := ralink-i2s.o ++ ++obj-$(CONFIG_SND_RALINK_SOC_I2S) += snd-soc-ralink-i2s.o +--- /dev/null ++++ b/sound/soc/ralink/ralink-i2s.c +@@ -0,0 +1,968 @@ ++/* ++ * Copyright (C) 2010, Lars-Peter Clausen ++ * Copyright (C) 2016 Michael Lee ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define DRV_NAME "ralink-i2s" ++ ++#define I2S_REG_CFG0 0x00 ++#define I2S_REG_INT_STATUS 0x04 ++#define I2S_REG_INT_EN 0x08 ++#define I2S_REG_FF_STATUS 0x0c ++#define I2S_REG_WREG 0x10 ++#define I2S_REG_RREG 0x14 ++#define I2S_REG_CFG1 0x18 ++#define I2S_REG_DIVCMP 0x20 ++#define I2S_REG_DIVINT 0x24 ++ ++/* I2S_REG_CFG0 */ ++#define I2S_REG_CFG0_EN BIT(31) ++#define I2S_REG_CFG0_DMA_EN BIT(30) ++#define I2S_REG_CFG0_BYTE_SWAP BIT(28) ++#define I2S_REG_CFG0_TX_EN BIT(24) ++#define I2S_REG_CFG0_RX_EN BIT(20) ++#define I2S_REG_CFG0_SLAVE BIT(16) ++#define I2S_REG_CFG0_RX_THRES 12 ++#define I2S_REG_CFG0_TX_THRES 4 ++#define I2S_REG_CFG0_THRES_MASK (0xf << I2S_REG_CFG0_RX_THRES) | \ ++ (4 << I2S_REG_CFG0_TX_THRES) ++#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \ ++ (4 << I2S_REG_CFG0_TX_THRES) ++/* RT305x */ ++#define I2S_REG_CFG0_CLK_DIS BIT(8) ++#define I2S_REG_CFG0_TXCH_SWAP BIT(3) ++#define I2S_REG_CFG0_TXCH1_OFF BIT(2) ++#define I2S_REG_CFG0_TXCH0_OFF BIT(1) ++#define I2S_REG_CFG0_SLAVE_EN BIT(0) ++/* RT3883 */ ++#define I2S_REG_CFG0_RXCH_SWAP BIT(11) ++#define I2S_REG_CFG0_RXCH1_OFF BIT(10) ++#define I2S_REG_CFG0_RXCH0_OFF BIT(9) ++#define I2S_REG_CFG0_WS_INV BIT(0) ++/* MT7628 */ ++#define I2S_REG_CFG0_FMT_LE BIT(29) ++#define I2S_REG_CFG0_SYS_BE BIT(28) ++#define I2S_REG_CFG0_NORM_24 BIT(18) ++#define I2S_REG_CFG0_DATA_24 BIT(17) ++ ++/* I2S_REG_INT_STATUS */ ++#define I2S_REG_INT_RX_FAULT BIT(7) ++#define I2S_REG_INT_RX_OVRUN BIT(6) ++#define I2S_REG_INT_RX_UNRUN BIT(5) ++#define I2S_REG_INT_RX_THRES BIT(4) ++#define I2S_REG_INT_TX_FAULT BIT(3) ++#define I2S_REG_INT_TX_OVRUN BIT(2) ++#define I2S_REG_INT_TX_UNRUN BIT(1) ++#define I2S_REG_INT_TX_THRES BIT(0) ++#define I2S_REG_INT_TX_MASK 0xf ++#define I2S_REG_INT_RX_MASK 0xf0 ++ ++/* I2S_REG_INT_STATUS */ ++#define I2S_RX_AVCNT(x) ((x >> 4) & 0xf) ++#define I2S_TX_AVCNT(x) (x & 0xf) ++/* MT7628 */ ++#define MT7628_I2S_RX_AVCNT(x) ((x >> 8) & 0x1f) ++#define MT7628_I2S_TX_AVCNT(x) (x & 0x1f) ++ ++/* I2S_REG_CFG1 */ ++#define I2S_REG_CFG1_LBK BIT(31) ++#define I2S_REG_CFG1_EXTLBK BIT(30) ++/* RT3883 */ ++#define I2S_REG_CFG1_LEFT_J BIT(0) ++#define I2S_REG_CFG1_RIGHT_J BIT(1) ++#define I2S_REG_CFG1_FMT_MASK 0x3 ++ ++/* I2S_REG_DIVCMP */ ++#define I2S_REG_DIVCMP_CLKEN BIT(31) ++#define I2S_REG_DIVCMP_DIVCOMP_MASK 0x1ff ++ ++/* I2S_REG_DIVINT */ ++#define I2S_REG_DIVINT_MASK 0x3ff ++ ++/* BCLK dividers */ ++#define RALINK_I2S_DIVCMP 0 ++#define RALINK_I2S_DIVINT 1 ++ ++/* FIFO */ ++#define RALINK_I2S_FIFO_SIZE 32 ++ ++/* feature flags */ ++#define RALINK_FLAGS_TXONLY BIT(0) ++#define RALINK_FLAGS_LEFT_J BIT(1) ++#define RALINK_FLAGS_RIGHT_J BIT(2) ++#define RALINK_FLAGS_ENDIAN BIT(3) ++#define RALINK_FLAGS_24BIT BIT(4) ++ ++#define RALINK_I2S_INT_EN 0 ++ ++struct ralink_i2s_stats { ++ u32 dmafault; ++ u32 overrun; ++ u32 underrun; ++ u32 belowthres; ++}; ++ ++struct ralink_i2s { ++ struct device *dev; ++ void __iomem *regs; ++ struct clk *clk; ++ struct regmap *regmap; ++ u32 flags; ++ unsigned int fmt; ++ u16 txdma_req; ++ u16 rxdma_req; ++ ++ struct snd_dmaengine_dai_dma_data playback_dma_data; ++ struct snd_dmaengine_dai_dma_data capture_dma_data; ++ ++ struct dentry *dbg_dir; ++ struct dentry *dbg_stats; ++ struct ralink_i2s_stats txstats; ++ struct ralink_i2s_stats rxstats; ++}; ++ ++static void ralink_i2s_dump_regs(struct ralink_i2s *i2s) ++{ ++ u32 buf[10]; ++ int ret; ++ ++ ret = regmap_bulk_read(i2s->regmap, I2S_REG_CFG0, ++ buf, ARRAY_SIZE(buf)); ++ ++ dev_dbg(i2s->dev, "CFG0: %08x, INTSTAT: %08x, INTEN: %08x, " \ ++ "FFSTAT: %08x, WREG: %08x, RREG: %08x, " \ ++ "CFG1: %08x, DIVCMP: %08x, DIVINT: %08x\n", ++ buf[0], buf[1], buf[2], buf[3], buf[4], ++ buf[5], buf[6], buf[8], buf[9]); ++} ++ ++static int ralink_i2s_set_sysclk(struct snd_soc_dai *dai, ++ int clk_id, unsigned int freq, int dir) ++{ ++ return 0; ++} ++ ++static int ralink_i2s_set_sys_bclk(struct snd_soc_dai *dai, int width, int rate) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned long clk = clk_get_rate(i2s->clk); ++ int div; ++ uint32_t data; ++ ++ /* disable clock at slave mode */ ++ if ((i2s->fmt & SND_SOC_DAIFMT_MASTER_MASK) == ++ SND_SOC_DAIFMT_CBM_CFM) { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_CLK_DIS, ++ I2S_REG_CFG0_CLK_DIS); ++ return 0; ++ } ++ ++ /* FREQOUT = FREQIN / (I2S_CLK_DIV + 1) */ ++ div = (clk / rate ) - 1; ++ ++ data = rt_sysc_r32(0x30); ++ data &= (0xff << 8); ++ data |= (0x1 << 15) | (div << 8); ++ rt_sysc_w32(data, 0x30); ++ ++ /* enable clock */ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, I2S_REG_CFG0_CLK_DIS, 0); ++ ++ dev_dbg(i2s->dev, "clk: %lu, rate: %u, div: %d\n", ++ clk, rate, div); ++ ++ return 0; ++} ++ ++static int ralink_i2s_set_bclk(struct snd_soc_dai *dai, int width, int rate) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned long clk = clk_get_rate(i2s->clk); ++ int divint, divcomp; ++ ++ /* disable clock at slave mode */ ++ if ((i2s->fmt & SND_SOC_DAIFMT_MASTER_MASK) == ++ SND_SOC_DAIFMT_CBM_CFM) { ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVCMP, ++ I2S_REG_DIVCMP_CLKEN, 0); ++ return 0; ++ } ++ ++ /* FREQOUT = FREQIN * (1/2) * (1/(DIVINT + DIVCOMP/512)) */ ++ clk = clk / (2 * 2 * width); ++ divint = clk / rate; ++ divcomp = ((clk % rate) * 512) / rate; ++ ++ if ((divint > I2S_REG_DIVINT_MASK) || ++ (divcomp > I2S_REG_DIVCMP_DIVCOMP_MASK)) ++ return -EINVAL; ++ ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVINT, ++ I2S_REG_DIVINT_MASK, divint); ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVCMP, ++ I2S_REG_DIVCMP_DIVCOMP_MASK, divcomp); ++ ++ /* enable clock */ ++ regmap_update_bits(i2s->regmap, I2S_REG_DIVCMP, I2S_REG_DIVCMP_CLKEN, ++ I2S_REG_DIVCMP_CLKEN); ++ ++ dev_dbg(i2s->dev, "clk: %lu, rate: %u, int: %d, comp: %d\n", ++ clk_get_rate(i2s->clk), rate, divint, divcomp); ++ ++ return 0; ++} ++ ++static int ralink_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned int cfg0 = 0, cfg1 = 0; ++ ++ /* set master/slave audio interface */ ++ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { ++ case SND_SOC_DAIFMT_CBM_CFM: ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ cfg0 |= I2S_REG_CFG0_SLAVE_EN; ++ else ++ cfg0 |= I2S_REG_CFG0_SLAVE; ++ break; ++ case SND_SOC_DAIFMT_CBS_CFS: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ /* interface format */ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ break; ++ case SND_SOC_DAIFMT_RIGHT_J: ++ if (i2s->flags & RALINK_FLAGS_RIGHT_J) { ++ cfg1 |= I2S_REG_CFG1_RIGHT_J; ++ break; ++ } ++ return -EINVAL; ++ case SND_SOC_DAIFMT_LEFT_J: ++ if (i2s->flags & RALINK_FLAGS_LEFT_J) { ++ cfg1 |= I2S_REG_CFG1_LEFT_J; ++ break; ++ } ++ return -EINVAL; ++ default: ++ return -EINVAL; ++ } ++ ++ /* clock inversion */ ++ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { ++ case SND_SOC_DAIFMT_NB_NF: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SLAVE_EN, cfg0); ++ } else { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SLAVE, cfg0); ++ } ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG1, ++ I2S_REG_CFG1_FMT_MASK, cfg1); ++ i2s->fmt = fmt; ++ ++ return 0; ++} ++ ++static int ralink_i2s_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ ++ if (snd_soc_dai_active(dai)) ++ return 0; ++ ++ /* setup status interrupt */ ++#if (RALINK_I2S_INT_EN) ++ regmap_write(i2s->regmap, I2S_REG_INT_EN, 0xff); ++#else ++ regmap_write(i2s->regmap, I2S_REG_INT_EN, 0x0); ++#endif ++ ++ /* enable */ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_EN | I2S_REG_CFG0_DMA_EN | ++ I2S_REG_CFG0_THRES_MASK, ++ I2S_REG_CFG0_EN | I2S_REG_CFG0_DMA_EN | ++ I2S_REG_CFG0_DFT_THRES); ++ ++ return 0; ++} ++ ++static void ralink_i2s_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ ++ /* If both streams are stopped, disable module and clock */ ++ if (snd_soc_dai_active(dai)) ++ return; ++ ++ /* ++ * datasheet mention when disable all control regs are cleared ++ * to initial values. need reinit at startup. ++ */ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, I2S_REG_CFG0_EN, 0); ++} ++ ++static int ralink_i2s_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ int width; ++ int ret; ++ ++ width = params_width(params); ++ switch (width) { ++ case 16: ++ if (i2s->flags & RALINK_FLAGS_24BIT) ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_DATA_24, 0); ++ break; ++ case 24: ++ if (i2s->flags & RALINK_FLAGS_24BIT) { ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_DATA_24, ++ I2S_REG_CFG0_DATA_24); ++ break; ++ } ++ return -EINVAL; ++ default: ++ return -EINVAL; ++ } ++ ++ switch (params_channels(params)) { ++ case 2: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (i2s->flags & RALINK_FLAGS_ENDIAN) { ++ /* system endian */ ++#ifdef SNDRV_LITTLE_ENDIAN ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SYS_BE, 0); ++#else ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_SYS_BE, ++ I2S_REG_CFG0_SYS_BE); ++#endif ++ ++ /* data endian */ ++ switch (params_format(params)) { ++ case SNDRV_PCM_FORMAT_S16_LE: ++ case SNDRV_PCM_FORMAT_S24_LE: ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_FMT_LE, ++ I2S_REG_CFG0_FMT_LE); ++ break; ++ case SNDRV_PCM_FORMAT_S16_BE: ++ case SNDRV_PCM_FORMAT_S24_BE: ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, ++ I2S_REG_CFG0_FMT_LE, 0); ++ break; ++ default: ++ return -EINVAL; ++ } ++ } ++ ++ /* setup bclk rate */ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ ret = ralink_i2s_set_sys_bclk(dai, width, params_rate(params)); ++ else ++ ret = ralink_i2s_set_bclk(dai, width, params_rate(params)); ++ ++ return ret; ++} ++ ++static int ralink_i2s_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ unsigned int mask, val; ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ mask = I2S_REG_CFG0_TX_EN; ++ else ++ mask = I2S_REG_CFG0_RX_EN; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ val = mask; ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ val = 0; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(i2s->regmap, I2S_REG_CFG0, mask, val); ++ ++ return 0; ++} ++ ++static void ralink_i2s_init_dma_data(struct ralink_i2s *i2s, ++ struct resource *res) ++{ ++ struct snd_dmaengine_dai_dma_data *dma_data; ++ ++ /* Playback */ ++ dma_data = &i2s->playback_dma_data; ++ dma_data->addr = res->start + I2S_REG_WREG; ++ dma_data->addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ dma_data->maxburst = 1; ++ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ return; ++ ++ /* Capture */ ++ dma_data = &i2s->capture_dma_data; ++ dma_data->addr = res->start + I2S_REG_RREG; ++ dma_data->addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ dma_data->maxburst = 1; ++} ++ ++static int ralink_i2s_dai_probe(struct snd_soc_dai *dai) ++{ ++ struct ralink_i2s *i2s = snd_soc_dai_get_drvdata(dai); ++ ++ snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data, ++ &i2s->capture_dma_data); ++ ++ return 0; ++} ++ ++static int ralink_i2s_dai_remove(struct snd_soc_dai *dai) ++{ ++ return 0; ++} ++ ++static const struct snd_soc_dai_ops ralink_i2s_dai_ops = { ++ .set_sysclk = ralink_i2s_set_sysclk, ++ .set_fmt = ralink_i2s_set_fmt, ++ .startup = ralink_i2s_startup, ++ .shutdown = ralink_i2s_shutdown, ++ .hw_params = ralink_i2s_hw_params, ++ .trigger = ralink_i2s_trigger, ++ .probe = ralink_i2s_dai_probe, ++ .remove = ralink_i2s_dai_remove, ++}; ++ ++static struct snd_soc_dai_driver ralink_i2s_dai = { ++ .name = DRV_NAME, ++ .ops = &ralink_i2s_dai_ops, ++ .capture = { ++ .stream_name = "I2S Capture", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rate_min = 5512, ++ .rate_max = 192000, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .playback = { ++ .stream_name = "I2S Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rate_min = 5512, ++ .rate_max = 192000, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .symmetric_rate = 1, ++}; ++ ++static struct snd_pcm_hardware ralink_pcm_hardware = { ++ .info = SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_BLOCK_TRANSFER, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ .channels_min = 2, ++ .channels_max = 2, ++ .period_bytes_min = PAGE_SIZE, ++ .period_bytes_max = PAGE_SIZE * 2, ++ .periods_min = 2, ++ .periods_max = 128, ++ .buffer_bytes_max = 128 * 1024, ++ .fifo_size = RALINK_I2S_FIFO_SIZE, ++}; ++ ++static const struct snd_dmaengine_pcm_config ralink_dmaengine_pcm_config = { ++ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, ++ .pcm_hardware = &ralink_pcm_hardware, ++ .prealloc_buffer_size = 256 * PAGE_SIZE, ++}; ++ ++static const struct snd_soc_component_driver ralink_i2s_component = { ++ .name = DRV_NAME, ++}; ++ ++static bool ralink_i2s_readable_reg(struct device *dev, unsigned int reg) ++{ ++ return true; ++} ++ ++static bool ralink_i2s_volatile_reg(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case I2S_REG_INT_STATUS: ++ case I2S_REG_FF_STATUS: ++ return true; ++ } ++ return false; ++} ++ ++static bool ralink_i2s_writeable_reg(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case I2S_REG_FF_STATUS: ++ case I2S_REG_RREG: ++ return false; ++ } ++ return true; ++} ++ ++static const struct regmap_config ralink_i2s_regmap_config = { ++ .reg_bits = 32, ++ .reg_stride = 4, ++ .val_bits = 32, ++ .writeable_reg = ralink_i2s_writeable_reg, ++ .readable_reg = ralink_i2s_readable_reg, ++ .volatile_reg = ralink_i2s_volatile_reg, ++ .max_register = I2S_REG_DIVINT, ++}; ++ ++#if (RALINK_I2S_INT_EN) ++static irqreturn_t ralink_i2s_irq(int irq, void *devid) ++{ ++ struct ralink_i2s *i2s = devid; ++ u32 status; ++ ++ regmap_read(i2s->regmap, I2S_REG_INT_STATUS, &status); ++ if (unlikely(!status)) ++ return IRQ_NONE; ++ ++ /* tx stats */ ++ if (status & I2S_REG_INT_TX_MASK) { ++ if (status & I2S_REG_INT_TX_THRES) ++ i2s->txstats.belowthres++; ++ if (status & I2S_REG_INT_TX_UNRUN) ++ i2s->txstats.underrun++; ++ if (status & I2S_REG_INT_TX_OVRUN) ++ i2s->txstats.overrun++; ++ if (status & I2S_REG_INT_TX_FAULT) ++ i2s->txstats.dmafault++; ++ } ++ ++ /* rx stats */ ++ if (status & I2S_REG_INT_RX_MASK) { ++ if (status & I2S_REG_INT_RX_THRES) ++ i2s->rxstats.belowthres++; ++ if (status & I2S_REG_INT_RX_UNRUN) ++ i2s->rxstats.underrun++; ++ if (status & I2S_REG_INT_RX_OVRUN) ++ i2s->rxstats.overrun++; ++ if (status & I2S_REG_INT_RX_FAULT) ++ i2s->rxstats.dmafault++; ++ } ++ ++ /* clean status bits */ ++ regmap_write(i2s->regmap, I2S_REG_INT_STATUS, status); ++ ++ return IRQ_HANDLED; ++} ++#endif ++ ++#if IS_ENABLED(CONFIG_DEBUG_FS) ++static int ralink_i2s_stats_show(struct seq_file *s, void *unused) ++{ ++ struct ralink_i2s *i2s = s->private; ++ ++ seq_printf(s, "tx stats\n"); ++ seq_printf(s, "\tbelow threshold\t%u\n", i2s->txstats.belowthres); ++ seq_printf(s, "\tunder run\t%u\n", i2s->txstats.underrun); ++ seq_printf(s, "\tover run\t%u\n", i2s->txstats.overrun); ++ seq_printf(s, "\tdma fault\t%u\n", i2s->txstats.dmafault); ++ ++ seq_printf(s, "rx stats\n"); ++ seq_printf(s, "\tbelow threshold\t%u\n", i2s->rxstats.belowthres); ++ seq_printf(s, "\tunder run\t%u\n", i2s->rxstats.underrun); ++ seq_printf(s, "\tover run\t%u\n", i2s->rxstats.overrun); ++ seq_printf(s, "\tdma fault\t%u\n", i2s->rxstats.dmafault); ++ ++ ralink_i2s_dump_regs(i2s); ++ ++ return 0; ++} ++ ++static int ralink_i2s_stats_open(struct inode *inode, struct file *file) ++{ ++ return single_open(file, ralink_i2s_stats_show, inode->i_private); ++} ++ ++static const struct file_operations ralink_i2s_stats_ops = { ++ .open = ralink_i2s_stats_open, ++ .read = seq_read, ++ .llseek = seq_lseek, ++ .release = single_release, ++}; ++ ++static inline int ralink_i2s_debugfs_create(struct ralink_i2s *i2s) ++{ ++ i2s->dbg_dir = debugfs_create_dir(dev_name(i2s->dev), NULL); ++ if (!i2s->dbg_dir) ++ return -ENOMEM; ++ ++ i2s->dbg_stats = debugfs_create_file("stats", S_IRUGO, ++ i2s->dbg_dir, i2s, &ralink_i2s_stats_ops); ++ if (!i2s->dbg_stats) { ++ debugfs_remove(i2s->dbg_dir); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static inline void ralink_i2s_debugfs_remove(struct ralink_i2s *i2s) ++{ ++ debugfs_remove(i2s->dbg_stats); ++ debugfs_remove(i2s->dbg_dir); ++} ++#else ++static inline int ralink_i2s_debugfs_create(struct ralink_i2s *i2s) ++{ ++ return 0; ++} ++ ++static inline void ralink_i2s_debugfs_remove(struct ralink_i2s *i2s) ++{ ++} ++#endif ++ ++/* ++ * TODO: these refclk setup functions should use ++ * clock framework instead. hardcode it now. ++ */ ++static void rt3350_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data |= (0x1 << 8); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void rt3883_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x3 << 13); ++ data |= (0x1 << 13); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void rt3552_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0xf << 8); ++ data |= (0x3 << 8); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void mt7620_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x7 << 9); ++ data |= 0x1 << 9; ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void mt7621_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x1f << 18); ++ data |= (0x19 << 18); ++ data &= ~(0x1f << 12); ++ data |= (0x1 << 12); ++ data &= ~(0x7 << 9); ++ data |= (0x5 << 9); ++ rt_sysc_w32(data, 0x2c); ++} ++ ++static void mt7628_refclk_setup(void) ++{ ++ uint32_t data; ++ ++ /* set i2s and refclk digital pad */ ++ data = rt_sysc_r32(0x3c); ++ data |= 0x1f; ++ rt_sysc_w32(data, 0x3c); ++ ++ /* Adjust REFCLK0's driving strength */ ++ data = rt_sysc_r32(0x1354); ++ data &= ~(0x1 << 5); ++ rt_sysc_w32(data, 0x1354); ++ data = rt_sysc_r32(0x1364); ++ data |= ~(0x1 << 5); ++ rt_sysc_w32(data, 0x1364); ++ ++ /* set refclk output 12Mhz clock */ ++ data = rt_sysc_r32(0x2c); ++ data &= ~(0x7 << 9); ++ data |= 0x1 << 9; ++ rt_sysc_w32(data, 0x2c); ++} ++ ++struct rt_i2s_data { ++ u32 flags; ++ void (*refclk_setup)(void); ++}; ++ ++struct rt_i2s_data rt3050_i2s_data = { .flags = RALINK_FLAGS_TXONLY }; ++struct rt_i2s_data rt3350_i2s_data = { .flags = RALINK_FLAGS_TXONLY, ++ .refclk_setup = rt3350_refclk_setup }; ++struct rt_i2s_data rt3883_i2s_data = { ++ .flags = (RALINK_FLAGS_LEFT_J | RALINK_FLAGS_RIGHT_J), ++ .refclk_setup = rt3883_refclk_setup }; ++struct rt_i2s_data rt3352_i2s_data = { .refclk_setup = rt3552_refclk_setup}; ++struct rt_i2s_data mt7620_i2s_data = { .refclk_setup = mt7620_refclk_setup}; ++struct rt_i2s_data mt7621_i2s_data = { .refclk_setup = mt7621_refclk_setup}; ++struct rt_i2s_data mt7628_i2s_data = { ++ .flags = (RALINK_FLAGS_ENDIAN | RALINK_FLAGS_24BIT | ++ RALINK_FLAGS_LEFT_J), ++ .refclk_setup = mt7628_refclk_setup}; ++ ++static const struct of_device_id ralink_i2s_match_table[] = { ++ { .compatible = "ralink,rt3050-i2s", ++ .data = (void *)&rt3050_i2s_data }, ++ { .compatible = "ralink,rt3350-i2s", ++ .data = (void *)&rt3350_i2s_data }, ++ { .compatible = "ralink,rt3883-i2s", ++ .data = (void *)&rt3883_i2s_data }, ++ { .compatible = "ralink,rt3352-i2s", ++ .data = (void *)&rt3352_i2s_data }, ++ { .compatible = "mediatek,mt7620-i2s", ++ .data = (void *)&mt7620_i2s_data }, ++ { .compatible = "mediatek,mt7621-i2s", ++ .data = (void *)&mt7621_i2s_data }, ++ { .compatible = "mediatek,mt7628-i2s", ++ .data = (void *)&mt7628_i2s_data }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ralink_i2s_match_table); ++ ++static int ralink_i2s_probe(struct platform_device *pdev) ++{ ++ const struct of_device_id *match; ++ struct device_node *np = pdev->dev.of_node; ++ struct ralink_i2s *i2s; ++ struct resource *res; ++ int irq, ret; ++ u32 dma_req; ++ struct rt_i2s_data *data; ++ ++ i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); ++ if (!i2s) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, i2s); ++ i2s->dev = &pdev->dev; ++ ++ match = of_match_device(ralink_i2s_match_table, &pdev->dev); ++ if (!match) ++ return -EINVAL; ++ data = (struct rt_i2s_data *)match->data; ++ i2s->flags = data->flags; ++ /* setup out 12Mhz refclk to codec as mclk */ ++ if (data->refclk_setup) ++ data->refclk_setup(); ++ ++ if (of_property_read_u32(np, "txdma-req", &dma_req)) { ++ dev_err(&pdev->dev, "no txdma-req define\n"); ++ return -EINVAL; ++ } ++ i2s->txdma_req = (u16)dma_req; ++ if (!(i2s->flags & RALINK_FLAGS_TXONLY)) { ++ if (of_property_read_u32(np, "rxdma-req", &dma_req)) { ++ dev_err(&pdev->dev, "no rxdma-req define\n"); ++ return -EINVAL; ++ } ++ i2s->rxdma_req = (u16)dma_req; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ i2s->regs = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(i2s->regs)) ++ return PTR_ERR(i2s->regs); ++ ++ i2s->regmap = devm_regmap_init_mmio(&pdev->dev, i2s->regs, ++ &ralink_i2s_regmap_config); ++ if (IS_ERR(i2s->regmap)) { ++ dev_err(&pdev->dev, "regmap init failed\n"); ++ return PTR_ERR(i2s->regmap); ++ } ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(&pdev->dev, "failed to get irq\n"); ++ return -EINVAL; ++ } ++ ++#if (RALINK_I2S_INT_EN) ++ ret = devm_request_irq(&pdev->dev, irq, ralink_i2s_irq, ++ 0, dev_name(&pdev->dev), i2s); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request irq\n"); ++ return ret; ++ } ++#endif ++ ++ i2s->clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(i2s->clk)) { ++ dev_err(&pdev->dev, "no clock defined\n"); ++ return PTR_ERR(i2s->clk); ++ } ++ ++ ret = clk_prepare_enable(i2s->clk); ++ if (ret) ++ return ret; ++ ++ ralink_i2s_init_dma_data(i2s, res); ++ ++ ret = device_reset(&pdev->dev); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to reset device\n"); ++ goto err_clk_disable; ++ } ++ ++ ret = ralink_i2s_debugfs_create(i2s); ++ if (ret) { ++ dev_err(&pdev->dev, "create debugfs failed\n"); ++ goto err_clk_disable; ++ } ++ ++ /* enable 24bits support */ ++ if (i2s->flags & RALINK_FLAGS_24BIT) { ++ ralink_i2s_dai.capture.formats |= SNDRV_PCM_FMTBIT_S24_LE; ++ ralink_i2s_dai.playback.formats |= SNDRV_PCM_FMTBIT_S24_LE; ++ } ++ ++ /* enable big endian support */ ++ if (i2s->flags & RALINK_FLAGS_ENDIAN) { ++ ralink_i2s_dai.capture.formats |= SNDRV_PCM_FMTBIT_S16_BE; ++ ralink_i2s_dai.playback.formats |= SNDRV_PCM_FMTBIT_S16_BE; ++ ralink_pcm_hardware.formats |= SNDRV_PCM_FMTBIT_S16_BE; ++ if (i2s->flags & RALINK_FLAGS_24BIT) { ++ ralink_i2s_dai.capture.formats |= ++ SNDRV_PCM_FMTBIT_S24_BE; ++ ralink_i2s_dai.playback.formats |= ++ SNDRV_PCM_FMTBIT_S24_BE; ++ ralink_pcm_hardware.formats |= ++ SNDRV_PCM_FMTBIT_S24_BE; ++ } ++ } ++ ++ /* disable capture support */ ++ if (i2s->flags & RALINK_FLAGS_TXONLY) ++ memset(&ralink_i2s_dai.capture, sizeof(ralink_i2s_dai.capture), ++ 0); ++ ++ ret = devm_snd_soc_register_component(&pdev->dev, &ralink_i2s_component, ++ &ralink_i2s_dai, 1); ++ if (ret) ++ goto err_debugfs; ++ ++ ret = devm_snd_dmaengine_pcm_register(&pdev->dev, ++ &ralink_dmaengine_pcm_config, ++ SND_DMAENGINE_PCM_FLAG_COMPAT); ++ if (ret) ++ goto err_debugfs; ++ ++ dev_info(i2s->dev, "mclk %luMHz\n", clk_get_rate(i2s->clk) / 1000000); ++ ++ return 0; ++ ++err_debugfs: ++ ralink_i2s_debugfs_remove(i2s); ++ ++err_clk_disable: ++ clk_disable_unprepare(i2s->clk); ++ ++ return ret; ++} ++ ++static int ralink_i2s_remove(struct platform_device *pdev) ++{ ++ struct ralink_i2s *i2s = platform_get_drvdata(pdev); ++ ++ ralink_i2s_debugfs_remove(i2s); ++ clk_disable_unprepare(i2s->clk); ++ ++ return 0; ++} ++ ++static struct platform_driver ralink_i2s_driver = { ++ .probe = ralink_i2s_probe, ++ .remove = ralink_i2s_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = ralink_i2s_match_table, ++ }, ++}; ++module_platform_driver(ralink_i2s_driver); ++ ++MODULE_AUTHOR("Lars-Peter Clausen, "); ++MODULE_DESCRIPTION("Ralink/MediaTek I2S driver"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:" DRV_NAME); diff --git a/target/linux/ramips/patches-6.6/840-serial-add-ugly-custom-baud-rate-hack.patch b/target/linux/ramips/patches-6.6/840-serial-add-ugly-custom-baud-rate-hack.patch new file mode 100644 index 0000000000..3d90286470 --- /dev/null +++ b/target/linux/ramips/patches-6.6/840-serial-add-ugly-custom-baud-rate-hack.patch @@ -0,0 +1,22 @@ +From a7eb46e0ea4a11e4dfb56ab129bf816d1059a6c5 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 7 Dec 2015 17:31:08 +0100 +Subject: [PATCH 51/53] serial: add ugly custom baud rate hack + +Signed-off-by: John Crispin +--- + drivers/tty/serial/serial_core.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/tty/serial/serial_core.c ++++ b/drivers/tty/serial/serial_core.c +@@ -467,6 +467,9 @@ uart_get_baud_rate(struct uart_port *por + break; + } + ++ if (tty_termios_baud_rate(termios) == 2500000) ++ return 250000; ++ + for (try = 0; try < 2; try++) { + baud = tty_termios_baud_rate(termios); + diff --git a/target/linux/ramips/patches-6.6/845-pwm-add-mediatek-support.patch b/target/linux/ramips/patches-6.6/845-pwm-add-mediatek-support.patch new file mode 100644 index 0000000000..67cc389fd5 --- /dev/null +++ b/target/linux/ramips/patches-6.6/845-pwm-add-mediatek-support.patch @@ -0,0 +1,241 @@ +From fc8f96309c21c1bc3276427309cd7d361347d66e Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 7 Dec 2015 17:16:50 +0100 +Subject: [PATCH 52/53] pwm: add mediatek support + +Signed-off-by: John Crispin +--- + drivers/pwm/Kconfig | 9 +++ + drivers/pwm/Makefile | 1 + + drivers/pwm/pwm-mediatek.c | 173 ++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 183 insertions(+) + create mode 100644 drivers/pwm/pwm-mediatek.c + +--- a/drivers/pwm/Kconfig ++++ b/drivers/pwm/Kconfig +@@ -415,6 +415,15 @@ config PWM_MICROCHIP_CORE + To compile this driver as a module, choose M here: the module + will be called pwm-microchip-core. + ++config PWM_MEDIATEK_RAMIPS ++ tristate "Mediatek PWM support" ++ depends on RALINK && OF ++ help ++ Generic PWM framework driver for Mediatek ARM SoC. ++ ++ To compile this driver as a module, choose M here: the module ++ will be called pwm-mxs. ++ + config PWM_MXS + tristate "Freescale MXS PWM support" + depends on ARCH_MXS || COMPILE_TEST +--- a/drivers/pwm/Makefile ++++ b/drivers/pwm/Makefile +@@ -35,6 +35,7 @@ obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-p + obj-$(CONFIG_PWM_LPSS_PLATFORM) += pwm-lpss-platform.o + obj-$(CONFIG_PWM_MESON) += pwm-meson.o + obj-$(CONFIG_PWM_MEDIATEK) += pwm-mediatek.o ++obj-$(CONFIG_PWM_MEDIATEK_RAMIPS) += pwm-mediatek-ramips.o + obj-$(CONFIG_PWM_MICROCHIP_CORE) += pwm-microchip-core.o + obj-$(CONFIG_PWM_MTK_DISP) += pwm-mtk-disp.o + obj-$(CONFIG_PWM_MXS) += pwm-mxs.o +--- /dev/null ++++ b/drivers/pwm/pwm-mediatek-ramips.c +@@ -0,0 +1,197 @@ ++/* ++ * Mediatek Pulse Width Modulator driver ++ * ++ * Copyright (C) 2015 John Crispin ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NUM_PWM 4 ++ ++/* PWM registers and bits definitions */ ++#define PWMCON 0x00 ++#define PWMHDUR 0x04 ++#define PWMLDUR 0x08 ++#define PWMGDUR 0x0c ++#define PWMWAVENUM 0x28 ++#define PWMDWIDTH 0x2c ++#define PWMTHRES 0x30 ++ ++/** ++ * struct mtk_pwm_chip - struct representing pwm chip ++ * ++ * @mmio_base: base address of pwm chip ++ * @chip: linux pwm chip representation ++ */ ++struct mtk_pwm_chip { ++ void __iomem *mmio_base; ++ struct pwm_chip chip; ++}; ++ ++static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip) ++{ ++ return container_of(chip, struct mtk_pwm_chip, chip); ++} ++ ++static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num, ++ unsigned long offset) ++{ ++ return ioread32(chip->mmio_base + 0x10 + (num * 0x40) + offset); ++} ++ ++static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip, ++ unsigned int num, unsigned long offset, ++ unsigned long val) ++{ ++ iowrite32(val, chip->mmio_base + 0x10 + (num * 0x40) + offset); ++} ++ ++static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, ++ int duty_ns, int period_ns) ++{ ++ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip); ++ u32 resolution = 100 / 4; ++ u32 clkdiv = 0; ++ ++ while (period_ns / resolution > 8191) { ++ clkdiv++; ++ resolution *= 2; ++ } ++ ++ if (clkdiv > 7) ++ return -1; ++ ++ mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | BIT(3) | clkdiv); ++ mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution); ++ mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution); ++ return 0; ++} ++ ++static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) ++{ ++ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip); ++ u32 val; ++ ++ val = ioread32(pc->mmio_base); ++ val |= BIT(pwm->hwpwm); ++ iowrite32(val, pc->mmio_base); ++ ++ return 0; ++} ++ ++static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) ++{ ++ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip); ++ u32 val; ++ ++ val = ioread32(pc->mmio_base); ++ val &= ~BIT(pwm->hwpwm); ++ iowrite32(val, pc->mmio_base); ++} ++ ++static int mtk_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, ++ const struct pwm_state *state) ++{ ++ int err; ++ bool enabled = pwm->state.enabled; ++ ++ if (!state->enabled) { ++ if (enabled) ++ mtk_pwm_disable(chip, pwm); ++ ++ return 0; ++ } ++ ++ err = mtk_pwm_config(pwm->chip, pwm, ++ state->duty_cycle, state->period); ++ if (err) ++ return err; ++ ++ if (!enabled) ++ err = mtk_pwm_enable(chip, pwm); ++ ++ return err; ++} ++ ++static const struct pwm_ops mtk_pwm_ops = { ++ .apply = mtk_pwm_apply, ++ .owner = THIS_MODULE, ++}; ++ ++static int mtk_pwm_probe(struct platform_device *pdev) ++{ ++ struct mtk_pwm_chip *pc; ++ struct resource *r; ++ int ret; ++ ++ pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); ++ if (!pc) ++ return -ENOMEM; ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); ++ if (IS_ERR(pc->mmio_base)) ++ return PTR_ERR(pc->mmio_base); ++ ++ platform_set_drvdata(pdev, pc); ++ ++ pc->chip.dev = &pdev->dev; ++ pc->chip.ops = &mtk_pwm_ops; ++ pc->chip.base = -1; ++ pc->chip.npwm = NUM_PWM; ++ ++ ret = pwmchip_add(&pc->chip); ++ if (ret < 0) ++ dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static int mtk_pwm_remove(struct platform_device *pdev) ++{ ++ struct mtk_pwm_chip *pc = platform_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < NUM_PWM; i++) ++ pwm_disable(&pc->chip.pwms[i]); ++ ++ pwmchip_remove(&pc->chip); ++ ++ return 0; ++} ++ ++static const struct of_device_id mtk_pwm_of_match[] = { ++ { .compatible = "mediatek,mt7628-pwm" }, ++ { } ++}; ++ ++MODULE_DEVICE_TABLE(of, mtk_pwm_of_match); ++ ++static struct platform_driver mtk_pwm_driver = { ++ .driver = { ++ .name = "mtk-pwm", ++ .owner = THIS_MODULE, ++ .of_match_table = mtk_pwm_of_match, ++ }, ++ .probe = mtk_pwm_probe, ++ .remove = mtk_pwm_remove, ++}; ++ ++module_platform_driver(mtk_pwm_driver); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("John Crispin "); ++MODULE_ALIAS("platform:mtk-pwm"); diff --git a/target/linux/ramips/patches-6.6/850-awake-rt305x-dwc2-controller.patch b/target/linux/ramips/patches-6.6/850-awake-rt305x-dwc2-controller.patch new file mode 100644 index 0000000000..a08056d8d9 --- /dev/null +++ b/target/linux/ramips/patches-6.6/850-awake-rt305x-dwc2-controller.patch @@ -0,0 +1,15 @@ +--- a/drivers/usb/dwc2/platform.c ++++ b/drivers/usb/dwc2/platform.c +@@ -493,6 +493,12 @@ static int dwc2_driver_probe(struct plat + if (retval) + return retval; + ++ /* Enable USB port before any regs access */ ++ if (readl(hsotg->regs + PCGCTL) & 0x0f) { ++ writel(0x00, hsotg->regs + PCGCTL); ++ /* TODO: mdelay(25) here? vendor driver don't use it */ ++ } ++ + hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg); + + retval = dwc2_get_dr_mode(hsotg); diff --git a/target/linux/ramips/patches-6.6/855-linkit_bootstrap.patch b/target/linux/ramips/patches-6.6/855-linkit_bootstrap.patch new file mode 100644 index 0000000000..16eaf619a0 --- /dev/null +++ b/target/linux/ramips/patches-6.6/855-linkit_bootstrap.patch @@ -0,0 +1,97 @@ +--- a/drivers/misc/Makefile ++++ b/drivers/misc/Makefile +@@ -52,6 +52,7 @@ obj-$(CONFIG_ECHO) += echo/ + obj-$(CONFIG_CXL_BASE) += cxl/ + obj-$(CONFIG_DW_XDATA_PCIE) += dw-xdata-pcie.o + obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o ++obj-$(CONFIG_SOC_MT7620) += linkit.o + obj-$(CONFIG_OCXL) += ocxl/ + obj-$(CONFIG_BCM_VK) += bcm-vk/ + obj-y += cardreader/ +--- /dev/null ++++ b/drivers/misc/linkit.c +@@ -0,0 +1,84 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * publishhed by the Free Software Foundation. ++ * ++ * Copyright (C) 2015 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define LINKIT_LATCH_GPIO 11 ++ ++struct linkit_hw_data { ++ char board[16]; ++ char rev[16]; ++}; ++ ++static void sanify_string(char *s) ++{ ++ int i; ++ ++ for (i = 0; i < 15; i++) ++ if (s[i] <= 0x20) ++ s[i] = '\0'; ++ s[15] = '\0'; ++} ++ ++static int linkit_probe(struct platform_device *pdev) ++{ ++ struct linkit_hw_data hw; ++ struct mtd_info *mtd; ++ size_t retlen; ++ int ret; ++ ++ mtd = get_mtd_device_nm("factory"); ++ if (IS_ERR(mtd)) ++ return PTR_ERR(mtd); ++ ++ ret = mtd_read(mtd, 0x400, sizeof(hw), &retlen, (u_char *) &hw); ++ put_mtd_device(mtd); ++ ++ sanify_string(hw.board); ++ sanify_string(hw.rev); ++ ++ dev_info(&pdev->dev, "Version : %s\n", hw.board); ++ dev_info(&pdev->dev, "Revision : %s\n", hw.rev); ++ ++ if (!strcmp(hw.board, "LINKITS7688")) { ++ dev_info(&pdev->dev, "setting up bootstrap latch\n"); ++ ++ if (devm_gpio_request(&pdev->dev, LINKIT_LATCH_GPIO, "bootstrap")) { ++ dev_err(&pdev->dev, "failed to setup bootstrap gpio\n"); ++ return -1; ++ } ++ gpio_direction_output(LINKIT_LATCH_GPIO, 0); ++ } ++ ++ return 0; ++} ++ ++static const struct of_device_id linkit_match[] = { ++ { .compatible = "mediatek,linkit" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, linkit_match); ++ ++static struct platform_driver linkit_driver = { ++ .probe = linkit_probe, ++ .driver = { ++ .name = "mtk-linkit", ++ .owner = THIS_MODULE, ++ .of_match_table = linkit_match, ++ }, ++}; ++ ++int __init linkit_init(void) ++{ ++ return platform_driver_register(&linkit_driver); ++} ++late_initcall_sync(linkit_init); diff --git a/target/linux/ramips/patches-6.6/860-ramips-add-eip93-driver.patch b/target/linux/ramips/patches-6.6/860-ramips-add-eip93-driver.patch new file mode 100644 index 0000000000..5d0b3104b1 --- /dev/null +++ b/target/linux/ramips/patches-6.6/860-ramips-add-eip93-driver.patch @@ -0,0 +1,3276 @@ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/Kconfig +@@ -0,0 +1,64 @@ ++# SPDX-License-Identifier: GPL-2.0 ++config CRYPTO_DEV_EIP93_SKCIPHER ++ tristate ++ ++config CRYPTO_DEV_EIP93_HMAC ++ tristate ++ ++config CRYPTO_DEV_EIP93 ++ tristate "Support for EIP93 crypto HW accelerators" ++ depends on SOC_MT7621 || COMPILE_TEST ++ help ++ EIP93 have various crypto HW accelerators. Select this if ++ you want to use the EIP93 modules for any of the crypto algorithms. ++ ++if CRYPTO_DEV_EIP93 ++ ++config CRYPTO_DEV_EIP93_AES ++ bool "Register AES algorithm implementations with the Crypto API" ++ default y ++ select CRYPTO_DEV_EIP93_SKCIPHER ++ select CRYPTO_LIB_AES ++ select CRYPTO_SKCIPHER ++ help ++ Selecting this will offload AES - ECB, CBC and CTR crypto ++ to the EIP-93 crypto engine. ++ ++config CRYPTO_DEV_EIP93_DES ++ bool "Register legacy DES / 3DES algorithm with the Crypto API" ++ default y ++ select CRYPTO_DEV_EIP93_SKCIPHER ++ select CRYPTO_LIB_DES ++ select CRYPTO_SKCIPHER ++ help ++ Selecting this will offload DES and 3DES ECB and CBC ++ crypto to the EIP-93 crypto engine. ++ ++config CRYPTO_DEV_EIP93_AEAD ++ bool "Register AEAD algorithm with the Crypto API" ++ default y ++ select CRYPTO_DEV_EIP93_HMAC ++ select CRYPTO_AEAD ++ select CRYPTO_AUTHENC ++ select CRYPTO_MD5 ++ select CRYPTO_SHA1 ++ select CRYPTO_SHA256 ++ help ++ Selecting this will offload AEAD authenc(hmac(x), cipher(y)) ++ crypto to the EIP-93 crypto engine. ++ ++config CRYPTO_DEV_EIP93_GENERIC_SW_MAX_LEN ++ int "Max skcipher software fallback length" ++ default 256 ++ help ++ Max length of crypt request which ++ will fallback to software crypt of skcipher *except* AES-128. ++ ++config CRYPTO_DEV_EIP93_AES_128_SW_MAX_LEN ++ int "Max AES-128 skcipher software fallback length" ++ default 512 ++ help ++ Max length of crypt request which ++ will fallback to software crypt of AES-128 skcipher. ++ ++endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/Makefile +@@ -0,0 +1,7 @@ ++obj-$(CONFIG_CRYPTO_DEV_EIP93) += crypto-hw-eip93.o ++ ++crypto-hw-eip93-y += eip93-main.o eip93-common.o ++ ++crypto-hw-eip93-$(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) += eip93-cipher.o ++crypto-hw-eip93-$(CONFIG_CRYPTO_DEV_EIP93_AEAD) += eip93-aead.o ++ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-aead.c +@@ -0,0 +1,768 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++#include ++#endif ++ ++#include ++#include ++ ++#include "eip93-aead.h" ++#include "eip93-cipher.h" ++#include "eip93-common.h" ++#include "eip93-regs.h" ++ ++void mtk_aead_handle_result(struct crypto_async_request *async, int err) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); ++ struct mtk_device *mtk = ctx->mtk; ++ struct aead_request *req = aead_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ ++ mtk_unmap_dma(mtk, rctx, req->src, req->dst); ++ mtk_handle_result(mtk, rctx, req->iv); ++ ++ if (err == 1) ++ err = -EBADMSG; ++ /* let software handle anti-replay errors */ ++ if (err == 4) ++ err = 0; ++ ++ aead_request_complete(req, err); ++} ++ ++static int mtk_aead_send_req(struct crypto_async_request *async) ++{ ++ struct aead_request *req = aead_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ int err; ++ ++ err = check_valid_request(rctx); ++ if (err) { ++ aead_request_complete(req, err); ++ return err; ++ } ++ ++ return mtk_send_req(async, req->iv, rctx); ++} ++ ++/* Crypto aead API functions */ ++static int mtk_aead_cra_init(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.aead.base); ++ u32 flags = tmpl->flags; ++ char *alg_base; ++ ++ crypto_aead_set_reqsize(__crypto_aead_cast(tfm), ++ sizeof(struct mtk_cipher_reqctx)); ++ ++ ctx->mtk = tmpl->mtk; ++ ctx->in_first = true; ++ ctx->out_first = true; ++ ++ ctx->sa_in = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_in) ++ return -ENOMEM; ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ ctx->sa_out = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_out) ++ return -ENOMEM; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ /* software workaround for now */ ++ if (IS_HASH_MD5(flags)) ++ alg_base = "md5"; ++ if (IS_HASH_SHA1(flags)) ++ alg_base = "sha1"; ++ if (IS_HASH_SHA224(flags)) ++ alg_base = "sha224"; ++ if (IS_HASH_SHA256(flags)) ++ alg_base = "sha256"; ++ ++ ctx->shash = crypto_alloc_shash(alg_base, 0, CRYPTO_ALG_NEED_FALLBACK); ++ ++ if (IS_ERR(ctx->shash)) { ++ dev_err(ctx->mtk->dev, "base driver %s could not be loaded.\n", ++ alg_base); ++ return PTR_ERR(ctx->shash); ++ } ++ ++ return 0; ++} ++ ++static void mtk_aead_cra_exit(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ if (ctx->shash) ++ crypto_free_shash(ctx->shash); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ kfree(ctx->sa_in); ++ kfree(ctx->sa_out); ++} ++ ++static int mtk_aead_setkey(struct crypto_aead *ctfm, const u8 *key, ++ unsigned int len) ++{ ++ struct crypto_tfm *tfm = crypto_aead_tfm(ctfm); ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ u32 flags = tmpl->flags; ++ u32 nonce = 0; ++ struct crypto_authenc_keys keys; ++ struct crypto_aes_ctx aes; ++ struct saRecord_s *saRecord = ctx->sa_out; ++ int sa_size = sizeof(struct saRecord_s); ++ int err = -EINVAL; ++ ++ ++ if (crypto_authenc_extractkeys(&keys, key, len)) ++ return err; ++ ++ if (IS_RFC3686(flags)) { ++ if (keys.enckeylen < CTR_RFC3686_NONCE_SIZE) ++ return err; ++ ++ keys.enckeylen -= CTR_RFC3686_NONCE_SIZE; ++ memcpy(&nonce, keys.enckey + keys.enckeylen, ++ CTR_RFC3686_NONCE_SIZE); ++ } ++ ++ switch ((flags & MTK_ALG_MASK)) { ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ case MTK_ALG_DES: ++ err = verify_aead_des_key(ctfm, keys.enckey, keys.enckeylen); ++ break; ++ case MTK_ALG_3DES: ++ if (keys.enckeylen != DES3_EDE_KEY_SIZE) ++ return -EINVAL; ++ ++ err = verify_aead_des3_key(ctfm, keys.enckey, keys.enckeylen); ++ break; ++#endif ++ case MTK_ALG_AES: ++ err = aes_expandkey(&aes, keys.enckey, keys.enckeylen); ++ } ++ if (err) ++ return err; ++ ++ ctx->blksize = crypto_aead_blocksize(ctfm); ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, sa_size, ++ DMA_TO_DEVICE); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, sa_size, ++ DMA_TO_DEVICE); ++ /* Encryption key */ ++ mtk_set_saRecord(saRecord, keys.enckeylen, flags); ++ saRecord->saCmd0.bits.opCode = 1; ++ saRecord->saCmd0.bits.digestLength = ctx->authsize >> 2; ++ ++ memcpy(saRecord->saKey, keys.enckey, keys.enckeylen); ++ ctx->saNonce = nonce; ++ saRecord->saNonce = nonce; ++ ++ /* authentication key */ ++ err = mtk_authenc_setkey(ctx->shash, saRecord, keys.authkey, ++ keys.authkeylen); ++ ++ saRecord->saCmd0.bits.direction = 0; ++ memcpy(ctx->sa_in, saRecord, sa_size); ++ ctx->sa_in->saCmd0.bits.direction = 1; ++ ctx->sa_in->saCmd1.bits.copyDigest = 0; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, sa_size, ++ DMA_TO_DEVICE); ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, sa_size, ++ DMA_TO_DEVICE); ++ ctx->in_first = true; ++ ctx->out_first = true; ++ ++ return err; ++} ++ ++static int mtk_aead_setauthsize(struct crypto_aead *ctfm, ++ unsigned int authsize) ++{ ++ struct crypto_tfm *tfm = crypto_aead_tfm(ctfm); ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ ctx->authsize = authsize; ++ ctx->sa_in->saCmd0.bits.digestLength = ctx->authsize >> 2; ++ ctx->sa_out->saCmd0.bits.digestLength = ctx->authsize >> 2; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ return 0; ++} ++ ++static void mtk_aead_setassoc(struct mtk_crypto_ctx *ctx, ++ struct aead_request *req, bool in) ++{ ++ struct saRecord_s *saRecord; ++ ++ if (in) { ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ saRecord = ctx->sa_in; ++ saRecord->saCmd1.bits.hashCryptOffset = req->assoclen >> 2; ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ctx->assoclen_in = req->assoclen; ++ } else { ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ saRecord = ctx->sa_out; ++ saRecord->saCmd1.bits.hashCryptOffset = req->assoclen >> 2; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ctx->assoclen_out = req->assoclen; ++ } ++} ++ ++static int mtk_aead_crypt(struct aead_request *req) ++{ ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ struct crypto_async_request *async = &req->base; ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct crypto_aead *aead = crypto_aead_reqtfm(req); ++ ++ rctx->textsize = req->cryptlen; ++ rctx->blksize = ctx->blksize; ++ rctx->assoclen = req->assoclen; ++ rctx->authsize = ctx->authsize; ++ rctx->sg_src = req->src; ++ rctx->sg_dst = req->dst; ++ rctx->ivsize = crypto_aead_ivsize(aead); ++ rctx->flags |= MTK_DESC_AEAD; ++ ++ if IS_DECRYPT(rctx->flags) ++ rctx->textsize -= rctx->authsize; ++ ++ return mtk_aead_send_req(async); ++} ++ ++static int mtk_aead_encrypt(struct aead_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.aead.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_ENCRYPT; ++ if (ctx->out_first) { ++ mtk_aead_setassoc(ctx, req, false); ++ ctx->out_first = false; ++ } ++ ++ if (req->assoclen != ctx->assoclen_out) { ++ dev_err(ctx->mtk->dev, "Request AAD length error\n"); ++ return -EINVAL; ++ } ++ ++ rctx->saRecord_base = ctx->sa_base_out; ++ ++ return mtk_aead_crypt(req); ++} ++ ++static int mtk_aead_decrypt(struct aead_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = aead_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.aead.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_DECRYPT; ++ if (ctx->in_first) { ++ mtk_aead_setassoc(ctx, req, true); ++ ctx->in_first = false; ++ } ++ ++ if (req->assoclen != ctx->assoclen_in) { ++ dev_err(ctx->mtk->dev, "Request AAD length error\n"); ++ return -EINVAL; ++ } ++ ++ rctx->saRecord_base = ctx->sa_base_in; ++ ++ return mtk_aead_crypt(req); ++} ++ ++/* Available authenc algorithms in this module */ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93), cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = AES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),cbc(aes))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),cbc(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | ++ MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),rfc3686(ctr(aes)))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),rfc3686(ctr(aes-eip93)))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),cbc(des))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),cbc(des-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_MD5 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = MD5_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(md5),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(md5-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA1 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA1_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha1),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(sha1-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA224 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA224_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha224),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(sha224-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_AEAD, ++ .flags = MTK_HASH_HMAC | MTK_HASH_SHA256 | MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.aead = { ++ .setkey = mtk_aead_setkey, ++ .encrypt = mtk_aead_encrypt, ++ .decrypt = mtk_aead_decrypt, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .setauthsize = mtk_aead_setauthsize, ++ .maxauthsize = SHA256_DIGEST_SIZE, ++ .base = { ++ .cra_name = "authenc(hmac(sha256),cbc(des3_ede))", ++ .cra_driver_name = ++ "authenc(hmac(sha256-eip93),cbc(des3_ede-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0x0, ++ .cra_init = mtk_aead_cra_init, ++ .cra_exit = mtk_aead_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-aead.h +@@ -0,0 +1,31 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_AEAD_H_ ++#define _EIP93_AEAD_H_ ++ ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_rfc3686_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_rfc3686_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_rfc3686_aes; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_rfc3686_aes; ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_md5_cbc_des3_ede; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha1_cbc_des3_ede; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha224_cbc_des3_ede; ++extern struct mtk_alg_template mtk_alg_authenc_hmac_sha256_cbc_des3_ede; ++#endif ++ ++void mtk_aead_handle_result(struct crypto_async_request *async, int err); ++ ++#endif /* _EIP93_AEAD_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-aes.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_AES_H_ ++#define _EIP93_AES_H_ ++ ++extern struct mtk_alg_template mtk_alg_ecb_aes; ++extern struct mtk_alg_template mtk_alg_cbc_aes; ++extern struct mtk_alg_template mtk_alg_ctr_aes; ++extern struct mtk_alg_template mtk_alg_rfc3686_aes; ++ ++#endif /* _EIP93_AES_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-cipher.c +@@ -0,0 +1,483 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++#include ++#include ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++#include ++#endif ++#include ++ ++#include "eip93-cipher.h" ++#include "eip93-common.h" ++#include "eip93-regs.h" ++ ++void mtk_skcipher_handle_result(struct crypto_async_request *async, int err) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); ++ struct mtk_device *mtk = ctx->mtk; ++ struct skcipher_request *req = skcipher_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ ++ mtk_unmap_dma(mtk, rctx, req->src, req->dst); ++ mtk_handle_result(mtk, rctx, req->iv); ++ ++ skcipher_request_complete(req, err); ++} ++ ++static inline bool mtk_skcipher_is_fallback(const struct crypto_tfm *tfm, ++ u32 flags) ++{ ++ return (tfm->__crt_alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) && ++ !IS_RFC3686(flags); ++} ++ ++static int mtk_skcipher_send_req(struct crypto_async_request *async) ++{ ++ struct skcipher_request *req = skcipher_request_cast(async); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ int err; ++ ++ err = check_valid_request(rctx); ++ ++ if (err) { ++ skcipher_request_complete(req, err); ++ return err; ++ } ++ ++ return mtk_send_req(async, req->iv, rctx); ++} ++ ++/* Crypto skcipher API functions */ ++static int mtk_skcipher_cra_init(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ bool fallback = mtk_skcipher_is_fallback(tfm, tmpl->flags); ++ ++ if (fallback) { ++ ctx->fallback = crypto_alloc_skcipher( ++ crypto_tfm_alg_name(tfm), 0, CRYPTO_ALG_NEED_FALLBACK); ++ if (IS_ERR(ctx->fallback)) ++ return PTR_ERR(ctx->fallback); ++ } ++ ++ crypto_skcipher_set_reqsize( ++ __crypto_skcipher_cast(tfm), ++ sizeof(struct mtk_cipher_reqctx) + ++ (fallback ? crypto_skcipher_reqsize(ctx->fallback) : ++ 0)); ++ ++ ctx->mtk = tmpl->mtk; ++ ++ ctx->sa_in = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_in) ++ return -ENOMEM; ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ ++ ctx->sa_out = kzalloc(sizeof(struct saRecord_s), GFP_KERNEL); ++ if (!ctx->sa_out) ++ return -ENOMEM; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ return 0; ++} ++ ++static void mtk_skcipher_cra_exit(struct crypto_tfm *tfm) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, ++ sizeof(struct saRecord_s), DMA_TO_DEVICE); ++ kfree(ctx->sa_in); ++ kfree(ctx->sa_out); ++ ++ crypto_free_skcipher(ctx->fallback); ++} ++ ++static int mtk_skcipher_setkey(struct crypto_skcipher *ctfm, const u8 *key, ++ unsigned int len) ++{ ++ struct crypto_tfm *tfm = crypto_skcipher_tfm(ctfm); ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(tfm); ++ struct mtk_alg_template *tmpl = container_of(tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ struct saRecord_s *saRecord = ctx->sa_out; ++ u32 flags = tmpl->flags; ++ u32 nonce = 0; ++ unsigned int keylen = len; ++ int sa_size = sizeof(struct saRecord_s); ++ int err = -EINVAL; ++ ++ if (!key || !keylen) ++ return err; ++ ++ ctx->keylen = keylen; ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ if (IS_RFC3686(flags)) { ++ if (len < CTR_RFC3686_NONCE_SIZE) ++ return err; ++ ++ keylen = len - CTR_RFC3686_NONCE_SIZE; ++ memcpy(&nonce, key + keylen, CTR_RFC3686_NONCE_SIZE); ++ } ++#endif ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ if (flags & MTK_ALG_DES) { ++ ctx->blksize = DES_BLOCK_SIZE; ++ err = verify_skcipher_des_key(ctfm, key); ++ } ++ if (flags & MTK_ALG_3DES) { ++ ctx->blksize = DES3_EDE_BLOCK_SIZE; ++ err = verify_skcipher_des3_key(ctfm, key); ++ } ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ if (flags & MTK_ALG_AES) { ++ struct crypto_aes_ctx aes; ++ bool fallback = mtk_skcipher_is_fallback(tfm, flags); ++ ++ if (fallback && !IS_RFC3686(flags)) { ++ err = crypto_skcipher_setkey(ctx->fallback, key, ++ keylen); ++ if (err) ++ return err; ++ } ++ ++ ctx->blksize = AES_BLOCK_SIZE; ++ err = aes_expandkey(&aes, key, keylen); ++ } ++#endif ++ if (err) ++ return err; ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_in, sa_size, ++ DMA_TO_DEVICE); ++ ++ dma_unmap_single(ctx->mtk->dev, ctx->sa_base_out, sa_size, ++ DMA_TO_DEVICE); ++ ++ mtk_set_saRecord(saRecord, keylen, flags); ++ ++ memcpy(saRecord->saKey, key, keylen); ++ ctx->saNonce = nonce; ++ saRecord->saNonce = nonce; ++ saRecord->saCmd0.bits.direction = 0; ++ ++ memcpy(ctx->sa_in, saRecord, sa_size); ++ ctx->sa_in->saCmd0.bits.direction = 1; ++ ++ ctx->sa_base_out = dma_map_single(ctx->mtk->dev, ctx->sa_out, sa_size, ++ DMA_TO_DEVICE); ++ ++ ctx->sa_base_in = dma_map_single(ctx->mtk->dev, ctx->sa_in, sa_size, ++ DMA_TO_DEVICE); ++ return err; ++} ++ ++static int mtk_skcipher_crypt(struct skcipher_request *req, bool encrypt) ++{ ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ struct crypto_async_request *async = &req->base; ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req); ++ bool fallback = mtk_skcipher_is_fallback(req->base.tfm, rctx->flags); ++ ++ if (!req->cryptlen) ++ return 0; ++ ++ /* ++ * ECB and CBC algorithms require message lengths to be ++ * multiples of block size. ++ */ ++ if (IS_ECB(rctx->flags) || IS_CBC(rctx->flags)) ++ if (!IS_ALIGNED(req->cryptlen, ++ crypto_skcipher_blocksize(skcipher))) ++ return -EINVAL; ++ ++ if (fallback && ++ req->cryptlen <= (AES_KEYSIZE_128 ? ++ CONFIG_CRYPTO_DEV_EIP93_AES_128_SW_MAX_LEN : ++ CONFIG_CRYPTO_DEV_EIP93_GENERIC_SW_MAX_LEN)) { ++ skcipher_request_set_tfm(&rctx->fallback_req, ctx->fallback); ++ skcipher_request_set_callback(&rctx->fallback_req, ++ req->base.flags, ++ req->base.complete, ++ req->base.data); ++ skcipher_request_set_crypt(&rctx->fallback_req, req->src, ++ req->dst, req->cryptlen, req->iv); ++ return encrypt ? crypto_skcipher_encrypt(&rctx->fallback_req) : ++ crypto_skcipher_decrypt(&rctx->fallback_req); ++ } ++ ++ rctx->assoclen = 0; ++ rctx->textsize = req->cryptlen; ++ rctx->authsize = 0; ++ rctx->sg_src = req->src; ++ rctx->sg_dst = req->dst; ++ rctx->ivsize = crypto_skcipher_ivsize(skcipher); ++ rctx->blksize = ctx->blksize; ++ rctx->flags |= MTK_DESC_SKCIPHER; ++ if (!IS_ECB(rctx->flags)) ++ rctx->flags |= MTK_DESC_DMA_IV; ++ ++ return mtk_skcipher_send_req(async); ++} ++ ++static int mtk_skcipher_encrypt(struct skcipher_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_ENCRYPT; ++ rctx->saRecord_base = ctx->sa_base_out; ++ ++ return mtk_skcipher_crypt(req, true); ++} ++ ++static int mtk_skcipher_decrypt(struct skcipher_request *req) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct mtk_cipher_reqctx *rctx = skcipher_request_ctx(req); ++ struct mtk_alg_template *tmpl = container_of(req->base.tfm->__crt_alg, ++ struct mtk_alg_template, alg.skcipher.base); ++ ++ rctx->flags = tmpl->flags; ++ rctx->flags |= MTK_DECRYPT; ++ rctx->saRecord_base = ctx->sa_base_in; ++ ++ return mtk_skcipher_crypt(req, false); ++} ++ ++/* Available algorithms in this module */ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++struct mtk_alg_template mtk_alg_ecb_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_ECB | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = 0, ++ .base = { ++ .cra_name = "ecb(aes)", ++ .cra_driver_name = "ecb(aes-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_cbc_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CBC | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .base = { ++ .cra_name = "cbc(aes)", ++ .cra_driver_name = "cbc(aes-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = AES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_ctr_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CTR | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .base = { ++ .cra_name = "ctr(aes)", ++ .cra_driver_name = "ctr(aes-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_rfc3686_aes = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CTR | MTK_MODE_RFC3686 | MTK_ALG_AES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .base = { ++ .cra_name = "rfc3686(ctr(aes))", ++ .cra_driver_name = "rfc3686(ctr(aes-eip93))", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0xf, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++struct mtk_alg_template mtk_alg_ecb_des = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_ECB | MTK_ALG_DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES_KEY_SIZE, ++ .max_keysize = DES_KEY_SIZE, ++ .ivsize = 0, ++ .base = { ++ .cra_name = "ecb(des)", ++ .cra_driver_name = "ebc(des-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_cbc_des = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CBC | MTK_ALG_DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES_KEY_SIZE, ++ .max_keysize = DES_KEY_SIZE, ++ .ivsize = DES_BLOCK_SIZE, ++ .base = { ++ .cra_name = "cbc(des)", ++ .cra_driver_name = "cbc(des-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_ecb_des3_ede = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_ECB | MTK_ALG_3DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES3_EDE_KEY_SIZE, ++ .max_keysize = DES3_EDE_KEY_SIZE, ++ .ivsize = 0, ++ .base = { ++ .cra_name = "ecb(des3_ede)", ++ .cra_driver_name = "ecb(des3_ede-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++ ++struct mtk_alg_template mtk_alg_cbc_des3_ede = { ++ .type = MTK_ALG_TYPE_SKCIPHER, ++ .flags = MTK_MODE_CBC | MTK_ALG_3DES, ++ .alg.skcipher = { ++ .setkey = mtk_skcipher_setkey, ++ .encrypt = mtk_skcipher_encrypt, ++ .decrypt = mtk_skcipher_decrypt, ++ .min_keysize = DES3_EDE_KEY_SIZE, ++ .max_keysize = DES3_EDE_KEY_SIZE, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .base = { ++ .cra_name = "cbc(des3_ede)", ++ .cra_driver_name = "cbc(des3_ede-eip93)", ++ .cra_priority = MTK_CRA_PRIORITY, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_KERN_DRIVER_ONLY, ++ .cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct mtk_crypto_ctx), ++ .cra_alignmask = 0, ++ .cra_init = mtk_skcipher_cra_init, ++ .cra_exit = mtk_skcipher_cra_exit, ++ .cra_module = THIS_MODULE, ++ }, ++ }, ++}; ++#endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-cipher.h +@@ -0,0 +1,66 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_CIPHER_H_ ++#define _EIP93_CIPHER_H_ ++ ++#include "eip93-main.h" ++ ++struct mtk_crypto_ctx { ++ struct mtk_device *mtk; ++ struct saRecord_s *sa_in; ++ dma_addr_t sa_base_in; ++ struct saRecord_s *sa_out; ++ dma_addr_t sa_base_out; ++ uint32_t saNonce; ++ int blksize; ++ /* AEAD specific */ ++ unsigned int authsize; ++ unsigned int assoclen_in; ++ unsigned int assoclen_out; ++ bool in_first; ++ bool out_first; ++ struct crypto_shash *shash; ++ unsigned int keylen; ++ struct crypto_skcipher *fallback; ++}; ++ ++struct mtk_cipher_reqctx { ++ unsigned long flags; ++ unsigned int blksize; ++ unsigned int ivsize; ++ unsigned int textsize; ++ unsigned int assoclen; ++ unsigned int authsize; ++ dma_addr_t saRecord_base; ++ struct saState_s *saState; ++ dma_addr_t saState_base; ++ uint32_t saState_idx; ++ struct eip93_descriptor_s *cdesc; ++ struct scatterlist *sg_src; ++ struct scatterlist *sg_dst; ++ int src_nents; ++ int dst_nents; ++ struct saState_s *saState_ctr; ++ dma_addr_t saState_base_ctr; ++ uint32_t saState_ctr_idx; ++ struct skcipher_request fallback_req; // keep at the end ++}; ++ ++int check_valid_request(struct mtk_cipher_reqctx *rctx); ++ ++void mtk_unmap_dma(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ struct scatterlist *reqsrc, struct scatterlist *reqdst); ++ ++void mtk_skcipher_handle_result(struct crypto_async_request *async, int err); ++ ++int mtk_send_req(struct crypto_async_request *async, ++ const u8 *reqiv, struct mtk_cipher_reqctx *rctx); ++ ++void mtk_handle_result(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ u8 *reqiv); ++ ++#endif /* _EIP93_CIPHER_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-common.c +@@ -0,0 +1,749 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "eip93-cipher.h" ++#include "eip93-common.h" ++#include "eip93-main.h" ++#include "eip93-regs.h" ++ ++inline void *mtk_ring_next_wptr(struct mtk_device *mtk, ++ struct mtk_desc_ring *ring) ++{ ++ void *ptr = ring->write; ++ ++ if ((ring->write == ring->read - ring->offset) || ++ (ring->read == ring->base && ring->write == ring->base_end)) ++ return ERR_PTR(-ENOMEM); ++ ++ if (ring->write == ring->base_end) ++ ring->write = ring->base; ++ else ++ ring->write += ring->offset; ++ ++ return ptr; ++} ++ ++inline void *mtk_ring_next_rptr(struct mtk_device *mtk, ++ struct mtk_desc_ring *ring) ++{ ++ void *ptr = ring->read; ++ ++ if (ring->write == ring->read) ++ return ERR_PTR(-ENOENT); ++ ++ if (ring->read == ring->base_end) ++ ring->read = ring->base; ++ else ++ ring->read += ring->offset; ++ ++ return ptr; ++} ++ ++inline int mtk_put_descriptor(struct mtk_device *mtk, ++ struct eip93_descriptor_s *desc) ++{ ++ struct eip93_descriptor_s *cdesc; ++ struct eip93_descriptor_s *rdesc; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&mtk->ring->write_lock, irqflags); ++ ++ rdesc = mtk_ring_next_wptr(mtk, &mtk->ring->rdr); ++ ++ if (IS_ERR(rdesc)) { ++ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); ++ return -ENOENT; ++ } ++ ++ cdesc = mtk_ring_next_wptr(mtk, &mtk->ring->cdr); ++ ++ if (IS_ERR(cdesc)) { ++ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); ++ return -ENOENT; ++ } ++ ++ memset(rdesc, 0, sizeof(struct eip93_descriptor_s)); ++ memcpy(cdesc, desc, sizeof(struct eip93_descriptor_s)); ++ ++ atomic_dec(&mtk->ring->free); ++ spin_unlock_irqrestore(&mtk->ring->write_lock, irqflags); ++ ++ return 0; ++} ++ ++inline void *mtk_get_descriptor(struct mtk_device *mtk) ++{ ++ struct eip93_descriptor_s *cdesc; ++ void *ptr; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&mtk->ring->read_lock, irqflags); ++ ++ cdesc = mtk_ring_next_rptr(mtk, &mtk->ring->cdr); ++ ++ if (IS_ERR(cdesc)) { ++ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); ++ return ERR_PTR(-ENOENT); ++ } ++ ++ memset(cdesc, 0, sizeof(struct eip93_descriptor_s)); ++ ++ ptr = mtk_ring_next_rptr(mtk, &mtk->ring->rdr); ++ if (IS_ERR(ptr)) { ++ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); ++ return ERR_PTR(-ENOENT); ++ } ++ ++ atomic_inc(&mtk->ring->free); ++ spin_unlock_irqrestore(&mtk->ring->read_lock, irqflags); ++ ++ return ptr; ++} ++ ++inline int mtk_get_free_saState(struct mtk_device *mtk) ++{ ++ struct mtk_state_pool *saState_pool; ++ int i; ++ ++ for (i = 0; i < MTK_RING_SIZE; i++) { ++ saState_pool = &mtk->ring->saState_pool[i]; ++ if (saState_pool->in_use == false) { ++ saState_pool->in_use = true; ++ return i; ++ } ++ ++ } ++ ++ return -ENOENT; ++} ++ ++static inline void mtk_free_sg_copy(const int len, struct scatterlist **sg) ++{ ++ if (!*sg || !len) ++ return; ++ ++ free_pages((unsigned long)sg_virt(*sg), get_order(len)); ++ kfree(*sg); ++ *sg = NULL; ++} ++ ++static inline int mtk_make_sg_copy(struct scatterlist *src, ++ struct scatterlist **dst, ++ const uint32_t len, const bool copy) ++{ ++ void *pages; ++ ++ *dst = kmalloc(sizeof(**dst), GFP_KERNEL); ++ if (!*dst) ++ return -ENOMEM; ++ ++ ++ pages = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, ++ get_order(len)); ++ ++ if (!pages) { ++ kfree(*dst); ++ *dst = NULL; ++ return -ENOMEM; ++ } ++ ++ sg_init_table(*dst, 1); ++ sg_set_buf(*dst, pages, len); ++ ++ /* copy only as requested */ ++ if (copy) ++ sg_copy_to_buffer(src, sg_nents(src), pages, len); ++ ++ return 0; ++} ++ ++static inline bool mtk_is_sg_aligned(struct scatterlist *sg, u32 len, ++ const int blksize) ++{ ++ int nents; ++ ++ for (nents = 0; sg; sg = sg_next(sg), ++nents) { ++ if (!IS_ALIGNED(sg->offset, 4)) ++ return false; ++ ++ if (len <= sg->length) { ++ if (!IS_ALIGNED(len, blksize)) ++ return false; ++ ++ return true; ++ } ++ ++ if (!IS_ALIGNED(sg->length, blksize)) ++ return false; ++ ++ len -= sg->length; ++ } ++ return false; ++} ++ ++int check_valid_request(struct mtk_cipher_reqctx *rctx) ++{ ++ struct scatterlist *src = rctx->sg_src; ++ struct scatterlist *dst = rctx->sg_dst; ++ uint32_t src_nents, dst_nents; ++ u32 textsize = rctx->textsize; ++ u32 authsize = rctx->authsize; ++ u32 blksize = rctx->blksize; ++ u32 totlen_src = rctx->assoclen + rctx->textsize; ++ u32 totlen_dst = rctx->assoclen + rctx->textsize; ++ u32 copy_len; ++ bool src_align, dst_align; ++ int err = -EINVAL; ++ ++ if (!IS_CTR(rctx->flags)) { ++ if (!IS_ALIGNED(textsize, blksize)) ++ return err; ++ } ++ ++ if (authsize) { ++ if (IS_ENCRYPT(rctx->flags)) ++ totlen_dst += authsize; ++ else ++ totlen_src += authsize; ++ } ++ ++ src_nents = sg_nents_for_len(src, totlen_src); ++ dst_nents = sg_nents_for_len(dst, totlen_dst); ++ ++ if (src == dst) { ++ src_nents = max(src_nents, dst_nents); ++ dst_nents = src_nents; ++ if (unlikely((totlen_src || totlen_dst) && (src_nents <= 0))) ++ return err; ++ ++ } else { ++ if (unlikely(totlen_src && (src_nents <= 0))) ++ return err; ++ ++ if (unlikely(totlen_dst && (dst_nents <= 0))) ++ return err; ++ } ++ ++ if (authsize) { ++ if (dst_nents == 1 && src_nents == 1) { ++ src_align = mtk_is_sg_aligned(src, totlen_src, blksize); ++ if (src == dst) ++ dst_align = src_align; ++ else ++ dst_align = mtk_is_sg_aligned(dst, ++ totlen_dst, blksize); ++ } else { ++ src_align = false; ++ dst_align = false; ++ } ++ } else { ++ src_align = mtk_is_sg_aligned(src, totlen_src, blksize); ++ if (src == dst) ++ dst_align = src_align; ++ else ++ dst_align = mtk_is_sg_aligned(dst, totlen_dst, blksize); ++ } ++ ++ copy_len = max(totlen_src, totlen_dst); ++ if (!src_align) { ++ err = mtk_make_sg_copy(src, &rctx->sg_src, copy_len, true); ++ if (err) ++ return err; ++ } ++ ++ if (!dst_align) { ++ err = mtk_make_sg_copy(dst, &rctx->sg_dst, copy_len, false); ++ if (err) ++ return err; ++ } ++ ++ rctx->src_nents = sg_nents_for_len(rctx->sg_src, totlen_src); ++ rctx->dst_nents = sg_nents_for_len(rctx->sg_dst, totlen_dst); ++ ++ return 0; ++} ++/* ++ * Set saRecord function: ++ * Even saRecord is set to "0", keep " = 0" for readability. ++ */ ++void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen, ++ const u32 flags) ++{ ++ saRecord->saCmd0.bits.ivSource = 2; ++ if (IS_ECB(flags)) ++ saRecord->saCmd0.bits.saveIv = 0; ++ else ++ saRecord->saCmd0.bits.saveIv = 1; ++ ++ saRecord->saCmd0.bits.opGroup = 0; ++ saRecord->saCmd0.bits.opCode = 0; ++ ++ switch ((flags & MTK_ALG_MASK)) { ++ case MTK_ALG_AES: ++ saRecord->saCmd0.bits.cipher = 3; ++ saRecord->saCmd1.bits.aesKeyLen = keylen >> 3; ++ break; ++ case MTK_ALG_3DES: ++ saRecord->saCmd0.bits.cipher = 1; ++ break; ++ case MTK_ALG_DES: ++ saRecord->saCmd0.bits.cipher = 0; ++ break; ++ default: ++ saRecord->saCmd0.bits.cipher = 15; ++ } ++ ++ switch ((flags & MTK_HASH_MASK)) { ++ case MTK_HASH_SHA256: ++ saRecord->saCmd0.bits.hash = 3; ++ break; ++ case MTK_HASH_SHA224: ++ saRecord->saCmd0.bits.hash = 2; ++ break; ++ case MTK_HASH_SHA1: ++ saRecord->saCmd0.bits.hash = 1; ++ break; ++ case MTK_HASH_MD5: ++ saRecord->saCmd0.bits.hash = 0; ++ break; ++ default: ++ saRecord->saCmd0.bits.hash = 15; ++ } ++ ++ saRecord->saCmd0.bits.hdrProc = 0; ++ saRecord->saCmd0.bits.padType = 3; ++ saRecord->saCmd0.bits.extPad = 0; ++ saRecord->saCmd0.bits.scPad = 0; ++ ++ switch ((flags & MTK_MODE_MASK)) { ++ case MTK_MODE_CBC: ++ saRecord->saCmd1.bits.cipherMode = 1; ++ break; ++ case MTK_MODE_CTR: ++ saRecord->saCmd1.bits.cipherMode = 2; ++ break; ++ case MTK_MODE_ECB: ++ saRecord->saCmd1.bits.cipherMode = 0; ++ break; ++ } ++ ++ saRecord->saCmd1.bits.byteOffset = 0; ++ saRecord->saCmd1.bits.hashCryptOffset = 0; ++ saRecord->saCmd0.bits.digestLength = 0; ++ saRecord->saCmd1.bits.copyPayload = 0; ++ ++ if (IS_HMAC(flags)) { ++ saRecord->saCmd1.bits.hmac = 1; ++ saRecord->saCmd1.bits.copyDigest = 1; ++ saRecord->saCmd1.bits.copyHeader = 1; ++ } else { ++ saRecord->saCmd1.bits.hmac = 0; ++ saRecord->saCmd1.bits.copyDigest = 0; ++ saRecord->saCmd1.bits.copyHeader = 0; ++ } ++ ++ saRecord->saCmd1.bits.seqNumCheck = 0; ++ saRecord->saSpi = 0x0; ++ saRecord->saSeqNumMask[0] = 0xFFFFFFFF; ++ saRecord->saSeqNumMask[1] = 0x0; ++} ++ ++/* ++ * Poor mans Scatter/gather function: ++ * Create a Descriptor for every segment to avoid copying buffers. ++ * For performance better to wait for hardware to perform multiple DMA ++ * ++ */ ++static inline int mtk_scatter_combine(struct mtk_device *mtk, ++ struct mtk_cipher_reqctx *rctx, ++ u32 datalen, u32 split, int offsetin) ++{ ++ struct eip93_descriptor_s *cdesc = rctx->cdesc; ++ struct scatterlist *sgsrc = rctx->sg_src; ++ struct scatterlist *sgdst = rctx->sg_dst; ++ unsigned int remainin = sg_dma_len(sgsrc); ++ unsigned int remainout = sg_dma_len(sgdst); ++ dma_addr_t saddr = sg_dma_address(sgsrc); ++ dma_addr_t daddr = sg_dma_address(sgdst); ++ dma_addr_t stateAddr; ++ u32 srcAddr, dstAddr, len, n; ++ bool nextin = false; ++ bool nextout = false; ++ int offsetout = 0; ++ int ndesc_cdr = 0, err; ++ ++ if (IS_ECB(rctx->flags)) ++ rctx->saState_base = 0; ++ ++ if (split < datalen) { ++ stateAddr = rctx->saState_base_ctr; ++ n = split; ++ } else { ++ stateAddr = rctx->saState_base; ++ n = datalen; ++ } ++ ++ do { ++ if (nextin) { ++ sgsrc = sg_next(sgsrc); ++ remainin = sg_dma_len(sgsrc); ++ if (remainin == 0) ++ continue; ++ ++ saddr = sg_dma_address(sgsrc); ++ offsetin = 0; ++ nextin = false; ++ } ++ ++ if (nextout) { ++ sgdst = sg_next(sgdst); ++ remainout = sg_dma_len(sgdst); ++ if (remainout == 0) ++ continue; ++ ++ daddr = sg_dma_address(sgdst); ++ offsetout = 0; ++ nextout = false; ++ } ++ srcAddr = saddr + offsetin; ++ dstAddr = daddr + offsetout; ++ ++ if (remainin == remainout) { ++ len = remainin; ++ if (len > n) { ++ len = n; ++ remainin -= n; ++ remainout -= n; ++ offsetin += n; ++ offsetout += n; ++ } else { ++ nextin = true; ++ nextout = true; ++ } ++ } else if (remainin < remainout) { ++ len = remainin; ++ if (len > n) { ++ len = n; ++ remainin -= n; ++ remainout -= n; ++ offsetin += n; ++ offsetout += n; ++ } else { ++ offsetout += len; ++ remainout -= len; ++ nextin = true; ++ } ++ } else { ++ len = remainout; ++ if (len > n) { ++ len = n; ++ remainin -= n; ++ remainout -= n; ++ offsetin += n; ++ offsetout += n; ++ } else { ++ offsetin += len; ++ remainin -= len; ++ nextout = true; ++ } ++ } ++ n -= len; ++ ++ cdesc->srcAddr = srcAddr; ++ cdesc->dstAddr = dstAddr; ++ cdesc->stateAddr = stateAddr; ++ cdesc->peLength.bits.peReady = 0; ++ cdesc->peLength.bits.byPass = 0; ++ cdesc->peLength.bits.length = len; ++ cdesc->peLength.bits.hostReady = 1; ++ ++ if (n == 0) { ++ n = datalen - split; ++ split = datalen; ++ stateAddr = rctx->saState_base; ++ } ++ ++ if (n == 0) ++ cdesc->userId |= MTK_DESC_LAST; ++ ++ /* Loop - Delay - No need to rollback ++ * Maybe refine by slowing down at MTK_RING_BUSY ++ */ ++again: ++ err = mtk_put_descriptor(mtk, cdesc); ++ if (err) { ++ udelay(500); ++ goto again; ++ } ++ /* Writing new descriptor count starts DMA action */ ++ writel(1, mtk->base + EIP93_REG_PE_CD_COUNT); ++ ++ ndesc_cdr++; ++ } while (n); ++ ++ return -EINPROGRESS; ++} ++ ++int mtk_send_req(struct crypto_async_request *async, ++ const u8 *reqiv, struct mtk_cipher_reqctx *rctx) ++{ ++ struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm); ++ struct mtk_device *mtk = ctx->mtk; ++ struct scatterlist *src = rctx->sg_src; ++ struct scatterlist *dst = rctx->sg_dst; ++ struct saState_s *saState; ++ struct mtk_state_pool *saState_pool; ++ struct eip93_descriptor_s cdesc; ++ u32 flags = rctx->flags; ++ int idx; ++ int offsetin = 0, err = -ENOMEM; ++ u32 datalen = rctx->assoclen + rctx->textsize; ++ u32 split = datalen; ++ u32 start, end, ctr, blocks; ++ u32 iv[AES_BLOCK_SIZE / sizeof(u32)]; ++ ++ rctx->saState_ctr = NULL; ++ rctx->saState = NULL; ++ ++ if (IS_ECB(flags)) ++ goto skip_iv; ++ ++ memcpy(iv, reqiv, rctx->ivsize); ++ ++ if (!IS_ALIGNED((u32)reqiv, rctx->ivsize) || IS_RFC3686(flags)) { ++ rctx->flags &= ~MTK_DESC_DMA_IV; ++ flags = rctx->flags; ++ } ++ ++ if (IS_DMA_IV(flags)) { ++ rctx->saState = (void *)reqiv; ++ } else { ++ idx = mtk_get_free_saState(mtk); ++ if (idx < 0) ++ goto send_err; ++ saState_pool = &mtk->ring->saState_pool[idx]; ++ rctx->saState_idx = idx; ++ rctx->saState = saState_pool->base; ++ rctx->saState_base = saState_pool->base_dma; ++ memcpy(rctx->saState->stateIv, iv, rctx->ivsize); ++ } ++ ++ saState = rctx->saState; ++ ++ if (IS_RFC3686(flags)) { ++ saState->stateIv[0] = ctx->saNonce; ++ saState->stateIv[1] = iv[0]; ++ saState->stateIv[2] = iv[1]; ++ saState->stateIv[3] = cpu_to_be32(1); ++ } else if (!IS_HMAC(flags) && IS_CTR(flags)) { ++ /* Compute data length. */ ++ blocks = DIV_ROUND_UP(rctx->textsize, AES_BLOCK_SIZE); ++ ctr = be32_to_cpu(iv[3]); ++ /* Check 32bit counter overflow. */ ++ start = ctr; ++ end = start + blocks - 1; ++ if (end < start) { ++ split = AES_BLOCK_SIZE * -start; ++ /* ++ * Increment the counter manually to cope with ++ * the hardware counter overflow. ++ */ ++ iv[3] = 0xffffffff; ++ crypto_inc((u8 *)iv, AES_BLOCK_SIZE); ++ idx = mtk_get_free_saState(mtk); ++ if (idx < 0) ++ goto free_state; ++ saState_pool = &mtk->ring->saState_pool[idx]; ++ rctx->saState_ctr_idx = idx; ++ rctx->saState_ctr = saState_pool->base; ++ rctx->saState_base_ctr = saState_pool->base_dma; ++ ++ memcpy(rctx->saState_ctr->stateIv, reqiv, rctx->ivsize); ++ memcpy(saState->stateIv, iv, rctx->ivsize); ++ } ++ } ++ ++ if (IS_DMA_IV(flags)) { ++ rctx->saState_base = dma_map_single(mtk->dev, (void *)reqiv, ++ rctx->ivsize, DMA_TO_DEVICE); ++ if (dma_mapping_error(mtk->dev, rctx->saState_base)) ++ goto free_state; ++ } ++skip_iv: ++ cdesc.peCrtlStat.bits.hostReady = 1; ++ cdesc.peCrtlStat.bits.prngMode = 0; ++ cdesc.peCrtlStat.bits.hashFinal = 0; ++ cdesc.peCrtlStat.bits.padCrtlStat = 0; ++ cdesc.peCrtlStat.bits.peReady = 0; ++ cdesc.saAddr = rctx->saRecord_base; ++ cdesc.arc4Addr = (uint32_t)async; ++ cdesc.userId = flags; ++ rctx->cdesc = &cdesc; ++ ++ /* map DMA_BIDIRECTIONAL to invalidate cache on destination ++ * implies __dma_cache_wback_inv ++ */ ++ dma_map_sg(mtk->dev, dst, rctx->dst_nents, DMA_BIDIRECTIONAL); ++ if (src != dst) ++ dma_map_sg(mtk->dev, src, rctx->src_nents, DMA_TO_DEVICE); ++ ++ err = mtk_scatter_combine(mtk, rctx, datalen, split, offsetin); ++ ++ return err; ++ ++free_state: ++ if (rctx->saState) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_idx]; ++ saState_pool->in_use = false; ++ } ++ ++ if (rctx->saState_ctr) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_ctr_idx]; ++ saState_pool->in_use = false; ++ } ++send_err: ++ return err; ++} ++ ++void mtk_unmap_dma(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ struct scatterlist *reqsrc, struct scatterlist *reqdst) ++{ ++ u32 len = rctx->assoclen + rctx->textsize; ++ u32 authsize = rctx->authsize; ++ u32 flags = rctx->flags; ++ u32 *otag; ++ int i; ++ ++ if (rctx->sg_src == rctx->sg_dst) { ++ dma_unmap_sg(mtk->dev, rctx->sg_dst, rctx->dst_nents, ++ DMA_BIDIRECTIONAL); ++ goto process_tag; ++ } ++ ++ dma_unmap_sg(mtk->dev, rctx->sg_src, rctx->src_nents, ++ DMA_TO_DEVICE); ++ ++ if (rctx->sg_src != reqsrc) ++ mtk_free_sg_copy(len + rctx->authsize, &rctx->sg_src); ++ ++ dma_unmap_sg(mtk->dev, rctx->sg_dst, rctx->dst_nents, ++ DMA_BIDIRECTIONAL); ++ ++ /* SHA tags need conversion from net-to-host */ ++process_tag: ++ if (IS_DECRYPT(flags)) ++ authsize = 0; ++ ++ if (authsize) { ++ if (!IS_HASH_MD5(flags)) { ++ otag = sg_virt(rctx->sg_dst) + len; ++ for (i = 0; i < (authsize / 4); i++) ++ otag[i] = ntohl(otag[i]); ++ } ++ } ++ ++ if (rctx->sg_dst != reqdst) { ++ sg_copy_from_buffer(reqdst, sg_nents(reqdst), ++ sg_virt(rctx->sg_dst), len + authsize); ++ mtk_free_sg_copy(len + rctx->authsize, &rctx->sg_dst); ++ } ++} ++ ++void mtk_handle_result(struct mtk_device *mtk, struct mtk_cipher_reqctx *rctx, ++ u8 *reqiv) ++{ ++ struct mtk_state_pool *saState_pool; ++ ++ if (IS_DMA_IV(rctx->flags)) ++ dma_unmap_single(mtk->dev, rctx->saState_base, rctx->ivsize, ++ DMA_TO_DEVICE); ++ ++ if (!IS_ECB(rctx->flags)) ++ memcpy(reqiv, rctx->saState->stateIv, rctx->ivsize); ++ ++ if ((rctx->saState) && !(IS_DMA_IV(rctx->flags))) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_idx]; ++ saState_pool->in_use = false; ++ } ++ ++ if (rctx->saState_ctr) { ++ saState_pool = &mtk->ring->saState_pool[rctx->saState_ctr_idx]; ++ saState_pool->in_use = false; ++ } ++} ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) ++/* basically this is set hmac - key */ ++int mtk_authenc_setkey(struct crypto_shash *cshash, struct saRecord_s *sa, ++ const u8 *authkey, unsigned int authkeylen) ++{ ++ int bs = crypto_shash_blocksize(cshash); ++ int ds = crypto_shash_digestsize(cshash); ++ int ss = crypto_shash_statesize(cshash); ++ u8 *ipad, *opad; ++ unsigned int i, err; ++ ++ SHASH_DESC_ON_STACK(shash, cshash); ++ ++ shash->tfm = cshash; ++ ++ /* auth key ++ * ++ * EIP93 can only authenticate with hash of the key ++ * do software shash until EIP93 hash function complete. ++ */ ++ ipad = kcalloc(2, SHA256_BLOCK_SIZE + ss, GFP_KERNEL); ++ if (!ipad) ++ return -ENOMEM; ++ ++ opad = ipad + SHA256_BLOCK_SIZE + ss; ++ ++ if (authkeylen > bs) { ++ err = crypto_shash_digest(shash, authkey, ++ authkeylen, ipad); ++ if (err) ++ return err; ++ ++ authkeylen = ds; ++ } else ++ memcpy(ipad, authkey, authkeylen); ++ ++ memset(ipad + authkeylen, 0, bs - authkeylen); ++ memcpy(opad, ipad, bs); ++ ++ for (i = 0; i < bs; i++) { ++ ipad[i] ^= HMAC_IPAD_VALUE; ++ opad[i] ^= HMAC_OPAD_VALUE; ++ } ++ ++ err = crypto_shash_init(shash) ?: ++ crypto_shash_update(shash, ipad, bs) ?: ++ crypto_shash_export(shash, ipad) ?: ++ crypto_shash_init(shash) ?: ++ crypto_shash_update(shash, opad, bs) ?: ++ crypto_shash_export(shash, opad); ++ ++ if (err) ++ return err; ++ ++ /* add auth key */ ++ memcpy(&sa->saIDigest, ipad, SHA256_DIGEST_SIZE); ++ memcpy(&sa->saODigest, opad, SHA256_DIGEST_SIZE); ++ ++ kfree(ipad); ++ return 0; ++} ++#endif +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-common.h +@@ -0,0 +1,28 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#ifndef _EIP93_COMMON_H_ ++#define _EIP93_COMMON_H_ ++ ++#include "eip93-main.h" ++ ++inline int mtk_put_descriptor(struct mtk_device *mtk, ++ struct eip93_descriptor_s *desc); ++ ++inline void *mtk_get_descriptor(struct mtk_device *mtk); ++ ++inline int mtk_get_free_saState(struct mtk_device *mtk); ++ ++void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen, ++ const u32 flags); ++ ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) ++int mtk_authenc_setkey(struct crypto_shash *cshash, struct saRecord_s *sa, ++ const u8 *authkey, unsigned int authkeylen); ++#endif ++ ++#endif /* _EIP93_COMMON_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-des.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_DES_H_ ++#define _EIP93_DES_H_ ++ ++extern struct mtk_alg_template mtk_alg_ecb_des; ++extern struct mtk_alg_template mtk_alg_cbc_des; ++extern struct mtk_alg_template mtk_alg_ecb_des3_ede; ++extern struct mtk_alg_template mtk_alg_cbc_des3_ede; ++ ++#endif /* _EIP93_DES_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-main.c +@@ -0,0 +1,467 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "eip93-main.h" ++#include "eip93-regs.h" ++#include "eip93-common.h" ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) ++#include "eip93-cipher.h" ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++#include "eip93-aes.h" ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++#include "eip93-des.h" ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) ++#include "eip93-aead.h" ++#endif ++ ++static struct mtk_alg_template *mtk_algs[] = { ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ &mtk_alg_ecb_des, ++ &mtk_alg_cbc_des, ++ &mtk_alg_ecb_des3_ede, ++ &mtk_alg_cbc_des3_ede, ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ &mtk_alg_ecb_aes, ++ &mtk_alg_cbc_aes, ++ &mtk_alg_ctr_aes, ++ &mtk_alg_rfc3686_aes, ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ &mtk_alg_authenc_hmac_md5_cbc_des, ++ &mtk_alg_authenc_hmac_sha1_cbc_des, ++ &mtk_alg_authenc_hmac_sha224_cbc_des, ++ &mtk_alg_authenc_hmac_sha256_cbc_des, ++ &mtk_alg_authenc_hmac_md5_cbc_des3_ede, ++ &mtk_alg_authenc_hmac_sha1_cbc_des3_ede, ++ &mtk_alg_authenc_hmac_sha224_cbc_des3_ede, ++ &mtk_alg_authenc_hmac_sha256_cbc_des3_ede, ++#endif ++ &mtk_alg_authenc_hmac_md5_cbc_aes, ++ &mtk_alg_authenc_hmac_sha1_cbc_aes, ++ &mtk_alg_authenc_hmac_sha224_cbc_aes, ++ &mtk_alg_authenc_hmac_sha256_cbc_aes, ++ &mtk_alg_authenc_hmac_md5_rfc3686_aes, ++ &mtk_alg_authenc_hmac_sha1_rfc3686_aes, ++ &mtk_alg_authenc_hmac_sha224_rfc3686_aes, ++ &mtk_alg_authenc_hmac_sha256_rfc3686_aes, ++#endif ++}; ++ ++inline void mtk_irq_disable(struct mtk_device *mtk, u32 mask) ++{ ++ __raw_writel(mask, mtk->base + EIP93_REG_MASK_DISABLE); ++} ++ ++inline void mtk_irq_enable(struct mtk_device *mtk, u32 mask) ++{ ++ __raw_writel(mask, mtk->base + EIP93_REG_MASK_ENABLE); ++} ++ ++inline void mtk_irq_clear(struct mtk_device *mtk, u32 mask) ++{ ++ __raw_writel(mask, mtk->base + EIP93_REG_INT_CLR); ++} ++ ++static void mtk_unregister_algs(unsigned int i) ++{ ++ unsigned int j; ++ ++ for (j = 0; j < i; j++) { ++ switch (mtk_algs[j]->type) { ++ case MTK_ALG_TYPE_SKCIPHER: ++ crypto_unregister_skcipher(&mtk_algs[j]->alg.skcipher); ++ break; ++ case MTK_ALG_TYPE_AEAD: ++ crypto_unregister_aead(&mtk_algs[j]->alg.aead); ++ break; ++ } ++ } ++} ++ ++static int mtk_register_algs(struct mtk_device *mtk) ++{ ++ unsigned int i; ++ int err = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(mtk_algs); i++) { ++ mtk_algs[i]->mtk = mtk; ++ ++ switch (mtk_algs[i]->type) { ++ case MTK_ALG_TYPE_SKCIPHER: ++ err = crypto_register_skcipher(&mtk_algs[i]->alg.skcipher); ++ break; ++ case MTK_ALG_TYPE_AEAD: ++ err = crypto_register_aead(&mtk_algs[i]->alg.aead); ++ break; ++ } ++ if (err) ++ goto fail; ++ } ++ ++ return 0; ++ ++fail: ++ mtk_unregister_algs(i); ++ ++ return err; ++} ++ ++static void mtk_handle_result_descriptor(struct mtk_device *mtk) ++{ ++ struct crypto_async_request *async; ++ struct eip93_descriptor_s *rdesc; ++ bool last_entry; ++ u32 flags; ++ int handled, ready, err; ++ union peCrtlStat_w done1; ++ union peLength_w done2; ++ ++get_more: ++ handled = 0; ++ ++ ready = readl(mtk->base + EIP93_REG_PE_RD_COUNT) & GENMASK(10, 0); ++ ++ if (!ready) { ++ mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ mtk_irq_enable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ return; ++ } ++ ++ last_entry = false; ++ ++ while (ready) { ++ rdesc = mtk_get_descriptor(mtk); ++ if (IS_ERR(rdesc)) { ++ dev_err(mtk->dev, "Ndesc: %d nreq: %d\n", ++ handled, ready); ++ err = -EIO; ++ break; ++ } ++ /* make sure DMA is finished writing */ ++ do { ++ done1.word = READ_ONCE(rdesc->peCrtlStat.word); ++ done2.word = READ_ONCE(rdesc->peLength.word); ++ } while ((!done1.bits.peReady) || (!done2.bits.peReady)); ++ ++ err = rdesc->peCrtlStat.bits.errStatus; ++ ++ flags = rdesc->userId; ++ async = (struct crypto_async_request *)rdesc->arc4Addr; ++ ++ writel(1, mtk->base + EIP93_REG_PE_RD_COUNT); ++ mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ ++ handled++; ++ ready--; ++ ++ if (flags & MTK_DESC_LAST) { ++ last_entry = true; ++ break; ++ } ++ } ++ ++ if (!last_entry) ++ goto get_more; ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_SKCIPHER) ++ if (flags & MTK_DESC_SKCIPHER) ++ mtk_skcipher_handle_result(async, err); ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AEAD) ++ if (flags & MTK_DESC_AEAD) ++ mtk_aead_handle_result(async, err); ++#endif ++ goto get_more; ++} ++ ++static void mtk_done_task(unsigned long data) ++{ ++ struct mtk_device *mtk = (struct mtk_device *)data; ++ ++ mtk_handle_result_descriptor(mtk); ++} ++ ++static irqreturn_t mtk_irq_handler(int irq, void *dev_id) ++{ ++ struct mtk_device *mtk = (struct mtk_device *)dev_id; ++ u32 irq_status; ++ ++ irq_status = readl(mtk->base + EIP93_REG_INT_MASK_STAT); ++ ++ if (irq_status & EIP93_INT_PE_RDRTHRESH_REQ) { ++ mtk_irq_disable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ tasklet_schedule(&mtk->ring->done_task); ++ return IRQ_HANDLED; ++ } ++ ++ mtk_irq_clear(mtk, irq_status); ++ if (irq_status) ++ mtk_irq_disable(mtk, irq_status); ++ ++ return IRQ_NONE; ++} ++ ++static void mtk_initialize(struct mtk_device *mtk) ++{ ++ union peConfig_w peConfig; ++ union peEndianCfg_w peEndianCfg; ++ union peIntCfg_w peIntCfg; ++ union peClockCfg_w peClockCfg; ++ union peBufThresh_w peBufThresh; ++ union peRingThresh_w peRingThresh; ++ ++ /* Reset Engine and setup Mode */ ++ peConfig.word = 0; ++ peConfig.bits.resetPE = 1; ++ peConfig.bits.resetRing = 1; ++ peConfig.bits.peMode = 3; ++ peConfig.bits.enCDRupdate = 1; ++ ++ writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); ++ ++ udelay(10); ++ ++ peConfig.bits.resetPE = 0; ++ peConfig.bits.resetRing = 0; ++ ++ writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); ++ ++ /* Initialize the BYTE_ORDER_CFG register */ ++ peEndianCfg.word = 0; ++ writel(peEndianCfg.word, mtk->base + EIP93_REG_PE_ENDIAN_CONFIG); ++ ++ /* Initialize the INT_CFG register */ ++ peIntCfg.word = 0; ++ writel(peIntCfg.word, mtk->base + EIP93_REG_INT_CFG); ++ ++ /* Config Clocks */ ++ peClockCfg.word = 0; ++ peClockCfg.bits.enPEclk = 1; ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_DES) ++ peClockCfg.bits.enDESclk = 1; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_AES) ++ peClockCfg.bits.enAESclk = 1; ++#endif ++#if IS_ENABLED(CONFIG_CRYPTO_DEV_EIP93_HMAC) ++ peClockCfg.bits.enHASHclk = 1; ++#endif ++ writel(peClockCfg.word, mtk->base + EIP93_REG_PE_CLOCK_CTRL); ++ ++ /* Config DMA thresholds */ ++ peBufThresh.word = 0; ++ peBufThresh.bits.inputBuffer = 128; ++ peBufThresh.bits.outputBuffer = 128; ++ ++ writel(peBufThresh.word, mtk->base + EIP93_REG_PE_BUF_THRESH); ++ ++ /* Clear/ack all interrupts before disable all */ ++ mtk_irq_clear(mtk, 0xFFFFFFFF); ++ mtk_irq_disable(mtk, 0xFFFFFFFF); ++ ++ /* Config Ring Threshold */ ++ peRingThresh.word = 0; ++ peRingThresh.bits.CDRThresh = MTK_RING_SIZE - MTK_RING_BUSY; ++ peRingThresh.bits.RDRThresh = 0; ++ peRingThresh.bits.RDTimeout = 5; ++ peRingThresh.bits.enTimeout = 1; ++ ++ writel(peRingThresh.word, mtk->base + EIP93_REG_PE_RING_THRESH); ++} ++ ++static void mtk_desc_free(struct mtk_device *mtk) ++{ ++ writel(0, mtk->base + EIP93_REG_PE_RING_CONFIG); ++ writel(0, mtk->base + EIP93_REG_PE_CDR_BASE); ++ writel(0, mtk->base + EIP93_REG_PE_RDR_BASE); ++} ++ ++static int mtk_set_ring(struct mtk_device *mtk, struct mtk_desc_ring *ring, ++ int Offset) ++{ ++ ring->offset = Offset; ++ ring->base = dmam_alloc_coherent(mtk->dev, Offset * MTK_RING_SIZE, ++ &ring->base_dma, GFP_KERNEL); ++ if (!ring->base) ++ return -ENOMEM; ++ ++ ring->write = ring->base; ++ ring->base_end = ring->base + Offset * (MTK_RING_SIZE - 1); ++ ring->read = ring->base; ++ ++ return 0; ++} ++ ++static int mtk_desc_init(struct mtk_device *mtk) ++{ ++ struct mtk_state_pool *saState_pool; ++ struct mtk_desc_ring *cdr = &mtk->ring->cdr; ++ struct mtk_desc_ring *rdr = &mtk->ring->rdr; ++ union peRingCfg_w peRingCfg; ++ int RingOffset, err, i; ++ ++ RingOffset = sizeof(struct eip93_descriptor_s); ++ ++ err = mtk_set_ring(mtk, cdr, RingOffset); ++ if (err) ++ return err; ++ ++ err = mtk_set_ring(mtk, rdr, RingOffset); ++ if (err) ++ return err; ++ ++ writel((u32)cdr->base_dma, mtk->base + EIP93_REG_PE_CDR_BASE); ++ writel((u32)rdr->base_dma, mtk->base + EIP93_REG_PE_RDR_BASE); ++ ++ peRingCfg.word = 0; ++ peRingCfg.bits.ringSize = MTK_RING_SIZE - 1; ++ peRingCfg.bits.ringOffset = RingOffset / 4; ++ ++ writel(peRingCfg.word, mtk->base + EIP93_REG_PE_RING_CONFIG); ++ ++ atomic_set(&mtk->ring->free, MTK_RING_SIZE - 1); ++ /* Create State record DMA pool */ ++ RingOffset = sizeof(struct saState_s); ++ mtk->ring->saState = dmam_alloc_coherent(mtk->dev, ++ RingOffset * MTK_RING_SIZE, ++ &mtk->ring->saState_dma, GFP_KERNEL); ++ if (!mtk->ring->saState) ++ return -ENOMEM; ++ ++ mtk->ring->saState_pool = devm_kcalloc(mtk->dev, 1, ++ sizeof(struct mtk_state_pool) * MTK_RING_SIZE, ++ GFP_KERNEL); ++ ++ for (i = 0; i < MTK_RING_SIZE; i++) { ++ saState_pool = &mtk->ring->saState_pool[i]; ++ saState_pool->base = mtk->ring->saState + (i * RingOffset); ++ saState_pool->base_dma = mtk->ring->saState_dma + (i * RingOffset); ++ saState_pool->in_use = false; ++ } ++ ++ return 0; ++} ++ ++static void mtk_cleanup(struct mtk_device *mtk) ++{ ++ tasklet_kill(&mtk->ring->done_task); ++ ++ /* Clear/ack all interrupts before disable all */ ++ mtk_irq_clear(mtk, 0xFFFFFFFF); ++ mtk_irq_disable(mtk, 0xFFFFFFFF); ++ ++ writel(0, mtk->base + EIP93_REG_PE_CLOCK_CTRL); ++ ++ mtk_desc_free(mtk); ++} ++ ++static int mtk_crypto_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct mtk_device *mtk; ++ struct resource *res; ++ int err; ++ ++ mtk = devm_kzalloc(dev, sizeof(*mtk), GFP_KERNEL); ++ if (!mtk) ++ return -ENOMEM; ++ ++ mtk->dev = dev; ++ platform_set_drvdata(pdev, mtk); ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ mtk->base = devm_ioremap_resource(&pdev->dev, res); ++ ++ if (IS_ERR(mtk->base)) ++ return PTR_ERR(mtk->base); ++ ++ mtk->irq = platform_get_irq(pdev, 0); ++ ++ if (mtk->irq < 0) ++ return mtk->irq; ++ ++ err = devm_request_threaded_irq(mtk->dev, mtk->irq, mtk_irq_handler, ++ NULL, IRQF_ONESHOT, ++ dev_name(mtk->dev), mtk); ++ ++ mtk->ring = devm_kcalloc(mtk->dev, 1, sizeof(*mtk->ring), GFP_KERNEL); ++ ++ if (!mtk->ring) ++ return -ENOMEM; ++ ++ err = mtk_desc_init(mtk); ++ if (err) ++ return err; ++ ++ tasklet_init(&mtk->ring->done_task, mtk_done_task, (unsigned long)mtk); ++ ++ spin_lock_init(&mtk->ring->read_lock); ++ spin_lock_init(&mtk->ring->write_lock); ++ ++ mtk_initialize(mtk); ++ ++ /* Init. finished, enable RDR interupt */ ++ mtk_irq_enable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); ++ ++ err = mtk_register_algs(mtk); ++ if (err) { ++ mtk_cleanup(mtk); ++ return err; ++ } ++ ++ dev_info(mtk->dev, "EIP93 Crypto Engine Initialized."); ++ ++ return 0; ++} ++ ++static int mtk_crypto_remove(struct platform_device *pdev) ++{ ++ struct mtk_device *mtk = platform_get_drvdata(pdev); ++ ++ mtk_unregister_algs(ARRAY_SIZE(mtk_algs)); ++ mtk_cleanup(mtk); ++ dev_info(mtk->dev, "EIP93 removed.\n"); ++ ++ return 0; ++} ++ ++#if defined(CONFIG_OF) ++static const struct of_device_id mtk_crypto_of_match[] = { ++ { .compatible = "mediatek,mtk-eip93", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, mtk_crypto_of_match); ++#endif ++ ++static struct platform_driver mtk_crypto_driver = { ++ .probe = mtk_crypto_probe, ++ .remove = mtk_crypto_remove, ++ .driver = { ++ .name = "mtk-eip93", ++ .of_match_table = of_match_ptr(mtk_crypto_of_match), ++ }, ++}; ++module_platform_driver(mtk_crypto_driver); ++ ++MODULE_AUTHOR("Richard van Schagen "); ++MODULE_ALIAS("platform:" KBUILD_MODNAME); ++MODULE_DESCRIPTION("Mediatek EIP-93 crypto engine driver"); ++MODULE_LICENSE("GPL v2"); +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-main.h +@@ -0,0 +1,146 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef _EIP93_MAIN_H_ ++#define _EIP93_MAIN_H_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MTK_RING_SIZE 512 ++#define MTK_RING_BUSY 32 ++#define MTK_CRA_PRIORITY 1500 ++ ++/* cipher algorithms */ ++#define MTK_ALG_DES BIT(0) ++#define MTK_ALG_3DES BIT(1) ++#define MTK_ALG_AES BIT(2) ++#define MTK_ALG_MASK GENMASK(2, 0) ++/* hash and hmac algorithms */ ++#define MTK_HASH_MD5 BIT(3) ++#define MTK_HASH_SHA1 BIT(4) ++#define MTK_HASH_SHA224 BIT(5) ++#define MTK_HASH_SHA256 BIT(6) ++#define MTK_HASH_HMAC BIT(7) ++#define MTK_HASH_MASK GENMASK(6, 3) ++/* cipher modes */ ++#define MTK_MODE_CBC BIT(8) ++#define MTK_MODE_ECB BIT(9) ++#define MTK_MODE_CTR BIT(10) ++#define MTK_MODE_RFC3686 BIT(11) ++#define MTK_MODE_MASK GENMASK(10, 8) ++ ++/* cipher encryption/decryption operations */ ++#define MTK_ENCRYPT BIT(12) ++#define MTK_DECRYPT BIT(13) ++ ++#define MTK_BUSY BIT(14) ++ ++/* descriptor flags */ ++#define MTK_DESC_ASYNC BIT(31) ++#define MTK_DESC_SKCIPHER BIT(30) ++#define MTK_DESC_AEAD BIT(29) ++#define MTK_DESC_AHASH BIT(28) ++#define MTK_DESC_PRNG BIT(27) ++#define MTK_DESC_FAKE_HMAC BIT(26) ++#define MTK_DESC_LAST BIT(25) ++#define MTK_DESC_FINISH BIT(24) ++#define MTK_DESC_IPSEC BIT(23) ++#define MTK_DESC_DMA_IV BIT(22) ++ ++#define IS_DES(flags) (flags & MTK_ALG_DES) ++#define IS_3DES(flags) (flags & MTK_ALG_3DES) ++#define IS_AES(flags) (flags & MTK_ALG_AES) ++ ++#define IS_HASH_MD5(flags) (flags & MTK_HASH_MD5) ++#define IS_HASH_SHA1(flags) (flags & MTK_HASH_SHA1) ++#define IS_HASH_SHA224(flags) (flags & MTK_HASH_SHA224) ++#define IS_HASH_SHA256(flags) (flags & MTK_HASH_SHA256) ++#define IS_HMAC(flags) (flags & MTK_HASH_HMAC) ++ ++#define IS_CBC(mode) (mode & MTK_MODE_CBC) ++#define IS_ECB(mode) (mode & MTK_MODE_ECB) ++#define IS_CTR(mode) (mode & MTK_MODE_CTR) ++#define IS_RFC3686(mode) (mode & MTK_MODE_RFC3686) ++ ++#define IS_BUSY(flags) (flags & MTK_BUSY) ++#define IS_DMA_IV(flags) (flags & MTK_DESC_DMA_IV) ++ ++#define IS_ENCRYPT(dir) (dir & MTK_ENCRYPT) ++#define IS_DECRYPT(dir) (dir & MTK_DECRYPT) ++ ++#define IS_CIPHER(flags) (flags & (MTK_ALG_DES || \ ++ MTK_ALG_3DES || \ ++ MTK_ALG_AES)) ++ ++#define IS_HASH(flags) (flags & (MTK_HASH_MD5 || \ ++ MTK_HASH_SHA1 || \ ++ MTK_HASH_SHA224 || \ ++ MTK_HASH_SHA256)) ++ ++/** ++ * struct mtk_device - crypto engine device structure ++ */ ++struct mtk_device { ++ void __iomem *base; ++ struct device *dev; ++ struct clk *clk; ++ int irq; ++ struct mtk_ring *ring; ++ struct mtk_state_pool *saState_pool; ++}; ++ ++struct mtk_desc_ring { ++ void *base; ++ void *base_end; ++ dma_addr_t base_dma; ++ /* write and read pointers */ ++ void *read; ++ void *write; ++ /* descriptor element offset */ ++ u32 offset; ++}; ++ ++struct mtk_state_pool { ++ void *base; ++ dma_addr_t base_dma; ++ bool in_use; ++}; ++ ++struct mtk_ring { ++ struct tasklet_struct done_task; ++ /* command/result rings */ ++ struct mtk_desc_ring cdr; ++ struct mtk_desc_ring rdr; ++ spinlock_t write_lock; ++ spinlock_t read_lock; ++ atomic_t free; ++ /* saState */ ++ struct mtk_state_pool *saState_pool; ++ void *saState; ++ dma_addr_t saState_dma; ++}; ++ ++enum mtk_alg_type { ++ MTK_ALG_TYPE_AEAD, ++ MTK_ALG_TYPE_SKCIPHER, ++}; ++ ++struct mtk_alg_template { ++ struct mtk_device *mtk; ++ enum mtk_alg_type type; ++ u32 flags; ++ union { ++ struct aead_alg aead; ++ struct skcipher_alg skcipher; ++ } alg; ++}; ++ ++#endif /* _EIP93_MAIN_H_ */ +--- /dev/null ++++ b/drivers/crypto/mtk-eip93/eip93-regs.h +@@ -0,0 +1,382 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2019 - 2021 ++ * ++ * Richard van Schagen ++ */ ++#ifndef REG_EIP93_H ++#define REG_EIP93_H ++ ++#define EIP93_REG_WIDTH 4 ++/*----------------------------------------------------------------------------- ++ * Register Map ++ */ ++#define DESP_BASE 0x0000000 ++#define EIP93_REG_PE_CTRL_STAT ((DESP_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_SOURCE_ADDR ((DESP_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_DEST_ADDR ((DESP_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_SA_ADDR ((DESP_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_ADDR ((DESP_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_USER_ID ((DESP_BASE)+(0x06 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_LENGTH ((DESP_BASE)+(0x07 * EIP93_REG_WIDTH)) ++ ++//PACKET ENGINE RING configuration registers ++#define PE_RNG_BASE 0x0000080 ++ ++#define EIP93_REG_PE_CDR_BASE ((PE_RNG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RDR_BASE ((PE_RNG_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RING_CONFIG ((PE_RNG_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RING_THRESH ((PE_RNG_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_CD_COUNT ((PE_RNG_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RD_COUNT ((PE_RNG_BASE)+(0x05 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_RING_RW_PNTR ((PE_RNG_BASE)+(0x06 * EIP93_REG_WIDTH)) ++ ++//PACKET ENGINE configuration registers ++#define PE_CFG_BASE 0x0000100 ++#define EIP93_REG_PE_CONFIG ((PE_CFG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_STATUS ((PE_CFG_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_BUF_THRESH ((PE_CFG_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_INBUF_COUNT ((PE_CFG_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_OUTBUF_COUNT ((PE_CFG_BASE)+(0x05 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_BUF_RW_PNTR ((PE_CFG_BASE)+(0x06 * EIP93_REG_WIDTH)) ++ ++//PACKET ENGINE endian config ++#define EN_CFG_BASE 0x00001CC ++#define EIP93_REG_PE_ENDIAN_CONFIG ((EN_CFG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++ ++//EIP93 CLOCK control registers ++#define CLOCK_BASE 0x01E8 ++#define EIP93_REG_PE_CLOCK_CTRL ((CLOCK_BASE)+(0x00 * EIP93_REG_WIDTH)) ++ ++//EIP93 Device Option and Revision Register ++#define REV_BASE 0x01F4 ++#define EIP93_REG_PE_OPTION_1 ((REV_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_OPTION_0 ((REV_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PE_REVISION ((REV_BASE)+(0x02 * EIP93_REG_WIDTH)) ++ ++//EIP93 Interrupt Control Register ++#define INT_BASE 0x0200 ++#define EIP93_REG_INT_UNMASK_STAT ((INT_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_MASK_STAT ((INT_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_CLR ((INT_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_MASK ((INT_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_INT_CFG ((INT_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_MASK_ENABLE ((INT_BASE)+(0X04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_MASK_DISABLE ((INT_BASE)+(0X05 * EIP93_REG_WIDTH)) ++ ++//EIP93 SA Record register ++#define SA_BASE 0x0400 ++#define EIP93_REG_SA_CMD_0 ((SA_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_SA_CMD_1 ((SA_BASE)+(0x01 * EIP93_REG_WIDTH)) ++ ++//#define EIP93_REG_SA_READY ((SA_BASE)+(31 * EIP93_REG_WIDTH)) ++ ++//State save register ++#define STATE_BASE 0x0500 ++#define EIP93_REG_STATE_IV_0 ((STATE_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_STATE_IV_1 ((STATE_BASE)+(0x01 * EIP93_REG_WIDTH)) ++ ++#define EIP93_PE_ARC4STATE_BASEADDR_REG 0x0700 ++ ++//RAM buffer start address ++#define EIP93_INPUT_BUFFER 0x0800 ++#define EIP93_OUTPUT_BUFFER 0x0800 ++ ++//EIP93 PRNG Configuration Register ++#define PRNG_BASE 0x0300 ++#define EIP93_REG_PRNG_STAT ((PRNG_BASE)+(0x00 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_CTRL ((PRNG_BASE)+(0x01 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_0 ((PRNG_BASE)+(0x02 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_1 ((PRNG_BASE)+(0x03 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_2 ((PRNG_BASE)+(0x04 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_SEED_3 ((PRNG_BASE)+(0x05 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_0 ((PRNG_BASE)+(0x06 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_1 ((PRNG_BASE)+(0x07 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_2 ((PRNG_BASE)+(0x08 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_KEY_3 ((PRNG_BASE)+(0x09 * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_0 ((PRNG_BASE)+(0x0A * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_1 ((PRNG_BASE)+(0x0B * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_2 ((PRNG_BASE)+(0x0C * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_RES_3 ((PRNG_BASE)+(0x0D * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_LFSR_0 ((PRNG_BASE)+(0x0E * EIP93_REG_WIDTH)) ++#define EIP93_REG_PRNG_LFSR_1 ((PRNG_BASE)+(0x0F * EIP93_REG_WIDTH)) ++ ++/*----------------------------------------------------------------------------- ++ * Constants & masks ++ */ ++ ++#define EIP93_SUPPORTED_INTERRUPTS_MASK 0xffff7f00 ++#define EIP93_PRNG_DT_TEXT_LOWERHALF 0xDEAD ++#define EIP93_PRNG_DT_TEXT_UPPERHALF 0xC0DE ++#define EIP93_10BITS_MASK 0X3FF ++#define EIP93_12BITS_MASK 0XFFF ++#define EIP93_4BITS_MASK 0X04 ++#define EIP93_20BITS_MASK 0xFFFFF ++ ++#define EIP93_MIN_DESC_DONE_COUNT 0 ++#define EIP93_MAX_DESC_DONE_COUNT 15 ++ ++#define EIP93_MIN_DESC_PENDING_COUNT 0 ++#define EIP93_MAX_DESC_PENDING_COUNT 1023 ++ ++#define EIP93_MIN_TIMEOUT_COUNT 0 ++#define EIP93_MAX_TIMEOUT_COUNT 15 ++ ++#define EIP93_MIN_PE_INPUT_THRESHOLD 1 ++#define EIP93_MAX_PE_INPUT_THRESHOLD 511 ++ ++#define EIP93_MIN_PE_OUTPUT_THRESHOLD 1 ++#define EIP93_MAX_PE_OUTPUT_THRESHOLD 432 ++ ++#define EIP93_MIN_PE_RING_SIZE 1 ++#define EIP93_MAX_PE_RING_SIZE 1023 ++ ++#define EIP93_MIN_PE_DESCRIPTOR_SIZE 7 ++#define EIP93_MAX_PE_DESCRIPTOR_SIZE 15 ++ ++//3DES keys,seed,known data and its result ++#define EIP93_KEY_0 0x133b3454 ++#define EIP93_KEY_1 0x5e5b890b ++#define EIP93_KEY_2 0x5eb30757 ++#define EIP93_KEY_3 0x93ab15f7 ++#define EIP93_SEED_0 0x62c4bf5e ++#define EIP93_SEED_1 0x972667c8 ++#define EIP93_SEED_2 0x6345bf67 ++#define EIP93_SEED_3 0xcb3482bf ++#define EIP93_LFSR_0 0xDEADC0DE ++#define EIP93_LFSR_1 0xBEEFF00D ++ ++/*----------------------------------------------------------------------------- ++ * EIP93 device initialization specifics ++ */ ++ ++/*---------------------------------------------------------------------------- ++ * Byte Order Reversal Mechanisms Supported in EIP93 ++ * EIP93_BO_REVERSE_HALF_WORD : reverse the byte order within a half-word ++ * EIP93_BO_REVERSE_WORD : reverse the byte order within a word ++ * EIP93_BO_REVERSE_DUAL_WORD : reverse the byte order within a dual-word ++ * EIP93_BO_REVERSE_QUAD_WORD : reverse the byte order within a quad-word ++ */ ++enum EIP93_Byte_Order_Value_t { ++ EIP93_BO_REVERSE_HALF_WORD = 1, ++ EIP93_BO_REVERSE_WORD = 2, ++ EIP93_BO_REVERSE_DUAL_WORD = 4, ++ EIP93_BO_REVERSE_QUAD_WORD = 8, ++}; ++ ++/*---------------------------------------------------------------------------- ++ * Byte Order Reversal Mechanisms Supported in EIP93 for Target Data ++ * EIP93_BO_REVERSE_HALF_WORD : reverse the byte order within a half-word ++ * EIP93_BO_REVERSE_WORD : reverse the byte order within a word ++ */ ++enum EIP93_Byte_Order_Value_TD_t { ++ EIP93_BO_REVERSE_HALF_WORD_TD = 1, ++ EIP93_BO_REVERSE_WORD_TD = 2, ++}; ++ ++// BYTE_ORDER_CFG register values ++#define EIP93_BYTE_ORDER_PD EIP93_BO_REVERSE_WORD ++#define EIP93_BYTE_ORDER_SA EIP93_BO_REVERSE_WORD ++#define EIP93_BYTE_ORDER_DATA EIP93_BO_REVERSE_WORD ++#define EIP93_BYTE_ORDER_TD EIP93_BO_REVERSE_WORD_TD ++ ++// INT_CFG register values ++#define EIP93_INT_HOST_OUTPUT_TYPE 0 ++#define EIP93_INT_PULSE_CLEAR 0 ++ ++/* ++ * Interrupts of EIP93 ++ */ ++ ++enum EIP93_InterruptSource_t { ++ EIP93_INT_PE_CDRTHRESH_REQ = BIT(0), ++ EIP93_INT_PE_RDRTHRESH_REQ = BIT(1), ++ EIP93_INT_PE_OPERATION_DONE = BIT(9), ++ EIP93_INT_PE_INBUFTHRESH_REQ = BIT(10), ++ EIP93_INT_PE_OUTBURTHRSH_REQ = BIT(11), ++ EIP93_INT_PE_PRNG_IRQ = BIT(12), ++ EIP93_INT_PE_ERR_REG = BIT(13), ++ EIP93_INT_PE_RD_DONE_IRQ = BIT(16), ++}; ++ ++union peConfig_w { ++ u32 word; ++ struct { ++ u32 resetPE :1; ++ u32 resetRing :1; ++ u32 reserved :6; ++ u32 peMode :2; ++ u32 enCDRupdate :1; ++ u32 reserved2 :5; ++ u32 swapCDRD :1; ++ u32 swapSA :1; ++ u32 swapData :1; ++ u32 reserved3 :13; ++ } bits; ++} __packed; ++ ++union peEndianCfg_w { ++ u32 word; ++ struct { ++ u32 masterByteSwap :8; ++ u32 reserved :8; ++ u32 targetByteSwap :8; ++ u32 reserved2 :8; ++ } bits; ++} __packed; ++ ++union peIntCfg_w { ++ u32 word; ++ struct { ++ u32 PulseClear :1; ++ u32 IntType :1; ++ u32 reserved :30; ++ } bits; ++} __packed; ++ ++union peClockCfg_w { ++ u32 word; ++ struct { ++ u32 enPEclk :1; ++ u32 enDESclk :1; ++ u32 enAESclk :1; ++ u32 reserved :1; ++ u32 enHASHclk :1; ++ u32 reserved2 :27; ++ } bits; ++} __packed; ++ ++union peBufThresh_w { ++ u32 word; ++ struct { ++ u32 inputBuffer :8; ++ u32 reserved :8; ++ u32 outputBuffer :8; ++ u32 reserved2 :8; ++ } bits; ++} __packed; ++ ++union peRingThresh_w { ++ u32 word; ++ struct { ++ u32 CDRThresh :10; ++ u32 reserved :6; ++ u32 RDRThresh :10; ++ u32 RDTimeout :4; ++ u32 reserved2 :1; ++ u32 enTimeout :1; ++ } bits; ++} __packed; ++ ++union peRingCfg_w { ++ u32 word; ++ struct { ++ u32 ringSize :10; ++ u32 reserved :6; ++ u32 ringOffset :8; ++ u32 reserved2 :8; ++ } bits; ++} __packed; ++ ++union saCmd0 { ++ u32 word; ++ struct { ++ u32 opCode :3; ++ u32 direction :1; ++ u32 opGroup :2; ++ u32 padType :2; ++ u32 cipher :4; ++ u32 hash :4; ++ u32 reserved2 :1; ++ u32 scPad :1; ++ u32 extPad :1; ++ u32 hdrProc :1; ++ u32 digestLength :4; ++ u32 ivSource :2; ++ u32 hashSource :2; ++ u32 saveIv :1; ++ u32 saveHash :1; ++ u32 reserved1 :2; ++ } bits; ++} __packed; ++ ++union saCmd1 { ++ u32 word; ++ struct { ++ u32 copyDigest :1; ++ u32 copyHeader :1; ++ u32 copyPayload :1; ++ u32 copyPad :1; ++ u32 reserved4 :4; ++ u32 cipherMode :2; ++ u32 reserved3 :1; ++ u32 sslMac :1; ++ u32 hmac :1; ++ u32 byteOffset :1; ++ u32 reserved2 :2; ++ u32 hashCryptOffset :8; ++ u32 aesKeyLen :3; ++ u32 reserved1 :1; ++ u32 aesDecKey :1; ++ u32 seqNumCheck :1; ++ u32 reserved0 :2; ++ } bits; ++} __packed; ++ ++struct saRecord_s { ++ union saCmd0 saCmd0; ++ union saCmd1 saCmd1; ++ u32 saKey[8]; ++ u32 saIDigest[8]; ++ u32 saODigest[8]; ++ u32 saSpi; ++ u32 saSeqNum[2]; ++ u32 saSeqNumMask[2]; ++ u32 saNonce; ++} __packed; ++ ++struct saState_s { ++ u32 stateIv[4]; ++ u32 stateByteCnt[2]; ++ u32 stateIDigest[8]; ++} __packed; ++ ++union peCrtlStat_w { ++ u32 word; ++ struct { ++ u32 hostReady :1; ++ u32 peReady :1; ++ u32 reserved :1; ++ u32 initArc4 :1; ++ u32 hashFinal :1; ++ u32 haltMode :1; ++ u32 prngMode :2; ++ u32 padValue :8; ++ u32 errStatus :8; ++ u32 padCrtlStat :8; ++ } bits; ++} __packed; ++ ++union peLength_w { ++ u32 word; ++ struct { ++ u32 length :20; ++ u32 reserved :2; ++ u32 hostReady :1; ++ u32 peReady :1; ++ u32 byPass :8; ++ } bits; ++} __packed; ++ ++struct eip93_descriptor_s { ++ union peCrtlStat_w peCrtlStat; ++ u32 srcAddr; ++ u32 dstAddr; ++ u32 saAddr; ++ u32 stateAddr; ++ u32 arc4Addr; ++ u32 userId; ++ union peLength_w peLength; ++} __packed; ++ ++#endif +--- a/drivers/crypto/Kconfig ++++ b/drivers/crypto/Kconfig +@@ -797,4 +797,6 @@ config CRYPTO_DEV_SA2UL + source "drivers/crypto/aspeed/Kconfig" + source "drivers/crypto/starfive/Kconfig" + ++source "drivers/crypto/mtk-eip93/Kconfig" ++ + endif # CRYPTO_HW +--- a/drivers/crypto/Makefile ++++ b/drivers/crypto/Makefile +@@ -51,3 +51,4 @@ obj-y += hisilicon/ + obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/ + obj-y += intel/ + obj-y += starfive/ ++obj-$(CONFIG_CRYPTO_DEV_EIP93) += mtk-eip93/ diff --git a/target/linux/ramips/rt288x/config-6.6 b/target/linux/ramips/rt288x/config-6.6 new file mode 100644 index 0000000000..f3261258ae --- /dev/null +++ b/target/linux/ramips/rt288x/config-6.6 @@ -0,0 +1,209 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_RT2880_EVAL is not set +CONFIG_DTB_RT_NONE=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_RALINK=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IP17XX_PHY=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_AUTO_PFN_OFFSET=y +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=4 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_LZMA_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_SPLIT_WRGG_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_MDIO=y +CONFIG_NET_RALINK_MDIO_RT2880=y +CONFIG_NET_RALINK_RT2880=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NLS=m +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +# CONFIG_PHY_RALINK_USB is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +CONFIG_PINCTRL_RT2880=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +# CONFIG_SOC_MT7621 is not set +CONFIG_SOC_RT288X=y +# CONFIG_SOC_RT305X is not set +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB=m +CONFIG_USB_COMMON=m +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_HCD_PLATFORM=m +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PLATFORM=m +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/rt305x/config-6.6 b/target/linux/ramips/rt305x/config-6.6 new file mode 100644 index 0000000000..5d2e4f3766 --- /dev/null +++ b/target/linux/ramips/rt305x/config-6.6 @@ -0,0 +1,204 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +CONFIG_CEVT_SYSTICK_QUIRK=y +CONFIG_CLKEVT_RT3352=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_RT305X_EVAL is not set +CONFIG_DTB_RT_NONE=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_RALINK=y +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_JIMAGE_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_ESW_RT3050=y +CONFIG_NET_RALINK_RT3050=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +CONFIG_PINCTRL_RT305X=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +# CONFIG_RALINK_ILL_ACC is not set +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +CONFIG_SOC_RT305X=y +# CONFIG_SOC_RT3883 is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ramips/rt3883/config-6.6 b/target/linux/ramips/rt3883/config-6.6 new file mode 100644 index 0000000000..afb3fb6787 --- /dev/null +++ b/target/linux/ramips/rt3883/config-6.6 @@ -0,0 +1,204 @@ +CONFIG_AR8216_PHY=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +CONFIG_CLK_MTMIPS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DTB_RT3883_EVAL is not set +CONFIG_DTB_RT_NONE=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_RALINK=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_INTC=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_NET_RALINK_MDIO=y +CONFIG_NET_RALINK_MDIO_RT2880=y +CONFIG_NET_RALINK_RT3883=y +CONFIG_NET_RALINK_SOC=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_VENDOR_RALINK=y +CONFIG_NET_XGRESS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +# CONFIG_PHY_MT7621_PCI is not set +CONFIG_PHY_RALINK_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_AW9523 is not set +CONFIG_PINCTRL_MTK_MTMIPS=y +CONFIG_PINCTRL_RT3883=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RALINK=y +CONFIG_RALINK_WDT=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RTL8366_SMI=y +CONFIG_RTL8367B_PHY=y +CONFIG_RTL8367_PHY=y +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_MT7620 is not set +# CONFIG_SOC_MT7621 is not set +# CONFIG_SOC_RT288X is not set +# CONFIG_SOC_RT305X is not set +CONFIG_SOC_RT3883=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MT7621 is not set +CONFIG_SPI_RT2880=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_WATCHDOG_CORE=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/x86/64/config-6.6 b/target/linux/x86/64/config-6.6 new file mode 100644 index 0000000000..ce4eb644db --- /dev/null +++ b/target/linux/x86/64/config-6.6 @@ -0,0 +1,651 @@ +CONFIG_64BIT=y +# CONFIG_ACER_WMI is not set +CONFIG_ACPI=y +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_BUTTON=y +# CONFIG_ACPI_CMPC is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_CPU_FREQ_PSS=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_DEBUGGER is not set +# CONFIG_ACPI_DOCK is not set +# CONFIG_ACPI_DPTF is not set +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_FFH is not set +# CONFIG_ACPI_FPDT is not set +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_HOTPLUG_IOAPIC=y +# CONFIG_ACPI_I2C_OPREGION is not set +CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y +CONFIG_ACPI_LPIT=y +CONFIG_ACPI_PCC=y +# CONFIG_ACPI_PCI_SLOT is not set +# CONFIG_ACPI_PFRUT is not set +CONFIG_ACPI_PRMT=y +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_PROCESSOR_CSTATE=y +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y +# CONFIG_ACPI_SBS is not set +CONFIG_ACPI_SPCR_TABLE=y +CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +# CONFIG_ACPI_TAD is not set +CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_TOSHIBA is not set +CONFIG_ACPI_VIDEO=y +CONFIG_ACPI_VIOT=y +# CONFIG_ACPI_WMI is not set +# CONFIG_ACRN_GUEST is not set +# CONFIG_ADDRESS_MASKING is not set +# CONFIG_ADV_SWBUTTON is not set +CONFIG_AGP=y +# CONFIG_AGP_AMD64 is not set +CONFIG_AGP_INTEL=y +# CONFIG_AGP_SIS is not set +# CONFIG_AGP_VIA is not set +# CONFIG_AMD_HSMP is not set +# CONFIG_AMD_SFH_HID is not set +CONFIG_AMD_IOMMU=y +CONFIG_AMD_IOMMU_V2=y +# CONFIG_AMD_PMF is not set +# CONFIG_AMD_PTDMA is not set +CONFIG_APERTURE_HELPERS=y +CONFIG_ARCH_CPUIDLE_HALTPOLL=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y +CONFIG_ARCH_MMAP_RND_BITS=28 +CONFIG_ARCH_MMAP_RND_BITS_MAX=32 +CONFIG_ARCH_MMAP_RND_BITS_MIN=28 +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_WANTS_THP_SWAP=y +# CONFIG_ASUS_TF103C_DOCK is not set +# CONFIG_ASUS_WMI is not set +CONFIG_AUDIT_ARCH=y +CONFIG_AUXILIARY_BUS=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_BSG_COMMON=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_NVME=y +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y +CONFIG_BOOT_VESA_SUPPORT=y +CONFIG_BTT=y +CONFIG_CALL_DEPTH_TRACKING=y +CONFIG_CALL_PADDING=y +CONFIG_CALL_THUNKS=y +# CONFIG_CALL_THUNKS_DEBUG is not set +CONFIG_CDROM=y +CONFIG_CONNECTOR=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_CPU_IBPB_ENTRY=y +CONFIG_CPU_IBRS_ENTRY=y +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_CPU_RMAP=y +CONFIG_CPU_SRSO=y +CONFIG_CPU_UNRET_ENTRY=y +CONFIG_CRC64=y +CONFIG_CRC64_ROCKSOFT=y +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_AES_NI_INTEL=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y +# CONFIG_CRYPTO_ARIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_ARIA_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64 is not set +CONFIG_CRYPTO_BLAKE2S_X86=y +# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set +# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set +CONFIG_CRYPTO_CRC64_ROCKSOFT=y +CONFIG_CRYPTO_CRCT10DIF=y +# CONFIG_CRYPTO_CRCT10DIF_PCLMUL is not set +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_DES3_EDE_X86_64 is not set +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 +CONFIG_CRYPTO_LRW=y +# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set +# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set +# CONFIG_CRYPTO_POLYVAL_CLMUL_NI is not set +# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set +# CONFIG_CRYPTO_SHA1_SSSE3 is not set +# CONFIG_CRYPTO_SHA256_SSSE3 is not set +# CONFIG_CRYPTO_SHA512_SSSE3 is not set +CONFIG_CRYPTO_SIMD=y +# CONFIG_CRYPTO_SM3_AVX_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set +CONFIG_CRYPTO_XTS=y +CONFIG_DMAR_TABLE=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OPS=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DRM=y +CONFIG_DRM_BOCHS=y +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_BUDDY=y +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +CONFIG_DRM_GEM_SHMEM_HELPER=y +# CONFIG_DRM_HYPERV is not set +CONFIG_DRM_I915=y +CONFIG_DRM_I915_CAPTURE_ERROR=y +CONFIG_DRM_I915_COMPRESS_ERROR=y +# CONFIG_DRM_I915_DEBUG is not set +# CONFIG_DRM_I915_DEBUG_GUC is not set +# CONFIG_DRM_I915_DEBUG_MMIO is not set +# CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set +# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set +CONFIG_DRM_I915_FENCE_TIMEOUT=10000 +CONFIG_DRM_I915_FORCE_PROBE="" +CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 +# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set +CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 +CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 +CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 +CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 +# CONFIG_DRM_I915_SELFTEST is not set +CONFIG_DRM_I915_STOP_TIMEOUT=100 +# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set +# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set +CONFIG_DRM_I915_TIMESLICE_DURATION=1 +CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 +CONFIG_DRM_I915_USERPTR=y +# CONFIG_DRM_I915_WERROR is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_PANEL=y +CONFIG_DRM_PANEL_BRIDGE=y +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_DRM_TTM=y +CONFIG_DRM_TTM_HELPER=y +CONFIG_DRM_VIRTIO_GPU=y +CONFIG_DRM_VIRTIO_GPU_KMS=y +CONFIG_DRM_VRAM_HELPER=y +CONFIG_DYNAMIC_PHYSICAL_MASK=y +CONFIG_EFI=y +CONFIG_EFIVAR_FS=m +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_COCO_SECRET is not set +# CONFIG_EFI_CUSTOM_SSDT_OVERLAYS is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# CONFIG_EFI_DISABLE_RUNTIME is not set +CONFIG_EFI_DXE_MEM_ATTRIBUTES=y +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_ESRT=y +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_HANDOVER_PROTOCOL=y +# CONFIG_EFI_MIXED is not set +# CONFIG_EFI_PGT_DUMP is not set +# CONFIG_EFI_RCI2_TABLE is not set +CONFIG_EFI_RUNTIME_MAP=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +# CONFIG_EFI_SECRET is not set +CONFIG_EFI_STUB=y +# CONFIG_EFI_TEST is not set +CONFIG_FAILOVER=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CORE=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_EFI=y +CONFIG_FB_HYPERV=y +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_SIMPLE=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYS_IMAGEBLIT=y +CONFIG_FB_TILEBLITTING=y +# CONFIG_FB_VESA is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_FONT_SUPPORT=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FREEZER=y +CONFIG_FUSION_SAS=y +CONFIG_FW_CACHE=y +CONFIG_GART_IOMMU=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CPU=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_GIGABYTE_WMI is not set +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIO_ICH=y +CONFIG_GPIO_SCH=y +CONFIG_GUEST_PERF_EVENTS=y +CONFIG_HALTPOLL_CPUIDLE=y +CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y +CONFIG_HDMI=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HID_HYPERV_MOUSE=y +CONFIG_HOTPLUG_CORE_SYNC=y +CONFIG_HOTPLUG_CORE_SYNC_DEAD=y +CONFIG_HOTPLUG_CORE_SYNC_FULL=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HOTPLUG_PARALLEL=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +CONFIG_HOTPLUG_SMT=y +CONFIG_HOTPLUG_SPLIT_STARTUP=y +CONFIG_HPET=y +CONFIG_HPET_MMAP=y +# CONFIG_HUAWEI_WMI is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +CONFIG_HWMON=y +CONFIG_HWMON_VID=y +CONFIG_HW_RANDOM_AMD=y +CONFIG_HW_RANDOM_INTEL=y +CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_HYPERV=y +CONFIG_HYPERVISOR_GUEST=y +CONFIG_HYPERV_BALLOON=y +CONFIG_HYPERV_IOMMU=y +CONFIG_HYPERV_KEYBOARD=y +CONFIG_HYPERV_NET=y +CONFIG_HYPERV_STORAGE=y +# CONFIG_HYPERV_TESTING is not set +CONFIG_HYPERV_TIMER=y +CONFIG_HYPERV_UTILS=y +# CONFIG_HYPERV_VSOCKETS is not set +# CONFIG_HYPERV_VTL_MODE is not set +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +# CONFIG_I2C_AMD_MP2 is not set +CONFIG_I2C_BOARDINFO=y +# CONFIG_IA32_EMULATION is not set +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +CONFIG_INTEL_GTT=y +CONFIG_INTEL_IDLE=y +# CONFIG_INTEL_IDXD is not set +# CONFIG_INTEL_IDXD_COMPAT is not set +# CONFIG_INTEL_IFS is not set +CONFIG_INTEL_IOMMU=y +# CONFIG_INTEL_IOMMU_DEFAULT_ON is not set +CONFIG_INTEL_IOMMU_FLOPPY_WA=y +CONFIG_INTEL_IOMMU_PERF_EVENTS=y +# CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON is not set +# CONFIG_INTEL_IOMMU_SVM is not set +# CONFIG_INTEL_IPS is not set +# CONFIG_INTEL_MEI_GSC_PROXY is not set +# CONFIG_INTEL_MEI_HDCP is not set +# CONFIG_INTEL_MEI_PXP is not set +CONFIG_INTEL_PCH_THERMAL=y +# CONFIG_INTEL_SAR_INT1092 is not set +# CONFIG_INTEL_SCU_PLATFORM is not set +CONFIG_INTEL_SOC_DTS_IOSF_CORE=y +CONFIG_INTEL_SOC_DTS_THERMAL=y +# CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set +CONFIG_INTEL_TCC=y +CONFIG_INTEL_TDX_GUEST=y +# CONFIG_INTEL_TURBO_MAX_3 is not set +# CONFIG_INTEL_TXT is not set +# CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set +# CONFIG_INTEL_WMI_THUNDERBOLT is not set +CONFIG_INTERVAL_TREE=y +# CONFIG_IOMMUFD is not set +CONFIG_IOMMU_API=y +# CONFIG_IOMMU_DEBUG is not set +# CONFIG_IOMMU_DEBUGFS is not set +CONFIG_IOMMU_DEFAULT_DMA_LAZY=y +# CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_HELPER=y +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_SUPPORT=y +CONFIG_IOSF_MBI=y +# CONFIG_IOSF_MBI_DEBUG is not set +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_IRQ_REMAP=y +# CONFIG_ISCSI_IBFT is not set +CONFIG_ISO9660_FS=y +CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y +CONFIG_KCMP=y +CONFIG_KVM_GUEST=y +CONFIG_LEDS_GPIO=y +CONFIG_LEGACY_VSYSCALL_NONE=y +# CONFIG_LEGACY_VSYSCALL_XONLY is not set +# CONFIG_LENOVO_YMC is not set +# CONFIG_LG_LAPTOP is not set +CONFIG_LIBNVDIMM=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LPC_ICH=y +CONFIG_LPC_SCH=y +CONFIG_MAILBOX=y +# CONFIG_MAXSMP is not set +CONFIG_MEMORY_BALLOON=y +CONFIG_MEMREGION=y +# CONFIG_MERAKI_MX100 is not set +CONFIG_MFD_CORE=y +# CONFIG_MFD_INTEL_LPSS_ACPI is not set +# CONFIG_MFD_INTEL_PMC_BXT is not set +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +CONFIG_MMC_RICOH_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_PCI=y +# CONFIG_MMC_SDHCI_PLTFM is not set +# CONFIG_MMC_WBSD is not set +CONFIG_MMU_NOTIFIER=y +CONFIG_MODULES_USE_ELF_RELA=y +# CONFIG_MPSC is not set +# CONFIG_MSI_EC is not set +# CONFIG_MSI_WMI is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y +# CONFIG_MXM_WMI is not set +CONFIG_ND_CLAIM=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_FLAGS=y +CONFIG_NET_FAILOVER=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NITRO_ENCLAVES is not set +CONFIG_NR_CPUS=512 +CONFIG_NR_CPUS_DEFAULT=64 +CONFIG_NR_CPUS_RANGE_BEGIN=2 +CONFIG_NR_CPUS_RANGE_END=512 +# CONFIG_NVIDIA_WMI_EC_BACKLIGHT is not set +CONFIG_NVME_CORE=y +CONFIG_NVME_HWMON=y +CONFIG_NVME_MULTIPATH=y +CONFIG_OBJTOOL=y +CONFIG_OUTPUT_FORMAT="elf64-x86-64" +CONFIG_P2SB=y +CONFIG_PADATA=y +CONFIG_PAGE_REPORTING=y +CONFIG_PAGE_TABLE_ISOLATION=y +CONFIG_PARAVIRT=y +CONFIG_PARAVIRT_CLOCK=y +# CONFIG_PARAVIRT_DEBUG is not set +CONFIG_PARAVIRT_SPINLOCKS=y +CONFIG_PARAVIRT_XXL=y +CONFIG_PATA_AMD=y +CONFIG_PATA_ATIIXP=y +CONFIG_PATA_MPIIX=y +CONFIG_PATA_OLDPIIX=y +CONFIG_PATA_TIMINGS=y +CONFIG_PATA_VIA=y +CONFIG_PCC=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_PME=y +CONFIG_PCI_HYPERV=y +CONFIG_PCI_HYPERV_INTERFACE=y +# CONFIG_PCI_MMCONFIG is not set +CONFIG_PCI_PASID=y +CONFIG_PCI_PRI=y +CONFIG_PCI_XEN=y +CONFIG_PER_VMA_LOCK=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_PHYSICAL_ALIGN=0x1000000 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ALDERLAKE=y +CONFIG_PINCTRL_BAYTRAIL=y +CONFIG_PINCTRL_BROXTON=y +CONFIG_PINCTRL_CANNONLAKE=y +CONFIG_PINCTRL_CHERRYVIEW=y +CONFIG_PINCTRL_DENVERTON=y +CONFIG_PINCTRL_ELKHARTLAKE=y +CONFIG_PINCTRL_EMMITSBURG=y +CONFIG_PINCTRL_GEMINILAKE=y +CONFIG_PINCTRL_INTEL=y +CONFIG_PINCTRL_JASPERLAKE=y +CONFIG_PINCTRL_LAKEFIELD=y +CONFIG_PINCTRL_LEWISBURG=y +CONFIG_PINCTRL_LYNXPOINT=y +CONFIG_PINCTRL_METEORLAKE=y +CONFIG_PINCTRL_SUNRISEPOINT=y +CONFIG_PINCTRL_TIGERLAKE=y +CONFIG_PM=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_PM_CLK=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PNP=y +CONFIG_PNPACPI=y +CONFIG_PNP_DEBUG_MESSAGES=y +CONFIG_PPS=y +CONFIG_PREFIX_SYMBOLS=y +CONFIG_PROC_EVENTS=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_KVM=y +CONFIG_PTP_1588_CLOCK_VMW=y +CONFIG_PVH=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RAS=y +CONFIG_RELAY=y +CONFIG_RELOCATABLE=y +CONFIG_RESET_ATTACK_MITIGATION=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +# CONFIG_SAMSUNG_Q10 is not set +CONFIG_SATA_AHCI=y +# CONFIG_SCHED_CORE is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_MC_PRIO=y +CONFIG_SCHED_SMT=y +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_VIRTIO=y +# CONFIG_SEL3350_PLATFORM is not set +# CONFIG_SENSORS_ASUS_EC is not set +# CONFIG_SENSORS_ASUS_WMI is not set +CONFIG_SENSORS_CORETEMP=y +CONFIG_SENSORS_FAM15H_POWER=y +# CONFIG_SENSORS_HP_WMI is not set +CONFIG_SENSORS_I5500=y +CONFIG_SENSORS_K10TEMP=y +CONFIG_SENSORS_K8TEMP=y +# CONFIG_SENSORS_OXP is not set +CONFIG_SENSORS_VIA_CPUTEMP=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_MULTI_INSTANTIATE is not set +CONFIG_SLS=y +CONFIG_SMP=y +# CONFIG_SND_HDA_CTL_DEV_ID is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_SPI is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_SPI is not set +# CONFIG_SND_HDA_SCODEC_TAS2781_I2C is not set +# CONFIG_SND_SOC_AMD_ACP6x is not set +# CONFIG_SND_SOC_AMD_ACP_COMMON is not set +# CONFIG_SND_SOC_AMD_PS is not set +# CONFIG_SND_SOC_AMD_RPL_ACP6x is not set +# CONFIG_SND_SOC_INTEL_AVS is not set +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +# CONFIG_SPARSEMEM_VMEMMAP is not set +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_STACK_VALIDATION=y +CONFIG_SWIOTLB=y +CONFIG_SWIOTLB_XEN=y +CONFIG_SYNC_FILE=y +CONFIG_SYSFB=y +# CONFIG_SYSTEM76_ACPI is not set +CONFIG_SYS_HYPERVISOR=y +# CONFIG_TDX_GUEST_DRIVER is not set +CONFIG_THERMAL_ACPI=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THINKPAD_LMI is not set +# CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_TOSHIBA_WMI is not set +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +# CONFIG_UACCE is not set +# CONFIG_UCLAMP_TASK is not set +CONFIG_UCS2_STRING=y +CONFIG_UNACCEPTED_MEMORY=y +# CONFIG_UNWINDER_ORC is not set +CONFIG_USB_STORAGE=y +CONFIG_VIDEO_CMDLINE=y +# CONFIG_VIDEO_IPU3_CIO2 is not set +CONFIG_VIDEO_NOMODESET=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_ANCHOR=y +CONFIG_VIRTIO_BALLOON=y +CONFIG_VIRTIO_BLK=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_VIRTIO_DMA_SHARED_BUFFER=y +CONFIG_VIRTIO_IOMMU=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_PCI_LIB_LEGACY=y +# CONFIG_VIRTIO_PMEM is not set +# CONFIG_VIRTIO_VSOCKETS is not set +CONFIG_VIRTIO_VSOCKETS_COMMON=y +CONFIG_VIRT_DRIVERS=y +CONFIG_VMAP_PFN=y +CONFIG_VMAP_STACK=y +# CONFIG_VMD is not set +CONFIG_VMGENID=y +CONFIG_VMWARE_BALLOON=y +CONFIG_VMWARE_PVSCSI=y +CONFIG_VMWARE_VMCI=y +CONFIG_VMWARE_VMCI_VSOCKETS=y +CONFIG_VMXNET3=y +CONFIG_VSOCKETS=y +CONFIG_VSOCKETS_LOOPBACK=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WIRELESS_HOTKEY is not set +# CONFIG_WMI_BMOF is not set +# CONFIG_X86_5LEVEL is not set +CONFIG_X86_64=y +CONFIG_X86_64_SMP=y +CONFIG_X86_ACPI_CPUFREQ=y +# CONFIG_X86_ACPI_CPUFREQ_CPB is not set +CONFIG_X86_AMD_FREQ_SENSITIVITY=y +CONFIG_X86_AMD_PLATFORM_DEVICE=y +CONFIG_X86_AMD_PSTATE=y +CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 +# CONFIG_X86_AMD_PSTATE_UT is not set +CONFIG_X86_CPUID=y +CONFIG_X86_DIRECT_GBPAGES=y +CONFIG_X86_HV_CALLBACK_VECTOR=y +CONFIG_X86_INTEL_LPSS=y +# CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set +CONFIG_X86_INTEL_PSTATE=y +# CONFIG_X86_KERNEL_IBT is not set +CONFIG_X86_MEM_ENCRYPT=y +CONFIG_X86_MINIMUM_CPU_FAMILY=64 +# CONFIG_X86_PCC_CPUFREQ is not set +CONFIG_X86_PKG_TEMP_THERMAL=y +# CONFIG_X86_PMEM_LEGACY is not set +CONFIG_X86_PM_TIMER=y +# CONFIG_X86_POWERNOW_K8 is not set +# CONFIG_X86_USER_SHADOW_STACK is not set +# CONFIG_X86_VSYSCALL_EMULATION is not set +CONFIG_X86_X2APIC=y +# CONFIG_X86_X32_ABI is not set +CONFIG_XEN=y +CONFIG_XENFS=y +CONFIG_XEN_512GB=y +CONFIG_XEN_ACPI=y +CONFIG_XEN_ACPI_PROCESSOR=y +CONFIG_XEN_AUTO_XLATE=y +# CONFIG_XEN_BACKEND is not set +CONFIG_XEN_BALLOON=y +CONFIG_XEN_BLKDEV_FRONTEND=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_DEBUG_FS=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_DOM0=y +CONFIG_XEN_EFI=y +CONFIG_XEN_FBDEV_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +CONFIG_XEN_GRANT_DMA_OPS=y +CONFIG_XEN_HAVE_PVMMU=y +CONFIG_XEN_HAVE_VPMU=y +# CONFIG_XEN_MCE_LOG is not set +CONFIG_XEN_NETDEV_FRONTEND=y +CONFIG_XEN_PCIDEV_FRONTEND=y +CONFIG_XEN_PRIVCMD=y +# CONFIG_XEN_PRIVCMD_IRQFD is not set +CONFIG_XEN_PV=y +CONFIG_XEN_PVH=y +CONFIG_XEN_PVHVM=y +CONFIG_XEN_PVHVM_GUEST=y +CONFIG_XEN_PVHVM_SMP=y +CONFIG_XEN_PV_DOM0=y +CONFIG_XEN_PV_MSR_SAFE=y +CONFIG_XEN_PV_SMP=y +CONFIG_XEN_SAVE_RESTORE=y +CONFIG_XEN_SCSI_FRONTEND=y +CONFIG_XEN_SYMS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_VIRTIO=y +# CONFIG_XEN_VIRTIO_FORCE_GRANT is not set +CONFIG_XEN_WDT=y +CONFIG_XEN_XENBUS_FRONTEND=y +# CONFIG_XIAOMI_WMI is not set +CONFIG_XPS=y +# CONFIG_YOGABOOK is not set +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index 8e0076a8e9..8395a40f57 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -11,6 +11,7 @@ FEATURES:=squashfs ext4 vdi vmdk vhdx pcmcia targz fpu boot-part rootfs-part SUBTARGETS:=64 generic legacy geode KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 KERNELNAME:=bzImage diff --git a/target/linux/x86/config-6.6 b/target/linux/x86/config-6.6 new file mode 100644 index 0000000000..77d07482b3 --- /dev/null +++ b/target/linux/x86/config-6.6 @@ -0,0 +1,466 @@ +# CONFIG_60XX_WDT is not set +# CONFIG_64BIT is not set +# CONFIG_ACPI is not set +# CONFIG_ACQUIRE_WDT is not set +# CONFIG_ADVANTECH_EC_WDT is not set +# CONFIG_ADVANTECH_WDT is not set +# CONFIG_ALIM1535_WDT is not set +# CONFIG_ALIX is not set +CONFIG_AMD_NB=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_CLOCKSOURCE_INIT=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPLIT_ARG64=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USES_PG_UNCACHED=y +CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ATA=y +CONFIG_ATA_GENERIC=y +CONFIG_ATA_PIIX=y +# CONFIG_BARCO_P50_GPIO is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOUNCE=y +CONFIG_BUFFER_HEAD=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CLKBLD_I8253=y +CONFIG_CLKEVT_I8253=y +CONFIG_CLKSRC_I8253=y +CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100 +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32=y +CONFIG_COMPAT_32BIT_TIME=y +# CONFIG_COMPAT_VDSO is not set +CONFIG_CONSOLE_TRANSLATIONS=y +# CONFIG_CPU5_WDT is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_CYRIX_32=y +CONFIG_CPU_SUP_HYGON=y +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_TRANSMETA_32=y +CONFIG_CPU_SUP_UMC_32=y +CONFIG_CPU_SUP_VORTEX_32=y +CONFIG_CPU_SUP_ZHAOXIN=y +CONFIG_CRASH_CORE=y +# CONFIG_CRASH_HOTPLUG is not set +CONFIG_CRC16=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32_PCLMUL is not set +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +# CONFIG_CRYPTO_SERPENT_SSE2_586 is not set +# CONFIG_CX_ECAT is not set +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_DEBUG_BOOT_PARAMS is not set +# CONFIG_DEBUG_ENTRY is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_KMAP_LOCAL_FORCE_MAP is not set +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DEBUG_MISC=y +# CONFIG_DEBUG_NMI_SELFTEST is not set +# CONFIG_DEBUG_TLBFLUSH is not set +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DMADEVICES=y +CONFIG_DMI=y +CONFIG_DMIID=y +CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y +CONFIG_DMI_SYSFS=y +CONFIG_DNOTIFY=y +# CONFIG_DRM_I915_GVT_KVMGT is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_DYNAMIC_SIGFRAME=y +CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDD is not set +# CONFIG_EISA is not set +# CONFIG_EUROTECH_WDT is not set +# CONFIG_EXAR_WDT is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_EXT4_FS=y +CONFIG_F2FS_FS=y +# CONFIG_F71808E_WDT is not set +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FRAME_POINTER=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FUNCTION_ALIGNMENT=16 +CONFIG_FUNCTION_ALIGNMENT_16B=y +CONFIG_FUNCTION_PADDING_BYTES=16 +CONFIG_FUNCTION_PADDING_CFI=11 +CONFIG_FUSION=y +# CONFIG_FUSION_CTL is not set +# CONFIG_FUSION_LOGGING is not set +CONFIG_FUSION_MAX_SGE=128 +CONFIG_FUSION_SPI=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +# CONFIG_GDS_FORCE_MITIGATION is not set +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_ENTRY=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y +CONFIG_GENERIC_IRQ_RESERVATION_MODE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +# CONFIG_GEOS is not set +CONFIG_GLOB=y +CONFIG_GPIO_CDEV=y +# CONFIG_GPIO_ELKHARTLAKE is not set +# CONFIG_HANGCHECK_TIMER is not set +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HIGHMEM=y +CONFIG_HIGHMEM4G=y +# CONFIG_HIGHMEM64G is not set +CONFIG_HIGHPTE=y +CONFIG_HPET_EMULATE_RTC=y +CONFIG_HPET_TIMER=y +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_GEODE=y +CONFIG_HW_RANDOM_VIA=y +# CONFIG_HYPERVISOR_GUEST is not set +CONFIG_HZ_PERIODIC=y +CONFIG_I8253_LOCK=y +CONFIG_IA32_FEAT_CTL=y +# CONFIG_IB700_WDT is not set +# CONFIG_IBMASR is not set +# CONFIG_IBM_RTL is not set +# CONFIG_IE6XX_WDT is not set +CONFIG_ILLEGAL_POINTER_VALUE=0 +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INPUT=y +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_VIVALDIFMAP=y +CONFIG_INSTRUCTION_DECODER=y +# CONFIG_INTEL_HFI_THERMAL is not set +# CONFIG_INTEL_LDMA is not set +# CONFIG_INTEL_PCH_THERMAL is not set +# CONFIG_INTEL_POWERCLAMP is not set +# CONFIG_INTEL_SCU_PCI is not set +# CONFIG_INTEL_TCC_COOLING is not set +# CONFIG_INTEL_VSEC is not set +# CONFIG_IOSF_MBI is not set +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_NONE is not set +# CONFIG_IO_DELAY_UDELAY is not set +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +# CONFIG_ISA is not set +CONFIG_ISA_DMA_API=y +# CONFIG_IT8712F_WDT is not set +# CONFIG_IT87_WDT is not set +# CONFIG_ITCO_WDT is not set +CONFIG_JBD2=y +CONFIG_KALLSYMS=y +CONFIG_KEXEC=y +CONFIG_KEXEC_CORE=y +CONFIG_KEYBOARD_ATKBD=y +CONFIG_KMAP_LOCAL=y +# CONFIG_KVM_PROVE_MMU is not set +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_M486 is not set +# CONFIG_M486SX is not set +# CONFIG_M586 is not set +# CONFIG_M586MMX is not set +# CONFIG_M586TSC is not set +CONFIG_M686=y +# CONFIG_MACHZ_WDT is not set +# CONFIG_MATOM is not set +# CONFIG_MCORE2 is not set +# CONFIG_MCRUSOE is not set +# CONFIG_MCYRIXIII is not set +# CONFIG_MEFFICEON is not set +# CONFIG_MELAN is not set +# CONFIG_MFD_INTEL_LPSS_PCI is not set +# CONFIG_MGEODEGX1 is not set +# CONFIG_MGEODE_LX is not set +CONFIG_MICROCODE=y +CONFIG_MICROCODE_LATE_LOADING=y +CONFIG_MIGRATION=y +CONFIG_MITIGATION_RFDS=y +# CONFIG_MK6 is not set +# CONFIG_MK7 is not set +# CONFIG_MK8 is not set +CONFIG_MMU_GATHER_MERGE_VMAS=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +# CONFIG_MODIFY_LDT_SYSCALL is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MPENTIUM4 is not set +# CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set +# CONFIG_MPENTIUMM is not set +# CONFIG_MTD is not set +CONFIG_MTRR=y +# CONFIG_MTRR_SANITIZER is not set +# CONFIG_MVIAC3_2 is not set +# CONFIG_MVIAC7 is not set +# CONFIG_MWINCHIP3D is not set +# CONFIG_MWINCHIPC6 is not set +CONFIG_NAMESPACES=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_NEED_SG_DMA_LENGTH=y +# CONFIG_NET5501 is not set +# CONFIG_NET_NS is not set +CONFIG_NLS=y +# CONFIG_NMI_CHECK_CPU is not set +# CONFIG_NOHIGHMEM is not set +CONFIG_NR_CPUS=1 +CONFIG_NR_CPUS_DEFAULT=1 +CONFIG_NR_CPUS_RANGE_BEGIN=1 +CONFIG_NR_CPUS_RANGE_END=1 +# CONFIG_NSC_GPIO is not set +CONFIG_NVRAM=y +# CONFIG_OF is not set +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +# CONFIG_OLPC is not set +CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PC104=y +# CONFIG_PC8736x_GPIO is not set +# CONFIG_PC87413_WDT is not set +# CONFIG_PCENGINES_APU2 is not set +CONFIG_PCI=y +CONFIG_PCI_ATS=y +CONFIG_PCI_BIOS=y +CONFIG_PCI_DIRECT=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_GOANY=y +# CONFIG_PCI_GOBIOS is not set +# CONFIG_PCI_GODIRECT is not set +# CONFIG_PCI_GOMMCONFIG is not set +CONFIG_PCI_IOV=y +CONFIG_PCI_LABEL=y +CONFIG_PCI_LOCKLESS_CONFIG=y +CONFIG_PCI_MSI=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_PERF_EVENTS=y +# CONFIG_PERF_EVENTS_AMD_BRS is not set +# CONFIG_PERF_EVENTS_AMD_UNCORE is not set +CONFIG_PERF_EVENTS_INTEL_CSTATE=y +CONFIG_PERF_EVENTS_INTEL_RAPL=y +CONFIG_PERF_EVENTS_INTEL_UNCORE=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYSICAL_ALIGN=0x100000 +CONFIG_PHYSICAL_START=0x1000000 +# CONFIG_PHY_INTEL_LGM_EMMC is not set +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +# CONFIG_PROCESSOR_SELECT is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_PID_ARCH_STATUS=y +# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +# CONFIG_PUNIT_ATOM_DEBUG is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_RD_BZIP2=y +CONFIG_RD_GZIP=y +CONFIG_RETHUNK=y +CONFIG_RETPOLINE=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_SATA_HOST=y +# CONFIG_SBC7240_WDT is not set +# CONFIG_SBC8360_WDT is not set +# CONFIG_SBC_EPX_C3_WATCHDOG is not set +# CONFIG_SC1200_WDT is not set +CONFIG_SCSI=y +CONFIG_SCSI_COMMON=y +CONFIG_SCSI_SPI_ATTRS=y +CONFIG_SCx200=y +CONFIG_SCx200HR_TIMER=y +# CONFIG_SCx200_GPIO is not set +# CONFIG_SCx200_WDT is not set +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_PCILIB=y +# CONFIG_SERIAL_LANTIQ is not set +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_SERPORT=y +CONFIG_SG_POOL=y +# CONFIG_SIEMENS_SIMATIC_IPC is not set +# CONFIG_SMSC37B787_WDT is not set +# CONFIG_SMSC_SCH311X_WDT is not set +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPECULATION_MITIGATIONS=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +# CONFIG_STATIC_CALL_SELFTEST is not set +# CONFIG_STRICT_SIGALTSTACK_SIZE is not set +CONFIG_SYSCTL_EXCEPTION_TRACE=y +# CONFIG_SYSFB_SIMPLEFB is not set +# CONFIG_TELCLOCK is not set +# CONFIG_TEST_FPU is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_TOOLS_SUPPORT_RELR=y +# CONFIG_TOSHIBA is not set +# CONFIG_TQMX86_WDT is not set +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_UNWINDER_FRAME_POINTER=y +# CONFIG_UNWINDER_GUESS is not set +CONFIG_UP_LATE_INIT=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +CONFIG_USB_EHCI_PCI=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +# CONFIG_USB_OHCI_HCD_PLATFORM is not set +CONFIG_USB_PCI=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PLATFORM is not set +# CONFIG_USER_NS is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_VGA_CONSOLE=y +# CONFIG_VIA_WDT is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_WAFER_WDT is not set +# CONFIG_WINMATE_FM07_KEYS is not set +CONFIG_X86=y +CONFIG_X86_32=y +# CONFIG_X86_32_IRIS is not set +# CONFIG_X86_ANCIENT_MCE is not set +# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set +CONFIG_X86_CMOV=y +CONFIG_X86_CMPXCHG64=y +# CONFIG_X86_CPA_STATISTICS is not set +# CONFIG_X86_CPUFREQ_NFORCE2 is not set +# CONFIG_X86_CPUID is not set +# CONFIG_X86_CPU_RESCTRL is not set +CONFIG_X86_DEBUGCTLMSR=y +# CONFIG_X86_DEBUG_FPU is not set +# CONFIG_X86_DECODER_SELFTEST is not set +# CONFIG_X86_EXTENDED_PLATFORM is not set +CONFIG_X86_GENERIC=y +# CONFIG_X86_GX_SUSPMOD is not set +# CONFIG_X86_INTEL_PSTATE is not set +# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set +CONFIG_X86_INTEL_TSX_MODE_OFF=y +# CONFIG_X86_INTEL_TSX_MODE_ON is not set +CONFIG_X86_INTEL_USERCOPY=y +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 +CONFIG_X86_IOPL_IOPERM=y +CONFIG_X86_IO_APIC=y +CONFIG_X86_L1_CACHE_SHIFT=6 +# CONFIG_X86_LEGACY_VM86 is not set +CONFIG_X86_LOCAL_APIC=y +# CONFIG_X86_LONGRUN is not set +CONFIG_X86_MCE=y +# CONFIG_X86_MCELOG_LEGACY is not set +CONFIG_X86_MCE_AMD=y +# CONFIG_X86_MCE_INJECT is not set +CONFIG_X86_MCE_INTEL=y +CONFIG_X86_MCE_THRESHOLD=y +CONFIG_X86_MINIMUM_CPU_FAMILY=6 +CONFIG_X86_MPPARSE=y +CONFIG_X86_MSR=y +# CONFIG_X86_P4_CLOCKMOD is not set +CONFIG_X86_PAT=y +CONFIG_X86_PLATFORM_DEVICES=y +# CONFIG_X86_PLATFORM_DRIVERS_DELL is not set +# CONFIG_X86_PLATFORM_DRIVERS_HP is not set +# CONFIG_X86_POWERNOW_K6 is not set +# CONFIG_X86_POWERNOW_K7 is not set +# CONFIG_X86_REBOOTFIXUPS is not set +CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y +# CONFIG_X86_SPEEDSTEP_CENTRINO is not set +# CONFIG_X86_SPEEDSTEP_ICH is not set +# CONFIG_X86_SPEEDSTEP_SMI is not set +CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_X86_TSC=y +CONFIG_X86_UMIP=y +CONFIG_X86_UP_APIC=y +CONFIG_X86_UP_IOAPIC=y +CONFIG_X86_USE_PPRO_CHECKSUM=y +CONFIG_X86_VERBOSE_BOOTUP=y +CONFIG_X86_VMX_FEATURE_NAMES=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_XZ_DEC_X86=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/x86/generic/config-6.6 b/target/linux/x86/generic/config-6.6 new file mode 100644 index 0000000000..698f3bbe4d --- /dev/null +++ b/target/linux/x86/generic/config-6.6 @@ -0,0 +1,535 @@ +# CONFIG_3C515 is not set +# CONFIG_ACER_WMI is not set +CONFIG_ACPI=y +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_BUTTON=y +# CONFIG_ACPI_CMPC is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_CPU_FREQ_PSS=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_DEBUGGER is not set +# CONFIG_ACPI_DOCK is not set +# CONFIG_ACPI_DPTF is not set +# CONFIG_ACPI_EC_DEBUGFS is not set +# CONFIG_ACPI_FAN is not set +# CONFIG_ACPI_FFH is not set +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_HOTPLUG_IOAPIC=y +# CONFIG_ACPI_I2C_OPREGION is not set +CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_PROCESSOR_CSTATE=y +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y +# CONFIG_ACPI_SBS is not set +CONFIG_ACPI_SPCR_TABLE=y +CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +CONFIG_ACPI_TAD=y +CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_TOSHIBA is not set +CONFIG_ACPI_VIDEO=y +# CONFIG_ACPI_WMI is not set +# CONFIG_ADV_SWBUTTON is not set +CONFIG_AGP=y +# CONFIG_AGP_ALI is not set +# CONFIG_AGP_AMD is not set +# CONFIG_AGP_AMD64 is not set +# CONFIG_AGP_ATI is not set +# CONFIG_AGP_EFFICEON is not set +CONFIG_AGP_INTEL=y +# CONFIG_AGP_NVIDIA is not set +# CONFIG_AGP_SIS is not set +# CONFIG_AGP_SWORKS is not set +# CONFIG_AGP_VIA is not set +# CONFIG_AMD_PMF is not set +CONFIG_APERTURE_HELPERS=y +# CONFIG_APM is not set +CONFIG_ARCH_CPUIDLE_HALTPOLL=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y +# CONFIG_ASUS_TF103C_DOCK is not set +# CONFIG_ASUS_WMI is not set +CONFIG_AUXILIARY_BUS=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y +CONFIG_BOOT_VESA_SUPPORT=y +CONFIG_BTT=y +CONFIG_CDROM=y +CONFIG_CONNECTOR=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_RMAP=y +# CONFIG_CS89x0_ISA is not set +CONFIG_DMA_ACPI=y +CONFIG_DMA_OPS=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DRM=y +CONFIG_DRM_BOCHS=y +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_BUDDY=y +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +CONFIG_DRM_GEM_SHMEM_HELPER=y +# CONFIG_DRM_HYPERV is not set +CONFIG_DRM_I915=y +CONFIG_DRM_I915_CAPTURE_ERROR=y +CONFIG_DRM_I915_COMPRESS_ERROR=y +# CONFIG_DRM_I915_DEBUG is not set +# CONFIG_DRM_I915_DEBUG_GUC is not set +# CONFIG_DRM_I915_DEBUG_MMIO is not set +# CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set +# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set +CONFIG_DRM_I915_FENCE_TIMEOUT=10000 +CONFIG_DRM_I915_FORCE_PROBE="" +CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 +# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set +CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 +CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 +CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 +CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 +# CONFIG_DRM_I915_SELFTEST is not set +CONFIG_DRM_I915_STOP_TIMEOUT=100 +# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set +# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set +CONFIG_DRM_I915_TIMESLICE_DURATION=1 +CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 +CONFIG_DRM_I915_USERPTR=y +# CONFIG_DRM_I915_WERROR is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_PANEL=y +CONFIG_DRM_PANEL_BRIDGE=y +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_DRM_TTM=y +CONFIG_DRM_TTM_HELPER=y +CONFIG_DRM_VIRTIO_GPU=y +CONFIG_DRM_VIRTIO_GPU_KMS=y +CONFIG_DRM_VRAM_HELPER=y +CONFIG_EFI=y +CONFIG_EFIVAR_FS=m +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH is not set +# CONFIG_EFI_COCO_SECRET is not set +# CONFIG_EFI_CUSTOM_SSDT_OVERLAYS is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# CONFIG_EFI_DISABLE_RUNTIME is not set +CONFIG_EFI_DXE_MEM_ATTRIBUTES=y +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_ESRT=y +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_HANDOVER_PROTOCOL=y +# CONFIG_EFI_PGT_DUMP is not set +# CONFIG_EFI_RCI2_TABLE is not set +CONFIG_EFI_RUNTIME_MAP=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_STUB=y +# CONFIG_EFI_TEST is not set +# CONFIG_EL3 is not set +CONFIG_FAILOVER=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CORE=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_EFI=y +CONFIG_FB_HYPERV=y +# CONFIG_FB_I810 is not set +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_SIMPLE=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_VESA is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_FONT_SUPPORT=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FREEZER=y +CONFIG_FW_CACHE=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_GIGABYTE_WMI is not set +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_ACPI=y +CONFIG_GUEST_PERF_EVENTS=y +CONFIG_GUP_GET_PXX_LOW_HIGH=y +CONFIG_HALTPOLL_CPUIDLE=y +CONFIG_HDMI=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HID_HYPERV_MOUSE=y +# CONFIG_HIGHMEM4G is not set +CONFIG_HIGHMEM64G=y +CONFIG_HOTPLUG_CORE_SYNC=y +CONFIG_HOTPLUG_CORE_SYNC_DEAD=y +CONFIG_HOTPLUG_CORE_SYNC_FULL=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_COMPAQ is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_IBM is not set +CONFIG_HOTPLUG_PCI_PCIE=y +# CONFIG_HOTPLUG_PCI_SHPC is not set +CONFIG_HOTPLUG_SMT=y +CONFIG_HOTPLUG_SPLIT_STARTUP=y +CONFIG_HPET=y +CONFIG_HPET_MMAP=y +# CONFIG_HUAWEI_WMI is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +CONFIG_HWMON=y +CONFIG_HWMON_VID=y +CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_HYPERV=y +CONFIG_HYPERVISOR_GUEST=y +CONFIG_HYPERV_BALLOON=y +CONFIG_HYPERV_KEYBOARD=y +CONFIG_HYPERV_NET=y +CONFIG_HYPERV_STORAGE=y +# CONFIG_HYPERV_TESTING is not set +CONFIG_HYPERV_TIMER=y +CONFIG_HYPERV_UTILS=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +# CONFIG_I2C_AMD_MP2 is not set +CONFIG_I2C_BOARDINFO=y +# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set +CONFIG_INPUT_MOUSE=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +CONFIG_INTEL_GTT=y +CONFIG_INTEL_IDLE=y +# CONFIG_INTEL_IPS is not set +# CONFIG_INTEL_MEI_GSC_PROXY is not set +# CONFIG_INTEL_MEI_HDCP is not set +# CONFIG_INTEL_MEI_PXP is not set +CONFIG_INTEL_PCH_THERMAL=y +# CONFIG_INTEL_SAR_INT1092 is not set +# CONFIG_INTEL_SCU_PLATFORM is not set +CONFIG_INTEL_SOC_DTS_IOSF_CORE=y +CONFIG_INTEL_SOC_DTS_THERMAL=y +CONFIG_INTEL_TCC=y +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set +# CONFIG_INTEL_WMI_THUNDERBOLT is not set +CONFIG_INTERVAL_TREE=y +CONFIG_IOSF_MBI=y +# CONFIG_IOSF_MBI_DEBUG is not set +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_ISA=y +CONFIG_ISAPNP=y +CONFIG_ISA_BUS_API=y +# CONFIG_ISCSI_IBFT is not set +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +CONFIG_KCMP=y +CONFIG_KVM=y +CONFIG_KVM_AMD=y +CONFIG_KVM_ASYNC_PF=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_GENERIC_HARDWARE_ENABLING=y +CONFIG_KVM_GUEST=y +CONFIG_KVM_INTEL=y +CONFIG_KVM_MMIO=y +# CONFIG_KVM_PROVE_MMU is not set +CONFIG_KVM_SMM=y +CONFIG_KVM_VFIO=y +CONFIG_KVM_XFER_TO_GUEST_WORK=y +# CONFIG_LANCE is not set +# CONFIG_LENOVO_YMC is not set +# CONFIG_LG_LAPTOP is not set +CONFIG_LIBNVDIMM=y +CONFIG_LOCK_SPIN_ON_OWNER=y +# CONFIG_M686 is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_MEMORY_BALLOON=y +CONFIG_MEMREGION=y +CONFIG_MFD_CORE=y +CONFIG_MFD_INTEL_LPSS=y +CONFIG_MFD_INTEL_LPSS_ACPI=y +# CONFIG_MFD_INTEL_PMC_BXT is not set +# CONFIG_MIXCOMWD is not set +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +CONFIG_MMC_RICOH_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_PCI=y +# CONFIG_MMC_SDHCI_PLTFM is not set +# CONFIG_MMC_WBSD is not set +CONFIG_MMU_NOTIFIER=y +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +# CONFIG_MOUSE_PS2_BYD is not set +# CONFIG_MOUSE_PS2_CYPRESS is not set +# CONFIG_MOUSE_PS2_ELANTECH is not set +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SMBUS=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_VMMOUSE is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_VSXXXAA is not set +CONFIG_MPENTIUM4=y +# CONFIG_MSI_EC is not set +# CONFIG_MSI_WMI is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y +# CONFIG_MXM_WMI is not set +CONFIG_ND_CLAIM=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_EGRESS=y +CONFIG_NET_FAILOVER=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_XGRESS=y +CONFIG_NO_HZ=y +CONFIG_NR_CPUS=4 +CONFIG_NR_CPUS_DEFAULT=8 +CONFIG_NR_CPUS_RANGE_BEGIN=2 +CONFIG_NR_CPUS_RANGE_END=8 +# CONFIG_NVIDIA_WMI_EC_BACKLIGHT is not set +CONFIG_PADATA=y +CONFIG_PAGE_REPORTING=y +CONFIG_PAGE_TABLE_ISOLATION=y +CONFIG_PARAVIRT=y +CONFIG_PARAVIRT_CLOCK=y +# CONFIG_PARAVIRT_DEBUG is not set +CONFIG_PARAVIRT_SPINLOCKS=y +CONFIG_PATA_AMD=y +CONFIG_PATA_ATIIXP=y +CONFIG_PATA_MPIIX=y +CONFIG_PATA_OLDPIIX=y +CONFIG_PATA_SC1200=y +CONFIG_PATA_TIMINGS=y +CONFIG_PATA_VIA=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_PME=y +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_XEN=y +# CONFIG_PCWATCHDOG is not set +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ALDERLAKE=y +CONFIG_PINCTRL_BAYTRAIL=y +CONFIG_PINCTRL_BROXTON=y +CONFIG_PINCTRL_CANNONLAKE=y +CONFIG_PINCTRL_CHERRYVIEW=y +CONFIG_PINCTRL_DENVERTON=y +CONFIG_PINCTRL_ELKHARTLAKE=y +CONFIG_PINCTRL_EMMITSBURG=y +CONFIG_PINCTRL_GEMINILAKE=y +CONFIG_PINCTRL_INTEL=y +CONFIG_PINCTRL_JASPERLAKE=y +CONFIG_PINCTRL_LAKEFIELD=y +CONFIG_PINCTRL_LEWISBURG=y +CONFIG_PINCTRL_LYNXPOINT=y +CONFIG_PINCTRL_METEORLAKE=y +CONFIG_PINCTRL_SUNRISEPOINT=y +CONFIG_PINCTRL_TIGERLAKE=y +CONFIG_PM=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_PM_CLK=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PNP=y +CONFIG_PNPACPI=y +# CONFIG_PNPBIOS is not set +CONFIG_PNP_DEBUG_MESSAGES=y +CONFIG_PPS=y +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_PROC_EVENTS=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_KVM=y +CONFIG_PTP_1588_CLOCK_VMW=y +CONFIG_PVH=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RAS=y +CONFIG_RELAY=y +CONFIG_RELOCATABLE=y +CONFIG_RESET_ATTACK_MITIGATION=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +# CONFIG_SAMSUNG_Q10 is not set +CONFIG_SATA_AHCI=y +CONFIG_SATA_VIA=y +# CONFIG_SCHED_CORE is not set +CONFIG_SCHED_INFO=y +CONFIG_SCHED_SMT=y +# CONFIG_SCSI_FDOMAIN_ISA is not set +CONFIG_SCSI_VIRTIO=y +# CONFIG_SEL3350_PLATFORM is not set +# CONFIG_SENSORS_ASUS_EC is not set +# CONFIG_SENSORS_ASUS_WMI is not set +CONFIG_SENSORS_CORETEMP=y +CONFIG_SENSORS_FAM15H_POWER=y +# CONFIG_SENSORS_HP_WMI is not set +CONFIG_SENSORS_I5500=y +CONFIG_SENSORS_K10TEMP=y +CONFIG_SENSORS_K8TEMP=y +# CONFIG_SENSORS_OXP is not set +CONFIG_SENSORS_VIA_CPUTEMP=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_MULTI_INSTANTIATE is not set +CONFIG_SMP=y +# CONFIG_SND_HDA_CTL_DEV_ID is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_SPI is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_SPI is not set +# CONFIG_SND_HDA_SCODEC_TAS2781_I2C is not set +# CONFIG_SND_SOC_AMD_ACP6x is not set +# CONFIG_SND_SOC_AMD_ACP_COMMON is not set +# CONFIG_SND_SOC_AMD_PS is not set +# CONFIG_SND_SOC_AMD_RPL_ACP6x is not set +# CONFIG_SND_SOC_INTEL_AVS is not set +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SWIOTLB=y +CONFIG_SYNC_FILE=y +CONFIG_SYSFB=y +# CONFIG_SYSTEM76_ACPI is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_THERMAL_ACPI=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THINKPAD_LMI is not set +# CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_TOSHIBA_WMI is not set +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +# CONFIG_UCLAMP_TASK is not set +CONFIG_UCS2_STRING=y +CONFIG_USB_STORAGE=y +CONFIG_USER_RETURN_NOTIFIER=y +CONFIG_VHOST=y +CONFIG_VHOST_IOTLB=y +CONFIG_VHOST_NET=y +CONFIG_VHOST_TASK=y +CONFIG_VIDEO_CMDLINE=y +# CONFIG_VIDEO_IPU3_CIO2 is not set +CONFIG_VIDEO_NOMODESET=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_ANCHOR=y +CONFIG_VIRTIO_BALLOON=y +CONFIG_VIRTIO_BLK=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_VIRTIO_DMA_SHARED_BUFFER=y +CONFIG_VIRTIO_INPUT=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_PCI_LIB_LEGACY=y +# CONFIG_VIRTIO_PMEM is not set +CONFIG_VIRTUALIZATION=y +CONFIG_VMAP_PFN=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WDT is not set +# CONFIG_WIRELESS_HOTKEY is not set +# CONFIG_WMI_BMOF is not set +CONFIG_X86_32_SMP=y +CONFIG_X86_ACPI_CPUFREQ=y +# CONFIG_X86_ACPI_CPUFREQ_CPB is not set +CONFIG_X86_AMD_FREQ_SENSITIVITY=y +CONFIG_X86_AMD_PLATFORM_DEVICE=y +CONFIG_X86_AMD_PSTATE=y +CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 +# CONFIG_X86_AMD_PSTATE_UT is not set +# CONFIG_X86_BIGSMP is not set +CONFIG_X86_CPUID=y +# CONFIG_X86_E_POWERSAVER is not set +CONFIG_X86_HV_CALLBACK_VECTOR=y +CONFIG_X86_INTEL_LPSS=y +CONFIG_X86_INTEL_PSTATE=y +CONFIG_X86_INTERNODE_CACHE_SHIFT=7 +CONFIG_X86_L1_CACHE_SHIFT=7 +# CONFIG_X86_LONGHAUL is not set +CONFIG_X86_NEED_RELOCS=y +CONFIG_X86_PAE=y +# CONFIG_X86_PCC_CPUFREQ is not set +CONFIG_X86_PKG_TEMP_THERMAL=y +# CONFIG_X86_PMEM_LEGACY is not set +CONFIG_X86_PM_TIMER=y +# CONFIG_X86_POWERNOW_K8 is not set +CONFIG_XEN=y +CONFIG_XENFS=y +CONFIG_XEN_ACPI=y +CONFIG_XEN_AUTO_XLATE=y +# CONFIG_XEN_BACKEND is not set +CONFIG_XEN_BALLOON=y +CONFIG_XEN_BLKDEV_FRONTEND=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_DEBUG_FS=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_FBDEV_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +CONFIG_XEN_GRANT_DMA_OPS=y +CONFIG_XEN_NETDEV_FRONTEND=y +CONFIG_XEN_PRIVCMD=y +# CONFIG_XEN_PRIVCMD_IRQFD is not set +CONFIG_XEN_PVH=y +CONFIG_XEN_PVHVM=y +CONFIG_XEN_PVHVM_GUEST=y +CONFIG_XEN_PVHVM_SMP=y +CONFIG_XEN_SAVE_RESTORE=y +CONFIG_XEN_SCSI_FRONTEND=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_VIRTIO=y +# CONFIG_XEN_VIRTIO_FORCE_GRANT is not set +CONFIG_XEN_WDT=y +CONFIG_XEN_XENBUS_FRONTEND=y +# CONFIG_XIAOMI_WMI is not set +CONFIG_XPS=y +# CONFIG_YOGABOOK is not set +CONFIG_ZLIB_DEFLATE=y diff --git a/target/linux/x86/geode/config-6.6 b/target/linux/x86/geode/config-6.6 new file mode 100644 index 0000000000..1ab188af53 --- /dev/null +++ b/target/linux/x86/geode/config-6.6 @@ -0,0 +1,159 @@ +# CONFIG_3C515 is not set +CONFIG_8139CP=y +CONFIG_8139TOO=y +CONFIG_8139TOO_8129=y +CONFIG_8139TOO_PIO=y +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_ACPI=y +CONFIG_ACPI_AC=y +# CONFIG_ACPI_BATTERY is not set +# CONFIG_ACPI_CMPC is not set +# CONFIG_ACPI_CONTAINER is not set +CONFIG_ACPI_CPU_FREQ_PSS=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_DEBUGGER is not set +# CONFIG_ACPI_DOCK is not set +# CONFIG_ACPI_DPTF is not set +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_FFH is not set +CONFIG_ACPI_HOTPLUG_IOAPIC=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_PROCESSOR_CSTATE=y +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y +# CONFIG_ACPI_SBS is not set +CONFIG_ACPI_SPCR_TABLE=y +CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_TINY_POWER_BUTTON is not set +# CONFIG_ACPI_WMI is not set +# CONFIG_ADV_SWBUTTON is not set +CONFIG_ALIX=y +# CONFIG_AMD_PMF is not set +# CONFIG_ASUS_TF103C_DOCK is not set +CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y +# CONFIG_ATA_PIIX is not set +CONFIG_CS5535_CLOCK_EVENT_SRC=y +CONFIG_CS5535_MFGPT=y +CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 +# CONFIG_CS89x0_ISA is not set +CONFIG_DMA_ACPI=y +# CONFIG_EL3 is not set +CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_FUNCTION_ALIGNMENT_4B=y +CONFIG_FUNCTION_PADDING_BYTES=4 +CONFIG_FUNCTION_PADDING_CFI=0 +CONFIG_GEODE_WDT=y +CONFIG_GEOS=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIO_CS5535=y +# CONFIG_HPET is not set +CONFIG_HWMON=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOPCA=y +CONFIG_I2C_ALGOPCF=y +# CONFIG_I2C_AMD_MP2 is not set +CONFIG_I2C_BOARDINFO=y +# CONFIG_INTEL_IPS is not set +# CONFIG_INTEL_SAR_INT1092 is not set +# CONFIG_INTEL_SCU_PLATFORM is not set +# CONFIG_INTEL_SOC_DTS_THERMAL is not set +CONFIG_IOSF_MBI=y +# CONFIG_IOSF_MBI_DEBUG is not set +CONFIG_ISA=y +# CONFIG_ISAPNP is not set +CONFIG_ISA_BUS_API=y +# CONFIG_ISCSI_IBFT is not set +# CONFIG_LANCE is not set +CONFIG_LEDS_GPIO=y +# CONFIG_M686 is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_MFD_CORE=y +CONFIG_MFD_CS5535=y +# CONFIG_MFD_INTEL_LPSS_ACPI is not set +# CONFIG_MFD_INTEL_PMC_BXT is not set +CONFIG_MGEODEGX1=y +# CONFIG_MIXCOMWD is not set +CONFIG_NATSEMI=y +CONFIG_NET5501=y +CONFIG_NSC_GPIO=y +CONFIG_PATA_CS5520=y +CONFIG_PATA_CS5530=y +CONFIG_PATA_CS5535=y +CONFIG_PATA_CS5536=y +CONFIG_PATA_SC1200=y +CONFIG_PC8736x_GPIO=y +CONFIG_PCI_MMCONFIG=y +# CONFIG_PCWATCHDOG is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_ALDERLAKE is not set +# CONFIG_PINCTRL_BAYTRAIL is not set +# CONFIG_PINCTRL_BROXTON is not set +# CONFIG_PINCTRL_CANNONLAKE is not set +# CONFIG_PINCTRL_CHERRYVIEW is not set +# CONFIG_PINCTRL_DENVERTON is not set +# CONFIG_PINCTRL_ELKHARTLAKE is not set +# CONFIG_PINCTRL_EMMITSBURG is not set +# CONFIG_PINCTRL_GEMINILAKE is not set +# CONFIG_PINCTRL_JASPERLAKE is not set +# CONFIG_PINCTRL_LAKEFIELD is not set +# CONFIG_PINCTRL_LEWISBURG is not set +# CONFIG_PINCTRL_LYNXPOINT is not set +# CONFIG_PINCTRL_METEORLAKE is not set +# CONFIG_PINCTRL_SUNRISEPOINT is not set +# CONFIG_PINCTRL_TIGERLAKE is not set +# CONFIG_PMIC_OPREGION is not set +CONFIG_PNP=y +CONFIG_PNPACPI=y +# CONFIG_PNPBIOS is not set +CONFIG_PNP_DEBUG_MESSAGES=y +CONFIG_RTC_I2C_AND_SPI=y +# CONFIG_SAMSUNG_Q10 is not set +CONFIG_SC1200_WDT=y +# CONFIG_SCSI_FDOMAIN_ISA is not set +CONFIG_SCx200_ACB=y +CONFIG_SCx200_WDT=y +# CONFIG_SENSORS_ASUS_EC is not set +CONFIG_SENSORS_LM90=y +# CONFIG_SENSORS_OXP is not set +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_MULTI_INSTANTIATE is not set +# CONFIG_SND_HDA_CTL_DEV_ID is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_SPI is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_SPI is not set +# CONFIG_SND_HDA_SCODEC_TAS2781_I2C is not set +# CONFIG_SND_SOC_AMD_ACP6x is not set +# CONFIG_SND_SOC_AMD_ACP_COMMON is not set +# CONFIG_SND_SOC_AMD_PS is not set +# CONFIG_SND_SOC_AMD_RPL_ACP6x is not set +# CONFIG_SND_SOC_INTEL_AVS is not set +# CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_USB_UHCI_HCD is not set +CONFIG_VIA_RHINE=y +CONFIG_VIA_RHINE_MMIO=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WDT is not set +# CONFIG_WIRELESS_HOTKEY is not set +# CONFIG_X86_ACPI_CPUFREQ is not set +CONFIG_X86_ALIGNMENT_16=y +# CONFIG_X86_AMD_PLATFORM_DEVICE is not set +# CONFIG_X86_AMD_PSTATE is not set +# CONFIG_X86_AMD_PSTATE_UT is not set +CONFIG_X86_CPUID=y +# CONFIG_X86_E_POWERSAVER is not set +CONFIG_X86_INTEL_LPSS=y +# CONFIG_X86_LONGHAUL is not set +# CONFIG_X86_MCE is not set +CONFIG_X86_MINIMUM_CPU_FAMILY=5 +# CONFIG_X86_PCC_CPUFREQ is not set +CONFIG_X86_PM_TIMER=y +CONFIG_X86_REBOOTFIXUPS=y diff --git a/target/linux/x86/legacy/config-5.15 b/target/linux/x86/legacy/config-6.6 similarity index 74% rename from target/linux/x86/legacy/config-5.15 rename to target/linux/x86/legacy/config-6.6 index 8e17703cbc..402ad89472 100644 --- a/target/linux/x86/legacy/config-5.15 +++ b/target/linux/x86/legacy/config-6.6 @@ -1,4 +1,5 @@ # CONFIG_3C515 is not set +# CONFIG_ACER_WMI is not set CONFIG_ACPI=y CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y @@ -12,6 +13,7 @@ CONFIG_ACPI_CPU_FREQ_PSS=y # CONFIG_ACPI_DPTF is not set # CONFIG_ACPI_EC_DEBUGFS is not set # CONFIG_ACPI_FAN is not set +# CONFIG_ACPI_FFH is not set CONFIG_ACPI_HOTPLUG_IOAPIC=y # CONFIG_ACPI_I2C_OPREGION is not set CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y @@ -25,6 +27,7 @@ CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y CONFIG_ACPI_SPCR_TABLE=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_TOSHIBA is not set CONFIG_ACPI_VIDEO=y # CONFIG_ACPI_WMI is not set # CONFIG_ADV_SWBUTTON is not set @@ -39,13 +42,15 @@ CONFIG_AGP_INTEL=y # CONFIG_AGP_SIS is not set # CONFIG_AGP_SWORKS is not set # CONFIG_AGP_VIA is not set -# CONFIG_AMD_PMC is not set +# CONFIG_AMD_PMF is not set +CONFIG_APERTURE_HELPERS=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y +CONFIG_AUXILIARY_BUS=y +# CONFIG_ASUS_TF103C_DOCK is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BLK_DEV_SR=y CONFIG_CDROM=y CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y # CONFIG_CS89x0_ISA is not set CONFIG_DMA_ACPI=y CONFIG_DMA_SHARED_BUFFER=y @@ -54,6 +59,12 @@ CONFIG_DRM_AMDGPU=y # CONFIG_DRM_AMD_DC is not set CONFIG_DRM_BOCHS=y CONFIG_DRM_BRIDGE=y +CONFIG_DRM_BUDDY=y +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_EXEC=y CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 CONFIG_DRM_I915=y @@ -70,6 +81,7 @@ CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 # CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 +CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 # CONFIG_DRM_I915_SELFTEST is not set CONFIG_DRM_I915_STOP_TIMEOUT=100 @@ -86,6 +98,7 @@ CONFIG_DRM_PANEL_BRIDGE=y CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_DRM_RADEON=y CONFIG_DRM_SCHED=y +CONFIG_DRM_SUBALLOC_HELPER=y CONFIG_DRM_TTM=y CONFIG_DRM_TTM_HELPER=y CONFIG_DRM_VRAM_HELPER=y @@ -94,34 +107,39 @@ CONFIG_FB=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y +CONFIG_FB_CORE=y CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_I810 is not set +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_FOPS=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_VESA is not set -CONFIG_FONT_8x16=y CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y CONFIG_FONT_SUPPORT=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_FUNCTION_ALIGNMENT_4B=y +CONFIG_FUNCTION_PADDING_BYTES=4 +CONFIG_FUNCTION_PADDING_CFI=0 +# CONFIG_GIGABYTE_WMI is not set +CONFIG_GPIO_ACPI=y CONFIG_HDMI=y -CONFIG_HID_BATTERY_STRENGTH=y # CONFIG_HIGHMEM4G is not set CONFIG_HPET=y CONFIG_HPET_MMAP=y -# CONFIG_HP_ACCEL is not set +# CONFIG_HUAWEI_WMI is not set CONFIG_HWMON=y CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_AMD_MP2 is not set CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_HID_ACPI is not set -# CONFIG_I2C_MULTI_INSTANTIATE is not set -# CONFIG_I8K is not set CONFIG_INPUT_MOUSE=y CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_PSAUX=y @@ -130,11 +148,14 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INTEL_GTT=y CONFIG_INTEL_IDLE=y # CONFIG_INTEL_IPS is not set +# CONFIG_INTEL_MEI_GSC_PROXY is not set # CONFIG_INTEL_MEI_HDCP is not set -# CONFIG_INTEL_MENLOW is not set +# CONFIG_INTEL_MEI_PXP is not set # CONFIG_INTEL_SAR_INT1092 is not set # CONFIG_INTEL_SCU_PLATFORM is not set # CONFIG_INTEL_SOC_DTS_THERMAL is not set +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set +# CONFIG_INTEL_WMI_THUNDERBOLT is not set CONFIG_INTERVAL_TREE=y CONFIG_IOSF_MBI=y # CONFIG_IOSF_MBI_DEBUG is not set @@ -146,6 +167,8 @@ CONFIG_ISO9660_FS=y # CONFIG_JOLIET is not set CONFIG_KCMP=y # CONFIG_LANCE is not set +# CONFIG_LENOVO_YMC is not set +# CONFIG_LG_LAPTOP is not set CONFIG_M586MMX=y # CONFIG_M686 is not set # CONFIG_MDA_CONSOLE is not set @@ -171,14 +194,17 @@ CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y CONFIG_MOUSE_PS2_TRACKPOINT=y # CONFIG_MOUSE_SERIAL is not set # CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MSI_EC is not set +# CONFIG_MSI_WMI is not set +# CONFIG_MXM_WMI is not set CONFIG_NOHIGHMEM=y CONFIG_NO_HZ=y +# CONFIG_NVIDIA_WMI_EC_BACKLIGHT is not set CONFIG_PATA_AMD=y CONFIG_PATA_ATIIXP=y CONFIG_PATA_LEGACY=y CONFIG_PATA_MPIIX=y CONFIG_PATA_OLDPIIX=y -CONFIG_PATA_PLATFORM=y CONFIG_PATA_SC1200=y CONFIG_PATA_SIS=y CONFIG_PATA_TIMINGS=y @@ -203,20 +229,43 @@ CONFIG_RTC_I2C_AND_SPI=y # CONFIG_SAMSUNG_Q10 is not set CONFIG_SATA_AHCI=y # CONFIG_SCSI_FDOMAIN_ISA is not set +# CONFIG_SENSORS_ASUS_EC is not set +# CONFIG_SENSORS_ASUS_WMI is not set +# CONFIG_SENSORS_HP_WMI is not set +# CONFIG_SENSORS_OXP is not set CONFIG_SERIAL_8250_PNP=y -# CONFIG_SURFACE_PLATFORMS is not set +# CONFIG_SERIAL_MULTI_INSTANTIATE is not set +# CONFIG_SND_HDA_CTL_DEV_ID is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_SPI is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_SPI is not set +# CONFIG_SND_HDA_SCODEC_TAS2781_I2C is not set +# CONFIG_SND_SOC_AMD_ACP6x is not set +# CONFIG_SND_SOC_AMD_ACP_COMMON is not set +# CONFIG_SND_SOC_AMD_PS is not set +# CONFIG_SND_SOC_AMD_RPL_ACP6x is not set +# CONFIG_SND_SOC_INTEL_AVS is not set CONFIG_SYNC_FILE=y # CONFIG_SYSTEM76_ACPI is not set +# CONFIG_THINKPAD_LMI is not set # CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_TOSHIBA_WMI is not set CONFIG_USB_STORAGE=y +CONFIG_VIDEO_CMDLINE=y +# CONFIG_VIDEO_IPU3_CIO2 is not set +CONFIG_VIDEO_NOMODESET=y CONFIG_VMAP_PFN=y # CONFIG_WDT is not set # CONFIG_WIRELESS_HOTKEY is not set +# CONFIG_WMI_BMOF is not set CONFIG_X86_ACPI_CPUFREQ=y # CONFIG_X86_ACPI_CPUFREQ_CPB is not set CONFIG_X86_ALIGNMENT_16=y # CONFIG_X86_AMD_FREQ_SENSITIVITY is not set # CONFIG_X86_AMD_PLATFORM_DEVICE is not set +# CONFIG_X86_AMD_PSTATE is not set +# CONFIG_X86_AMD_PSTATE_UT is not set # CONFIG_X86_E_POWERSAVER is not set CONFIG_X86_F00F_BUG=y # CONFIG_X86_INTEL_LPSS is not set @@ -226,4 +275,6 @@ CONFIG_X86_MINIMUM_CPU_FAMILY=5 # CONFIG_X86_PCC_CPUFREQ is not set CONFIG_X86_PM_TIMER=y # CONFIG_X86_POWERNOW_K8 is not set +# CONFIG_XIAOMI_WMI is not set +# CONFIG_YOGABOOK is not set CONFIG_ZLIB_DEFLATE=y diff --git a/target/linux/x86/patches-6.6/100-fix_cs5535_clockevt.patch b/target/linux/x86/patches-6.6/100-fix_cs5535_clockevt.patch new file mode 100644 index 0000000000..d4de2027ba --- /dev/null +++ b/target/linux/x86/patches-6.6/100-fix_cs5535_clockevt.patch @@ -0,0 +1,13 @@ +--- a/drivers/clocksource/timer-cs5535.c ++++ b/drivers/clocksource/timer-cs5535.c +@@ -127,7 +127,9 @@ static irqreturn_t mfgpt_tick(int irq, v + cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, + MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2); + +- cs5535_clockevent.event_handler(&cs5535_clockevent); ++ if (cs5535_clockevent.event_handler) ++ cs5535_clockevent.event_handler(&cs5535_clockevent); ++ + return IRQ_HANDLED; + } + diff --git a/target/linux/x86/patches-6.6/103-pcengines_apu6_platform.patch b/target/linux/x86/patches-6.6/103-pcengines_apu6_platform.patch new file mode 100644 index 0000000000..1fd6fc89c8 --- /dev/null +++ b/target/linux/x86/patches-6.6/103-pcengines_apu6_platform.patch @@ -0,0 +1,275 @@ +From 970d9af9015a387bb81841faf05dcc1a171eb97a Mon Sep 17 00:00:00 2001 +From: Philip Prindeville +Date: Sun, 1 Jan 2023 15:25:04 -0700 +Subject: [PATCH v3 1/1] x86: Support APU5 in PCEngines platform driver +To: platform-driver-x86@vger.kernel.org, linux-x86_64@vger.kernel.org +Cc: Ed Wildgoose , Andres Salomon , Andreas Eberlein , Paul Spooren + +PCEngines make a number of SBC. APU5 has 5 mpcie slots + MSATA. +It also has support for 3x LTE modems with 6x SIM slots (pairs with a +SIM switch device). Each mpcie slot for modems has a reset GPIO + +To ensure that the naming is sane between APU2-6 the GPIOS are +renamed to be modem1-reset, modem2-reset, etc. This is significant +because the slots that can be reset change between APU2 and APU3/4 + +GPIO for simswap is moved to the end of the list as it could be dropped +for APU2 boards (but causes no harm to leave it in, hardware could be +added to a future rev of the board). + +Structure of the GPIOs for APU5 is extremely similar to APU2-4, but +many lines are moved around and there are simply more +modems/resets/sim-swap lines to breakout. + +Also added APU6, which is essentially APU4 with a different ethernet +interface and SFP cage on eth0. + +Revision history: + +v1: originally titled, "apu6: add apu6 variation to apu2 driver family" +this dealt only with detecting the APUv6, which is otherwise identical +to the v4 excepting the SFP cage on eth0. + +v2: at Ed's request, merged with his previous pull-request titled +"x86: Support APU5 in PCEngines platform driver", and some cleanup +to that changeset (including dropping the table "apu5_driver_data" +which did not have a defined type "struct apu_driver_data"), but got +mistitled when the Subject of that commit got accidentally dropped. + +v3: retitled to match Ed's previous pull-request. + +Cc: platform-driver-x86@vger.kernel.org +Cc: linux-x86_64@vger.kernel.org +Reviewed-by: Andreas Eberlein +Reviewed-by: Paul Spooren +Signed-off-by: Ed Wildgoose +Sighed-off-by: Philip Prindeville +--- + drivers/leds/leds-apu.c | 2 +- + drivers/platform/x86/Kconfig | 4 +- + drivers/platform/x86/pcengines-apuv2.c | 118 ++++++++++++++++++++++--- + 3 files changed, 107 insertions(+), 17 deletions(-) + +--- a/drivers/leds/leds-apu.c ++++ b/drivers/leds/leds-apu.c +@@ -183,7 +183,7 @@ static int __init apu_led_init(void) + + if (!(dmi_match(DMI_SYS_VENDOR, "PC Engines") && + (dmi_match(DMI_PRODUCT_NAME, "APU") || dmi_match(DMI_PRODUCT_NAME, "apu1")))) { +- pr_err("No PC Engines APUv1 board detected. For APUv2,3 support, enable CONFIG_PCENGINES_APU2\n"); ++ pr_err("No PC Engines APUv1 board detected. For APUv2,3,4,5,6 support, enable CONFIG_PCENGINES_APU2\n"); + return -ENODEV; + } + +--- a/drivers/platform/x86/Kconfig ++++ b/drivers/platform/x86/Kconfig +@@ -707,7 +707,7 @@ config XO1_RFKILL + laptop. + + config PCENGINES_APU2 +- tristate "PC Engines APUv2/3 front button and LEDs driver" ++ tristate "PC Engines APUv2/3/4/5/6 front button and LEDs driver" + depends on INPUT && INPUT_KEYBOARD && GPIOLIB + depends on LEDS_CLASS + select GPIO_AMD_FCH +@@ -715,7 +715,7 @@ config PCENGINES_APU2 + select LEDS_GPIO + help + This driver provides support for the front button and LEDs on +- PC Engines APUv2/APUv3 board. ++ PC Engines APUv2/APUv3/APUv4/APUv5/APUv6 board. + + To compile this driver as a module, choose M here: the module + will be called pcengines-apuv2. +--- a/drivers/platform/x86/pcengines-apuv2.c ++++ b/drivers/platform/x86/pcengines-apuv2.c +@@ -1,10 +1,12 @@ + // SPDX-License-Identifier: GPL-2.0+ + + /* +- * PC-Engines APUv2/APUv3 board platform driver ++ * PC-Engines APUv2-6 board platform driver + * for GPIO buttons and LEDs + * + * Copyright (C) 2018 metux IT consult ++ * Copyright (C) 2022 Ed Wildgoose ++ * Copyright (C) 2022 Philip Prindeville + * Author: Enrico Weigelt + */ + +@@ -22,38 +24,70 @@ + #include + + /* +- * NOTE: this driver only supports APUv2/3 - not APUv1, as this one ++ * NOTE: this driver only supports APUv2-6 - not APUv1, as this one + * has completely different register layouts. + */ + ++/* ++ * There are a number of APU variants, with differing features ++ * APU2 has SIM slots 1/2 mapping to mPCIe sockets 1/2 ++ * APU3/4 moved SIM slot 1 to mPCIe socket 3, ie logically reversed ++ * However, most APU3/4 have a SIM switch which we default on to reverse ++ * the order and keep physical SIM order matching physical modem order ++ * APU6 is approximately the same as APU4 with different ethernet layout ++ * ++ * APU5 has 3x SIM sockets, all with a SIM switch ++ * several GPIOs are shuffled (see schematic), including MODESW ++ */ ++ + /* Register mappings */ + #define APU2_GPIO_REG_LED1 AMD_FCH_GPIO_REG_GPIO57 + #define APU2_GPIO_REG_LED2 AMD_FCH_GPIO_REG_GPIO58 + #define APU2_GPIO_REG_LED3 AMD_FCH_GPIO_REG_GPIO59_DEVSLP1 + #define APU2_GPIO_REG_MODESW AMD_FCH_GPIO_REG_GPIO32_GE1 + #define APU2_GPIO_REG_SIMSWAP AMD_FCH_GPIO_REG_GPIO33_GE2 +-#define APU2_GPIO_REG_MPCIE2 AMD_FCH_GPIO_REG_GPIO55_DEVSLP0 +-#define APU2_GPIO_REG_MPCIE3 AMD_FCH_GPIO_REG_GPIO51 ++#define APU2_GPIO_REG_RESETM1 AMD_FCH_GPIO_REG_GPIO51 ++#define APU2_GPIO_REG_RESETM2 AMD_FCH_GPIO_REG_GPIO55_DEVSLP0 ++ ++#define APU5_GPIO_REG_MODESW AMT_FCH_GPIO_REG_GEVT22 ++#define APU5_GPIO_REG_SIMSWAP1 AMD_FCH_GPIO_REG_GPIO68 ++#define APU5_GPIO_REG_SIMSWAP2 AMD_FCH_GPIO_REG_GPIO32_GE1 ++#define APU5_GPIO_REG_SIMSWAP3 AMD_FCH_GPIO_REG_GPIO33_GE2 ++#define APU5_GPIO_REG_RESETM1 AMD_FCH_GPIO_REG_GPIO51 ++#define APU5_GPIO_REG_RESETM2 AMD_FCH_GPIO_REG_GPIO55_DEVSLP0 ++#define APU5_GPIO_REG_RESETM3 AMD_FCH_GPIO_REG_GPIO64 + + /* Order in which the GPIO lines are defined in the register list */ + #define APU2_GPIO_LINE_LED1 0 + #define APU2_GPIO_LINE_LED2 1 + #define APU2_GPIO_LINE_LED3 2 + #define APU2_GPIO_LINE_MODESW 3 +-#define APU2_GPIO_LINE_SIMSWAP 4 +-#define APU2_GPIO_LINE_MPCIE2 5 +-#define APU2_GPIO_LINE_MPCIE3 6 ++#define APU2_GPIO_LINE_RESETM1 4 ++#define APU2_GPIO_LINE_RESETM2 5 ++#define APU2_GPIO_LINE_SIMSWAP 6 ++ ++#define APU5_GPIO_LINE_LED1 0 ++#define APU5_GPIO_LINE_LED2 1 ++#define APU5_GPIO_LINE_LED3 2 ++#define APU5_GPIO_LINE_MODESW 3 ++#define APU5_GPIO_LINE_RESETM1 4 ++#define APU5_GPIO_LINE_RESETM2 5 ++#define APU5_GPIO_LINE_RESETM3 6 ++#define APU5_GPIO_LINE_SIMSWAP1 7 ++#define APU5_GPIO_LINE_SIMSWAP2 8 ++#define APU5_GPIO_LINE_SIMSWAP3 9 ++ + +-/* GPIO device */ ++/* GPIO device - APU2/3/4/6 */ + + static int apu2_gpio_regs[] = { + [APU2_GPIO_LINE_LED1] = APU2_GPIO_REG_LED1, + [APU2_GPIO_LINE_LED2] = APU2_GPIO_REG_LED2, + [APU2_GPIO_LINE_LED3] = APU2_GPIO_REG_LED3, + [APU2_GPIO_LINE_MODESW] = APU2_GPIO_REG_MODESW, ++ [APU2_GPIO_LINE_RESETM1] = APU2_GPIO_REG_RESETM1, ++ [APU2_GPIO_LINE_RESETM2] = APU2_GPIO_REG_RESETM2, + [APU2_GPIO_LINE_SIMSWAP] = APU2_GPIO_REG_SIMSWAP, +- [APU2_GPIO_LINE_MPCIE2] = APU2_GPIO_REG_MPCIE2, +- [APU2_GPIO_LINE_MPCIE3] = APU2_GPIO_REG_MPCIE3, + }; + + static const char * const apu2_gpio_names[] = { +@@ -61,9 +95,9 @@ static const char * const apu2_gpio_name + [APU2_GPIO_LINE_LED2] = "front-led2", + [APU2_GPIO_LINE_LED3] = "front-led3", + [APU2_GPIO_LINE_MODESW] = "front-button", ++ [APU2_GPIO_LINE_RESETM1] = "modem1-reset", ++ [APU2_GPIO_LINE_RESETM2] = "modem2-reset", + [APU2_GPIO_LINE_SIMSWAP] = "simswap", +- [APU2_GPIO_LINE_MPCIE2] = "mpcie2_reset", +- [APU2_GPIO_LINE_MPCIE3] = "mpcie3_reset", + }; + + static const struct amd_fch_gpio_pdata board_apu2 = { +@@ -72,6 +106,40 @@ static const struct amd_fch_gpio_pdata b + .gpio_names = apu2_gpio_names, + }; + ++/* GPIO device - APU5 */ ++ ++static int apu5_gpio_regs[] = { ++ [APU5_GPIO_LINE_LED1] = APU2_GPIO_REG_LED1, ++ [APU5_GPIO_LINE_LED2] = APU2_GPIO_REG_LED2, ++ [APU5_GPIO_LINE_LED3] = APU2_GPIO_REG_LED3, ++ [APU5_GPIO_LINE_MODESW] = APU5_GPIO_REG_MODESW, ++ [APU5_GPIO_LINE_RESETM1] = APU5_GPIO_REG_RESETM1, ++ [APU5_GPIO_LINE_RESETM2] = APU5_GPIO_REG_RESETM2, ++ [APU5_GPIO_LINE_RESETM3] = APU5_GPIO_REG_RESETM3, ++ [APU5_GPIO_LINE_SIMSWAP1] = APU5_GPIO_REG_SIMSWAP1, ++ [APU5_GPIO_LINE_SIMSWAP2] = APU5_GPIO_REG_SIMSWAP2, ++ [APU5_GPIO_LINE_SIMSWAP3] = APU5_GPIO_REG_SIMSWAP3, ++}; ++ ++static const char * const apu5_gpio_names[] = { ++ [APU5_GPIO_LINE_LED1] = "front-led1", ++ [APU5_GPIO_LINE_LED2] = "front-led2", ++ [APU5_GPIO_LINE_LED3] = "front-led3", ++ [APU5_GPIO_LINE_MODESW] = "front-button", ++ [APU5_GPIO_LINE_RESETM1] = "modem1-reset", ++ [APU5_GPIO_LINE_RESETM2] = "modem2-reset", ++ [APU5_GPIO_LINE_RESETM3] = "modem3-reset", ++ [APU5_GPIO_LINE_SIMSWAP1] = "simswap1", ++ [APU5_GPIO_LINE_SIMSWAP2] = "simswap2", ++ [APU5_GPIO_LINE_SIMSWAP3] = "simswap3", ++}; ++ ++static const struct amd_fch_gpio_pdata board_apu5 = { ++ .gpio_num = ARRAY_SIZE(apu5_gpio_regs), ++ .gpio_reg = apu5_gpio_regs, ++ .gpio_names = apu5_gpio_names, ++}; ++ + /* GPIO LEDs device */ + + static const struct gpio_led apu2_leds[] = { +@@ -215,6 +283,24 @@ static const struct dmi_system_id apu_gp + }, + .driver_data = (void *)&board_apu2, + }, ++ /* APU5 w/ mainline BIOS */ ++ { ++ .ident = "apu5", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"), ++ DMI_MATCH(DMI_BOARD_NAME, "apu5") ++ }, ++ .driver_data = (void *)&board_apu5, ++ }, ++ /* APU6 w/ mainline BIOS */ ++ { ++ .ident = "apu6", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"), ++ DMI_MATCH(DMI_BOARD_NAME, "apu6") ++ }, ++ .driver_data = (void *)&board_apu2, ++ }, + {} + }; + +@@ -249,7 +335,7 @@ static int __init apu_board_init(void) + + id = dmi_first_match(apu_gpio_dmi_table); + if (!id) { +- pr_err("failed to detect APU board via DMI\n"); ++ pr_err("No APU board detected via DMI\n"); + return -ENODEV; + } + +@@ -288,7 +374,7 @@ module_init(apu_board_init); + module_exit(apu_board_exit); + + MODULE_AUTHOR("Enrico Weigelt, metux IT consult "); +-MODULE_DESCRIPTION("PC Engines APUv2/APUv3 board GPIO/LEDs/keys driver"); ++MODULE_DESCRIPTION("PC Engines APUv2-6 board GPIO/LEDs/keys driver"); + MODULE_LICENSE("GPL"); + MODULE_DEVICE_TABLE(dmi, apu_gpio_dmi_table); + MODULE_SOFTDEP("pre: platform:" AMD_FCH_GPIO_DRIVER_NAME " platform:leds-gpio platform:gpio_keys_polled"); diff --git a/tools/bzip2/Makefile b/tools/bzip2/Makefile index 0c5a92849a..86df143826 100644 --- a/tools/bzip2/Makefile +++ b/tools/bzip2/Makefile @@ -22,31 +22,11 @@ PKG_CPE_ID:=cpe:/a:bzip:bzip2 HOST_BUILD_PARALLEL:=1 include $(INCLUDE_DIR)/host-build.mk +include $(INCLUDE_DIR)/cmake.mk HOSTCC := $(HOSTCC_NOCACHE) HOST_CFLAGS += $(HOST_FPIC) -HOST_MAKE_FLAGS+= \ - CFLAGS="$(HOST_CFLAGS)" \ - LDFLAGS="$(HOST_LDFLAGS)" \ - ENABLE_BIN_SHARED=1 \ - ENABLE_BIN_STATIC=0 \ - ENABLE_LIB_SHARED=1 \ - ENABLE_LIB_STATIC=1 \ - ENABLE_DEV=1 \ - ENABLE_DOCS=1 \ - ENABLE_TESTS=0 \ - PREFIX="$(HOST_BUILD_PREFIX)" - -define Host/Configure -endef - -define Host/Uninstall - $(call Host/Compile/Default,uninstall) - $(call Host/Compile/Default,clean) -endef - -define Host/Clean -endef +CMAKE_HOST_OPTIONS += -DENABLE_EXAMPLES=off $(eval $(call HostBuild)) diff --git a/tools/bzip2/patches/021-merge-and-improve-makefiles.patch b/tools/bzip2/patches/021-merge-and-improve-makefiles.patch deleted file mode 100644 index 9d98c34bdb..0000000000 --- a/tools/bzip2/patches/021-merge-and-improve-makefiles.patch +++ /dev/null @@ -1,401 +0,0 @@ ---- a/bzip2.c -+++ b/bzip2.c -@@ -54,7 +54,7 @@ - #include - #include - #include --#include "bzlib.h" -+#include - - #define ERROR_IF_EOF(i) { if ((i) == EOF) ioError(); } - #define ERROR_IF_NOT_ZERO(i) { if ((i) != 0) ioError(); } ---- a/bzlib_private.h -+++ b/bzlib_private.h -@@ -30,7 +30,7 @@ - #include - #endif - --#include "bzlib.h" -+#include - - - ---- a/Makefile -+++ b/Makefile -@@ -21,11 +21,38 @@ - LDFLAGS= - - BIGFILES=-D_FILE_OFFSET_BITS=64 --CFLAGS=-Wall -Winline -O2 -g $(BIGFILES) -+CFLAGS_COMMON=-Wall -Winline -O2 -g $(BIGFILES) -I. -+CFLAGS_NOPIC=$(filter-out -O%,$(CFLAGS)) $(CFLAGS_COMMON) -+CFLAGS_PIC=$(filter-out -O%,$(CFLAGS)) -fpic -fPIC $(CFLAGS_COMMON) - - # Where you want it installed when you do 'make install' --PREFIX=/usr/local -- -+PREFIX?=/usr/local -+ENABLE_BIN_STATIC?=1 -+ENABLE_BIN_SHARED?=1 -+ENABLE_LIB_STATIC?=1 -+ENABLE_LIB_SHARED?=1 -+ENABLE_DEV?=1 -+ENABLE_DOCS?=1 -+ENABLE_TESTS?=1 -+ -+ifeq ($(ENABLE_BIN_STATIC),1) -+ ENABLE_BIN=1 -+ ifneq ($(ENABLE_LIB_STATIC),1) -+ ENABLE_LIB_STATIC=1 -+ endif -+endif -+ifeq ($(ENABLE_BIN_SHARED),1) -+ ENABLE_BIN=1 -+ ifneq ($(ENABLE_LIB_SHARED),1) -+ ENABLE_LIB_STATIC=1 -+ endif -+endif -+ifeq ($(ENABLE_LIB_STATIC),1) -+ ENABLE_LIB=1 -+endif -+ifeq ($(ENABLE_LIB_SHARED),1) -+ ENABLE_LIB=1 -+endif - - OBJS= blocksort.o \ - huffman.o \ -@@ -35,15 +62,38 @@ - decompress.o \ - bzlib.o - --all: libbz2.a bzip2 bzip2recover test -- --bzip2: libbz2.a bzip2.o -- $(CC) $(CFLAGS) $(LDFLAGS) -o bzip2 bzip2.o -L. -lbz2 -+TGTS_all:= -+TGTS_bzip2:=bzip2.o -+TGTS_check:= -+TGTS_install:= -+ifeq ($(ENABLE_LIB),1) -+ TGTS_all+=libbz2 -+ TGTS_bzip2+=libbz2 -+endif -+ifeq ($(ENABLE_BIN),1) -+ TGTS_all+=bzip2 bzip2recover -+ TGTS_install+=bzip2 bzip2recover -+endif -+ifeq ($(ENABLE_TESTS),1) -+ TGTS_all+=test -+ TGTS_check+=test -+endif -+ -+all: $(TGTS_all) -+ -+bzip2: $(TGTS_bzip2) -+ifeq ($(ENABLE_BIN_STATIC),1) -+ $(CC) $(CFLAGS_NOPIC) $(LDFLAGS) -o bzip2 bzip2.o -L. -lbz2 -+endif -+ifeq ($(ENABLE_BIN_SHARED),1) -+ $(CC) $(CFLAGS_PIC) -o bzip2-shared bzip2.o libbz2.so.1.0 -+endif - - bzip2recover: bzip2recover.o -- $(CC) $(CFLAGS) $(LDFLAGS) -o bzip2recover bzip2recover.o -+ $(CC) $(CFLAGS_NOPIC) $(LDFLAGS) -o bzip2recover bzip2recover.o - --libbz2.a: $(OBJS) -+libbz2: $(OBJS) -+ifeq ($(ENABLE_LIB_STATIC),1) - rm -f libbz2.a - $(AR) cq libbz2.a $(OBJS) - @if ( test -f $(RANLIB) -o -f /usr/bin/ranlib -o \ -@@ -51,8 +101,18 @@ - echo $(RANLIB) libbz2.a ; \ - $(RANLIB) libbz2.a ; \ - fi -+endif -+ifeq ($(ENABLE_LIB_SHARED),1) -+ $(CC) -shared -Wl,-soname -Wl,libbz2.so.1.0 $(LDFLAGS) -o libbz2.so.1.0.8 $(OBJS) -+ rm -f libbz2.so.1.0 -+ rm -f libbz2.so.1 -+ rm -f libbz2.so -+ ln -s libbz2.so.1.0.8 libbz2.so.1.0 -+ ln -s libbz2.so.1.0 libbz2.so.1 -+ ln -s libbz2.so.1 libbz2.so -+endif - --check: test -+check: $(TGTS_check) - test: bzip2 - @cat words1 - ./bzip2 -1 < sample1.ref > sample1.rb2 -@@ -69,69 +129,153 @@ - cmp sample3.tst sample3.ref - @cat words3 - --install: bzip2 bzip2recover -+install: $(TGTS_install) -+ifeq ($(ENABLE_BIN),1) - if ( test ! -d $(PREFIX)/bin ) ; then mkdir -p $(PREFIX)/bin ; fi -+endif -+ifeq ($(ENABLE_LIB),1) - if ( test ! -d $(PREFIX)/lib ) ; then mkdir -p $(PREFIX)/lib ; fi -+endif -+ifeq ($(ENABLE_DEV),1) -+ if ( test ! -d $(PREFIX)/include ) ; then mkdir -p $(PREFIX)/include ; fi -+endif -+ifeq ($(ENABLE_DOCS),1) - if ( test ! -d $(PREFIX)/man ) ; then mkdir -p $(PREFIX)/man ; fi - if ( test ! -d $(PREFIX)/man/man1 ) ; then mkdir -p $(PREFIX)/man/man1 ; fi -- if ( test ! -d $(PREFIX)/include ) ; then mkdir -p $(PREFIX)/include ; fi -+endif -+ifeq ($(ENABLE_BIN),1) -+ ifeq ($(ENABLE_BIN_STATIC),1) - cp -f bzip2 $(PREFIX)/bin/bzip2 -- cp -f bzip2 $(PREFIX)/bin/bunzip2 -- cp -f bzip2 $(PREFIX)/bin/bzcat -+ chmod a+rx $(PREFIX)/bin/bzip2 -+ endif -+ ifeq ($(ENABLE_BIN_SHARED),1) -+ ifeq ($(ENABLE_BIN_STATIC),1) -+ cp -f bzip2-shared $(PREFIX)/bin/bzip2-shared -+ chmod a+rx $(PREFIX)/bin/bzip2-shared -+ else -+ cp -f bzip2-shared $(PREFIX)/bin/bzip2 -+ endif -+ endif -+ rm -f $(PREFIX)/bin/bunzip2 -+ rm -f $(PREFIX)/bin/bzcat -+ ( cd $(PREFIX)/bin && ln -s bzip2 bunzip2 ) -+ ( cd $(PREFIX)/bin && ln -s bzip2 bzcat ) -+ rm -f $(PREFIX)/bin/bunzip2-shared -+ rm -f $(PREFIX)/bin/bzcat-shared -+ ifeq ($(ENABLE_BIN_SHARED),1) -+ ifeq ($(ENABLE_BIN_STATIC),1) -+ ( cd $(PREFIX)/bin && ln -s bzip2-shared bunzip2-shared ) -+ ( cd $(PREFIX)/bin && ln -s bzip2-shared bzcat-shared ) -+ endif -+ endif - cp -f bzip2recover $(PREFIX)/bin/bzip2recover -- chmod a+x $(PREFIX)/bin/bzip2 -- chmod a+x $(PREFIX)/bin/bunzip2 -- chmod a+x $(PREFIX)/bin/bzcat -- chmod a+x $(PREFIX)/bin/bzip2recover -- cp -f bzip2.1 $(PREFIX)/man/man1 -- chmod a+r $(PREFIX)/man/man1/bzip2.1 -- cp -f bzlib.h $(PREFIX)/include -- chmod a+r $(PREFIX)/include/bzlib.h -- cp -f libbz2.a $(PREFIX)/lib -- chmod a+r $(PREFIX)/lib/libbz2.a -+ chmod a+rx $(PREFIX)/bin/bzip2recover - cp -f bzgrep $(PREFIX)/bin/bzgrep -- ln -s -f $(PREFIX)/bin/bzgrep $(PREFIX)/bin/bzegrep -- ln -s -f $(PREFIX)/bin/bzgrep $(PREFIX)/bin/bzfgrep -- chmod a+x $(PREFIX)/bin/bzgrep -+ chmod a+rx $(PREFIX)/bin/bzgrep -+ rm -f $(PREFIX)/bin/bzegrep -+ rm -f $(PREFIX)/bin/bzfgrep -+ ( cd $(PREFIX)/bin && ln -s bzgrep bzegrep ) -+ ( cd $(PREFIX)/bin && ln -s bzgrep bzfgrep ) - cp -f bzmore $(PREFIX)/bin/bzmore -- ln -s -f $(PREFIX)/bin/bzmore $(PREFIX)/bin/bzless -- chmod a+x $(PREFIX)/bin/bzmore -+ chmod a+rx $(PREFIX)/bin/bzmore -+ rm -f $(PREFIX)/bin/bzless -+ ( cd $(PREFIX)/bin && ln -s bzmore bzless ) -+ rm -f $(PREFIX)/bin/bzcmp - cp -f bzdiff $(PREFIX)/bin/bzdiff -- ln -s -f $(PREFIX)/bin/bzdiff $(PREFIX)/bin/bzcmp -- chmod a+x $(PREFIX)/bin/bzdiff -- cp -f bzgrep.1 bzmore.1 bzdiff.1 $(PREFIX)/man/man1 -- chmod a+r $(PREFIX)/man/man1/bzgrep.1 -- chmod a+r $(PREFIX)/man/man1/bzmore.1 -- chmod a+r $(PREFIX)/man/man1/bzdiff.1 -+ chmod a+rx $(PREFIX)/bin/bzdiff -+ ( cd $(PREFIX)/bin && ln -s bzdiff bzcmp ) -+endif -+ifeq ($(ENABLE_DEV),1) -+ cp -f bzlib.h $(PREFIX)/include -+ chmod a+r $(PREFIX)/include/bzlib.h -+endif -+ifeq ($(ENABLE_DOCS),1) -+ cp -f bzip2.1 bzgrep.1 bzmore.1 bzdiff.1 $(PREFIX)/man/man1 - echo ".so man1/bzgrep.1" > $(PREFIX)/man/man1/bzegrep.1 - echo ".so man1/bzgrep.1" > $(PREFIX)/man/man1/bzfgrep.1 - echo ".so man1/bzmore.1" > $(PREFIX)/man/man1/bzless.1 - echo ".so man1/bzdiff.1" > $(PREFIX)/man/man1/bzcmp.1 -+ chmod a+r $(PREFIX)/man/man1/bzip2.1 -+ chmod a+r $(PREFIX)/man/man1/bzgrep.1 -+ chmod a+r $(PREFIX)/man/man1/bzmore.1 -+ chmod a+r $(PREFIX)/man/man1/bzdiff.1 -+ chmod a+r $(PREFIX)/man/man1/bzegrep.1 -+ chmod a+r $(PREFIX)/man/man1/bzfgrep.1 -+ chmod a+r $(PREFIX)/man/man1/bzless.1 -+ chmod a+r $(PREFIX)/man/man1/bzcmp.1 -+endif -+ifeq ($(ENABLE_LIB_SHARED),1) -+ cp -f libbz2.so.1.0.8 $(PREFIX)/lib -+ chmod a+r $(PREFIX)/lib/libbz2.so.1.0.8 -+ rm -f $(PREFIX)/lib/libbz2.so.1.0 -+ rm -f $(PREFIX)/lib/libbz2.so.1 -+ rm -f $(PREFIX)/lib/libbz2.so -+ ( cd $(PREFIX)/lib && ln -s libbz2.so.1.0.8 libbz2.so.1.0 ) -+ ( cd $(PREFIX)/lib && ln -s libbz2.so.1.0 libbz2.so.1 ) -+ ( cd $(PREFIX)/lib && ln -s libbz2.so.1 libbz2.so ) -+endif -+ifeq ($(ENABLE_LIB_STATIC),1) -+ cp -f libbz2.a $(PREFIX)/lib -+ chmod a+r $(PREFIX)/lib/libbz2.a -+endif -+ -+uninstall: -+ rm -f $(PREFIX)/bin/bzip2 -+ rm -f $(PREFIX)/bin/bzip2-shared -+ rm -f $(PREFIX)/bin/bunzip2 -+ rm -f $(PREFIX)/bin/bzcat -+ rm -f $(PREFIX)/bin/bunzip2-shared -+ rm -f $(PREFIX)/bin/bzcat-shared -+ rm -f $(PREFIX)/bin/bzip2recover -+ rm -f $(PREFIX)/bin/bzgrep -+ rm -f $(PREFIX)/bin/bzegrep -+ rm -f $(PREFIX)/bin/bzfgrep -+ rm -f $(PREFIX)/bin/bzmore -+ rm -f $(PREFIX)/bin/bzless -+ rm -f $(PREFIX)/bin/bzdiff -+ rm -f $(PREFIX)/bin/bzcmp -+ rm -f $(PREFIX)/include/bzlib.h -+ rm -f $(PREFIX)/lib/libbz2.so.1.0.8 -+ rm -f $(PREFIX)/lib/libbz2.so.1.0 -+ rm -f $(PREFIX)/lib/libbz2.so.1 -+ rm -f $(PREFIX)/lib/libbz2.so -+ rm -f $(PREFIX)/lib/libbz2.a -+ rm -f $(PREFIX)/man/man1/bzip2.1 -+ rm -f $(PREFIX)/man/man1/bzgrep.1 -+ rm -f $(PREFIX)/man/man1/bzmore.1 -+ rm -f $(PREFIX)/man/man1/bzdiff.1 -+ rm -f $(PREFIX)/man/man1/bzegrep.1 -+ rm -f $(PREFIX)/man/man1/bzfgrep.1 -+ rm -f $(PREFIX)/man/man1/bzless.1 -+ rm -f $(PREFIX)/man/man1/bzcmp.1 -+ (rmdir $(PREFIX)/bin $(PREFIX)/include $(PREFIX)/lib $(PREFIX)/man/man1 $(PREFIX)/man || true ) 2> /dev/null - - clean: -- rm -f *.o libbz2.a bzip2 bzip2recover \ -+ rm -f $(OBJS) bzip2.o \ -+ libbz2.so.1.0.8 libbz2.so.1.0 libbz2.so.1 libbz2.so \ -+ libbz2.a bzip2 bzip2-shared bzip2recover \ - sample1.rb2 sample2.rb2 sample3.rb2 \ - sample1.tst sample2.tst sample3.tst - - blocksort.o: blocksort.c - @cat words0 -- $(CC) $(CFLAGS) -c blocksort.c -+ $(CC) $(CFLAGS_NOPIC) -c blocksort.c - huffman.o: huffman.c -- $(CC) $(CFLAGS) -c huffman.c -+ $(CC) $(CFLAGS_NOPIC) -c huffman.c - crctable.o: crctable.c -- $(CC) $(CFLAGS) -c crctable.c -+ $(CC) $(CFLAGS_NOPIC) -c crctable.c - randtable.o: randtable.c -- $(CC) $(CFLAGS) -c randtable.c -+ $(CC) $(CFLAGS_NOPIC) -c randtable.c - compress.o: compress.c -- $(CC) $(CFLAGS) -c compress.c -+ $(CC) $(CFLAGS_NOPIC) -c compress.c - decompress.o: decompress.c -- $(CC) $(CFLAGS) -c decompress.c -+ $(CC) $(CFLAGS_NOPIC) -c decompress.c - bzlib.o: bzlib.c -- $(CC) $(CFLAGS) -c bzlib.c -+ $(CC) $(CFLAGS_NOPIC) -c bzlib.c - bzip2.o: bzip2.c -- $(CC) $(CFLAGS) -c bzip2.c -+ $(CC) $(CFLAGS_NOPIC) -c bzip2.c - bzip2recover.o: bzip2recover.c -- $(CC) $(CFLAGS) -c bzip2recover.c -+ $(CC) $(CFLAGS_NOPIC) -c bzip2recover.c - - - distclean: clean -@@ -189,7 +333,6 @@ - $(DISTNAME)/bzmore.1 \ - $(DISTNAME)/bzgrep \ - $(DISTNAME)/bzgrep.1 \ -- $(DISTNAME)/Makefile-libbz2_so \ - $(DISTNAME)/bz-common.xsl \ - $(DISTNAME)/bz-fo.xsl \ - $(DISTNAME)/bz-html.xsl \ ---- a/Makefile-libbz2_so -+++ b/Makefile-libbz2_so -@@ -1,59 +0,0 @@ -- --# This Makefile builds a shared version of the library, --# libbz2.so.1.0.8, with soname libbz2.so.1.0, --# at least on x86-Linux (RedHat 7.2), --# with gcc-2.96 20000731 (Red Hat Linux 7.1 2.96-98). --# Please see the README file for some important info --# about building the library like this. -- --# ------------------------------------------------------------------ --# This file is part of bzip2/libbzip2, a program and library for --# lossless, block-sorting data compression. --# --# bzip2/libbzip2 version 1.0.8 of 13 July 2019 --# Copyright (C) 1996-2019 Julian Seward --# --# Please read the WARNING, DISCLAIMER and PATENTS sections in the --# README file. --# --# This program is released under the terms of the license contained --# in the file LICENSE. --# ------------------------------------------------------------------ -- -- --SHELL=/bin/sh --CC=gcc --BIGFILES=-D_FILE_OFFSET_BITS=64 --CFLAGS=-fpic -fPIC -Wall -Winline -O2 -g $(BIGFILES) -- --OBJS= blocksort.o \ -- huffman.o \ -- crctable.o \ -- randtable.o \ -- compress.o \ -- decompress.o \ -- bzlib.o -- --all: $(OBJS) -- $(CC) -shared -Wl,-soname -Wl,libbz2.so.1.0 -o libbz2.so.1.0.8 $(OBJS) -- $(CC) $(CFLAGS) -o bzip2-shared bzip2.c libbz2.so.1.0.8 -- rm -f libbz2.so.1.0 -- ln -s libbz2.so.1.0.8 libbz2.so.1.0 -- --clean: -- rm -f $(OBJS) bzip2.o libbz2.so.1.0.8 libbz2.so.1.0 bzip2-shared -- --blocksort.o: blocksort.c -- $(CC) $(CFLAGS) -c blocksort.c --huffman.o: huffman.c -- $(CC) $(CFLAGS) -c huffman.c --crctable.o: crctable.c -- $(CC) $(CFLAGS) -c crctable.c --randtable.o: randtable.c -- $(CC) $(CFLAGS) -c randtable.c --compress.o: compress.c -- $(CC) $(CFLAGS) -c compress.c --decompress.o: decompress.c -- $(CC) $(CFLAGS) -c decompress.c --bzlib.o: bzlib.c -- $(CC) $(CFLAGS) -c bzlib.c ---- a/unzcrash.c -+++ b/unzcrash.c -@@ -30,7 +30,7 @@ - - #include - #include --#include "bzlib.h" -+#include - - #define M_BLOCK 1000000 - diff --git a/tools/bzip2/patches/100-cmake.patch b/tools/bzip2/patches/100-cmake.patch new file mode 100644 index 0000000000..0ed37b2e44 --- /dev/null +++ b/tools/bzip2/patches/100-cmake.patch @@ -0,0 +1,382 @@ +--- /dev/null ++++ b/CMakeLists.txt +@@ -0,0 +1,354 @@ ++cmake_minimum_required(VERSION 3.12) ++ ++project(bzip2 ++ VERSION 1.0.8 ++ DESCRIPTION "This Bzip2/libbz2 a program and library for lossless block-sorting data compression." ++ LANGUAGES C) ++ ++# See versioning rule: ++# http://www.gnu.org/software/libtool/manual/html_node/Updating-version-info.html ++# ++# KEEP THESE IN SYNC WITH meson.build OR STUFF WILL BREAK! ++set(LT_CURRENT 1) ++set(LT_REVISION 8) ++set(LT_AGE 0) ++ ++set(CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake ${CMAKE_MODULE_PATH}) ++ ++include_directories(${PROJECT_BINARY_DIR}) ++ ++math(EXPR LT_SOVERSION "${LT_CURRENT} - ${LT_AGE}") ++set(LT_VERSION "${LT_SOVERSION}.${LT_AGE}.${LT_REVISION}") ++set(PACKAGE_VERSION ${PROJECT_VERSION}) ++ ++set(ENABLE_APP_DEFAULT ON) ++set(ENABLE_EXAMPLES_DEFAULT OFF) ++set(ENABLE_DOCS_DEFAULT OFF) ++include(CMakeOptions.txt) ++ ++if(ENABLE_LIB_ONLY AND (ENABLE_APP OR ENABLE_EXAMPLES)) ++ # Remember when disabled options are disabled for later diagnostics. ++ set(ENABLE_LIB_ONLY_DISABLED_OTHERS 1) ++else() ++ set(ENABLE_LIB_ONLY_DISABLED_OTHERS 0) ++endif() ++if(ENABLE_LIB_ONLY) ++ set(ENABLE_APP OFF) ++ set(ENABLE_EXAMPLES OFF) ++endif() ++ ++# Do not disable assertions based on CMAKE_BUILD_TYPE. ++foreach(_build_type Release MinSizeRel RelWithDebInfo) ++ foreach(_lang C) ++ string(TOUPPER CMAKE_${_lang}_FLAGS_${_build_type} _var) ++ string(REGEX REPLACE "(^|)[/-]D *NDEBUG($|)" " " ${_var} "${${_var}}") ++ endforeach() ++endforeach() ++ ++# Support the latest c++ standard available. ++include(CheckCCompilerFlag) ++include(CheckCXXCompilerFlag) ++ ++function(extract_valid_c_flags varname) ++ set(valid_flags) ++ foreach(flag IN LISTS ARGN) ++ string(REGEX REPLACE "[^a-zA-Z0-9_]+" "_" flag_var ${flag}) ++ set(flag_var "C_FLAG_${flag_var}") ++ check_c_compiler_flag("${flag}" "${flag_var}") ++ if(${flag_var}) ++ set(valid_flags "${valid_flags} ${flag}") ++ endif() ++ endforeach() ++ set(${varname} "${valid_flags}" PARENT_SCOPE) ++endfunction() ++if(NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES) ++ set(CMAKE_BUILD_TYPE RelWithDebInfo CACHE STRING "Choose the build type" FORCE) ++ ++ # Include "None" as option to disable any additional (optimization) flags, ++ # relying on just CMAKE_C_FLAGS and CMAKE_CXX_FLAGS (which are empty by ++ # default). These strings are presented in cmake-gui. ++ set_property(CACHE CMAKE_BUILD_TYPE PROPERTY STRINGS ++ None Debug Release MinSizeRel RelWithDebInfo) ++endif() ++ ++# Install a symlink of script to the "bin" directory. ++# Not intended for use on Windows. ++function(install_script_symlink original symlink) ++ add_custom_command(OUTPUT ${symlink} ++ COMMAND ${CMAKE_COMMAND} -E create_symlink ${original} ${symlink} ++ DEPENDS ${original} ++ COMMENT "Generating symbolic link ${symlink} of ${original}") ++ add_custom_target(${symlink}_tgt ALL DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${symlink}) ++ install(PROGRAMS ${CMAKE_CURRENT_BINARY_DIR}/${symlink} DESTINATION ${CMAKE_INSTALL_BINDIR}) ++endfunction() ++ ++# Install a symlink of binary target to the "bin" directory. ++# On Windows, it will be a copy instead of a symlink. ++function(install_target_symlink original symlink) ++ if(WIN32) ++ set(op copy) ++ set(symlink "${symlink}.exe") ++ else() ++ set(op create_symlink) ++ endif() ++ add_custom_command(TARGET ${original} POST_BUILD ++ COMMAND ${CMAKE_COMMAND} -E ${op} $ ${symlink} ++ WORKING_DIRECTORY $ ++ COMMENT "Generating symbolic link (or copy) ${symlink} of ${original}") ++ install(PROGRAMS $/${symlink} DESTINATION ${CMAKE_INSTALL_BINDIR}) ++endfunction() ++ ++include(GNUInstallDirs) ++ ++# Checks for header files. ++include(CheckIncludeFile) ++check_include_file(arpa/inet.h HAVE_ARPA_INET_H) ++check_include_file(fcntl.h HAVE_FCNTL_H) ++check_include_file(inttypes.h HAVE_INTTYPES_H) ++check_include_file(limits.h HAVE_LIMITS_H) ++check_include_file(netdb.h HAVE_NETDB_H) ++check_include_file(netinet/in.h HAVE_NETINET_IN_H) ++check_include_file(pwd.h HAVE_PWD_H) ++check_include_file(sys/socket.h HAVE_SYS_SOCKET_H) ++check_include_file(sys/time.h HAVE_SYS_TIME_H) ++check_include_file(syslog.h HAVE_SYSLOG_H) ++check_include_file(time.h HAVE_TIME_H) ++check_include_file(unistd.h HAVE_UNISTD_H) ++ ++include(CheckTypeSize) ++# Checks for typedefs, structures, and compiler characteristics. ++# AC_TYPE_SIZE_T ++check_type_size("ssize_t" SIZEOF_SSIZE_T) ++if(NOT SIZEOF_SSIZE_T) ++ # ssize_t is a signed type in POSIX storing at least -1. ++ # Set it to "int" to match the behavior of AC_TYPE_SSIZE_T (autotools). ++ set(ssize_t int) ++endif() ++ ++include(CheckStructHasMember) ++check_struct_has_member("struct tm" tm_gmtoff time.h HAVE_STRUCT_TM_TM_GMTOFF) ++ ++include(CheckSymbolExists) ++# XXX does this correctly detect initgroups (un)availability on cygwin? ++check_symbol_exists(initgroups grp.h HAVE_DECL_INITGROUPS) ++if(NOT HAVE_DECL_INITGROUPS AND HAVE_UNISTD_H) ++ # FreeBSD declares initgroups() in unistd.h ++ check_symbol_exists(initgroups unistd.h HAVE_DECL_INITGROUPS2) ++ if(HAVE_DECL_INITGROUPS2) ++ set(HAVE_DECL_INITGROUPS 1) ++ endif() ++endif() ++ ++set(WARNCFLAGS) ++if(CMAKE_C_COMPILER_ID MATCHES "MSVC") ++ if(ENABLE_WERROR) ++ set(WARNCFLAGS /WX) ++ endif() ++else() ++ if(ENABLE_WERROR) ++ extract_valid_c_flags(WARNCFLAGS -Werror) ++ endif() ++ ++ # For C compiler ++ # Please keep this list in sync with meson.build ++ extract_valid_c_flags(WARNCFLAGS ++ -Wall ++ -Wextra ++ -Wmissing-prototypes ++ -Wstrict-prototypes ++ -Wmissing-declarations ++ -Wpointer-arith ++ -Wdeclaration-after-statement ++ -Wformat-security ++ -Wwrite-strings ++ -Wshadow ++ -Winline ++ -Wnested-externs ++ -Wfloat-equal ++ -Wundef ++ -Wendif-labels ++ -Wempty-body ++ -Wcast-align ++ -Wclobbered ++ -Wvla ++ -Wpragmas ++ -Wunreachable-code ++ -Waddress ++ -Wattributes ++ -Wdiv-by-zero ++ -Wshorten-64-to-32 ++ -Wconversion ++ -Wextended-offsetof ++ -Wformat-nonliteral ++ -Wlanguage-extension-token ++ -Wmissing-field-initializers ++ -Wmissing-noreturn ++ -Wmissing-variable-declarations ++ # -Wpadded # Not used because we cannot change public structs ++ -Wsign-conversion ++ # -Wswitch-enum # Not used because this basically disallows default case ++ -Wunreachable-code-break ++ -Wunused-macros ++ -Wunused-parameter ++ -Wredundant-decls ++ -Wheader-guard ++ -Wno-format-nonliteral # This is required because we pass format string as "const char*. ++ ) ++endif() ++ ++if(ENABLE_DEBUG) ++ set(DEBUGBUILD 1) ++endif() ++ ++#add_definitions(-DHAVE_CONFIG_H) ++#configure_file(cmakeconfig.h.in config.h) ++ ++# autotools-compatible names ++# Sphinx expects relative paths in the .rst files. Use the fact that the files ++# below are all one directory level deep. ++file(RELATIVE_PATH top_srcdir ${CMAKE_CURRENT_BINARY_DIR}/dir ${CMAKE_CURRENT_SOURCE_DIR}) ++file(RELATIVE_PATH top_builddir ${CMAKE_CURRENT_BINARY_DIR}/dir ${CMAKE_CURRENT_BINARY_DIR}) ++set(abs_top_srcdir ${CMAKE_CURRENT_SOURCE_DIR}) ++set(abs_top_builddir ${CMAKE_CURRENT_BINARY_DIR}) ++# bzip2.pc (pkg-config file) ++set(prefix ${CMAKE_INSTALL_PREFIX}) ++set(exec_prefix ${CMAKE_INSTALL_PREFIX}) ++set(bindir ${CMAKE_INSTALL_FULL_BINDIR}) ++set(sbindir ${CMAKE_INSTALL_FULL_SBINDIR}) ++set(libdir ${CMAKE_INSTALL_FULL_LIBDIR}) ++set(includedir ${CMAKE_INSTALL_FULL_INCLUDEDIR}) ++set(VERSION ${PACKAGE_VERSION}) ++ ++# ++# The build targets. ++# In a larger project, the following would be in subdirectories and ++# These targets would be included with `add_subdirectory()` ++# ++set(BZ2_SOURCES ++ blocksort.c ++ huffman.c ++ crctable.c ++ randtable.c ++ compress.c ++ decompress.c ++ bzlib.c) ++ ++# The bz2 OBJECT-library, required for bzip2, bzip2recover. ++add_library(bz2_ObjLib OBJECT) ++target_sources(bz2_ObjLib ++ PRIVATE ${BZ2_SOURCES} ++ PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/bzlib_private.h ++ INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/bzlib.h) ++ ++if(ENABLE_SHARED_LIB) ++ # The libbz2 shared library. ++ add_library(bz2 SHARED ${BZ2_RES}) ++ target_sources(bz2 ++ PRIVATE ${BZ2_SOURCES} ++ ${CMAKE_CURRENT_SOURCE_DIR}/libbz2.def ++ PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/bzlib_private.h ++ INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/bzlib.h) ++ # Always use '-fPIC'/'-fPIE' option for shared libraries. ++ set_property(TARGET bz2 PROPERTY POSITION_INDEPENDENT_CODE ON) ++ set_target_properties(bz2 PROPERTIES ++ COMPILE_FLAGS "${WARNCFLAGS}" ++ VERSION ${LT_VERSION} SOVERSION ${LT_SOVERSION}) ++ install(TARGETS bz2 DESTINATION ${CMAKE_INSTALL_LIBDIR}) ++ install(FILES bzlib.h DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}) ++ ++ if(USE_OLD_SONAME) ++ # Hack to support the old libbz2.so.1.0 version by including an extra copy. ++ # Technically the old SONAME is not libtool compatible. ++ # This hack is to support binary compatibility with libbz2 in some distro packages. ++ if(UNIX AND NOT APPLE) ++ add_library(bz2_old_soname SHARED ${BZ2_RES}) ++ target_sources(bz2_old_soname ++ PRIVATE ${BZ2_SOURCES} ++ ${CMAKE_CURRENT_SOURCE_DIR}/libbz2.def ++ PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/bzlib_private.h ++ INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/bzlib.h ++ ) ++ set_target_properties(bz2_old_soname PROPERTIES ++ COMPILE_FLAGS "${WARNCFLAGS}" ++ VERSION ${LT_SOVERSION}.${LT_AGE} SOVERSION ${LT_SOVERSION}.${LT_AGE} ++ OUTPUT_NAME bz2 ++ ) ++ install(TARGETS bz2_old_soname DESTINATION ${CMAKE_INSTALL_LIBDIR}) ++ endif() ++ endif() ++endif() ++ ++if(ENABLE_STATIC_LIB) ++ # The libbz2 static library. ++ add_library(bz2_static STATIC) ++ target_sources(bz2_static ++ PRIVATE ${BZ2_SOURCES} ++ PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/bzlib_private.h ++ INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/bzlib.h) ++ set_target_properties(bz2_static PROPERTIES ++ COMPILE_FLAGS "${WARNCFLAGS}" ++ VERSION ${LT_VERSION} ++ SOVERSION ${LT_SOVERSION} ++ ARCHIVE_OUTPUT_NAME bz2_static) ++ target_compile_definitions(bz2_static PUBLIC BZ2_STATICLIB) ++ install(TARGETS bz2_static DESTINATION ${CMAKE_INSTALL_LIBDIR}) ++ install(FILES bzlib.h DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}) ++endif() ++ ++if(ENABLE_APP) ++ # The bzip2 executable. ++ add_executable(bzip2) ++ target_sources(bzip2 ++ PRIVATE bzip2.c) ++ target_link_libraries(bzip2 ++ PRIVATE bz2_ObjLib) ++ if(WIN32) ++ target_compile_definitions(bzip2 PUBLIC BZ_LCCWIN32 BZ_UNIX=0) ++ else() ++ target_compile_definitions(bzip2 PUBLIC BZ_LCCWIN32=0 BZ_UNIX) ++ endif() ++ install(TARGETS bzip2 DESTINATION ${CMAKE_INSTALL_BINDIR}) ++ ++ # Create bzip2 copies bzcat and bunzip. ++ # The default behavior is altered in bzip2.c code by checking the program name. ++ install_target_symlink(bzip2 bzcat) ++ install_target_symlink(bzip2 bunzip) ++ ++ # The bzip2recover executable. ++ add_executable(bzip2recover) ++ target_sources(bzip2recover ++ PRIVATE bzip2recover.c) ++ target_link_libraries(bzip2recover ++ PRIVATE bz2_ObjLib) ++ if(WIN32) ++ target_compile_definitions(bzip2recover PUBLIC BZ_LCCWIN32 BZ_UNIX=0) ++ else() ++ target_compile_definitions(bzip2recover PUBLIC BZ_LCCWIN32=0 BZ_UNIX) ++ endif() ++ install(TARGETS bzip2recover DESTINATION ${CMAKE_INSTALL_BINDIR}) ++ ++ if(ENABLE_EXAMPLES) ++ if(ENABLE_SHARED_LIB) ++ # The dlltest executable. ++ add_executable(dlltest) ++ target_sources(dlltest ++ PRIVATE dlltest.c) ++ target_link_libraries(dlltest bz2) ++ install(TARGETS dlltest DESTINATION ${CMAKE_INSTALL_BINDIR}) ++ endif() ++ endif() ++ ++ if(NOT WIN32) ++ # Install shell scripts, and renamed copies. ++ install(PROGRAMS bzdiff bzgrep bzmore ++ DESTINATION ${CMAKE_INSTALL_BINDIR}) ++ ++ install_script_symlink(bzdiff bzcmp) ++ ++ install_script_symlink(bzgrep bzegrep) ++ install_script_symlink(bzgrep bzfgrep) ++ ++ install_script_symlink(bzmore bzless) ++ endif() ++ ++endif() +--- /dev/null ++++ b/CMakeOptions.txt +@@ -0,0 +1,22 @@ ++# Features that can be enabled for cmake (see CMakeLists.txt) ++ ++option(ENABLE_WERROR "Turn on compile time warnings") ++ ++option(ENABLE_DEBUG "Turn on debug output") ++ ++option(ENABLE_APP "Build applications (bzip2, and bzip2recover)" ++ ${ENABLE_APP_DEFAULT}) ++ ++option(ENABLE_DOCS "Generate documentation" ++ ${ENABLE_DOCS_DEFAULT}) ++ ++option(ENABLE_EXAMPLES "Build examples" ++ ${ENABLE_EXAMPLES_DEFAULT}) ++ ++option(ENABLE_LIB_ONLY "Build libbz2 only. This is a short hand for -DENABLE_APP=0 -DENABLE_EXAMPLES=0") ++ ++option(ENABLE_STATIC_LIB "Build libbz2 in static mode also") ++ ++option(ENABLE_SHARED_LIB "Build libbz2 as a shared library" ON) ++ ++option(USE_OLD_SONAME "Use libbz2.so.1.0 for compatibility with old Makefiles" OFF)