From 5d932412b00a99ca5d7ab05a7ed52f9335a550ef Mon Sep 17 00:00:00 2001 From: Chen Minqiang Date: Thu, 19 Mar 2020 20:20:30 +0800 Subject: [PATCH] Revert "ramips: disable PORT 5 MAC RX/TX flow control by default" The TX/RX flow control is not the cause of the TX timeouts issue Signed-off-by: Chen Minqiang --- .../files/drivers/net/ethernet/ralink/gsw_mt7621.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7621.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7621.c index e4ba4b2c2e..9ad0237efe 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7621.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7621.c @@ -98,9 +98,15 @@ static void mt7621_hw_init(struct mt7620_gsw *gsw, struct device_node *np) mt7530_mdio_w32(gsw, 0x7000, 0x3); usleep_range(10, 20); - /* (GE1, Force 1000M/FD, FC OFF, MAX_RX_LENGTH 1536) */ - mtk_switch_w32(gsw, 0x2305e30b, GSW_REG_MAC_P0_MCR); - mt7530_mdio_w32(gsw, 0x3600, 0x5e30b); + if ((rt_sysc_r32(SYSC_REG_CHIP_REV_ID) & 0xFFFF) == 0x0101) { + /* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */ + mtk_switch_w32(gsw, 0x2305e30b, GSW_REG_MAC_P0_MCR); + mt7530_mdio_w32(gsw, 0x3600, 0x5e30b); + } else { + /* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */ + mtk_switch_w32(gsw, 0x2305e33b, GSW_REG_MAC_P0_MCR); + mt7530_mdio_w32(gsw, 0x3600, 0x5e33b); + } /* (GE2, Link down) */ mtk_switch_w32(gsw, 0x8000, GSW_REG_MAC_P1_MCR);