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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-01-25 19:31:00 +08:00
commit 6b1e639bfc
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
52 changed files with 2690 additions and 3417 deletions
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6
include/host-build.mk
View File

@ -206,5 +206,9 @@ endif
define HostBuild
$(HostBuild/Core)
$(if $(if $(PKG_HOST_ONLY),,$(if $(and $(filter host-%,$(MAKECMDGOALS)),$(PKG_SKIP_DOWNLOAD)),,$(STAMP_PREPARED))),,$(if $(strip $(PKG_SOURCE_URL)),$(call Download,default)))
$(if $(if $(PKG_HOST_ONLY),,$(if $(and $(filter host-%,$(MAKECMDGOALS)),$(PKG_SKIP_DOWNLOAD)),,$(STAMP_PREPARED))),,
$(if $(and $(CONFIG_AUTOREMOVE), $(wildcard $(HOST_STAMP_INSTALLED), $(wildcard $(HOST_STAMP_BUILT)))),,
$(if $(strip $(PKG_SOURCE_URL)),$(call Download,default))
)
)
endef

40
include/image.mk
View File

@ -333,6 +333,8 @@ define Device/InitProfile
DEVICE_ALT0_TITLE = $$(DEVICE_ALT0_VENDOR) $$(DEVICE_ALT0_MODEL)$$(if $$(DEVICE_ALT0_VARIANT), $$(DEVICE_ALT0_VARIANT))
DEVICE_ALT1_TITLE = $$(DEVICE_ALT1_VENDOR) $$(DEVICE_ALT1_MODEL)$$(if $$(DEVICE_ALT1_VARIANT), $$(DEVICE_ALT1_VARIANT))
DEVICE_ALT2_TITLE = $$(DEVICE_ALT2_VENDOR) $$(DEVICE_ALT2_MODEL)$$(if $$(DEVICE_ALT2_VARIANT), $$(DEVICE_ALT2_VARIANT))
DEVICE_ALT3_TITLE = $$(DEVICE_ALT3_VENDOR) $$(DEVICE_ALT3_MODEL)$$(if $$(DEVICE_ALT3_VARIANT), $$(DEVICE_ALT3_VARIANT))
DEVICE_ALT4_TITLE = $$(DEVICE_ALT4_VENDOR) $$(DEVICE_ALT4_MODEL)$$(if $$(DEVICE_ALT4_VARIANT), $$(DEVICE_ALT4_VARIANT))
DEVICE_VENDOR :=
DEVICE_MODEL :=
DEVICE_VARIANT :=
@ -345,6 +347,12 @@ define Device/InitProfile
DEVICE_ALT2_VENDOR :=
DEVICE_ALT2_MODEL :=
DEVICE_ALT2_VARIANT :=
DEVICE_ALT3_VENDOR :=
DEVICE_ALT3_MODEL :=
DEVICE_ALT3_VARIANT :=
DEVICE_ALT4_VENDOR :=
DEVICE_ALT4_MODEL :=
DEVICE_ALT4_VARIANT :=
DEVICE_PACKAGES :=
DEVICE_DESCRIPTION = Build firmware images for $$(DEVICE_TITLE)
endef
@ -424,7 +432,9 @@ DEFAULT_DEVICE_VARS := \
DEVICE_VENDOR DEVICE_MODEL DEVICE_VARIANT \
DEVICE_ALT0_VENDOR DEVICE_ALT0_MODEL DEVICE_ALT0_VARIANT \
DEVICE_ALT1_VENDOR DEVICE_ALT1_MODEL DEVICE_ALT1_VARIANT \
DEVICE_ALT2_VENDOR DEVICE_ALT2_MODEL DEVICE_ALT2_VARIANT
DEVICE_ALT2_VENDOR DEVICE_ALT2_MODEL DEVICE_ALT2_VARIANT \
DEVICE_ALT3_VENDOR DEVICE_ALT3_MODEL DEVICE_ALT3_VARIANT \
DEVICE_ALT4_VENDOR DEVICE_ALT4_MODEL DEVICE_ALT4_VARIANT
define Device/ExportVar
$(1) : $(2):=$$($(2))
@ -507,6 +517,12 @@ define Device/Build/initramfs
DEVICE_ALT2_VENDOR="$$(DEVICE_ALT2_VENDOR)" \
DEVICE_ALT2_MODEL="$$(DEVICE_ALT2_MODEL)" \
DEVICE_ALT2_VARIANT="$$(DEVICE_ALT2_VARIANT)" \
DEVICE_ALT3_VENDOR="$$(DEVICE_ALT3_VENDOR)" \
DEVICE_ALT3_MODEL="$$(DEVICE_ALT3_MODEL)" \
DEVICE_ALT3_VARIANT="$$(DEVICE_ALT3_VARIANT)" \
DEVICE_ALT4_VENDOR="$$(DEVICE_ALT4_VENDOR)" \
DEVICE_ALT4_MODEL="$$(DEVICE_ALT4_MODEL)" \
DEVICE_ALT4_VARIANT="$$(DEVICE_ALT4_VARIANT)" \
DEVICE_TITLE="$$(DEVICE_TITLE)" \
DEVICE_PACKAGES="$$(DEVICE_PACKAGES)" \
TARGET="$(BOARD)" \
@ -615,6 +631,12 @@ define Device/Build/image
DEVICE_ALT2_VENDOR="$(DEVICE_ALT2_VENDOR)" \
DEVICE_ALT2_MODEL="$(DEVICE_ALT2_MODEL)" \
DEVICE_ALT2_VARIANT="$(DEVICE_ALT2_VARIANT)" \
DEVICE_ALT3_VENDOR="$(DEVICE_ALT3_VENDOR)" \
DEVICE_ALT3_MODEL="$(DEVICE_ALT3_MODEL)" \
DEVICE_ALT3_VARIANT="$(DEVICE_ALT3_VARIANT)" \
DEVICE_ALT4_VENDOR="$(DEVICE_ALT4_VENDOR)" \
DEVICE_ALT4_MODEL="$(DEVICE_ALT4_MODEL)" \
DEVICE_ALT4_VARIANT="$(DEVICE_ALT4_VARIANT)" \
DEVICE_TITLE="$(DEVICE_TITLE)" \
DEVICE_PACKAGES="$(DEVICE_PACKAGES)" \
TARGET="$(BOARD)" \
@ -660,6 +682,12 @@ define Device/Build/artifact
DEVICE_ALT2_VENDOR="$(DEVICE_ALT2_VENDOR)" \
DEVICE_ALT2_MODEL="$(DEVICE_ALT2_MODEL)" \
DEVICE_ALT2_VARIANT="$(DEVICE_ALT2_VARIANT)" \
DEVICE_ALT3_VENDOR="$(DEVICE_ALT3_VENDOR)" \
DEVICE_ALT3_MODEL="$(DEVICE_ALT3_MODEL)" \
DEVICE_ALT3_VARIANT="$(DEVICE_ALT3_VARIANT)" \
DEVICE_ALT4_VENDOR="$(DEVICE_ALT4_VENDOR)" \
DEVICE_ALT4_MODEL="$(DEVICE_ALT4_MODEL)" \
DEVICE_ALT4_VARIANT="$(DEVICE_ALT4_VARIANT)" \
DEVICE_TITLE="$(DEVICE_TITLE)" \
DEVICE_PACKAGES="$(DEVICE_PACKAGES)" \
TARGET="$(BOARD)" \
@ -701,6 +729,8 @@ $(if $(strip $(DEVICE_ALT0_TITLE)),Alternative device titles:
- $(DEVICE_ALT0_TITLE))
$(if $(strip $(DEVICE_ALT1_TITLE)),- $(DEVICE_ALT1_TITLE))
$(if $(strip $(DEVICE_ALT2_TITLE)),- $(DEVICE_ALT2_TITLE))
$(if $(strip $(DEVICE_ALT3_TITLE)),- $(DEVICE_ALT3_TITLE))
$(if $(strip $(DEVICE_ALT4_TITLE)),- $(DEVICE_ALT4_TITLE))
@@
endef
@ -718,6 +748,14 @@ ifneq ($$(strip $$(DEVICE_ALT2_TITLE)),)
DEVICE_DISPLAY = $$(DEVICE_ALT2_TITLE) ($$(DEVICE_TITLE))
$$(info $$(call Device/DumpInfo,$(1)))
endif
ifneq ($$(strip $$(DEVICE_ALT3_TITLE)),)
DEVICE_DISPLAY = $$(DEVICE_ALT3_TITLE) ($$(DEVICE_TITLE))
$$(info $$(call Device/DumpInfo,$(1)))
endif
ifneq ($$(strip $$(DEVICE_ALT4_TITLE)),)
DEVICE_DISPLAY = $$(DEVICE_ALT4_TITLE) ($$(DEVICE_TITLE))
$$(info $$(call Device/DumpInfo,$(1)))
endif
DEVICE_DISPLAY = $$(DEVICE_TITLE)
$$(eval $$(if $$(DEVICE_TITLE),$$(info $$(call Device/DumpInfo,$(1)))))
endef

4
include/kernel-5.10
View File

@ -1,2 +1,2 @@
LINUX_VERSION-5.10 = .163
LINUX_KERNEL_HASH-5.10.163 = 96e226e2d388abc0600434e0f4f365a8829ef901f4d8e761e7ffe2799dc09b20
LINUX_VERSION-5.10 = .165
LINUX_KERNEL_HASH-5.10.165 = 971defc48f19ed0a2a7ffd4b48234619cac28895c985c6d747f5b707ba47af0d

1
package/boot/uboot-envtools/files/ath79
View File

@ -42,7 +42,6 @@ etactica,eg200|\
glinet,gl-ar750s-nor|\
glinet,gl-ar750s-nor-nand|\
librerouter,librerouter-v1|\
netgear,ex6400|\
netgear,ex7300|\
netgear,ex7300-v2|\
netgear,wndr4300-v2|\

26
scripts/ext-tools.sh
View File

@ -5,16 +5,14 @@ HOST_BUILD_DIR=$(pwd)/"build_dir/host"
HOST_STAGING_DIR_STAMP=$(pwd)/"staging_dir/host/stamp"
refresh_timestamps() {
find "$1" -not -type l -print0 | xargs -0 touch
find -H "$1" -not -type l -print0 | xargs -0 touch
}
extract_prebuilt_tar() {
tar -xf "$1"
}
install_prebuilt_tools() {
extract_prebuilt_tar "$TOOLS_TAR"
refresh_prebuilt_tools() {
if [ ! -d "$HOST_BUILD_DIR" ]; then
echo "Can't find Host Build Dir "$HOST_BUILD_DIR"" >&2
exit 1
@ -33,6 +31,14 @@ install_prebuilt_tools() {
return 0
}
install_prebuilt_tools() {
extract_prebuilt_tar "$TOOLS_TAR"
refresh_prebuilt_tools
return 0
}
while [ -n "$1" ]; do
arg="$1"; shift
case "$arg" in
@ -63,6 +69,12 @@ while [ -n "$1" ]; do
exit $?
;;
--refresh)
refresh_prebuilt_tools
exit $?
;;
-h|--help)
me="$(basename "$0")"
echo -e "\nUsage:\n" >&2
@ -81,8 +93,12 @@ while [ -n "$1" ]; do
echo -e " $me --tools {tar}" >&2
echo -e " Install the prebuilt tools present in the passed" >&2
echo -e " tar and prepare them." >&2
echo -e " To correctly use them it's needed to update the." >&2
echo -e " To correctly use them it's needed to update the" >&2
echo -e " timestamp of each tools to skip recompilation.\n" >&2
echo -e " $me --refresh" >&2
echo -e " Refresh timestamps of already extracted prebuilt" >&2
echo -e " tools to correctly use them and skip" >&2
echo -e " recompilation.\n" >&2
echo -e " $me --help" >&2
echo -e " Display this help text and exit.\n\n" >&2
exit 1

2
scripts/json_add_image_info.py
View File

@ -21,7 +21,7 @@ if not file_path.is_file():
def get_titles():
titles = []
for prefix in ["", "ALT0_", "ALT1_", "ALT2_"]:
for prefix in ["", "ALT0_", "ALT1_", "ALT2_", "ALT3_", "ALT4_"]:
title = {}
for var in ["vendor", "model", "variant"]:
if getenv("DEVICE_{}{}".format(prefix, var.upper())):

4
target/linux/apm821xx/patches-5.10/802-usb-xhci-force-msi-renesas-xhci.patch
View File

@ -13,7 +13,7 @@ produce a noisy warning.
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -276,6 +276,7 @@ static void xhci_pci_quirks(struct devic
@@ -279,6 +279,7 @@ static void xhci_pci_quirks(struct devic
pdev->device == 0x0015) {
xhci->quirks |= XHCI_RESET_ON_RESUME;
xhci->quirks |= XHCI_ZERO_64B_REGS;
@ -43,7 +43,7 @@ produce a noisy warning.
hcd->msi_enabled = 1;
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1897,6 +1897,7 @@ struct xhci_hcd {
@@ -1902,6 +1902,7 @@ struct xhci_hcd {
struct xhci_hub usb2_rhub;
struct xhci_hub usb3_rhub;
/* support xHCI 1.0 spec USB2 hardware LPM */

8
target/linux/ath79/dts/qca9558_netgear_ex6400.dts
View File

@ -1,8 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9558_netgear_ex7300.dtsi"
/ {
model = "Netgear EX6400";
compatible = "netgear,ex6400", "qca,qca9558";
};

240
target/linux/ath79/dts/qca9558_netgear_ex7300.dts
View File

@ -1,8 +1,246 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9558_netgear_ex7300.dtsi"
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Netgear EX7300";
compatible = "netgear,ex7300", "qca,qca9558";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_amber;
led-running = &led_power_green;
led-upgrade = &led_power_amber;
label-mac-device = &eth0;
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
led_gpio: led_gpio@0 {
compatible = "nxp,74lvc594";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
spi-max-frequency = <500000>;
gpio_latch_bit {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "gpio-latch-bit";
};
};
};
leds {
compatible = "gpio-leds";
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
};
led_power_amber: power_amber {
label = "amber:power";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
left_blue {
label = "blue:left";
gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
};
right_blue {
label = "blue:right";
gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
};
wps_green {
label = "green:wps";
gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
};
client_red {
label = "red:client";
gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
};
client_green {
label = "green:client";
gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
};
router_red {
label = "red:router";
gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
};
router_green {
label = "green:router";
gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
extender_apmode {
label = "EXTENDER/APMODE switch";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
};
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0 0 0 0 0>;
nvmem-cells = <&macaddr_caldata_c>, <&precal_caldata_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
caldata: partition@50000 {
label = "caldata";
reg = <0x050000 0x010000>;
read-only;
};
partition@60000 {
label = "caldata-backup";
reg = <0x060000 0x010000>;
read-only;
};
partition@70000 {
label = "config";
reg = <0x070000 0x010000>;
};
partition@80000 {
label = "pot";
reg = <0x080000 0x010000>;
};
partition@90000 {
label = "firmware";
reg = <0x090000 0xf30000>;
compatible = "denx,uimage";
};
partition@fc0000 {
label = "language";
reg = <0xfc0000 0x040000>;
};
};
};
};
&wmac {
status = "okay";
nvmem-cells = <&macaddr_caldata_6>, <&cal_caldata_1000>;
nvmem-cell-names = "mac-address", "calibration";
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
&eth0 {
status = "okay";
nvmem-cells = <&macaddr_caldata_0>;
nvmem-cell-names = "mac-address";
phy-handle = <&phy4>;
phy-mode = "rgmii-rxid";
pll-data = <0x86000000 0x80000101 0x80001313>;
};
&caldata {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_caldata_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_caldata_6: macaddr@6 {
reg = <0x6 0x6>;
};
macaddr_caldata_c: macaddr@c {
reg = <0xc 0x6>;
};
cal_caldata_1000: cal@1000 {
reg = <0x1000 0x440>;
};
precal_caldata_5000: precal@5000 {
reg = <0x5000 0x2f20>;
};
};

224
target/linux/ath79/dts/qca9558_netgear_ex7300.dtsi
View File

@ -1,224 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_amber;
led-running = &led_power_green;
led-upgrade = &led_power_amber;
label-mac-device = &eth0;
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
led_gpio: led_gpio@0 {
compatible = "nxp,74lvc594";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
spi-max-frequency = <500000>;
gpio_latch_bit {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "gpio-latch-bit";
};
};
};
leds {
compatible = "gpio-leds";
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
};
led_power_amber: power_amber {
label = "amber:power";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
left_blue {
label = "blue:left";
gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
};
right_blue {
label = "blue:right";
gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
};
wps_green {
label = "green:wps";
gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
};
client_red {
label = "red:client";
gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
};
client_green {
label = "green:client";
gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
};
router_red {
label = "red:router";
gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
};
router_green {
label = "green:router";
gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
extender_apmode {
label = "EXTENDER/APMODE switch";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
};
};
&pcie0 {
status = "okay";
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
caldata: partition@50000 {
label = "caldata";
reg = <0x050000 0x010000>;
read-only;
};
partition@60000 {
label = "caldata-backup";
reg = <0x060000 0x010000>;
read-only;
};
partition@70000 {
label = "config";
reg = <0x070000 0x010000>;
};
partition@80000 {
label = "pot";
reg = <0x080000 0x010000>;
};
partition@90000 {
label = "firmware";
reg = <0x090000 0xf30000>;
compatible = "denx,uimage";
};
partition@fc0000 {
label = "language";
reg = <0xfc0000 0x040000>;
};
};
};
};
&wmac {
status = "okay";
mtd-cal-data = <&caldata 0x1000>;
nvmem-cells = <&macaddr_caldata_6>;
nvmem-cell-names = "mac-address";
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
&eth0 {
status = "okay";
nvmem-cells = <&macaddr_caldata_0>;
nvmem-cell-names = "mac-address";
phy-handle = <&phy4>;
phy-mode = "rgmii-rxid";
pll-data = <0x86000000 0x80000101 0x80001313>;
};
&caldata {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_caldata_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_caldata_6: macaddr@6 {
reg = <0x6 0x6>;
};
};

1
target/linux/ath79/generic/base-files/etc/board.d/02_network
View File

@ -50,7 +50,6 @@ ath79_setup_interfaces()
glinet,gl-usb150|\
hak5,wifi-pineapple-nano|\
meraki,mr16|\
netgear,ex6400|\
netgear,ex7300|\
netgear,ex7300-v2|\
netgear,wndap360|\

5
target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
View File

@ -216,11 +216,6 @@ case "$FIRMWARE" in
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
;;
netgear,ex6400|\
netgear,ex7300)
caldata_extract "caldata" 0x5000 0x2f20
ath10k_patch_mac $(mtd_get_mac_binary caldata 0xc)
;;
phicomm,k2t)
caldata_extract "art" 0x5000 0x2f20
ath10k_patch_mac $(k2t_get_mac "5g_mac")

42
target/linux/ath79/generic/base-files/lib/preinit/02_sysinfo_fixup Normal file
View File

@ -0,0 +1,42 @@
. /lib/functions.sh
do_sysinfo_ath79_fixup() {
local model=""
case $(board_name) in
netgear,ex7300)
local part=$(find_mtd_part caldata)
local board_hw_id=$(dd if=$part bs=1 skip=67 count=10 2>/dev/null)
case "$board_hw_id" in
5508013406)
model="Netgear EX6400"
;;
5508013271)
model="Netgear EX7300"
;;
esac
;;
netgear,ex7300-v2)
local part=$(find_mtd_part artmtd)
local antenna_cfg=$(dd if=$part bs=1 skip=59 count=7 2>/dev/null)
local board_hw_id=$(dd if=$part bs=1 skip=67 count=6 2>/dev/null)
case "$antenna_cfg" in
3X3+3X3)
model="Netgear EX6250"
;;
3X3+4X4)
# EX6400 v2, EX6410, EX6420
model="Netgear ${board_hw_id:-EX6400 v2}"
;;
4X4+4X4)
# EX7300 v2, EX7320
model="Netgear ${board_hw_id:-EX7300 v2}"
;;
esac
;;
esac
[ -n "$model" ] && echo "$model" > /tmp/sysinfo/model
}
boot_hook_add preinit_main do_sysinfo_ath79_fixup

36
target/linux/ath79/image/generic.mk
View File

@ -1734,41 +1734,45 @@ define Device/nec_wg800hp
endef
TARGET_DEVICES += nec_wg800hp
define Device/netgear_ex6400_ex7300
$(Device/netgear_generic)
define Device/netgear_ex7300
SOC := qca9558
UIMAGE_MAGIC := 0x27051956
DEVICE_VENDOR := NETGEAR
DEVICE_MODEL := EX7300
DEVICE_ALT0_VENDOR := NETGEAR
DEVICE_ALT0_MODEL := EX6400
NETGEAR_BOARD_ID := EX7300series
NETGEAR_HW_ID := 29765104+16+0+128
IMAGE_SIZE := 15552k
IMAGES += factory.img
IMAGE/default := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | \
netgear-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := $$(IMAGE/default) | check-size | append-metadata
IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca99x0-ct
endef
define Device/netgear_ex6400
$(Device/netgear_ex6400_ex7300)
DEVICE_MODEL := EX6400
endef
TARGET_DEVICES += netgear_ex6400
define Device/netgear_ex7300
$(Device/netgear_ex6400_ex7300)
DEVICE_MODEL := EX7300
SUPPORTED_DEVICES += netgear,ex6400
endef
TARGET_DEVICES += netgear_ex7300
define Device/netgear_ex7300-v2
$(Device/netgear_generic)
SOC := qcn5502
DEVICE_VENDOR := NETGEAR
DEVICE_MODEL := EX7300
DEVICE_VARIANT := v2
UIMAGE_MAGIC := 0x27051956
DEVICE_ALT0_VENDOR := NETGEAR
DEVICE_ALT0_MODEL := EX6250
DEVICE_ALT1_VENDOR := NETGEAR
DEVICE_ALT1_MODEL := EX6400
DEVICE_ALT1_VARIANT := v2
DEVICE_ALT2_VENDOR := NETGEAR
DEVICE_ALT2_MODEL := EX6410
DEVICE_ALT3_VENDOR := NETGEAR
DEVICE_ALT3_MODEL := EX6420
DEVICE_ALT4_VENDOR := NETGEAR
DEVICE_ALT4_MODEL := EX7320
NETGEAR_BOARD_ID := EX7300v2series
NETGEAR_HW_ID := 29765907+16+0+128
IMAGE_SIZE := 14528k
IMAGES += factory.img
IMAGE/default := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | \
netgear-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := $$(IMAGE/default) | check-size | append-metadata

2
target/linux/bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
View File

@ -127,7 +127,7 @@ it on BCM4708 family.
/*
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1890,6 +1890,7 @@ struct xhci_hcd {
@@ -1895,6 +1895,7 @@ struct xhci_hcd {
#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
#define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43)
#define XHCI_RESET_TO_DEFAULT BIT_ULL(44)

44
target/linux/generic/backport-5.10/828-v6.3-of-property-fix-nvmem-cell-cells-parsing.patch Normal file
View File

@ -0,0 +1,44 @@
From ef26c0349eb5a615dab2272d08d1d5de4ac9cd4c Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Wed, 11 Jan 2023 00:30:56 +0100
Subject: [PATCH] of: property: fix #nvmem-cell-cells parsing
Commit 67b8497f005f ("of: property: make #.*-cells optional for simple
props") claims to make the cells-name property optional for simple
properties, but changed the code for the wrong property, i.e. for
DEFINE_SUFFIX_PROP(). Fix that.
Fixes: 67b8497f005f ("of: property: make #.*-cells optional for simple props")
Reported-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/of/property.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/of/property.c
+++ b/drivers/of/property.c
@@ -1213,8 +1213,8 @@ static struct device_node *parse_prop_ce
if (strcmp(prop_name, list_name))
return NULL;
- if (of_parse_phandle_with_args(np, list_name, cells_name, index,
- &sup_args))
+ if (__of_parse_phandle_with_args(np, list_name, cells_name, 0, index,
+ &sup_args))
return NULL;
return sup_args.np;
@@ -1267,8 +1267,8 @@ static struct device_node *parse_suffix_
if (strcmp_suffix(prop_name, suffix))
return NULL;
- if (__of_parse_phandle_with_args(np, prop_name, cells_name, 0, index,
- &sup_args))
+ if (of_parse_phandle_with_args(np, prop_name, cells_name, index,
+ &sup_args))
return NULL;
return sup_args.np;

44
target/linux/generic/backport-5.15/828-v6.3-of-property-fix-nvmem-cell-cells-parsing.patch Normal file
View File

@ -0,0 +1,44 @@
From ef26c0349eb5a615dab2272d08d1d5de4ac9cd4c Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Wed, 11 Jan 2023 00:30:56 +0100
Subject: [PATCH] of: property: fix #nvmem-cell-cells parsing
Commit 67b8497f005f ("of: property: make #.*-cells optional for simple
props") claims to make the cells-name property optional for simple
properties, but changed the code for the wrong property, i.e. for
DEFINE_SUFFIX_PROP(). Fix that.
Fixes: 67b8497f005f ("of: property: make #.*-cells optional for simple props")
Reported-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/of/property.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/of/property.c
+++ b/drivers/of/property.c
@@ -1173,8 +1173,8 @@ static struct device_node *parse_prop_ce
if (strcmp(prop_name, list_name))
return NULL;
- if (of_parse_phandle_with_args(np, list_name, cells_name, index,
- &sup_args))
+ if (__of_parse_phandle_with_args(np, list_name, cells_name, 0, index,
+ &sup_args))
return NULL;
return sup_args.np;
@@ -1227,8 +1227,8 @@ static struct device_node *parse_suffix_
if (strcmp_suffix(prop_name, suffix))
return NULL;
- if (__of_parse_phandle_with_args(np, prop_name, cells_name, 0, index,
- &sup_args))
+ if (of_parse_phandle_with_args(np, prop_name, cells_name, index,
+ &sup_args))
return NULL;
return sup_args.np;

2
target/linux/generic/hack-5.10/780-usb-net-MeigLink_modem_support.patch
View File

@ -33,7 +33,7 @@ Submitted-by: Daniel Golle <daniel@makrotopia.org>
#define QUECTEL_VENDOR_ID 0x2c7c
/* These Quectel products use Quectel's vendor ID */
@@ -1156,6 +1158,11 @@ static const struct usb_device_id option
@@ -1162,6 +1164,11 @@ static const struct usb_device_id option
.driver_info = ZLP },
{ USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
.driver_info = RSVD(4) },

2
target/linux/pistachio/Makefile
View File

@ -12,7 +12,7 @@ CPU_TYPE:=24kc
CPU_SUBTYPE:=24kf
SUBTARGETS:=generic
KERNEL_PATCHVER:=5.10
KERNEL_PATCHVER:=5.15
include $(INCLUDE_DIR)/target.mk

344
target/linux/pistachio/config-5.15 Normal file
View File

@ -0,0 +1,344 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
# CONFIG_BOARD_INGENIC is not set
CONFIG_BOARD_SCACHE=y
CONFIG_BUILTIN_DTB=y
CONFIG_CEVT_R4K=y
CONFIG_CLKSRC_MIPS_GIC=y
CONFIG_CLKSRC_PISTACHIO=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_PISTACHIO=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONNECTOR=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
# CONFIG_CPU_HAS_SMARTMIPS is not set
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_MICROMIPS is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS32_R6 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
# CONFIG_CPU_MIPS64_R6 is not set
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_PM=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRC16=y
CONFIG_CRC_CCITT=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_OF=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DTC=y
CONFIG_DWMAC_GENERIC=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
# CONFIG_FIT_IMAGE_FDT_BOSTON is not set
# CONFIG_FIT_IMAGE_FDT_JAGUAR2 is not set
# CONFIG_FIT_IMAGE_FDT_LUTON is not set
CONFIG_FIT_IMAGE_FDT_MARDUK=y
# CONFIG_FIT_IMAGE_FDT_NI169445 is not set
# CONFIG_FIT_IMAGE_FDT_OCELOT is not set
# CONFIG_FIT_IMAGE_FDT_SERVAL is not set
# CONFIG_FIT_IMAGE_FDT_XILFPGA is not set
CONFIG_FIXED_PHY=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_IMG=y
CONFIG_IMGPDC_WDT=y
CONFIG_IMG_MDC_DMA=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
# CONFIG_LEGACY_BOARD_OCELOT is not set
# CONFIG_LEGACY_BOARD_SEAD3 is not set
CONFIG_LIBFDT=y
CONFIG_LKDTM=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_SYSCON=y
CONFIG_MICREL_PHY=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_AUTO_PFN_OFFSET=y
CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CM=y
CONFIG_MIPS_CMDLINE_DTB_EXTEND=y
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CPC=y
CONFIG_MIPS_CPS=y
# CONFIG_MIPS_CPS_CPUIDLE is not set
# CONFIG_MIPS_CPS_NS16550_BOOL is not set
CONFIG_MIPS_CPS_PM=y
CONFIG_MIPS_CPU_SCACHE=y
CONFIG_MIPS_EBPF_JIT=y
CONFIG_MIPS_GENERIC=y
CONFIG_MIPS_GENERIC_KERNEL=y
CONFIG_MIPS_GIC=y
CONFIG_MIPS_L1_CACHE_SHIFT=7
CONFIG_MIPS_L1_CACHE_SHIFT_7=y
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
CONFIG_MIPS_MT=y
CONFIG_MIPS_MT_FPAFF=y
CONFIG_MIPS_MT_SMP=y
CONFIG_MIPS_NO_APPENDED_DTB=y
CONFIG_MIPS_NR_CPU_NR_MAP=4
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_DW=y
# CONFIG_MMC_DW_BLUEFIELD is not set
# CONFIG_MMC_DW_EXYNOS is not set
# CONFIG_MMC_DW_HI3798CV200 is not set
# CONFIG_MMC_DW_K3 is not set
CONFIG_MMC_DW_PLTFM=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NAMESPACES=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_NS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PCI_DRIVERS_GENERIC=y
CONFIG_PCS_XPCS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PHY_PISTACHIO_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_PISTACHIO=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
CONFIG_PRINTK_TIME=y
CONFIG_PROC_EVENTS=y
CONFIG_PROFILING=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_IMG=y
CONFIG_PWM_SYSFS=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_PISTACHIO=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_SCHEDSTATS=y
CONFIG_SCHED_INFO=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_SC16IS7XX=y
CONFIG_SERIAL_SC16IS7XX_CORE=y
# CONFIG_SERIAL_SC16IS7XX_I2C is not set
CONFIG_SERIAL_SC16IS7XX_SPI=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SPI=y
CONFIG_SPI_IMG_SPFI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SRAM=y
CONFIG_SRCU=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_CPU_MIPS32_R6=y
CONFIG_SYS_HAS_CPU_MIPS64_R1=y
CONFIG_SYS_HAS_CPU_MIPS64_R2=y
CONFIG_SYS_HAS_CPU_MIPS64_R6=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_MICROMIPS=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_SYS_SUPPORTS_RELOCATABLE=y
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
CONFIG_SYS_SUPPORTS_SMARTMIPS=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_TARGET_ISA_REV=2
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UHI_BOOT=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC2_DUAL_ROLE=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_GADGET=y
CONFIG_USB_ROLE_SWITCH=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USER_NS=y
CONFIG_USE_OF=y
# CONFIG_VIRT_BOARD_RANCHU is not set
CONFIG_WATCHDOG_CORE=y
CONFIG_WEAK_ORDERING=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

4
target/linux/pistachio/image/Makefile
View File

@ -5,7 +5,11 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
ifdef CONFIG_LINUX_5_10
KERNEL_LOADADDR := 0x80400000
else
KERNEL_LOADADDR := 0x80100000
endif
define Device/Default
PROFILES := Default

68
target/linux/pistachio/patches-5.15/101-dmaengine-img-mdc-Handle-early-status-read.patch Normal file
View File

@ -0,0 +1,68 @@
From a2dd154377c9aa6ddda00d39b8c7c334e4fa16ff Mon Sep 17 00:00:00 2001
From: Damien Horsley <damien.horsley@imgtec.com>
Date: Tue, 22 Mar 2016 12:46:09 +0000
Subject: dmaengine: img-mdc: Handle early status read
It is possible that mdc_tx_status may be called before the first
node has been read from memory.
In this case, the residue value stored in the register is undefined.
Return the transfer size instead.
Signed-off-by: Damien Horsley <damien.horsley@imgtec.com>
---
drivers/dma/img-mdc-dma.c | 40 ++++++++++++++++++++++++----------------
1 file changed, 24 insertions(+), 16 deletions(-)
--- a/drivers/dma/img-mdc-dma.c
+++ b/drivers/dma/img-mdc-dma.c
@@ -618,25 +618,33 @@ static enum dma_status mdc_tx_status(str
(MDC_CMDS_PROCESSED_CMDS_DONE_MASK + 1);
/*
- * If the command loaded event hasn't been processed yet, then
- * the difference above includes an extra command.
+ * If the first node has not yet been read from memory,
+ * the residue register value is undefined
*/
- if (!mdesc->cmd_loaded)
- cmds--;
- else
- cmds += mdesc->list_cmds_done;
-
- bytes = mdesc->list_xfer_size;
- ldesc = mdesc->list;
- for (i = 0; i < cmds; i++) {
- bytes -= ldesc->xfer_size + 1;
- ldesc = ldesc->next_desc;
- }
- if (ldesc) {
- if (residue != MDC_TRANSFER_SIZE_MASK)
- bytes -= ldesc->xfer_size - residue;
+ if (!mdesc->cmd_loaded && !cmds) {
+ bytes = mdesc->list_xfer_size;
+ } else {
+ /*
+ * If the command loaded event hasn't been processed yet, then
+ * the difference above includes an extra command.
+ */
+ if (!mdesc->cmd_loaded)
+ cmds--;
else
+ cmds += mdesc->list_cmds_done;
+
+ bytes = mdesc->list_xfer_size;
+ ldesc = mdesc->list;
+ for (i = 0; i < cmds; i++) {
bytes -= ldesc->xfer_size + 1;
+ ldesc = ldesc->next_desc;
+ }
+ if (ldesc) {
+ if (residue != MDC_TRANSFER_SIZE_MASK)
+ bytes -= ldesc->xfer_size - residue;
+ else
+ bytes -= ldesc->xfer_size + 1;
+ }
}
}
spin_unlock_irqrestore(&mchan->vc.lock, flags);

198
target/linux/pistachio/patches-5.15/102-spi-img-spfi-Implement-dual-and-quad-mode.patch Normal file
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@ -0,0 +1,198 @@
From cd2a6af51553d38072cd31699b58d16ca6176ef5 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Thu, 2 Feb 2017 16:46:14 +0000
Subject: spi: img-spfi: Implement dual and quad mode
For dual and quad modes to work the SPFI controller needs
to have information about command/address/dummy bytes in the
transaction register. This information is not relevant for
single mode, and therefore it can have any value in the
allowed range. Therefore, for any read or write transfers of less
than 8 bytes (cmd = 1 byte, addr up to 7 bytes), SPFI will be
configured, but not enabled (unless it is the last transfer in
the queue). The transfer will be enabled by the subsequent tranfer.
A pending transfer is determined by the content of the transaction
register: if command part is set and tsize is not.
This way we ensure that for dual and quad transactions
the command request size will apear in the command/address part
of the transaction register, while the data size will be in
tsize, all data being sent/received in the same transaction (as
set up in the transaction register).
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 96 ++++++++++++++++++++++++++++++++++++++++------
1 file changed, 85 insertions(+), 11 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -36,7 +36,8 @@
#define SPFI_CONTROL_SOFT_RESET BIT(11)
#define SPFI_CONTROL_SEND_DMA BIT(10)
#define SPFI_CONTROL_GET_DMA BIT(9)
-#define SPFI_CONTROL_SE BIT(8)
+#define SPFI_CONTROL_SE BIT(8)
+#define SPFI_CONTROL_TX_RX BIT(1)
#define SPFI_CONTROL_TMODE_SHIFT 5
#define SPFI_CONTROL_TMODE_MASK 0x7
#define SPFI_CONTROL_TMODE_SINGLE 0
@@ -47,6 +48,10 @@
#define SPFI_TRANSACTION 0x18
#define SPFI_TRANSACTION_TSIZE_SHIFT 16
#define SPFI_TRANSACTION_TSIZE_MASK 0xffff
+#define SPFI_TRANSACTION_CMD_SHIFT 13
+#define SPFI_TRANSACTION_CMD_MASK 0x7
+#define SPFI_TRANSACTION_ADDR_SHIFT 10
+#define SPFI_TRANSACTION_ADDR_MASK 0x7
#define SPFI_PORT_STATE 0x1c
#define SPFI_PORT_STATE_DEV_SEL_SHIFT 20
@@ -83,6 +88,7 @@
*/
#define SPFI_32BIT_FIFO_SIZE 64
#define SPFI_8BIT_FIFO_SIZE 16
+#define SPFI_DATA_REQUEST_MAX_SIZE 8
struct img_spfi {
struct device *dev;
@@ -99,6 +105,8 @@ struct img_spfi {
struct dma_chan *tx_ch;
bool tx_dma_busy;
bool rx_dma_busy;
+
+ bool complete;
};
static inline u32 spfi_readl(struct img_spfi *spfi, u32 reg)
@@ -115,9 +123,11 @@ static inline void spfi_start(struct img
{
u32 val;
- val = spfi_readl(spfi, SPFI_CONTROL);
- val |= SPFI_CONTROL_SPFI_EN;
- spfi_writel(spfi, val, SPFI_CONTROL);
+ if (spfi->complete) {
+ val = spfi_readl(spfi, SPFI_CONTROL);
+ val |= SPFI_CONTROL_SPFI_EN;
+ spfi_writel(spfi, val, SPFI_CONTROL);
+ }
}
static inline void spfi_reset(struct img_spfi *spfi)
@@ -130,12 +140,21 @@ static int spfi_wait_all_done(struct img
{
unsigned long timeout = jiffies + msecs_to_jiffies(50);
+ if (!(spfi->complete))
+ return 0;
+
while (time_before(jiffies, timeout)) {
u32 status = spfi_readl(spfi, SPFI_INTERRUPT_STATUS);
if (status & SPFI_INTERRUPT_ALLDONETRIG) {
spfi_writel(spfi, SPFI_INTERRUPT_ALLDONETRIG,
SPFI_INTERRUPT_CLEAR);
+ /*
+ * Disable SPFI for it not to interfere with
+ * pending transactions
+ */
+ spfi_writel(spfi, spfi_readl(spfi, SPFI_CONTROL)
+ & ~SPFI_CONTROL_SPFI_EN, SPFI_CONTROL);
return 0;
}
cpu_relax();
@@ -441,9 +460,32 @@ static void img_spfi_config(struct spi_m
struct spi_transfer *xfer)
{
struct img_spfi *spfi = spi_master_get_devdata(spi->master);
- u32 val, div;
+ u32 val, div, transact;
+ bool is_pending;
/*
+ * For read or write transfers of less than 8 bytes (cmd = 1 byte,
+ * addr up to 7 bytes), SPFI will be configured, but not enabled
+ * (unless it is the last transfer in the queue).The transfer will
+ * be enabled by the subsequent transfer.
+ * A pending transfer is determined by the content of the
+ * transaction register: if command part is set and tsize
+ * is not
+ */
+ transact = spfi_readl(spfi, SPFI_TRANSACTION);
+ is_pending = ((transact >> SPFI_TRANSACTION_CMD_SHIFT) &
+ SPFI_TRANSACTION_CMD_MASK) &&
+ (!((transact >> SPFI_TRANSACTION_TSIZE_SHIFT) &
+ SPFI_TRANSACTION_TSIZE_MASK));
+
+ /* If there are no pending transactions it's OK to soft reset */
+ if (!is_pending) {
+ /* Start the transaction from a known (reset) state */
+ spfi_reset(spfi);
+ }
+
+ /*
+ * Before anything else, set up parameters.
* output = spfi_clk * (BITCLK / 512), where BITCLK must be a
* power of 2 up to 128
*/
@@ -456,20 +498,52 @@ static void img_spfi_config(struct spi_m
val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select));
- spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT,
- SPFI_TRANSACTION);
+ if (!list_is_last(&xfer->transfer_list, &master->cur_msg->transfers) &&
+ /*
+ * For duplex mode (both the tx and rx buffers are !NULL) the
+ * CMD, ADDR, and DUMMY byte parts of the transaction register
+ * should always be 0 and therefore the pending transfer
+ * technique cannot be used.
+ */
+ (xfer->tx_buf) && (!xfer->rx_buf) &&
+ (xfer->len <= SPFI_DATA_REQUEST_MAX_SIZE) && !is_pending) {
+ transact = (1 & SPFI_TRANSACTION_CMD_MASK) <<
+ SPFI_TRANSACTION_CMD_SHIFT;
+ transact |= ((xfer->len - 1) & SPFI_TRANSACTION_ADDR_MASK) <<
+ SPFI_TRANSACTION_ADDR_SHIFT;
+ spfi->complete = false;
+ } else {
+ spfi->complete = true;
+ if (is_pending) {
+ /* Keep setup from pending transfer */
+ transact |= ((xfer->len & SPFI_TRANSACTION_TSIZE_MASK) <<
+ SPFI_TRANSACTION_TSIZE_SHIFT);
+ } else {
+ transact = ((xfer->len & SPFI_TRANSACTION_TSIZE_MASK) <<
+ SPFI_TRANSACTION_TSIZE_SHIFT);
+ }
+ }
+ spfi_writel(spfi, transact, SPFI_TRANSACTION);
val = spfi_readl(spfi, SPFI_CONTROL);
val &= ~(SPFI_CONTROL_SEND_DMA | SPFI_CONTROL_GET_DMA);
- if (xfer->tx_buf)
+ /*
+ * We set up send DMA for pending transfers also, as
+ * those are always send transfers
+ */
+ if ((xfer->tx_buf) || is_pending)
val |= SPFI_CONTROL_SEND_DMA;
- if (xfer->rx_buf)
+ if (xfer->tx_buf)
+ val |= SPFI_CONTROL_TX_RX;
+ if (xfer->rx_buf) {
val |= SPFI_CONTROL_GET_DMA;
+ val &= ~SPFI_CONTROL_TX_RX;
+ }
val &= ~(SPFI_CONTROL_TMODE_MASK << SPFI_CONTROL_TMODE_SHIFT);
- if (xfer->tx_nbits == SPI_NBITS_DUAL &&
+ if (xfer->tx_nbits == SPI_NBITS_DUAL ||
xfer->rx_nbits == SPI_NBITS_DUAL)
val |= SPFI_CONTROL_TMODE_DUAL << SPFI_CONTROL_TMODE_SHIFT;
- else if (xfer->tx_nbits == SPI_NBITS_QUAD &&
+ else if (xfer->tx_nbits == SPI_NBITS_QUAD ||
xfer->rx_nbits == SPI_NBITS_QUAD)
val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT;
val |= SPFI_CONTROL_SE;

64
target/linux/pistachio/patches-5.15/104-spi-img-spfi-use-device-0-configuration-for-all-devi.patch Normal file
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@ -0,0 +1,64 @@
From 905ee06a9966113fe51d6bad1819759cb30fd0bd Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Tue, 9 Feb 2016 10:18:31 +0000
Subject: spi: img-spfi: use device 0 configuration for all devices
Given that we control the chip select line externally
we can use only one parameter register (device 0 parameter
register) and one set of configuration bits (port configuration
bits for device 0) for all devices (all chip select lines).
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 23 ++++++++++++++++-------
1 file changed, 16 insertions(+), 7 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -429,18 +429,23 @@ static int img_spfi_prepare(struct spi_m
struct img_spfi *spfi = spi_master_get_devdata(master);
u32 val;
+ /*
+ * The chip select line is controlled externally so
+ * we can use the CS0 configuration for all devices
+ */
val = spfi_readl(spfi, SPFI_PORT_STATE);
+
+ /* 0 for device selection */
val &= ~(SPFI_PORT_STATE_DEV_SEL_MASK <<
SPFI_PORT_STATE_DEV_SEL_SHIFT);
- val |= msg->spi->chip_select << SPFI_PORT_STATE_DEV_SEL_SHIFT;
if (msg->spi->mode & SPI_CPHA)
- val |= SPFI_PORT_STATE_CK_PHASE(msg->spi->chip_select);
+ val |= SPFI_PORT_STATE_CK_PHASE(0);
else
- val &= ~SPFI_PORT_STATE_CK_PHASE(msg->spi->chip_select);
+ val &= ~SPFI_PORT_STATE_CK_PHASE(0);
if (msg->spi->mode & SPI_CPOL)
- val |= SPFI_PORT_STATE_CK_POL(msg->spi->chip_select);
+ val |= SPFI_PORT_STATE_CK_POL(0);
else
- val &= ~SPFI_PORT_STATE_CK_POL(msg->spi->chip_select);
+ val &= ~SPFI_PORT_STATE_CK_POL(0);
spfi_writel(spfi, val, SPFI_PORT_STATE);
return 0;
@@ -492,11 +497,15 @@ static void img_spfi_config(struct spi_m
div = DIV_ROUND_UP(clk_get_rate(spfi->spfi_clk), xfer->speed_hz);
div = clamp(512 / (1 << get_count_order(div)), 1, 128);
- val = spfi_readl(spfi, SPFI_DEVICE_PARAMETER(spi->chip_select));
+ /*
+ * The chip select line is controlled externally so
+ * we can use the CS0 parameters for all devices
+ */
+ val = spfi_readl(spfi, SPFI_DEVICE_PARAMETER(0));
val &= ~(SPFI_DEVICE_PARAMETER_BITCLK_MASK <<
SPFI_DEVICE_PARAMETER_BITCLK_SHIFT);
val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
- spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select));
+ spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(0));
if (!list_is_last(&xfer->transfer_list, &master->cur_msg->transfers) &&
/*

59
target/linux/pistachio/patches-5.15/105-spi-img-spfi-RX-maximum-burst-size-for-DMA-is-8.patch Normal file
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@ -0,0 +1,59 @@
From 56466f505f58f44b69feb7eaed3b506842800456 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Tue, 1 Mar 2016 17:49:45 +0000
Subject: spi: img-spfi: RX maximum burst size for DMA is 8
The depth of the FIFOs is 16 bytes. The DMA request line is tied
to the half full/empty (depending on the use of the TX or RX FIFO)
threshold. For the TX FIFO, if you set a burst size of 8 (equal to
half the depth) the first burst goes into FIFO without any issues,
but due the latency involved (the time the data leaves the DMA
engine to the time it arrives at the FIFO), the DMA might trigger
another burst of 8. But given that there is no space for 2 additonal
bursts of 8, this would result in a failure. Therefore, we have to
keep the burst size for TX to 4 to accomodate for an extra burst.
For the read (RX) scenario, the DMA request line goes high when
there is at least 8 entries in the FIFO (half full), and we can
program the burst size to be 8 because the risk of accidental burst
does not exist. The DMA engine will not trigger another read until
the read data for all the burst it has sent out has been received.
While here, move the burst size setting outside of the if/else branches
as they have the same value for both 8 and 32 bit data widths.
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -338,12 +338,11 @@ static int img_spfi_start_dma(struct spi
if (xfer->len % 4 == 0) {
rxconf.src_addr = spfi->phys + SPFI_RX_32BIT_VALID_DATA;
rxconf.src_addr_width = 4;
- rxconf.src_maxburst = 4;
} else {
rxconf.src_addr = spfi->phys + SPFI_RX_8BIT_VALID_DATA;
rxconf.src_addr_width = 1;
- rxconf.src_maxburst = 4;
}
+ rxconf.src_maxburst = 8;
dmaengine_slave_config(spfi->rx_ch, &rxconf);
rxdesc = dmaengine_prep_slave_sg(spfi->rx_ch, xfer->rx_sg.sgl,
@@ -362,12 +361,11 @@ static int img_spfi_start_dma(struct spi
if (xfer->len % 4 == 0) {
txconf.dst_addr = spfi->phys + SPFI_TX_32BIT_VALID_DATA;
txconf.dst_addr_width = 4;
- txconf.dst_maxburst = 4;
} else {
txconf.dst_addr = spfi->phys + SPFI_TX_8BIT_VALID_DATA;
txconf.dst_addr_width = 1;
- txconf.dst_maxburst = 4;
}
+ txconf.dst_maxburst = 4;
dmaengine_slave_config(spfi->tx_ch, &txconf);
txdesc = dmaengine_prep_slave_sg(spfi->tx_ch, xfer->tx_sg.sgl,

120
target/linux/pistachio/patches-5.15/106-spi-img-spfi-finish-every-transfer-cleanly.patch Normal file
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@ -0,0 +1,120 @@
From 5fcca3fd4b621d7b5bdeca18d36dfc6ca6cfe383 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Wed, 10 Aug 2016 11:42:26 +0100
Subject: spi: img-spfi: finish every transfer cleanly
Before this change, the interrupt status bit that signaled
the end of a tranfers was cleared in the wait_all_done
function. That functionality triggered issues for DMA
duplex transactions where the wait function was called
twice, in both the TX and RX callbacks.
In order to fix the issue, clear all interrupt data bits
at the end of a PIO transfer or at the end of both TX and RX
duplex transfers, if the transfer is not a pending tranfer
(command waiting for data). After that, the status register
is checked for new incoming data or new data requests to be
signaled. If SPFI finished cleanly, no new interrupt data
bits should be set.
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 49 +++++++++++++++++++++++++++++++++-------------
1 file changed, 35 insertions(+), 14 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -79,6 +79,14 @@
#define SPFI_INTERRUPT_SDE BIT(1)
#define SPFI_INTERRUPT_SDTRIG BIT(0)
+#define SPFI_INTERRUPT_DATA_BITS (SPFI_INTERRUPT_SDHF |\
+ SPFI_INTERRUPT_SDFUL |\
+ SPFI_INTERRUPT_GDEX32BIT |\
+ SPFI_INTERRUPT_GDHF |\
+ SPFI_INTERRUPT_GDFUL |\
+ SPFI_INTERRUPT_ALLDONETRIG |\
+ SPFI_INTERRUPT_GDEX8BIT)
+
/*
* There are four parallel FIFOs of 16 bytes each. The word buffer
* (*_32BIT_VALID_DATA) accesses all four FIFOs at once, resulting in an
@@ -136,6 +144,23 @@ static inline void spfi_reset(struct img
spfi_writel(spfi, 0, SPFI_CONTROL);
}
+static inline void spfi_finish(struct img_spfi *spfi)
+{
+ if (!(spfi->complete))
+ return;
+
+ /* Clear data bits as all transfers(TX and RX) have finished */
+ spfi_writel(spfi, SPFI_INTERRUPT_DATA_BITS, SPFI_INTERRUPT_CLEAR);
+ if (spfi_readl(spfi, SPFI_INTERRUPT_STATUS) & SPFI_INTERRUPT_DATA_BITS) {
+ dev_err(spfi->dev, "SPFI did not finish transfer cleanly.\n");
+ spfi_reset(spfi);
+ }
+ /* Disable SPFI for it not to interfere with pending transactions */
+ spfi_writel(spfi,
+ spfi_readl(spfi, SPFI_CONTROL) & ~SPFI_CONTROL_SPFI_EN,
+ SPFI_CONTROL);
+}
+
static int spfi_wait_all_done(struct img_spfi *spfi)
{
unsigned long timeout = jiffies + msecs_to_jiffies(50);
@@ -144,19 +169,9 @@ static int spfi_wait_all_done(struct img
return 0;
while (time_before(jiffies, timeout)) {
- u32 status = spfi_readl(spfi, SPFI_INTERRUPT_STATUS);
-
- if (status & SPFI_INTERRUPT_ALLDONETRIG) {
- spfi_writel(spfi, SPFI_INTERRUPT_ALLDONETRIG,
- SPFI_INTERRUPT_CLEAR);
- /*
- * Disable SPFI for it not to interfere with
- * pending transactions
- */
- spfi_writel(spfi, spfi_readl(spfi, SPFI_CONTROL)
- & ~SPFI_CONTROL_SPFI_EN, SPFI_CONTROL);
+ if (spfi_readl(spfi, SPFI_INTERRUPT_STATUS) &
+ SPFI_INTERRUPT_ALLDONETRIG)
return 0;
- }
cpu_relax();
}
@@ -288,6 +303,8 @@ static int img_spfi_start_pio(struct spi
}
ret = spfi_wait_all_done(spfi);
+ spfi_finish(spfi);
+
if (ret < 0)
return ret;
@@ -303,8 +320,10 @@ static void img_spfi_dma_rx_cb(void *dat
spin_lock_irqsave(&spfi->lock, flags);
spfi->rx_dma_busy = false;
- if (!spfi->tx_dma_busy)
+ if (!spfi->tx_dma_busy) {
+ spfi_finish(spfi);
spi_finalize_current_transfer(spfi->master);
+ }
spin_unlock_irqrestore(&spfi->lock, flags);
}
@@ -317,8 +336,10 @@ static void img_spfi_dma_tx_cb(void *dat
spin_lock_irqsave(&spfi->lock, flags);
spfi->tx_dma_busy = false;
- if (!spfi->rx_dma_busy)
+ if (!spfi->rx_dma_busy) {
+ spfi_finish(spfi);
spi_finalize_current_transfer(spfi->master);
+ }
spin_unlock_irqrestore(&spfi->lock, flags);
}

49
target/linux/pistachio/patches-5.15/108-clk-pistachio-Fix-wrong-SDHost-card-speed.patch Normal file
View File

@ -0,0 +1,49 @@
From 3642843a06025ec333d7e92580cf52cb8db2a652 Mon Sep 17 00:00:00 2001
From: Govindraj Raja <Govindraj.Raja@imgtec.com>
Date: Fri, 8 Jan 2016 16:36:07 +0000
Subject: clk: pistachio: Fix wrong SDHost card speed
The SDHost currently clocks the card 4x slower than it
should do, because there is fixed divide by 4 in the
sdhost wrapper that is not present in the clock tree.
To model this add a fixed divide by 4 clock node in
the SDHost clock path.
This will ensure the right clock frequency is selected when
the mmc driver tries to configure frequency on card insert.
Signed-off-by: Govindraj Raja <Govindraj.Raja@imgtec.com>
---
drivers/clk/pistachio/clk-pistachio.c | 3 ++-
include/dt-bindings/clock/pistachio-clk.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
--- a/drivers/clk/pistachio/clk-pistachio.c
+++ b/drivers/clk/pistachio/clk-pistachio.c
@@ -41,7 +41,7 @@ static struct pistachio_gate pistachio_g
GATE(CLK_AUX_ADC_INTERNAL, "aux_adc_internal", "sys_internal_div",
0x104, 22),
GATE(CLK_AUX_ADC, "aux_adc", "aux_adc_div", 0x104, 23),
- GATE(CLK_SD_HOST, "sd_host", "sd_host_div", 0x104, 24),
+ GATE(CLK_SD_HOST, "sd_host", "sd_host_div4", 0x104, 24),
GATE(CLK_BT, "bt", "bt_div", 0x104, 25),
GATE(CLK_BT_DIV4, "bt_div4", "bt_div4_div", 0x104, 26),
GATE(CLK_BT_DIV8, "bt_div8", "bt_div8_div", 0x104, 27),
@@ -51,6 +51,7 @@ static struct pistachio_gate pistachio_g
static struct pistachio_fixed_factor pistachio_ffs[] __initdata = {
FIXED_FACTOR(CLK_WIFI_DIV4, "wifi_div4", "wifi_pll", 4),
FIXED_FACTOR(CLK_WIFI_DIV8, "wifi_div8", "wifi_pll", 8),
+ FIXED_FACTOR(CLK_SDHOST_DIV4, "sd_host_div4", "sd_host_div", 4),
};
static struct pistachio_div pistachio_divs[] __initdata = {
--- a/include/dt-bindings/clock/pistachio-clk.h
+++ b/include/dt-bindings/clock/pistachio-clk.h
@@ -18,6 +18,7 @@
/* Fixed-factor clocks */
#define CLK_WIFI_DIV4 16
#define CLK_WIFI_DIV8 17
+#define CLK_SDHOST_DIV4 18
/* Gate clocks */
#define CLK_MIPS 32

47
target/linux/pistachio/patches-5.15/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch Normal file
View File

@ -0,0 +1,47 @@
From 981c1d416af45eff207227aec106381ac23aac99 Mon Sep 17 00:00:00 2001
From: Ian Pozella <Ian.Pozella@imgtec.com>
Date: Mon, 20 Feb 2017 10:00:52 +0000
Subject: MIPS: DTS: img: marduk: switch mmc to 1 bit mode
The mmc block in Pistachio allows 1 to 8 data bits to be used.
Marduk uses 4 bits allowing the upper 4 bits to be allocated
to the Mikrobus ports. However these bits are still connected
internally meaning the mmc block recieves signals on all data lines
and seems the internal HW CRC checks get corrupted by this erroneous
data.
We cannot control what data is sent on these lines because they go
to external ports. 1 bit mode does not exhibit the issue hence the
safe default is to use this. If a user knows that in their use case
they will not use the upper bits then they can set to 4 bit mode in
order to improve performance.
Also make sure that the upper 4 bits don't get allocated to the mmc
driver (the default is to assign all 8 pins) so they can be allocated
to other drivers. Allocating all 4 despite setting 1 bit mode as this
matches what is there in hardware.
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -118,7 +118,7 @@
&sdhost {
status = "okay";
- bus-width = <4>;
+ bus-width = <1>;
disable-wp;
};
@@ -128,6 +128,7 @@
&pin_sdhost_data {
drive-strength = <2>;
+ pins = "mfio17", "mfio18", "mfio19", "mfio20";
};
&pwm {

54
target/linux/pistachio/patches-5.15/401-mtd-nor-support-mtd-name-from-device-tree.patch Normal file
View File

@ -0,0 +1,54 @@
From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001
From: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
Date: Sat, 25 Feb 2017 16:42:50 +0000
Subject: mtd: nor: support mtd name from device tree
Signed-off-by: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
---
drivers/mtd/spi-nor/spi-nor.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3098,6 +3098,7 @@ int spi_nor_scan(struct spi_nor *nor, co
struct device *dev = nor->dev;
struct mtd_info *mtd = &nor->mtd;
struct device_node *np = spi_nor_get_flash_node(nor);
+ const char __maybe_unused *of_mtd_name = NULL;
int ret;
int i;
@@ -3152,7 +3153,12 @@ int spi_nor_scan(struct spi_nor *nor, co
if (ret)
return ret;
- if (!mtd->name)
+#ifdef CONFIG_MTD_OF_PARTS
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+#endif
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ else if (!mtd->name)
mtd->name = dev_name(dev);
mtd->priv = nor;
mtd->type = MTD_NORFLASH;
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -847,6 +847,17 @@ out_error:
*/
static void mtd_set_dev_defaults(struct mtd_info *mtd)
{
+#ifdef CONFIG_MTD_OF_PARTS
+ const char __maybe_unused *of_mtd_name = NULL;
+ struct device_node *np;
+
+ np = mtd_get_of_node(mtd);
+ if (np && !mtd->name) {
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ } else
+#endif
if (mtd->dev.parent) {
if (!mtd->owner && mtd->dev.parent->driver)
mtd->owner = mtd->dev.parent->driver->owner;

30
target/linux/pistachio/patches-5.15/901-MIPS-DTS-img-marduk-Add-SPI-NAND-flash.patch Normal file
View File

@ -0,0 +1,30 @@
From 0023c706f7e0f0f02bd48a63a2f3c04c839532ae Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:04:53 +0200
Subject: [PATCH 901/904] MIPS: DTS: img: marduk: Add SPI NAND flash
Add Gigadevice GD5F4GQ4UCYIGT SPI NAND flash to the device tree.
The NAND flash chip is connected with quad SPI, but reading currently
fails in quad SPI mode.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 6 ++++++
1 file changed, 6 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -89,6 +89,12 @@
reg = <0>;
spi-max-frequency = <50000000>;
};
+
+ flash@1 {
+ compatible = "spi-nand";
+ reg = <1>;
+ spi-max-frequency = <50000000>;
+ };
};
&uart0 {

43
target/linux/pistachio/patches-5.15/902-MIPS-DTS-img-marduk-Add-Cascoda-CA8210-6LoWPAN.patch Normal file
View File

@ -0,0 +1,43 @@
From b7700154d75e8d7c9a2022f09c2d5430137606fa Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:05:25 +0200
Subject: [PATCH 902/904] MIPS: DTS: img: marduk: Add Cascoda CA8210 6LoWPAN
Add Cascoda CA8210 6LoWPAN controller to device tree.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 22 +++++++++++++++++++++
1 file changed, 22 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -76,6 +76,28 @@
VDD-supply = <&internal_dac_supply>;
};
+&spfi0 {
+ status = "okay";
+ pinctrl-0 = <&spim0_pins>, <&spim0_cs0_alt_pin>, <&spim0_cs2_alt_pin>, <&spim0_cs3_alt_pin>, <&spim0_cs4_alt_pin>;
+ pinctrl-names = "default";
+
+ cs-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>, <&gpio0 2 GPIO_ACTIVE_HIGH>,
+ <&gpio1 12 GPIO_ACTIVE_HIGH>, <&gpio1 13 GPIO_ACTIVE_HIGH>;
+
+ ca8210: ca8210@0 {
+ status = "okay";
+ compatible = "cascoda,ca8210";
+ reg = <0>;
+ spi-max-frequency = <4000000>;
+ spi-cpol;
+ reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ irq-gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+ extclock-enable;
+ extclock-freq = <16000000>;
+ extclock-gpio = <2>;
+ };
+};
+
&spfi1 {
status = "okay";

81
target/linux/pistachio/patches-5.15/903-MIPS-DTS-img-marduk-Add-NXP-SC16IS752IPW.patch Normal file
View File

@ -0,0 +1,81 @@
From ad4eba0c36ce8af6ab9ea1bc163e4c1ac7c271c3 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:09:02 +0200
Subject: [PATCH 903/904] MIPS: DTS: img: marduk: Add NXP SC16IS752IPW
Add NXP SC16IS752IPW SPI-UART controller to device tree.
This controller drives 2 UARTs and 7 LEDs on the board.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 51 +++++++++++++++++++++
1 file changed, 51 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -46,6 +46,46 @@
regulator-max-microvolt = <1800000>;
};
+ /* EXT clock from ca8210 is fed to sc16is752 */
+ ca8210_ext_clk: ca8210-ext-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <16000000>;
+ clock-output-names = "ca8210_ext_clock";
+ };
+
+ gpioleds {
+ compatible = "gpio-leds";
+ user1 {
+ label = "marduk:red:user1";
+ gpios = <&sc16is752 0 GPIO_ACTIVE_LOW>;
+ };
+ user2 {
+ label = "marduk:red:user2";
+ gpios = <&sc16is752 1 GPIO_ACTIVE_LOW>;
+ };
+ user3 {
+ label = "marduk:red:user3";
+ gpios = <&sc16is752 2 GPIO_ACTIVE_LOW>;
+ };
+ user4 {
+ label = "marduk:red:user4";
+ gpios = <&sc16is752 3 GPIO_ACTIVE_LOW>;
+ };
+ user5 {
+ label = "marduk:red:user5";
+ gpios = <&sc16is752 4 GPIO_ACTIVE_LOW>;
+ };
+ user6 {
+ label = "marduk:red:user6";
+ gpios = <&sc16is752 5 GPIO_ACTIVE_LOW>;
+ };
+ user7 {
+ label = "marduk:red:user7";
+ gpios = <&sc16is752 6 GPIO_ACTIVE_LOW>;
+ };
+ };
+
led-controller {
compatible = "pwm-leds";
@@ -96,6 +136,17 @@
extclock-freq = <16000000>;
extclock-gpio = <2>;
};
+
+ sc16is752: sc16is752@1 {
+ compatible = "nxp,sc16is752";
+ reg = <1>;
+ clocks = <&ca8210_ext_clk>;
+ spi-max-frequency = <4000000>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&spfi1 {

27
target/linux/pistachio/patches-5.15/904-MIPS-DTS-img-marduk-Add-partition-name.patch Normal file
View File

@ -0,0 +1,27 @@
From ff0e950b605047bf50d470023e0fb2fc2003a0f0 Mon Sep 17 00:00:00 2001
From: Ian Pozella <Ian.Pozella@imgtec.com>
Date: Mon, 20 Feb 2017 10:38:07 +0000
Subject: [PATCH 904/904] MIPS: DTS: img: marduk: Add partition name
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -161,12 +161,14 @@
compatible = "spansion,s25fl016k", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
+ linux,mtd-name = "spi-nor";
};
flash@1 {
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <50000000>;
+ linux,mtd-name = "spi-nand";
};
};

27
target/linux/pistachio/patches-5.15/905-MIPS-DTS-img-marduk-Add-led-aliases.patch Normal file
View File

@ -0,0 +1,27 @@
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -19,6 +19,11 @@
ethernet0 = &enet;
spi0 = &spfi0;
spi1 = &spfi1;
+
+ led-boot = &led_heartbeat;
+ led-failsafe = &led_heartbeat;
+ led-running = &led_heartbeat;
+ led-upgrade = &led_heartbeat;
};
chosen {
@@ -89,11 +94,10 @@
led-controller {
compatible = "pwm-leds";
- led-1 {
+ led_heartbeat: heartbeat {
label = "marduk:red:heartbeat";
pwms = <&pwm 3 300000>;
max-brightness = <255>;
- linux,default-trigger = "heartbeat";
};
};

2
target/linux/realtek/dts-5.15/rtl9302_zyxel_xgs1250-12.dts
View File

@ -64,6 +64,8 @@
led_set: led_set@0 {
compatible = "realtek,rtl9300-leds";
active-low;
led_set0 = <0x0000 0xffff 0x0a20 0x0b80>; // LED set 0: 1000Mbps, 10/100Mbps
led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
// (5G, 10/100) (10G, 5G, 2.5G)

8
target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/rtl930x.c
View File

@ -21,6 +21,8 @@
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0)
#define RTL930X_LED_GLB_ACTIVE_LOW BIT(22)
extern struct mutex smi_lock;
extern struct rtl83xx_soc_info soc_info;
@ -2431,6 +2433,12 @@ static void rtl930x_led_init(struct rtl838x_switch_priv *priv)
/* Set LED mode to serial (0x1) */
sw_w32_mask(0x3, 0x1, RTL930X_LED_GLB_CTRL);
/* Set LED active state */
if (of_property_read_bool(node, "active-low"))
sw_w32_mask(RTL930X_LED_GLB_ACTIVE_LOW, 0, RTL930X_LED_GLB_CTRL);
else
sw_w32_mask(0, RTL930X_LED_GLB_ACTIVE_LOW, RTL930X_LED_GLB_CTRL);
/* Set port type masks */
sw_w32(pm, RTL930X_LED_PORT_COPR_MASK_CTRL);
sw_w32(pm, RTL930X_LED_PORT_FIB_MASK_CTRL);

1
target/linux/realtek/image/Makefile
View File

@ -4,7 +4,6 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
KERNEL_LOADADDR = 0x80100000
KERNEL_ENTRY = 0x80100400
DEVICE_VARS += \
CAMEO_BOARD_VERSION \

3
target/linux/realtek/patches-5.10/300-mips-add-rtl838x-platform.patch
View File

@ -25,7 +25,7 @@ Submitted-by: Birger Koblitz <git@birger-koblitz.de>
platform-$(CONFIG_SGI_IP28) += sgi-ip22/
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1037,8 +1037,58 @@ config NLM_XLP_BOARD
@@ -1037,8 +1037,59 @@ config NLM_XLP_BOARD
This board is based on Netlogic XLP Processor.
Say Y here if you have a XLP based board.
@ -33,6 +33,7 @@ Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+ bool "Realtek based platforms"
+ select DMA_NONCOHERENT
+ select IRQ_MIPS_CPU
+ select NO_EXCEPT_FILL
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_SUPPORTS_BIG_ENDIAN

17
target/linux/realtek/patches-5.10/312-rt9313-support.patch
View File

@ -43,23 +43,6 @@ Submitted-by: Birger Koblitz <git@birger-koblitz.de>
ifdef CONFIG_32BIT
bootvars-y += ADDR_BITS=32
endif
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -60,12 +60,14 @@
.endm
#ifndef CONFIG_NO_EXCEPT_FILL
+#ifndef CONFIG_RTL931X
/*
* Reserved space for exception handlers.
* Necessary for machines which link their kernels at KSEG0.
*/
.fill 0x400
#endif
+#endif
EXPORT(_stext)
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -55,7 +55,11 @@ SECTIONS

3
target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch
View File

@ -25,7 +25,7 @@ Submitted-by: Birger Koblitz <git@birger-koblitz.de>
platform-$(CONFIG_SGI_IP28) += sgi-ip22/
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1053,8 +1053,58 @@ config NLM_XLP_BOARD
@@ -1053,8 +1053,59 @@ config NLM_XLP_BOARD
This board is based on Netlogic XLP Processor.
Say Y here if you have a XLP based board.
@ -33,6 +33,7 @@ Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+ bool "Realtek based platforms"
+ select DMA_NONCOHERENT
+ select IRQ_MIPS_CPU
+ select NO_EXCEPT_FILL
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_SUPPORTS_BIG_ENDIAN

17
target/linux/realtek/patches-5.15/312-rt9313-support.patch
View File

@ -43,23 +43,6 @@ Submitted-by: Birger Koblitz <git@birger-koblitz.de>
ifdef CONFIG_32BIT
bootvars-y += ADDR_BITS=32
endif
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -60,12 +60,14 @@
.endm
#ifndef CONFIG_NO_EXCEPT_FILL
+#ifndef CONFIG_RTL931X
/*
* Reserved space for exception handlers.
* Necessary for machines which link their kernels at KSEG0.
*/
.fill 0x400
#endif
+#endif
EXPORT(_stext)
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -55,7 +55,11 @@ SECTIONS

1
target/linux/realtek/rtl838x/config-5.10
View File

@ -164,6 +164,7 @@ CONFIG_NET_DSA_RTL83XX=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_OF=y

1
target/linux/realtek/rtl838x/config-5.15
View File

@ -161,6 +161,7 @@ CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_OF=y

1
target/linux/realtek/rtl839x/config-5.10
View File

@ -160,6 +160,7 @@ CONFIG_NET_DSA_RTL83XX=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_OF=y

1
target/linux/realtek/rtl839x/config-5.15
View File

@ -164,6 +164,7 @@ CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y

1
target/linux/realtek/rtl930x/config-5.10
View File

@ -150,6 +150,7 @@ CONFIG_NET_DSA_RTL83XX=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_OF=y

1
target/linux/realtek/rtl930x/config-5.15
View File

@ -144,6 +144,7 @@ CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_OF=y

1
target/linux/realtek/rtl931x/config-5.10
View File

@ -149,6 +149,7 @@ CONFIG_NET_DSA_TAG_RTL83XX=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_OF=y

1
target/linux/realtek/rtl931x/config-5.15
View File

@ -159,6 +159,7 @@ CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y

4
tools/cmake/Makefile
View File

@ -7,7 +7,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=cmake
PKG_VERSION:=3.25.1
PKG_VERSION:=3.25.2
PKG_VERSION_MAJOR:=$(word 1,$(subst ., ,$(PKG_VERSION))).$(word 2,$(subst ., ,$(PKG_VERSION)))
PKG_RELEASE:=1
PKG_CPE_ID:=cpe:/a:kitware:cmake
@ -15,7 +15,7 @@ PKG_CPE_ID:=cpe:/a:kitware:cmake
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/Kitware/CMake/releases/download/v$(PKG_VERSION)/ \
https://cmake.org/files/v$(PKG_VERSION_MAJOR)/
PKG_HASH:=1c511d09516af493694ed9baf13c55947a36389674d657a2d5e0ccedc6b291d8
PKG_HASH:=c026f22cb931dd532f648f087d587f07a1843c6e66a3dfca4fb0ea21944ed33c
HOST_BUILD_PARALLEL:=1
HOST_CONFIGURE_PARALLEL:=1

4
tools/ninja/Makefile
View File

@ -1,12 +1,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ninja
PKG_VERSION:=1.11.0
PKG_VERSION:=1.11.1
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://codeload.github.com/ninja-build/ninja/tar.gz/v$(PKG_VERSION)?
PKG_HASH:=3c6ba2e66400fe3f1ae83deb4b235faf3137ec20bd5b08c29bfc368db143e4c6
PKG_HASH:=31747ae633213f1eda3842686f83c2aa1412e0f5691d1c14dbbcc67fe7400cea
include $(INCLUDE_DIR)/host-build.mk

4036
tools/ninja/patches/100-make_jobserver_support.patch
View File

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