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uboot-rockchip: bump to 2022.07 release

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Updated all patches and of-platdata.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2022-07-12 18:56:27 +08:00
parent 86714c7684
commit 7370a346ba
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
21 changed files with 288 additions and 135 deletions
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4
package/boot/uboot-rockchip/Makefile
View File

@ -5,10 +5,10 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2021.07
PKG_VERSION:=2022.07
PKG_RELEASE:=$(AUTORELEASE)
PKG_HASH:=312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e
PKG_HASH:=92b08eb49c24da14c1adbf70a71ae8f37cc53eeb4230e859ad8b6733d13dcf5e
PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>

2
package/boot/uboot-rockchip/patches/002-spl-remove-dtoc-of-pdata-generation.patch
View File

@ -17,7 +17,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -354,8 +354,6 @@ $(platdata-hdr) $(u-boot-spl-platdata_c)
@@ -364,8 +364,6 @@ $(platdata-hdr) $(u-boot-spl-platdata_c)
@# of OF_PLATDATA_INST and this might change between builds. Leaving old
@# ones around is confusing and it is possible that switching the
@# setting again will use the old one instead of regenerating it.

128
package/boot/uboot-rockchip/patches/003-Revert-Makefile-Only-build-dtc-if-needed.patch Normal file
View File

@ -0,0 +1,128 @@
--- a/Makefile
+++ b/Makefile
@@ -413,13 +413,7 @@ PERL = perl
PYTHON ?= python
PYTHON2 = python2
PYTHON3 ?= python3
-
-# The devicetree compiler and pylibfdt are automatically built unless DTC is
-# provided. If DTC is provided, it is assumed the pylibfdt is available too.
-DTC_INTREE := $(objtree)/scripts/dtc/dtc
-DTC ?= $(DTC_INTREE)
-DTC_MIN_VERSION := 010406
-
+DTC ?= $(objtree)/scripts/dtc/dtc
CHECK = sparse
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
@@ -2060,29 +2054,9 @@ endif
endif
-# Check dtc and pylibfdt, if DTC is provided, else build them
PHONY += scripts_dtc
scripts_dtc: scripts_basic
- $(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \
- $(MAKE) $(build)=scripts/dtc; \
- else \
- if ! $(DTC) -v >/dev/null; then \
- echo '*** Failed to check dtc version: $(DTC)'; \
- false; \
- else \
- if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \
- echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \
- false; \
- else \
- if [ -n "$(CONFIG_PYLIBFDT)" ]; then \
- if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \
- echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \
- false; \
- fi; \
- fi; \
- fi; \
- fi; \
- fi
+ $(Q)$(MAKE) $(build)=scripts/dtc
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds = LDS $@
--- a/doc/build/gcc.rst
+++ b/doc/build/gcc.rst
@@ -131,27 +131,6 @@ Further important build parameters are
* O=<dir> - generate all output files in directory <dir>, including .config
* V=1 - verbose build
-Devicetree compiler
-~~~~~~~~~~~~~~~~~~~
-
-Boards that use `CONFIG_OF_CONTROL` (i.e. almost all of them) need the
-devicetree compiler (dtc). Those with `CONFIG_PYLIBFDT` need pylibfdt, a Python
-library for accessing devicetree data. Suitable versions of these are included
-in the U-Boot tree in `scripts/dtc` and built automatically as needed.
-
-To use the system versions of these, use the DTC parameter, for example
-
-.. code-block:: bash
-
- DTC=/usr/bin/dtc make
-
-In this case, dtc and pylibfdt are not built. The build checks that the version
-of dtc is new enough. It also makes sure that pylibfdt is present, if needed
-(see `scripts_dtc` in the Makefile).
-
-Note that the :doc:`tools` are always built with the included version of libfdt
-so it is not possible to build U-Boot tools with a system libfdt, at present.
-
Other build targets
~~~~~~~~~~~~~~~~~~~
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -5,6 +5,9 @@
config SUPPORT_OF_CONTROL
bool
+config DTC
+ bool
+
config PYLIBFDT
bool
@@ -21,6 +24,7 @@ menu "Device Tree Control"
config OF_CONTROL
bool "Run-time configuration via Device Tree"
+ select DTC
select OF_LIBFDT if !OF_PLATDATA
select OF_REAL if !OF_PLATDATA
help
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -9,4 +9,6 @@ hostprogs-$(CONFIG_BUILD_BIN2C) += bin2
always := $(hostprogs-y)
# Let clean descend into subdirs
-subdir- += basic kconfig dtc
+subdir- += basic kconfig
+subdir-$(CONFIG_DTC) += dtc
+
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -10,16 +10,11 @@
dtc="$*"
if [ ${#dtc} -eq 0 ]; then
- echo "Error: No dtc command specified"
+ echo "Error: No dtc command specified."
printf "Usage:\n\t$0 <dtc-command>\n"
exit 1
fi
-if ! which $dtc >/dev/null ; then
- echo "Error: Cannot find dtc: $dtc"
- exit 1
-fi
-
MAJOR=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 1)
MINOR=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 2)
PATCH=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 3 | cut -d - -f 1)

10
package/boot/uboot-rockchip/patches/004-no-kwbimage.patch Normal file
View File

@ -0,0 +1,10 @@
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \
imximage.o \
imx8image.o \
imx8mimage.o \
- kwbimage.o \
lib/md5.o \
lpc32xximage.o \
mxsimage.o \

24
package/boot/uboot-rockchip/patches/005-fix-mkimage-host-build.patch Normal file
View File

@ -0,0 +1,24 @@
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -1122,6 +1122,7 @@ static int fit_config_add_verification_d
* 2) get public key (X509_get_pubkey)
* 3) provide der format (d2i_RSAPublicKey)
*/
+#ifdef CONFIG_TOOLS_LIBCRYPTO
static int read_pub_key(const char *keydir, const void *name,
unsigned char **pubkey, int *pubkey_len)
{
@@ -1175,6 +1176,13 @@ err_cert:
fclose(f);
return ret;
}
+#else
+static int read_pub_key(const char *keydir, const void *name,
+ unsigned char **pubkey, int *pubkey_len)
+{
+ return -ENOSYS;
+}
+#endif
int fit_pre_load_data(const char *keydir, void *keydest, void *fit)
{

27
package/boot/uboot-rockchip/patches/101-rock64pro-disable-CONFIG_USE_PREBOOT.patch
View File

@ -1,27 +0,0 @@
From 2114d68b3c755ec8043ae9e43ac8e9753e0cec84 Mon Sep 17 00:00:00 2001
From: Marty Jones <mj8263788@gmail.com>
Date: Sun, 17 Jan 2021 15:26:09 -0500
Subject: [PATCH] rockpro64: disable CONFIG_USE_PREBOOT
On commit https://github.com/u-boot/u-boot/commit/f81f9f0ebac596bae7f27db095f4f0272b606cc3
CONFIG_USE_PREBOOT was enabled on the RockPro64.
When the board is booting, U-Boot hangs as soon as it disables the USB
controller. This is a workaround until a final solution is deployed
upstream.
Signed-off-by: Marty Jones <mj8263788@gmail.com>
---
configs/rockpro64-rk3399_defconfig | 1 -
1 file changed, 1 deletion(-)
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
CONFIG_DEBUG_UART=y
-CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y

13
package/boot/uboot-rockchip/patches/200-rockchip-rk3328-Add-support-for-Orangepi-R1-Plus.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
@@ -125,6 +125,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
rk3328-nanopi-r2s.dtb \
@ -10,7 +10,7 @@
rk3328-rock-pi-e.dtb
--- /dev/null
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -0,0 +1,1 @@
@@ -0,0 +1 @@
+#include "rk3328-nanopi-r2s-u-boot.dtsi"
--- /dev/null
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
@ -55,7 +55,7 @@
+};
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -12,6 +12,13 @@ F: configs/nanopi-r2s-rk3328_defconfig
@@ -12,6 +12,13 @@ F: configs/nanopi-r2s-rk3328_defcon
F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
F: arch/arm/dts/rk3328-nanopi-r2s.dts
@ -71,9 +71,13 @@
M: Chen-Yu Tsai <wens@csie.org>
--- /dev/null
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -0,0 +1,98 @@
@@ -0,0 +1,103 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_ENV_OFFSET=0x3F8000
@ -87,6 +91,7 @@
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYSINFO=y
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+# CONFIG_ANDROID_BOOT_IMAGE is not set

20
package/boot/uboot-rockchip/patches/201-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch
View File

@ -1,8 +1,6 @@
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d3e89ca3ba..d5f64ac432 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
@@ -124,6 +124,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
@ -10,9 +8,6 @@ index d3e89ca3ba..d5f64ac432 100644
rk3328-nanopi-r2s.dtb \
rk3328-orangepi-r1-plus.dtb \
rk3328-roc-cc.dtb \
diff --git a/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
new file mode 100644
index 0000000000..c2e86d0f0e
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
@@ -0,0 +1,7 @@
@ -23,9 +18,6 @@ index 0000000000..c2e86d0f0e
+ */
+
+#include "rk3328-nanopi-r2s-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts
new file mode 100644
index 0000000000..adf91a0306
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2c.dts
@@ -0,0 +1,47 @@
@ -76,14 +68,15 @@ index 0000000000..adf91a0306
+&wan_led {
+ label = "nanopi-r2c:green:wan";
+};
diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig
new file mode 100644
index 0000000000..7bc7a3274f
--- /dev/null
+++ b/configs/nanopi-r2c-rk3328_defconfig
@@ -0,0 +1,98 @@
@@ -0,0 +1,103 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
@ -99,6 +92,7 @@ index 0000000000..7bc7a3274f
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_LOAD_ADDR=0x800800
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y

9
package/boot/uboot-rockchip/patches/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus-LTS.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -111,6 +111,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
@@ -127,6 +127,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-nanopi-r2c.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-orangepi-r1-plus.dtb \
@ -64,9 +64,13 @@
+};
--- /dev/null
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -0,0 +1,98 @@
@@ -0,0 +1,103 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_ENV_OFFSET=0x3F8000
@ -82,6 +86,7 @@
+CONFIG_SYSINFO=y
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_LOAD_ADDR=0x800800
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y

3
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2c-rk3328/dt-decl.h
View File

@ -12,12 +12,11 @@
extern U_BOOT_DRIVER(rockchip_rk3328_cru);
extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
extern U_BOOT_DRIVER(ns16550_serial);
extern U_BOOT_DRIVER(rockchip_uart);
extern U_BOOT_DRIVER(rockchip_rk3328_grf);
/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
extern UCLASS_DRIVER(clk);
extern UCLASS_DRIVER(mmc);
extern UCLASS_DRIVER(ram);
extern UCLASS_DRIVER(serial);
extern UCLASS_DRIVER(syscon);

11
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2c-rk3328/dt-plat.c
View File

@ -20,7 +20,7 @@
* 0: clock_controller_at_ff440000 rockchip_rk3328_cru
* 1: dmc rockchip_rk3328_dmc
* 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
* 3: serial_at_ff130000 ns16550_serial
* 3: serial_at_ff130000 rockchip_uart
* 4: syscon_at_ff100000 rockchip_rk3328_grf
* --- -------------------- --------------------
*/
@ -114,11 +114,8 @@ U_BOOT_DRVINFO(mmc_at_ff500000) = {
.parent_idx = -1,
};
/*
* Node /serial@ff130000 index 3
* driver ns16550_serial parent None
*/
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
/* Node /serial@ff130000 index 3 */
static struct dtd_rockchip_uart dtv_serial_at_ff130000 = {
.clock_frequency = 0x16e3600,
.clocks = {
{0, {40}},
@ -133,7 +130,7 @@ static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
.reg_shift = 0x2,
};
U_BOOT_DRVINFO(serial_at_ff130000) = {
.name = "ns16550_serial",
.name = "rockchip_uart",
.plat = &dtv_serial_at_ff130000,
.plat_size = sizeof(dtv_serial_at_ff130000),
.parent_idx = -1,

24
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2c-rk3328/dt-structs-gen.h
View File

@ -7,18 +7,6 @@
#include <stdbool.h>
#include <linux/libfdt.h>
struct dtd_ns16550_serial {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};
struct dtd_rockchip_rk3288_dw_mshc {
fdt32_t bus_width;
bool cap_sd_highspeed;
@ -49,3 +37,15 @@ struct dtd_rockchip_rk3328_dmc {
struct dtd_rockchip_rk3328_grf {
fdt64_t reg[2];
};
struct dtd_rockchip_uart {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};

3
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-decl.h
View File

@ -12,12 +12,11 @@
extern U_BOOT_DRIVER(rockchip_rk3328_cru);
extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
extern U_BOOT_DRIVER(ns16550_serial);
extern U_BOOT_DRIVER(rockchip_uart);
extern U_BOOT_DRIVER(rockchip_rk3328_grf);
/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
extern UCLASS_DRIVER(clk);
extern UCLASS_DRIVER(mmc);
extern UCLASS_DRIVER(ram);
extern UCLASS_DRIVER(serial);
extern UCLASS_DRIVER(syscon);

11
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-plat.c
View File

@ -20,7 +20,7 @@
* 0: clock_controller_at_ff440000 rockchip_rk3328_cru
* 1: dmc rockchip_rk3328_dmc
* 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
* 3: serial_at_ff130000 ns16550_serial
* 3: serial_at_ff130000 rockchip_uart
* 4: syscon_at_ff100000 rockchip_rk3328_grf
* --- -------------------- --------------------
*/
@ -114,11 +114,8 @@ U_BOOT_DRVINFO(mmc_at_ff500000) = {
.parent_idx = -1,
};
/*
* Node /serial@ff130000 index 3
* driver ns16550_serial parent None
*/
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
/* Node /serial@ff130000 index 3 */
static struct dtd_rockchip_uart dtv_serial_at_ff130000 = {
.clock_frequency = 0x16e3600,
.clocks = {
{0, {40}},
@ -133,7 +130,7 @@ static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
.reg_shift = 0x2,
};
U_BOOT_DRVINFO(serial_at_ff130000) = {
.name = "ns16550_serial",
.name = "rockchip_uart",
.plat = &dtv_serial_at_ff130000,
.plat_size = sizeof(dtv_serial_at_ff130000),
.parent_idx = -1,

24
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h
View File

@ -7,18 +7,6 @@
#include <stdbool.h>
#include <linux/libfdt.h>
struct dtd_ns16550_serial {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};
struct dtd_rockchip_rk3288_dw_mshc {
fdt32_t bus_width;
bool cap_sd_highspeed;
@ -49,3 +37,15 @@ struct dtd_rockchip_rk3328_dmc {
struct dtd_rockchip_rk3328_grf {
fdt64_t reg[2];
};
struct dtd_rockchip_uart {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};

3
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-lts-rk3328/dt-decl.h
View File

@ -12,7 +12,7 @@
extern U_BOOT_DRIVER(rockchip_rk3328_cru);
extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
extern U_BOOT_DRIVER(ns16550_serial);
extern U_BOOT_DRIVER(rockchip_uart);
extern U_BOOT_DRIVER(rockchip_rk3328_spi);
extern U_BOOT_DRIVER(rockchip_rk3328_grf);
@ -20,5 +20,4 @@ extern U_BOOT_DRIVER(rockchip_rk3328_grf);
extern UCLASS_DRIVER(clk);
extern UCLASS_DRIVER(mmc);
extern UCLASS_DRIVER(ram);
extern UCLASS_DRIVER(serial);
extern UCLASS_DRIVER(syscon);

11
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-lts-rk3328/dt-plat.c
View File

@ -20,7 +20,7 @@
* 0: clock_controller_at_ff440000 rockchip_rk3328_cru
* 1: dmc rockchip_rk3328_dmc
* 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
* 3: serial_at_ff130000 ns16550_serial
* 3: serial_at_ff130000 rockchip_uart
* 4: spi_at_ff190000 rockchip_rk3328_spi
* 5: syscon_at_ff100000 rockchip_rk3328_grf
* --- -------------------- --------------------
@ -115,11 +115,8 @@ U_BOOT_DRVINFO(mmc_at_ff500000) = {
.parent_idx = -1,
};
/*
* Node /serial@ff130000 index 3
* driver ns16550_serial parent None
*/
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
/* Node /serial@ff130000 index 3 */
static struct dtd_rockchip_uart dtv_serial_at_ff130000 = {
.clock_frequency = 0x16e3600,
.clocks = {
{0, {40}},
@ -134,7 +131,7 @@ static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
.reg_shift = 0x2,
};
U_BOOT_DRVINFO(serial_at_ff130000) = {
.name = "ns16550_serial",
.name = "rockchip_uart",
.plat = &dtv_serial_at_ff130000,
.plat_size = sizeof(dtv_serial_at_ff130000),
.parent_idx = -1,

24
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-lts-rk3328/dt-structs-gen.h
View File

@ -7,18 +7,6 @@
#include <stdbool.h>
#include <linux/libfdt.h>
struct dtd_ns16550_serial {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};
struct dtd_rockchip_rk3288_dw_mshc {
fdt32_t bus_width;
bool cap_sd_highspeed;
@ -58,3 +46,15 @@ struct dtd_rockchip_rk3328_spi {
const char * pinctrl_names;
fdt64_t reg[2];
};
struct dtd_rockchip_uart {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};

4
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-rk3328/dt-decl.h
View File

@ -12,12 +12,12 @@
extern U_BOOT_DRIVER(rockchip_rk3328_cru);
extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
extern U_BOOT_DRIVER(ns16550_serial);
extern U_BOOT_DRIVER(rockchip_uart);
extern U_BOOT_DRIVER(rockchip_rk3328_spi);
extern U_BOOT_DRIVER(rockchip_rk3328_grf);
/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
extern UCLASS_DRIVER(clk);
extern UCLASS_DRIVER(mmc);
extern UCLASS_DRIVER(ram);
extern UCLASS_DRIVER(serial);
extern UCLASS_DRIVER(syscon);

35
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-rk3328/dt-plat.c
View File

@ -20,8 +20,9 @@
* 0: clock_controller_at_ff440000 rockchip_rk3328_cru
* 1: dmc rockchip_rk3328_dmc
* 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
* 3: serial_at_ff130000 ns16550_serial
* 4: syscon_at_ff100000 rockchip_rk3328_grf
* 3: serial_at_ff130000 rockchip_uart
* 4: spi_at_ff190000 rockchip_rk3328_spi
* 5: syscon_at_ff100000 rockchip_rk3328_grf
* --- -------------------- --------------------
*/
@ -114,11 +115,8 @@ U_BOOT_DRVINFO(mmc_at_ff500000) = {
.parent_idx = -1,
};
/*
* Node /serial@ff130000 index 3
* driver ns16550_serial parent None
*/
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
/* Node /serial@ff130000 index 3 */
static struct dtd_rockchip_uart dtv_serial_at_ff130000 = {
.clock_frequency = 0x16e3600,
.clocks = {
{0, {40}},
@ -133,14 +131,33 @@ static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
.reg_shift = 0x2,
};
U_BOOT_DRVINFO(serial_at_ff130000) = {
.name = "ns16550_serial",
.name = "rockchip_uart",
.plat = &dtv_serial_at_ff130000,
.plat_size = sizeof(dtv_serial_at_ff130000),
.parent_idx = -1,
};
/* Node /spi@ff190000 index 4 */
static struct dtd_rockchip_rk3328_spi dtv_spi_at_ff190000 = {
.clocks = {
{0, {32}},
{0, {209}},},
.dma_names = {"tx", "rx"},
.dmas = {0x10, 0x8, 0x10, 0x9},
.interrupts = {0x0, 0x31, 0x4},
.pinctrl_0 = {0x2e, 0x2f, 0x30, 0x31},
.pinctrl_names = "default",
.reg = {0xff190000, 0x1000},
};
U_BOOT_DRVINFO(spi_at_ff190000) = {
.name = "rockchip_rk3328_spi",
.plat = &dtv_spi_at_ff190000,
.plat_size = sizeof(dtv_spi_at_ff190000),
.parent_idx = -1,
};
/*
* Node /syscon@ff100000 index 4
* Node /syscon@ff100000 index 5
* driver rockchip_rk3328_grf parent None
*/
static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {

33
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-rk3328/dt-structs-gen.h
View File

@ -7,18 +7,6 @@
#include <stdbool.h>
#include <linux/libfdt.h>
struct dtd_ns16550_serial {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};
struct dtd_rockchip_rk3288_dw_mshc {
fdt32_t bus_width;
bool cap_sd_highspeed;
@ -49,3 +37,24 @@ struct dtd_rockchip_rk3328_dmc {
struct dtd_rockchip_rk3328_grf {
fdt64_t reg[2];
};
struct dtd_rockchip_rk3328_spi {
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0[4];
const char * pinctrl_names;
fdt64_t reg[2];
};
struct dtd_rockchip_uart {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};