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uboot-rockchip: backport upstream nanopi r6c/s patches

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2024-09-14 20:54:58 +08:00
parent 210bf26bf7
commit 7a8a31ece8
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GPG Key ID: 6850B6345C862176
10 changed files with 434 additions and 954 deletions
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17
package/boot/uboot-rockchip/patches/000-backport-upstream-dts-sync.patch
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@ -723,6 +723,23 @@
+ status = "okay"; + status = "okay";
+}; +};
--- /dev/null --- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6c.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3588s-nanopi-r6s.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R6C";
+ compatible = "friendlyarm,nanopi-r6c", "rockchip,rk3588s";
+};
+
+&lan2_led {
+ label = "user_led";
+};
--- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6s.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6s.dts
@@ -0,0 +1,764 @@ @@ -0,0 +1,764 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

213
package/boot/uboot-rockchip/patches/007-board-rockchip-Add-FriendlyElec-NanoPi-R6C.patch Normal file
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@ -0,0 +1,213 @@
From f59d40aa5598063396164b3248f0f8ed6591e3db Mon Sep 17 00:00:00 2001
From: Sebastian Kropatsch <seb-dev@mail.de>
Date: Thu, 11 Jul 2024 12:15:17 +0200
Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R6C
The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB eMMC
storage, one M.2 M-Key connector, one RTL8211F 1GbE and one RTL8125
2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 Type-A port, a
HDMI port, a 30-pin GPIO header as well as multiple buttons and LEDs.
Add initial support for this board using the upstream devicetree sources.
Tested in U-Boot proper:
- Booting from eMMC works
- 1GbE Ethernet works using the eth_eqos driver (tested by ping)
- 2.5GbE Ethernet works using the eth_rtl8169 driver (tested by ping),
but the status LEDs on this specific port currently aren't working
- NVMe SSD in M.2 socket does get recognized (tested with `nvme scan`
followed by `nvme details`)
Kernel commit:
d5f1d7437451 ("arm64: dts: rockchip: Add support for NanoPi R6C")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
---
arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi | 3 +
arch/arm/mach-rockchip/rk3588/Kconfig | 13 +++
board/friendlyelec/nanopi-r6c-rk3588s/Kconfig | 12 +++
.../nanopi-r6c-rk3588s/MAINTAINERS | 7 ++
configs/nanopi-r6c-rk3588s_defconfig | 83 +++++++++++++++++++
doc/board/rockchip/rockchip.rst | 1 +
include/configs/nanopi-r6c-rk3588s.h | 12 +++
7 files changed, 131 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi
create mode 100644 board/friendlyelec/nanopi-r6c-rk3588s/Kconfig
create mode 100644 board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS
create mode 100644 configs/nanopi-r6c-rk3588s_defconfig
create mode 100644 include/configs/nanopi-r6c-rk3588s.h
--- /dev/null
+++ b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588s-u-boot.dtsi"
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -78,6 +78,18 @@ config TARGET_NANOPCT6_RK3588
Power: 5.5*2.1mm DC Jack, 12VDC input
Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
+config TARGET_NANOPI_R6C_RK3588S
+ bool "FriendlyElec NanoPi R6C"
+ select BOARD_LATE_INIT
+ help
+ The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip
+ RK3588s.
+ It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB
+ eMMC storage, one M.2 M-Key connector, one RTL8211F 1GbE and one
+ RTL8125 2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0
+ Type-A port, a HDMI port, a 30-pin GPIO header as well as some
+ buttons and LEDs.
+
config TARGET_NOVA_RK3588
bool "Indiedroid Nova RK3588"
select BOARD_LATE_INIT
@@ -258,6 +270,7 @@ config TEXT_BASE
source "board/armsom/sige7-rk3588/Kconfig"
source "board/edgeble/neural-compute-module-6/Kconfig"
source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
+source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig"
source "board/indiedroid/nova/Kconfig"
source "board/pine64/quartzpro64-rk3588/Kconfig"
source "board/turing/turing-rk1-rk3588/Kconfig"
--- /dev/null
+++ b/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_NANOPI_R6C_RK3588S
+
+config SYS_BOARD
+ default "nanopi-r6c-rk3588s"
+
+config SYS_VENDOR
+ default "friendlyelec"
+
+config SYS_CONFIG_NAME
+ default "nanopi-r6c-rk3588s"
+
+endif
--- /dev/null
+++ b/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS
@@ -0,0 +1,7 @@
+NANOPI-R6C
+M: Sebastian Kropatsch <seb-dev@mail.de>
+S: Maintained
+F: arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi
+F: board/friendlyelec/nanopi-r6c-rk3588s
+F: configs/nanopi-r6c-rk3588s_defconfig
+F: include/configs/nanopi-r6c-rk3588s.h
--- /dev/null
+++ b/configs/nanopi-r6c-rk3588s_defconfig
@@ -0,0 +1,83 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6c"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TARGET_NANOPI_R6C_RK3588S=y
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6c.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PWM=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+# CONFIG_SPI_FLASH is not set
+CONFIG_PHY_REALTEK=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_RTL8169=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_ERRNO_STR=y
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -127,6 +127,7 @@ List of mainline supported Rockchip boar
- Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588)
- Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588)
- FriendlyElec NanoPC-T6 (nanopc-t6-rk3588)
+ - FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s)
- Generic RK3588S/RK3588 (generic-rk3588)
- Indiedroid Nova (nova-rk3588s)
- Pine64 QuartzPro64 (quartzpro64-rk3588)
--- /dev/null
+++ b/include/configs/nanopi-r6c-rk3588s.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __NANOPI_R6C_RK3588S_H
+#define __NANOPI_R6C_RK3588S_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#include <configs/rk3588_common.h>
+
+#endif /* __NANOPI_R6C_RK3588S_H */

203
package/boot/uboot-rockchip/patches/008-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch Normal file
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@ -0,0 +1,203 @@
From 7db9ff164813afb343024d37731ab797ed7f507e Mon Sep 17 00:00:00 2001
From: Sebastian Kropatsch <seb-dev@mail.de>
Date: Thu, 11 Jul 2024 12:15:18 +0200
Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R6S
The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC storage,
one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, one USB 2.0
Type-A and one USB 3.0 Type-A port, a HDMI port, a 12-pin GPIO FPC
connector, a fan connector, IR receiver as well as some buttons and LEDs.
Add initial support for this board using the upstream devicetree sources.
Kernel commit:
f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
---
arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi | 3 +
arch/arm/mach-rockchip/rk3588/Kconfig | 13 +++
board/friendlyelec/nanopi-r6s-rk3588s/Kconfig | 12 +++
.../nanopi-r6s-rk3588s/MAINTAINERS | 7 ++
configs/nanopi-r6s-rk3588s_defconfig | 82 +++++++++++++++++++
doc/board/rockchip/rockchip.rst | 1 +
include/configs/nanopi-r6s-rk3588s.h | 12 +++
7 files changed, 130 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
create mode 100644 configs/nanopi-r6s-rk3588s_defconfig
create mode 100644 include/configs/nanopi-r6s-rk3588s.h
--- /dev/null
+++ b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588s-u-boot.dtsi"
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -90,6 +90,18 @@ config TARGET_NANOPI_R6C_RK3588S
Type-A port, a HDMI port, a 30-pin GPIO header as well as some
buttons and LEDs.
+config TARGET_NANOPI_R6S_RK3588S
+ bool "FriendlyElec NanoPi R6S"
+ select BOARD_LATE_INIT
+ help
+ The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip
+ RK3588s.
+ It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC
+ storage, one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports,
+ one USB 2.0 Type-A and one USB 3.0 Type-A port, a HDMI port, a
+ 12-pin GPIO FPC connector, a fan connector, IR receiver as well
+ as some buttons and LEDs.
+
config TARGET_NOVA_RK3588
bool "Indiedroid Nova RK3588"
select BOARD_LATE_INIT
@@ -271,6 +283,7 @@ source "board/armsom/sige7-rk3588/Kconfi
source "board/edgeble/neural-compute-module-6/Kconfig"
source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig"
+source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig"
source "board/indiedroid/nova/Kconfig"
source "board/pine64/quartzpro64-rk3588/Kconfig"
source "board/turing/turing-rk1-rk3588/Kconfig"
--- /dev/null
+++ b/board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_NANOPI_R6S_RK3588S
+
+config SYS_BOARD
+ default "nanopi-r6s-rk3588s"
+
+config SYS_VENDOR
+ default "friendlyelec"
+
+config SYS_CONFIG_NAME
+ default "nanopi-r6s-rk3588s"
+
+endif
--- /dev/null
+++ b/board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
@@ -0,0 +1,7 @@
+NANOPI-R6S
+M: Sebastian Kropatsch <seb-dev@mail.de>
+S: Maintained
+F: arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
+F: board/friendlyelec/nanopi-r6s-rk3588s
+F: configs/nanopi-r6s-rk3588s_defconfig
+F: include/configs/nanopi-r6s-rk3588s.h
--- /dev/null
+++ b/configs/nanopi-r6s-rk3588s_defconfig
@@ -0,0 +1,82 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6s"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TARGET_NANOPI_R6S_RK3588S=y
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PWM=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+# CONFIG_SPI_FLASH is not set
+CONFIG_PHY_REALTEK=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_RTL8169=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_ERRNO_STR=y
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -128,6 +128,7 @@ List of mainline supported Rockchip boar
- Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588)
- FriendlyElec NanoPC-T6 (nanopc-t6-rk3588)
- FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s)
+ - FriendlyElec NanoPi R6S (nanopi-r6s-rk3588s)
- Generic RK3588S/RK3588 (generic-rk3588)
- Indiedroid Nova (nova-rk3588s)
- Pine64 QuartzPro64 (quartzpro64-rk3588)
--- /dev/null
+++ b/include/configs/nanopi-r6s-rk3588s.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __NANOPI_R6S_RK3588S_H
+#define __NANOPI_R6S_RK3588S_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#include <configs/rk3588_common.h>
+
+#endif /* __NANOPI_R6S_RK3588S_H */

6
package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm/dts/Makefile --- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile
@@ -96,6 +96,19 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \ @@ -96,6 +96,15 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-geekbox.dtb \ rk3368-geekbox.dtb \
rk3368-px5-evb.dtb \ rk3368-px5-evb.dtb \
@ -12,10 +12,6 @@
+ rk3568-armsom-sige3.dtb \ + rk3568-armsom-sige3.dtb \
+ rk3568-mrkaio-m68s.dtb \ + rk3568-mrkaio-m68s.dtb \
+ rk3568-photonicat.dtb + rk3568-photonicat.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3588) += \
+ rk3588s-nanopi-r6c.dtb \
+ rk3588s-nanopi-r6s.dtb
+ +
dtb-$(CONFIG_ARCH_S5P4418) += \ dtb-$(CONFIG_ARCH_S5P4418) += \
s5p4418-nanopi2.dtb s5p4418-nanopi2.dtb

3
package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi
View File

@ -1,3 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "rk3588s-nanopi-r6s-u-boot.dtsi"

20
package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6c.dts
View File

@ -1,20 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "rk3588s-nanopi-r6s.dts"
/ {
model = "FriendlyElec NanoPi R6C";
compatible = "friendlyarm,nanopi-r6c", "rockchip,rk3588";
gpio-leds {
led-lan1 {
/delete-property/ function-enumerator;
};
led-lan2 {
/delete-property/ function-enumerator;
function = LED_FUNCTION_PROGRAMMING;
};
};
};

11
package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
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@ -1,11 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
*/
#include "rk3588s-u-boot.dtsi"
&sdhci {
cap-mmc-highspeed;
mmc-hs200-1_8v;
};

765
package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts
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@ -1,765 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3588s.dtsi"
/ {
model = "FriendlyElec NanoPi R6S";
compatible = "friendlyarm,nanopi-r6s", "rockchip,rk3588";
aliases {
ethernet0 = &gmac1;
mmc0 = &sdmmc;
mmc1 = &sdhci;
};
chosen {
stdout-path = "serial2:1500000n8";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&reset_button_pin>;
button-reset {
debounce-interval = <50>;
gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>;
led-lan1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
};
led-lan2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
};
power_led: led-power {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
};
led-wan {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
};
};
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_usb: vcc5v0-usb-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_host_20: vcc5v0-host-20-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host_20";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host20_en>;
};
vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_pcie20";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <3000000>;
regulator-min-microvolt = <3000000>;
regulator-name = "vcc_3v3_sd_s0";
enable-active-high;
gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc_3v3_s3>;
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_sd_en>;
};
vbus5v0_typec: vbus5v0-typec-regulator {
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vbus5v0_typec_en>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-rxid";
pinctrl-names = "default";
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x42>;
/* rx_delay = <0x4f>; */
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
status = "okay";
vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c6 {
status = "okay";
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&pcie2x1l1 {
reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
};
&pcie2x1l2 {
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
};
&pinctrl {
gpio-leds {
lan1_led_pin: lan1-led-pin {
rockchip,pins = <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan2_led_pin: lan2-led-pin {
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
power_led_pin: power-led-pin {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin {
rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
rockchip-key {
reset_button_pin: reset-button-pin {
rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
vcc3v3_sd_en: vcc3v3-sd-en {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
vbus5v0_typec_en: vbus5v0-typec-en {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_host20_en: vcc5v0-host20-en {
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
};
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
mmc-hs200-1_8v;
no-sdio;
no-sd;
non-removable;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
max-frequency = <150000000>;
no-sdio;
no-mmc;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
vmmc-supply = <&vcc_3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
};
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
num-cs = <1>;
rk806single: rk806single@0 {
compatible = "rockchip,rk806";
spi-max-frequency = <1000000>;
reg = <0x0>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc5v0_sys>;
vcc6-supply = <&vcc5v0_sys>;
vcc7-supply = <&vcc5v0_sys>;
vcc8-supply = <&vcc5v0_sys>;
vcc9-supply = <&vcc5v0_sys>;
vcc10-supply = <&vcc5v0_sys>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc5v0_sys>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc5v0_sys>;
gpio-controller;
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs1_slp: dvs1-slp-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun1";
};
rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun2";
};
rk806_dvs1_rst: dvs1-rst-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun3";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs2_slp: dvs2-slp-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun1";
};
rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun2";
};
rk806_dvs2_rst: dvs2-rst-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun3";
};
rk806_dvs2_dvs: dvs2-dvs-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun4";
};
rk806_dvs2_gpio: dvs2-gpio-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun5";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
rk806_dvs3_slp: dvs3-slp-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun1";
};
rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun2";
};
rk806_dvs3_rst: dvs3-rst-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun3";
};
rk806_dvs3_dvs: dvs3-dvs-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun4";
};
rk806_dvs3_gpio: dvs3-gpio-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun5";
};
regulators {
vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_gpu_s0";
regulator-enable-ramp-delay = <400>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_cpu_lit_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_log_s0: dcdc-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_log_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-init-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_vdenc_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <900000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdd2_ddr_s3: dcdc-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd2_ddr_s3";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_2v0_pldo_s3: dcdc-reg7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_2v0_pldo_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2000000>;
};
};
vcc_3v3_s3: dcdc-reg8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_3v3_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vddq_ddr_s0: dcdc-reg9 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vddq_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg10 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avcc_1v8_s0: pldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "avcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s0: pldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avdd_1v2_s0: pldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "avdd_1v2_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3_s0: pldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vcc_3v3_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vccio_sd_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
pldo6_s3: pldo-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "pldo6_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_ddr_pll_s0: nldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_ddr_pll_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
avdd_0v75_s0: nldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "avdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v85_s0: nldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_0v85_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v75_s0: nldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&tsadc {
status = "okay";
};
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
&u2phy2 {
status = "okay";
};
&u2phy2_host {
phy-supply = <&vcc5v0_host_20>;
status = "okay";
};
&u2phy3 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};

75
package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig
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@ -1,75 +0,0 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588s-nanopi-r6c"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_EVB_RK3588=y
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6c.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_ERRNO_STR=y

75
package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig
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@ -1,75 +0,0 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588s-nanopi-r6s"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_EVB_RK3588=y
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_ERRNO_STR=y