From 82e6f282bdd7c500fb983d788d77dbb40be060d8 Mon Sep 17 00:00:00 2001 From: CN_SZTL Date: Sat, 1 Feb 2020 02:53:47 +0800 Subject: [PATCH] x86: update default packages --- .../sunxi/base-files/etc/board.d/01_leds | 20 ++ target/linux/sunxi/base-files/root/setup.sh | 94 ++++++ .../036-SWC-add-nanopi-r1-and-duo2.patch | 276 ++++++++++++++++++ ...0-ARM-dts-friendlyelec-nanopi-r1s-h5.patch | 245 ++++++++++++++++ target/linux/x86/Makefile | 7 +- ...ings-on-Intel-if-BIOS-hasn-t-already.patch | 53 ++++ ...ings-on-Intel-if-BIOS-hasn-t-already.patch | 53 ++++ 7 files changed, 747 insertions(+), 1 deletion(-) create mode 100755 target/linux/sunxi/base-files/etc/board.d/01_leds create mode 100755 target/linux/sunxi/base-files/root/setup.sh create mode 100644 target/linux/sunxi/patches-4.14/036-SWC-add-nanopi-r1-and-duo2.patch create mode 100644 target/linux/sunxi/patches-4.14/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch create mode 100644 target/linux/x86/patches-4.14/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch create mode 100644 target/linux/x86/patches-4.19/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch diff --git a/target/linux/sunxi/base-files/etc/board.d/01_leds b/target/linux/sunxi/base-files/etc/board.d/01_leds new file mode 100755 index 0000000000..9c534ea50b --- /dev/null +++ b/target/linux/sunxi/base-files/etc/board.d/01_leds @@ -0,0 +1,20 @@ +#!/bin/sh + +. /lib/functions/uci-defaults.sh + +board_config_update + +case "$(board_name)" in +"friendlyelec,nanopi-r1" \ +|"friendlyelec,nanopi-r1s-h3" \ +|"friendlyelec,nanopi-r1s-h5") + ucidef_set_led_netdev "wan_link" "led2-wan" "LED2" "eth0" "link" + ucidef_set_led_netdev "lan_link" "led3-lan" "LED3" "eth1" "link" + ;; +*) + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/sunxi/base-files/root/setup.sh b/target/linux/sunxi/base-files/root/setup.sh new file mode 100755 index 0000000000..575cfc1f5a --- /dev/null +++ b/target/linux/sunxi/base-files/root/setup.sh @@ -0,0 +1,94 @@ +#!/bin/sh + +# THIS SCIPRT ONLY RUN ONCE. Base on /etc/firstboot_${board} + +setup_ssid() +{ + local r=$1 + local chip + + if ! uci show wireless.${r} >/dev/null 2>&1; then + return + fi + + logger "${TAG}: setup $1's ssid" + wlan_path=/sys/devices/`uci get wireless.${r}.path` + wlan_path=`find ${wlan_path} -name wlan* | tail -n 1` + local mac=`cat ${wlan_path}/address` + + local dev_path=/sys/devices/`uci get wireless.${r}.path` + + if [ -e "${dev_path}/../idVendor" -a -e "${dev_path}/../idProduct" ]; then + idVendor=`cat ${dev_path}/../idVendor` + idProduct=`cat ${dev_path}/../idProduct` + if [ "x${idVendor}:${idProduct}" = "x0bda:c811" ]; then + chip="rtl8821cu" + touch ${FE_DIR}/first_insert_${chip} # for /etc/hotplug.d/usb/31-usb_wifi + fi + fi + + if [ -e "${dev_path}/vendor" -a -e "${dev_path}/device" ]; then + idVendor=`cat ${dev_path}/vendor` + idProduct=`cat ${dev_path}/device` + + # enable 5g wifi-ap (t4) + if [ "x${idVendor}:${idProduct}" = "x0x02d0:0x4356" ]; then + uci set wireless.${r}.hwmode='11a' + uci set wireless.${r}.channel='153' + fi + + # r2 + if [ "x${idVendor}:${idProduct}" = "x0x02d0:0xa9bf" ]; then + uci set wireless.${r}.hwmode='11a' + uci set wireless.${r}.channel='153' + fi + fi + + uci set wireless.${r}.disabled=0 + if [ -n "${chip}" ];then + uci set wireless.default_${r}.ssid=${chip}-${mac} + else + uci set wireless.default_${r}.ssid=FriendlyWrt-${mac} + fi + uci set wireless.default_${r}.encryption=psk2 + uci set wireless.default_${r}.key=password + uci commit +} + +FE_DIR=/root/.friendlyelec/ +mkdir -p ${FE_DIR} +TAG=friendlyelec +logger "${TAG}: /root/setup.sh running" + +VENDOR=$(cat /tmp/sysinfo/board_name | cut -d , -f1) +BOARD=$(cat /tmp/sysinfo/board_name | cut -d , -f2) +if [ x${VENDOR} != x"friendlyelec" ]; then + if [ x${VENDOR} != x"friendlyarm" ]; then + logger "only support friendlyelec boards. exiting..." + exit 0 + fi +fi + +if [ -f /sys/class/sunxi_info/sys_info ]; then + SUNXI_BOARD=`grep "board_name" /sys/class/sunxi_info/sys_info` + SUNXI_BOARD=${SUNXI_BOARD#*FriendlyElec } + + logger "${TAG}: init for ${SUNXI_BOARD}" + if ls /root/board/${SUNXI_BOARD}/* >/dev/null 2>&1; then + cp -rf /root/board/${SUNXI_BOARD}/* / + fi +fi + +WIFI_NUM=`find /sys/class/net/ -name wlan* | wc -l` +if [ ${WIFI_NUM} -gt 0 ]; then + # update /etc/config/wireless + for i in `seq 0 ${WIFI_NUM}`; do + setup_ssid radio${i} + done +fi + +/etc/init.d/led restart +/etc/init.d/network restart +/etc/init.d/dnsmasq restart + +logger "done" diff --git a/target/linux/sunxi/patches-4.14/036-SWC-add-nanopi-r1-and-duo2.patch b/target/linux/sunxi/patches-4.14/036-SWC-add-nanopi-r1-and-duo2.patch new file mode 100644 index 0000000000..aa8d11beb7 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/036-SWC-add-nanopi-r1-and-duo2.patch @@ -0,0 +1,276 @@ +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index d17045a..9e1be8b 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -924,2 +924,4 @@ + sun8i-h3-nanopi-neo.dtb \ ++ sun8i-h3-nanopi-duo2.dtb \ ++ sun8i-h3-nanopi-r1.dtb \ + sun8i-h3-nanopi-neo-air.dtb \ +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts +new file mode 100644 +index 0000000..9f33f6f +--- /dev/null ++++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts +@@ -0,0 +1,102 @@ ++/* ++ * Copyright (C) 2019 Igor Pecovnik ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include "sun8i-h3-nanopi.dtsi" ++ ++/ { ++ model = "FriendlyARM NanoPi R1"; ++ compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&pio { ++ gmac_power_pin_nanopi: gmac_power_pin@0 { ++ pins = "PD6"; ++ function = "gpio_out"; ++ }; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; +diff --git a/configs/nanopi_r1_defconfig b/configs/nanopi_r1_defconfig +new file mode 100644 +index 0000000..dee7d9d +--- /dev/null ++++ b/configs/nanopi_r1_defconfig +@@ -0,0 +1,22 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN8I_H3=y ++CONFIG_DRAM_CLK=408 ++CONFIG_DRAM_ZQ=3881979 ++CONFIG_DRAM_ODT_EN=y ++CONFIG_MACPWR="PD6" ++# CONFIG_VIDEO_DE2 is not set ++CONFIG_NR_DRAM_BANKS=1 ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_CONSOLE_MUX=y ++CONFIG_SYS_CLK_FREQ=480000000 ++# CONFIG_CMD_FLASH is not set ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-r1" ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +diff --git a/configs/nanopi_duo2_defconfig b/configs/nanopi_duo2_defconfig +new file mode 100644 +index 0000000..1e51018 +--- /dev/null ++++ b/configs/nanopi_duo2_defconfig +@@ -0,0 +1,21 @@ @@ -0,0 +1,126 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SYS_TEXT_BASE=0x4a000000 ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_MACH_SUN8I_H3=y ++CONFIG_DRAM_CLK=408 ++CONFIG_DRAM_ZQ=3881979 ++CONFIG_DRAM_ODT_EN=y ++# CONFIG_VIDEO_DE2 is not set ++CONFIG_DEVEL=y ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_CONSOLE_MUX=y ++CONFIG_SPL=y ++CONFIG_SYS_CLK_FREQ=480000000 ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_SPL_SPI_SUNXI=y ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts +new file mode 100644 +index 0000000..b6afe20 +--- /dev/null ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts +@@ -0,0 +1,98 @@ ++/* ++ * adapted by Igor Pecovnik igor@armbian.com ++ * Copyright (C) 2017 Jelle van der Waa ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun8i-h3.dtsi" ++#include "sunxi-common-regulators.dtsi" ++ ++#include ++#include ++ ++/ { ++ model = "FriendlyARM NanoPi DUO 2"; ++ compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr { ++ label = "nanopi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ ++ default-state = "on"; ++ }; ++ ++ status { ++ label = "nanopi:blue:status"; ++ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ ++ }; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ ++ cd-inverted; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* USB VBUS is always on */ ++ status = "okay"; ++}; diff --git a/target/linux/sunxi/patches-4.14/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch b/target/linux/sunxi/patches-4.14/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch new file mode 100644 index 0000000000..981a01a601 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch @@ -0,0 +1,245 @@ +--- a/arch/arm64/boot/dts/allwinner/Makefile 2019-12-22 13:59:07.075152708 +0800 ++++ b/arch/arm64/boot/dts/allwinner/Makefile 2019-12-22 14:03:57.208779217 +0800 +@@ -11,6 +11,7 @@ + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s.dtb + + always := $(dtb-y) + subdir-y := $(dts-dirs) +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s.dts 2019-12-22 14:04:36.978610138 +0800 +@@ -0,0 +1,232 @@ ++/* ++ * Copyright (C) 2017 Icenowy Zheng ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun50i-h5.dtsi" ++ ++#include ++#include ++#include ++#include ++/ { ++ model = "FriendlyElec NanoPi-R1S-H5"; ++ compatible = "friendlyelec,nanopi-r1s-h5", "allwinner,sun50i-h5"; ++ ++ aliases { ++ ethernet0 = &emac; ++ serial0 = &uart0; ++ }; ++ ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_en_npi>; ++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ ++ post-power-on-delay-ms = <200>; ++ }; ++ ++ r-gpio-keys { ++ compatible = "gpio-keys"; ++ ++ k1@0 { ++ label = "k1"; ++ linux,code = ; ++ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ status { ++ label = "status_led"; ++ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ label = "LED2"; ++ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ linux,default-trigger = "netdev"; ++ }; ++ ++ led3 { ++ label = "LED3"; ++ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ linux,default-trigger = "netdev"; ++ }; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ reg_usb0_vbus: usb0-vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb0-vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ ++ status = "okay"; ++ }; ++}; ++ ++ ++ ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@7 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++}; ++&r_pio { ++ wifi_en_npi: wifi_en_pin { ++ pins = "PL7"; ++ function = "gpio_out"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++®_usb0_vbus { ++ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* USB Type-A port's VBUS is always on */ ++ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ ++ usb0_vbus-supply = <®_usb0_vbus>; ++ status = "okay"; ++}; ++ diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index caa2e0b07a..58926c5b61 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -19,7 +19,12 @@ KERNELNAME:=bzImage include $(INCLUDE_DIR)/target.mk -DEFAULT_PACKAGES += partx-utils mkf2fs e2fsprogs +DEFAULT_PACKAGES += partx-utils mkf2fs fdisk e2fsprogs wpad kmod-usb-hid \ + kmod-ath5k kmod-ath9k kmod-ath9k-htc kmod-ath10k kmod-rt2800-usb kmod-e1000e kmod-igb kmod-igbvf kmod-ixgbe kmod-pcnet32 kmod-tulip kmod-vmxnet3 kmod-i40e kmod-i40evf kmod-r8125 kmod-8139cp kmod-8139too kmod-fs-f2fs \ + ath10k-firmware-qca988x ath10k-firmware-qca9888 ath10k-firmware-qca9984 brcmfmac-firmware-43602a1-pcie \ + alsa-utils kmod-ac97 kmod-sound-hda-core kmod-sound-hda-codec-realtek kmod-sound-hda-codec-via kmod-sound-via82xx kmod-usb-audio \ + kmod-usb-net kmod-usb-net-asix kmod-usb-net-asix-ax88179 kmod-usb-net-rtl8150 kmod-usb-net-rtl8152 \ + htop lm-sensors autocore luci-proto-bonding ca-certificates $(eval $(call BuildTarget)) diff --git a/target/linux/x86/patches-4.14/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch b/target/linux/x86/patches-4.14/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch new file mode 100644 index 0000000000..06e64e3d47 --- /dev/null +++ b/target/linux/x86/patches-4.14/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch @@ -0,0 +1,53 @@ +diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c +index 1905ce9..a4a3ef2 100644 +--- a/arch/x86/kernel/cpu/intel.c ++++ b/arch/x86/kernel/cpu/intel.c +@@ -164,6 +164,7 @@ + static void early_init_intel(struct cpuinfo_x86 *c) + { + u64 misc_enable; ++ bool allow_fast_string = true; + + /* Unmask CPUID levels if masked: */ + if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { +@@ -259,17 +260,35 @@ + * + * Enable PAT WC only on P4, Core 2 or later CPUs. + */ +- if (c->x86 == 6 && c->x86_model < 15) ++ if (c->x86 == 6 && c->x86_model < 15) { ++ allow_fast_string = false; + clear_cpu_cap(c, X86_FEATURE_PAT); +- ++ } + /* +- * If fast string is not enabled in IA32_MISC_ENABLE for any reason, +- * clear the fast string and enhanced fast string CPU capabilities. ++ * If BIOS didn't enable fast string operation, try to enable ++ * it ourselves. If that fails, then clear the fast string ++ * and enhanced fast string CPU capabilities. + */ + if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); ++ ++ if (allow_fast_string && ++ !(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { ++ misc_enable |= MSR_IA32_MISC_ENABLE_FAST_STRING; ++ wrmsrl_safe(MSR_IA32_MISC_ENABLE, misc_enable); ++ ++ /* Re-read to make sure it stuck. */ ++ rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); ++ ++ if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) ++ printk_once(KERN_INFO "BIOS disabled fast string operation, re-enabled sucessfully.\n"); ++ } ++ + if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { +- pr_info("Disabled fast string operations\n"); ++ if (allow_fast_string) ++ printk_once(KERN_INFO FW_WARN "BIOS disabled fast string operation, re-enable failed.\n"); ++ else ++ printk_once(KERN_INFO "Disabled fast string operations\n"); + setup_clear_cpu_cap(X86_FEATURE_REP_GOOD); + setup_clear_cpu_cap(X86_FEATURE_ERMS); + } diff --git a/target/linux/x86/patches-4.19/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch b/target/linux/x86/patches-4.19/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch new file mode 100644 index 0000000000..06e64e3d47 --- /dev/null +++ b/target/linux/x86/patches-4.19/900-x86-Enable-fast-strings-on-Intel-if-BIOS-hasn-t-already.patch @@ -0,0 +1,53 @@ +diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c +index 1905ce9..a4a3ef2 100644 +--- a/arch/x86/kernel/cpu/intel.c ++++ b/arch/x86/kernel/cpu/intel.c +@@ -164,6 +164,7 @@ + static void early_init_intel(struct cpuinfo_x86 *c) + { + u64 misc_enable; ++ bool allow_fast_string = true; + + /* Unmask CPUID levels if masked: */ + if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { +@@ -259,17 +260,35 @@ + * + * Enable PAT WC only on P4, Core 2 or later CPUs. + */ +- if (c->x86 == 6 && c->x86_model < 15) ++ if (c->x86 == 6 && c->x86_model < 15) { ++ allow_fast_string = false; + clear_cpu_cap(c, X86_FEATURE_PAT); +- ++ } + /* +- * If fast string is not enabled in IA32_MISC_ENABLE for any reason, +- * clear the fast string and enhanced fast string CPU capabilities. ++ * If BIOS didn't enable fast string operation, try to enable ++ * it ourselves. If that fails, then clear the fast string ++ * and enhanced fast string CPU capabilities. + */ + if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { + rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); ++ ++ if (allow_fast_string && ++ !(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { ++ misc_enable |= MSR_IA32_MISC_ENABLE_FAST_STRING; ++ wrmsrl_safe(MSR_IA32_MISC_ENABLE, misc_enable); ++ ++ /* Re-read to make sure it stuck. */ ++ rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); ++ ++ if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) ++ printk_once(KERN_INFO "BIOS disabled fast string operation, re-enabled sucessfully.\n"); ++ } ++ + if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) { +- pr_info("Disabled fast string operations\n"); ++ if (allow_fast_string) ++ printk_once(KERN_INFO FW_WARN "BIOS disabled fast string operation, re-enable failed.\n"); ++ else ++ printk_once(KERN_INFO "Disabled fast string operations\n"); + setup_clear_cpu_cap(X86_FEATURE_REP_GOOD); + setup_clear_cpu_cap(X86_FEATURE_ERMS); + }