From c7293bcfcc9748bb1e1a46228aacf979f18a1812 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Fri, 19 Feb 2021 09:16:19 +0000 Subject: [PATCH 01/23] mediatek: move mt7623a-unielec-u7623*.dts* out of patch Instead of adding those device tree sources using a patch, simply move them to the newly created dts folder. Signed-off-by: Daniel Golle --- .../mt7623a-unielec-u7623-02-emmc-512m.dts | 18 + .../dts/mt7623a-unielec-u7623-02-emmc.dtsi | 340 +++++++++++++++ target/linux/mediatek/image/mt7623.mk | 2 + .../0227-arm-dts-Add-Unielec-U7623-DTS.patch | 387 ------------------ 4 files changed, 360 insertions(+), 387 deletions(-) create mode 100644 target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts create mode 100644 target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi delete mode 100644 target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts new file mode 100644 index 0000000000..857d440d0f --- /dev/null +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts @@ -0,0 +1,18 @@ +/* + * Copyright 2018 Kristian Evensen + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; +#include "mt7623a-unielec-u7623-02-emmc.dtsi" + +/ { + model = "UniElec U7623-02 eMMC (512M RAM)"; + compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623"; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x20000000>; + }; +}; diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi new file mode 100644 index 0000000000..3db5dfd381 --- /dev/null +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi @@ -0,0 +1,340 @@ +/* + * Copyright 2018 Kristian Evensen + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include +#include "mt7623.dtsi" +#include "mt6323.dtsi" + +/ { + compatible = "unielec,u7623-02-emmc", "mediatek,mt7623"; + + aliases { + serial2 = &uart2; + }; + + chosen { + bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)"; + stdout-path = "serial2:115200n8"; + }; + + cpus { + cpu@0 { + proc-supply = <&mt6323_vproc_reg>; + }; + + cpu@1 { + proc-supply = <&mt6323_vproc_reg>; + }; + + cpu@2 { + proc-supply = <&mt6323_vproc_reg>; + }; + + cpu@3 { + proc-supply = <&mt6323_vproc_reg>; + }; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "fixed-5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key_pins_a>; + + factory { + label = "factory"; + linux,code = ; + gpios = <&pio 256 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_unielec>; + + led3 { + label = "u7623-01:green:led3"; + gpios = <&pio 14 GPIO_ACTIVE_LOW>; + }; + + led4 { + label = "u7623-01:green:led4"; + gpios = <&pio 15 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&crypto { + status = "okay"; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "trgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + mt7530: switch@0 { + compatible = "mediatek,mt7530"; + }; + }; +}; + +&mt7530 { + compatible = "mediatek,mt7530"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + pinctrl-names = "default"; + mediatek,mcm; + resets = <ðsys 2>; + reset-names = "mcm"; + core-supply = <&mt6323_vpa_reg>; + io-supply = <&mt6323_vemc3v3_reg>; + + dsa,mii-bus = <&mdio>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + port@0 { + reg = <0>; + label = "lan0"; + cpu = <&cpu_port0>; + }; + + port@1 { + reg = <1>; + label = "lan1"; + cpu = <&cpu_port0>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + cpu = <&cpu_port0>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + cpu = <&cpu_port0>; + }; + + port@4 { + reg = <4>; + label = "wan"; + cpu = <&cpu_port0>; + }; + + cpu_port0: port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "trgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; +}; + +&pio { + key_pins_a: keys-alt { + pins-keys { + pinmux = , + ; + input-enable; + }; + }; + + led_pins_unielec: leds-unielec { + pins-leds { + pinmux = , + ; + }; + }; + + mmc0_pins_default: mmc0default { + pins_cmd_dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + bias-pull-up; + }; + + pins_clk { + pinmux = ; + bias-pull-down; + }; + + pins_rst { + pinmux = ; + bias-pull-up; + }; + }; + + mmc0_pins_uhs: mmc0 { + pins_cmd_dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + pins_clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins_rst { + pinmux = ; + bias-pull-up; + }; + }; + + pcie_default: pcie_pin_default { + pins_cmd_dat { + pinmux = , + ; + bias-disable; + }; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins_a>; + status = "okay"; +}; + +&pwrap { + mt6323 { + mt6323led: led { + compatible = "mediatek,mt6323-led"; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "led0"; + }; + }; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins_b>; + status = "okay"; +}; + +&usb1 { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_3p3v>; + status = "okay"; +}; + +&u3phy1 { + status = "okay"; +}; + +&u3phy2 { + status = "okay"; + mediatek,phy-switch = <&hifsys>; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_default>; + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + + pcie@2,0 { + status = "okay"; + }; +}; + +&pcie1_phy { + status = "okay"; +}; + diff --git a/target/linux/mediatek/image/mt7623.mk b/target/linux/mediatek/image/mt7623.mk index 72758ddbaa..56f67c0e89 100644 --- a/target/linux/mediatek/image/mt7623.mk +++ b/target/linux/mediatek/image/mt7623.mk @@ -63,6 +63,7 @@ define Device/unielec_u7623-emmc # When we use FIT images, U-Boot will populate the /memory node with the correct # memory size discovered from the preloader, so we don't need separate builds. DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m + DEVICE_DTS_DIR := ../dts SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m UBOOT_ENVSIZE := 0x1000 UBOOT_OFFSET := 256k @@ -83,6 +84,7 @@ define Device/unielec_u7623-02-emmc-512m-legacy DEVICE_MODEL := U7623-02 DEVICE_VARIANT := eMMC/512MiB RAM (legacy image) DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m + DEVICE_DTS_DIR := ../dts KERNEL_NAME := zImage KERNEL := kernel-bin | append-dtb | uImage none KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none diff --git a/target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch b/target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch deleted file mode 100644 index 3cb1dab69f..0000000000 --- a/target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch +++ /dev/null @@ -1,387 +0,0 @@ -From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001 -From: Kristian Evensen -Date: Sun, 17 Jun 2018 14:41:47 +0200 -Subject: [PATCH] arm: dts: Add Unielec U7623 DTS - ---- - arch/arm/boot/dts/Makefile | 1 + - .../dts/mt7623a-unielec-u7623-02-emmc-512m.dts | 18 + - .../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 366 +++++++++++++++++++++ - 3 files changed, 385 insertions(+) - create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts - create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -1272,6 +1272,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ - mt7623a-rfb-nand.dtb \ - mt7623n-rfb-emmc.dtb \ - mt7623n-bananapi-bpi-r2.dtb \ -+ mt7623a-unielec-u7623-02-emmc-512m.dtb \ - mt7629-rfb.dtb \ - mt8127-moose.dtb \ - mt8135-evbp1.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts -@@ -0,0 +1,18 @@ -+/* -+ * Copyright 2018 Kristian Evensen -+ * -+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ */ -+ -+/dts-v1/; -+#include "mt7623a-unielec-u7623-02-emmc.dtsi" -+ -+/ { -+ model = "UniElec U7623-02 eMMC (512M RAM)"; -+ compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623"; -+ -+ memory@80000000 { -+ device_type = "memory"; -+ reg = <0 0x80000000 0 0x20000000>; -+ }; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi -@@ -0,0 +1,340 @@ -+/* -+ * Copyright 2018 Kristian Evensen -+ * -+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ */ -+ -+#include -+#include "mt7623.dtsi" -+#include "mt6323.dtsi" -+ -+/ { -+ compatible = "unielec,u7623-02-emmc", "mediatek,mt7623"; -+ -+ aliases { -+ serial2 = &uart2; -+ }; -+ -+ chosen { -+ bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)"; -+ stdout-path = "serial2:115200n8"; -+ }; -+ -+ cpus { -+ cpu@0 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ -+ cpu@1 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ -+ cpu@2 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ -+ cpu@3 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ }; -+ -+ reg_1p8v: regulator-1p8v { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-1.8V"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-3.3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ reg_5v: regulator-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-5V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&key_pins_a>; -+ -+ factory { -+ label = "factory"; -+ linux,code = ; -+ gpios = <&pio 256 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&led_pins_unielec>; -+ -+ led3 { -+ label = "u7623-01:green:led3"; -+ gpios = <&pio 14 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led4 { -+ label = "u7623-01:green:led4"; -+ gpios = <&pio 15 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&crypto { -+ status = "okay"; -+}; -+ -+ð { -+ status = "okay"; -+ -+ gmac0: mac@0 { -+ compatible = "mediatek,eth-mac"; -+ reg = <0>; -+ phy-mode = "trgmii"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ pause; -+ }; -+ }; -+ -+ mdio: mdio-bus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mt7530: switch@0 { -+ compatible = "mediatek,mt7530"; -+ }; -+ }; -+}; -+ -+&mt7530 { -+ compatible = "mediatek,mt7530"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0>; -+ pinctrl-names = "default"; -+ mediatek,mcm; -+ resets = <ðsys 2>; -+ reset-names = "mcm"; -+ core-supply = <&mt6323_vpa_reg>; -+ io-supply = <&mt6323_vemc3v3_reg>; -+ -+ dsa,mii-bus = <&mdio>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0>; -+ -+ port@0 { -+ reg = <0>; -+ label = "lan0"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ label = "lan1"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ label = "lan2"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ label = "lan3"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@4 { -+ reg = <4>; -+ label = "wan"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ cpu_port0: port@6 { -+ reg = <6>; -+ label = "cpu"; -+ ethernet = <&gmac0>; -+ phy-mode = "trgmii"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+ }; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default", "state_uhs"; -+ pinctrl-0 = <&mmc0_pins_default>; -+ pinctrl-1 = <&mmc0_pins_uhs>; -+ status = "okay"; -+ bus-width = <8>; -+ max-frequency = <50000000>; -+ cap-mmc-highspeed; -+ vmmc-supply = <®_3p3v>; -+ vqmmc-supply = <®_1p8v>; -+ non-removable; -+}; -+ -+&pio { -+ key_pins_a: keys-alt { -+ pins-keys { -+ pinmux = , -+ ; -+ input-enable; -+ }; -+ }; -+ -+ led_pins_unielec: leds-unielec { -+ pins-leds { -+ pinmux = , -+ ; -+ }; -+ }; -+ -+ mmc0_pins_default: mmc0default { -+ pins_cmd_dat { -+ pinmux = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ input-enable; -+ bias-pull-up; -+ }; -+ -+ pins_clk { -+ pinmux = ; -+ bias-pull-down; -+ }; -+ -+ pins_rst { -+ pinmux = ; -+ bias-pull-up; -+ }; -+ }; -+ -+ mmc0_pins_uhs: mmc0 { -+ pins_cmd_dat { -+ pinmux = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ input-enable; -+ drive-strength = ; -+ bias-pull-up = ; -+ }; -+ -+ pins_clk { -+ pinmux = ; -+ drive-strength = ; -+ bias-pull-down = ; -+ }; -+ -+ pins_rst { -+ pinmux = ; -+ bias-pull-up; -+ }; -+ }; -+ -+ pcie_default: pcie_pin_default { -+ pins_cmd_dat { -+ pinmux = , -+ ; -+ bias-disable; -+ }; -+ }; -+}; -+ -+&pwm { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm_pins_a>; -+ status = "okay"; -+}; -+ -+&pwrap { -+ mt6323 { -+ mt6323led: led { -+ compatible = "mediatek,mt6323-led"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ led@0 { -+ reg = <0>; -+ label = "led0"; -+ }; -+ }; -+ }; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2_pins_b>; -+ status = "okay"; -+}; -+ -+&usb1 { -+ vusb33-supply = <®_3p3v>; -+ vbus-supply = <®_3p3v>; -+ status = "okay"; -+}; -+ -+&u3phy1 { -+ status = "okay"; -+}; -+ -+&u3phy2 { -+ status = "okay"; -+ mediatek,phy-switch = <&hifsys>; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_default>; -+ status = "okay"; -+ -+ pcie@1,0 { -+ status = "okay"; -+ }; -+ -+ pcie@2,0 { -+ status = "okay"; -+ }; -+}; -+ -+&pcie1_phy { -+ status = "okay"; -+}; -+ From 7febba3e5074e53d0e9972a52ec6afd4833ae6e0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Fri, 19 Feb 2021 11:06:23 +0100 Subject: [PATCH 02/23] cypress-firmware: fix PKG_SOURCE_URL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Download link has been moved. Signed-off-by: Álvaro Fernández Rojas --- package/firmware/cypress-firmware/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/firmware/cypress-firmware/Makefile b/package/firmware/cypress-firmware/Makefile index d881384006..d4ace8509a 100644 --- a/package/firmware/cypress-firmware/Makefile +++ b/package/firmware/cypress-firmware/Makefile @@ -15,7 +15,7 @@ PKG_RELEASE:=3 PKG_SOURCE_UNZIP:=cypress-firmware-$(PKG_VERSION).tar.gz PKG_SOURCE:=cypress-fmac-$(PKG_VERSION).zip -PKG_SOURCE_URL:=https://community.cypress.com/servlet/JiveServlet/download/19375-1-53475/ +PKG_SOURCE_URL:=https://community.cypress.com/gfawx74859/attachments/gfawx74859/resourcelibrary/1016/1/ PKG_HASH:=b12b0570f462c2f3c26dde98b10235a845a7109037def1e7e51af728bcc1a958 PKG_MAINTAINER:=Álvaro Fernández Rojas From 31a06f8fcc575d228be73d66e0ae6619855de2c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Fri, 19 Feb 2021 12:25:38 +0100 Subject: [PATCH 03/23] bcm63xx: update ethernet kernel panics fix MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use new patch from Sieng Piaw Liew. Signed-off-by: Sieng Piaw Liew Signed-off-by: Álvaro Fernández Rojas --- .../027-bcm63xx_enet-fix-kernel-panic.patch | 50 +++++++++++++------ ...402_bcm63xx_enet_vlan_incoming_fixed.patch | 2 +- ...-move-phy_-dis-connect-into-probe-re.patch | 18 +++---- ...enable-rgmii-clock-on-external-ports.patch | 2 +- .../423-bcm63xx_enet_add_b53_support.patch | 12 ++--- ...4-bcm63xx_enet_no_request_mem_region.patch | 2 +- .../428-bcm63xx_enet-rgmii-ctrl-fix.patch | 2 +- .../047-bcm63xx_enet-fix-kernel-panic.patch | 50 +++++++++++++------ ...402_bcm63xx_enet_vlan_incoming_fixed.patch | 2 +- ...-move-phy_-dis-connect-into-probe-re.patch | 18 +++---- ...enable-rgmii-clock-on-external-ports.patch | 2 +- .../423-bcm63xx_enet_add_b53_support.patch | 12 ++--- ...4-bcm63xx_enet_no_request_mem_region.patch | 2 +- .../428-bcm63xx_enet-rgmii-ctrl-fix.patch | 2 +- 14 files changed, 108 insertions(+), 68 deletions(-) diff --git a/target/linux/bcm63xx/patches-5.10/027-bcm63xx_enet-fix-kernel-panic.patch b/target/linux/bcm63xx/patches-5.10/027-bcm63xx_enet-fix-kernel-panic.patch index 6f2ab6e735..6d07c737e7 100644 --- a/target/linux/bcm63xx/patches-5.10/027-bcm63xx_enet-fix-kernel-panic.patch +++ b/target/linux/bcm63xx/patches-5.10/027-bcm63xx_enet-fix-kernel-panic.patch @@ -1,15 +1,23 @@ +From ca6be00ca1d3a2f5b8794894e2dae175e63768f5 Mon Sep 17 00:00:00 2001 +From: Sieng Piaw Liew +Date: Tue, 16 Feb 2021 16:23:08 +0800 +Subject: [PATCH] bcm63xx_enet: Fix sporadic kernel panic + +In ndo_stop functions, netdev_completed_queue() is called during forced +tx reclaim, after netdev_reset_queue(). This may trigger kernel panic if +there is any tx skb left. + +This patch moves netdev_reset_queue() to after tx reclaim, so BQL can +complete successfully then reset. + +Signed-off-by: Sieng Piaw Liew +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -1104,6 +1104,8 @@ static int bcm_enet_open(struct net_devi - else - bcm_enet_adjust_link(dev); - -+ netdev_reset_queue(dev); -+ - netif_start_queue(dev); - return 0; - -@@ -1192,7 +1194,6 @@ static int bcm_enet_stop(struct net_devi +@@ -1192,7 +1192,6 @@ static int bcm_enet_stop(struct net_devi kdev = &priv->pdev->dev; netif_stop_queue(dev); @@ -17,13 +25,15 @@ napi_disable(&priv->napi); if (priv->has_phy) phy_stop(dev->phydev); -@@ -2262,6 +2263,7 @@ static int bcm_enetsw_open(struct net_de - enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK, - ENETDMAC_IRMASK, priv->tx_chan); +@@ -1231,6 +1230,9 @@ static int bcm_enet_stop(struct net_devi + if (priv->has_phy) + phy_disconnect(dev->phydev); ++ /* reset BQL after forced tx reclaim to not kernel panic */ + netdev_reset_queue(dev); - netif_carrier_on(dev); - netif_start_queue(dev); ++ + return 0; + } @@ -2343,7 +2345,6 @@ static int bcm_enetsw_stop(struct net_de @@ -33,3 +43,13 @@ napi_disable(&priv->napi); del_timer_sync(&priv->rx_timeout); +@@ -2371,6 +2372,9 @@ static int bcm_enetsw_stop(struct net_de + free_irq(priv->irq_tx, dev); + free_irq(priv->irq_rx, dev); + ++ /* reset BQL after forced tx reclaim to not kernel panic */ ++ netdev_reset_queue(dev); ++ + return 0; + } + diff --git a/target/linux/bcm63xx/patches-5.10/402_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/bcm63xx/patches-5.10/402_bcm63xx_enet_vlan_incoming_fixed.patch index bf49440a3c..a034c97a96 100644 --- a/target/linux/bcm63xx/patches-5.10/402_bcm63xx_enet_vlan_incoming_fixed.patch +++ b/target/linux/bcm63xx/patches-5.10/402_bcm63xx_enet_vlan_incoming_fixed.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -1626,7 +1626,7 @@ static int bcm_enet_change_mtu(struct ne +@@ -1627,7 +1627,7 @@ static int bcm_enet_change_mtu(struct ne return -EBUSY; /* add ethernet header + vlan tag size */ diff --git a/target/linux/bcm63xx/patches-5.10/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch b/target/linux/bcm63xx/patches-5.10/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch index 7db32c315f..44cbf75fe3 100644 --- a/target/linux/bcm63xx/patches-5.10/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch +++ b/target/linux/bcm63xx/patches-5.10/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch @@ -79,7 +79,7 @@ Signed-off-by: Jonas Gorski else bcm_enet_adjust_link(dev); -@@ -1132,10 +1109,6 @@ out_freeirq_rx: +@@ -1130,10 +1107,6 @@ out_freeirq_rx: out_freeirq: free_irq(dev->irq, dev); @@ -90,7 +90,7 @@ Signed-off-by: Jonas Gorski return ret; } -@@ -1228,10 +1201,6 @@ static int bcm_enet_stop(struct net_devi +@@ -1226,10 +1199,6 @@ static int bcm_enet_stop(struct net_devi free_irq(priv->irq_rx, dev); free_irq(dev->irq, dev); @@ -98,10 +98,10 @@ Signed-off-by: Jonas Gorski - if (priv->has_phy) - phy_disconnect(dev->phydev); - - return 0; - } + /* reset BQL after forced tx reclaim to not kernel panic */ + netdev_reset_queue(dev); -@@ -1796,14 +1765,47 @@ static int bcm_enet_probe(struct platfor +@@ -1797,14 +1766,47 @@ static int bcm_enet_probe(struct platfor /* do minimal hardware init to be able to probe mii bus */ bcm_enet_hw_preinit(priv); @@ -150,7 +150,7 @@ Signed-off-by: Jonas Gorski } bus = priv->mii_bus; -@@ -1827,6 +1829,26 @@ static int bcm_enet_probe(struct platfor +@@ -1828,6 +1830,26 @@ static int bcm_enet_probe(struct platfor dev_err(&pdev->dev, "unable to register mdio bus\n"); goto out_free_mdio; } @@ -177,7 +177,7 @@ Signed-off-by: Jonas Gorski } else { /* run platform code to initialize PHY device */ -@@ -1834,45 +1856,16 @@ static int bcm_enet_probe(struct platfor +@@ -1835,45 +1857,16 @@ static int bcm_enet_probe(struct platfor pd->mii_config(dev, 1, bcm_enet_mdio_read_mii, bcm_enet_mdio_write_mii)) { dev_err(&pdev->dev, "unable to configure mdio bus\n"); @@ -227,7 +227,7 @@ Signed-off-by: Jonas Gorski if (priv->mii_bus) mdiobus_unregister(priv->mii_bus); -@@ -1880,6 +1873,9 @@ out_free_mdio: +@@ -1881,6 +1874,9 @@ out_free_mdio: if (priv->mii_bus) mdiobus_free(priv->mii_bus); @@ -237,7 +237,7 @@ Signed-off-by: Jonas Gorski out_uninit_hw: /* turn off mdc clock */ enet_writel(priv, 0, ENET_MIISC_REG); -@@ -1910,6 +1906,7 @@ static int bcm_enet_remove(struct platfo +@@ -1911,6 +1907,7 @@ static int bcm_enet_remove(struct platfo enet_writel(priv, 0, ENET_MIISC_REG); if (priv->has_phy) { diff --git a/target/linux/bcm63xx/patches-5.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/bcm63xx/patches-5.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch index e52c5f3904..575c433d34 100644 --- a/target/linux/bcm63xx/patches-5.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch +++ b/target/linux/bcm63xx/patches-5.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch @@ -32,7 +32,7 @@ Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports #define ENETSW_MDIOC_EXT_MASK (1 << 16) --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2179,6 +2179,18 @@ static int bcm_enetsw_open(struct net_de +@@ -2180,6 +2180,18 @@ static int bcm_enetsw_open(struct net_de priv->sw_port_link[i] = 0; } diff --git a/target/linux/bcm63xx/patches-5.10/423-bcm63xx_enet_add_b53_support.patch b/target/linux/bcm63xx/patches-5.10/423-bcm63xx_enet_add_b53_support.patch index 6f8c45f133..7703e92e6f 100644 --- a/target/linux/bcm63xx/patches-5.10/423-bcm63xx_enet_add_b53_support.patch +++ b/target/linux/bcm63xx/patches-5.10/423-bcm63xx_enet_add_b53_support.patch @@ -20,7 +20,7 @@ #include #include "bcm63xx_enet.h" -@@ -1926,7 +1927,8 @@ static int bcm_enet_remove(struct platfo +@@ -1927,7 +1928,8 @@ static int bcm_enet_remove(struct platfo return 0; } @@ -30,7 +30,7 @@ .probe = bcm_enet_probe, .remove = bcm_enet_remove, .driver = { -@@ -1935,6 +1937,42 @@ struct platform_driver bcm63xx_enet_driv +@@ -1936,6 +1938,42 @@ struct platform_driver bcm63xx_enet_driv }, }; @@ -73,7 +73,7 @@ /* * switch mii access callbacks */ -@@ -2191,29 +2229,6 @@ static int bcm_enetsw_open(struct net_de +@@ -2192,29 +2230,6 @@ static int bcm_enetsw_open(struct net_de enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); } @@ -103,7 +103,7 @@ /* initialize flow control buffer allocation */ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, ENETDMA_BUFALLOC_REG(priv->rx_chan)); -@@ -2645,6 +2660,9 @@ static int bcm_enetsw_probe(struct platf +@@ -2648,6 +2663,9 @@ static int bcm_enetsw_probe(struct platf struct bcm63xx_enetsw_platform_data *pd; struct resource *res_mem; int ret, irq_rx, irq_tx; @@ -113,7 +113,7 @@ if (!bcm_enet_shared_base[0]) return -EPROBE_DEFER; -@@ -2725,6 +2743,43 @@ static int bcm_enetsw_probe(struct platf +@@ -2728,6 +2746,43 @@ static int bcm_enetsw_probe(struct platf priv->pdev = pdev; priv->net_dev = dev; @@ -157,7 +157,7 @@ return 0; out_disable_clk: -@@ -2746,6 +2801,9 @@ static int bcm_enetsw_remove(struct plat +@@ -2749,6 +2804,9 @@ static int bcm_enetsw_remove(struct plat priv = netdev_priv(dev); unregister_netdev(dev); diff --git a/target/linux/bcm63xx/patches-5.10/424-bcm63xx_enet_no_request_mem_region.patch b/target/linux/bcm63xx/patches-5.10/424-bcm63xx_enet_no_request_mem_region.patch index 0454043309..e5d9d797d0 100644 --- a/target/linux/bcm63xx/patches-5.10/424-bcm63xx_enet_no_request_mem_region.patch +++ b/target/linux/bcm63xx/patches-5.10/424-bcm63xx_enet_no_request_mem_region.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2704,9 +2704,9 @@ static int bcm_enetsw_probe(struct platf +@@ -2707,9 +2707,9 @@ static int bcm_enetsw_probe(struct platf if (ret) goto out; diff --git a/target/linux/bcm63xx/patches-5.10/428-bcm63xx_enet-rgmii-ctrl-fix.patch b/target/linux/bcm63xx/patches-5.10/428-bcm63xx_enet-rgmii-ctrl-fix.patch index fd4b01fbd8..30fdf6f670 100644 --- a/target/linux/bcm63xx/patches-5.10/428-bcm63xx_enet-rgmii-ctrl-fix.patch +++ b/target/linux/bcm63xx/patches-5.10/428-bcm63xx_enet-rgmii-ctrl-fix.patch @@ -12,7 +12,7 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2226,6 +2226,10 @@ static int bcm_enetsw_open(struct net_de +@@ -2227,6 +2227,10 @@ static int bcm_enetsw_open(struct net_de rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; diff --git a/target/linux/bcm63xx/patches-5.4/047-bcm63xx_enet-fix-kernel-panic.patch b/target/linux/bcm63xx/patches-5.4/047-bcm63xx_enet-fix-kernel-panic.patch index 466a64cae1..4a1feb3a10 100644 --- a/target/linux/bcm63xx/patches-5.4/047-bcm63xx_enet-fix-kernel-panic.patch +++ b/target/linux/bcm63xx/patches-5.4/047-bcm63xx_enet-fix-kernel-panic.patch @@ -1,15 +1,23 @@ +From ca6be00ca1d3a2f5b8794894e2dae175e63768f5 Mon Sep 17 00:00:00 2001 +From: Sieng Piaw Liew +Date: Tue, 16 Feb 2021 16:23:08 +0800 +Subject: [PATCH] bcm63xx_enet: Fix sporadic kernel panic + +In ndo_stop functions, netdev_completed_queue() is called during forced +tx reclaim, after netdev_reset_queue(). This may trigger kernel panic if +there is any tx skb left. + +This patch moves netdev_reset_queue() to after tx reclaim, so BQL can +complete successfully then reset. + +Signed-off-by: Sieng Piaw Liew +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -1105,6 +1105,8 @@ static int bcm_enet_open(struct net_devi - else - bcm_enet_adjust_link(dev); - -+ netdev_reset_queue(dev); -+ - netif_start_queue(dev); - return 0; - -@@ -1193,7 +1195,6 @@ static int bcm_enet_stop(struct net_devi +@@ -1193,7 +1193,6 @@ static int bcm_enet_stop(struct net_devi kdev = &priv->pdev->dev; netif_stop_queue(dev); @@ -17,13 +25,15 @@ napi_disable(&priv->napi); if (priv->has_phy) phy_stop(dev->phydev); -@@ -2267,6 +2268,7 @@ static int bcm_enetsw_open(struct net_de - enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK, - ENETDMAC_IRMASK, priv->tx_chan); +@@ -1232,6 +1231,9 @@ static int bcm_enet_stop(struct net_devi + if (priv->has_phy) + phy_disconnect(dev->phydev); ++ /* reset BQL after forced tx reclaim to not kernel panic */ + netdev_reset_queue(dev); - netif_carrier_on(dev); - netif_start_queue(dev); ++ + return 0; + } @@ -2348,7 +2350,6 @@ static int bcm_enetsw_stop(struct net_de @@ -33,3 +43,13 @@ napi_disable(&priv->napi); del_timer_sync(&priv->rx_timeout); +@@ -2376,6 +2377,9 @@ static int bcm_enetsw_stop(struct net_de + free_irq(priv->irq_tx, dev); + free_irq(priv->irq_rx, dev); + ++ /* reset BQL after forced tx reclaim to not kernel panic */ ++ netdev_reset_queue(dev); ++ + return 0; + } + diff --git a/target/linux/bcm63xx/patches-5.4/402_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/bcm63xx/patches-5.4/402_bcm63xx_enet_vlan_incoming_fixed.patch index bd0c4cfc3f..2425e221a2 100644 --- a/target/linux/bcm63xx/patches-5.4/402_bcm63xx_enet_vlan_incoming_fixed.patch +++ b/target/linux/bcm63xx/patches-5.4/402_bcm63xx_enet_vlan_incoming_fixed.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -1630,7 +1630,7 @@ static int bcm_enet_change_mtu(struct ne +@@ -1631,7 +1631,7 @@ static int bcm_enet_change_mtu(struct ne return -EBUSY; /* add ethernet header + vlan tag size */ diff --git a/target/linux/bcm63xx/patches-5.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch b/target/linux/bcm63xx/patches-5.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch index a389f642ad..c9392c216c 100644 --- a/target/linux/bcm63xx/patches-5.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch +++ b/target/linux/bcm63xx/patches-5.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch @@ -79,7 +79,7 @@ Signed-off-by: Jonas Gorski else bcm_enet_adjust_link(dev); -@@ -1133,10 +1110,6 @@ out_freeirq_rx: +@@ -1131,10 +1108,6 @@ out_freeirq_rx: out_freeirq: free_irq(dev->irq, dev); @@ -90,7 +90,7 @@ Signed-off-by: Jonas Gorski return ret; } -@@ -1229,10 +1202,6 @@ static int bcm_enet_stop(struct net_devi +@@ -1227,10 +1200,6 @@ static int bcm_enet_stop(struct net_devi free_irq(priv->irq_rx, dev); free_irq(dev->irq, dev); @@ -98,10 +98,10 @@ Signed-off-by: Jonas Gorski - if (priv->has_phy) - phy_disconnect(dev->phydev); - - return 0; - } + /* reset BQL after forced tx reclaim to not kernel panic */ + netdev_reset_queue(dev); -@@ -1801,14 +1770,47 @@ static int bcm_enet_probe(struct platfor +@@ -1802,14 +1771,47 @@ static int bcm_enet_probe(struct platfor /* do minimal hardware init to be able to probe mii bus */ bcm_enet_hw_preinit(priv); @@ -150,7 +150,7 @@ Signed-off-by: Jonas Gorski } bus = priv->mii_bus; -@@ -1832,6 +1834,26 @@ static int bcm_enet_probe(struct platfor +@@ -1833,6 +1835,26 @@ static int bcm_enet_probe(struct platfor dev_err(&pdev->dev, "unable to register mdio bus\n"); goto out_free_mdio; } @@ -177,7 +177,7 @@ Signed-off-by: Jonas Gorski } else { /* run platform code to initialize PHY device */ -@@ -1839,45 +1861,16 @@ static int bcm_enet_probe(struct platfor +@@ -1840,45 +1862,16 @@ static int bcm_enet_probe(struct platfor pd->mii_config(dev, 1, bcm_enet_mdio_read_mii, bcm_enet_mdio_write_mii)) { dev_err(&pdev->dev, "unable to configure mdio bus\n"); @@ -227,7 +227,7 @@ Signed-off-by: Jonas Gorski if (priv->mii_bus) mdiobus_unregister(priv->mii_bus); -@@ -1885,6 +1878,9 @@ out_free_mdio: +@@ -1886,6 +1879,9 @@ out_free_mdio: if (priv->mii_bus) mdiobus_free(priv->mii_bus); @@ -237,7 +237,7 @@ Signed-off-by: Jonas Gorski out_uninit_hw: /* turn off mdc clock */ enet_writel(priv, 0, ENET_MIISC_REG); -@@ -1915,6 +1911,7 @@ static int bcm_enet_remove(struct platfo +@@ -1916,6 +1912,7 @@ static int bcm_enet_remove(struct platfo enet_writel(priv, 0, ENET_MIISC_REG); if (priv->has_phy) { diff --git a/target/linux/bcm63xx/patches-5.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/bcm63xx/patches-5.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch index 772e40b2b5..86940ae14d 100644 --- a/target/linux/bcm63xx/patches-5.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch +++ b/target/linux/bcm63xx/patches-5.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch @@ -32,7 +32,7 @@ Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports #define ENETSW_MDIOC_EXT_MASK (1 << 16) --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2184,6 +2184,18 @@ static int bcm_enetsw_open(struct net_de +@@ -2185,6 +2185,18 @@ static int bcm_enetsw_open(struct net_de priv->sw_port_link[i] = 0; } diff --git a/target/linux/bcm63xx/patches-5.4/423-bcm63xx_enet_add_b53_support.patch b/target/linux/bcm63xx/patches-5.4/423-bcm63xx_enet_add_b53_support.patch index 961f34ce78..36b8579ca6 100644 --- a/target/linux/bcm63xx/patches-5.4/423-bcm63xx_enet_add_b53_support.patch +++ b/target/linux/bcm63xx/patches-5.4/423-bcm63xx_enet_add_b53_support.patch @@ -20,7 +20,7 @@ #include #include "bcm63xx_enet.h" -@@ -1931,7 +1932,8 @@ static int bcm_enet_remove(struct platfo +@@ -1932,7 +1933,8 @@ static int bcm_enet_remove(struct platfo return 0; } @@ -30,7 +30,7 @@ .probe = bcm_enet_probe, .remove = bcm_enet_remove, .driver = { -@@ -1940,6 +1942,42 @@ struct platform_driver bcm63xx_enet_driv +@@ -1941,6 +1943,42 @@ struct platform_driver bcm63xx_enet_driv }, }; @@ -73,7 +73,7 @@ /* * switch mii access callbacks */ -@@ -2196,29 +2234,6 @@ static int bcm_enetsw_open(struct net_de +@@ -2197,29 +2235,6 @@ static int bcm_enetsw_open(struct net_de enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); } @@ -103,7 +103,7 @@ /* initialize flow control buffer allocation */ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, ENETDMA_BUFALLOC_REG(priv->rx_chan)); -@@ -2652,6 +2667,9 @@ static int bcm_enetsw_probe(struct platf +@@ -2655,6 +2670,9 @@ static int bcm_enetsw_probe(struct platf struct bcm63xx_enetsw_platform_data *pd; struct resource *res_mem; int ret, irq_rx, irq_tx; @@ -113,7 +113,7 @@ if (!bcm_enet_shared_base[0]) return -EPROBE_DEFER; -@@ -2732,6 +2750,43 @@ static int bcm_enetsw_probe(struct platf +@@ -2735,6 +2753,43 @@ static int bcm_enetsw_probe(struct platf priv->pdev = pdev; priv->net_dev = dev; @@ -157,7 +157,7 @@ return 0; out_disable_clk: -@@ -2753,6 +2808,9 @@ static int bcm_enetsw_remove(struct plat +@@ -2756,6 +2811,9 @@ static int bcm_enetsw_remove(struct plat priv = netdev_priv(dev); unregister_netdev(dev); diff --git a/target/linux/bcm63xx/patches-5.4/424-bcm63xx_enet_no_request_mem_region.patch b/target/linux/bcm63xx/patches-5.4/424-bcm63xx_enet_no_request_mem_region.patch index 6c002a7b5f..e87731a1c5 100644 --- a/target/linux/bcm63xx/patches-5.4/424-bcm63xx_enet_no_request_mem_region.patch +++ b/target/linux/bcm63xx/patches-5.4/424-bcm63xx_enet_no_request_mem_region.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2711,9 +2711,9 @@ static int bcm_enetsw_probe(struct platf +@@ -2714,9 +2714,9 @@ static int bcm_enetsw_probe(struct platf if (ret) goto out; diff --git a/target/linux/bcm63xx/patches-5.4/428-bcm63xx_enet-rgmii-ctrl-fix.patch b/target/linux/bcm63xx/patches-5.4/428-bcm63xx_enet-rgmii-ctrl-fix.patch index 52740b9a5b..4c5e43cb0e 100644 --- a/target/linux/bcm63xx/patches-5.4/428-bcm63xx_enet-rgmii-ctrl-fix.patch +++ b/target/linux/bcm63xx/patches-5.4/428-bcm63xx_enet-rgmii-ctrl-fix.patch @@ -12,7 +12,7 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2231,6 +2231,10 @@ static int bcm_enetsw_open(struct net_de +@@ -2232,6 +2232,10 @@ static int bcm_enetsw_open(struct net_de rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; From 45e8d9b480c40b3d8fb1fbfba437bc5c87f319c0 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Fri, 19 Feb 2021 13:47:45 +0100 Subject: [PATCH 04/23] mediatek: fix SPDX license identifier on local DTS files The SPDX license identifier must be in the first line of a file, unless there is a shebang (then it's the second line). Fix this for the local files, do not care about the upstream patches. While at it, update the identifiers where necessary. Signed-off-by: Adrian Schmutzler --- target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts | 3 +-- target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts | 3 +-- .../linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts | 3 +-- target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) diff --git a/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts b/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts index 36d908652d..428777e3f7 100644 --- a/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts +++ b/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) /* * Copyright (c) 2018 MediaTek Inc. * Author: Ryder Lee - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ /dts-v1/; diff --git a/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts b/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts index 2ac1c6a671..2f3e5b1fb0 100644 --- a/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts +++ b/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts @@ -1,9 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) /* * Copyright (c) 2017 MediaTek Inc. * Author: Ming Huang * Sean Wang - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ /dts-v1/; diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts index 857d440d0f..822ca3fd49 100644 --- a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts @@ -1,7 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) /* * Copyright 2018 Kristian Evensen - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi index 3db5dfd381..aa1e82b58a 100644 --- a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi @@ -1,7 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) /* * Copyright 2018 Kristian Evensen - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ #include From 63e1ce3e093492e941a2ff1c9d3b6101b27ec9c1 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Fri, 19 Feb 2021 13:53:22 +0100 Subject: [PATCH 05/23] ath79: fix position of SPDX license identifier Strictly, the identifier needs to be in the line directly after the shebang. Signed-off-by: Adrian Schmutzler --- target/linux/ath79/nand/base-files/etc/init.d/bootcount | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/ath79/nand/base-files/etc/init.d/bootcount b/target/linux/ath79/nand/base-files/etc/init.d/bootcount index b5f920421e..87654ba095 100755 --- a/target/linux/ath79/nand/base-files/etc/init.d/bootcount +++ b/target/linux/ath79/nand/base-files/etc/init.d/bootcount @@ -1,5 +1,4 @@ #!/bin/sh /etc/rc.common - # SPDX-License-Identifier: GPL-2.0-only START=99 From 0265cba40ad4f2b8ff4473ada123c35b53ffd97a Mon Sep 17 00:00:00 2001 From: Stijn Segers Date: Fri, 19 Feb 2021 00:53:26 +0100 Subject: [PATCH 06/23] ramips: remove factory image for TP-Link Archer C20 v1 Similarly to the Archer C2 v1, the Archer C20 v1 will brick when one tries to flash an OpenWrt factory image through the TP-Link web UI. The wiki page contains an explicit warning about this [1]. Disable the factory image altogether since it serves no purpose. [1] https://openwrt.org/toh/tp-link/tp-link_archer_c20_v1#installation Signed-off-by: Stijn Segers --- target/linux/ramips/image/mt7620.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ramips/image/mt7620.mk b/target/linux/ramips/image/mt7620.mk index 7f649aff88..f8905ad2b7 100644 --- a/target/linux/ramips/image/mt7620.mk +++ b/target/linux/ramips/image/mt7620.mk @@ -981,6 +981,7 @@ define Device/tplink_archer-c20-v1 TPLINK_HWID := 0xc2000001 TPLINK_HWREV := 0x44 TPLINK_HWREVADD := 0x1 + IMAGES := sysupgrade.bin DEVICE_MODEL := Archer C20 DEVICE_VARIANT := v1 DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \ From 1e75909a35a2b361cdfdfcf18a26ad61271b174e Mon Sep 17 00:00:00 2001 From: Sander Vanheule Date: Thu, 18 Feb 2021 20:52:53 +0100 Subject: [PATCH 07/23] ramips: mt7621: add TP-Link EAP235-Wall support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The TP-Link EAP235-Wall is a wall-mounted, PoE-powered AC1200 access point with four gigabit ethernet ports. When connecting to the device's serial port, it is strongly advised to use an isolated UART adapter. This prevents linking different power domains created by the PoE power supply, which may damage your devices. The device's U-Boot supports saving modified environments with `saveenv`. However, there is no u-boot-env partition, and saving modifications will cause the partition table to be overwritten. This is not an issue for running OpenWrt, but will prevent the vendor FW from functioning properly. Device specifications: * SoC: MT7621DAT * RAM: 128MiB * Flash: 16MiB SPI-NOR * Wireless 2.4GHz (MT7603EN): b/g/n, 2x2 * Wireless 5GHz (MT7613BEN): a/n/ac, 2x2 * Ethernet: 4× GbE * Back side: ETH0, PoE PD port * Bottom side: ETH1, ETH2, ETH3 * Single white device LED * LED button, reset button (available for failsafe) * PoE pass-through on port ETH3 (enabled with GPIO) Datasheet of the flash chip specifies a maximum frequency of 33MHz, but that didn't work. 20MHz gives no errors with reading (flash dump) or writing (sysupgrade). Device mac addresses: Stock firmware uses the same MAC address for ethernet (on device label) and 2.4GHz wireless. The 5GHz wireless address is incremented by one. This address is stored in the 'info' ('default-mac') partition at an offset of 8 bytes. From OEM ifconfig: eth a4:2b:b0:...:88 ra0 a4:2b:b0:...:88 rai0 a4:2b:b0:...:89 Flashing instructions: * Enable SSH in the web interface, and SSH into the target device * run `cliclientd stopcs`, this should return "success" * upload the factory image via the web interface Debricking: U-boot can be interrupted during boot, serial console is 57600 baud, 8n1 This allows installing a sysupgrade image, or fixing the device in another way. * Access serial header from the side of the board, close to ETH3, pin-out is (1:TX, 2:RX, 3:GND, 4:3.3V), with pin 1 closest to ETH3. * Interrupt bootloader by holding '4' during boot, which drops the bootloader into its shell * Change default 'serverip' and 'ipaddr' variables (optional) * Download initramfs with `tftpboot`, and boot image with `bootm` # tftpboot 84000000 openwrt-initramfs.bin # bootm Revert to stock: Using the tplink-safeloader utility from the firmware-utils package, TP-Link's firmware image can be converted to an OpenWrt-compatible sysupgrade image: $ ./staging_dir/host/bin/tplink-safeloader -B EAP235-WALL-V1 \ -z EAP235-WALLv1_XXX_up_signed.bin -o eap235-sysupgrade.bin This can then be flashed using the OpenWrt sysupgrade interface. The image will appear to be incompatible and must be force flashed, without keeping the current configuration. Known issues: - DFS support is incomplete (known issue with MT7613) - MT7613 radio may stop responding when idling, reboot required. This was an issue with the ddc75ff704 version of mt76, but appears to have improved/disappeared with bc3963764d. Error notice example: [ 7099.554067] mt7615e 0000:02:00.0: Message 73 (seq 1) timeout Hardware was kindly provided for porting by Stijn Segers. Tested-by: Stijn Segers Signed-off-by: Sander Vanheule --- .../dts/mt7621_tplink_eap235-wall-v1.dts | 180 ++++++++++++++++++ target/linux/ramips/image/mt7621.mk | 13 ++ .../mt7621/base-files/etc/board.d/02_network | 3 + tools/firmware-utils/src/tplink-safeloader.c | 29 +++ 4 files changed, 225 insertions(+) create mode 100644 target/linux/ramips/dts/mt7621_tplink_eap235-wall-v1.dts diff --git a/target/linux/ramips/dts/mt7621_tplink_eap235-wall-v1.dts b/target/linux/ramips/dts/mt7621_tplink_eap235-wall-v1.dts new file mode 100644 index 0000000000..17308eb605 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_tplink_eap235-wall-v1.dts @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "mt7621.dtsi" + +#include +#include +#include + +/ { + compatible = "tplink,eap235-wall-v1", "mediatek,mt7621-soc"; + model = "TP-Link EAP235-Wall v1"; + + aliases { + label-mac-device = &gmac0; + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + leds { + compatible = "gpio-leds"; + + led_status: status { + label = "white:status"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + led { + label = "led"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-export { + compatible = "gpio-export"; + + poe_passthrough { + gpio-export,name = "poe-passthrough"; + gpio-export,output = <0>; + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x00000 0x80000>; + read-only; + }; + + partition@80000 { + label = "partition-table"; + reg = <0x80000 0x10000>; + read-only; + }; + + info: partition@90000 { + label = "product-info"; + reg = <0x90000 0x10000>; + read-only; + }; + + partition@a0000 { + compatible = "tplink,firmware"; + label = "firmware"; + reg = <0x0a0000 0xd20000>; + }; + + partition@dc0000 { + label = "user-config"; + reg = <0xdc0000 0x030000>; + read-only; + }; + + /* 0xdf0000 - 0xf30000 unused */ + + partition@f30000 { + label = "mutil-log"; + reg = <0xf30000 0x080000>; + read-only; + }; + + partition@fb0000 { + label = "oops"; + reg = <0xfb0000 0x040000>; + read-only; + }; + + radio: partition@ff0000 { + label = "radio"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&state_default { + gpio { + groups = "uart2", "uart3"; + function = "gpio"; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&radio 0x0>; + mtd-mac-address = <&info 0x8>; + }; +}; + +&pcie1 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&radio 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + mtd-mac-address = <&info 0x8>; + mtd-mac-address-increment = <1>; + }; +}; + +&gmac0 { + mtd-mac-address = <&info 0x8>; +}; + +&switch0 { + ports { + port@0 { + status = "okay"; + label = "lan0"; + }; + + port@1 { + status = "okay"; + label = "lan3"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan1"; + }; + }; +}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 203ca1b908..a4edf0a6df 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -1114,6 +1114,19 @@ define Device/totolink_x5000r endef TARGET_DEVICES += totolink_x5000r +define Device/tplink_eap235-wall-v1 + $(Device/dsa-migration) + $(Device/tplink-safeloader) + DEVICE_MODEL := EAP235-Wall + DEVICE_VARIANT := v1 + DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap + TPLINK_BOARD_ID := EAP235-WALL-V1 + IMAGE_SIZE := 13440k + IMAGE/factory.bin := append-rootfs | tplink-safeloader factory | \ + pad-extra 128 +endef +TARGET_DEVICES += tplink_eap235-wall-v1 + define Device/tplink_re350-v1 $(Device/dsa-migration) $(Device/tplink-safeloader) diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index 46cb65ffbe..89e679be7c 100755 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -55,6 +55,9 @@ ramips_setup_interfaces() mikrotik,routerboard-760igs) ucidef_set_interfaces_lan_wan "lan2 lan3 lan4 lan5" "wan sfp" ;; + tplink,eap235-wall-v1) + ucidef_set_interface_lan "lan0 lan1 lan2 lan3" + ;; ubnt,edgerouter-x) ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4" "eth0" ;; diff --git a/tools/firmware-utils/src/tplink-safeloader.c b/tools/firmware-utils/src/tplink-safeloader.c index b9dfad51a6..da73e1bf30 100644 --- a/tools/firmware-utils/src/tplink-safeloader.c +++ b/tools/firmware-utils/src/tplink-safeloader.c @@ -1447,6 +1447,35 @@ static struct device_info boards[] = { .last_sysupgrade_partition = "file-system" }, + /** Firmware layout for the EAP235-Wall v1 */ + { + .id = "EAP235-WALL-V1", + .support_list = + "SupportList:\r\n" + "EAP235-Wall(TP-Link|UN|AC1200-D):1.0\r\n", + .part_trail = PART_TRAIL_NONE, + .soft_ver = NULL, + .soft_ver_compat_level = 1, + + .partitions = { + {"fs-uboot", 0x00000, 0x80000}, + {"partition-table", 0x80000, 0x02000}, + {"default-mac", 0x90000, 0x01000}, + {"support-list", 0x91000, 0x00100}, + {"product-info", 0x91100, 0x00400}, + {"soft-version", 0x92000, 0x00100}, + {"firmware", 0xa0000, 0xd20000}, + {"user-config", 0xdc0000, 0x30000}, + {"mutil-log", 0xf30000, 0x80000}, + {"oops", 0xfb0000, 0x40000}, + {"radio", 0xff0000, 0x10000}, + {NULL, 0, 0} + }, + + .first_sysupgrade_partition = "os-image", + .last_sysupgrade_partition = "file-system" + }, + /** Firmware layout for the EAP245 v1 */ { .id = "EAP245-V1", From ca6954e2dc3faa32eec54b93bda996c874409675 Mon Sep 17 00:00:00 2001 From: Seo Suchan Date: Thu, 18 Feb 2021 00:06:55 +0900 Subject: [PATCH 08/23] ramips: use lzma-loader for Wevo devices As kernel size increased it start to fail to load squishfs image, using lzma-loader fixed it. wevo_11acnas is almost same device as w2914ns-v2 except ram size, so I expect same thing would've happen in that device too. Signed-off-by: Seo Suchan Reviewed-by: Sungbo Eo --- target/linux/ramips/image/mt7621.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index a4edf0a6df..396b112b76 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -1254,6 +1254,7 @@ TARGET_DEVICES += wavlink_wl-wn531a6 define Device/wevo_11acnas $(Device/dsa-migration) + $(Device/uimage-lzma-loader) IMAGE_SIZE := 16064k UIMAGE_NAME := 11AC-NAS-Router(0.0.0) DEVICE_VENDOR := WeVO @@ -1266,6 +1267,7 @@ TARGET_DEVICES += wevo_11acnas define Device/wevo_w2914ns-v2 $(Device/dsa-migration) + $(Device/uimage-lzma-loader) IMAGE_SIZE := 16064k UIMAGE_NAME := W2914NS-V2(0.0.0) DEVICE_VENDOR := WeVO From a9075d42d7990af230a08bdbb03c14ae2bf27318 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Fri, 12 Feb 2021 16:37:29 +0100 Subject: [PATCH 09/23] layerscape: move rework-sdcard-images out of fsl-sdboot Upcoming devices will not need the migration setup, so let's move it out of the common definition. Signed-off-by: Adrian Schmutzler --- target/linux/layerscape/image/armv7.mk | 3 ++- target/linux/layerscape/image/armv8_64b.mk | 5 ++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target/linux/layerscape/image/armv7.mk b/target/linux/layerscape/image/armv7.mk index 4ab2cec224..da9484764c 100644 --- a/target/linux/layerscape/image/armv7.mk +++ b/target/linux/layerscape/image/armv7.mk @@ -21,7 +21,6 @@ define Device/Default endef define Device/fsl-sdboot - $(Device/rework-sdcard-images) KERNEL = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb IMAGES := sdcard.img.gz sysupgrade.bin IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata @@ -45,6 +44,7 @@ endef TARGET_DEVICES += fsl_ls1021a-twr define Device/fsl_ls1021a-twr-sdboot + $(Device/rework-sdcard-images) $(Device/fsl-sdboot) DEVICE_VENDOR := NXP DEVICE_MODEL := TWR-LS1021A @@ -61,6 +61,7 @@ endef TARGET_DEVICES += fsl_ls1021a-twr-sdboot define Device/fsl_ls1021a-iot-sdboot + $(Device/rework-sdcard-images) $(Device/fsl-sdboot) DEVICE_VENDOR := NXP DEVICE_MODEL := LS1021A-IoT diff --git a/target/linux/layerscape/image/armv8_64b.mk b/target/linux/layerscape/image/armv8_64b.mk index 75d6885c6d..958faa270e 100644 --- a/target/linux/layerscape/image/armv8_64b.mk +++ b/target/linux/layerscape/image/armv8_64b.mk @@ -20,7 +20,6 @@ define Device/Default endef define Device/fsl-sdboot - $(Device/rework-sdcard-images) KERNEL = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb IMAGES := sdcard.img.gz sysupgrade.bin IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata @@ -76,6 +75,7 @@ endef TARGET_DEVICES += fsl_ls1012a-rdb define Device/fsl_ls1012a-frwy-sdboot + $(Device/rework-sdcard-images) $(Device/fsl-sdboot) DEVICE_VENDOR := NXP DEVICE_MODEL := FRWY-LS1012A @@ -126,6 +126,7 @@ endef TARGET_DEVICES += fsl_ls1043a-rdb define Device/fsl_ls1043a-rdb-sdboot + $(Device/rework-sdcard-images) $(Device/fsl-sdboot) DEVICE_VENDOR := NXP DEVICE_MODEL := LS1043A-RDB @@ -176,6 +177,7 @@ endef TARGET_DEVICES += fsl_ls1046a-rdb define Device/fsl_ls1046a-rdb-sdboot + $(Device/rework-sdcard-images) $(Device/fsl-sdboot) DEVICE_VENDOR := NXP DEVICE_MODEL := LS1046A-RDB @@ -228,6 +230,7 @@ endef TARGET_DEVICES += fsl_ls1088a-rdb define Device/fsl_ls1088a-rdb-sdboot + $(Device/rework-sdcard-images) $(Device/fsl-sdboot) DEVICE_VENDOR := NXP DEVICE_MODEL := LS1088A-RDB From 2c2d77bd3bd4691c5f8f1760b9ef16f96f345255 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Mon, 3 Aug 2020 12:52:22 +0800 Subject: [PATCH 10/23] layerscape: add FRWY-LS1046A board support The LS1046A Freeway board (FRWY) is a high-performance computing, evaluation, and development platform that supports the QorIQ LS1046A architecture processor capable of support more than 32,000 CoreMark performance. The FRWY-LS1046A board supports the QorIQ LS1046A processor, onboard DDR4 memory, multiple Gigabit Ethernet, USB3.0 and M2_Type_E interfaces for Wi-Fi. The FRWY-LS1046A-TP includes the Coral Tensor Flow Processing Unit that offloads AI/ML inferencing from the CPU to provide significant boost for AI/ML applications. The FRWY-LS1046A-TP includes one M.2 TPU module and more modules can easily be added including USB versions of the module to scale the AI/ML performance. Signed-off-by: Yangbo Lu [rebase, use AUTORELEASE, fix sorting, add dtb to firmware part] Signed-off-by: Adrian Schmutzler --- package/boot/tfa-layerscape/Makefile | 18 +++++++- package/boot/uboot-layerscape/Makefile | 14 ++++++- .../files/fsl_ls1046a-frwy-sdboot-uEnv.txt | 8 ++++ .../files/fsl_ls1046a-frwy-uEnv.txt | 8 ++++ package/firmware/layerscape/ls-rcw/Makefile | 6 ++- .../base-files/lib/upgrade/platform.sh | 5 +++ target/linux/layerscape/image/armv8_64b.mk | 41 +++++++++++++++++++ 7 files changed, 97 insertions(+), 3 deletions(-) create mode 100644 package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt create mode 100644 package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt diff --git a/package/boot/tfa-layerscape/Makefile b/package/boot/tfa-layerscape/Makefile index bf3f132c08..c0efd3ad9e 100644 --- a/package/boot/tfa-layerscape/Makefile +++ b/package/boot/tfa-layerscape/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=tfa-layerscape PKG_VERSION:=LSDK-20.04-update-290520 -PKG_RELEASE:=2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/atf @@ -74,6 +74,20 @@ define Package/tfa-ls1043a-rdb-sdboot BOOT_MODE:=sd endef +define Package/tfa-ls1046a-frwy + $(Package/tfa-generic) + TITLE:=NXP LS1046AFRWY Trusted Firmware + PLAT:=ls1046afrwy + BOOT_MODE:=qspi +endef + +define Package/tfa-ls1046a-frwy-sdboot + $(Package/tfa-generic) + TITLE:=NXP LS1046AFRWY SD Boot Trusted Firmware + PLAT:=ls1046afrwy + BOOT_MODE:=sd +endef + define Package/tfa-ls1046a-rdb $(Package/tfa-generic) TITLE:=NXP LS1046ARDB Trusted Firmware @@ -134,6 +148,8 @@ TFAS := \ ls1012a-frwy-sdboot \ ls1043a-rdb \ ls1043a-rdb-sdboot \ + ls1046a-frwy \ + ls1046a-frwy-sdboot \ ls1046a-rdb \ ls1046a-rdb-sdboot \ ls1088a-rdb \ diff --git a/package/boot/uboot-layerscape/Makefile b/package/boot/uboot-layerscape/Makefile index ec1b45d70f..98b129f0ff 100644 --- a/package/boot/uboot-layerscape/Makefile +++ b/package/boot/uboot-layerscape/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=uboot-layerscape PKG_VERSION:=LSDK-20.04-update-290520 -PKG_RELEASE:=2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot @@ -55,6 +55,16 @@ define U-Boot/fsl_ls1043a-rdb-sdboot UBOOT_CONFIG:=ls1043ardb_tfa endef +define U-Boot/fsl_ls1046a-frwy + NAME:=NXP LS1046AFRWY + UBOOT_CONFIG:=ls1046afrwy_tfa +endef + +define U-Boot/fsl_ls1046a-frwy-sdboot + NAME:=NXP LS1046AFRWY SD Card Boot + UBOOT_CONFIG:=ls1046afrwy_tfa +endef + define U-Boot/fsl_ls1046a-rdb NAME:=NXP LS1046ARDB UBOOT_CONFIG:=ls1046ardb_tfa @@ -109,6 +119,8 @@ UBOOT_TARGETS := \ fsl_ls1012a-frwy-sdboot \ fsl_ls1043a-rdb \ fsl_ls1043a-rdb-sdboot \ + fsl_ls1046a-frwy \ + fsl_ls1046a-frwy-sdboot \ fsl_ls1046a-rdb \ fsl_ls1046a-rdb-sdboot \ fsl_ls1088a-rdb \ diff --git a/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt new file mode 100644 index 0000000000..ed16dde984 --- /dev/null +++ b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-sdboot-uEnv.txt @@ -0,0 +1,8 @@ +fdtaddr=0x8f000000 +loadaddr=0x81000000 +bootm_size=0x10000000 +hwconfig=fsl_ddr:bank_intlv=auto +sd_boot=ext4load mmc 0:1 ${loadaddr} fitImage;bootm ${loadaddr} +bootargs=root=/dev/mmcblk0p2 rw rootwait rootfstype=squashfs,f2fs noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 +bootcmd=echo starting openwrt ...;run sd_boot +bootdelay=3 diff --git a/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt new file mode 100644 index 0000000000..9daba4aedb --- /dev/null +++ b/package/boot/uboot-layerscape/files/fsl_ls1046a-frwy-uEnv.txt @@ -0,0 +1,8 @@ +fdtaddr=0x8f000000 +loadaddr=0x81000000 +bootm_size=0x10000000 +hwconfig=fsl_ddr:bank_intlv=auto +qspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr +bootargs=root=/dev/mtdblock9 rootfstype=squashfs,jffs2 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 mtdparts=1550000.spi:1m(bl2),4m(fip),1m(u-boot-env),3m(reserved-1),256k(fman),5888k(reserved-2),1m(dtb),16m(kernel),32m(rootfs),49m@0xf00000(firmware) +bootcmd=echo starting openwrt ...;run qspi_boot +bootdelay=3 diff --git a/package/firmware/layerscape/ls-rcw/Makefile b/package/firmware/layerscape/ls-rcw/Makefile index 6245e89633..421ef19e7b 100644 --- a/package/firmware/layerscape/ls-rcw/Makefile +++ b/package/firmware/layerscape/ls-rcw/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-rcw PKG_VERSION:=LSDK-20.04-update-290520 -PKG_RELEASE:=2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/rcw @@ -31,6 +31,8 @@ BOARDS := \ ls1012a-frwy-sdboot \ ls1043a-rdb \ ls1043a-rdb-sdboot \ + ls1046a-frwy \ + ls1046a-frwy-sdboot \ ls1046a-rdb \ ls1046a-rdb-sdboot \ ls1088a-rdb \ @@ -43,6 +45,8 @@ RCW_ls1012a-frdm :=ls1012afrdm/N_SSNP_3305/rcw_800.bin RCW_ls1012a-frwy-sdboot :=ls1012afrwy/N_SSNP_3305/rcw_1000_default.bin RCW_ls1043a-rdb :=ls1043ardb/RR_FQPP_1455/rcw_1600.bin RCW_ls1043a-rdb-sdboot :=ls1043ardb/RR_FQPP_1455/rcw_1600_sdboot.bin +RCW_ls1046a-frwy :=ls1046afrwy/NN_NNQNNPNP_3040_0506/rcw_1600_qspiboot.bin +RCW_ls1046a-frwy-sdboot :=ls1046afrwy/NN_NNQNNPNP_3040_0506/rcw_1600_sdboot.bin RCW_ls1046a-rdb :=ls1046ardb/RR_FFSSPPPH_1133_5559/rcw_1800_qspiboot.bin RCW_ls1046a-rdb-sdboot :=ls1046ardb/RR_FFSSPPPH_1133_5559/rcw_1800_sdboot.bin RCW_ls1088a-rdb :=ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_qspi.bin diff --git a/target/linux/layerscape/base-files/lib/upgrade/platform.sh b/target/linux/layerscape/base-files/lib/upgrade/platform.sh index a8d83de7ea..f9b1e57a43 100644 --- a/target/linux/layerscape/base-files/lib/upgrade/platform.sh +++ b/target/linux/layerscape/base-files/lib/upgrade/platform.sh @@ -72,6 +72,7 @@ platform_copy_config() { fsl,ls1021a-iot-sdboot | \ fsl,ls1021a-twr-sdboot | \ fsl,ls1043a-rdb-sdboot | \ + fsl,ls1046a-frwy-sdboot | \ fsl,ls1046a-rdb-sdboot | \ fsl,ls1088a-rdb-sdboot) platform_copy_config_sdboot @@ -95,6 +96,8 @@ platform_check_image() { fsl,ls1021a-twr-sdboot | \ fsl,ls1043a-rdb | \ fsl,ls1043a-rdb-sdboot | \ + fsl,ls1046a-frwy | \ + fsl,ls1046a-frwy-sdboot | \ fsl,ls1046a-rdb | \ fsl,ls1046a-rdb-sdboot | \ fsl,ls1088a-rdb | \ @@ -125,6 +128,7 @@ platform_do_upgrade() { fsl,ls1012a-rdb | \ fsl,ls1021a-twr | \ fsl,ls1043a-rdb | \ + fsl,ls1046a-frwy | \ fsl,ls1046a-rdb | \ fsl,ls1088a-rdb | \ fsl,ls2088a-rdb) @@ -135,6 +139,7 @@ platform_do_upgrade() { fsl,ls1021a-iot-sdboot | \ fsl,ls1021a-twr-sdboot | \ fsl,ls1043a-rdb-sdboot | \ + fsl,ls1046a-frwy-sdboot | \ fsl,ls1046a-rdb-sdboot | \ fsl,ls1088a-rdb-sdboot) platform_do_upgrade_sdboot "$1" diff --git a/target/linux/layerscape/image/armv8_64b.mk b/target/linux/layerscape/image/armv8_64b.mk index 958faa270e..c037061aa2 100644 --- a/target/linux/layerscape/image/armv8_64b.mk +++ b/target/linux/layerscape/image/armv8_64b.mk @@ -151,6 +151,47 @@ define Device/fsl_ls1043a-rdb-sdboot endef TARGET_DEVICES += fsl_ls1043a-rdb-sdboot +define Device/fsl_ls1046a-frwy + DEVICE_VENDOR := NXP + DEVICE_MODEL := FRWY-LS1046A + DEVICE_VARIANT := Default + DEVICE_PACKAGES += \ + layerscape-fman \ + tfa-ls1046a-frwy + DEVICE_DTS := freescale/fsl-ls1046a-frwy-sdk + IMAGE/firmware.bin := \ + ls-clean | \ + ls-append $(1)-bl2.pbl | pad-to 1M | \ + ls-append $(1)-fip.bin | pad-to 5M | \ + ls-append $(1)-uboot-env.bin | pad-to 9M | \ + ls-append fsl_ls1046a-rdb-fman.bin | pad-to 15M | \ + ls-append-dtb $$(DEVICE_DTS) | pad-to 16M | \ + append-kernel | pad-to 32M | \ + append-rootfs | pad-rootfs | check-size +endef +TARGET_DEVICES += fsl_ls1046a-frwy + +define Device/fsl_ls1046a-frwy-sdboot + $(Device/fsl-sdboot) + DEVICE_VENDOR := NXP + DEVICE_MODEL := FRWY-LS1046A + DEVICE_VARIANT := SD Card Boot + DEVICE_PACKAGES += \ + layerscape-fman \ + tfa-ls1046a-frwy-sdboot + DEVICE_DTS := freescale/fsl-ls1046a-frwy-sdk + IMAGE/sdcard.img.gz := \ + ls-clean | \ + ls-append-sdhead $(1) | pad-to 4K | \ + ls-append $(1)-bl2.pbl | pad-to 1M | \ + ls-append $(1)-fip.bin | pad-to 5M | \ + ls-append $(1)-uboot-env.bin | pad-to 9M | \ + ls-append fsl_ls1046a-rdb-fman.bin | pad-to 16M | \ + ls-append-kernel | pad-to $(LS_SD_ROOTFSPART_OFFSET)M | \ + append-rootfs | pad-to $(LS_SD_IMAGE_SIZE)M | gzip +endef +TARGET_DEVICES += fsl_ls1046a-frwy-sdboot + define Device/fsl_ls1046a-rdb $(Device/fix-sysupgrade) DEVICE_VENDOR := NXP From f59d7aab2a374d27abfdc50348d855db5560db8f Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Mon, 3 Aug 2020 11:59:55 +0800 Subject: [PATCH 11/23] layerscape: add ddr-phy package Add ddr-phy package for layerscape. Currently only LX2160ARDB requires the package. Signed-off-by: Yangbo Lu [use AUTORELEASE] Signed-off-by: Adrian Schmutzler --- .../firmware/layerscape/ls-ddr-phy/Makefile | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 package/firmware/layerscape/ls-ddr-phy/Makefile diff --git a/package/firmware/layerscape/ls-ddr-phy/Makefile b/package/firmware/layerscape/ls-ddr-phy/Makefile new file mode 100644 index 0000000000..ea2ec311b8 --- /dev/null +++ b/package/firmware/layerscape/ls-ddr-phy/Makefile @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Copyright 2020 NXP +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=ls-ddr-phy +PKG_VERSION:=LSDK-20.04-update-290520 +PKG_RELEASE:=$(AUTORELEASE) + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL:=https://github.com/NXP/ddr-phy-binary.git +PKG_SOURCE_VERSION:=fbc036b88acb6c06ffed02c898cbae9856ec75ba +PKG_MIRROR_HASH:=84e2bdea99384211971bb23ba9ed18b5839628ff2aa0738d2978bbdf841638cb +PKG_BUILD_DEPENDS:=tfa-layerscape/host + +PKG_LICENSE:=EULA +PKG_LICENSE_FILES:=NXP-Binary-EULA.txt + +include $(INCLUDE_DIR)/package.mk + +define Package/layerscape-ddr-phy + SECTION:=firmware + CATEGORY:=Firmware + TITLE:=NXP Layerscape DDR PHY firmware + DEPENDS:=@TARGET_layerscape +endef + +define Build/Compile + cd $(PKG_BUILD_DIR)/lx2160a/ && \ + tfa-fiptool create \ + --ddr-immem-udimm-1d ddr4_pmu_train_imem.bin \ + --ddr-immem-udimm-2d ddr4_2d_pmu_train_imem.bin \ + --ddr-dmmem-udimm-1d ddr4_pmu_train_dmem.bin \ + --ddr-dmmem-udimm-2d ddr4_2d_pmu_train_dmem.bin \ + --ddr-immem-rdimm-1d ddr4_rdimm_pmu_train_imem.bin \ + --ddr-immem-rdimm-2d ddr4_rdimm2d_pmu_train_imem.bin \ + --ddr-dmmem-rdimm-1d ddr4_rdimm_pmu_train_dmem.bin \ + --ddr-dmmem-rdimm-2d ddr4_rdimm2d_pmu_train_dmem.bin \ + fip_ddr_all.bin +endef + +define Build/InstallDev + $(INSTALL_DIR) $(STAGING_DIR_IMAGE) + $(CP) $(PKG_BUILD_DIR)/lx2160a/fip_ddr_all.bin \ + $(STAGING_DIR_IMAGE)/fsl_lx2160a-rdb-fip_ddr_all.bin +endef + +$(eval $(call BuildPackage,layerscape-ddr-phy)) From 80dcd14abeed8cd808b92bb307964dbaeb252144 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Thu, 30 Jul 2020 13:12:43 +0800 Subject: [PATCH 12/23] layerscape: add LX2160ARDB (Rev2.0 silicon) board support The QorIQ LX2160A reference design board provides a comprehensive platform that enables design and evaluation of the LX2160A processor. - Enables network intelligence with the next generation Datapath (DPPA2) which provides differentiated offload and a rich set of IO, including 10GE, 25GE, 40GE, and PCIe Gen4 - Delivers unprecedented efficiency and new virtualized networks - Supports designs in 5G packet processing, network function virtualization, storage controller, white box switching, network interface cards, and mobile edge computing - Supports all three LX2 family members (16-core LX2160A; 12-core LX2120A; and 8-core LX2080A) Signed-off-by: Yangbo Lu [use AUTORELEASE, add dtb to firmware part] Signed-off-by: Adrian Schmutzler --- package/boot/tfa-layerscape/Makefile | 18 ++++++- package/boot/uboot-layerscape/Makefile | 12 +++++ .../files/fsl_lx2160a-rdb-sdboot-uEnv.txt | 9 ++++ .../files/fsl_lx2160a-rdb-uEnv.txt | 9 ++++ package/firmware/layerscape/ls-dpl/Makefile | 6 ++- package/firmware/layerscape/ls-mc/Makefile | 4 +- package/firmware/layerscape/ls-rcw/Makefile | 4 ++ .../base-files/lib/upgrade/platform.sh | 13 +++-- target/linux/layerscape/image/armv8_64b.mk | 52 +++++++++++++++++++ 9 files changed, 120 insertions(+), 7 deletions(-) create mode 100644 package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt create mode 100644 package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt diff --git a/package/boot/tfa-layerscape/Makefile b/package/boot/tfa-layerscape/Makefile index c0efd3ad9e..d5a1664278 100644 --- a/package/boot/tfa-layerscape/Makefile +++ b/package/boot/tfa-layerscape/Makefile @@ -123,6 +123,20 @@ define Package/tfa-ls2088a-rdb BOOT_MODE:=nor endef +define Package/tfa-lx2160a-rdb + $(Package/tfa-generic) + TITLE:=NXP LX2160ARDB Trusted Firmware + PLAT:=lx2160ardb + BOOT_MODE:=flexspi_nor +endef + +define Package/tfa-lx2160a-rdb-sdboot + $(Package/tfa-generic) + TITLE:=NXP LX2160ARDB SD Boot Trusted Firmware + PLAT:=lx2160ardb + BOOT_MODE:=sd +endef + define Build/InstallDev $(INSTALL_DIR) $(STAGING_DIR_IMAGE) $(CP) $(PKG_BUILD_DIR)/build/$(PLAT)/release/bl2_$(BOOT_MODE).pbl \ @@ -154,7 +168,9 @@ TFAS := \ ls1046a-rdb-sdboot \ ls1088a-rdb \ ls1088a-rdb-sdboot \ - ls2088a-rdb + ls2088a-rdb \ + lx2160a-rdb \ + lx2160a-rdb-sdboot $(eval $(call HostBuild)) $(foreach tfa,$(TFAS), \ diff --git a/package/boot/uboot-layerscape/Makefile b/package/boot/uboot-layerscape/Makefile index 98b129f0ff..f02356791d 100644 --- a/package/boot/uboot-layerscape/Makefile +++ b/package/boot/uboot-layerscape/Makefile @@ -90,6 +90,16 @@ define U-Boot/fsl_ls2088a-rdb UBOOT_CONFIG:=ls2088ardb_tfa endef +define U-Boot/fsl_lx2160a-rdb + NAME:=NXP LX2160ARDB + UBOOT_CONFIG:=lx2160ardb_tfa +endef + +define U-Boot/fsl_lx2160a-rdb-sdboot + NAME:=NXP LX2160ARDB SD Card Boot + UBOOT_CONFIG:=lx2160ardb_tfa +endef + define U-Boot/fsl_ls1021a-twr NAME:=NXP LS1021ATWR BUILD_SUBTARGET:=armv7 @@ -126,6 +136,8 @@ UBOOT_TARGETS := \ fsl_ls1088a-rdb \ fsl_ls1088a-rdb-sdboot \ fsl_ls2088a-rdb \ + fsl_lx2160a-rdb \ + fsl_lx2160a-rdb-sdboot \ fsl_ls1021a-twr \ fsl_ls1021a-twr-sdboot \ fsl_ls1021a-iot-sdboot diff --git a/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt new file mode 100644 index 0000000000..6b4e920c9e --- /dev/null +++ b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt @@ -0,0 +1,9 @@ +fdtaddr=0x8f000000 +loadaddr=0x81000000 +bootm_size=0x10000000 +hwconfig=fsl_ddr:bank_intlv=auto +mc_init=mmc read 80000000 5000 1800;mmc read 80300000 7000 800;fsl_mc start mc 80000000 80300000;mmc read 80400000 6800 800;fsl_mc apply dpl 80400000 +sd_boot=ext4load mmc 0:1 ${loadaddr} fitImage;bootm ${loadaddr} +bootargs=root=/dev/mmcblk0p2 rw rootwait rootfstype=squashfs,f2fs noinitrd earlycon=pl011,mmio32,0x21c0000 console=ttyAMA0,115200 +bootcmd=echo starting openwrt ...;run mc_init;run sd_boot +bootdelay=3 diff --git a/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt new file mode 100644 index 0000000000..08757b4460 --- /dev/null +++ b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-uEnv.txt @@ -0,0 +1,9 @@ +fdtaddr=0x8f000000 +loadaddr=0x81000000 +bootm_size=0x10000000 +hwconfig=fsl_ddr:bank_intlv=auto +mc_init=sf probe 0:0;sf read 80000000 a00000 300000;sf read 80300000 e00000 100000;fsl_mc start mc 80000000 80300000;sf read 80400000 d00000 100000;fsl_mc apply dpl 80400000 +xspi_boot=sf probe 0:0;sf read $fdtaddr f00000 100000;sf read $loadaddr 1000000 1000000;bootm $loadaddr - $fdtaddr +bootargs=root=/dev/mtdblock9 rootfstype=squashfs,jffs2 noinitrd earlycon=pl011,mmio32,0x21c0000 console=ttyAMA0,115200 mtdparts=20c0000.spi-0:1m(bl2),4m(fip),1m(u-boot-env),4m(reserved-1),3m(mc),1m(dpl),1m(dpc),1m(dtb),16m(kernel),32m(rootfs),49m@0xf00000(firmware) +bootcmd=echo starting openwrt ...;run mc_init;run xspi_boot +bootdelay=3 diff --git a/package/firmware/layerscape/ls-dpl/Makefile b/package/firmware/layerscape/ls-dpl/Makefile index d056825ac5..f577c5b7e3 100644 --- a/package/firmware/layerscape/ls-dpl/Makefile +++ b/package/firmware/layerscape/ls-dpl/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-dpl PKG_VERSION:=LSDK-20.04 -PKG_RELEASE:=2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/mc-utils @@ -40,6 +40,10 @@ define Build/InstallDev $(STAGING_DIR_IMAGE)/fsl_ls2088a-rdb-dpl.dtb $(CP) $(PKG_BUILD_DIR)/config/ls2088a/RDB/dpc.0x2A_0x41.dtb \ $(STAGING_DIR_IMAGE)/fsl_ls2088a-rdb-dpc.dtb + $(CP) $(PKG_BUILD_DIR)/config/lx2160a/RDB/dpl-eth.19.dtb \ + $(STAGING_DIR_IMAGE)/fsl_lx2160a-rdb-dpl.dtb + $(CP) $(PKG_BUILD_DIR)/config/lx2160a/RDB/dpc-usxgmii.dtb \ + $(STAGING_DIR_IMAGE)/fsl_lx2160a-rdb-dpc.dtb endef $(eval $(call BuildPackage,layerscape-dpl)) diff --git a/package/firmware/layerscape/ls-mc/Makefile b/package/firmware/layerscape/ls-mc/Makefile index 0da0b91533..daba35a3b9 100644 --- a/package/firmware/layerscape/ls-mc/Makefile +++ b/package/firmware/layerscape/ls-mc/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-mc PKG_VERSION:=LSDK-20.04 -PKG_RELEASE:=2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/NXP/qoriq-mc-binary.git @@ -34,6 +34,8 @@ define Build/InstallDev $(STAGING_DIR_IMAGE)/fsl_ls1088a-rdb-mc.itb $(CP) $(PKG_BUILD_DIR)/ls2088a/mc_10.20.4_ls2088a.itb \ $(STAGING_DIR_IMAGE)/fsl_ls2088a-rdb-mc.itb + $(CP) $(PKG_BUILD_DIR)/lx2160a/mc_10.20.4_lx2160a.itb \ + $(STAGING_DIR_IMAGE)/fsl_lx2160a-rdb-mc.itb endef $(eval $(call BuildPackage,layerscape-mc)) diff --git a/package/firmware/layerscape/ls-rcw/Makefile b/package/firmware/layerscape/ls-rcw/Makefile index 421ef19e7b..f7f99a0c30 100644 --- a/package/firmware/layerscape/ls-rcw/Makefile +++ b/package/firmware/layerscape/ls-rcw/Makefile @@ -38,6 +38,8 @@ BOARDS := \ ls1088a-rdb \ ls1088a-rdb-sdboot \ ls2088a-rdb \ + lx2160a-rdb \ + lx2160a-rdb-sdboot \ ls1021a-twr RCW_ls1012a-rdb :=ls1012ardb/R_SPNH_3508/rcw_1000_default.bin @@ -52,6 +54,8 @@ RCW_ls1046a-rdb-sdboot :=ls1046ardb/RR_FFSSPPPH_1133_5559/rcw_1800_sdboot.bin RCW_ls1088a-rdb :=ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_qspi.bin RCW_ls1088a-rdb-sdboot :=ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_sd.bin RCW_ls2088a-rdb :=ls2088ardb/FFFFFFFF_PP_HH_0x2a_0x41/rcw_1800.bin +RCW_lx2160a-rdb :=lx2160ardb_rev2/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_19_5_2.bin +RCW_lx2160a-rdb-sdboot :=lx2160ardb_rev2/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_19_5_2.bin RCW_ls1021a-twr :=ls1021atwr/SSR_PNS_30/rcw_1200.bin define Build/InstallDev diff --git a/target/linux/layerscape/base-files/lib/upgrade/platform.sh b/target/linux/layerscape/base-files/lib/upgrade/platform.sh index f9b1e57a43..857be5a744 100644 --- a/target/linux/layerscape/base-files/lib/upgrade/platform.sh +++ b/target/linux/layerscape/base-files/lib/upgrade/platform.sh @@ -74,7 +74,8 @@ platform_copy_config() { fsl,ls1043a-rdb-sdboot | \ fsl,ls1046a-frwy-sdboot | \ fsl,ls1046a-rdb-sdboot | \ - fsl,ls1088a-rdb-sdboot) + fsl,ls1088a-rdb-sdboot | \ + fsl,lx2160a-rdb-sdboot) platform_copy_config_sdboot ;; esac @@ -102,7 +103,9 @@ platform_check_image() { fsl,ls1046a-rdb-sdboot | \ fsl,ls1088a-rdb | \ fsl,ls1088a-rdb-sdboot | \ - fsl,ls2088a-rdb) + fsl,ls2088a-rdb | \ + fsl,lx2160a-rdb | \ + fsl,lx2160a-rdb-sdboot) return 0 ;; *) @@ -131,7 +134,8 @@ platform_do_upgrade() { fsl,ls1046a-frwy | \ fsl,ls1046a-rdb | \ fsl,ls1088a-rdb | \ - fsl,ls2088a-rdb) + fsl,ls2088a-rdb | \ + fsl,lx2160a-rdb) PART_NAME=firmware default_do_upgrade "$1" ;; @@ -141,7 +145,8 @@ platform_do_upgrade() { fsl,ls1043a-rdb-sdboot | \ fsl,ls1046a-frwy-sdboot | \ fsl,ls1046a-rdb-sdboot | \ - fsl,ls1088a-rdb-sdboot) + fsl,ls1088a-rdb-sdboot | \ + fsl,lx2160a-rdb-sdboot) platform_do_upgrade_sdboot "$1" return 0 ;; diff --git a/target/linux/layerscape/image/armv8_64b.mk b/target/linux/layerscape/image/armv8_64b.mk index c037061aa2..89c81e5cb4 100644 --- a/target/linux/layerscape/image/armv8_64b.mk +++ b/target/linux/layerscape/image/armv8_64b.mk @@ -323,6 +323,58 @@ define Device/fsl_ls2088a-rdb endef TARGET_DEVICES += fsl_ls2088a-rdb +define Device/fsl_lx2160a-rdb + DEVICE_VENDOR := NXP + DEVICE_MODEL := LX2160A-RDB + DEVICE_VARIANT := Rev2.0 silicon + DEVICE_PACKAGES += \ + layerscape-mc \ + layerscape-dpl \ + layerscape-ddr-phy \ + tfa-lx2160a-rdb \ + restool + IMAGE/firmware.bin := \ + ls-clean | \ + ls-append $(1)-bl2.pbl | pad-to 1M | \ + ls-append $(1)-fip.bin | pad-to 5M | \ + ls-append $(1)-uboot-env.bin | pad-to 8M | \ + ls-append $(1)-fip_ddr_all.bin | pad-to 10M | \ + ls-append $(1)-mc.itb | pad-to 13M | \ + ls-append $(1)-dpl.dtb | pad-to 14M | \ + ls-append $(1)-dpc.dtb | pad-to 15M | \ + ls-append-dtb $$(DEVICE_DTS) | pad-to 16M | \ + append-kernel | pad-to 32M | \ + append-rootfs | pad-rootfs | check-size +endef +TARGET_DEVICES += fsl_lx2160a-rdb + +define Device/fsl_lx2160a-rdb-sdboot + $(Device/fsl-sdboot) + DEVICE_VENDOR := NXP + DEVICE_MODEL := LX2160A-RDB + DEVICE_VARIANT := Rev2.0 silicon SD Card Boot + DEVICE_PACKAGES += \ + layerscape-mc \ + layerscape-dpl \ + layerscape-ddr-phy \ + tfa-lx2160a-rdb-sdboot \ + restool + DEVICE_DTS := freescale/fsl-lx2160a-rdb + IMAGE/sdcard.img.gz := \ + ls-clean | \ + ls-append-sdhead $(1) | pad-to 4K | \ + ls-append $(1)-bl2.pbl | pad-to 1M | \ + ls-append $(1)-fip.bin | pad-to 5M | \ + ls-append $(1)-uboot-env.bin | pad-to 8M | \ + ls-append fsl_lx2160a-rdb-fip_ddr_all.bin | pad-to 10M | \ + ls-append fsl_lx2160a-rdb-mc.itb | pad-to 13M | \ + ls-append fsl_lx2160a-rdb-dpl.dtb | pad-to 14M | \ + ls-append fsl_lx2160a-rdb-dpc.dtb | pad-to 16M | \ + ls-append-kernel | pad-to $(LS_SD_ROOTFSPART_OFFSET)M | \ + append-rootfs | pad-to $(LS_SD_IMAGE_SIZE)M | gzip +endef +TARGET_DEVICES += fsl_lx2160a-rdb-sdboot + define Device/traverse_ls1043 DEVICE_VENDOR := Traverse DEVICE_MODEL := LS1043 Boards From a31842e7fd15c14796a9f764defda395b3c854df Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Tue, 27 Oct 2020 16:26:11 +0800 Subject: [PATCH 13/23] layerscape: add new devices in README and clean up Support new devices LS1046AFRWY and LX2160ARDB in README. Clean up README, and add missing LS1021ATWR deploy guide. Signed-off-by: Yangbo Lu [adjust set of devices added, update commit message/title] Signed-off-by: Adrian Schmutzler --- target/linux/layerscape/README | 103 ++++++++++++++++++++++----------- 1 file changed, 70 insertions(+), 33 deletions(-) diff --git a/target/linux/layerscape/README b/target/linux/layerscape/README index 4bade4a9c0..a8d1846468 100644 --- a/target/linux/layerscape/README +++ b/target/linux/layerscape/README @@ -1,15 +1,27 @@ Layerscape Quick Start -1. Layerscape target support +This is a quick start guide for Layerscape specific usage, like introducing +how to configure, build, and deploy OpenWrt to Layerscape boards, so that +users can bring up the board without difficulty. + + +1. Target support ---------------------------- * ARMv8 64-bit - LS1012ARDB LS1012AFRWY LS1043ARDB LS1046ARDB LS1088ARDB LS2088ARDB - (SD card boot support on LS1043ARDB/LS1046ARDB/LS1088ARDB) + LS1012ARDB (QSPI NOR boot) + LS1012AFRDM (QSPI NOR boot) + LS1012AFRWY (QSPI NOR boot) + LS1043ARDB (NOR boot | SD card boot) + LS1046ARDB (QSPI NOR boot | SD card boot) + LS1046AFRWY (QSPI NOR boot | SD card boot) + LS1088ARDB (QSPI NOR boot | SD card boot) + LS2088ARDB (NOR boot) + LX2160ARDB Rev2.0 (FlexSPI NOR boot | SD card boot) * ARMv7 - LS1021ATWR LS1021AIOT - (SD card boot support on LS1021ATWR/LS1021AIOT) + LS1021ATWR (NOR boot | SD card boot) + LS1021AIOT (SD card boot) 2. Build @@ -24,7 +36,7 @@ $ ./scripts/feeds install -a Subtarget: (Select subtarget) Target Profile: (Select device, or "Multiple devices") Target Devices: (Select devices. Available when Target Profile is "Multiple devices") - Target Images: (Disable "GZip images" if don't want to unzip manually to use the images.) + Target Images: (Disable "GZip images" if you don't want to unzip manually to use the images.) Note: The first time make menuconfig would create a .config file which would include all dependencies for selected target. After that, make @@ -37,16 +49,16 @@ $ ./scripts/feeds install -a * make (or make -j) * Final firmware/image - Path: bin/targets/layerscape// + Path: bin/targets/layerscape// Firmware for flash: openwrt-layerscape----firmware.bin - Image for SD card: openwrt-layerscape----sdcard.img.gz - Sysupgrade images: openwrt-layerscape----sysupgrade.bin + Image for SD card: openwrt-layerscape----sdcard.img.gz + Sysupgrade images: openwrt-layerscape----sysupgrade.bin -3. Program NOR/QSPI flash or SD card ------------------------------------- -The firmware.bin or sdcard.img (after extract from gz) is an all-in-one image including all -things for OpenWrt staring up. (except LS1012AFRWY. Refer to 3.3.) +3. Deploy +--------- +The firmware.bin or sdcard.img is an all-in-one image including all things +for OpenWrt staring up except LS1012AFRWY (Refer to 3.3). If you want to install all things into flash, please use firmware.bin. If you want to install all things into SD card, please use sdcard.img. @@ -72,17 +84,7 @@ from SD card. (sdcard.img images are gz-iped to save space. Please extract them 3.2 Program firmware.bin to flash --------------------------------- -* LS1012FRDM (QSPI flash) - Board have only one nor flash bank. Those commands will replace stock - bootloader and firmware. Please refer point 4 for MAC recovery. - - => tftp a0000000 -firmware.bin - => sf probe 0:0 - => sf erase 0 +$filesize - => sf write a0000000 0 $filesize - => reset - -* LS1012ARDB (QSPI flash) +* LS1012ARDB Start up from bank1, and program firmware to bank2 with below commands. Switch to bank2 to start up OpenWrt. @@ -93,7 +95,7 @@ from SD card. (sdcard.img images are gz-iped to save space. Please extract them => sf write a0000000 0 $filesize => reset -* LS1043ARDB (NOR flash) +* LS1043ARDB Start up from bank0, and program firmware to bank4 with below commands. Switch to bank4 to start up OpenWrt. @@ -103,7 +105,7 @@ from SD card. (sdcard.img images are gz-iped to save space. Please extract them => cp.b a0000000 64000000 $filesize => cpld reset altbank -* LS1046ARDB (QSPI flash) +* LS1046ARDB Start up from bank1, and program firmware to bank2 with below commands. Switch to bank2 to start up OpenWrt. @@ -113,7 +115,27 @@ from SD card. (sdcard.img images are gz-iped to save space. Please extract them => sf write a0000000 0 $filesize => cpld reset altbank -* LS1088ARDB (QSPI flash) +* LS2088ARDB + Start up from bank0, and program firmware to bank4 with below commands. + Switch to bank4 to start up OpenWrt. + + => tftp a0000000 -firmware.bin + => protect off all + => erase 584000000 +$filesize + => cp.b a0000000 584000000 $filesize + => qix altbank + +* LS1012FRDM/LS1046AFRWY + Board has only one bank. Those commands will replace stock bootloader + and firmware. + + => tftp a0000000 -firmware.bin + => sf probe 0:0 + => sf erase 0 +$filesize + => sf write a0000000 0 $filesize + => reset + +* LS1088ARDB/LX2160ARDB Rev2.0 Start up from bank0, and program firmware to bank1 with below commands. Switch to bank1 to start up OpenWrt. @@ -127,15 +149,15 @@ from SD card. (sdcard.img images are gz-iped to save space. Please extract them bank1 instead of 'qix altbank'. => i2c mw 66 50 20;i2c mw 66 10 20;i2c mw 66 10 21 -* LS2088ARDB (NOR flash) +* LS1021ATWR Start up from bank0, and program firmware to bank4 with below commands. Switch to bank4 to start up OpenWrt. => tftp a0000000 -firmware.bin => protect off all - => erase 584000000 +$filesize - => cp.b a0000000 584000000 $filesize - => qix altbank + => erase 64000000 +$filesize + => cp.b a0000000 64000000 $filesize + => boot_bank 1 3.3 Program LS1012AFRWY ----------------------- @@ -159,7 +181,7 @@ from SD card. (sdcard.img images are gz-iped to save space. Please extract them 4. Known issues and limitation ------------------------------ -* u-boot may fail to read MAC addresses from EEPROM on some boards and there +* U-boot may fail to read MAC addresses from EEPROM on some boards and there won't be MAC addresses set in environment. This may cause kernel fails to probe these network interfaces. The workaround is to set MAC addresses manually, for example, @@ -168,8 +190,23 @@ from SD card. (sdcard.img images are gz-iped to save space. Please extract them => setenv eth1addr 00:04:9F:04:65:4c => saveenv +* In case users want to refer Layerscape SDK doc for network configuration, + like TSN (Time-Sensitive Networking) on LS1028A, the OpenWrt LAN/WAN router + setting should be removed before that. + + # ubus call network.interface.lan remove + # ubus call network.interface.wan remove + # ubus call network.interface.wan6 remove + + And firewall may be needed to stop. + + # /etc/init.d/firewall stop + 5. Other references ------------------- -- NXP LSDK site: https://lsdk.github.io/ +- NXP LSDK source: https://lsdk.github.io/ + +- NXP LSDK site: https://www.nxp.com/design/software/embedded-software/linux-software-and-development-tools/layerscape-software-development-kit:LAYERSCAPE-SDK + - OpenWrt documentation: https://openwrt.org/docs/start From 2ff96860408a92e074747e14e7f737d3fdb14573 Mon Sep 17 00:00:00 2001 From: Sungbo Eo Date: Wed, 17 Feb 2021 21:09:26 +0900 Subject: [PATCH 14/23] kirkwood: rename files-5.4 to files Move local DTS files from "files-5.4" to "files" directory so kernel 5.10 can use it. Signed-off-by: Sungbo Eo --- .../{files-5.4 => files}/arch/arm/boot/dts/kirkwood-e4200-v2.dts | 0 .../{files-5.4 => files}/arch/arm/boot/dts/kirkwood-ea3500.dts | 0 .../{files-5.4 => files}/arch/arm/boot/dts/kirkwood-ea4500.dts | 0 .../arch/arm/boot/dts/kirkwood-goflexhome.dts | 0 .../{files-5.4 => files}/arch/arm/boot/dts/kirkwood-nsa310b.dts | 0 .../{files-5.4 => files}/arch/arm/boot/dts/kirkwood-nsa310s.dts | 0 .../{files-5.4 => files}/arch/arm/boot/dts/kirkwood-on100.dts | 0 7 files changed, 0 insertions(+), 0 deletions(-) rename target/linux/kirkwood/{files-5.4 => files}/arch/arm/boot/dts/kirkwood-e4200-v2.dts (100%) rename target/linux/kirkwood/{files-5.4 => files}/arch/arm/boot/dts/kirkwood-ea3500.dts (100%) rename target/linux/kirkwood/{files-5.4 => files}/arch/arm/boot/dts/kirkwood-ea4500.dts (100%) rename target/linux/kirkwood/{files-5.4 => files}/arch/arm/boot/dts/kirkwood-goflexhome.dts (100%) rename target/linux/kirkwood/{files-5.4 => files}/arch/arm/boot/dts/kirkwood-nsa310b.dts (100%) rename target/linux/kirkwood/{files-5.4 => files}/arch/arm/boot/dts/kirkwood-nsa310s.dts (100%) rename target/linux/kirkwood/{files-5.4 => files}/arch/arm/boot/dts/kirkwood-on100.dts (100%) diff --git a/target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-e4200-v2.dts b/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-e4200-v2.dts similarity index 100% rename from target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-e4200-v2.dts rename to target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-e4200-v2.dts diff --git a/target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-ea3500.dts b/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea3500.dts similarity index 100% rename from target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-ea3500.dts rename to target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea3500.dts diff --git a/target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-ea4500.dts b/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea4500.dts similarity index 100% rename from target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-ea4500.dts rename to target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-ea4500.dts diff --git a/target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-goflexhome.dts b/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-goflexhome.dts similarity index 100% rename from target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-goflexhome.dts rename to target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-goflexhome.dts diff --git a/target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-nsa310b.dts b/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nsa310b.dts similarity index 100% rename from target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-nsa310b.dts rename to target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nsa310b.dts diff --git a/target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-nsa310s.dts b/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nsa310s.dts similarity index 100% rename from target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-nsa310s.dts rename to target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-nsa310s.dts diff --git a/target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-on100.dts b/target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-on100.dts similarity index 100% rename from target/linux/kirkwood/files-5.4/arch/arm/boot/dts/kirkwood-on100.dts rename to target/linux/kirkwood/files/arch/arm/boot/dts/kirkwood-on100.dts From 422b3e199316b9794e400ea1519505cb0609dfc3 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Tue, 16 Feb 2021 22:06:12 +0100 Subject: [PATCH 15/23] rockchip: add Kernel 5.10 support Remove all upstreamed patches and add the kernel configuration for version 5.10. The Rock Pi 4 was split in multiple versions. Add a DTS with the old name in order to keep compatibility while having kernel 5.4 and 5.10 in parallel. Switch to the Rock Pi 4A DTS once Kernel 5.4 support is removed. Tested-on: Nanoi R2S Signed-off-by: David Bauer --- target/linux/rockchip/Makefile | 1 + target/linux/rockchip/armv8/config-5.10 | 673 ++++++++++++++++++ target/linux/rockchip/armv8/config-5.4 | 165 ++++- target/linux/rockchip/config-default | 297 -------- .../boot/dts/rockchip/rk3399-rock-pi-4.dts | 19 + ...-r8152-add-LED-configuration-from-OF.patch | 74 ++ ...et-add-RTL8152-binding-documentation.patch | 54 ++ ...-rockchip-use-system-LED-for-OpenWrt.patch | 31 + ...usb3-controller-node-for-RK3328-SoCs.patch | 62 ++ ...ckchip-enable-LAN-port-on-NanoPi-R2S.patch | 60 ++ ...dd-OF-node-for-USB-eth-on-NanoPi-R2S.patch | 28 + ...-host-by-default-on-rk3399-rock-pi-4.patch | 32 + 12 files changed, 1178 insertions(+), 318 deletions(-) create mode 100644 target/linux/rockchip/armv8/config-5.10 delete mode 100644 target/linux/rockchip/config-default create mode 100644 target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts create mode 100644 target/linux/rockchip/patches-5.10/002-net-usb-r8152-add-LED-configuration-from-OF.patch create mode 100644 target/linux/rockchip/patches-5.10/003-dt-bindings-net-add-RTL8152-binding-documentation.patch create mode 100644 target/linux/rockchip/patches-5.10/100-rockchip-use-system-LED-for-OpenWrt.patch create mode 100644 target/linux/rockchip/patches-5.10/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch create mode 100644 target/linux/rockchip/patches-5.10/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch create mode 100644 target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch create mode 100644 target/linux/rockchip/patches-5.10/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch diff --git a/target/linux/rockchip/Makefile b/target/linux/rockchip/Makefile index bcc0cc3f8f..7aeb0a3d55 100644 --- a/target/linux/rockchip/Makefile +++ b/target/linux/rockchip/Makefile @@ -8,6 +8,7 @@ FEATURES:=ext4 audio usb usbgadget display gpio fpu rootfs-part boot-part squash SUBTARGETS:=armv8 KERNEL_PATCHVER=5.4 +KERNEL_TESTING_PATCHVER=5.10 define Target/Description Build firmware image for Rockchip SoC devices. diff --git a/target/linux/rockchip/armv8/config-5.10 b/target/linux/rockchip/armv8/config-5.10 new file mode 100644 index 0000000000..80230a722b --- /dev/null +++ b/target/linux/rockchip/armv8/config-5.10 @@ -0,0 +1,673 @@ +CONFIG_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARC_EMAC_CORE=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CNP=y +# CONFIG_ARM64_ERRATUM_1165522 is not set +# CONFIG_ARM64_ERRATUM_1286807 is not set +# CONFIG_ARM64_ERRATUM_1418040 is not set +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_MODULE_PLTS=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PAN=y +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PTR_AUTH=y +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_SVE=y +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_UAO=y +CONFIG_ARM64_VA_BITS=48 +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VHE=y +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +# CONFIG_ARMV8_DEPRECATED is not set +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_ARM_MHU=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set +# CONFIG_ARM_SCMI_PROTOCOL is not set +CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set +CONFIG_ARM_SMMU_V3=y +# CONFIG_ARM_SMMU_V3_SVA is not set +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GPIO=y +# CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_LED is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_QCOM_WLED is not set +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NVME=y +CONFIG_BLK_DEV_PCIESSD_MTIP32XX=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BRCMSTB_GISB_ARB=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set +# CONFIG_CHARGER_BQ25980 is not set +CONFIG_CHARGER_GPIO=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_PX30=y +CONFIG_CLK_RK3036=y +CONFIG_CLK_RK312X=y +CONFIG_CLK_RK3188=y +CONFIG_CLK_RK322X=y +CONFIG_CLK_RK3308=y +CONFIG_CLK_RK3328=y +CONFIG_CLK_RK3368=y +CONFIG_CLK_RK3399=y +CONFIG_CLK_RV110X=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMA=y +CONFIG_CMA_ALIGNMENT=8 +CONFIG_CMA_AREAS=7 +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SIZE_MBYTES=5 +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_RK808=y +CONFIG_COMMON_CLK_ROCKCHIP=y +CONFIG_COMMON_CLK_SCPI=y +CONFIG_COMPAT=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_CONFIGFS_FS=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CONTIG_ALLOC=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_ISOLATION=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_THERMAL=y +CONFIG_CRASH_CORE=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_SLICEBY8=y +CONFIG_CRC_T10DIF=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_DEVMEM=y +# CONFIG_DEVPORT is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMADEVICES=y +CONFIG_DMA_CMA=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +# CONFIG_DMA_PERNUMA_CMA is not set +CONFIG_DMA_REMAP=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DNOTIFY=y +CONFIG_DTC=y +CONFIG_DT_IDLE_STATES=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DWMAC_DWC_QOS_ETH=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_INTEL_PLAT is not set +CONFIG_DWMAC_ROCKCHIP=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EMAC_ROCKCHIP=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_ENERGY_MODEL=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXTCON=y +CONFIG_F2FS_FS=y +CONFIG_FANOTIFY=y +CONFIG_FHANDLE=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_FORTIFY_SOURCE is not set +CONFIG_FRAME_POINTER=y +CONFIG_FRAME_WARN=2048 +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +# CONFIG_FUJITSU_ERRATUM_010001 is not set +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_DWAPB=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_HARDENED_USERCOPY is not set +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HID=y +CONFIG_HID_GENERIC=y +# CONFIG_HISI_HIKEY_USB is not set +CONFIG_HOLES_IN_ZONE=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HWMON=y +CONFIG_HWSPINLOCK=y +CONFIG_HW_CONSOLE=y +CONFIG_HZ=250 +CONFIG_HZ_250=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_RK3X=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_INDIRECT_PIO=y +CONFIG_INPUT=y +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_MATRIXKMAP=y +# CONFIG_INPUT_MISC is not set +CONFIG_IOMMU_API=y +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_IO_PGTABLE=y +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +CONFIG_IOMMU_SUPPORT=y +# CONFIG_IO_STRICT_DEVMEM is not set +CONFIG_IO_URING=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JUMP_LABEL=y +CONFIG_KALLSYMS=y +CONFIG_KEXEC_CORE=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_KSM=y +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP50XX is not set +CONFIG_LEDS_PWM=y +CONFIG_LEDS_SYSCON=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_LIBCRC32C=y +CONFIG_LIBFDT=y +CONFIG_LLD_VERSION=0 +CONFIG_LOCALVERSION_AUTO=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LOG_BUF_SHIFT=19 +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MANDATORY_FILE_LOCKING=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_GPIO=y +CONFIG_MDIO_BUS_MUX_MMIOREG=y +CONFIG_MDIO_DEVICE=y +CONFIG_MEMFD_CREATE=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_KHADAS_MCU is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_ROHM_BD71828 is not set +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_CQHCI=y +CONFIG_MMC_DW=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MQ_IOSCHED_DEADLINE=y +# CONFIG_MTD_CFI is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NLS=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=256 +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_NVME_CORE=y +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_TCP is not set +# CONFIG_OCTEONTX2_AF is not set +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IOMMU=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_RESOLVE=y +CONFIG_OLD_SIGSUSPEND3=y +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_PARTITION_PERCPU=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_AL is not set +CONFIG_PCIE_PME=y +CONFIG_PCIE_ROCKCHIP=y +CONFIG_PCIE_ROCKCHIP_HOST=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_STUB=y +CONFIG_PCS_XPCS=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_ROCKCHIP_DP=y +# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set +CONFIG_PHY_ROCKCHIP_EMMC=y +# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set +# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_PCIE=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PHY_ROCKCHIP_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_RK805 is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PL330_DMA=y +CONFIG_PLATFORM_MHU=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_DEVFREQ=y +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_PM_OPP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_SUPPLY_HWMON=y +CONFIG_PREEMPT=y +CONFIG_PREEMPTION=y +CONFIG_PREEMPT_COUNT=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_RCU=y +CONFIG_PRINTK_TIME=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_VMCORE=y +CONFIG_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_PWM_SYSFS=y +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_QUOTA=y +CONFIG_QUOTACTL=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_RAID_ATTRS=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +# CONFIG_RAVE_SP_CORE is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_EXPERT is not set +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_TRACE=y +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_PWM=y +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +CONFIG_RELOCATABLE=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_ROCKCHIP_IOMMU=y +CONFIG_ROCKCHIP_MBOX=y +# CONFIG_ROCKCHIP_OTP is not set +CONFIG_ROCKCHIP_PHY=y +CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_ROCKCHIP_THERMAL=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_RPS=y +CONFIG_RSEQ=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_RK808=y +# CONFIG_RTC_DRV_RV3032 is not set +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_NVMEM=y +# CONFIG_RUNTIME_TESTING_MENU is not set +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SCHED_MC=y +CONFIG_SCSI=y +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_PROC_FS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SAS_LIBSAS=y +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_MR75203 is not set +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIO=y +CONFIG_SERIO_AMBAKMI=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SG_POOL=y +CONFIG_SIMPLE_PM_BUS=y +CONFIG_SLUB_DEBUG=y +CONFIG_SMP=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_DYNAMIC=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_ROCKCHIP=y +CONFIG_SPI_SPIDEV=y +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SRAM=y +CONFIG_SRCU=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +# CONFIG_STAGING is not set +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STRICT_DEVMEM=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_SWAP is not set +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SYNC_FILE=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +# CONFIG_TEXTSEARCH is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_EMULATION=y +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TRACE_CLOCK=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_TYPEC=y +# CONFIG_TYPEC_DP_ALTMODE is not set +CONFIG_TYPEC_FUSB302=y +# CONFIG_TYPEC_HD3SS3220 is not set +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# CONFIG_TYPEC_STUSB160X is not set +# CONFIG_TYPEC_TCPCI is not set +CONFIG_TYPEC_TCPM=y +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_UACCE is not set +# CONFIG_UCLAMP_TASK is not set +# CONFIG_UEVENT_HELPER is not set +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_HOST=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_HID=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_PHY=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +# CONFIG_USERIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRTIO_MENU is not set +CONFIG_VMAP_STACK=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_WATCHDOG is not set +CONFIG_XARRAY_MULTI=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/rockchip/armv8/config-5.4 b/target/linux/rockchip/armv8/config-5.4 index bea1dbc741..8f9b3354d9 100644 --- a/target/linux/rockchip/armv8/config-5.4 +++ b/target/linux/rockchip/armv8/config-5.4 @@ -1,14 +1,24 @@ -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y -CONFIG_ARCH_HAS_RELR=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_64BIT=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ARCH_ROCKCHIP=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARC_EMAC_CORE=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y CONFIG_ARM64_CNP=y +CONFIG_ARM64_CONT_SHIFT=4 # CONFIG_ARM64_ERRATUM_1165522 is not set # CONFIG_ARM64_ERRATUM_1286807 is not set # CONFIG_ARM64_ERRATUM_1418040 is not set @@ -23,9 +33,16 @@ CONFIG_ARM64_ERRATUM_858921=y CONFIG_ARM64_HW_AFDBM=y CONFIG_ARM64_LSE_ATOMICS=y CONFIG_ARM64_MODULE_PLTS=y +CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_PAN=y +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PTR_AUTH=y CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_SSBD=y +CONFIG_ARM64_SVE=y # CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y CONFIG_ARM64_UAO=y CONFIG_ARM64_VA_BITS=48 # CONFIG_ARM64_VA_BITS_39 is not set @@ -33,12 +50,19 @@ CONFIG_ARM64_VA_BITS_48=y CONFIG_ARM64_VHE=y CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y # CONFIG_ARMV8_DEPRECATED is not set +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_GIC=y CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y CONFIG_ARM_GIC_V3_ITS_PCI=y CONFIG_ARM_MHU=y CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_RK3399_DMC_DEVFREQ is not set # CONFIG_ARM_SCMI_PROTOCOL is not set CONFIG_ARM_SCPI_CPUFREQ=y @@ -47,6 +71,7 @@ CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_ARM_SMMU=y CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y CONFIG_ARM_SMMU_V3=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_GPIO=y CONFIG_BACKLIGHT_PWM=y @@ -67,7 +92,9 @@ CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set CONFIG_CHARGER_GPIO=y +CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y CONFIG_CMA=y CONFIG_CMA_ALIGNMENT=8 CONFIG_CMA_AREAS=7 @@ -78,6 +105,7 @@ CONFIG_CMA_SIZE_MBYTES=5 CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_MIN is not set # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_RK808=y CONFIG_COMMON_CLK_SCPI=y CONFIG_COMPAT=y @@ -107,6 +135,7 @@ CONFIG_CPU_IDLE_GOV_MENU=y CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y CONFIG_CPU_ISOLATION=y CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y CONFIG_CPU_THERMAL=y CONFIG_CRASH_CORE=y CONFIG_CRASH_DUMP=y @@ -115,9 +144,18 @@ CONFIG_CRC16=y CONFIG_CRC32_SLICEBY8=y CONFIG_CRC_T10DIF=y CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRCT10DIF=y -# CONFIG_CRYPTO_DEV_ROCKCHIP is not set +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEVFREQ_GOV_PASSIVE is not set CONFIG_DEVFREQ_GOV_PERFORMANCE=y @@ -131,49 +169,82 @@ CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_DMADEVICES=y CONFIG_DMA_CMA=y +CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y +CONFIG_DMA_REMAP=y CONFIG_DMA_SHARED_BUFFER=y CONFIG_DNOTIFY=y -# CONFIG_DRM_ROCKCHIP is not set +CONFIG_DRM_RCAR_WRITEBACK=y +CONFIG_DTC=y CONFIG_DT_IDLE_STATES=y CONFIG_DUMMY_CONSOLE=y CONFIG_DWMAC_DWC_QOS_ETH=y CONFIG_DWMAC_GENERIC=y CONFIG_DWMAC_ROCKCHIP=y +CONFIG_EDAC_SUPPORT=y CONFIG_EMAC_ROCKCHIP=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_ENERGY_MODEL=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXTCON=y +CONFIG_F2FS_FS=y CONFIG_FANOTIFY=y CONFIG_FHANDLE=y CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y # CONFIG_FLATMEM_MANUAL is not set # CONFIG_FORTIFY_SOURCE is not set +CONFIG_FRAME_POINTER=y CONFIG_FRAME_WARN=2048 CONFIG_FS_IOMAP=y CONFIG_FS_MBCACHE=y CONFIG_FS_POSIX_ACL=y # CONFIG_FUJITSU_ERRATUM_010001 is not set +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GPIOLIB=y CONFIG_GPIO_DWAPB=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_HANDLE_DOMAIN_IRQ=y # CONFIG_HARDENED_USERCOPY is not set +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_HAVE_UID16=y CONFIG_HID=y CONFIG_HID_GENERIC=y +CONFIG_HOLES_IN_ZONE=y CONFIG_HOTPLUG_CPU=y CONFIG_HOTPLUG_PCI=y # CONFIG_HOTPLUG_PCI_CPCI is not set @@ -184,14 +255,15 @@ CONFIG_HUGETLB_PAGE=y CONFIG_HWMON=y CONFIG_HWSPINLOCK=y CONFIG_HW_CONSOLE=y -# CONFIG_HZ_PERIODIC is not set +CONFIG_HZ=250 +CONFIG_HZ_250=y CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_COMPAT=y CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_RK3X=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_INDIRECT_PIO=y CONFIG_INPUT=y CONFIG_INPUT_EVDEV=y @@ -200,7 +272,6 @@ CONFIG_INPUT_KEYBOARD=y CONFIG_INPUT_LEDS=y CONFIG_INPUT_MATRIXKMAP=y # CONFIG_INPUT_MISC is not set -# CONFIG_INPUT_RK805_PWRKEY is not set CONFIG_IOMMU_API=y # CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set @@ -213,8 +284,13 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y CONFIG_IOMMU_SUPPORT=y # CONFIG_IO_STRICT_DEVMEM is not set CONFIG_IO_URING=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_IRQ_WORK=y CONFIG_JBD2=y CONFIG_JFFS2_ZLIB=y CONFIG_JUMP_LABEL=y @@ -232,7 +308,10 @@ CONFIG_LEDS_TRIGGER_PANIC=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 CONFIG_LIBCRC32C=y +CONFIG_LIBFDT=y CONFIG_LOCALVERSION_AUTO=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LOG_BUF_SHIFT=19 CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_SERIAL=y @@ -244,11 +323,12 @@ CONFIG_MDIO_BUS_MUX=y CONFIG_MDIO_BUS_MUX_GPIO=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_GPIO=y +CONFIG_MEMFD_CREATE=y CONFIG_MEMORY_ISOLATION=y CONFIG_MFD_CORE=y CONFIG_MFD_RK808=y CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y CONFIG_MMC=y CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=32 @@ -267,6 +347,7 @@ CONFIG_MMC_SDHCI_OF_DWCMSHC=y # CONFIG_MMC_SDHCI_PCI is not set CONFIG_MMC_SDHCI_PLTFM=y # CONFIG_MMC_TIFM_SD is not set +CONFIG_MODULES_USE_ELF_RELA=y CONFIG_MQ_IOSCHED_DEADLINE=y # CONFIG_MTD_CFI is not set CONFIG_MTD_CMDLINE_PARTS=y @@ -274,29 +355,44 @@ CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NLS=y CONFIG_NLS_ISO8859_1=y CONFIG_NOP_USB_XCEIV=y CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=256 CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y CONFIG_NVME_CORE=y # CONFIG_NVME_MULTIPATH is not set # CONFIG_NVME_TCP is not set # CONFIG_OCTEONTX2_AF is not set +CONFIG_OF=y +CONFIG_OF_ADDRESS=y CONFIG_OF_DYNAMIC=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y CONFIG_OF_IOMMU=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y +CONFIG_OF_NET=y CONFIG_OF_OVERLAY=y CONFIG_OF_RESOLVE=y CONFIG_OLD_SIGSUSPEND3=y # CONFIG_OVERLAY_FS_XINO_AUTO is not set +CONFIG_PADATA=y CONFIG_PAGE_POOL=y # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 # CONFIG_PARTITION_ADVANCED is not set +CONFIG_PARTITION_PERCPU=y CONFIG_PCI=y CONFIG_PCIEAER=y CONFIG_PCIEASPM=y @@ -318,6 +414,7 @@ CONFIG_PCI_STUB=y CONFIG_PGTABLE_LEVELS=4 CONFIG_PHYLIB=y CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PHY_ROCKCHIP_DP=y CONFIG_PHY_ROCKCHIP_EMMC=y # CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set @@ -331,6 +428,7 @@ CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set CONFIG_PL330_DMA=y CONFIG_PLATFORM_MHU=y +CONFIG_PLUGIN_HOSTCC="g++" CONFIG_PM=y CONFIG_PM_CLK=y CONFIG_PM_DEVFREQ=y @@ -339,6 +437,8 @@ CONFIG_PM_GENERIC_DOMAINS=y CONFIG_PM_GENERIC_DOMAINS_OF=y CONFIG_PM_OPP=y CONFIG_POWER_AVS=y +CONFIG_POWER_RESET=y +CONFIG_POWER_SUPPLY=y CONFIG_POWER_SUPPLY_HWMON=y CONFIG_PREEMPT=y CONFIG_PREEMPTION=y @@ -354,6 +454,8 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_PWM_SYSFS=y # CONFIG_QFMT_V1 is not set # CONFIG_QFMT_V2 is not set +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y CONFIG_QUOTA=y CONFIG_QUOTACTL=y # CONFIG_QUOTA_NETLINK_INTERFACE is not set @@ -361,12 +463,15 @@ CONFIG_RAID_ATTRS=y CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y CONFIG_RAS=y +CONFIG_RATIONAL=y # CONFIG_RAVE_SP_CORE is not set CONFIG_RCU_CPU_STALL_TIMEOUT=21 # CONFIG_RCU_EXPERT is not set +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_TRACE=y -# CONFIG_READ_ONLY_THP_FOR_FS is not set CONFIG_REALTEK_PHY=y +CONFIG_REFCOUNT_FULL=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_IRQ=y @@ -379,6 +484,7 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK808=y CONFIG_RELOCATABLE=y CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_IODOMAIN=y @@ -386,15 +492,17 @@ CONFIG_ROCKCHIP_IOMMU=y CONFIG_ROCKCHIP_MBOX=y CONFIG_ROCKCHIP_PHY=y CONFIG_ROCKCHIP_PM_DOMAINS=y -# CONFIG_ROCKCHIP_SARADC is not set CONFIG_ROCKCHIP_THERMAL=y CONFIG_ROCKCHIP_TIMER=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_RPS=y CONFIG_RSEQ=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_RK808=y CONFIG_RTC_I2C_AND_SPI=y CONFIG_RTC_NVMEM=y # CONFIG_RUNTIME_TESTING_MENU is not set +CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_SCHED_MC=y CONFIG_SCSI=y # CONFIG_SCSI_LOWLEVEL is not set @@ -409,6 +517,7 @@ CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_8250_DWLIB=y CONFIG_SERIAL_8250_EXAR=y CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_NR_UARTS=4 CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_RUNTIME_UARTS=4 @@ -425,13 +534,16 @@ CONFIG_SERIO_LIBPS2=y CONFIG_SG_POOL=y CONFIG_SIMPLE_PM_BUS=y CONFIG_SLUB_DEBUG=y -# CONFIG_SND_SOC_ROCKCHIP is not set +CONFIG_SMP=y CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y CONFIG_SPI=y CONFIG_SPI_BITBANG=y +CONFIG_SPI_DYNAMIC=y CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y CONFIG_SPI_ROCKCHIP=y @@ -442,6 +554,7 @@ CONFIG_SQUASHFS_DECOMP_SINGLE=y CONFIG_SQUASHFS_FILE_CACHE=y # CONFIG_SQUASHFS_FILE_DIRECT is not set CONFIG_SRAM=y +CONFIG_SRCU=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y # CONFIG_STAGING is not set @@ -451,11 +564,13 @@ CONFIG_STMMAC_PLATFORM=y CONFIG_STRICT_DEVMEM=y # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_SWAP is not set +CONFIG_SWIOTLB=y CONFIG_SWPHY=y CONFIG_SYNC_FILE=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_SYSFS_SYSCALL=y CONFIG_SYSVIPC_COMPAT=y -CONFIG_TASKS_RCU=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y # CONFIG_TEXTSEARCH is not set CONFIG_THERMAL=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y @@ -465,11 +580,16 @@ CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y CONFIG_TRACE_CLOCK=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +CONFIG_TREE_SRCU=y CONFIG_TYPEC=y # CONFIG_TYPEC_DP_ALTMODE is not set CONFIG_TYPEC_FUSB302=y @@ -480,10 +600,10 @@ CONFIG_TYPEC_TCPM=y # CONFIG_UCLAMP_TASK is not set # CONFIG_UEVENT_HELPER is not set CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_UNMAP_KERNEL_AT_EL0=y CONFIG_USB=y CONFIG_USB_COMMON=y CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_DUAL_ROLE=y CONFIG_USB_DWC3_HOST=y CONFIG_USB_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y @@ -504,15 +624,18 @@ CONFIG_USB_XHCI_PLATFORM=y # CONFIG_USERIO is not set # CONFIG_VFIO is not set # CONFIG_VIRTIO_MENU is not set +CONFIG_VMAP_STACK=y CONFIG_VM_EVENT_COUNTERS=y CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_WATCHDOG is not set CONFIG_XARRAY_MULTI=y +CONFIG_XPS=y CONFIG_XXHASH=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_BCJ=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/rockchip/config-default b/target/linux/rockchip/config-default deleted file mode 100644 index 966ecc085c..0000000000 --- a/target/linux/rockchip/config-default +++ /dev/null @@ -1,297 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_KEEPINITRD=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PTE_DEVMAP=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_SET_DIRECT_MAP=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_USE_MEMREMAP_PROT=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_CONT_SHIFT=4 -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_SSBD=y -CONFIG_ARM64_SVE=y -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_PSCI_FW=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_CPU_RMAP=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_REMAP=y -CONFIG_DRM_RCAR_WRITEBACK=y -CONFIG_DTC=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EFI_EARLYCON=y -CONFIG_F2FS_FS=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_AUTOSELECT=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAME_POINTER=y -CONFIG_FUJITSU_ERRATUM_010001=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_STACKLEAK=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_HAVE_PCI=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HOLES_IN_ZONE=y -CONFIG_HZ=250 -CONFIG_HZ_250=y -CONFIG_HZ_PERIODIC=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_MEMFD_CREATE=y -CONFIG_MIGRATION=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NLS=y -CONFIG_NO_IOPORT_MAP=y -CONFIG_NR_CPUS=256 -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_NET=y -CONFIG_PADATA=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PLUGIN_HOSTCC="g++" -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_RFS_ACCEL=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SMP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_SWIOTLB=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VMAP_STACK=y -CONFIG_XPS=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts new file mode 100644 index 0000000000..f6e7710a01 --- /dev/null +++ b/target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Akash Gajjar + * Copyright (c) 2019 Pragnesh Patel + */ + +/* TODO + * Delete this file and migrate RockPi 4 to RockPi 4A after + * removing Kernel 5.4. + */ + + +/dts-v1/; +#include "rk3399-rock-pi-4.dtsi" + +/ { + model = "Radxa ROCK Pi 4"; + compatible = "radxa,rockpi4", "rockchip,rk3399"; +}; diff --git a/target/linux/rockchip/patches-5.10/002-net-usb-r8152-add-LED-configuration-from-OF.patch b/target/linux/rockchip/patches-5.10/002-net-usb-r8152-add-LED-configuration-from-OF.patch new file mode 100644 index 0000000000..53b6413cf3 --- /dev/null +++ b/target/linux/rockchip/patches-5.10/002-net-usb-r8152-add-LED-configuration-from-OF.patch @@ -0,0 +1,74 @@ +From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 02:38:31 +0200 +Subject: [PATCH] net: usb: r8152: add LED configuration from OF + +This adds the ability to configure the LED configuration register using +OF. This way, the correct value for board specific LED configuration can +be determined. + +Signed-off-by: David Bauer +--- + drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -4363,6 +4364,22 @@ static void rtl_tally_reset(struct r8152 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); + } + ++static int r8152_led_configuration(struct r8152 *tp) ++{ ++ u32 led_data; ++ int ret; ++ ++ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", ++ &led_data); ++ ++ if (ret) ++ return ret; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); ++ ++ return 0; ++} ++ + static void r8152b_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -4404,6 +4421,8 @@ static void r8152b_init(struct r8152 *tp + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ r8152_led_configuration(tp); + } + + static void r8153_init(struct r8152 *tp) +@@ -4533,6 +4552,8 @@ static void r8153_init(struct r8152 *tp) + tp->coalesce = COALESCE_SLOW; + break; + } ++ ++ r8152_led_configuration(tp); + } + + static void r8153b_init(struct r8152 *tp) +@@ -4609,6 +4630,8 @@ static void r8153b_init(struct r8152 *tp + rtl_tally_reset(tp); + + tp->coalesce = 15000; /* 15 us */ ++ ++ r8152_led_configuration(tp); + } + + static int rtl8152_pre_reset(struct usb_interface *intf) diff --git a/target/linux/rockchip/patches-5.10/003-dt-bindings-net-add-RTL8152-binding-documentation.patch b/target/linux/rockchip/patches-5.10/003-dt-bindings-net-add-RTL8152-binding-documentation.patch new file mode 100644 index 0000000000..be262b993c --- /dev/null +++ b/target/linux/rockchip/patches-5.10/003-dt-bindings-net-add-RTL8152-binding-documentation.patch @@ -0,0 +1,54 @@ +From 3ee05f4aa64fc86af3be5bc176ba5808de9260a7 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 15:30:33 +0200 +Subject: [PATCH] dt-bindings: net: add RTL8152 binding documentation + +Add binding documentation for the Realtek RTL8152 / RTL8153 USB ethernet +adapters. + +Signed-off-by: David Bauer +--- + .../bindings/net/realtek,rtl8152.yaml | 36 +++++++++++++++++++ + 1 file changed, 36 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl8152.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/realtek,rtl8152.yaml +@@ -0,0 +1,36 @@ ++# SPDX-License-Identifier: GPL-2.0 ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/net/realtek,rtl8152.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Realtek RTL8152/RTL8153 series USB ethernet ++ ++maintainers: ++ - David Bauer ++ ++properties: ++ compatible: ++ oneOf: ++ - items: ++ - enum: ++ - realtek,rtl8152 ++ - realtek,rtl8153 ++ ++ reg: ++ description: The device number on the USB bus ++ ++ realtek,led-data: ++ description: Value to be written to the LED configuration register. ++ ++required: ++ - compatible ++ - reg ++ ++examples: ++ - | ++ usb-eth@2 { ++ compatible = "realtek,rtl8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; +\ No newline at end of file diff --git a/target/linux/rockchip/patches-5.10/100-rockchip-use-system-LED-for-OpenWrt.patch b/target/linux/rockchip/patches-5.10/100-rockchip-use-system-LED-for-OpenWrt.patch new file mode 100644 index 0000000000..7f9af85b1d --- /dev/null +++ b/target/linux/rockchip/patches-5.10/100-rockchip-use-system-LED-for-OpenWrt.patch @@ -0,0 +1,31 @@ +From 6731d2c9039fbe1ecf21915eab3acee0a999508a Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Fri, 10 Jul 2020 21:38:20 +0200 +Subject: [PATCH] rockchip: use system LED for OpenWrt + +Use the SYS LED on the casing for showing system status. + +This patch is kept seperate from the NanoPi R2S support patch, as i plan +on submitting the device support upstream. + +Signed-off-by: David Bauer +--- + arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +@@ -13,6 +13,13 @@ + model = "FriendlyElec NanoPi R2S"; + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; + ++ aliases { ++ led-boot = &sys_led; ++ led-failsafe = &sys_led; ++ led-running = &sys_led; ++ led-upgrade = &sys_led; ++ }; ++ + chosen { + stdout-path = "serial2:1500000n8"; + }; diff --git a/target/linux/rockchip/patches-5.10/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch b/target/linux/rockchip/patches-5.10/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch new file mode 100644 index 0000000000..eb2c9b9d83 --- /dev/null +++ b/target/linux/rockchip/patches-5.10/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch @@ -0,0 +1,62 @@ +From: William Wu + +RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 +core's general architecture. It can act as static xHCI host +controller, static device controller, USB 3.0/2.0 OTG basing +on ID of USB3.0 PHY. + +Signed-off-by: William Wu +Signed-off-by: Leonidas P. Papadakos + +--- + +NOTE: This binding still has issues. From the original thread: + +the rk3328 usb3-phy has an issue with detecting any plugin events +after a previous device got removed - see the inno-usb3-phy driver +in the vendor kernel. + +The current state is good-enough for enabling the USB3 attached LAN +port of the NanoPi R2S. However, it might explode depending on your +use-case. You've been warned. + +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -983,6 +983,33 @@ + status = "disabled"; + }; + ++ usbdrd3: usb@ff600000 { ++ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; ++ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, ++ <&cru ACLK_USB3OTG>; ++ clock-names = "ref_clk", "suspend_clk", ++ "bus_clk"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ status = "disabled"; ++ ++ usbdrd_dwc3: dwc3@ff600000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0xff600000 0x0 0x100000>; ++ interrupts = ; ++ dr_mode = "otg"; ++ phy_type = "utmi_wide"; ++ snps,dis_enblslpm_quirk; ++ snps,dis-u2-freeclk-exists-quirk; ++ snps,dis_u2_susphy_quirk; ++ snps,dis_u3_susphy_quirk; ++ snps,dis-del-phy-power-chg-quirk; ++ snps,dis-tx-ipgap-linecheck-quirk; ++ status = "disabled"; ++ }; ++ }; ++ + gic: interrupt-controller@ff811000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.10/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.10/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch new file mode 100644 index 0000000000..20d18597db --- /dev/null +++ b/target/linux/rockchip/patches-5.10/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch @@ -0,0 +1,60 @@ +From 0fc3b9b7619c4878f73a6a7989863f0d1a3fd392 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Fri, 10 Jul 2020 21:12:16 +0200 +Subject: [PATCH] rockchip: enabled LAN port on NanoPi R2S + +Enable the USB3 port on the FriendlyARM NanoPi R2S. +This is required for the USB3 attached LAN port to work. + +Signed-off-by: David Bauer +--- + .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 27 +++++++++++++++++++ + 1 file changed, 27 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +@@ -44,6 +44,18 @@ + }; + }; + ++ vcc_rtl8153: vcc-rtl8153-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtl8153_en_drv>; ++ regulator-always-on; ++ regulator-name = "vcc_rtl8153"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ }; ++ + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; +@@ -267,6 +279,12 @@ + }; + }; + }; ++ ++ usb { ++ rtl8153_en_drv: rtl8153-en-drv { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; + }; + + &io_domains { +@@ -373,3 +391,12 @@ + &usb_host0_ohci { + status = "okay"; + }; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch new file mode 100644 index 0000000000..473c265016 --- /dev/null +++ b/target/linux/rockchip/patches-5.10/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch @@ -0,0 +1,28 @@ +From 2795c8b31a686bdb8338f9404d18ef7a154f0d75 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 13:32:59 +0200 +Subject: [PATCH] arm64: rockchip: add OF node for USB eth on NanoPi R2S + +This adds the OF node for the USB3 ethernet adapter on the FriendlyARM +NanoPi R2S. Add the correct value for the RTL8153 LED configuration +register to match the blink behavior of the other port on the device. + +Signed-off-by: David Bauer +--- + arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +@@ -399,4 +399,11 @@ + &usbdrd_dwc3 { + dr_mode = "host"; + status = "okay"; ++ ++ usb-eth@2 { ++ compatible = "realtek,rtl8153"; ++ reg = <2>; ++ ++ realtek,led-data = <0x87>; ++ }; + }; diff --git a/target/linux/rockchip/patches-5.10/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch b/target/linux/rockchip/patches-5.10/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch new file mode 100644 index 0000000000..da87227564 --- /dev/null +++ b/target/linux/rockchip/patches-5.10/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch @@ -0,0 +1,32 @@ +From e12f67fe83446432ef16704c22ec23bd1dbcd094 Mon Sep 17 00:00:00 2001 +From: Vicente Bergas +Date: Tue, 1 Dec 2020 16:41:32 +0100 +Subject: arm64: dts: rockchip: use USB host by default on rk3399-rock-pi-4 + +Based on the board schematics at +https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi_4c_v12_sch_20200620.pdf +on page 19 there is an USB Type-A receptacle being used as an USB-OTG port. + +But the Type-A connector is not valid for OTG operation, for this reason +there is a switch to select host or device role. +This is non-compliant and error prone because switching is manual. +So, use host mode as it corresponds for a Type-A receptacle. + +Signed-off-by: Vicente Bergas +Link: https://lore.kernel.org/r/20201201154132.1286-4-vicencb@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +@@ -680,7 +680,7 @@ + + &usbdrd_dwc3_0 { + status = "okay"; +- dr_mode = "otg"; ++ dr_mode = "host"; + }; + + &usbdrd3_1 { From 5bd6d9377d625f6445caf75bee2ecb16fd45971d Mon Sep 17 00:00:00 2001 From: David Bauer Date: Tue, 16 Feb 2021 22:05:13 +0100 Subject: [PATCH 16/23] mpc85xx-p1010: add Kernel 5.10 support Tested on: Sophos RED 15W The TP-Link WL-WDR4900 needs to be disabled when 5.10 becomes the default kernel. When building with all kmods enabled, the resulting kernel image exceeds the maximum size the bootloader reads from the flash. For more information, see GitHub issue #1773 Signed-off-by: David Bauer --- target/linux/mpc85xx/config-5.10 | 280 ++++++++++++++++++ target/linux/mpc85xx/p1010/target.mk | 2 + ...85xx-add-gpio-keys-to-of-match-table.patch | 10 + ...0-powerpc-85xx-tl-wdr4900-v1-support.patch | 83 ++++++ .../101-powerpc-85xx-hiveap-330-support.patch | 30 ++ .../102-powerpc-add-cmdline-override.patch | 37 +++ .../103-powerpc-85xx-red-15w-rev1.patch | 29 ++ ...change-P2020RDB-dts-file-for-OpenWRT.patch | 162 ++++++++++ .../105-powerpc-85xx-panda-support.patch | 30 ++ .../106-powerpc-85xx-ws-ap3710i-support.patch | 30 ++ ...ootwrapper-disable-uImage-generation.patch | 42 +++ 11 files changed, 735 insertions(+) create mode 100644 target/linux/mpc85xx/config-5.10 create mode 100644 target/linux/mpc85xx/patches-5.10/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch create mode 100644 target/linux/mpc85xx/patches-5.10/100-powerpc-85xx-tl-wdr4900-v1-support.patch create mode 100644 target/linux/mpc85xx/patches-5.10/101-powerpc-85xx-hiveap-330-support.patch create mode 100644 target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch create mode 100644 target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch create mode 100644 target/linux/mpc85xx/patches-5.10/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch create mode 100644 target/linux/mpc85xx/patches-5.10/105-powerpc-85xx-panda-support.patch create mode 100644 target/linux/mpc85xx/patches-5.10/106-powerpc-85xx-ws-ap3710i-support.patch create mode 100644 target/linux/mpc85xx/patches-5.10/900-powerpc-bootwrapper-disable-uImage-generation.patch diff --git a/target/linux/mpc85xx/config-5.10 b/target/linux/mpc85xx/config-5.10 new file mode 100644 index 0000000000..cb0d08ba91 --- /dev/null +++ b/target/linux/mpc85xx/config-5.10 @@ -0,0 +1,280 @@ +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_ADVANCED_OPTIONS is not set +CONFIG_AR8216_PHY=y +CONFIG_AR8216_PHY_LEDS=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_MMAP_RND_BITS=11 +CONFIG_ARCH_MMAP_RND_BITS_MAX=17 +CONFIG_ARCH_MMAP_RND_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y +CONFIG_ASN1=y +CONFIG_AUDIT_ARCH=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOOKE=y +CONFIG_BOOKE_WDT=y +# CONFIG_BSC9131_RDB is not set +# CONFIG_BSC9132_QDS is not set +# CONFIG_C293_PCIE is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_CLZ_TAB=y +CONFIG_CMDLINE="console=ttyS0,115200" +CONFIG_CMDLINE_FROM_BOOTLOADER=y +# CONFIG_CMDLINE_OVERRIDE is not set +# CONFIG_COMMON_CLK is not set +CONFIG_COMPAT_32BIT_TIME=y +# CONFIG_CORENET_GENERIC is not set +# CONFIG_CPM2 is not set +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +# CONFIG_CRYPTO_AES_PPC_SPE is not set +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_MD5_PPC is not set +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_SHA1_PPC is not set +# CONFIG_CRYPTO_SHA1_PPC_SPE is not set +# CONFIG_CRYPTO_SHA256_PPC_SPE is not set +CONFIG_DATA_SHIFT=12 +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DNOTIFY=y +CONFIG_DTC=y +# CONFIG_E200 is not set +CONFIG_E500=y +# CONFIG_E5500_CPU is not set +# CONFIG_E6500_CPU is not set +CONFIG_EARLY_PRINTK=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FIXED_PHY=y +CONFIG_FSL_BOOKE=y +CONFIG_FSL_EMB_PERFMON=y +# CONFIG_FSL_ENETC_MDIO is not set +# CONFIG_FSL_FMAN is not set +CONFIG_FSL_LBC=y +CONFIG_FSL_PCI=y +CONFIG_FSL_PQ_MDIO=y +CONFIG_FSL_SOC=y +CONFIG_FSL_SOC_BOOKE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GEN_RTC=y +# CONFIG_GE_IMP3A is not set +CONFIG_GIANFAR=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MPC8XXX=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HIVEAP_330 is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_XIPHERA is not set +CONFIG_HZ=250 +CONFIG_HZ_250=y +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_MPC=y +CONFIG_ILLEGAL_POINTER_VALUE=0 +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_ISA_DMA_API=y +CONFIG_KERNEL_START=0xc0000000 +# CONFIG_KSI8560 is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +CONFIG_LIBFDT=y +CONFIG_LLD_VERSION=0 +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOWMEM_CAM_NUM=3 +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_LXT_PHY=y +# CONFIG_MATH_EMULATION is not set +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MEMFD_CREATE=y +# CONFIG_MFD_ROHM_BD71828 is not set +CONFIG_MIGRATION=y +CONFIG_MMU_GATHER_PAGE_SIZE=y +CONFIG_MODULES_USE_ELF_RELA=y +# CONFIG_MPC8536_DS is not set +# CONFIG_MPC8540_ADS is not set +# CONFIG_MPC8560_ADS is not set +# CONFIG_MPC85xx_CDS is not set +# CONFIG_MPC85xx_DS is not set +# CONFIG_MPC85xx_MDS is not set +# CONFIG_MPC85xx_RDB is not set +CONFIG_MPIC=y +# CONFIG_MPIC_MSGR is not set +CONFIG_MPIC_TIMER=y +CONFIG_MPILIB=y +# CONFIG_MTD_CFI is not set +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MVME2500 is not set +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NLS=y +CONFIG_NR_IRQS=512 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_DMA_DEFAULT_COHERENT=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND=y +# CONFIG_P1010_RDB is not set +# CONFIG_P1022_DS is not set +# CONFIG_P1022_RDK is not set +# CONFIG_P1023_RDB is not set +CONFIG_PAGE_OFFSET=0xc0000000 +# CONFIG_PANDA is not set +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYSICAL_ALIGN=0x04000000 +CONFIG_PHYSICAL_START=0x00000000 +# CONFIG_PHYS_64BIT is not set +# CONFIG_PMU_SYSFS is not set +# CONFIG_PPA8548 is not set +CONFIG_PPC=y +CONFIG_PPC32=y +# CONFIG_PPC64 is not set +CONFIG_PPC_85xx=y +# CONFIG_PPC_8xx is not set +CONFIG_PPC_ADV_DEBUG_DACS=2 +CONFIG_PPC_ADV_DEBUG_DVCS=0 +CONFIG_PPC_ADV_DEBUG_IACS=2 +CONFIG_PPC_ADV_DEBUG_REGS=y +CONFIG_PPC_BARRIER_NOSPEC=y +CONFIG_PPC_BOOK3E_MMU=y +# CONFIG_PPC_BOOK3S_6xx is not set +CONFIG_PPC_DOORBELL=y +# CONFIG_PPC_E500MC is not set +# CONFIG_PPC_EARLY_DEBUG is not set +CONFIG_PPC_FSL_BOOK3E=y +CONFIG_PPC_INDIRECT_PCI=y +# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set +CONFIG_PPC_MMU_NOHASH=y +CONFIG_PPC_MMU_NOHASH_32=y +CONFIG_PPC_PAGE_SHIFT=12 +# CONFIG_PPC_PTDUMP is not set +# CONFIG_PPC_QEMU_E500 is not set +CONFIG_PPC_SMP_MUXED_IPI=y +CONFIG_PPC_UDBG_16550=y +CONFIG_PPC_WERROR=y +CONFIG_QE_GPIO=y +CONFIG_QUICC_ENGINE=y +CONFIG_RAS=y +# CONFIG_RED_15W_REV1 is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_GENERIC=y +# CONFIG_RTC_DRV_RV3032 is not set +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +# CONFIG_SBC8548 is not set +# CONFIG_SCOM_DEBUGFS is not set +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_QE is not set +# CONFIG_SOCRATES is not set +CONFIG_SPARSE_IRQ=y +CONFIG_SPE=y +CONFIG_SPE_POSSIBLE=y +CONFIG_SPI=y +CONFIG_SPI_FSL_ESPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_STX_GP3 is not set +CONFIG_SWCONFIG=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_THREAD_SHIFT=13 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +# CONFIG_TL_WDR4900_V1 is not set +# CONFIG_TQM8540 is not set +# CONFIG_TQM8541 is not set +# CONFIG_TQM8548 is not set +# CONFIG_TQM8555 is not set +# CONFIG_TQM8560 is not set +# CONFIG_TWR_P102x is not set +CONFIG_UCC=y +CONFIG_UCC_FAST=y +CONFIG_UCC_GETH=y +# CONFIG_UGETH_TX_ON_DEMAND is not set +CONFIG_USB_SUPPORT=y +CONFIG_VDSO32=y +# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WS_AP3710I is not set +# CONFIG_XES_MPC85xx is not set +CONFIG_XZ_DEC_BCJ=y +CONFIG_XZ_DEC_POWERPC=y diff --git a/target/linux/mpc85xx/p1010/target.mk b/target/linux/mpc85xx/p1010/target.mk index 12ed78ace1..1140a325b6 100644 --- a/target/linux/mpc85xx/p1010/target.mk +++ b/target/linux/mpc85xx/p1010/target.mk @@ -2,6 +2,8 @@ BOARDNAME:=P1010 FEATURES+=nand KERNELNAME:=simpleImage.tl-wdr4900-v1 +KERNEL_TESTING_PATCHVER:=5.10 + define Target/Description Build firmware images for P1010 based boards. endef diff --git a/target/linux/mpc85xx/patches-5.10/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch b/target/linux/mpc85xx/patches-5.10/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch new file mode 100644 index 0000000000..5e5ab10daf --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch @@ -0,0 +1,10 @@ +--- a/arch/powerpc/platforms/85xx/common.c ++++ b/arch/powerpc/platforms/85xx/common.c +@@ -30,6 +30,7 @@ static const struct of_device_id mpc85xx + { .compatible = "fsl,mpc8548-guts", }, + /* Probably unnecessary? */ + { .compatible = "gpio-leds", }, ++ { .compatible = "gpio-keys", }, + /* For all PCI controllers */ + { .compatible = "fsl,mpc8540-pci", }, + { .compatible = "fsl,mpc8548-pcie", }, diff --git a/target/linux/mpc85xx/patches-5.10/100-powerpc-85xx-tl-wdr4900-v1-support.patch b/target/linux/mpc85xx/patches-5.10/100-powerpc-85xx-tl-wdr4900-v1-support.patch new file mode 100644 index 0000000000..4da431ec23 --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/100-powerpc-85xx-tl-wdr4900-v1-support.patch @@ -0,0 +1,83 @@ +From 1d9f596e572917772b87a2a37e1680902964782f Mon Sep 17 00:00:00 2001 +From: Gabor Juhos +Date: Wed, 20 Feb 2013 08:40:33 +0100 +Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1 + board + +This patch adds support for the TP-Link TL-WDR4900 v1 +concurrent dual-band wireless router. The devices uses +the Freescale P1014 SoC. + +Signed-off-by: Gabor Juhos +Signed-off-by: Pawel Dembicki +--- + arch/powerpc/boot/Makefile | 3 ++- + arch/powerpc/boot/wrapper | 5 +++++ + arch/powerpc/platforms/85xx/Kconfig | 12 ++++++++++++ + arch/powerpc/platforms/85xx/Makefile | 1 + + 4 files changed, 20 insertions(+), 1 deletion(-) + +--- a/arch/powerpc/boot/Makefile ++++ b/arch/powerpc/boot/Makefile +@@ -157,6 +157,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie + src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S + src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S + src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c ++src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S + + src-wlib := $(sort $(src-wlib-y)) + src-plat := $(sort $(src-plat-y)) +@@ -336,7 +337,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm + image-$(CONFIG_TQM8560) += cuImage.tqm8560 + image-$(CONFIG_SBC8548) += cuImage.sbc8548 + image-$(CONFIG_KSI8560) += cuImage.ksi8560 +- ++image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1 + # Board ports in arch/powerpc/platform/86xx/Kconfig + image-$(CONFIG_MVME7100) += dtbImage.mvme7100 + +--- a/arch/powerpc/boot/wrapper ++++ b/arch/powerpc/boot/wrapper +@@ -324,6 +324,11 @@ adder875-redboot) + platformo="$object/fixed-head.o $object/redboot-8xx.o" + binary=y + ;; ++simpleboot-tl-wdr4900-v1) ++ platformo="$object/fixed-head.o $object/simpleboot.o" ++ link_address='0x1000000' ++ binary=y ++ ;; + simpleboot-*) + platformo="$object/fixed-head.o $object/simpleboot.o" + binary=y +--- a/arch/powerpc/platforms/85xx/Kconfig ++++ b/arch/powerpc/platforms/85xx/Kconfig +@@ -170,6 +170,18 @@ config STX_GP3 + select CPM2 + select DEFAULT_UIMAGE + ++config TL_WDR4900_V1 ++ bool "TP-Link TL-WDR4900 v1" ++ select DEFAULT_UIMAGE ++ select ARCH_REQUIRE_GPIOLIB ++ select GPIO_MPC8XXX ++ select SWIOTLB ++ help ++ This option enables support for the TP-Link TL-WDR4900 v1 board. ++ ++ This board is a Concurrent Dual-Band wireless router with a ++ Freescale P1014 SoC. ++ + config TQM8540 + bool "TQ Components TQM8540" + help +--- a/arch/powerpc/platforms/85xx/Makefile ++++ b/arch/powerpc/platforms/85xx/Makefile +@@ -26,6 +26,7 @@ obj-$(CONFIG_CORENET_GENERIC) += coren + obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o + obj-$(CONFIG_STX_GP3) += stx_gp3.o + obj-$(CONFIG_TQM85xx) += tqm85xx.o ++obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o + obj-$(CONFIG_SBC8548) += sbc8548.o + obj-$(CONFIG_PPA8548) += ppa8548.o + obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o diff --git a/target/linux/mpc85xx/patches-5.10/101-powerpc-85xx-hiveap-330-support.patch b/target/linux/mpc85xx/patches-5.10/101-powerpc-85xx-hiveap-330-support.patch new file mode 100644 index 0000000000..34568398c2 --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/101-powerpc-85xx-hiveap-330-support.patch @@ -0,0 +1,30 @@ +--- a/arch/powerpc/platforms/85xx/Kconfig ++++ b/arch/powerpc/platforms/85xx/Kconfig +@@ -49,6 +49,17 @@ config BSC9132_QDS + and dual StarCore SC3850 DSP cores. + Manufacturer : Freescale Semiconductor, Inc + ++config HIVEAP_330 ++ bool "Aerohive HiveAP-330" ++ select DEFAULT_UIMAGE ++ select ARCH_REQUIRE_GPIOLIB ++ select GPIO_MPC8XXX ++ help ++ This option enables support for the Aerohive HiveAP-330 board. ++ ++ This board is a Concurrent Dual-Band wireless access point with a ++ Freescale P1020 SoC. ++ + config MPC8540_ADS + bool "Freescale MPC8540 ADS" + select DEFAULT_UIMAGE +--- a/arch/powerpc/platforms/85xx/Makefile ++++ b/arch/powerpc/platforms/85xx/Makefile +@@ -10,6 +10,7 @@ obj-y += common.o + obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o + obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o + obj-$(CONFIG_C293_PCIE) += c293pcie.o ++obj-$(CONFIG_HIVEAP_330) += hiveap-330.o + obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o + obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o + obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o diff --git a/target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch b/target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch new file mode 100644 index 0000000000..924ce9307e --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/102-powerpc-add-cmdline-override.patch @@ -0,0 +1,37 @@ +--- a/arch/powerpc/Kconfig ++++ b/arch/powerpc/Kconfig +@@ -885,6 +885,14 @@ config CMDLINE_FORCE + This is useful if you cannot or don't want to change the + command-line options your boot loader passes to the kernel. + ++config CMDLINE_OVERRIDE ++ bool "Use alternative cmdline from device tree" ++ help ++ Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can ++ be used, this is not a good option for kernels that are shared across ++ devices. This setting enables using "chosen/cmdline-override" as the ++ cmdline if it exists in the device tree. ++ + config EXTRA_TARGETS + string "Additional default image types" + help +--- a/drivers/of/fdt.c ++++ b/drivers/of/fdt.c +@@ -1060,6 +1060,17 @@ int __init early_init_dt_scan_chosen(uns + if (p != NULL && l > 0) + strlcpy(data, p, min(l, COMMAND_LINE_SIZE)); + ++ /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different ++ * device tree option of chosen/bootargs-override. This is ++ * helpful on boards where u-boot sets bootargs, and is unable ++ * to be modified. ++ */ ++#ifdef CONFIG_CMDLINE_OVERRIDE ++ p = of_get_flat_dt_prop(node, "bootargs-override", &l); ++ if (p != NULL && l > 0) ++ strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE)); ++#endif ++ + /* + * CONFIG_CMDLINE is meant to be a default in case nothing else + * managed to set the command line, unless CONFIG_CMDLINE_FORCE diff --git a/target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch b/target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch new file mode 100644 index 0000000000..b84a56659c --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/103-powerpc-85xx-red-15w-rev1.patch @@ -0,0 +1,29 @@ +--- a/arch/powerpc/platforms/85xx/Kconfig ++++ b/arch/powerpc/platforms/85xx/Kconfig +@@ -173,6 +173,16 @@ config XES_MPC85xx + Manufacturer: Extreme Engineering Solutions, Inc. + URL: + ++config RED_15W_REV1 ++ bool "Sophos RED 15w Rev.1" ++ select DEFAULT_UIMAGE ++ select ARCH_REQUIRE_GPIOLIB ++ select GPIO_MPC8XXX ++ help ++ This option enables support for the Sophos RED 15w Rev.1 board. ++ ++ This board is a wireless VPN router with a Freescale P1010 SoC. ++ + config STX_GP3 + bool "Silicon Turnkey Express GP3" + help +--- a/arch/powerpc/platforms/85xx/Makefile ++++ b/arch/powerpc/platforms/85xx/Makefile +@@ -25,6 +25,7 @@ obj-$(CONFIG_P1023_RDB) += p1023_rdb.o + obj-$(CONFIG_TWR_P102x) += twr_p102x.o + obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o + obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o ++obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o + obj-$(CONFIG_STX_GP3) += stx_gp3.o + obj-$(CONFIG_TQM85xx) += tqm85xx.o + obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o diff --git a/target/linux/mpc85xx/patches-5.10/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch b/target/linux/mpc85xx/patches-5.10/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch new file mode 100644 index 0000000000..a22f251077 --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch @@ -0,0 +1,162 @@ +From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001 +From: Pawel Dembicki +Date: Sun, 30 Dec 2018 23:24:41 +0100 +Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT + +This patch apply chages for OpenWRT in P2020RDB +dts file. + +Signed-off-by: Pawel Dembicki +--- + arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++--------- + 1 file changed, 63 insertions(+), 35 deletions(-) + +--- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts ++++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts +@@ -5,10 +5,15 @@ + * Copyright 2009-2012 Freescale Semiconductor Inc. + */ + ++/dts-v1/; ++ + /include/ "p2020si-pre.dtsi" + ++#include ++#include ++ + / { +- model = "fsl,P2020RDB"; ++ model = "Freescale P2020RDB"; + compatible = "fsl,P2020RDB"; + + aliases { +@@ -34,48 +39,38 @@ + 0x2 0x0 0x0 0xffb00000 0x00020000>; + + nor@0,0 { +- #address-cells = <1>; +- #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x1000000>; + bank-width = <2>; + device-width = <1>; + +- partition@0 { +- /* This location must not be altered */ +- /* 256KB for Vitesse 7385 Switch firmware */ +- reg = <0x0 0x00040000>; +- label = "NOR (RO) Vitesse-7385 Firmware"; +- read-only; +- }; +- +- partition@40000 { +- /* 256KB for DTB Image */ +- reg = <0x00040000 0x00040000>; +- label = "NOR (RO) DTB Image"; +- read-only; +- }; ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; + +- partition@80000 { +- /* 3.5 MB for Linux Kernel Image */ +- reg = <0x00080000 0x00380000>; +- label = "NOR (RO) Linux Kernel Image"; +- read-only; +- }; ++ partition@0 { ++ /* This location must not be altered */ ++ /* 256KB for Vitesse 7385 Switch firmware */ ++ reg = <0x0 0x00040000>; ++ label = "NOR (RO) Vitesse-7385 Firmware"; ++ read-only; ++ }; + +- partition@400000 { +- /* 11MB for JFFS2 based Root file System */ +- reg = <0x00400000 0x00b00000>; +- label = "NOR (RW) JFFS2 Root File System"; +- }; ++ partition@40000 { ++ compatible = "denx,fit"; ++ reg = <0x00040000 0x00ec0000>; ++ label = "firmware"; ++ }; + +- partition@f00000 { +- /* This location must not be altered */ +- /* 512KB for u-boot Bootloader Image */ +- /* 512KB for u-boot Environment Variables */ +- reg = <0x00f00000 0x00100000>; +- label = "NOR (RO) U-Boot Image"; +- read-only; ++ partition@f00000 { ++ /* This location must not be altered */ ++ /* 512KB for u-boot Bootloader Image */ ++ /* 512KB for u-boot Environment Variables */ ++ reg = <0x00f00000 0x00100000>; ++ label = "u-boot"; ++ read-only; ++ }; + }; + }; + +@@ -140,13 +135,43 @@ + soc: soc@ffe00000 { + ranges = <0x0 0x0 0xffe00000 0x100000>; + ++ gpio0: gpio-controller@fc00 { ++ }; ++ + i2c@3000 { ++ temperature-sensor@4c { ++ compatible = "adi,adt7461"; ++ reg = <0x4c>; ++ }; ++ ++ eeprom@50 { ++ compatible = "atmel,24c256"; ++ reg = <0x50>; ++ }; ++ + rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + }; + }; + ++ i2c@3100 { ++ pmic@11 { ++ compatible = "zl2006"; ++ reg = <0x11>; ++ }; ++ ++ gpio@18 { ++ compatible = "nxp,pca9557"; ++ reg = <0x18>; ++ }; ++ ++ eeprom@52 { ++ compatible = "atmel,24c01"; ++ reg = <0x52>; ++ }; ++ }; ++ + spi@7000 { + flash@0 { + #address-cells = <1>; +@@ -200,10 +225,12 @@ + phy0: ethernet-phy@0 { + interrupts = <3 1 0 0>; + reg = <0x0>; ++ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + phy1: ethernet-phy@1 { + interrupts = <3 1 0 0>; + reg = <0x1>; ++ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + }; + tbi-phy@2 { + device_type = "tbi-phy"; diff --git a/target/linux/mpc85xx/patches-5.10/105-powerpc-85xx-panda-support.patch b/target/linux/mpc85xx/patches-5.10/105-powerpc-85xx-panda-support.patch new file mode 100644 index 0000000000..a08bc302f2 --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/105-powerpc-85xx-panda-support.patch @@ -0,0 +1,30 @@ +--- a/arch/powerpc/platforms/85xx/Kconfig ++++ b/arch/powerpc/platforms/85xx/Kconfig +@@ -60,6 +60,17 @@ config HIVEAP_330 + This board is a Concurrent Dual-Band wireless access point with a + Freescale P1020 SoC. + ++config PANDA ++ bool "OCEDO PANDA" ++ select DEFAULT_UIMAGE ++ select ARCH_REQUIRE_GPIOLIB ++ select GPIO_MPC8XXX ++ help ++ This option enables support for the OCEDO PANDA board. ++ ++ This board is a Concurrent Dual-Band wireless access point with a ++ Freescale P1020 SoC. ++ + config MPC8540_ADS + bool "Freescale MPC8540 ADS" + select DEFAULT_UIMAGE +--- a/arch/powerpc/platforms/85xx/Makefile ++++ b/arch/powerpc/platforms/85xx/Makefile +@@ -22,6 +22,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o + obj-$(CONFIG_P1022_DS) += p1022_ds.o + obj-$(CONFIG_P1022_RDK) += p1022_rdk.o + obj-$(CONFIG_P1023_RDB) += p1023_rdb.o ++obj-$(CONFIG_PANDA) += panda.o + obj-$(CONFIG_TWR_P102x) += twr_p102x.o + obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o + obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o diff --git a/target/linux/mpc85xx/patches-5.10/106-powerpc-85xx-ws-ap3710i-support.patch b/target/linux/mpc85xx/patches-5.10/106-powerpc-85xx-ws-ap3710i-support.patch new file mode 100644 index 0000000000..4bacedbcd7 --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/106-powerpc-85xx-ws-ap3710i-support.patch @@ -0,0 +1,30 @@ +--- a/arch/powerpc/platforms/85xx/Kconfig ++++ b/arch/powerpc/platforms/85xx/Kconfig +@@ -71,6 +71,17 @@ config PANDA + This board is a Concurrent Dual-Band wireless access point with a + Freescale P1020 SoC. + ++config WS_AP3710I ++ bool "Enterasys WS-AP3710i" ++ select DEFAULT_UIMAGE ++ select ARCH_REQUIRE_GPIOLIB ++ select GPIO_MPC8XXX ++ help ++ This option enables support for the Enterasys WS-AP3710i board. ++ ++ This board is a Concurrent Dual-Band wireless access point with a ++ Freescale P1020 SoC. ++ + config MPC8540_ADS + bool "Freescale MPC8540 ADS" + select DEFAULT_UIMAGE +--- a/arch/powerpc/platforms/85xx/Makefile ++++ b/arch/powerpc/platforms/85xx/Makefile +@@ -24,6 +24,7 @@ obj-$(CONFIG_P1022_RDK) += p1022_rdk.o + obj-$(CONFIG_P1023_RDB) += p1023_rdb.o + obj-$(CONFIG_PANDA) += panda.o + obj-$(CONFIG_TWR_P102x) += twr_p102x.o ++obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o + obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o + obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o + obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o diff --git a/target/linux/mpc85xx/patches-5.10/900-powerpc-bootwrapper-disable-uImage-generation.patch b/target/linux/mpc85xx/patches-5.10/900-powerpc-bootwrapper-disable-uImage-generation.patch new file mode 100644 index 0000000000..2ba3f83326 --- /dev/null +++ b/target/linux/mpc85xx/patches-5.10/900-powerpc-bootwrapper-disable-uImage-generation.patch @@ -0,0 +1,42 @@ +From d43ab14605510d9d2bd257a8cd70f24ada4621b0 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sat, 29 Feb 2020 14:27:04 +0100 +Subject: [PATCH] powerpc: bootwrapper: disable uImage generation + +Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to +instruct the mkimage to use the xz compression, which isn't +supported. This disables the uImage generation, as OpenWrt +generates individual uImages for each board using it's own +toolchain. + +Signed-off-by: David Bauer +--- + arch/powerpc/boot/Makefile | 9 --------- + 1 file changed, 9 deletions(-) + +--- a/arch/powerpc/boot/Makefile ++++ b/arch/powerpc/boot/Makefile +@@ -264,7 +264,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp + image-$(CONFIG_PPC_EFIKA) += zImage.chrp + image-$(CONFIG_PPC_PMAC) += zImage.pmac + image-$(CONFIG_PPC_HOLLY) += dtbImage.holly +-image-$(CONFIG_DEFAULT_UIMAGE) += uImage + image-$(CONFIG_EPAPR_BOOT) += zImage.epapr + + # +@@ -395,15 +394,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits + $(obj)/vmlinux.strip: vmlinux + $(STRIP) -s -R .comment $< -o $@ + +-$(obj)/uImage: vmlinux $(wrapperbits) FORCE +- $(call if_changed,wrap,uboot) +- +-$(obj)/uImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE +- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz) +- +-$(obj)/uImage.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE +- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb) +- + $(obj)/cuImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE + $(call if_changed,wrap,cuboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz) + From 3832403771f3319f2c95a9a084e0c3d46b7ee929 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Wed, 17 Feb 2021 02:04:46 +0100 Subject: [PATCH 17/23] ath79: ag71xx: make kernel 5.10 compatible Add the necessary kernel version ifdef switches in order to support the kernel version 5.10. Signed-off-by: David Bauer --- .../net/ethernet/atheros/ag71xx/ag71xx.h | 4 +++ .../net/ethernet/atheros/ag71xx/ag71xx_main.c | 25 ++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index fde9db3745..5ff9439f0d 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -178,7 +178,11 @@ struct ag71xx { struct phy_device *phy_dev; void *phy_priv; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,0) + phy_interface_t phy_if_mode; +#else int phy_if_mode; +#endif unsigned int link; unsigned int speed; diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 07d9992ca7..2767ad7642 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -936,7 +936,11 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update) * The wr, rr functions cannot be used since this hidden register * is outside of the normal ag71xx register block. */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + void __iomem *dam = ioremap(0xb90001bc, 0x4); +#else void __iomem *dam = ioremap_nocache(0xb90001bc, 0x4); +#endif if (dam) { __raw_writel(__raw_readl(dam) & ~BIT(27), dam); (void)__raw_readl(dam); @@ -1193,7 +1197,11 @@ static void ag71xx_oom_timer_handler(struct timer_list *t) napi_schedule(&ag->napi); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static void ag71xx_tx_timeout(struct net_device *dev, unsigned int txqueue) +#else static void ag71xx_tx_timeout(struct net_device *dev) +#endif { struct ag71xx *ag = netdev_priv(dev); @@ -1579,15 +1587,25 @@ static int ag71xx_probe(struct platform_device *pdev) ag->pllregmap = NULL; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + ag->mac_base = devm_ioremap(&pdev->dev, res->start, + res->end - res->start + 1); +#else ag->mac_base = devm_ioremap_nocache(&pdev->dev, res->start, res->end - res->start + 1); +#endif if (!ag->mac_base) return -ENOMEM; res = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (res) { - ag->mii_base = devm_ioremap_nocache(&pdev->dev, res->start, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + ag->mii_base = devm_ioremap(&pdev->dev, res->start, res->end - res->start + 1); +#else + ag->mii_base = devm_ioremap_nocache(&pdev->dev, res->start, + res->end - res->start + 1); +#endif if (!ag->mii_base) return -ENOMEM; } @@ -1667,7 +1685,12 @@ static int ag71xx_probe(struct platform_device *pdev) memcpy(dev->dev_addr, mac_addr, ETH_ALEN); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,0) + of_get_phy_mode(np, &ag->phy_if_mode); +#else ag->phy_if_mode = of_get_phy_mode(np); +#endif + if (ag->phy_if_mode < 0) { dev_err(&pdev->dev, "missing phy-mode property in DT\n"); return ag->phy_if_mode; From da55758cc58a2e6f0570eacd4bb9c2d4792572a6 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Wed, 17 Feb 2021 05:53:32 +0100 Subject: [PATCH 18/23] ath79: specify device-type for PCI controllers Specify the device_type property for PCI as well as PCIe controllers. Otherwise, the PCI range parser will not be selected when using kernel 5.10. Signed-off-by: David Bauer --- target/linux/ath79/dts/ar7100.dtsi | 2 ++ target/linux/ath79/dts/ar724x.dtsi | 2 ++ target/linux/ath79/dts/ar9344.dtsi | 2 ++ target/linux/ath79/dts/qca953x.dtsi | 2 ++ target/linux/ath79/dts/qca955x.dtsi | 4 ++++ target/linux/ath79/dts/qca956x.dtsi | 2 ++ 6 files changed, 14 insertions(+) diff --git a/target/linux/ath79/dts/ar7100.dtsi b/target/linux/ath79/dts/ar7100.dtsi index 2617c68521..64702f2df2 100644 --- a/target/linux/ath79/dts/ar7100.dtsi +++ b/target/linux/ath79/dts/ar7100.dtsi @@ -118,6 +118,8 @@ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 /* pci memory */ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */ + device_type = "pci"; + interrupt-parent = <&pci_intc>; interrupts = <4>; diff --git a/target/linux/ath79/dts/ar724x.dtsi b/target/linux/ath79/dts/ar724x.dtsi index e9daae0678..a078712e01 100644 --- a/target/linux/ath79/dts/ar724x.dtsi +++ b/target/linux/ath79/dts/ar724x.dtsi @@ -133,6 +133,8 @@ resets = <&rst 6>, <&rst 7>; reset-names = "hc", "phy"; + device_type = "pci"; + interrupt-controller; #interrupt-cells = <1>; diff --git a/target/linux/ath79/dts/ar9344.dtsi b/target/linux/ath79/dts/ar9344.dtsi index e99d962933..fb23c53d41 100644 --- a/target/linux/ath79/dts/ar9344.dtsi +++ b/target/linux/ath79/dts/ar9344.dtsi @@ -46,6 +46,8 @@ interrupt-parent = <&intc2>; interrupts = <1>; + device_type = "pci"; + resets = <&rst 6>, <&rst 7>; reset-names = "hc", "phy"; diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi index 1c2c1350f7..1a64b01300 100644 --- a/target/linux/ath79/dts/qca953x.dtsi +++ b/target/linux/ath79/dts/qca953x.dtsi @@ -164,6 +164,8 @@ interrupt-parent = <&intc2>; interrupts = <1>; + device_type = "pci"; + resets = <&rst 6>, <&rst 7>; reset-names = "hc", "phy"; diff --git a/target/linux/ath79/dts/qca955x.dtsi b/target/linux/ath79/dts/qca955x.dtsi index f910d2a822..9817843edf 100644 --- a/target/linux/ath79/dts/qca955x.dtsi +++ b/target/linux/ath79/dts/qca955x.dtsi @@ -201,6 +201,8 @@ interrupt-parent = <&intc2>; interrupts = <1>; + device_type = "pci"; + resets = <&rst 6>, <&rst 7>; reset-names = "hc", "phy"; @@ -236,6 +238,8 @@ interrupt-parent = <&intc3>; interrupts = <0>; + device_type = "pci"; + resets = <&rst2 6>, <&rst2 7>; reset-names = "hc", "phy"; diff --git a/target/linux/ath79/dts/qca956x.dtsi b/target/linux/ath79/dts/qca956x.dtsi index 6489efbf0b..30ede3e55b 100644 --- a/target/linux/ath79/dts/qca956x.dtsi +++ b/target/linux/ath79/dts/qca956x.dtsi @@ -172,6 +172,8 @@ interrupt-parent = <&intc3>; interrupts = <0>; + device_type = "pci"; + resets = <&rst 6>, <&rst 7>; reset-names = "hc", "phy"; From fb64e2c30f0cba887d3b183ce52de36b3e8bbb7e Mon Sep 17 00:00:00 2001 From: David Bauer Date: Wed, 17 Feb 2021 22:12:43 +0100 Subject: [PATCH 19/23] ath79: ar934x-nand: add kernel 5.10 compatibility Adapt the driver to make it work with the NAND subsystem changes between kernel 5.4 and 5.10. Tested-on: Aerohive HiveAP121 Signed-off-by: David Bauer --- .../files/drivers/mtd/nand/raw/ar934x_nand.c | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c b/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c index 5f0026b475..207bcd59ac 100644 --- a/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c +++ b/target/linux/ath79/files/drivers/mtd/nand/raw/ar934x_nand.c @@ -14,6 +14,9 @@ #include #include #include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) +#include +#endif #include #include #include @@ -719,7 +722,11 @@ static void ar934x_nfc_cmdfunc(struct nand_chip *nand, unsigned int command, break; case NAND_CMD_PAGEPROG: +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) { +#else if (nand->ecc.mode == NAND_ECC_HW) { +#endif /* the data is already written */ break; } @@ -1325,15 +1332,29 @@ static int ar934x_nfc_attach_chip(struct nand_chip *nand) if (ret) return ret; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) { +#else if (nand->ecc.mode == NAND_ECC_HW) { +#endif ret = ar934x_nfc_setup_hwecc(nfc); if (ret) return ret; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + } else if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT) { + dev_err(dev, "unknown ECC mode %d\n", nand->ecc.engine_type); +#else } else if (nand->ecc.mode != NAND_ECC_SOFT) { dev_err(dev, "unknown ECC mode %d\n", nand->ecc.mode); +#endif return -EINVAL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + } else if ((nand->ecc.algo != NAND_ECC_ALGO_BCH) && + (nand->ecc.algo != NAND_ECC_ALGO_HAMMING)) { +#else } else if ((nand->ecc.algo != NAND_ECC_BCH) && (nand->ecc.algo != NAND_ECC_HAMMING)) { +#endif dev_err(dev, "unknown software ECC algo %d\n", nand->ecc.algo); return -EINVAL; } @@ -1422,7 +1443,11 @@ static int ar934x_nfc_probe(struct platform_device *pdev) nand->legacy.read_byte = ar934x_nfc_read_byte; nand->legacy.write_buf = ar934x_nfc_write_buf; nand->legacy.read_buf = ar934x_nfc_read_buf; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; /* default */ +#else nand->ecc.mode = NAND_ECC_HW; /* default */ +#endif nand->priv = nfc; platform_set_drvdata(pdev, nfc); @@ -1462,7 +1487,12 @@ static int ar934x_nfc_remove(struct platform_device *pdev) nfc = platform_get_drvdata(pdev); if (nfc) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0) + mtd_device_unregister(nand_to_mtd(&nfc->nand_chip)); + nand_cleanup(&nfc->nand_chip); +#else nand_release(&nfc->nand_chip); +#endif ar934x_nfc_free_buf(nfc); } From d6b785d47739a84611088ab26256fa5808d06a9d Mon Sep 17 00:00:00 2001 From: David Bauer Date: Wed, 17 Feb 2021 01:29:44 +0100 Subject: [PATCH 20/23] ath79: add kernel 5.10 support This adds Kernel 5.10 support for the generic, nand and tiny subtargets. The following patch is not contained, as it needs to be reworked: platform/920-mikrotik-rb4xx.patch Tested-on: - Siemens WS-AP3610 - Enterasys WS-AP3710 - Aerohive HiveAP 121 - TP-Link TL-WA901 v2 - TP-Link TL-WR741 v1 Signed-off-by: David Bauer --- target/linux/ath79/Makefile | 1 - target/linux/ath79/config-5.10 | 199 ++++ target/linux/ath79/generic/target.mk | 2 + target/linux/ath79/nand/target.mk | 2 + ...ds-add-reset-controller-based-driver.patch | 186 ++++ .../0004-phy-add-ath79-usb-phys.patch | 333 +++++++ ...005-usb-add-more-OF-quirk-properties.patch | 24 + ...9-intc-add-irq-cascade-driver-for-QC.patch | 168 ++++ ...ip-irq-ath79-cpu-drop-OF-init-helper.patch | 23 + ...ngs-PCI-qcom-ar7100-adds-binding-doc.patch | 57 ++ .../0018-MIPS-pci-ar71xx-convert-to-OF.patch | 202 ++++ ...ngs-PCI-qcom-ar7240-adds-binding-doc.patch | 61 ++ .../0020-MIPS-pci-ar724x-convert-to-OF.patch | 205 +++++ .../0032-MIPS-ath79-sanitize-symbols.patch | 93 ++ .../0033-spi-ath79-drop-pdata-support.patch | 71 ++ .../0034-MIPS-ath79-ath9k-exports.patch | 27 + .../0036-GPIO-add-named-gpio-exports.patch | 165 ++++ ...-MIPS-ath79-remove-irq-code-from-pci.patch | 139 +++ .../patches-5.10/0037-missing-registers.patch | 21 + ...9-add-missing-QCA955x-GMAC-registers.patch | 90 ++ ...S-ath79-export-UART1-reference-clock.patch | 52 ++ .../004-register_gpio_driver_earlier.patch | 18 + ...-spi-master-setup-and-cleanup-assign.patch | 28 + ...th79-always-call-chipselect-function.patch | 21 + ...d-block-protection-flags-to-macronix.patch | 26 + ...se-4-bit-BP-for-large-Macronix-flash.patch | 85 ++ .../0054-spi-always-write-cs.patch | 31 + ...ci-ar724x-add-QCA9550-reset-sequence.patch | 130 +++ .../404-mtd-cybertan-trx-parser.patch | 27 + .../408-mtd-redboot_partition_scan.patch | 44 + ...th79-Implement-the-spi_mem-interface.patch | 68 ++ .../420-net-use-downstream-ag71xx.patch | 28 + ...425-at803x-allow-sgmii-aneg-override.patch | 16 + .../430-drivers-link-spi-before-mtd.patch | 12 + .../440-mtd-ar934x-nand-driver.patch | 25 + ...ath79-swizzle-pci-address-for-ar71xx.patch | 98 ++ .../900-mdio_bitbang_ignore_ta_value.patch | 32 + ...-prevent-rescheduling-during-command.patch | 61 ++ .../910-unaligned_access_hacks.patch | 869 ++++++++++++++++++ ...support-for-boot-console-with-arbitr.patch | 54 ++ .../930-ar8216-make-reg-access-atomic.patch | 59 ++ target/linux/ath79/tiny/target.mk | 2 + 42 files changed, 3854 insertions(+), 1 deletion(-) create mode 100644 target/linux/ath79/config-5.10 create mode 100644 target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch create mode 100644 target/linux/ath79/patches-5.10/0004-phy-add-ath79-usb-phys.patch create mode 100644 target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch create mode 100644 target/linux/ath79/patches-5.10/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch create mode 100644 target/linux/ath79/patches-5.10/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch create mode 100644 target/linux/ath79/patches-5.10/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch create mode 100644 target/linux/ath79/patches-5.10/0018-MIPS-pci-ar71xx-convert-to-OF.patch create mode 100644 target/linux/ath79/patches-5.10/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch create mode 100644 target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch create mode 100644 target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch create mode 100644 target/linux/ath79/patches-5.10/0033-spi-ath79-drop-pdata-support.patch create mode 100644 target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch create mode 100644 target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch create mode 100644 target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch create mode 100644 target/linux/ath79/patches-5.10/0037-missing-registers.patch create mode 100644 target/linux/ath79/patches-5.10/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch create mode 100644 target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch create mode 100644 target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch create mode 100644 target/linux/ath79/patches-5.10/0050-spi-ath79-remove-spi-master-setup-and-cleanup-assign.patch create mode 100644 target/linux/ath79/patches-5.10/0051-spi-ath79-always-call-chipselect-function.patch create mode 100644 target/linux/ath79/patches-5.10/0052-mtd-spi-nor-add-block-protection-flags-to-macronix.patch create mode 100644 target/linux/ath79/patches-5.10/0053-mtd-spi-nor-use-4-bit-BP-for-large-Macronix-flash.patch create mode 100644 target/linux/ath79/patches-5.10/0054-spi-always-write-cs.patch create mode 100644 target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch create mode 100644 target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch create mode 100644 target/linux/ath79/patches-5.10/408-mtd-redboot_partition_scan.patch create mode 100644 target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch create mode 100644 target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch create mode 100644 target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch create mode 100644 target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch create mode 100644 target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch create mode 100644 target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch create mode 100644 target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch create mode 100644 target/linux/ath79/patches-5.10/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch create mode 100644 target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch create mode 100644 target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch create mode 100644 target/linux/ath79/patches-5.10/930-ar8216-make-reg-access-atomic.patch diff --git a/target/linux/ath79/Makefile b/target/linux/ath79/Makefile index 2a9857bfb1..288f0f5cd5 100644 --- a/target/linux/ath79/Makefile +++ b/target/linux/ath79/Makefile @@ -9,7 +9,6 @@ SUBTARGETS:=generic mikrotik nand tiny FEATURES:=ramdisk squashfs usbgadget KERNEL_PATCHVER:=5.4 -KERNEL_TESTING_PATCHVER:=5.4 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ath79/config-5.10 b/target/linux/ath79/config-5.10 new file mode 100644 index 0000000000..4ea93d0837 --- /dev/null +++ b/target/linux/ath79/config-5.10 @@ -0,0 +1,199 @@ +CONFIG_AG71XX=y +# CONFIG_AG71XX_DEBUG is not set +CONFIG_AG71XX_DEBUG_FS=y +CONFIG_AR8216_PHY=y +CONFIG_AR8216_PHY_LEDS=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ATH79=y +CONFIG_ATH79_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_BOSTON is not set +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +# CONFIG_CRYPTO_CHACHA_MIPS is not set +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +# CONFIG_CRYPTO_POLY1305_MIPS is not set +CONFIG_CRYPTO_RNG2=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_FIXED_PHY=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_74X164=y +CONFIG_GPIO_ATH79=y +CONFIG_GPIO_GENERIC=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ=250 +CONFIG_HZ_250=y +CONFIG_HZ_PERIODIC=y +CONFIG_IMAGE_CMDLINE_HACK=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_KERNEL_ZSTD is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_RESET is not set +CONFIG_LIBFDT=y +CONFIG_LLD_VERSION=0 +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_GPIO=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CBPF_JIT=y +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +# CONFIG_MIPS_ELF_APPENDED_DTB is not set +# CONFIG_MIPS_GENERIC_KERNEL is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +CONFIG_MTD_PARSER_CYBERTAN=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_ELF_FW=y +CONFIG_MTD_SPLIT_LZMA_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_SPLIT_WRGG_FW=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_PCI=y +CONFIG_PCI_AR71XX=y +CONFIG_PCI_AR724X=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +# CONFIG_PHY_AR7100_USB is not set +# CONFIG_PHY_AR7200_USB is not set +# CONFIG_PHY_ATH79_USB is not set +CONFIG_PINCTRL=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_ATH79=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +CONFIG_SERIAL_AR933X=y +CONFIG_SERIAL_AR933X_CONSOLE=y +CONFIG_SERIAL_AR933X_NR_UARTS=2 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SPI=y +CONFIG_SPI_AR934X=y +CONFIG_SPI_ATH79=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_RB4XX is not set +CONFIG_SRCU=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y diff --git a/target/linux/ath79/generic/target.mk b/target/linux/ath79/generic/target.mk index 4e53c89260..2ecaab3f36 100644 --- a/target/linux/ath79/generic/target.mk +++ b/target/linux/ath79/generic/target.mk @@ -2,6 +2,8 @@ BOARDNAME:=Generic DEFAULT_PACKAGES += wpad-basic-wolfssl +KERNEL_TESTING_PATCHVER:=5.10 + define Target/Description Build firmware images for generic Atheros AR71xx/AR913x/AR934x based boards. endef diff --git a/target/linux/ath79/nand/target.mk b/target/linux/ath79/nand/target.mk index 7ea9b57f45..ed3c381093 100644 --- a/target/linux/ath79/nand/target.mk +++ b/target/linux/ath79/nand/target.mk @@ -4,6 +4,8 @@ FEATURES += nand DEFAULT_PACKAGES += wpad-basic-wolfssl +KERNEL_TESTING_PATCHVER:=5.10 + define Target/Description Firmware for boards using Qualcomm Atheros, MIPS-based SoCs in the ar72xx and subsequent series, with support for NAND flash diff --git a/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch new file mode 100644 index 0000000000..a023d4c644 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch @@ -0,0 +1,186 @@ +From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:03:03 +0100 +Subject: [PATCH 03/27] leds: add reset-controller based driver + +Signed-off-by: John Crispin +--- + drivers/leds/Kconfig | 11 ++++ + drivers/leds/Makefile | 1 + + drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 149 insertions(+) + create mode 100644 drivers/leds/leds-reset.c + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -928,6 +928,17 @@ config LEDS_ACER_A500 + This option enables support for the Power Button LED of + Acer Iconia Tab A500. + ++config LEDS_RESET ++ tristate "LED support for reset-controller API" ++ depends on LEDS_CLASS ++ depends on RESET_CONTROLLER ++ help ++ This option enables support for LEDs connected to pins driven by reset ++ controllers. Yes, DNI actual built HW like that. ++ ++ To compile this driver as a module, choose M here: the module ++ will be called leds-reset. ++ + comment "LED Triggers" + source "drivers/leds/trigger/Kconfig" + +--- /dev/null ++++ b/drivers/leds/leds-reset.c +@@ -0,0 +1,140 @@ ++/* ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct reset_led_data { ++ struct led_classdev cdev; ++ struct reset_control *rst; ++}; ++ ++static inline struct reset_led_data * ++ cdev_to_reset_led_data(struct led_classdev *led_cdev) ++{ ++ return container_of(led_cdev, struct reset_led_data, cdev); ++} ++ ++static void reset_led_set(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev); ++ ++ if (value == LED_OFF) ++ reset_control_assert(led_dat->rst); ++ else ++ reset_control_deassert(led_dat->rst); ++} ++ ++struct reset_leds_priv { ++ int num_leds; ++ struct reset_led_data leds[]; ++}; ++ ++static inline int sizeof_reset_leds_priv(int num_leds) ++{ ++ return sizeof(struct reset_leds_priv) + ++ (sizeof(struct reset_led_data) * num_leds); ++} ++ ++static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct fwnode_handle *child; ++ struct reset_leds_priv *priv; ++ int count, ret; ++ ++ count = device_get_child_node_count(dev); ++ if (!count) ++ return ERR_PTR(-ENODEV); ++ ++ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL); ++ if (!priv) ++ return ERR_PTR(-ENOMEM); ++ ++ device_for_each_child_node(dev, child) { ++ struct reset_led_data *led = &priv->leds[priv->num_leds]; ++ struct device_node *np = to_of_node(child); ++ ++ ret = fwnode_property_read_string(child, "label", &led->cdev.name); ++ if (!led->cdev.name) { ++ fwnode_handle_put(child); ++ return ERR_PTR(-EINVAL); ++ } ++ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0, true); ++ if (IS_ERR(led->rst)) ++ return ERR_PTR(-EINVAL); ++ ++ fwnode_property_read_string(child, "linux,default-trigger", ++ &led->cdev.default_trigger); ++ ++ led->cdev.brightness_set = reset_led_set; ++ ret = devm_led_classdev_register(&pdev->dev, &led->cdev); ++ if (ret < 0) ++ return ERR_PTR(ret); ++ led->cdev.dev->of_node = np; ++ priv->num_leds++; ++ } ++ ++ return priv; ++} ++ ++static const struct of_device_id of_reset_leds_match[] = { ++ { .compatible = "reset-leds", }, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, of_reset_leds_match); ++ ++static int reset_led_probe(struct platform_device *pdev) ++{ ++ struct reset_leds_priv *priv; ++ ++ priv = reset_leds_create(pdev); ++ if (IS_ERR(priv)) ++ return PTR_ERR(priv); ++ ++ platform_set_drvdata(pdev, priv); ++ ++ return 0; ++} ++ ++static void reset_led_shutdown(struct platform_device *pdev) ++{ ++ struct reset_leds_priv *priv = platform_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < priv->num_leds; i++) { ++ struct reset_led_data *led = &priv->leds[i]; ++ ++ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN)) ++ reset_led_set(&led->cdev, LED_OFF); ++ } ++} ++ ++static struct platform_driver reset_led_driver = { ++ .probe = reset_led_probe, ++ .shutdown = reset_led_shutdown, ++ .driver = { ++ .name = "leds-reset", ++ .of_match_table = of_reset_leds_match, ++ }, ++}; ++ ++module_platform_driver(reset_led_driver); ++ ++MODULE_AUTHOR("John Crispin "); ++MODULE_DESCRIPTION("reset controller LED driver"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:leds-reset"); +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -93,6 +93,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds + obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o + obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o + obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o ++obj-$(CONFIG_LEDS_RESET) += leds-reset.o + + # LED SPI Drivers + obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o diff --git a/target/linux/ath79/patches-5.10/0004-phy-add-ath79-usb-phys.patch b/target/linux/ath79/patches-5.10/0004-phy-add-ath79-usb-phys.patch new file mode 100644 index 0000000000..e319f738a5 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0004-phy-add-ath79-usb-phys.patch @@ -0,0 +1,333 @@ +From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:04:05 +0100 +Subject: [PATCH 04/27] phy: add ath79 usb phys + +Signed-off-by: John Crispin +--- + drivers/phy/Kconfig | 16 ++++++ + drivers/phy/Makefile | 2 + + drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++ + drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++ + 4 files changed, 250 insertions(+) + create mode 100644 drivers/phy/phy-ar7100-usb.c + create mode 100644 drivers/phy/phy-ar7200-usb.c + +--- a/drivers/phy/Kconfig ++++ b/drivers/phy/Kconfig +@@ -24,6 +24,22 @@ config GENERIC_PHY_MIPI_DPHY + Provides a number of helpers a core functions for MIPI D-PHY + drivers to us. + ++config PHY_AR7100_USB ++ tristate "Atheros AR7100 USB PHY driver" ++ depends on ATH79 || COMPILE_TEST ++ default y if USB_EHCI_HCD_PLATFORM ++ select PHY_SIMPLE ++ help ++ Enable this to support the USB PHY on Atheros AR7100 SoCs. ++ ++config PHY_AR7200_USB ++ tristate "Atheros AR7200 USB PHY driver" ++ depends on ATH79 || COMPILE_TEST ++ default y if USB_EHCI_HCD_PLATFORM ++ select PHY_SIMPLE ++ help ++ Enable this to support the USB PHY on Atheros AR7200 SoCs. ++ + config PHY_LPC18XX_USB_OTG + tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" + depends on OF && (ARCH_LPC18XX || COMPILE_TEST) +--- a/drivers/phy/Makefile ++++ b/drivers/phy/Makefile +@@ -4,6 +4,8 @@ + # + + obj-$(CONFIG_GENERIC_PHY) += phy-core.o ++obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o ++obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o + obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o + obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o + obj-$(CONFIG_PHY_XGENE) += phy-xgene.o +--- /dev/null ++++ b/drivers/phy/phy-ar7100-usb.c +@@ -0,0 +1,140 @@ ++/* ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct ar7100_usb_phy { ++ struct reset_control *rst_phy; ++ struct reset_control *rst_host; ++ struct reset_control *rst_ohci_dll; ++ void __iomem *io_base; ++ struct phy *phy; ++ int gpio; ++}; ++ ++static int ar7100_usb_phy_power_off(struct phy *phy) ++{ ++ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ err |= reset_control_assert(priv->rst_host); ++ err |= reset_control_assert(priv->rst_phy); ++ err |= reset_control_assert(priv->rst_ohci_dll); ++ ++ return err; ++} ++ ++static int ar7100_usb_phy_power_on(struct phy *phy) ++{ ++ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ err |= ar7100_usb_phy_power_off(phy); ++ mdelay(100); ++ err |= reset_control_deassert(priv->rst_ohci_dll); ++ err |= reset_control_deassert(priv->rst_phy); ++ err |= reset_control_deassert(priv->rst_host); ++ mdelay(500); ++ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG); ++ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ); ++ ++ return err; ++} ++ ++static const struct phy_ops ar7100_usb_phy_ops = { ++ .power_on = ar7100_usb_phy_power_on, ++ .power_off = ar7100_usb_phy_power_off, ++ .owner = THIS_MODULE, ++}; ++ ++static int ar7100_usb_phy_probe(struct platform_device *pdev) ++{ ++ struct phy_provider *phy_provider; ++ struct resource *res; ++ struct ar7100_usb_phy *priv; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ priv->io_base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->io_base)) ++ return PTR_ERR(priv->io_base); ++ ++ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); ++ if (IS_ERR(priv->rst_phy)) { ++ dev_err(&pdev->dev, "phy reset is missing\n"); ++ return PTR_ERR(priv->rst_phy); ++ } ++ ++ priv->rst_host = devm_reset_control_get(&pdev->dev, "usb-host"); ++ if (IS_ERR(priv->rst_host)) { ++ dev_err(&pdev->dev, "host reset is missing\n"); ++ return PTR_ERR(priv->rst_host); ++ } ++ ++ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll"); ++ if (IS_ERR(priv->rst_ohci_dll)) { ++ dev_err(&pdev->dev, "ohci-dll reset is missing\n"); ++ return PTR_ERR(priv->rst_host); ++ } ++ ++ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops); ++ if (IS_ERR(priv->phy)) { ++ dev_err(&pdev->dev, "failed to create PHY\n"); ++ return PTR_ERR(priv->phy); ++ } ++ ++ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); ++ if (priv->gpio >= 0) { ++ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request gpio\n"); ++ return ret; ++ } ++ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); ++ gpio_set_value(priv->gpio, 1); ++ } ++ ++ phy_set_drvdata(priv->phy, priv); ++ ++ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); ++ ++ ++ return PTR_ERR_OR_ZERO(phy_provider); ++} ++ ++static const struct of_device_id ar7100_usb_phy_of_match[] = { ++ { .compatible = "qca,ar7100-usb-phy" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match); ++ ++static struct platform_driver ar7100_usb_phy_driver = { ++ .probe = ar7100_usb_phy_probe, ++ .driver = { ++ .of_match_table = ar7100_usb_phy_of_match, ++ .name = "ar7100-usb-phy", ++ } ++}; ++module_platform_driver(ar7100_usb_phy_driver); ++ ++MODULE_DESCRIPTION("ATH79 USB PHY driver"); ++MODULE_AUTHOR("Alban Bedel "); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/drivers/phy/phy-ar7200-usb.c +@@ -0,0 +1,136 @@ ++/* ++ * Copyright (C) 2015 Alban Bedel ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++struct ar7200_usb_phy { ++ struct reset_control *rst_phy; ++ struct reset_control *rst_phy_analog; ++ struct reset_control *suspend_override; ++ struct phy *phy; ++ int gpio; ++}; ++ ++static int ar7200_usb_phy_power_on(struct phy *phy) ++{ ++ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ if (priv->suspend_override) ++ err = reset_control_assert(priv->suspend_override); ++ if (priv->rst_phy) ++ err |= reset_control_deassert(priv->rst_phy); ++ if (priv->rst_phy_analog) ++ err |= reset_control_deassert(priv->rst_phy_analog); ++ ++ return err; ++} ++ ++static int ar7200_usb_phy_power_off(struct phy *phy) ++{ ++ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ if (priv->suspend_override) ++ err = reset_control_deassert(priv->suspend_override); ++ if (priv->rst_phy) ++ err |= reset_control_assert(priv->rst_phy); ++ if (priv->rst_phy_analog) ++ err |= reset_control_assert(priv->rst_phy_analog); ++ ++ return err; ++} ++ ++static const struct phy_ops ar7200_usb_phy_ops = { ++ .power_on = ar7200_usb_phy_power_on, ++ .power_off = ar7200_usb_phy_power_off, ++ .owner = THIS_MODULE, ++}; ++ ++static int ar7200_usb_phy_probe(struct platform_device *pdev) ++{ ++ struct phy_provider *phy_provider; ++ struct ar7200_usb_phy *priv; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); ++ if (IS_ERR(priv->rst_phy)) { ++ if (PTR_ERR(priv->rst_phy) != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "phy reset is missing\n"); ++ return PTR_ERR(priv->rst_phy); ++ } ++ ++ priv->rst_phy_analog = devm_reset_control_get_optional( ++ &pdev->dev, "usb-phy-analog"); ++ if (IS_ERR(priv->rst_phy_analog)) { ++ if (PTR_ERR(priv->rst_phy_analog) == -ENOENT) ++ priv->rst_phy_analog = NULL; ++ else ++ return PTR_ERR(priv->rst_phy_analog); ++ } ++ ++ priv->suspend_override = devm_reset_control_get_optional( ++ &pdev->dev, "usb-suspend-override"); ++ if (IS_ERR(priv->suspend_override)) { ++ if (PTR_ERR(priv->suspend_override) == -ENOENT) ++ priv->suspend_override = NULL; ++ else ++ return PTR_ERR(priv->suspend_override); ++ } ++ ++ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops); ++ if (IS_ERR(priv->phy)) { ++ dev_err(&pdev->dev, "failed to create PHY\n"); ++ return PTR_ERR(priv->phy); ++ } ++ ++ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); ++ if (priv->gpio >= 0) { ++ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request gpio\n"); ++ return ret; ++ } ++ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); ++ gpio_set_value(priv->gpio, 1); ++ } ++ ++ phy_set_drvdata(priv->phy, priv); ++ ++ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); ++ ++ return PTR_ERR_OR_ZERO(phy_provider); ++} ++ ++static const struct of_device_id ar7200_usb_phy_of_match[] = { ++ { .compatible = "qca,ar7200-usb-phy" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match); ++ ++static struct platform_driver ar7200_usb_phy_driver = { ++ .probe = ar7200_usb_phy_probe, ++ .driver = { ++ .of_match_table = ar7200_usb_phy_of_match, ++ .name = "ar7200-usb-phy", ++ } ++}; ++module_platform_driver(ar7200_usb_phy_driver); ++ ++MODULE_DESCRIPTION("ATH79 USB PHY driver"); ++MODULE_AUTHOR("Alban Bedel "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch new file mode 100644 index 0000000000..3c8740311d --- /dev/null +++ b/target/linux/ath79/patches-5.10/0005-usb-add-more-OF-quirk-properties.patch @@ -0,0 +1,24 @@ +From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:01:43 +0100 +Subject: [PATCH 05/27] usb: add more OF/quirk properties + +Signed-off-by: John Crispin +--- + drivers/usb/host/ehci-platform.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/usb/host/ehci-platform.c ++++ b/drivers/usb/host/ehci-platform.c +@@ -269,6 +269,11 @@ static int ehci_platform_probe(struct pl + ehci = hcd_to_ehci(hcd); + + if (pdata == &ehci_platform_defaults && dev->dev.of_node) { ++ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset); ++ ++ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug")) ++ pdata->has_synopsys_hc_bug = 1; ++ + if (of_property_read_bool(dev->dev.of_node, "big-endian-regs")) + ehci->big_endian_mmio = 1; + diff --git a/target/linux/ath79/patches-5.10/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch b/target/linux/ath79/patches-5.10/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch new file mode 100644 index 0000000000..ceda511c21 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch @@ -0,0 +1,168 @@ +From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 09:55:13 +0100 +Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for + QCA9556 SoCs + +Signed-off-by: John Crispin +--- + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++ + 2 files changed, 143 insertions(+) + create mode 100644 drivers/irqchip/irq-ath79-intc.c + +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -4,6 +4,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o + obj-$(CONFIG_AL_FIC) += irq-al-fic.o + obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o + obj-$(CONFIG_ATH79) += irq-ath79-cpu.o ++obj-$(CONFIG_ATH79) += irq-ath79-intc.o + obj-$(CONFIG_ATH79) += irq-ath79-misc.o + obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o + obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o +--- /dev/null ++++ b/drivers/irqchip/irq-ath79-intc.c +@@ -0,0 +1,142 @@ ++/* ++ * Atheros AR71xx/AR724x/AR913x specific interrupt handling ++ * ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#define ATH79_MAX_INTC_CASCADE 3 ++ ++struct ath79_intc { ++ struct irq_chip chip; ++ u32 irq; ++ u32 pending_mask; ++ u32 int_status; ++ u32 irq_mask[ATH79_MAX_INTC_CASCADE]; ++ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE]; ++}; ++ ++static void ath79_intc_irq_handler(struct irq_desc *desc) ++{ ++ struct irq_domain *domain = irq_desc_get_handler_data(desc); ++ struct ath79_intc *intc = domain->host_data; ++ u32 pending; ++ ++ pending = ath79_reset_rr(intc->int_status); ++ pending &= intc->pending_mask; ++ ++ if (pending) { ++ int i; ++ ++ for (i = 0; i < domain->hwirq_max; i++) ++ if (pending & intc->irq_mask[i]) { ++ if (intc->irq_wb_chan[i] != 0xffffffff) ++ ath79_ddr_wb_flush(intc->irq_wb_chan[i]); ++ generic_handle_irq(irq_find_mapping(domain, i)); ++ } ++ } else { ++ spurious_interrupt(); ++ } ++} ++ ++static void ath79_intc_irq_enable(struct irq_data *d) ++{ ++ struct ath79_intc *intc = d->domain->host_data; ++ enable_irq(intc->irq); ++} ++ ++static void ath79_intc_irq_disable(struct irq_data *d) ++{ ++ struct ath79_intc *intc = d->domain->host_data; ++ disable_irq(intc->irq); ++} ++ ++static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ath79_intc *intc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ath79_irq_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ath79_intc_map, ++}; ++ ++static int __init ath79_intc_of_init( ++ struct device_node *node, struct device_node *parent) ++{ ++ struct irq_domain *domain; ++ struct ath79_intc *intc; ++ int cnt, cntwb, i, err; ++ ++ cnt = of_property_count_u32_elems(node, "qca,pending-bits"); ++ if (cnt > ATH79_MAX_INTC_CASCADE) ++ panic("Too many INTC pending bits\n"); ++ ++ intc = kzalloc(sizeof(*intc), GFP_KERNEL); ++ if (!intc) ++ panic("Failed to allocate INTC memory\n"); ++ intc->chip = dummy_irq_chip; ++ intc->chip.name = "INTC"; ++ intc->chip.irq_disable = ath79_intc_irq_disable; ++ intc->chip.irq_enable = ath79_intc_irq_enable; ++ ++ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) { ++ panic("Missing address of interrupt status register\n"); ++ } ++ ++ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt); ++ for (i = 0; i < cnt; i++) { ++ intc->pending_mask |= intc->irq_mask[i]; ++ intc->irq_wb_chan[i] = 0xffffffff; ++ } ++ ++ cntwb = of_count_phandle_with_args( ++ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); ++ ++ for (i = 0; i < cntwb; i++) { ++ struct of_phandle_args args; ++ u32 irq = i; ++ ++ of_property_read_u32_index( ++ node, "qca,ddr-wb-channel-interrupts", i, &irq); ++ if (irq >= ATH79_MAX_INTC_CASCADE) ++ continue; ++ ++ err = of_parse_phandle_with_args( ++ node, "qca,ddr-wb-channels", ++ "#qca,ddr-wb-channel-cells", ++ i, &args); ++ if (err) ++ return err; ++ ++ intc->irq_wb_chan[irq] = args.args[0]; ++ } ++ ++ intc->irq = irq_of_parse_and_map(node, 0); ++ if (!intc->irq) ++ panic("Failed to get INTC IRQ"); ++ ++ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc); ++ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain); ++ ++ return 0; ++} ++IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc", ++ ath79_intc_of_init); diff --git a/target/linux/ath79/patches-5.10/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch b/target/linux/ath79/patches-5.10/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch new file mode 100644 index 0000000000..13117d9a8e --- /dev/null +++ b/target/linux/ath79/patches-5.10/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch @@ -0,0 +1,23 @@ +From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 09:58:19 +0100 +Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper + +Signed-off-by: John Crispin +--- + drivers/irqchip/irq-ath79-cpu.c | 7 ------- + 1 file changed, 7 deletions(-) + +--- a/drivers/irqchip/irq-ath79-cpu.c ++++ b/drivers/irqchip/irq-ath79-cpu.c +@@ -85,10 +85,3 @@ static int __init ar79_cpu_intc_of_init( + } + IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc", + ar79_cpu_intc_of_init); +- +-void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3) +-{ +- irq_wb_chan[2] = irq_wb_chan2; +- irq_wb_chan[3] = irq_wb_chan3; +- mips_cpu_irq_init(); +-} diff --git a/target/linux/ath79/patches-5.10/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/target/linux/ath79/patches-5.10/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch new file mode 100644 index 0000000000..bf7eb691a5 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch @@ -0,0 +1,57 @@ +From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:10 +0200 +Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc + +With the driver being converted from platform_data to pure OF, we need to +also add some docs. + +Cc: Rob Herring +Cc: devicetree@vger.kernel.org +Signed-off-by: John Crispin +--- + .../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt +@@ -0,0 +1,38 @@ ++* Qualcomm Atheros AR7100 PCI express root complex ++ ++Required properties: ++- compatible: should contain "qcom,ar7100-pci" to identify the core. ++- reg: Should contain the register ranges as listed in the reg-names property. ++- reg-names: Definition: Must include the following entries ++ - "cfg_base" IO Memory ++- #address-cells: set to <3> ++- #size-cells: set to <2> ++- ranges: ranges for the PCI memory and I/O regions ++- interrupt-map-mask and interrupt-map: standard PCI ++ properties to define the mapping of the PCIe interface to interrupt ++ numbers. ++- #interrupt-cells: set to <1> ++- interrupt-controller: define to enable the builtin IRQ cascade. ++ ++Optional properties: ++- interrupt-parent: phandle to the MIPS IRQ controller ++ ++* Example for ar7100 ++ pcie-controller@180c0000 { ++ compatible = "qca,ar7100-pci"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x0>; ++ reg = <0x17010000 0x100>; ++ reg-names = "cfg_base"; ++ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 ++ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; ++ interrupt-parent = <&cpuintc>; ++ interrupts = <2>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-map-mask = <0 0 0 1>; ++ interrupt-map = <0 0 0 0 &pcie0 0>; ++ }; diff --git a/target/linux/ath79/patches-5.10/0018-MIPS-pci-ar71xx-convert-to-OF.patch b/target/linux/ath79/patches-5.10/0018-MIPS-pci-ar71xx-convert-to-OF.patch new file mode 100644 index 0000000000..e600a4f0d9 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0018-MIPS-pci-ar71xx-convert-to-OF.patch @@ -0,0 +1,202 @@ +From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:07:23 +0200 +Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF + +With the ath79 target getting converted to pure OF, we can drop all the +platform data code and add the missing OF bits to the driver. We also add +a irq domain for the PCI/e controllers cascade, thus making it usable from +dts files. + +Signed-off-by: John Crispin +--- + arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++----------------------- + 1 file changed, 41 insertions(+), 41 deletions(-) + +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -15,8 +15,11 @@ + #include + #include + #include ++#include + #include + #include ++#include ++#include + + #include + #include +@@ -46,12 +49,13 @@ + #define AR71XX_PCI_IRQ_COUNT 5 + + struct ar71xx_pci_controller { ++ struct device_node *np; + void __iomem *cfg_base; + int irq; +- int irq_base; + struct pci_controller pci_ctrl; + struct resource io_res; + struct resource mem_res; ++ struct irq_domain *domain; + }; + + /* Byte lane enable bits */ +@@ -225,29 +229,30 @@ static struct pci_ops ar71xx_pci_ops = { + + static void ar71xx_pci_irq_handler(struct irq_desc *desc) + { +- struct ar71xx_pci_controller *apc; + void __iomem *base = ath79_reset_base; ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); + u32 pending; + +- apc = irq_desc_get_handler_data(desc); +- ++ chained_irq_enter(chip, desc); + pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & + __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + + if (pending & AR71XX_PCI_INT_DEV0) +- generic_handle_irq(apc->irq_base + 0); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); + + else if (pending & AR71XX_PCI_INT_DEV1) +- generic_handle_irq(apc->irq_base + 1); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 2)); + + else if (pending & AR71XX_PCI_INT_DEV2) +- generic_handle_irq(apc->irq_base + 2); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 3)); + + else if (pending & AR71XX_PCI_INT_CORE) +- generic_handle_irq(apc->irq_base + 4); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 4)); + + else + spurious_interrupt(); ++ chained_irq_exit(chip, desc); + } + + static void ar71xx_pci_irq_unmask(struct irq_data *d) +@@ -258,7 +263,7 @@ static void ar71xx_pci_irq_unmask(struct + u32 t; + + apc = irq_data_get_irq_chip_data(d); +- irq = d->irq - apc->irq_base; ++ irq = irq_linear_revmap(apc->domain, d->irq); + + t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +@@ -275,7 +280,7 @@ static void ar71xx_pci_irq_mask(struct i + u32 t; + + apc = irq_data_get_irq_chip_data(d); +- irq = d->irq - apc->irq_base; ++ irq = irq_linear_revmap(apc->domain, d->irq); + + t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +@@ -291,24 +296,31 @@ static struct irq_chip ar71xx_pci_irq_ch + .irq_mask_ack = ar71xx_pci_irq_mask, + }; + ++static int ar71xx_pci_irq_map(struct irq_domain *d, ++ unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ar71xx_pci_controller *apc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); ++ irq_set_chip_data(irq, apc); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ar71xx_pci_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ar71xx_pci_irq_map, ++}; ++ + static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) + { + void __iomem *base = ath79_reset_base; +- int i; + + __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); + +- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT); +- +- apc->irq_base = ATH79_PCI_IRQ_BASE; +- for (i = apc->irq_base; +- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) { +- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, +- handle_level_irq); +- irq_set_chip_data(i, apc); +- } +- ++ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, ++ &ar71xx_pci_domain_ops, apc); + irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, + apc); + } +@@ -325,6 +337,11 @@ static void ar71xx_pci_reset(void) + mdelay(100); + } + ++static const struct of_device_id ar71xx_pci_ids[] = { ++ { .compatible = "qca,ar7100-pci" }, ++ {}, ++}; ++ + static int ar71xx_pci_probe(struct platform_device *pdev) + { + struct ar71xx_pci_controller *apc; +@@ -345,26 +362,6 @@ static int ar71xx_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + +- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); +- if (!res) +- return -EINVAL; +- +- apc->io_res.parent = res; +- apc->io_res.name = "PCI IO space"; +- apc->io_res.start = res->start; +- apc->io_res.end = res->end; +- apc->io_res.flags = IORESOURCE_IO; +- +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); +- if (!res) +- return -EINVAL; +- +- apc->mem_res.parent = res; +- apc->mem_res.name = "PCI memory space"; +- apc->mem_res.start = res->start; +- apc->mem_res.end = res->end; +- apc->mem_res.flags = IORESOURCE_MEM; +- + ar71xx_pci_reset(); + + /* setup COMMAND register */ +@@ -377,9 +374,11 @@ static int ar71xx_pci_probe(struct platf + + ar71xx_pci_irq_init(apc); + ++ apc->np = pdev->dev.of_node; + apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; + apc->pci_ctrl.mem_resource = &apc->mem_res; + apc->pci_ctrl.io_resource = &apc->io_res; ++ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node); + + register_pci_controller(&apc->pci_ctrl); + +@@ -390,6 +389,7 @@ static struct platform_driver ar71xx_pci + .probe = ar71xx_pci_probe, + .driver = { + .name = "ar71xx-pci", ++ .of_match_table = of_match_ptr(ar71xx_pci_ids), + }, + }; + diff --git a/target/linux/ath79/patches-5.10/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch b/target/linux/ath79/patches-5.10/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch new file mode 100644 index 0000000000..a0af79cb4d --- /dev/null +++ b/target/linux/ath79/patches-5.10/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch @@ -0,0 +1,61 @@ +From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:02 +0200 +Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc + +With the driver being converted from platform_data to pure OF, we need to +also add some docs. + +Cc: Rob Herring +Cc: devicetree@vger.kernel.org +Signed-off-by: John Crispin +--- + .../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++ + 1 file changed, 42 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt +@@ -0,0 +1,42 @@ ++* Qualcomm Atheros AR724X PCI express root complex ++ ++Required properties: ++- compatible: should contain "qcom,ar7240-pci" to identify the core. ++- reg: Should contain the register ranges as listed in the reg-names property. ++- reg-names: Definition: Must include the following entries ++ - "crp_base" Configuration registers ++ - "ctrl_base" Control registers ++ - "cfg_base" IO Memory ++- #address-cells: set to <3> ++- #size-cells: set to <2> ++- ranges: ranges for the PCI memory and I/O regions ++- interrupt-map-mask and interrupt-map: standard PCI ++ properties to define the mapping of the PCIe interface to interrupt ++ numbers. ++- #interrupt-cells: set to <1> ++- interrupt-parent: phandle to the MIPS IRQ controller ++ ++Optional properties: ++- interrupt-controller: define to enable the builtin IRQ cascade. ++ ++* Example for qca9557 ++ pcie-controller@180c0000 { ++ compatible = "qcom,ar7240-pci"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x0>; ++ reg = <0x180c0000 0x1000>, ++ <0x180f0000 0x100>, ++ <0x14000000 0x1000>; ++ reg-names = "crp_base", "ctrl_base", "cfg_base"; ++ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 ++ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; ++ interrupt-parent = <&intc2>; ++ interrupts = <1>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-map-mask = <0 0 0 1>; ++ interrupt-map = <0 0 0 0 &pcie0 0>; ++ }; diff --git a/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch b/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch new file mode 100644 index 0000000000..b8a877c63d --- /dev/null +++ b/target/linux/ath79/patches-5.10/0020-MIPS-pci-ar724x-convert-to-OF.patch @@ -0,0 +1,205 @@ +From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:07:37 +0200 +Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF + +With the ath79 target getting converted to pure OF, we can drop all the +platform data code and add the missing OF bits to the driver. We also add +a irq domain for the PCI/e controllers cascade, thus making it usable from +dts files. + +Signed-off-by: John Crispin +--- + arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------ + 1 file changed, 42 insertions(+), 46 deletions(-) + +--- a/arch/mips/pci/pci-ar724x.c ++++ b/arch/mips/pci/pci-ar724x.c +@@ -11,8 +11,11 @@ + #include + #include + #include ++#include + #include + #include ++#include ++#include + + #define AR724X_PCI_REG_APP 0x00 + #define AR724X_PCI_REG_RESET 0x18 +@@ -42,17 +45,20 @@ struct ar724x_pci_controller { + void __iomem *crp_base; + + int irq; +- int irq_base; + + bool link_up; + bool bar0_is_cached; + u32 bar0_value; + ++ struct device_node *np; + struct pci_controller pci_controller; ++ struct irq_domain *domain; + struct resource io_res; + struct resource mem_res; + }; + ++static struct irq_chip ar724x_pci_irq_chip; ++ + static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) + { + u32 reset; +@@ -228,35 +234,31 @@ static struct pci_ops ar724x_pci_ops = { + + static void ar724x_pci_irq_handler(struct irq_desc *desc) + { +- struct ar724x_pci_controller *apc; +- void __iomem *base; ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc); + u32 pending; + +- apc = irq_desc_get_handler_data(desc); +- base = apc->ctrl_base; +- +- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & +- __raw_readl(base + AR724X_PCI_REG_INT_MASK); ++ chained_irq_enter(chip, desc); ++ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) & ++ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK); + + if (pending & AR724X_PCI_INT_DEV0) +- generic_handle_irq(apc->irq_base + 0); +- ++ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); + else + spurious_interrupt(); ++ chained_irq_exit(chip, desc); + } + + static void ar724x_pci_irq_unmask(struct irq_data *d) + { + struct ar724x_pci_controller *apc; + void __iomem *base; +- int offset; + u32 t; + + apc = irq_data_get_irq_chip_data(d); + base = apc->ctrl_base; +- offset = apc->irq_base - d->irq; + +- switch (offset) { ++ switch (irq_linear_revmap(apc->domain, d->irq)) { + case 0: + t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); + __raw_writel(t | AR724X_PCI_INT_DEV0, +@@ -270,14 +272,12 @@ static void ar724x_pci_irq_mask(struct i + { + struct ar724x_pci_controller *apc; + void __iomem *base; +- int offset; + u32 t; + + apc = irq_data_get_irq_chip_data(d); + base = apc->ctrl_base; +- offset = apc->irq_base - d->irq; + +- switch (offset) { ++ switch (irq_linear_revmap(apc->domain, d->irq)) { + case 0: + t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); + __raw_writel(t & ~AR724X_PCI_INT_DEV0, +@@ -302,26 +302,34 @@ static struct irq_chip ar724x_pci_irq_ch + .irq_mask_ack = ar724x_pci_irq_mask, + }; + ++static int ar724x_pci_irq_map(struct irq_domain *d, ++ unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ar724x_pci_controller *apc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq); ++ irq_set_chip_data(irq, apc); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ar724x_pci_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ar724x_pci_irq_map, ++}; ++ + static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc, + int id) + { + void __iomem *base; +- int i; + + base = apc->ctrl_base; + + __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); + __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); + +- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); +- +- for (i = apc->irq_base; +- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { +- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, +- handle_level_irq); +- irq_set_chip_data(i, apc); +- } +- ++ apc->domain = irq_domain_add_linear(apc->np, 2, ++ &ar724x_pci_domain_ops, apc); + irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler, + apc); + } +@@ -391,29 +399,11 @@ static int ar724x_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + +- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); +- if (!res) +- return -EINVAL; +- +- apc->io_res.parent = res; +- apc->io_res.name = "PCI IO space"; +- apc->io_res.start = res->start; +- apc->io_res.end = res->end; +- apc->io_res.flags = IORESOURCE_IO; +- +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); +- if (!res) +- return -EINVAL; +- +- apc->mem_res.parent = res; +- apc->mem_res.name = "PCI memory space"; +- apc->mem_res.start = res->start; +- apc->mem_res.end = res->end; +- apc->mem_res.flags = IORESOURCE_MEM; +- ++ apc->np = pdev->dev.of_node; + apc->pci_controller.pci_ops = &ar724x_pci_ops; + apc->pci_controller.io_resource = &apc->io_res; + apc->pci_controller.mem_resource = &apc->mem_res; ++ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node); + + /* + * Do the full PCIE Root Complex Initialization Sequence if the PCIe +@@ -435,10 +425,16 @@ static int ar724x_pci_probe(struct platf + return 0; + } + ++static const struct of_device_id ar724x_pci_ids[] = { ++ { .compatible = "qcom,ar7240-pci" }, ++ {}, ++}; ++ + static struct platform_driver ar724x_pci_driver = { + .probe = ar724x_pci_probe, + .driver = { + .name = "ar724x-pci", ++ .of_match_table = of_match_ptr(ar724x_pci_ids), + }, + }; + diff --git a/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch new file mode 100644 index 0000000000..14dddd5147 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch @@ -0,0 +1,93 @@ +From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:16:55 +0200 +Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols + +We no longer need to select which SoCs are supported as the whole arch +code is always built. So lets drop all the SoC symbols + +Signed-off-by: John Crispin +--- + arch/mips/Kconfig | 2 ++ + arch/mips/ath79/Kconfig | 44 +++++--------------------------------------- + arch/mips/pci/Makefile | 2 +- + 3 files changed, 8 insertions(+), 40 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -217,6 +217,8 @@ config ATH79 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART_PROM ++ select HAVE_PCI ++ select USB_ARCH_HAS_EHCI + select USE_OF + select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM + help +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -1,48 +1,14 @@ + # SPDX-License-Identifier: GPL-2.0 + if ATH79 + +-config SOC_AR71XX +- select HAVE_PCI +- def_bool n +- +-config SOC_AR724X +- select HAVE_PCI +- select PCI_AR724X if PCI +- def_bool n +- +-config SOC_AR913X +- def_bool n +- +-config SOC_AR933X +- def_bool n +- +-config SOC_AR934X +- select HAVE_PCI +- select PCI_AR724X if PCI +- def_bool n +- +-config SOC_QCA955X +- select HAVE_PCI +- select PCI_AR724X if PCI ++config PCI_AR71XX ++ bool "PCI support for AR7100 type SoCs" ++ depends on PCI + def_bool n + + config PCI_AR724X +- def_bool n +- +-config ATH79_DEV_GPIO_BUTTONS +- def_bool n +- +-config ATH79_DEV_LEDS_GPIO +- def_bool n +- +-config ATH79_DEV_SPI +- def_bool n +- +-config ATH79_DEV_USB +- def_bool n +- +-config ATH79_DEV_WMAC +- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) ++ bool "PCI support for AR724x type SoCs" ++ depends on PCI + def_bool n + + endif +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -23,7 +23,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o + ops-bcm63xx.o + obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o + obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o +-obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o ++obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o + obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o + obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-virtio-guest.o + obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xtalk-bridge.o diff --git a/target/linux/ath79/patches-5.10/0033-spi-ath79-drop-pdata-support.patch b/target/linux/ath79/patches-5.10/0033-spi-ath79-drop-pdata-support.patch new file mode 100644 index 0000000000..8fd99bd333 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0033-spi-ath79-drop-pdata-support.patch @@ -0,0 +1,71 @@ +From c4e197bbcecc7233aa9e553e7047fa50e4e1fe77 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:34 +0200 +Subject: [PATCH 33/33] spi: ath79: drop pdata support + +The target is being converted to pure OF. We can therefore drop all of the +platform data code from the driver. + +Cc: linux-spi@vger.kernel.org +Acked-by: Mark Brown +Signed-off-by: John Crispin +--- + include/linux/platform_data/spi-ath79.h | 16 ------------------- + drivers/spi/spi-ath79.c | 8 -------- + 2 files changed, 27 deletions(-) + delete mode 100644 arch/mips/include/asm/mach-ath79/ath79_spi_platform.h + +--- a/include/linux/platform_data/spi-ath79.h ++++ /dev/null +@@ -1,16 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0-only */ +-/* +- * Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- */ +- +-#ifndef _ATH79_SPI_PLATFORM_H +-#define _ATH79_SPI_PLATFORM_H +- +-struct ath79_spi_platform_data { +- unsigned bus_num; +- unsigned num_chipselect; +-}; +- +-#endif /* _ATH79_SPI_PLATFORM_H */ +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -19,7 +19,6 @@ + #include + #include + #include +-#include + + #define DRV_NAME "ath79-spi" + +@@ -138,7 +137,6 @@ static int ath79_spi_probe(struct platfo + { + struct spi_master *master; + struct ath79_spi *sp; +- struct ath79_spi_platform_data *pdata; + unsigned long rate; + int ret; + +@@ -152,16 +150,10 @@ static int ath79_spi_probe(struct platfo + master->dev.of_node = pdev->dev.of_node; + platform_set_drvdata(pdev, sp); + +- pdata = dev_get_platdata(&pdev->dev); +- + master->use_gpio_descriptors = true; + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); + master->setup = spi_bitbang_setup; + master->cleanup = spi_bitbang_cleanup; +- if (pdata) { +- master->bus_num = pdata->bus_num; +- master->num_chipselect = pdata->num_chipselect; +- } + + sp->bitbang.master = master; + sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch new file mode 100644 index 0000000000..71acc22210 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch @@ -0,0 +1,27 @@ +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq); + + enum ath79_soc_type ath79_soc; + unsigned int ath79_soc_rev; ++EXPORT_SYMBOL_GPL(ath79_soc_rev); + + void __iomem *ath79_pll_base; + void __iomem *ath79_reset_base; + EXPORT_SYMBOL_GPL(ath79_reset_base); +-static void __iomem *ath79_ddr_base; ++void __iomem *ath79_ddr_base; ++EXPORT_SYMBOL_GPL(ath79_ddr_base); + static void __iomem *ath79_ddr_wb_flush_base; + static void __iomem *ath79_ddr_pci_win_base; + +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -149,6 +149,7 @@ void ath79_ddr_wb_flush(unsigned int reg + void ath79_ddr_set_pci_windows(void); + + extern void __iomem *ath79_pll_base; ++extern void __iomem *ath79_ddr_base; + extern void __iomem *ath79_reset_base; + + static inline void ath79_pll_wr(unsigned reg, u32 val) diff --git a/target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch b/target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch new file mode 100644 index 0000000000..d4ea379159 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0036-GPIO-add-named-gpio-exports.patch @@ -0,0 +1,165 @@ +From 4267880319bc1a2270d352e0ded6d6386242a7ef Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 12 Aug 2014 20:49:27 +0200 +Subject: [PATCH 24/53] GPIO: add named gpio exports + +Signed-off-by: John Crispin +--- + drivers/gpio/gpiolib-of.c | 68 +++++++++++++++++++++++++++++++++++++++++ + drivers/gpio/gpiolib-sysfs.c | 10 +++++- + include/asm-generic/gpio.h | 6 ++++ + include/linux/gpio/consumer.h | 8 +++++ + 4 files changed, 91 insertions(+), 1 deletion(-) + +--- a/drivers/gpio/gpiolib-of.c ++++ b/drivers/gpio/gpiolib-of.c +@@ -19,6 +19,8 @@ + #include + #include + #include ++#include ++#include + + #include "gpiolib.h" + #include "gpiolib-of.h" +@@ -915,3 +917,68 @@ void of_gpiochip_remove(struct gpio_chip + { + of_node_put(chip->of_node); + } ++ ++static struct of_device_id gpio_export_ids[] = { ++ { .compatible = "gpio-export" }, ++ { /* sentinel */ } ++}; ++ ++static int of_gpio_export_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *cnp; ++ u32 val; ++ int nb = 0; ++ ++ for_each_child_of_node(np, cnp) { ++ const char *name = NULL; ++ int gpio; ++ bool dmc; ++ int max_gpio = 1; ++ int i; ++ ++ of_property_read_string(cnp, "gpio-export,name", &name); ++ ++ if (!name) ++ max_gpio = of_gpio_count(cnp); ++ ++ for (i = 0; i < max_gpio; i++) { ++ unsigned flags = 0; ++ enum of_gpio_flags of_flags; ++ ++ gpio = of_get_gpio_flags(cnp, i, &of_flags); ++ if (!gpio_is_valid(gpio)) ++ return gpio; ++ ++ if (of_flags == OF_GPIO_ACTIVE_LOW) ++ flags |= GPIOF_ACTIVE_LOW; ++ ++ if (!of_property_read_u32(cnp, "gpio-export,output", &val)) ++ flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; ++ else ++ flags |= GPIOF_IN; ++ ++ if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np))) ++ continue; ++ ++ dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change"); ++ gpio_export_with_name(gpio, dmc, name); ++ nb++; ++ } ++ } ++ ++ dev_info(&pdev->dev, "%d gpio(s) exported\n", nb); ++ ++ return 0; ++} ++ ++static struct platform_driver gpio_export_driver = { ++ .driver = { ++ .name = "gpio-export", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(gpio_export_ids), ++ }, ++ .probe = of_gpio_export_probe, ++}; ++ ++module_platform_driver(gpio_export_driver); +--- a/drivers/gpio/gpiolib-sysfs.c ++++ b/drivers/gpio/gpiolib-sysfs.c +@@ -563,7 +563,7 @@ static struct class gpio_class = { + * + * Returns zero on success, else an error. + */ +-int gpiod_export(struct gpio_desc *desc, bool direction_may_change) ++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) + { + struct gpio_chip *chip; + struct gpio_device *gdev; +@@ -625,6 +625,8 @@ int gpiod_export(struct gpio_desc *desc, + offset = gpio_chip_hwgpio(desc); + if (chip->names && chip->names[offset]) + ioname = chip->names[offset]; ++ if (name) ++ ioname = name; + + dev = device_create_with_groups(&gpio_class, &gdev->dev, + MKDEV(0, 0), data, gpio_groups, +@@ -646,6 +648,12 @@ err_unlock: + gpiod_dbg(desc, "%s: status %d\n", __func__, status); + return status; + } ++EXPORT_SYMBOL_GPL(__gpiod_export); ++ ++int gpiod_export(struct gpio_desc *desc, bool direction_may_change) ++{ ++ return __gpiod_export(desc, direction_may_change, NULL); ++} + EXPORT_SYMBOL_GPL(gpiod_export); + + static int match_export(struct device *dev, const void *desc) +--- a/include/asm-generic/gpio.h ++++ b/include/asm-generic/gpio.h +@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g + return gpiod_export(gpio_to_desc(gpio), direction_may_change); + } + ++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); ++static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name) ++{ ++ return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name); ++} ++ + static inline int gpio_export_link(struct device *dev, const char *name, + unsigned gpio) + { +--- a/include/linux/gpio/consumer.h ++++ b/include/linux/gpio/consumer.h +@@ -668,6 +668,7 @@ static inline void devm_acpi_dev_remove_ + + #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) + ++int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); + int gpiod_export(struct gpio_desc *desc, bool direction_may_change); + int gpiod_export_link(struct device *dev, const char *name, + struct gpio_desc *desc); +@@ -675,6 +676,13 @@ void gpiod_unexport(struct gpio_desc *de + + #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ + ++static inline int _gpiod_export(struct gpio_desc *desc, ++ bool direction_may_change, ++ const char *name) ++{ ++ return -ENOSYS; ++} ++ + static inline int gpiod_export(struct gpio_desc *desc, + bool direction_may_change) + { diff --git a/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch new file mode 100644 index 0000000000..80fcd0a7f5 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch @@ -0,0 +1,139 @@ +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -51,11 +51,9 @@ + struct ar71xx_pci_controller { + struct device_node *np; + void __iomem *cfg_base; +- int irq; + struct pci_controller pci_ctrl; + struct resource io_res; + struct resource mem_res; +- struct irq_domain *domain; + }; + + /* Byte lane enable bits */ +@@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = { + .write = ar71xx_pci_write_config, + }; + +-static void ar71xx_pci_irq_handler(struct irq_desc *desc) +-{ +- void __iomem *base = ath79_reset_base; +- struct irq_chip *chip = irq_desc_get_chip(desc); +- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); +- u32 pending; +- +- chained_irq_enter(chip, desc); +- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- if (pending & AR71XX_PCI_INT_DEV0) +- generic_handle_irq(irq_linear_revmap(apc->domain, 1)); +- +- else if (pending & AR71XX_PCI_INT_DEV1) +- generic_handle_irq(irq_linear_revmap(apc->domain, 2)); +- +- else if (pending & AR71XX_PCI_INT_DEV2) +- generic_handle_irq(irq_linear_revmap(apc->domain, 3)); +- +- else if (pending & AR71XX_PCI_INT_CORE) +- generic_handle_irq(irq_linear_revmap(apc->domain, 4)); +- +- else +- spurious_interrupt(); +- chained_irq_exit(chip, desc); +-} +- +-static void ar71xx_pci_irq_unmask(struct irq_data *d) +-{ +- struct ar71xx_pci_controller *apc; +- unsigned int irq; +- void __iomem *base = ath79_reset_base; +- u32 t; +- +- apc = irq_data_get_irq_chip_data(d); +- irq = irq_linear_revmap(apc->domain, d->irq); +- +- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- /* flush write */ +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +-} +- +-static void ar71xx_pci_irq_mask(struct irq_data *d) +-{ +- struct ar71xx_pci_controller *apc; +- unsigned int irq; +- void __iomem *base = ath79_reset_base; +- u32 t; +- +- apc = irq_data_get_irq_chip_data(d); +- irq = irq_linear_revmap(apc->domain, d->irq); +- +- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- /* flush write */ +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +-} +- +-static struct irq_chip ar71xx_pci_irq_chip = { +- .name = "AR71XX PCI", +- .irq_mask = ar71xx_pci_irq_mask, +- .irq_unmask = ar71xx_pci_irq_unmask, +- .irq_mask_ack = ar71xx_pci_irq_mask, +-}; +- +-static int ar71xx_pci_irq_map(struct irq_domain *d, +- unsigned int irq, irq_hw_number_t hw) +-{ +- struct ar71xx_pci_controller *apc = d->host_data; +- +- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); +- irq_set_chip_data(irq, apc); +- +- return 0; +-} +- +-static const struct irq_domain_ops ar71xx_pci_domain_ops = { +- .xlate = irq_domain_xlate_onecell, +- .map = ar71xx_pci_irq_map, +-}; +- +-static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) +-{ +- void __iomem *base = ath79_reset_base; +- +- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); +- +- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, +- &ar71xx_pci_domain_ops, apc); +- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, +- apc); +-} +- + static void ar71xx_pci_reset(void) + { + ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); +@@ -358,10 +258,6 @@ static int ar71xx_pci_probe(struct platf + if (IS_ERR(apc->cfg_base)) + return PTR_ERR(apc->cfg_base); + +- apc->irq = platform_get_irq(pdev, 0); +- if (apc->irq < 0) +- return -EINVAL; +- + ar71xx_pci_reset(); + + /* setup COMMAND register */ +@@ -372,8 +268,6 @@ static int ar71xx_pci_probe(struct platf + /* clear bus errors */ + ar71xx_pci_check_error(apc, 1); + +- ar71xx_pci_irq_init(apc); +- + apc->np = pdev->dev.of_node; + apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; + apc->pci_ctrl.mem_resource = &apc->mem_res; diff --git a/target/linux/ath79/patches-5.10/0037-missing-registers.patch b/target/linux/ath79/patches-5.10/0037-missing-registers.patch new file mode 100644 index 0000000000..9067e4ca7b --- /dev/null +++ b/target/linux/ath79/patches-5.10/0037-missing-registers.patch @@ -0,0 +1,21 @@ +commit f3ffac90bc7266b7d917616f3233f58e8c08a196 +Author: Christian Lamparter +Date: Fri Aug 10 23:24:47 2018 +0200 + + ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344 + + Signed-off-by: Christian Lamparter + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1226,6 +1226,10 @@ + #define AR934X_ETH_CFG_RDV_DELAY BIT(16) + #define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 + #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 ++#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18 ++#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20 + + /* + * QCA953X GMAC Interface diff --git a/target/linux/ath79/patches-5.10/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch b/target/linux/ath79/patches-5.10/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch new file mode 100644 index 0000000000..bc09062dc5 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch @@ -0,0 +1,90 @@ +From 60efe35257b063ce584968f9f80b437030ce6ba6 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Mon, 18 Mar 2019 00:54:06 +0100 +Subject: [PATCH] MIPS: ath79: add missing QCA955x GMAC registers + +This adds missing GMAC register definitions for the Qualcomm Atheros +QCA955X series MIPS SoCs. + +They originate from the platforms U-Boot code and the AVM FRITZ!WLAN +Repeater 450E's GPL tarball. + +Signed-off-by: David Bauer +--- + .../mips/include/asm/mach-ath79/ar71xx_regs.h | 54 +++++++++++++++++++ + 1 file changed, 54 insertions(+) + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1246,7 +1246,12 @@ + */ + + #define QCA955X_GMAC_REG_ETH_CFG 0x00 ++#define QCA955X_GMAC_REG_SGMII_RESET 0x14 + #define QCA955X_GMAC_REG_SGMII_SERDES 0x18 ++#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c ++#define QCA955X_GMAC_REG_MR_AN_STATUS 0x20 ++#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34 ++#define QCA955X_GMAC_REG_SGMII_DEBUG 0x58 + + #define QCA955X_ETH_CFG_RGMII_EN BIT(0) + #define QCA955X_ETH_CFG_MII_GE0 BIT(1) +@@ -1268,9 +1273,58 @@ + #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 + #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 + ++#define QCA955X_SGMII_RESET_RX_CLK_N_RESET 0 ++#define QCA955X_SGMII_RESET_RX_CLK_N BIT(0) ++#define QCA955X_SGMII_RESET_TX_CLK_N BIT(1) ++#define QCA955X_SGMII_RESET_RX_125M_N BIT(2) ++#define QCA955X_SGMII_RESET_TX_125M_N BIT(3) ++#define QCA955X_SGMII_RESET_HW_RX_125M_N BIT(4) ++ + #define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) + #define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 + #define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf ++ ++#define QCA955X_MR_AN_CONTROL_SPEED_SEL1 BIT(6) ++#define QCA955X_MR_AN_CONTROL_DUPLEX_MODE BIT(8) ++#define QCA955X_MR_AN_CONTROL_RESTART_AN BIT(9) ++#define QCA955X_MR_AN_CONTROL_POWER_DOWN BIT(11) ++#define QCA955X_MR_AN_CONTROL_AN_ENABLE BIT(12) ++#define QCA955X_MR_AN_CONTROL_SPEED_SEL0 BIT(13) ++#define QCA955X_MR_AN_CONTROL_LOOPBACK BIT(14) ++#define QCA955X_MR_AN_CONTROL_PHY_RESET BIT(15) ++ ++#define QCA955X_MR_AN_STATUS_EXT_CAP BIT(0) ++#define QCA955X_MR_AN_STATUS_LINK_UP BIT(2) ++#define QCA955X_MR_AN_STATUS_AN_ABILITY BIT(3) ++#define QCA955X_MR_AN_STATUS_REMOTE_FAULT BIT(4) ++#define QCA955X_MR_AN_STATUS_AN_COMPLETE BIT(5) ++#define QCA955X_MR_AN_STATUS_NO_PREAMBLE BIT(6) ++#define QCA955X_MR_AN_STATUS_BASE_PAGE BIT(7) ++ ++#define QCA955X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 ++#define QCA955X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 ++#define QCA955X_SGMII_CONFIG_ENABLE_SGMII_TX_PAUSE BIT(3) ++#define QCA955X_SGMII_CONFIG_MR_REG4_CHANGED BIT(4) ++#define QCA955X_SGMII_CONFIG_FORCE_SPEED BIT(5) ++#define QCA955X_SGMII_CONFIG_SPEED_SHIFT 6 ++#define QCA955X_SGMII_CONFIG_SPEED_MASK 0xc0 ++#define QCA955X_SGMII_CONFIG_REMOTE_PHY_LOOPBACK BIT(8) ++#define QCA955X_SGMII_CONFIG_NEXT_PAGE_LOADED BIT(9) ++#define QCA955X_SGMII_CONFIG_MDIO_ENABLE BIT(10) ++#define QCA955X_SGMII_CONFIG_MDIO_PULSE BIT(11) ++#define QCA955X_SGMII_CONFIG_MDIO_COMPLETE BIT(12) ++#define QCA955X_SGMII_CONFIG_PRBS_ENABLE BIT(13) ++#define QCA955X_SGMII_CONFIG_BERT_ENABLE BIT(14) ++ ++#define QCA955X_SGMII_DEBUG_TX_STATE_MASK 0xff ++#define QCA955X_SGMII_DEBUG_TX_STATE_SHIFT 0 ++#define QCA955X_SGMII_DEBUG_RX_STATE_MASK 0xff00 ++#define QCA955X_SGMII_DEBUG_RX_STATE_SHIFT 8 ++#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_MASK 0xff0000 ++#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_SHIFT 16 ++#define QCA955X_SGMII_DEBUG_ARB_STATE_MASK 0xf000000 ++#define QCA955X_SGMII_DEBUG_ARB_STATE_SHIFT 24 ++ + /* + * QCA956X GMAC Interface + */ diff --git a/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch new file mode 100644 index 0000000000..edf888c7e7 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch @@ -0,0 +1,52 @@ +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -40,6 +40,7 @@ static const char * const clk_names[ATH7 + [ATH79_CLK_AHB] = "ahb", + [ATH79_CLK_REF] = "ref", + [ATH79_CLK_MDIO] = "mdio", ++ [ATH79_CLK_UART1] = "uart1", + }; + + static const char * __init ath79_clk_name(int type) +@@ -344,6 +345,9 @@ static void __init ar934x_clocks_init(vo + if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) + ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); + ++ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL) ++ ath79_set_clk(ATH79_CLK_UART1, 100 * 1000 * 1000); ++ + iounmap(dpll_base); + } + +@@ -649,6 +653,9 @@ static void __init ath79_clocks_init_dt( + if (!clks[ATH79_CLK_MDIO]) + clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; + ++ if (!clks[ATH79_CLK_UART1]) ++ clks[ATH79_CLK_UART1] = clks[ATH79_CLK_REF]; ++ + if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { + pr_err("%pOF: could not register clk provider\n", np); + goto err_iounmap; +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -348,6 +348,7 @@ + #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + + #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) ++#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL BIT(7) + + #define QCA953X_PLL_CPU_CONFIG_REG 0x00 + #define QCA953X_PLL_DDR_CONFIG_REG 0x04 +--- a/include/dt-bindings/clock/ath79-clk.h ++++ b/include/dt-bindings/clock/ath79-clk.h +@@ -11,7 +11,8 @@ + #define ATH79_CLK_AHB 2 + #define ATH79_CLK_REF 3 + #define ATH79_CLK_MDIO 4 ++#define ATH79_CLK_UART1 5 + +-#define ATH79_CLK_END 5 ++#define ATH79_CLK_END 6 + + #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch new file mode 100644 index 0000000000..fa4b05f724 --- /dev/null +++ b/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch @@ -0,0 +1,18 @@ +HACK: register the GPIO driver earlier to ensure that gpio_request calls +from mach files succeed. + +--- a/drivers/gpio/gpio-ath79.c ++++ b/drivers/gpio/gpio-ath79.c +@@ -310,7 +310,11 @@ static struct platform_driver ath79_gpio + .probe = ath79_gpio_probe, + }; + +-module_platform_driver(ath79_gpio_driver); ++static int __init ath79_gpio_init(void) ++{ ++ return platform_driver_register(&ath79_gpio_driver); ++} ++postcore_initcall(ath79_gpio_init); + + MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); + MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ath79/patches-5.10/0050-spi-ath79-remove-spi-master-setup-and-cleanup-assign.patch b/target/linux/ath79/patches-5.10/0050-spi-ath79-remove-spi-master-setup-and-cleanup-assign.patch new file mode 100644 index 0000000000..a57ac24f29 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0050-spi-ath79-remove-spi-master-setup-and-cleanup-assign.patch @@ -0,0 +1,28 @@ +From b142b1beb199f62d47370c98a3dd8e13f792e9c0 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Thu, 27 Feb 2020 23:03:20 +0100 +Subject: [PATCH] spi: ath79: remove spi-master setup and cleanup assignment + +This removes the assignment of setup and cleanup functions for the ath79 +target. Assigning the setup-method will lead to 'setup_transfer' not +being assigned in spi_bitbang_init. + +Also drop the redundant cleanup assignment, as this also happens in +spi_bitbang_init. + +Signed-off-by: David Bauer +--- + drivers/spi/spi-ath79.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -152,8 +152,6 @@ static int ath79_spi_probe(struct platfo + + master->use_gpio_descriptors = true; + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); +- master->setup = spi_bitbang_setup; +- master->cleanup = spi_bitbang_cleanup; + + sp->bitbang.master = master; + sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ath79/patches-5.10/0051-spi-ath79-always-call-chipselect-function.patch b/target/linux/ath79/patches-5.10/0051-spi-ath79-always-call-chipselect-function.patch new file mode 100644 index 0000000000..746f9035a6 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0051-spi-ath79-always-call-chipselect-function.patch @@ -0,0 +1,21 @@ +From: David Bauer +Date: Wed, 17 Feb 2021 02:44:55 +0100 +Subject: [PATCH] spi: ath79: always call chipselect function + +api-bitbang has to call the chipselect function on the ath79 SPI driver +in order to communicate with the SPI slave device. + +Fixes commit 4a07b8bcd503 ("spi: bitbang: Make chipselect callback optional") + +Signed-off-by: David Bauer + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -152,6 +152,7 @@ static int ath79_spi_probe(struct platfo + + master->use_gpio_descriptors = true; + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); ++ master->flags = SPI_MASTER_GPIO_SS; + + sp->bitbang.master = master; + sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-add-block-protection-flags-to-macronix.patch b/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-add-block-protection-flags-to-macronix.patch new file mode 100644 index 0000000000..d416276f0d --- /dev/null +++ b/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-add-block-protection-flags-to-macronix.patch @@ -0,0 +1,26 @@ +From 158f9796335b393980afb8e9796eb8d44106652a Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Mon, 26 Oct 2020 15:10:47 +0100 +Subject: [PATCH 1/2] mtd: spi-nor: add block protection flags to macronix + +Macronix flash chips support block protection by using BP bits in the +read status register. Add the corresponding flag to indicate block +protection support. + +Otherwise, locked blocks are not unlocked when requested. + +Signed-off-by: David Bauer +--- + drivers/mtd/spi-nor/macronix.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/mtd/spi-nor/macronix.c ++++ b/drivers/mtd/spi-nor/macronix.c +@@ -94,6 +94,7 @@ static const struct flash_info macronix_ + + static void macronix_default_init(struct spi_nor *nor) + { ++ nor->flags |= SNOR_F_HAS_LOCK; + nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; + nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode; + nor->flags |= SNOR_F_HAS_LOCK; diff --git a/target/linux/ath79/patches-5.10/0053-mtd-spi-nor-use-4-bit-BP-for-large-Macronix-flash.patch b/target/linux/ath79/patches-5.10/0053-mtd-spi-nor-use-4-bit-BP-for-large-Macronix-flash.patch new file mode 100644 index 0000000000..bb393e52eb --- /dev/null +++ b/target/linux/ath79/patches-5.10/0053-mtd-spi-nor-use-4-bit-BP-for-large-Macronix-flash.patch @@ -0,0 +1,85 @@ +From 59f88b8d4447be809d0b5e7a283290d06848d3bc Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 25 Oct 2020 01:14:22 +0200 +Subject: [PATCH 2/2] mtd: spi-nor: use 4 bit BP for large Macronix flash + +Macronix SPI-NOR chips with 128 or more 64k blocks have 4 block +protection bits in their status register. Add the corresponding +flag in order to clear these bits when unloking the flash. + +Otherwise, the flash might not be writable depending on the state the +bootloader left the flash in. + +Fixes commit 62593cf40b23 ("mtd: spi-nor: refactor block protection functions") + +Signed-off-by: David Bauer +--- + drivers/mtd/spi-nor/macronix.c | 31 ++++++++++++++++++------------- + 1 file changed, 18 insertions(+), 13 deletions(-) + +--- a/drivers/mtd/spi-nor/macronix.c ++++ b/drivers/mtd/spi-nor/macronix.c +@@ -50,8 +50,8 @@ static const struct flash_info macronix_ + { "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) }, + { "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) }, + { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, +- { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K) }, +- { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, ++ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_4BIT_BP) }, ++ { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, SPI_NOR_4BIT_BP) }, + { "mx25r1635f", INFO(0xc22815, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | + SPI_NOR_QUAD_READ) }, +@@ -60,36 +60,41 @@ static const struct flash_info macronix_ + SPI_NOR_QUAD_READ) }, + { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | +- SPI_NOR_QUAD_READ) }, ++ SPI_NOR_QUAD_READ | SPI_NOR_4BIT_BP) }, + { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, +- SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) ++ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | ++ SPI_NOR_4BIT_BP) + .fixups = &mx25l25635_fixups }, + { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, +- SECT_4K | SPI_NOR_4B_OPCODES) }, ++ SECT_4K | SPI_NOR_4B_OPCODES | ++ SPI_NOR_4BIT_BP) }, + { "mx25u51245g", INFO(0xc2253a, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | +- SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, ++ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | ++ SPI_NOR_4BIT_BP) }, + { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ | + SPI_NOR_QUAD_READ) }, +- { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, ++ { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, SPI_NOR_4BIT_BP) }, + { "mx25l51245g", INFO(0xc2201a, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | +- SPI_NOR_4B_OPCODES) }, ++ SPI_NOR_4B_OPCODES | SPI_NOR_4BIT_BP) }, + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | +- SPI_NOR_4B_OPCODES) }, ++ SPI_NOR_4B_OPCODES | SPI_NOR_4BIT_BP) }, + { "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | +- SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, ++ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | ++ SPI_NOR_4BIT_BP) }, + { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | +- SPI_NOR_QUAD_READ) }, ++ SPI_NOR_QUAD_READ | SPI_NOR_4BIT_BP) }, + { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, +- SPI_NOR_QUAD_READ) }, ++ SPI_NOR_QUAD_READ | SPI_NOR_4BIT_BP) }, + { "mx66u2g45g", INFO(0xc2253c, 0, 64 * 1024, 4096, + SECT_4K | SPI_NOR_DUAL_READ | +- SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, ++ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | ++ SPI_NOR_4BIT_BP) }, + }; + + static void macronix_default_init(struct spi_nor *nor) diff --git a/target/linux/ath79/patches-5.10/0054-spi-always-write-cs.patch b/target/linux/ath79/patches-5.10/0054-spi-always-write-cs.patch new file mode 100644 index 0000000000..1e461cee0a --- /dev/null +++ b/target/linux/ath79/patches-5.10/0054-spi-always-write-cs.patch @@ -0,0 +1,31 @@ +Upstream commit d40f0b6f2e21 ("spi: Avoid settingthe chip select if +we don't need to") causes the SPI CS only to be asserted once and not +if it's state stays the same. + +This seems to cause problems with the SPI on the AR724x and the AR913x +(but not the AR71xx). AR934x and subsequent chips do not look affected. + +ToDo: + - Analyze if this is a hardware bug or a bug in the software. + - Send a cleaned up patch upstream. + +Signed-off-by: David Bauer + +--- a/drivers/spi/spi.c ++++ b/drivers/spi/spi.c +@@ -791,6 +791,7 @@ static void spi_set_cs(struct spi_device + { + bool enable1 = enable; + ++#if 0 + /* + * Avoid calling into the driver (or doing delays) if the chip select + * isn't actually changing from the last time this was called. +@@ -801,6 +802,7 @@ static void spi_set_cs(struct spi_device + + spi->controller->last_cs_enable = enable; + spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH; ++#endif + + if (!spi->controller->set_cs_timing) { + if (enable1) diff --git a/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch b/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch new file mode 100644 index 0000000000..13955c62a2 --- /dev/null +++ b/target/linux/ath79/patches-5.10/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch @@ -0,0 +1,130 @@ +From: David Bauer +Date: Sat, 11 Apr 2020 14:03:12 +0200 +Subject: MIPS: pci-ar724x: add QCA9550 reset sequence + +The QCA9550 family of SoCs have a slightly different reset +sequence compared to older chips. + +Normally the bootloader performs this sequence, however +some bootloader implementation expect the operating system +to clear the reset. + +Also get the resets from OF to support handling of the second +PCIe root-complex on the QCA9558. + +Signed-off-by: David Bauer + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -391,6 +391,7 @@ + #define QCA955X_PLL_CPU_CONFIG_REG 0x00 + #define QCA955X_PLL_DDR_CONFIG_REG 0x04 + #define QCA955X_PLL_CLK_CTRL_REG 0x08 ++#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c + #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 + #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 + #define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c +@@ -476,6 +477,9 @@ + #define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) + #define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30) ++#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16) ++ + #define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5) + #define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6) + #define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7) +--- a/arch/mips/pci/pci-ar724x.c ++++ b/arch/mips/pci/pci-ar724x.c +@@ -8,6 +8,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -55,6 +56,9 @@ struct ar724x_pci_controller { + struct irq_domain *domain; + struct resource io_res; + struct resource mem_res; ++ ++ struct reset_control *hc_reset; ++ struct reset_control *phy_reset; + }; + + static struct irq_chip ar724x_pci_irq_chip; +@@ -340,18 +344,30 @@ static void ar724x_pci_hw_init(struct ar + int wait = 0; + + /* deassert PCIe host controller and PCIe PHY reset */ +- ath79_device_reset_clear(AR724X_RESET_PCIE); +- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY); ++ reset_control_deassert(apc->hc_reset); ++ reset_control_deassert(apc->phy_reset); + +- /* remove the reset of the PCIE PLL */ +- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); +- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; +- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); +- +- /* deassert bypass for the PCIE PLL */ +- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); +- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; +- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) { ++ /* remove the reset of the PCIE PLL */ ++ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); ++ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD; ++ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); ++ ++ /* deassert bypass for the PCIE PLL */ ++ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); ++ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS; ++ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); ++ } else { ++ /* remove the reset of the PCIE PLL */ ++ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); ++ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; ++ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ ++ /* deassert bypass for the PCIE PLL */ ++ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); ++ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; ++ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ } + + /* set PCIE Application Control to ready */ + app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); +@@ -399,6 +415,14 @@ static int ar724x_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + ++ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc"); ++ if (IS_ERR(apc->hc_reset)) ++ return PTR_ERR(apc->hc_reset); ++ ++ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy"); ++ if (IS_ERR(apc->phy_reset)) ++ return PTR_ERR(apc->phy_reset); ++ + apc->np = pdev->dev.of_node; + apc->pci_controller.pci_ops = &ar724x_pci_ops; + apc->pci_controller.io_resource = &apc->io_res; +@@ -409,7 +433,7 @@ static int ar724x_pci_probe(struct platf + * Do the full PCIE Root Complex Initialization Sequence if the PCIe + * host controller is in reset. + */ +- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE) ++ if (reset_control_status(apc->hc_reset)) + ar724x_pci_hw_init(apc); + + apc->link_up = ar724x_pci_check_link(apc); +@@ -427,6 +451,7 @@ static int ar724x_pci_probe(struct platf + + static const struct of_device_id ar724x_pci_ids[] = { + { .compatible = "qcom,ar7240-pci" }, ++ { .compatible = "qcom,qca9550-pci" }, + {}, + }; + diff --git a/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch new file mode 100644 index 0000000000..1ebf87c610 --- /dev/null +++ b/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch @@ -0,0 +1,27 @@ +--- a/drivers/mtd/parsers/Makefile ++++ b/drivers/mtd/parsers/Makefile +@@ -5,6 +5,7 @@ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm6 + obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o + obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o + obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o ++obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o + obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o + obj-$(CONFIG_MTD_AFS_PARTS) += afs.o + obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o +--- a/drivers/mtd/parsers/Kconfig ++++ b/drivers/mtd/parsers/Kconfig +@@ -83,6 +83,14 @@ config MTD_OF_PARTS + flash memory node, as described in + Documentation/devicetree/bindings/mtd/partition.txt. + ++config MTD_PARSER_CYBERTAN ++ tristate "Parser for Cybertan format partitions" ++ depends on MTD && (ATH79 || COMPILE_TEST) ++ help ++ Cybertan has a proprietory header than encompasses a Broadcom trx ++ header. This driver will parse the header and take care of the ++ special offsets that result in the extra headers. ++ + config MTD_PARSER_IMAGETAG + tristate "Parser for BCM963XX Image Tag format partitions" + depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST diff --git a/target/linux/ath79/patches-5.10/408-mtd-redboot_partition_scan.patch b/target/linux/ath79/patches-5.10/408-mtd-redboot_partition_scan.patch new file mode 100644 index 0000000000..8f3ee32f57 --- /dev/null +++ b/target/linux/ath79/patches-5.10/408-mtd-redboot_partition_scan.patch @@ -0,0 +1,44 @@ +--- a/drivers/mtd/parsers/redboot.c ++++ b/drivers/mtd/parsers/redboot.c +@@ -85,12 +85,18 @@ static int parse_redboot_partitions(stru + + parse_redboot_of(master); + ++ buf = vmalloc(master->erasesize); ++ if (!buf) ++ return -ENOMEM; ++ ++ restart: + if ( directory < 0 ) { + offset = master->size + directory * master->erasesize; + while (mtd_block_isbad(master, offset)) { + if (!offset) { + nogood: + printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); ++ vfree(buf); + return -EIO; + } + offset -= master->erasesize; +@@ -103,10 +109,6 @@ static int parse_redboot_partitions(stru + goto nogood; + } + } +- buf = vmalloc(master->erasesize); +- +- if (!buf) +- return -ENOMEM; + + printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", + master->name, offset); +@@ -179,6 +181,11 @@ static int parse_redboot_partitions(stru + } + if (i == numslots) { + /* Didn't find it */ ++ if (offset + master->erasesize < master->size) { ++ /* not at the end of the flash yet, maybe next block :) */ ++ directory++; ++ goto restart; ++ } + printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", + master->name); + ret = 0; diff --git a/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch b/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch new file mode 100644 index 0000000000..2a6b9857fb --- /dev/null +++ b/target/linux/ath79/patches-5.10/410-spi-ath79-Implement-the-spi_mem-interface.patch @@ -0,0 +1,68 @@ +From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001 +From: Luiz Angelo Daros de Luca +Date: Mon, 10 Feb 2020 16:11:27 -0300 +Subject: [PATCH] spi: ath79: Implement the spi_mem interface + +Signed-off-by: Luiz Angelo Daros de Luca +--- + drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -133,6 +134,39 @@ static u32 ath79_spi_txrx_mode0(struct s + return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); + } + ++static int ath79_exec_mem_op(struct spi_mem *mem, ++ const struct spi_mem_op *op) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi); ++ ++ /* Ensures that reading is performed on device connected ++ to hardware cs0 */ ++ if (mem->spi->chip_select || mem->spi->cs_gpiod) ++ return -ENOTSUPP; ++ ++ /* Only use for fast-read op. */ ++ if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN || ++ op->addr.nbytes != 3 || op->dummy.nbytes != 1) ++ return -ENOTSUPP; ++ ++ /* disable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); ++ ++ memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes); ++ ++ /* enable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); ++ ++ /* restore IOC register */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); ++ ++ return 0; ++} ++ ++static const struct spi_controller_mem_ops ath79_mem_ops = { ++ .exec_op = ath79_exec_mem_op, ++}; ++ + static int ath79_spi_probe(struct platform_device *pdev) + { + struct spi_master *master; +@@ -163,6 +197,7 @@ static int ath79_spi_probe(struct platfo + ret = PTR_ERR(sp->base); + goto err_put_master; + } ++ master->mem_ops = &ath79_mem_ops; + + sp->clk = devm_clk_get(&pdev->dev, "ahb"); + if (IS_ERR(sp->clk)) { diff --git a/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch b/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch new file mode 100644 index 0000000000..7ce3f0d29c --- /dev/null +++ b/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch @@ -0,0 +1,28 @@ +--- a/drivers/net/ethernet/atheros/Kconfig ++++ b/drivers/net/ethernet/atheros/Kconfig +@@ -17,13 +17,7 @@ config NET_VENDOR_ATHEROS + + if NET_VENDOR_ATHEROS + +-config AG71XX +- tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" +- depends on ATH79 +- select PHYLINK +- help +- If you wish to compile a kernel for AR7XXX/91XXX and enable +- ethernet support, then you should always answer Y to this. ++source "drivers/net/ethernet/atheros/ag71xx/Kconfig" + + config ATL2 + tristate "Atheros L2 Fast Ethernet support" +--- a/drivers/net/ethernet/atheros/Makefile ++++ b/drivers/net/ethernet/atheros/Makefile +@@ -3,7 +3,7 @@ + # Makefile for the Atheros network device drivers. + # + +-obj-$(CONFIG_AG71XX) += ag71xx.o ++obj-$(CONFIG_AG71XX) += ag71xx/ + obj-$(CONFIG_ATL1) += atlx/ + obj-$(CONFIG_ATL2) += atlx/ + obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch b/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch new file mode 100644 index 0000000000..396b1ee7a2 --- /dev/null +++ b/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch @@ -0,0 +1,16 @@ +--- a/drivers/net/phy/at803x.c ++++ b/drivers/net/phy/at803x.c +@@ -383,6 +383,13 @@ static int at803x_aneg_done(struct phy_d + if (!(phy_read(phydev, AT803X_PSSR) & AT803X_PSSR_MR_AN_COMPLETE)) { + phydev_warn(phydev, "803x_aneg_done: SGMII link is not ok\n"); + aneg_done = 0; ++#ifdef CONFIG_OF_MDIO ++ if (phydev->mdio.dev.of_node && ++ of_property_read_bool(phydev->mdio.dev.of_node, ++ "at803x-override-sgmii-link-check")) { ++ aneg_done = 1; ++ } ++#endif + } + /* switch back to copper page */ + phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL); diff --git a/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch new file mode 100644 index 0000000000..4c6558db90 --- /dev/null +++ b/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch @@ -0,0 +1,12 @@ +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -80,8 +80,8 @@ obj-y += scsi/ + obj-y += nvme/ + obj-$(CONFIG_ATA) += ata/ + obj-$(CONFIG_TARGET_CORE) += target/ +-obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPI) += spi/ ++obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPMI) += spmi/ + obj-$(CONFIG_HSI) += hsi/ + obj-$(CONFIG_SLIMBUS) += slimbus/ diff --git a/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch new file mode 100644 index 0000000000..1e2d573ebf --- /dev/null +++ b/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch @@ -0,0 +1,25 @@ +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -556,4 +556,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE + load time (assuming you build diskonchip as a module) with the module + parameter "inftl_bbt_write=1". + ++config MTD_NAND_AR934X ++ tristate "Support for NAND controller on Qualcomm Atheros AR934x/QCA955x SoCs" ++ depends on ATH79 || COMPILE_TEST ++ depends on HAS_IOMEM ++ help ++ Enables support for NAND controller on Qualcomm Atheros SoCs. ++ This controller is found on AR934x and QCA955x SoCs. ++ + endif # MTD_RAW_NAND +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm + obj-$(CONFIG_MTD_NAND_MESON) += meson_nand.o + obj-$(CONFIG_MTD_NAND_CADENCE) += cadence-nand-controller.o + obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o ++obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o + + nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o + nand-objs += nand_onfi.o diff --git a/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch new file mode 100644 index 0000000000..924faec509 --- /dev/null +++ b/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch @@ -0,0 +1,98 @@ +--- /dev/null ++++ b/arch/mips/include/asm/mach-ath79/mangle-port.h +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h ++ * Copyright (C) 2003, 2004 Ralf Baechle ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H ++#define __ASM_MACH_ATH79_MANGLE_PORT_H ++ ++#ifdef CONFIG_PCI_AR71XX ++extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); ++extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); ++#else ++#define ath79_pci_swizzle_b(port) (port) ++#define ath79_pci_swizzle_w(port) (port) ++#endif ++ ++#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) ++#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) ++#define __swizzle_addr_l(port) (port) ++#define __swizzle_addr_q(port) (port) ++ ++# define ioswabb(a, x) (x) ++# define __mem_ioswabb(a, x) (x) ++# define ioswabw(a, x) (x) ++# define __mem_ioswabw(a, x) cpu_to_le16(x) ++# define ioswabl(a, x) (x) ++# define __mem_ioswabl(a, x) cpu_to_le32(x) ++# define ioswabq(a, x) (x) ++# define __mem_ioswabq(a, x) cpu_to_le64(x) ++ ++#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -68,6 +68,45 @@ static const u32 ar71xx_pci_read_mask[8] + 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 + }; + ++static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); ++static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); ++ ++static inline bool ar71xx_is_pci_addr(unsigned long port) ++{ ++ unsigned long phys = CPHYSADDR(port); ++ ++ return (phys >= AR71XX_PCI_MEM_BASE && ++ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); ++} ++ ++static unsigned long ar71xx_pci_swizzle_b(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; ++} ++ ++static unsigned long ar71xx_pci_swizzle_w(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; ++} ++ ++unsigned long ath79_pci_swizzle_b(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_b) ++ return __ath79_pci_swizzle_b(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_b); ++ ++unsigned long ath79_pci_swizzle_w(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_w) ++ return __ath79_pci_swizzle_w(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_w); ++ + static inline u32 ar71xx_pci_get_ble(int where, int size, int local) + { + u32 t; +@@ -276,6 +315,9 @@ static int ar71xx_pci_probe(struct platf + + register_pci_controller(&apc->pci_ctrl); + ++ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; ++ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; ++ + return 0; + } + diff --git a/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch new file mode 100644 index 0000000000..928f241abd --- /dev/null +++ b/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch @@ -0,0 +1,32 @@ +--- a/drivers/net/mdio/mdio-bitbang.c ++++ b/drivers/net/mdio/mdio-bitbang.c +@@ -152,7 +152,7 @@ static int mdiobb_cmd_addr(struct mdiobb + static int mdiobb_read(struct mii_bus *bus, int phy, int reg) + { + struct mdiobb_ctrl *ctrl = bus->priv; +- int ret, i; ++ int ret; + + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); +@@ -162,19 +162,7 @@ static int mdiobb_read(struct mii_bus *b + + ctrl->ops->set_mdio_dir(ctrl, 0); + +- /* check the turnaround bit: the PHY should be driving it to zero, if this +- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that +- */ +- if (mdiobb_get_bit(ctrl) != 0 && +- !(bus->phy_ignore_ta_mask & (1 << phy))) { +- /* PHY didn't drive TA low -- flush any bits it +- * may be trying to send. +- */ +- for (i = 0; i < 32; i++) +- mdiobb_get_bit(ctrl); +- +- return 0xffff; +- } ++ mdiobb_get_bit(ctrl); + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); diff --git a/target/linux/ath79/patches-5.10/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ath79/patches-5.10/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch new file mode 100644 index 0000000000..5b3260eecb --- /dev/null +++ b/target/linux/ath79/patches-5.10/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch @@ -0,0 +1,61 @@ +From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 16 Jun 2015 13:15:08 +0200 +Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command + +It seems some phys have some maximum timings for accessing the MDIO line, +resulting in bit errors under cpu stress. Prevent this from happening by +disabling interrupts when sending commands. + +Signed-off-by: Jonas Gorski +--- + drivers/net/mdio/mdio-bitbang.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/net/mdio/mdio-bitbang.c ++++ b/drivers/net/mdio/mdio-bitbang.c +@@ -14,6 +14,7 @@ + * Vitaly Bordug + */ + ++#include + #include + #include + #include +@@ -153,7 +154,9 @@ static int mdiobb_read(struct mii_bus *b + { + struct mdiobb_ctrl *ctrl = bus->priv; + int ret; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); +@@ -166,13 +169,17 @@ static int mdiobb_read(struct mii_bus *b + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return ret; + } + + static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) + { + struct mdiobb_ctrl *ctrl = bus->priv; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); +@@ -187,6 +194,8 @@ static int mdiobb_write(struct mii_bus * + + ctrl->ops->set_mdio_dir(ctrl, 0); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return 0; + } + diff --git a/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch new file mode 100644 index 0000000000..2440fbbb73 --- /dev/null +++ b/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch @@ -0,0 +1,869 @@ +--- a/arch/mips/include/asm/checksum.h ++++ b/arch/mips/include/asm/checksum.h +@@ -134,26 +134,30 @@ static inline __sum16 ip_fast_csum(const + const unsigned int *stop = word + ihl; + unsigned int csum; + int carry; ++ unsigned int w; + +- csum = word[0]; +- csum += word[1]; +- carry = (csum < word[1]); ++ csum = net_hdr_word(word++); ++ ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[2]; +- carry = (csum < word[2]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[3]; +- carry = (csum < word[3]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- word += 4; + do { +- csum += *word; +- carry = (csum < *word); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; +- word++; + } while (word != stop); + + return csum_fold(csum); +@@ -214,73 +218,6 @@ static inline __sum16 ip_compute_csum(co + return csum_fold(csum_partial(buff, len, 0)); + } + +-#define _HAVE_ARCH_IPV6_CSUM +-static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, +- const struct in6_addr *daddr, +- __u32 len, __u8 proto, +- __wsum sum) +-{ +- __wsum tmp; +- +- __asm__( +- " .set push # csum_ipv6_magic\n" +- " .set noreorder \n" +- " .set noat \n" +- " addu %0, %5 # proto (long in network byte order)\n" +- " sltu $1, %0, %5 \n" +- " addu %0, $1 \n" +- +- " addu %0, %6 # csum\n" +- " sltu $1, %0, %6 \n" +- " lw %1, 0(%2) # four words source address\n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 0(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " addu %0, $1 # Add final carry\n" +- " .set pop" +- : "=&r" (sum), "=&r" (tmp) +- : "r" (saddr), "r" (daddr), +- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); +- +- return csum_fold(sum); +-} +- + #include + #endif /* CONFIG_GENERIC_CSUM */ + +--- a/include/uapi/linux/ip.h ++++ b/include/uapi/linux/ip.h +@@ -103,7 +103,7 @@ struct iphdr { + __be32 saddr; + __be32 daddr; + /*The options start here. */ +-}; ++} __attribute__((packed, aligned(2))); + + + struct ip_auth_hdr { +--- a/include/uapi/linux/ipv6.h ++++ b/include/uapi/linux/ipv6.h +@@ -131,7 +131,7 @@ struct ipv6hdr { + + struct in6_addr saddr; + struct in6_addr daddr; +-}; ++} __attribute__((packed, aligned(2))); + + + /* index values for the variables in ipv6_devconf */ +--- a/include/uapi/linux/tcp.h ++++ b/include/uapi/linux/tcp.h +@@ -55,7 +55,7 @@ struct tcphdr { + __be16 window; + __sum16 check; + __be16 urg_ptr; +-}; ++} __attribute__((packed, aligned(2))); + + /* + * The union cast uses a gcc extension to avoid aliasing problems +@@ -65,7 +65,7 @@ struct tcphdr { + union tcp_word_hdr { + struct tcphdr hdr; + __be32 words[5]; +-}; ++} __attribute__((packed, aligned(2))); + + #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) + +--- a/include/uapi/linux/udp.h ++++ b/include/uapi/linux/udp.h +@@ -25,7 +25,7 @@ struct udphdr { + __be16 dest; + __be16 len; + __sum16 check; +-}; ++} __attribute__((packed, aligned(2))); + + /* UDP socket options */ + #define UDP_CORK 1 /* Never send partially complete segments */ +--- a/net/netfilter/nf_conntrack_core.c ++++ b/net/netfilter/nf_conntrack_core.c +@@ -271,8 +271,8 @@ nf_ct_get_tuple(const struct sk_buff *sk + + switch (l3num) { + case NFPROTO_IPV4: +- tuple->src.u3.ip = ap[0]; +- tuple->dst.u3.ip = ap[1]; ++ tuple->src.u3.ip = net_hdr_word(ap++); ++ tuple->dst.u3.ip = net_hdr_word(ap); + break; + case NFPROTO_IPV6: + memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6)); +--- a/include/uapi/linux/icmp.h ++++ b/include/uapi/linux/icmp.h +@@ -82,7 +82,7 @@ struct icmphdr { + } frag; + __u8 reserved[4]; + } un; +-}; ++} __attribute__((packed, aligned(2))); + + + /* +--- a/include/uapi/linux/in6.h ++++ b/include/uapi/linux/in6.h +@@ -43,7 +43,7 @@ struct in6_addr { + #define s6_addr16 in6_u.u6_addr16 + #define s6_addr32 in6_u.u6_addr32 + #endif +-}; ++} __attribute__((packed, aligned(2))); + #endif /* __UAPI_DEF_IN6_ADDR */ + + #if __UAPI_DEF_SOCKADDR_IN6 +--- a/net/ipv6/tcp_ipv6.c ++++ b/net/ipv6/tcp_ipv6.c +@@ -35,6 +35,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -849,10 +850,10 @@ static void tcp_v6_send_response(const s + topt = (__be32 *)(t1 + 1); + + if (tsecr) { +- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); +- *topt++ = htonl(tsval); +- *topt++ = htonl(tsecr); ++ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); ++ put_unaligned_be32(tsval, topt++); ++ put_unaligned_be32(tsecr, topt++); + } + + #ifdef CONFIG_TCP_MD5SIG +--- a/include/linux/ipv6.h ++++ b/include/linux/ipv6.h +@@ -6,6 +6,7 @@ + + #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) + #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) ++ + /* + * This structure contains configuration options per IPv6 link. + */ +--- a/net/ipv6/datagram.c ++++ b/net/ipv6/datagram.c +@@ -476,7 +476,7 @@ int ipv6_recv_error(struct sock *sk, str + ipv6_iface_scope_id(&sin->sin6_addr, + IP6CB(skb)->iif); + } else { +- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), ++ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), + &sin->sin6_addr); + sin->sin6_scope_id = 0; + } +@@ -830,12 +830,12 @@ int ip6_datagram_send_ctl(struct net *ne + } + + if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { +- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { ++ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { + err = -EINVAL; + goto exit_f; + } + } +- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); ++ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); + break; + + case IPV6_2292HOPOPTS: +--- a/net/ipv6/exthdrs.c ++++ b/net/ipv6/exthdrs.c +@@ -752,7 +752,7 @@ static bool ipv6_hop_jumbo(struct sk_buf + goto drop; + } + +- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); ++ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); + if (pkt_len <= IPV6_MAXPLEN) { + __IP6_INC_STATS(net, idev, IPSTATS_MIB_INHDRERRORS); + icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2); +--- a/include/linux/types.h ++++ b/include/linux/types.h +@@ -225,5 +225,11 @@ struct callback_head { + typedef void (*rcu_callback_t)(struct rcu_head *head); + typedef void (*call_rcu_func_t)(struct rcu_head *head, rcu_callback_t func); + ++struct net_hdr_word { ++ u32 words[1]; ++} __attribute__((packed, aligned(2))); ++ ++#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) ++ + #endif /* __ASSEMBLY__ */ + #endif /* _LINUX_TYPES_H */ +--- a/net/ipv4/af_inet.c ++++ b/net/ipv4/af_inet.c +@@ -1441,8 +1441,8 @@ struct sk_buff *inet_gro_receive(struct + if (unlikely(ip_fast_csum((u8 *)iph, 5))) + goto out_unlock; + +- id = ntohl(*(__be32 *)&iph->id); +- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); ++ id = ntohl(net_hdr_word(&iph->id)); ++ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); + id >>= 16; + + list_for_each_entry(p, head, list) { +--- a/net/ipv4/tcp_output.c ++++ b/net/ipv4/tcp_output.c +@@ -460,48 +460,53 @@ static void tcp_options_write(__be32 *pt + u16 options = opts->options; /* mungable copy */ + + if (unlikely(OPTION_MD5 & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); + /* overload cookie hash location */ + opts->hash_location = (__u8 *)ptr; + ptr += 4; + } + + if (unlikely(opts->mss)) { +- *ptr++ = htonl((TCPOPT_MSS << 24) | +- (TCPOLEN_MSS << 16) | +- opts->mss); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | ++ opts->mss); + } + + if (likely(OPTION_TS & options)) { + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | +- (TCPOLEN_SACK_PERM << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_SACK_PERM << 24) | ++ (TCPOLEN_SACK_PERM << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + options &= ~OPTION_SACK_ADVERTISE; + } else { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + } +- *ptr++ = htonl(opts->tsval); +- *ptr++ = htonl(opts->tsecr); ++ net_hdr_word(ptr++) = htonl(opts->tsval); ++ net_hdr_word(ptr++) = htonl(opts->tsecr); + } + + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK_PERM << 8) | +- TCPOLEN_SACK_PERM); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK_PERM << 8) | ++ TCPOLEN_SACK_PERM); + } + + if (unlikely(OPTION_WSCALE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_WINDOW << 16) | +- (TCPOLEN_WINDOW << 8) | +- opts->ws); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_WINDOW << 16) | ++ (TCPOLEN_WINDOW << 8) | ++ opts->ws); + } + + if (unlikely(opts->num_sack_blocks)) { +@@ -509,16 +514,17 @@ static void tcp_options_write(__be32 *pt + tp->duplicate_sack : tp->selective_acks; + int this_sack; + +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK << 8) | +- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK << 8) | ++ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * + TCPOLEN_SACK_PERBLOCK))); + + for (this_sack = 0; this_sack < opts->num_sack_blocks; + ++this_sack) { +- *ptr++ = htonl(sp[this_sack].start_seq); +- *ptr++ = htonl(sp[this_sack].end_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); + } + + tp->rx_opt.dsack = 0; +@@ -531,13 +537,14 @@ static void tcp_options_write(__be32 *pt + + if (foc->exp) { + len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; +- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | ++ net_hdr_word(ptr) = ++ htonl((TCPOPT_EXP << 24) | (len << 16) | + TCPOPT_FASTOPEN_MAGIC); + p += TCPOLEN_EXP_FASTOPEN_BASE; + } else { + len = TCPOLEN_FASTOPEN_BASE + foc->len; +- *p++ = TCPOPT_FASTOPEN; +- *p++ = len; ++ net_hdr_word(p++) = TCPOPT_FASTOPEN; ++ net_hdr_word(p++) = len; + } + + memcpy(p, foc->val, foc->len); +--- a/include/uapi/linux/igmp.h ++++ b/include/uapi/linux/igmp.h +@@ -33,7 +33,7 @@ struct igmphdr { + __u8 code; /* For newer IGMP */ + __sum16 csum; + __be32 group; +-}; ++} __attribute__((packed, aligned(2))); + + /* V3 group record types [grec_type] */ + #define IGMPV3_MODE_IS_INCLUDE 1 +@@ -49,7 +49,7 @@ struct igmpv3_grec { + __be16 grec_nsrcs; + __be32 grec_mca; + __be32 grec_src[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_report { + __u8 type; +@@ -58,7 +58,7 @@ struct igmpv3_report { + __be16 resv2; + __be16 ngrec; + struct igmpv3_grec grec[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_query { + __u8 type; +@@ -79,7 +79,7 @@ struct igmpv3_query { + __u8 qqic; + __be16 nsrcs; + __be32 srcs[0]; +-}; ++} __attribute__((packed, aligned(2))); + + #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ + #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ +--- a/net/core/flow_dissector.c ++++ b/net/core/flow_dissector.c +@@ -212,7 +212,7 @@ __be32 __skb_flow_get_ports(const struct + ports = __skb_header_pointer(skb, thoff + poff, + sizeof(_ports), data, hlen, &_ports); + if (ports) +- return *ports; ++ return (__be32)net_hdr_word(ports); + } + + return 0; +--- a/include/uapi/linux/icmpv6.h ++++ b/include/uapi/linux/icmpv6.h +@@ -77,7 +77,7 @@ struct icmp6hdr { + #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other + #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime + #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref +-}; ++} __attribute__((packed, aligned(2))); + + + #define ICMPV6_ROUTER_PREF_LOW 0x3 +--- a/include/net/ndisc.h ++++ b/include/net/ndisc.h +@@ -92,7 +92,7 @@ struct ra_msg { + struct icmp6hdr icmph; + __be32 reachable_time; + __be32 retrans_timer; +-}; ++} __attribute__((packed, aligned(2))); + + struct rd_msg { + struct icmp6hdr icmph; +@@ -371,10 +371,10 @@ static inline u32 ndisc_hashfn(const voi + { + const u32 *p32 = pkey; + +- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + +- (p32[1] * hash_rnd[1]) + +- (p32[2] * hash_rnd[2]) + +- (p32[3] * hash_rnd[3])); ++ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + ++ (net_hdr_word(&p32[1]) * hash_rnd[1]) + ++ (net_hdr_word(&p32[2]) * hash_rnd[2]) + ++ (net_hdr_word(&p32[3]) * hash_rnd[3])); + } + + static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) +--- a/net/sched/cls_u32.c ++++ b/net/sched/cls_u32.c +@@ -155,7 +155,7 @@ next_knode: + data = skb_header_pointer(skb, toff, 4, &hdata); + if (!data) + goto out; +- if ((*data ^ key->val) & key->mask) { ++ if ((net_hdr_word(data) ^ key->val) & key->mask) { + n = rcu_dereference_bh(n->next); + goto next_knode; + } +@@ -206,8 +206,8 @@ check_terminal: + &hdata); + if (!data) + goto out; +- sel = ht->divisor & u32_hash_fold(*data, &n->sel, +- n->fshift); ++ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), ++ &n->sel, n->fshift); + } + if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) + goto next_ht; +--- a/net/ipv6/ip6_offload.c ++++ b/net/ipv6/ip6_offload.c +@@ -240,7 +240,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff * + continue; + + iph2 = (struct ipv6hdr *)(p->data + off); +- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; ++ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); + + /* All fields must match except length and Traffic Class. + * XXX skbs on the gro_list have all been parsed and pulled +--- a/include/net/addrconf.h ++++ b/include/net/addrconf.h +@@ -47,7 +47,7 @@ struct prefix_info { + __be32 reserved2; + + struct in6_addr prefix; +-}; ++} __attribute__((packed, aligned(2))); + + #include + #include +--- a/include/net/inet_ecn.h ++++ b/include/net/inet_ecn.h +@@ -140,9 +140,9 @@ static inline int IP6_ECN_set_ce(struct + if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) + return 0; + +- from = *(__be32 *)iph; ++ from = net_hdr_word(iph); + to = from | htonl(INET_ECN_CE << 20); +- *(__be32 *)iph = to; ++ net_hdr_word(iph) = to; + if (skb->ip_summed == CHECKSUM_COMPLETE) + skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from), + (__force __wsum)to); +--- a/include/net/ipv6.h ++++ b/include/net/ipv6.h +@@ -146,7 +146,7 @@ struct frag_hdr { + __u8 reserved; + __be16 frag_off; + __be32 identification; +-}; ++} __attribute__((packed, aligned(2))); + + #define IP6_MF 0x0001 + #define IP6_OFFSET 0xFFF8 +@@ -557,8 +557,8 @@ static inline void __ipv6_addr_set_half( + } + #endif + #endif +- addr[0] = wh; +- addr[1] = wl; ++ net_hdr_word(&addr[0]) = wh; ++ net_hdr_word(&addr[1]) = wl; + } + + static inline void ipv6_addr_set(struct in6_addr *addr, +@@ -617,6 +617,8 @@ static inline bool ipv6_prefix_equal(con + const __be32 *a1 = addr1->s6_addr32; + const __be32 *a2 = addr2->s6_addr32; + unsigned int pdw, pbi; ++ /* Used for last <32-bit fraction of prefix */ ++ u32 pbia1, pbia2; + + /* check complete u32 in prefix */ + pdw = prefixlen >> 5; +@@ -625,7 +627,9 @@ static inline bool ipv6_prefix_equal(con + + /* check incomplete u32 in prefix */ + pbi = prefixlen & 0x1f; +- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) ++ pbia1 = net_hdr_word(&a1[pdw]); ++ pbia2 = net_hdr_word(&a2[pdw]); ++ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) + return false; + + return true; +@@ -741,13 +745,13 @@ static inline void ipv6_addr_set_v4mappe + */ + static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) + { +- const __be32 *a1 = token1, *a2 = token2; ++ const struct in6_addr *a1 = token1, *a2 = token2; + int i; + + addrlen >>= 2; + + for (i = 0; i < addrlen; i++) { +- __be32 xb = a1[i] ^ a2[i]; ++ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; + if (xb) + return i * 32 + 31 - __fls(ntohl(xb)); + } +@@ -934,17 +938,18 @@ static inline int ip6_multipath_hash_pol + static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, + __be32 flowlabel) + { +- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; ++ net_hdr_word((__be32 *)hdr) = ++ htonl(0x60000000 | (tclass << 20)) | flowlabel; + } + + static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; + } + + static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; + } + + static inline u8 ip6_tclass(__be32 flowinfo) +--- a/include/net/secure_seq.h ++++ b/include/net/secure_seq.h +@@ -3,6 +3,7 @@ + #define _NET_SECURE_SEQ + + #include ++#include + + u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); + u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, +--- a/include/uapi/linux/in.h ++++ b/include/uapi/linux/in.h +@@ -84,7 +84,7 @@ enum { + /* Internet address. */ + struct in_addr { + __be32 s_addr; +-}; ++} __attribute__((packed, aligned(2))); + #endif + + #define IP_TOS 1 +--- a/net/ipv6/ip6_fib.c ++++ b/net/ipv6/ip6_fib.c +@@ -140,7 +140,7 @@ static __be32 addr_bit_set(const void *t + * See include/asm-generic/bitops/le.h. + */ + return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & +- addr[fn_bit >> 5]; ++ net_hdr_word(&addr[fn_bit >> 5]); + } + + struct fib6_info *fib6_info_alloc(gfp_t gfp_flags, bool with_fib6_nh) +--- a/net/netfilter/nf_conntrack_proto_tcp.c ++++ b/net/netfilter/nf_conntrack_proto_tcp.c +@@ -415,7 +415,7 @@ static void tcp_sack(const struct sk_buf + + /* Fast path for timestamp-only option */ + if (length == TCPOLEN_TSTAMP_ALIGNED +- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) ++ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) + | (TCPOPT_NOP << 16) + | (TCPOPT_TIMESTAMP << 8) + | TCPOLEN_TIMESTAMP)) +--- a/net/xfrm/xfrm_input.c ++++ b/net/xfrm/xfrm_input.c +@@ -162,8 +162,8 @@ int xfrm_parse_spi(struct sk_buff *skb, + if (!pskb_may_pull(skb, hlen)) + return -EINVAL; + +- *spi = *(__be32 *)(skb_transport_header(skb) + offset); +- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); ++ *spi = net_hdr_word(skb_transport_header(skb) + offset); ++ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); + return 0; + } + EXPORT_SYMBOL(xfrm_parse_spi); +--- a/net/ipv4/tcp_input.c ++++ b/net/ipv4/tcp_input.c +@@ -3976,14 +3976,16 @@ static bool tcp_parse_aligned_timestamp( + { + const __be32 *ptr = (const __be32 *)(th + 1); + +- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) +- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { ++ if (net_hdr_word(ptr) == ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { + tp->rx_opt.saw_tstamp = 1; + ++ptr; +- tp->rx_opt.rcv_tsval = ntohl(*ptr); ++ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); + ++ptr; +- if (*ptr) +- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; ++ if (net_hdr_word(ptr)) ++ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - ++ tp->tsoffset; + else + tp->rx_opt.rcv_tsecr = 0; + return true; +--- a/include/uapi/linux/if_pppox.h ++++ b/include/uapi/linux/if_pppox.h +@@ -51,6 +51,7 @@ struct pppoe_addr { + */ + struct pptp_addr { + __u16 call_id; ++ __u16 pad; + struct in_addr sin_addr; + }; + +--- a/net/ipv6/netfilter/nf_log_ipv6.c ++++ b/net/ipv6/netfilter/nf_log_ipv6.c +@@ -63,9 +63,9 @@ static void dump_ipv6_packet(struct net + /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ + nf_log_buf_add(m, "LEN=%zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", + ntohs(ih->payload_len) + sizeof(struct ipv6hdr), +- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, ++ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, + ih->hop_limit, +- (ntohl(*(__be32 *)ih) & 0x000fffff)); ++ (ntohl(net_hdr_word(ih)) & 0x000fffff)); + + fragment = 0; + ptr = ip6hoff + sizeof(struct ipv6hdr); +--- a/include/net/neighbour.h ++++ b/include/net/neighbour.h +@@ -274,8 +274,10 @@ static inline bool neigh_key_eq128(const + const u32 *n32 = (const u32 *)n->primary_key; + const u32 *p32 = pkey; + +- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | +- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; ++ return ((n32[0] ^ net_hdr_word(&p32[0])) | ++ (n32[1] ^ net_hdr_word(&p32[1])) | ++ (n32[2] ^ net_hdr_word(&p32[2])) | ++ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; + } + + static inline struct neighbour *___neigh_lookup_noref( +--- a/include/uapi/linux/netfilter_arp/arp_tables.h ++++ b/include/uapi/linux/netfilter_arp/arp_tables.h +@@ -70,7 +70,7 @@ struct arpt_arp { + __u8 flags; + /* Inverse flags */ + __u16 invflags; +-}; ++} __attribute__((aligned(4))); + + /* Values for "flag" field in struct arpt_ip (general arp structure). + * No flags defined yet. +--- a/net/core/utils.c ++++ b/net/core/utils.c +@@ -460,8 +460,14 @@ void inet_proto_csum_replace16(__sum16 * + bool pseudohdr) + { + __be32 diff[] = { +- ~from[0], ~from[1], ~from[2], ~from[3], +- to[0], to[1], to[2], to[3], ++ ~net_hdr_word(&from[0]), ++ ~net_hdr_word(&from[1]), ++ ~net_hdr_word(&from[2]), ++ ~net_hdr_word(&from[3]), ++ net_hdr_word(&to[0]), ++ net_hdr_word(&to[1]), ++ net_hdr_word(&to[2]), ++ net_hdr_word(&to[3]), + }; + if (skb->ip_summed != CHECKSUM_PARTIAL) { + *sum = csum_fold(csum_partial(diff, sizeof(diff), +--- a/include/linux/etherdevice.h ++++ b/include/linux/etherdevice.h +@@ -489,7 +489,7 @@ static inline bool is_etherdev_addr(cons + * @b: Pointer to Ethernet header + * + * Compare two Ethernet headers, returns 0 if equal. +- * This assumes that the network header (i.e., IP header) is 4-byte ++ * This assumes that the network header (i.e., IP header) is 2-byte + * aligned OR the platform can handle unaligned access. This is the + * case for all packets coming into netif_receive_skb or similar + * entry points. +@@ -512,11 +512,12 @@ static inline unsigned long compare_ethe + fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); + return fold; + #else +- u32 *a32 = (u32 *)((u8 *)a + 2); +- u32 *b32 = (u32 *)((u8 *)b + 2); ++ const u16 *a16 = a; ++ const u16 *b16 = b; + +- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | +- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]); ++ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) | ++ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) | ++ (a16[6] ^ b16[6]); + #endif + } + +--- a/net/ipv4/tcp_offload.c ++++ b/net/ipv4/tcp_offload.c +@@ -223,7 +223,7 @@ struct sk_buff *tcp_gro_receive(struct l + + th2 = tcp_hdr(p); + +- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) { ++ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) { + NAPI_GRO_CB(p)->same_flow = 0; + continue; + } +@@ -241,8 +241,8 @@ found: + ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); + flush |= (__force int)(th->ack_seq ^ th2->ack_seq); + for (i = sizeof(*th); i < thlen; i += 4) +- flush |= *(u32 *)((u8 *)th + i) ^ +- *(u32 *)((u8 *)th2 + i); ++ flush |= net_hdr_word((u8 *)th + i) ^ ++ net_hdr_word((u8 *)th2 + i); + + /* When we receive our second frame we can made a decision on if we + * continue this flow as an atomic flow with a fixed ID or if we use +--- a/net/ipv6/netfilter/ip6table_mangle.c ++++ b/net/ipv6/netfilter/ip6table_mangle.c +@@ -47,7 +47,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + hop_limit = ipv6_hdr(skb)->hop_limit; + + /* flowlabel and prio (includes version, which shouldn't change either */ +- flowlabel = *((u_int32_t *)ipv6_hdr(skb)); ++ flowlabel = net_hdr_word(ipv6_hdr(skb)); + + ret = ip6t_do_table(skb, state, state->net->ipv6.ip6table_mangle); + +@@ -56,7 +56,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || + skb->mark != mark || + ipv6_hdr(skb)->hop_limit != hop_limit || +- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) { ++ flowlabel != net_hdr_word(ipv6_hdr(skb)))) { + err = ip6_route_me_harder(state->net, state->sk, skb); + if (err < 0) + ret = NF_DROP_ERR(err); diff --git a/target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch b/target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch new file mode 100644 index 0000000000..dac2064cbb --- /dev/null +++ b/target/linux/ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch @@ -0,0 +1,54 @@ +From 4d3c17975c7814884a721fe693b3adf5c426d759 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Tue, 10 Nov 2015 22:18:39 +0100 +Subject: [RFC] serial: core: add support for boot console with arbitrary + baud rates + +The Arduino Yun uses a baud rate of 250000 by default. The serial is +going over the Atmel ATmega and is used to connect to this chip. +Without this patch Linux wants to switch the console to 9600 Baud. + +With this patch Linux will use the configured baud rate and not a +default one specified in uart_register_driver(). + +Signed-off-by: Hauke Mehrtens +[rebased to 4.14, slightly reworded commit message] +Signed-off-by: Sungbo Eo +--- + drivers/tty/serial/serial_core.c | 6 +++++- + include/linux/console.h | 1 + + 2 files changed, 6 insertions(+), 1 deletions(-) + +--- a/drivers/tty/serial/serial_core.c ++++ b/drivers/tty/serial/serial_core.c +@@ -220,6 +220,8 @@ static int uart_port_startup(struct tty_ + if (retval == 0) { + if (uart_console(uport) && uport->cons->cflag) { + tty->termios.c_cflag = uport->cons->cflag; ++ tty->termios.c_ospeed = uport->cons->baud; ++ tty->termios.c_ispeed = uport->cons->baud; + uport->cons->cflag = 0; + } + /* +@@ -2108,8 +2110,10 @@ uart_set_options(struct uart_port *port, + * Allow the setting of the UART parameters with a NULL console + * too: + */ +- if (co) ++ if (co) { + co->cflag = termios.c_cflag; ++ co->baud = baud; ++ } + + return 0; + } +--- a/include/linux/console.h ++++ b/include/linux/console.h +@@ -153,6 +153,7 @@ struct console { + short flags; + short index; + int cflag; ++ int baud; + void *data; + struct console *next; + }; diff --git a/target/linux/ath79/patches-5.10/930-ar8216-make-reg-access-atomic.patch b/target/linux/ath79/patches-5.10/930-ar8216-make-reg-access-atomic.patch new file mode 100644 index 0000000000..02f763534e --- /dev/null +++ b/target/linux/ath79/patches-5.10/930-ar8216-make-reg-access-atomic.patch @@ -0,0 +1,59 @@ +From b3797d1a92afe97c173b00fdb7824cedba24eef0 Mon Sep 17 00:00:00 2001 +From: Chuanhong Guo +Date: Sun, 20 Sep 2020 01:00:45 +0800 +Subject: [PATCH] ath79: ar8216: make switch register access atomic + +due to some unknown reason these register accesses sometimes fail +on the integrated switch without this patch. + +THIS ONLY WORKS ON ATH79 AND MAY BREAK THE DRIVER ON OTHER PLATFORMS! +The mdio bus on ath79 works in polling mode and doesn't rely on +any interrupt. This patch breaks the driver on any mdio master +with interrupts used. + +--- +--- a/drivers/net/phy/ar8216.c ++++ b/drivers/net/phy/ar8216.c +@@ -252,6 +252,7 @@ ar8xxx_mii_write32(struct ar8xxx_priv *p + u32 + ar8xxx_read(struct ar8xxx_priv *priv, int reg) + { ++ unsigned long flags; + struct mii_bus *bus = priv->mii_bus; + u16 r1, r2, page; + u32 val; +@@ -259,11 +260,13 @@ ar8xxx_read(struct ar8xxx_priv *priv, in + split_addr((u32) reg, &r1, &r2, &page); + + mutex_lock(&bus->mdio_lock); ++ local_irq_save(flags); + + bus->write(bus, 0x18, 0, page); + wait_for_page_switch(); + val = ar8xxx_mii_read32(priv, 0x10 | r2, r1); + ++ local_irq_restore(flags); + mutex_unlock(&bus->mdio_lock); + + return val; +@@ -272,17 +275,20 @@ ar8xxx_read(struct ar8xxx_priv *priv, in + void + ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val) + { ++ unsigned long flags; + struct mii_bus *bus = priv->mii_bus; + u16 r1, r2, page; + + split_addr((u32) reg, &r1, &r2, &page); + + mutex_lock(&bus->mdio_lock); ++ local_irq_save(flags); + + bus->write(bus, 0x18, 0, page); + wait_for_page_switch(); + ar8xxx_mii_write32(priv, 0x10 | r2, r1, val); + ++ local_irq_restore(flags); + mutex_unlock(&bus->mdio_lock); + } + diff --git a/target/linux/ath79/tiny/target.mk b/target/linux/ath79/tiny/target.mk index 91f135b56e..74b3e966c4 100644 --- a/target/linux/ath79/tiny/target.mk +++ b/target/linux/ath79/tiny/target.mk @@ -3,6 +3,8 @@ FEATURES += small_flash DEFAULT_PACKAGES += wpad-basic-wolfssl +KERNEL_TESTING_PATCHVER:=5.10 + define Target/Description Build firmware images for Atheros AR71xx/AR913x/AR934x based boards with small flash endef From 10e84bde369d7cfb60d6ac6ee5c7211474bd4179 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Fri, 19 Feb 2021 02:30:14 +0100 Subject: [PATCH 21/23] openssl: update package sources OpenSSL downloads itself are distributed using Akamai CDN, so use these sources as the highest priority. Remove a stale mirror which seems to be offline for a longer time already. Add fallbacks to the old release path also for the mirrors. Signed-off-by: David Bauer --- package/libs/openssl/Makefile | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/package/libs/openssl/Makefile b/package/libs/openssl/Makefile index 4fb4cb2784..7dbbd65026 100644 --- a/package/libs/openssl/Makefile +++ b/package/libs/openssl/Makefile @@ -19,11 +19,13 @@ PKG_BUILD_PARALLEL:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:= \ - http://ftp.fi.muni.cz/pub/openssl/source/ \ - http://ftp.linux.hr/pub/openssl/source/ \ - ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/ \ http://www.openssl.org/source/ \ - http://www.openssl.org/source/old/$(PKG_BASE)/ + http://www.openssl.org/source/old/$(PKG_BASE)/ \ + http://ftp.fi.muni.cz/pub/openssl/source/ \ + http://ftp.fi.muni.cz/pub/openssl/source/old/$(PKG_BASE)/ \ + ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/ \ + ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/old/$(PKG_BASE)/ + PKG_HASH:=aaf2fcb575cdf6491b98ab4829abf78a3dec8402b8b81efc8f23c00d443981bf PKG_LICENSE:=OpenSSL From af1b6799c6ec9af7a30d63a5ddfed20f443b991c Mon Sep 17 00:00:00 2001 From: Stijn Segers Date: Fri, 19 Feb 2021 23:11:09 +0100 Subject: [PATCH 22/23] ramips: overwrite reset gpio properties in EX6150 DTS The Netgear EX6150 can, just like the D-Link DIR-860L rev B1, fail to initialise both radios in some cases. Add the reset GPIOs explicitly so the PCI-E devices get re-initialised properly. See also FS #3632. Error shows up in dmesg as follows: [ 1.560764] mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK) Tested-by: Kurt Roeckx Signed-off-by: Stijn Segers [removed period from commit title] Signed-off-by: David Bauer --- target/linux/ramips/dts/mt7621_netgear_ex6150.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/linux/ramips/dts/mt7621_netgear_ex6150.dts b/target/linux/ramips/dts/mt7621_netgear_ex6150.dts index 2bf858b226..0da8f6b30c 100644 --- a/target/linux/ramips/dts/mt7621_netgear_ex6150.dts +++ b/target/linux/ramips/dts/mt7621_netgear_ex6150.dts @@ -206,6 +206,9 @@ &pcie { status = "okay"; + + reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>, + <&gpio 8 GPIO_ACTIVE_LOW>; }; &pcie0 { From bb817bb4b8b0b546a70e45bd907ebfeea2370dcd Mon Sep 17 00:00:00 2001 From: David Bauer Date: Fri, 20 Nov 2020 03:03:54 +0100 Subject: [PATCH 23/23] sdk: expose binary strip settings Expose the SDK options for binary stripping to the menuconfig. This way, packages can easily be built with debug symbols using the SDK. Signed-off-by: David Bauer --- target/sdk/files/Config.in | 46 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/target/sdk/files/Config.in b/target/sdk/files/Config.in index 4393daab5b..f687992497 100644 --- a/target/sdk/files/Config.in +++ b/target/sdk/files/Config.in @@ -18,6 +18,52 @@ menu "Global build settings" bool "Cryptographically sign package lists" default y + comment "Package build options" + + config DEBUG + bool + prompt "Compile packages with debugging info" + default n + help + Adds -g3 to the CFLAGS. + + comment "Stripping options" + + choice + prompt "Binary stripping method" + default USE_STRIP if EXTERNAL_TOOLCHAIN + default USE_STRIP if USE_GLIBC + default USE_SSTRIP + help + Select the binary stripping method you wish to use. + + config NO_STRIP + bool "none" + help + This will install unstripped binaries (useful for native + compiling/debugging). + + config USE_STRIP + bool "strip" + help + This will install binaries stripped using strip from binutils. + + config USE_SSTRIP + bool "sstrip" + depends on !USE_GLIBC + help + This will install binaries stripped using sstrip. + endchoice + + config STRIP_ARGS + string + prompt "Strip arguments" + depends on USE_STRIP + default "--strip-unneeded --remove-section=.comment --remove-section=.note" if DEBUG + default "--strip-all" + help + Specifies arguments passed to the strip command when stripping binaries. + endmenu menu "Advanced configuration options (for developers)"