From f8ccf8a7a8a4c52eff1c3c1738fb75b4896be1bc Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Mon, 8 Jul 2024 20:47:01 +0200
Subject: [PATCH 01/18] tools: util-linux: disable NLS again

It seems that util-linux enables NLS support by default, this worked for
almost all platforms except for macOS on x86 where it seems that libintl is
preinstalled and thus it will link against gettext with libintl for NLS
support.

This would the later cause e2fsprogs and mtd-utils to fail:
Undefined symbols for architecture x86_64:
  "_libintl_gettext", referenced from:
      _random_tell_source in libuuid.a[13](libuuid_la-randutils.o)
ld: symbol(s) not found for architecture x86_64
clang: error: linker command failed with exit code 1 (use -v to see invocation)

Issue appeared after I converted the tool to use --disable-all-programs and
accidentally dropped the --disable-nls from the args.

Fixes: 54115ec22d15 ("tools: util-linux: use --disable-all-programs")
Link: https://github.com/openwrt/openwrt/pull/15909
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 tools/util-linux/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/util-linux/Makefile b/tools/util-linux/Makefile
index b4cc45efc8..0394907a96 100644
--- a/tools/util-linux/Makefile
+++ b/tools/util-linux/Makefile
@@ -23,6 +23,7 @@ include $(INCLUDE_DIR)/host-build.mk
 HOST_CONFIGURE_ARGS += \
 	--with-pic \
 	--disable-shared \
+	--disable-nls \
 	--disable-all-programs \
 	--enable-hexdump \
 	--enable-libuuid \

From e5d23b5aa5346de30befc2b05000a3967ca5b460 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 9 Jul 2024 04:41:21 +0200
Subject: [PATCH 02/18] image: exclude initramfs-images dependency with IB

Exclude initramfs-images dependency with IB as the target is not defined
in such context.

Fixes: cc6a0abcabf7 ("image: make images and artifacts dependent of initramfs")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 include/image.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/image.mk b/include/image.mk
index 60bb01b9cb..fdd2ee9ef2 100644
--- a/include/image.mk
+++ b/include/image.mk
@@ -671,7 +671,7 @@ define Device/Build/image
   ifndef IB
     $$(ROOTFS/$(1)/$(3)): $(if $(TARGET_PER_DEVICE_ROOTFS),target-dir-$$(ROOTFS_ID/$(3)))
   endif
-  $(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2)): $$(KDIR_KERNEL_IMAGE) $$(ROOTFS/$(1)/$(3)) $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),$(3)-initramfs-images)
+  $(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2)): $$(KDIR_KERNEL_IMAGE) $$(ROOTFS/$(1)/$(3)) $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),$(if $(IB),,$(3)-initramfs-images))
 	@rm -f $$@
 	[ -f $$(word 1,$$^) -a -f $$(word 2,$$^) ]
 	$$(call concat_cmd,$(if $(IMAGE/$(2)/$(1)),$(IMAGE/$(2)/$(1)),$(IMAGE/$(2))))
@@ -730,7 +730,7 @@ define Device/Build/artifact
 	  $(BUILD_DIR)/json_info_files/$(DEVICE_IMG_PREFIX)-$(1).json, \
 	  $(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1))
   $(eval $(call Device/Export,$(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1)))
-  $(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1): $$(KDIR_KERNEL_IMAGE) $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),$(2)-initramfs-images) $(2)-images
+  $(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1): $$(KDIR_KERNEL_IMAGE) $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),$(if $(IB),,$(2)-initramfs-images)) $(2)-images
 	@rm -f $$@
 	$$(call concat_cmd,$(ARTIFACT/$(1)))
 

From d55f4aeee0bf923e0513e6feccc5eb812d972128 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sun, 25 Jun 2023 11:29:24 +0200
Subject: [PATCH 03/18] kernel: qca-ssdk: set OF node for the SFP PHY

Currently, SSDK is creating a fake SFP PHY which has no OF node populated,
thus making it impossible to pass it to NSS-DP so port can actually work.

We eliminated QCA-s connecting of the PHY by manually creating a string
and then matching by name and instead only support passing the PHY as
phandle via phy-handle.

So, lets just use the switch port node to which the SFP is connected to
anyway and set it as the PHY device OF node so we can pass it to NSS-DP.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 ...004-SSDK-set-OF-node-for-the-SFP-PHY.patch | 94 +++++++++++++++++++
 ...-selecting-PCS-channel-for-PORT3-on-.patch |  2 +-
 ...l_phy-add-support-for-AQR114C-B0-PHY.patch |  2 +-
 3 files changed, 96 insertions(+), 2 deletions(-)
 create mode 100644 package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch

diff --git a/package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch b/package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch
new file mode 100644
index 0000000000..2cd167c8dd
--- /dev/null
+++ b/package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch
@@ -0,0 +1,94 @@
+From 00d3c54c611143f57b632e4cd3b42b0a94d82307 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Sun, 25 Jun 2023 11:24:09 +0200
+Subject: [PATCH 3/3] SSDK: set OF node for the SFP PHY
+
+Currently, SSDK is creating a fake SFP PHY which has no OF node populated,
+thus making it impossible to pass it to NSS-DP so port can actually work.
+
+We eliminated QCA-s connecting of the PHY by manually creating a string
+and then matching by name and instead only support passing the PHY as
+phandle via phy-handle.
+
+So, lets just use the switch port node to which the SFP is connected to
+anyway and set it as the PHY device OF node so we can pass it to NSS-DP.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ include/hsl/phy/hsl_phy.h |  6 ++++++
+ src/hsl/phy/hsl_phy.c     | 14 ++++++++++++++
+ src/hsl/phy/sfp_phy.c     |  7 +++++++
+ src/init/ssdk_dts.c       |  7 +++++++
+ 4 files changed, 34 insertions(+)
+
+--- a/include/hsl/phy/hsl_phy.h
++++ b/include/hsl/phy/hsl_phy.h
+@@ -584,6 +584,7 @@ typedef struct {
+ 	a_bool_t port_link_status[SW_MAX_NR_PORT];
+ 	a_uint32_t port_mode[SW_MAX_NR_PORT];
+ 	a_uint32_t combo_phy_type[SW_MAX_NR_PORT];
++	struct device_node *port_node[SW_MAX_NR_PORT];
+ } phy_info_t;
+ /*qca808x_end*/
+ #define MALIBU5PORT_PHY         0x004DD0B1
+@@ -1038,3 +1039,8 @@ hsl_phydev_eee_update(a_uint32_t dev_id,
+ #endif				/* __cplusplus */
+ #endif				/* _HSL_PHY_H_ */
+ /*qca808x_end*/
++
++struct device_node*
++hsl_port_node_get(a_uint32_t dev_id, a_uint32_t port_id);
++void
++hsl_port_node_set(a_uint32_t dev_id, a_uint32_t port_id, struct device_node *port_node);
+--- a/src/hsl/phy/hsl_phy.c
++++ b/src/hsl/phy/hsl_phy.c
+@@ -3433,3 +3433,17 @@ hsl_phy_modify_debug(a_uint32_t dev_id,
+ 	return rv;
+ }
+ /*qca808x_end*/
++
++struct device_node*
++hsl_port_node_get(a_uint32_t dev_id, a_uint32_t port_id)
++{
++	return phy_info[dev_id]->port_node[port_id];
++}
++
++void
++hsl_port_node_set(a_uint32_t dev_id, a_uint32_t port_id, struct device_node *port_node)
++{
++	phy_info[dev_id]->port_node[port_id] = port_node;
++
++	return;
++}
+--- a/src/hsl/phy/sfp_phy.c
++++ b/src/hsl/phy/sfp_phy.c
+@@ -335,6 +335,13 @@ int sfp_phy_device_setup(a_uint32_t dev_
+ 	phy_device_register(phydev);
+ 
+ 	phydev->priv = priv;
++	/*
++	 * Set the PHY OF node in order to be able to later connect the
++	 * fake SFP PHY by passing it as a phandle in phy-handle.
++	 */
++	phydev->mdio.dev.of_node = hsl_port_node_get(dev_id, port);
++	if (!phydev->mdio.dev.of_node)
++		return SW_NOT_FOUND;
+ #if defined(IN_PHY_I2C_MODE)
+ 	if (hsl_port_phy_access_type_get(dev_id, port) == PHY_I2C_ACCESS) {
+ 		if(phydev->drv)
+--- a/src/init/ssdk_dts.c
++++ b/src/init/ssdk_dts.c
+@@ -784,6 +784,13 @@ static sw_error_t ssdk_dt_parse_phy_info
+ 			}
+ 		}
+ 		hsl_port_feature_set(dev_id, port_id, phy_features | PHY_F_INIT);
++
++		/*
++		* Save the port node so it can be passed as the
++		* fake SFP PHY OF node in order to be able to
++		* pass the SFP phy via phy-handle
++		*/
++		hsl_port_node_set(dev_id, port_id, port_node);
+ 	}
+ 
+ 	return rv;
diff --git a/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch b/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch
index db84ea1422..abd25d2214 100644
--- a/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch
+++ b/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch
@@ -125,7 +125,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
  #ifdef IN_UNIPHY
  static void ssdk_dt_parse_uniphy(a_uint32_t dev_id)
  {
-@@ -1347,6 +1373,7 @@ sw_error_t ssdk_dt_parse(ssdk_init_cfg *
+@@ -1354,6 +1380,7 @@ sw_error_t ssdk_dt_parse(ssdk_init_cfg *
  	rv = ssdk_dt_parse_access_mode(switch_node, ssdk_dt_priv);
  	SW_RTN_ON_ERROR(rv);
  	ssdk_dt_parse_mac_mode(*dev_id, switch_node, cfg);
diff --git a/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch b/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch
index 4422b67cf7..f144591d8d 100644
--- a/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch
+++ b/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch
@@ -13,7 +13,7 @@ Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
 
 --- a/include/hsl/phy/hsl_phy.h
 +++ b/include/hsl/phy/hsl_phy.h
-@@ -612,6 +612,7 @@ typedef struct {
+@@ -613,6 +613,7 @@ typedef struct {
  #define AQUANTIA_PHY_113C_B0    0x31c31C12
  #define AQUANTIA_PHY_113C_B1    0x31c31C13
  #define AQUANTIA_PHY_112C       0x03a1b792

From 157a33402d6ad900fe51e820f869a29f2f983c44 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 29 Jun 2023 20:18:10 +0200
Subject: [PATCH 04/18] qualcommax: ipq8074-ess: move switch to ess-instance
 node

It seems that newer SSDK is now expecting the switch node to be a subnode
of "ess-instance" node which also contains "num_devices" as the number of
switches as you can also have external switches connected.

Asus RT-AX89X is even more peculiar as its bootloader has a hardcoded path
to enable if on that revision there is an AQR113 connected to port 6 of the
switch.

So, lets move the current switch node under ess-instance as otherwise it
seems that SSDK is having some issues parsing the UNIPHY mode properly as
I am getting the following:
[    6.981404] _adpt_hppe_instance1_mode_get[3275]:ERROR:port 6 doesn't support port_interface_mode 9

Which should not happen as that port has the mode set to 13.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 .../arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi | 756 +++++++++---------
 1 file changed, 381 insertions(+), 375 deletions(-)

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
index 76838b86c5..194540aac1 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
@@ -17,407 +17,413 @@
 };
 
 &soc {
-	switch: ess-switch@3a000000 {
-		compatible = "qcom,ess-switch-ipq807x";
-		reg = <0x3a000000 0x1000000>;
-		switch_access_mode = "local bus";
-		switch_cpu_bmp = <ESS_PORT0>;  /* cpu port bitmap */
-		switch_inner_bmp = <ESS_PORT7>; /*inner port bitmap*/
-		clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
-			 <&gcc GCC_CMN_12GPLL_SYS_CLK>,
-			 <&gcc GCC_UNIPHY0_AHB_CLK>,
-			 <&gcc GCC_UNIPHY0_SYS_CLK>,
-			 <&gcc GCC_UNIPHY1_AHB_CLK>,
-			 <&gcc GCC_UNIPHY1_SYS_CLK>,
-			 <&gcc GCC_UNIPHY2_AHB_CLK>,
-			 <&gcc GCC_UNIPHY2_SYS_CLK>,
-			 <&gcc GCC_PORT1_MAC_CLK>,
-			 <&gcc GCC_PORT2_MAC_CLK>,
-			 <&gcc GCC_PORT3_MAC_CLK>,
-			 <&gcc GCC_PORT4_MAC_CLK>,
-			 <&gcc GCC_PORT5_MAC_CLK>,
-			 <&gcc GCC_PORT6_MAC_CLK>,
-			 <&gcc GCC_NSS_PPE_CLK>,
-			 <&gcc GCC_NSS_PPE_CFG_CLK>,
-			 <&gcc GCC_NSSNOC_PPE_CLK>,
-			 <&gcc GCC_NSSNOC_PPE_CFG_CLK>,
-			 <&gcc GCC_NSS_EDMA_CLK>,
-			 <&gcc GCC_NSS_EDMA_CFG_CLK>,
-			 <&gcc GCC_NSS_PPE_IPE_CLK>,
-			 <&gcc GCC_NSS_PPE_BTQ_CLK>,
-			 <&gcc GCC_MDIO_AHB_CLK>,
-			 <&gcc GCC_NSS_NOC_CLK>,
-			 <&gcc GCC_NSSNOC_SNOC_CLK>,
-			 <&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
-			 <&gcc GCC_NSS_CRYPTO_CLK>,
-			 <&gcc GCC_NSS_IMEM_CLK>,
-			 <&gcc GCC_NSS_PTP_REF_CLK>,
-			 <&gcc GCC_NSS_PORT1_RX_CLK>,
-			 <&gcc GCC_NSS_PORT1_TX_CLK>,
-			 <&gcc GCC_NSS_PORT2_RX_CLK>,
-			 <&gcc GCC_NSS_PORT2_TX_CLK>,
-			 <&gcc GCC_NSS_PORT3_RX_CLK>,
-			 <&gcc GCC_NSS_PORT3_TX_CLK>,
-			 <&gcc GCC_NSS_PORT4_RX_CLK>,
-			 <&gcc GCC_NSS_PORT4_TX_CLK>,
-			 <&gcc GCC_NSS_PORT5_RX_CLK>,
-			 <&gcc GCC_NSS_PORT5_TX_CLK>,
-			 <&gcc GCC_NSS_PORT6_RX_CLK>,
-			 <&gcc GCC_NSS_PORT6_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT1_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT1_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT2_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT2_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT3_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT3_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT4_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT4_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT5_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT5_TX_CLK>,
-			 <&gcc GCC_UNIPHY1_PORT5_RX_CLK>,
-			 <&gcc GCC_UNIPHY1_PORT5_TX_CLK>,
-			 <&gcc GCC_UNIPHY2_PORT6_RX_CLK>,
-			 <&gcc GCC_UNIPHY2_PORT6_TX_CLK>,
-			 <&gcc NSS_PORT5_RX_CLK_SRC>,
-			 <&gcc NSS_PORT5_TX_CLK_SRC>;
-		clock-names = "cmn_ahb_clk", "cmn_sys_clk",
-			      "uniphy0_ahb_clk", "uniphy0_sys_clk",
-			      "uniphy1_ahb_clk", "uniphy1_sys_clk",
-			      "uniphy2_ahb_clk", "uniphy2_sys_clk",
-			      "port1_mac_clk", "port2_mac_clk",
-			      "port3_mac_clk", "port4_mac_clk",
-			      "port5_mac_clk", "port6_mac_clk",
-			      "nss_ppe_clk", "nss_ppe_cfg_clk",
-			      "nssnoc_ppe_clk", "nssnoc_ppe_cfg_clk",
-			      "nss_edma_clk", "nss_edma_cfg_clk",
-			      "nss_ppe_ipe_clk", "nss_ppe_btq_clk",
-			      "gcc_mdio_ahb_clk", "gcc_nss_noc_clk",
-			      "gcc_nssnoc_snoc_clk",
-			      "gcc_mem_noc_nss_axi_clk",
-			      "gcc_nss_crypto_clk",
-			      "gcc_nss_imem_clk",
-			      "gcc_nss_ptp_ref_clk",
-			      "nss_port1_rx_clk", "nss_port1_tx_clk",
-			      "nss_port2_rx_clk", "nss_port2_tx_clk",
-			      "nss_port3_rx_clk", "nss_port3_tx_clk",
-			      "nss_port4_rx_clk", "nss_port4_tx_clk",
-			      "nss_port5_rx_clk", "nss_port5_tx_clk",
-			      "nss_port6_rx_clk", "nss_port6_tx_clk",
-			      "uniphy0_port1_rx_clk",
-			      "uniphy0_port1_tx_clk",
-			      "uniphy0_port2_rx_clk",
-			      "uniphy0_port2_tx_clk",
-			      "uniphy0_port3_rx_clk",
-			      "uniphy0_port3_tx_clk",
-			      "uniphy0_port4_rx_clk",
-			      "uniphy0_port4_tx_clk",
-			      "uniphy0_port5_rx_clk",
-			      "uniphy0_port5_tx_clk",
-			      "uniphy1_port5_rx_clk",
-			      "uniphy1_port5_tx_clk",
-			      "uniphy2_port6_rx_clk",
-			      "uniphy2_port6_tx_clk",
-			      "nss_port5_rx_clk_src",
-			      "nss_port5_tx_clk_src";
-		resets = <&gcc GCC_PPE_FULL_RESET>,
-			 <&gcc GCC_UNIPHY0_SOFT_RESET>,
-			 <&gcc GCC_UNIPHY0_XPCS_RESET>,
-			 <&gcc GCC_UNIPHY1_SOFT_RESET>,
-			 <&gcc GCC_UNIPHY1_XPCS_RESET>,
-			 <&gcc GCC_UNIPHY2_SOFT_RESET>,
-			 <&gcc GCC_UNIPHY2_XPCS_RESET>,
-			 <&gcc GCC_NSSPORT1_RESET>,
-			 <&gcc GCC_NSSPORT2_RESET>,
-			 <&gcc GCC_NSSPORT3_RESET>,
-			 <&gcc GCC_NSSPORT4_RESET>,
-			 <&gcc GCC_NSSPORT5_RESET>,
-			 <&gcc GCC_NSSPORT6_RESET>;
-		reset-names = "ppe_rst", "uniphy0_soft_rst",
-			      "uniphy0_xpcs_rst", "uniphy1_soft_rst",
-			      "uniphy1_xpcs_rst", "uniphy2_soft_rst",
-			      "uniphy2_xpcs_rst", "nss_port1_rst",
-			      "nss_port2_rst", "nss_port3_rst",
-			      "nss_port4_rst", "nss_port5_rst",
-			      "nss_port6_rst";
-		mdio-bus = <&mdio>;
+	ess_instance: ess-instance {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		num_devices = <1>;
 
-		switch_mac_mode = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 0 */
-		switch_mac_mode1 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 1 */
-		switch_mac_mode2 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 2 */
+		switch: ess-switch@3a000000 {
+			compatible = "qcom,ess-switch-ipq807x";
+			reg = <0x3a000000 0x1000000>;
+			switch_access_mode = "local bus";
+			switch_cpu_bmp = <ESS_PORT0>;  /* cpu port bitmap */
+			switch_inner_bmp = <ESS_PORT7>; /*inner port bitmap*/
+			clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
+				 <&gcc GCC_CMN_12GPLL_SYS_CLK>,
+				 <&gcc GCC_UNIPHY0_AHB_CLK>,
+				 <&gcc GCC_UNIPHY0_SYS_CLK>,
+				 <&gcc GCC_UNIPHY1_AHB_CLK>,
+				 <&gcc GCC_UNIPHY1_SYS_CLK>,
+				 <&gcc GCC_UNIPHY2_AHB_CLK>,
+				 <&gcc GCC_UNIPHY2_SYS_CLK>,
+				 <&gcc GCC_PORT1_MAC_CLK>,
+				 <&gcc GCC_PORT2_MAC_CLK>,
+				 <&gcc GCC_PORT3_MAC_CLK>,
+				 <&gcc GCC_PORT4_MAC_CLK>,
+				 <&gcc GCC_PORT5_MAC_CLK>,
+				 <&gcc GCC_PORT6_MAC_CLK>,
+				 <&gcc GCC_NSS_PPE_CLK>,
+				 <&gcc GCC_NSS_PPE_CFG_CLK>,
+				 <&gcc GCC_NSSNOC_PPE_CLK>,
+				 <&gcc GCC_NSSNOC_PPE_CFG_CLK>,
+				 <&gcc GCC_NSS_EDMA_CLK>,
+				 <&gcc GCC_NSS_EDMA_CFG_CLK>,
+				 <&gcc GCC_NSS_PPE_IPE_CLK>,
+				 <&gcc GCC_NSS_PPE_BTQ_CLK>,
+				 <&gcc GCC_MDIO_AHB_CLK>,
+				 <&gcc GCC_NSS_NOC_CLK>,
+				 <&gcc GCC_NSSNOC_SNOC_CLK>,
+				 <&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
+				 <&gcc GCC_NSS_CRYPTO_CLK>,
+				 <&gcc GCC_NSS_IMEM_CLK>,
+				 <&gcc GCC_NSS_PTP_REF_CLK>,
+				 <&gcc GCC_NSS_PORT1_RX_CLK>,
+				 <&gcc GCC_NSS_PORT1_TX_CLK>,
+				 <&gcc GCC_NSS_PORT2_RX_CLK>,
+				 <&gcc GCC_NSS_PORT2_TX_CLK>,
+				 <&gcc GCC_NSS_PORT3_RX_CLK>,
+				 <&gcc GCC_NSS_PORT3_TX_CLK>,
+				 <&gcc GCC_NSS_PORT4_RX_CLK>,
+				 <&gcc GCC_NSS_PORT4_TX_CLK>,
+				 <&gcc GCC_NSS_PORT5_RX_CLK>,
+				 <&gcc GCC_NSS_PORT5_TX_CLK>,
+				 <&gcc GCC_NSS_PORT6_RX_CLK>,
+				 <&gcc GCC_NSS_PORT6_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT1_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT1_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT2_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT2_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT3_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT3_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT4_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT4_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT5_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT5_TX_CLK>,
+				 <&gcc GCC_UNIPHY1_PORT5_RX_CLK>,
+				 <&gcc GCC_UNIPHY1_PORT5_TX_CLK>,
+				 <&gcc GCC_UNIPHY2_PORT6_RX_CLK>,
+				 <&gcc GCC_UNIPHY2_PORT6_TX_CLK>,
+				 <&gcc NSS_PORT5_RX_CLK_SRC>,
+				 <&gcc NSS_PORT5_TX_CLK_SRC>;
+			clock-names = "cmn_ahb_clk", "cmn_sys_clk",
+				      "uniphy0_ahb_clk", "uniphy0_sys_clk",
+				      "uniphy1_ahb_clk", "uniphy1_sys_clk",
+				      "uniphy2_ahb_clk", "uniphy2_sys_clk",
+				      "port1_mac_clk", "port2_mac_clk",
+				      "port3_mac_clk", "port4_mac_clk",
+				      "port5_mac_clk", "port6_mac_clk",
+				      "nss_ppe_clk", "nss_ppe_cfg_clk",
+				      "nssnoc_ppe_clk", "nssnoc_ppe_cfg_clk",
+				      "nss_edma_clk", "nss_edma_cfg_clk",
+				      "nss_ppe_ipe_clk", "nss_ppe_btq_clk",
+				      "gcc_mdio_ahb_clk", "gcc_nss_noc_clk",
+				      "gcc_nssnoc_snoc_clk",
+				      "gcc_mem_noc_nss_axi_clk",
+				      "gcc_nss_crypto_clk",
+				      "gcc_nss_imem_clk",
+				      "gcc_nss_ptp_ref_clk",
+				      "nss_port1_rx_clk", "nss_port1_tx_clk",
+				      "nss_port2_rx_clk", "nss_port2_tx_clk",
+				      "nss_port3_rx_clk", "nss_port3_tx_clk",
+				      "nss_port4_rx_clk", "nss_port4_tx_clk",
+				      "nss_port5_rx_clk", "nss_port5_tx_clk",
+				      "nss_port6_rx_clk", "nss_port6_tx_clk",
+				      "uniphy0_port1_rx_clk",
+				      "uniphy0_port1_tx_clk",
+				      "uniphy0_port2_rx_clk",
+				      "uniphy0_port2_tx_clk",
+				      "uniphy0_port3_rx_clk",
+				      "uniphy0_port3_tx_clk",
+				      "uniphy0_port4_rx_clk",
+				      "uniphy0_port4_tx_clk",
+				      "uniphy0_port5_rx_clk",
+				      "uniphy0_port5_tx_clk",
+				      "uniphy1_port5_rx_clk",
+				      "uniphy1_port5_tx_clk",
+				      "uniphy2_port6_rx_clk",
+				      "uniphy2_port6_tx_clk",
+				      "nss_port5_rx_clk_src",
+				      "nss_port5_tx_clk_src";
+			resets = <&gcc GCC_PPE_FULL_RESET>,
+				 <&gcc GCC_UNIPHY0_SOFT_RESET>,
+				 <&gcc GCC_UNIPHY0_XPCS_RESET>,
+				 <&gcc GCC_UNIPHY1_SOFT_RESET>,
+				 <&gcc GCC_UNIPHY1_XPCS_RESET>,
+				 <&gcc GCC_UNIPHY2_SOFT_RESET>,
+				 <&gcc GCC_UNIPHY2_XPCS_RESET>,
+				 <&gcc GCC_NSSPORT1_RESET>,
+				 <&gcc GCC_NSSPORT2_RESET>,
+				 <&gcc GCC_NSSPORT3_RESET>,
+				 <&gcc GCC_NSSPORT4_RESET>,
+				 <&gcc GCC_NSSPORT5_RESET>,
+				 <&gcc GCC_NSSPORT6_RESET>;
+			reset-names = "ppe_rst", "uniphy0_soft_rst",
+				      "uniphy0_xpcs_rst", "uniphy1_soft_rst",
+				      "uniphy1_xpcs_rst", "uniphy2_soft_rst",
+				      "uniphy2_xpcs_rst", "nss_port1_rst",
+				      "nss_port2_rst", "nss_port3_rst",
+				      "nss_port4_rst", "nss_port5_rst",
+				      "nss_port6_rst";
+			mdio-bus = <&mdio>;
 
-		bm_tick_mode = <0>; /* bm tick mode */
-		tm_tick_mode = <0>; /* tm tick mode */
+			switch_mac_mode = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 0 */
+			switch_mac_mode1 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 1 */
+			switch_mac_mode2 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 2 */
 
-		status = "disabled";
+			bm_tick_mode = <0>; /* bm tick mode */
+			tm_tick_mode = <0>; /* tm tick mode */
 
-		port_scheduler_resource {
-			port@0 {
-				port_id = <0>;
-				ucast_queue = <0 143>;
-				mcast_queue = <256 271>;
-				l0sp = <0 35>;
-				l0cdrr = <0 47>;
-				l0edrr = <0 47>;
-				l1cdrr = <0 7>;
-				l1edrr = <0 7>;
-			};
-			port@1 {
-				port_id = <1>;
-				ucast_queue = <144 159>;
-				mcast_queue = <272 275>;
-				l0sp = <36 39>;
-				l0cdrr = <48 63>;
-				l0edrr = <48 63>;
-				l1cdrr = <8 11>;
-				l1edrr = <8 11>;
-			};
-			port@2 {
-				port_id = <2>;
-				ucast_queue = <160 175>;
-				mcast_queue = <276 279>;
-				l0sp = <40 43>;
-				l0cdrr = <64 79>;
-				l0edrr = <64 79>;
-				l1cdrr = <12 15>;
-				l1edrr = <12 15>;
-			};
-			port@3 {
-				port_id = <3>;
-				ucast_queue = <176 191>;
-				mcast_queue = <280 283>;
-				l0sp = <44 47>;
-				l0cdrr = <80 95>;
-				l0edrr = <80 95>;
-				l1cdrr = <16 19>;
-				l1edrr = <16 19>;
-			};
-			port@4 {
-				port_id = <4>;
-				ucast_queue = <192 207>;
-				mcast_queue = <284 287>;
-				l0sp = <48 51>;
-				l0cdrr = <96 111>;
-				l0edrr = <96 111>;
-				l1cdrr = <20 23>;
-				l1edrr = <20 23>;
-			};
-			port@5 {
-				port_id = <5>;
-				ucast_queue = <208 223>;
-				mcast_queue = <288 291>;
-				l0sp = <52 55>;
-				l0cdrr = <112 127>;
-				l0edrr = <112 127>;
-				l1cdrr = <24 27>;
-				l1edrr = <24 27>;
-			};
-			port@6 {
-				port_id = <6>;
-				ucast_queue = <224 239>;
-				mcast_queue = <292 295>;
-				l0sp = <56 59>;
-				l0cdrr = <128 143>;
-				l0edrr = <128 143>;
-				l1cdrr = <28 31>;
-				l1edrr = <28 31>;
-			};
-			port@7 {
-				port_id = <7>;
-				ucast_queue = <240 255>;
-				mcast_queue = <296 299>;
-				l0sp = <60 63>;
-				l0cdrr = <144 159>;
-				l0edrr = <144 159>;
-				l1cdrr = <32 35>;
-				l1edrr = <32 35>;
-			};
-		};
-		port_scheduler_config {
-			port@0 {
-				port_id = <0>;
-				l1scheduler {
-					group@0 {
-						sp = <0 1>; /*L0 SPs*/
-						/*cpri cdrr epri edrr*/
-						cfg = <0 0 0 0>;
-					};
+			status = "disabled";
+
+			port_scheduler_resource {
+				port@0 {
+					port_id = <0>;
+					ucast_queue = <0 143>;
+					mcast_queue = <256 271>;
+					l0sp = <0 35>;
+					l0cdrr = <0 47>;
+					l0edrr = <0 47>;
+					l1cdrr = <0 7>;
+					l1edrr = <0 7>;
 				};
-				l0scheduler {
-					group@0 {
-						/*unicast queues*/
-						ucast_queue = <0 4 8>;
-						/*multicast queues*/
-						mcast_queue = <256 260>;
-						/*sp cpri cdrr epri edrr*/
-						cfg = <0 0 0 0 0>;
-					};
-					group@1 {
-						ucast_queue = <1 5 9>;
-						mcast_queue = <257 261>;
-						cfg = <0 1 1 1 1>;
-					};
-					group@2 {
-						ucast_queue = <2 6 10>;
-						mcast_queue = <258 262>;
-						cfg = <0 2 2 2 2>;
-					};
-					group@3 {
-						ucast_queue = <3 7 11>;
-						mcast_queue = <259 263>;
-						cfg = <0 3 3 3 3>;
-					};
+				port@1 {
+					port_id = <1>;
+					ucast_queue = <144 159>;
+					mcast_queue = <272 275>;
+					l0sp = <36 39>;
+					l0cdrr = <48 63>;
+					l0edrr = <48 63>;
+					l1cdrr = <8 11>;
+					l1edrr = <8 11>;
+				};
+				port@2 {
+					port_id = <2>;
+					ucast_queue = <160 175>;
+					mcast_queue = <276 279>;
+					l0sp = <40 43>;
+					l0cdrr = <64 79>;
+					l0edrr = <64 79>;
+					l1cdrr = <12 15>;
+					l1edrr = <12 15>;
+				};
+				port@3 {
+					port_id = <3>;
+					ucast_queue = <176 191>;
+					mcast_queue = <280 283>;
+					l0sp = <44 47>;
+					l0cdrr = <80 95>;
+					l0edrr = <80 95>;
+					l1cdrr = <16 19>;
+					l1edrr = <16 19>;
+				};
+				port@4 {
+					port_id = <4>;
+					ucast_queue = <192 207>;
+					mcast_queue = <284 287>;
+					l0sp = <48 51>;
+					l0cdrr = <96 111>;
+					l0edrr = <96 111>;
+					l1cdrr = <20 23>;
+					l1edrr = <20 23>;
+				};
+				port@5 {
+					port_id = <5>;
+					ucast_queue = <208 223>;
+					mcast_queue = <288 291>;
+					l0sp = <52 55>;
+					l0cdrr = <112 127>;
+					l0edrr = <112 127>;
+					l1cdrr = <24 27>;
+					l1edrr = <24 27>;
+				};
+				port@6 {
+					port_id = <6>;
+					ucast_queue = <224 239>;
+					mcast_queue = <292 295>;
+					l0sp = <56 59>;
+					l0cdrr = <128 143>;
+					l0edrr = <128 143>;
+					l1cdrr = <28 31>;
+					l1edrr = <28 31>;
+				};
+				port@7 {
+					port_id = <7>;
+					ucast_queue = <240 255>;
+					mcast_queue = <296 299>;
+					l0sp = <60 63>;
+					l0cdrr = <144 159>;
+					l0edrr = <144 159>;
+					l1cdrr = <32 35>;
+					l1edrr = <32 35>;
 				};
 			};
-			port@1 {
-				port_id = <1>;
-				l1scheduler {
-					group@0 {
-						sp = <36>;
-						cfg = <0 8 0 8>;
+			port_scheduler_config {
+				port@0 {
+					port_id = <0>;
+					l1scheduler {
+						group@0 {
+							sp = <0 1>; /*L0 SPs*/
+							/*cpri cdrr epri edrr*/
+							cfg = <0 0 0 0>;
+						};
 					};
-					group@1 {
-						sp = <37>;
-						cfg = <1 9 1 9>;
+					l0scheduler {
+						group@0 {
+							/*unicast queues*/
+							ucast_queue = <0 4 8>;
+							/*multicast queues*/
+							mcast_queue = <256 260>;
+							/*sp cpri cdrr epri edrr*/
+							cfg = <0 0 0 0 0>;
+						};
+						group@1 {
+							ucast_queue = <1 5 9>;
+							mcast_queue = <257 261>;
+							cfg = <0 1 1 1 1>;
+						};
+						group@2 {
+							ucast_queue = <2 6 10>;
+							mcast_queue = <258 262>;
+							cfg = <0 2 2 2 2>;
+						};
+						group@3 {
+							ucast_queue = <3 7 11>;
+							mcast_queue = <259 263>;
+							cfg = <0 3 3 3 3>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <144>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <272>;
-						mcast_loop_pri = <4>;
-						cfg = <36 0 48 0 48>;
+				port@1 {
+					port_id = <1>;
+					l1scheduler {
+						group@0 {
+							sp = <36>;
+							cfg = <0 8 0 8>;
+						};
+						group@1 {
+							sp = <37>;
+							cfg = <1 9 1 9>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <144>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <272>;
+							mcast_loop_pri = <4>;
+							cfg = <36 0 48 0 48>;
+						};
 					};
 				};
-			};
-			port@2 {
-				port_id = <2>;
-				l1scheduler {
-					group@0 {
-						sp = <40>;
-						cfg = <0 12 0 12>;
+				port@2 {
+					port_id = <2>;
+					l1scheduler {
+						group@0 {
+							sp = <40>;
+							cfg = <0 12 0 12>;
+						};
+						group@1 {
+							sp = <41>;
+							cfg = <1 13 1 13>;
+						};
 					};
-					group@1 {
-						sp = <41>;
-						cfg = <1 13 1 13>;
+					l0scheduler {
+						group@0 {
+							ucast_queue = <160>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <276>;
+							mcast_loop_pri = <4>;
+							cfg = <40 0 64 0 64>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <160>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <276>;
-						mcast_loop_pri = <4>;
-						cfg = <40 0 64 0 64>;
+				port@3 {
+					port_id = <3>;
+					l1scheduler {
+						group@0 {
+							sp = <44>;
+							cfg = <0 16 0 16>;
+						};
+						group@1 {
+							sp = <45>;
+							cfg = <1 17 1 17>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <176>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <280>;
+							mcast_loop_pri = <4>;
+							cfg = <44 0 80 0 80>;
+						};
 					};
 				};
-			};
-			port@3 {
-				port_id = <3>;
-				l1scheduler {
-					group@0 {
-						sp = <44>;
-						cfg = <0 16 0 16>;
+				port@4 {
+					port_id = <4>;
+					l1scheduler {
+						group@0 {
+							sp = <48>;
+							cfg = <0 20 0 20>;
+						};
+						group@1 {
+							sp = <49>;
+							cfg = <1 21 1 21>;
+						};
 					};
-					group@1 {
-						sp = <45>;
-						cfg = <1 17 1 17>;
+					l0scheduler {
+						group@0 {
+							ucast_queue = <192>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <284>;
+							mcast_loop_pri = <4>;
+							cfg = <48 0 96 0 96>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <176>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <280>;
-						mcast_loop_pri = <4>;
-						cfg = <44 0 80 0 80>;
+				port@5 {
+					port_id = <5>;
+					l1scheduler {
+						group@0 {
+							sp = <52>;
+							cfg = <0 24 0 24>;
+						};
+						group@1 {
+							sp = <53>;
+							cfg = <1 25 1 25>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <208>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <288>;
+							mcast_loop_pri = <4>;
+							cfg = <52 0 112 0 112>;
+						};
 					};
 				};
-			};
-			port@4 {
-				port_id = <4>;
-				l1scheduler {
-					group@0 {
-						sp = <48>;
-						cfg = <0 20 0 20>;
+				port@6 {
+					port_id = <6>;
+					l1scheduler {
+						group@0 {
+							sp = <56>;
+							cfg = <0 28 0 28>;
+						};
+						group@1 {
+							sp = <57>;
+							cfg = <1 29 1 29>;
+						};
 					};
-					group@1 {
-						sp = <49>;
-						cfg = <1 21 1 21>;
+					l0scheduler {
+						group@0 {
+							ucast_queue = <224>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <292>;
+							mcast_loop_pri = <4>;
+							cfg = <56 0 128 0 128>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <192>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <284>;
-						mcast_loop_pri = <4>;
-						cfg = <48 0 96 0 96>;
+				port@7 {
+					port_id = <7>;
+					l1scheduler {
+						group@0 {
+							sp = <60>;
+							cfg = <0 32 0 32>;
+						};
+						group@1 {
+							sp = <61>;
+							cfg = <1 33 1 33>;
+						};
 					};
-				};
-			};
-			port@5 {
-				port_id = <5>;
-				l1scheduler {
-					group@0 {
-						sp = <52>;
-						cfg = <0 24 0 24>;
-					};
-					group@1 {
-						sp = <53>;
-						cfg = <1 25 1 25>;
-					};
-				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <208>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <288>;
-						mcast_loop_pri = <4>;
-						cfg = <52 0 112 0 112>;
-					};
-				};
-			};
-			port@6 {
-				port_id = <6>;
-				l1scheduler {
-					group@0 {
-						sp = <56>;
-						cfg = <0 28 0 28>;
-					};
-					group@1 {
-						sp = <57>;
-						cfg = <1 29 1 29>;
-					};
-				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <224>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <292>;
-						mcast_loop_pri = <4>;
-						cfg = <56 0 128 0 128>;
-					};
-				};
-			};
-			port@7 {
-				port_id = <7>;
-				l1scheduler {
-					group@0 {
-						sp = <60>;
-						cfg = <0 32 0 32>;
-					};
-					group@1 {
-						sp = <61>;
-						cfg = <1 33 1 33>;
-					};
-				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <240>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <296>;
-						cfg = <60 0 144 0 144>;
+					l0scheduler {
+						group@0 {
+							ucast_queue = <240>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <296>;
+							cfg = <60 0 144 0 144>;
+						};
 					};
 				};
 			};

From c39c8da2425f0cc4f4628237d773fe089576b816 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 10 Feb 2024 17:19:54 +0100
Subject: [PATCH 05/18] qualcommax: ipq807x: enable GPIO bitbanged MDIO

Asus RT-AX89X is using GPIO bitbanged MDIO on newer HW revisions, so lets
enable it in kernel config.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 target/linux/qualcommax/ipq807x/config-default | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/qualcommax/ipq807x/config-default b/target/linux/qualcommax/ipq807x/config-default
index 18483d05b4..72d17641cd 100644
--- a/target/linux/qualcommax/ipq807x/config-default
+++ b/target/linux/qualcommax/ipq807x/config-default
@@ -1,6 +1,8 @@
 CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
 CONFIG_DT_IDLE_GENPD=y
 CONFIG_IPQ_GCC_8074=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_GPIO=y
 # CONFIG_MFD_HI6421_SPMI is not set
 CONFIG_MFD_SPMI_PMIC=y
 # CONFIG_NVMEM_SPMI_SDAM is not set

From b215f5c95ecda507a55ee5d4ab7bf3b48e385874 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 10 Feb 2024 12:35:05 +0100
Subject: [PATCH 06/18] qualcommax: ipq807x: enable qca8k driver

Asus RT-AX89X has an Qualcomm QCA8337 switch used to provide additional
1G copper ports, so lets enable qca8k in order to utilize DSA instead of
relying on SSDK for it.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 target/linux/qualcommax/ipq807x/config-default | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/linux/qualcommax/ipq807x/config-default b/target/linux/qualcommax/ipq807x/config-default
index 72d17641cd..fecc2e5f32 100644
--- a/target/linux/qualcommax/ipq807x/config-default
+++ b/target/linux/qualcommax/ipq807x/config-default
@@ -1,11 +1,17 @@
 CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
 CONFIG_DT_IDLE_GENPD=y
+CONFIG_GRO_CELLS=y
 CONFIG_IPQ_GCC_8074=y
 CONFIG_MDIO_BITBANG=y
 CONFIG_MDIO_GPIO=y
 # CONFIG_MFD_HI6421_SPMI is not set
 CONFIG_MFD_SPMI_PMIC=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_QCA8K=y
+CONFIG_NET_DSA_TAG_QCA=y
 # CONFIG_NVMEM_SPMI_SDAM is not set
+CONFIG_PHYLINK=y
 CONFIG_PINCTRL_IPQ8074=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
 # CONFIG_PM8916_WATCHDOG is not set

From 19ecf84f0f51877d4bd4776e0275151efb4bf3f7 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 10 Feb 2024 20:40:37 +0100
Subject: [PATCH 07/18] qualcommax: ipq807x: enable QCA83XX PHY driver

Asus RT-AX89X has an external QCA8337 switch that has built-in
internal ethernet PHY-s that are supported by the QCA83XX PHY driver so
lets enable it.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 target/linux/qualcommax/ipq807x/config-default | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/qualcommax/ipq807x/config-default b/target/linux/qualcommax/ipq807x/config-default
index fecc2e5f32..1fa8d84ad6 100644
--- a/target/linux/qualcommax/ipq807x/config-default
+++ b/target/linux/qualcommax/ipq807x/config-default
@@ -18,6 +18,7 @@ CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
 CONFIG_PM_GENERIC_DOMAINS=y
 CONFIG_PM_GENERIC_DOMAINS_OF=y
 # CONFIG_POWER_RESET_QCOM_PON is not set
+CONFIG_QCA83XX_PHY=y
 CONFIG_QCOM_APM=y
 # CONFIG_QCOM_COINCELL is not set
 CONFIG_QCOM_GDSC=y

From cc459f55e11e2963c8be974c7e773f8903135af9 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Mon, 26 Jun 2023 12:09:16 +0200
Subject: [PATCH 08/18] firmware: ipq-wifi: add Asus RT-AX89X BDF

Include the Asus RT-AX89X BDF.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 package/firmware/ipq-wifi/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
index 917818db4a..fa2c0893ba 100644
--- a/package/firmware/ipq-wifi/Makefile
+++ b/package/firmware/ipq-wifi/Makefile
@@ -29,6 +29,7 @@ endef
 ALLWIFIBOARDS:= \
 	8devices_mango \
 	arcadyan_aw1000 \
+	asus_rt-ax89x \
 	buffalo_wxr-5950ax12 \
 	cmcc_rm2-6 \
 	compex_wpq873 \
@@ -152,6 +153,7 @@ endef
 
 $(eval $(call generate-ipq-wifi-package,8devices_mango,8devices Mango))
 $(eval $(call generate-ipq-wifi-package,arcadyan_aw1000,Arcadyan AW1000))
+$(eval $(call generate-ipq-wifi-package,asus_rt-ax89x,Asus RT-AX89X))
 $(eval $(call generate-ipq-wifi-package,buffalo_wxr-5950ax12,Buffalo WXR-5950AX12))
 $(eval $(call generate-ipq-wifi-package,cmcc_rm2-6,CMCC RM2-6))
 $(eval $(call generate-ipq-wifi-package,compex_wpq873,Compex WPQ-873))

From bb907d8d449a32da0f075e188cb22694c89e2281 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sun, 11 Feb 2024 18:56:54 +0100
Subject: [PATCH 09/18] generic: add fix for AQR113 PMD Global Transmit Disable
 bit

PMD Global Transmit Disable bit should be cleared for normal operation.
This should be HW default, however I found that on Asus RT-AX89X that uses
AQR113C PHY and firmware 5.4 this bit is set by default.

With this bit set the AQR cannot achieve a link with its link-partner and
it took me multiple hours of digging through the vendor GPL source to find
this out, so lets always clear this bit during .config_init() to avoid a
situation like this in the future.

aqr107_wait_processor_intensive_op() is moved up because datasheet notes
that any changes to this bit are processor intensive.

This is a modified version of patch that got merged upstream as AQR113C
has a separate config_init() upstream.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 ...-clear-PMD-Global-Transmit-Disable-b.patch | 103 ++++++++++++++++++
 ...-clear-PMD-Global-Transmit-Disable-b.patch | 103 ++++++++++++++++++
 ...hy-aquantia-enable-AQR112-and-AQR412.patch |   4 +-
 ...ntia-add-PHY_IDs-for-AQR112-variants.patch |   4 +-
 ...hy-aquantia-enable-AQR112-and-AQR412.patch |   4 +-
 ...ntia-add-PHY_IDs-for-AQR112-variants.patch |   4 +-
 6 files changed, 214 insertions(+), 8 deletions(-)
 create mode 100644 target/linux/generic/backport-6.1/839-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
 create mode 100644 target/linux/generic/backport-6.6/836-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch

diff --git a/target/linux/generic/backport-6.1/839-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch b/target/linux/generic/backport-6.1/839-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
new file mode 100644
index 0000000000..802cf8a128
--- /dev/null
+++ b/target/linux/generic/backport-6.1/839-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
@@ -0,0 +1,103 @@
+From cffac22c9215f1883d3848c788f9b03656dced27 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Sun, 11 Feb 2024 18:39:19 +0100
+Subject: [PATCH] net: phy: aquantia: clear PMD Global Transmit Disable bit
+ during init
+
+PMD Global Transmit Disable bit should be cleared for normal operation.
+This should be HW default, however I found that on Asus RT-AX89X that uses
+AQR113C PHY and firmware 5.4 this bit is set by default.
+
+With this bit set the AQR cannot achieve a link with its link-partner and
+it took me multiple hours of digging through the vendor GPL source to find
+this out, so lets always clear this bit during .config_init() to avoid a
+situation like this in the future.
+
+aqr107_wait_processor_intensive_op() is moved up because datasheet notes
+that any changes to this bit are processor intensive.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ drivers/net/phy/aquantia/aquantia_main.c | 57 ++++++++++++++----------
+ 1 file changed, 33 insertions(+), 24 deletions(-)
+
+--- a/drivers/net/phy/aquantia/aquantia_main.c
++++ b/drivers/net/phy/aquantia/aquantia_main.c
+@@ -507,6 +507,30 @@ static void aqr107_chip_info(struct phy_
+ 		   fw_major, fw_minor, build_id, prov_id);
+ }
+ 
++static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
++{
++	int val, err;
++
++	/* The datasheet notes to wait at least 1ms after issuing a
++	 * processor intensive operation before checking.
++	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
++	 * because that just determines the maximum time slept, not the minimum.
++	 */
++	usleep_range(1000, 5000);
++
++	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
++					VEND1_GLOBAL_GEN_STAT2, val,
++					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
++					AQR107_OP_IN_PROG_SLEEP,
++					AQR107_OP_IN_PROG_TIMEOUT, false);
++	if (err) {
++		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
++		return err;
++	}
++
++	return 0;
++}
++
+ static int aqr107_config_init(struct phy_device *phydev)
+ {
+ 	int ret;
+@@ -530,6 +554,15 @@ static int aqr107_config_init(struct phy
+ 	if (!ret)
+ 		aqr107_chip_info(phydev);
+ 
++	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
++				 MDIO_PMD_TXDIS_GLOBAL);
++	if (ret)
++		return ret;
++
++	ret = aqr107_wait_processor_intensive_op(phydev);
++	if (ret)
++		return ret;
++
+ 	return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
+ }
+ 
+@@ -600,30 +633,6 @@ static void aqr107_link_change_notify(st
+ 		phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n");
+ }
+ 
+-static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
+-{
+-	int val, err;
+-
+-	/* The datasheet notes to wait at least 1ms after issuing a
+-	 * processor intensive operation before checking.
+-	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
+-	 * because that just determines the maximum time slept, not the minimum.
+-	 */
+-	usleep_range(1000, 5000);
+-
+-	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
+-					VEND1_GLOBAL_GEN_STAT2, val,
+-					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
+-					AQR107_OP_IN_PROG_SLEEP,
+-					AQR107_OP_IN_PROG_TIMEOUT, false);
+-	if (err) {
+-		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
+-		return err;
+-	}
+-
+-	return 0;
+-}
+-
+ static int aqr107_get_rate_matching(struct phy_device *phydev,
+ 				    phy_interface_t iface)
+ {
diff --git a/target/linux/generic/backport-6.6/836-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch b/target/linux/generic/backport-6.6/836-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
new file mode 100644
index 0000000000..8b54881ab0
--- /dev/null
+++ b/target/linux/generic/backport-6.6/836-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
@@ -0,0 +1,103 @@
+From cffac22c9215f1883d3848c788f9b03656dced27 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Sun, 11 Feb 2024 18:39:19 +0100
+Subject: [PATCH] net: phy: aquantia: clear PMD Global Transmit Disable bit
+ during init
+
+PMD Global Transmit Disable bit should be cleared for normal operation.
+This should be HW default, however I found that on Asus RT-AX89X that uses
+AQR113C PHY and firmware 5.4 this bit is set by default.
+
+With this bit set the AQR cannot achieve a link with its link-partner and
+it took me multiple hours of digging through the vendor GPL source to find
+this out, so lets always clear this bit during .config_init() to avoid a
+situation like this in the future.
+
+aqr107_wait_processor_intensive_op() is moved up because datasheet notes
+that any changes to this bit are processor intensive.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ drivers/net/phy/aquantia/aquantia_main.c | 57 ++++++++++++++----------
+ 1 file changed, 33 insertions(+), 24 deletions(-)
+
+--- a/drivers/net/phy/aquantia/aquantia_main.c
++++ b/drivers/net/phy/aquantia/aquantia_main.c
+@@ -473,6 +473,30 @@ static void aqr107_chip_info(struct phy_
+ 		   fw_major, fw_minor, build_id, prov_id);
+ }
+ 
++static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
++{
++	int val, err;
++
++	/* The datasheet notes to wait at least 1ms after issuing a
++	 * processor intensive operation before checking.
++	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
++	 * because that just determines the maximum time slept, not the minimum.
++	 */
++	usleep_range(1000, 5000);
++
++	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
++					VEND1_GLOBAL_GEN_STAT2, val,
++					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
++					AQR107_OP_IN_PROG_SLEEP,
++					AQR107_OP_IN_PROG_TIMEOUT, false);
++	if (err) {
++		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
++		return err;
++	}
++
++	return 0;
++}
++
+ static int aqr107_config_init(struct phy_device *phydev)
+ {
+ 	struct aqr107_priv *priv = phydev->priv;
+@@ -498,6 +522,15 @@ static int aqr107_config_init(struct phy
+ 	if (!ret)
+ 		aqr107_chip_info(phydev);
+ 
++	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
++				 MDIO_PMD_TXDIS_GLOBAL);
++	if (ret)
++		return ret;
++
++	ret = aqr107_wait_processor_intensive_op(phydev);
++	if (ret)
++		return ret;
++
+ 	ret = aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
+ 	if (ret)
+ 		return ret;
+@@ -580,30 +613,6 @@ static void aqr107_link_change_notify(st
+ 		phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n");
+ }
+ 
+-static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
+-{
+-	int val, err;
+-
+-	/* The datasheet notes to wait at least 1ms after issuing a
+-	 * processor intensive operation before checking.
+-	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
+-	 * because that just determines the maximum time slept, not the minimum.
+-	 */
+-	usleep_range(1000, 5000);
+-
+-	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
+-					VEND1_GLOBAL_GEN_STAT2, val,
+-					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
+-					AQR107_OP_IN_PROG_SLEEP,
+-					AQR107_OP_IN_PROG_TIMEOUT, false);
+-	if (err) {
+-		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
+-		return err;
+-	}
+-
+-	return 0;
+-}
+-
+ static int aqr107_get_rate_matching(struct phy_device *phydev,
+ 				    phy_interface_t iface)
+ {
diff --git a/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
index faaa40f9bd..42b44d564d 100644
--- a/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
+++ b/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
@@ -106,7 +106,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  static int aqr_config_intr(struct phy_device *phydev)
  {
  	bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
-@@ -860,6 +930,30 @@ static struct phy_driver aqr_driver[] =
+@@ -869,6 +939,30 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  	.link_change_notify = aqr107_link_change_notify,
  },
@@ -137,7 +137,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  };
  
  module_phy_driver(aqr_driver);
-@@ -877,6 +971,8 @@ static struct mdio_device_id __maybe_unu
+@@ -886,6 +980,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
diff --git a/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
index d83cc48a33..6d107c3349 100644
--- a/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
+++ b/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
@@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
  #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)
-@@ -960,6 +962,30 @@ static struct phy_driver aqr_driver[] =
+@@ -969,6 +971,30 @@ static struct phy_driver aqr_driver[] =
  	.get_strings	= aqr107_get_strings,
  	.get_stats	= aqr107_get_stats,
  },
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  };
  
  module_phy_driver(aqr_driver);
-@@ -979,6 +1005,8 @@ static struct mdio_device_id __maybe_unu
+@@ -988,6 +1014,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
diff --git a/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
index ea5c700702..dee901fbe3 100644
--- a/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
+++ b/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
@@ -97,7 +97,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  static int aqr_config_intr(struct phy_device *phydev)
  {
  	bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
-@@ -807,7 +875,7 @@ static struct phy_driver aqr_driver[] =
+@@ -816,7 +884,7 @@ static struct phy_driver aqr_driver[] =
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
  	.name		= "Aquantia AQR112",
  	.probe		= aqr107_probe,
@@ -106,7 +106,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  	.config_intr	= aqr_config_intr,
  	.handle_interrupt = aqr_handle_interrupt,
  	.get_tunable    = aqr107_get_tunable,
-@@ -830,7 +898,7 @@ static struct phy_driver aqr_driver[] =
+@@ -839,7 +907,7 @@ static struct phy_driver aqr_driver[] =
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
  	.name		= "Aquantia AQR412",
  	.probe		= aqr107_probe,
diff --git a/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
index 66298b89ed..075b0fc8e2 100644
--- a/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
+++ b/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
@@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
  #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)
-@@ -1014,6 +1016,30 @@ static struct phy_driver aqr_driver[] =
+@@ -1023,6 +1025,30 @@ static struct phy_driver aqr_driver[] =
  	.led_hw_control_get = aqr_phy_led_hw_control_get,
  	.led_polarity_set = aqr_phy_led_polarity_set,
  },
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  };
  
  module_phy_driver(aqr_driver);
-@@ -1034,6 +1060,8 @@ static struct mdio_device_id __maybe_unu
+@@ -1043,6 +1069,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR114C) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },

From 905338ad609467e1117635a49c5f0c002f9ae237 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 26 Jun 2024 18:52:29 +0200
Subject: [PATCH 10/18] image: add recipe for legacy multiple images

Asus RT-AX89X has modded U-Boot that boots FIT images fine when manually
using bootm command, however once the image is flashed and device boots via
the default bootcmd it only supports booting via legacy images.

More precisely, it requires the "multi" image format with:
1. kernel
2. ramdisk
3. DTB

So, lets add a recipe based on the existing uImage one.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 include/image-commands.mk | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/include/image-commands.mk b/include/image-commands.mk
index 04213a3be8..cb899a2f30 100644
--- a/include/image-commands.mk
+++ b/include/image-commands.mk
@@ -701,6 +701,23 @@ define Build/uImage
 	mv $@.new $@
 endef
 
+define Build/multiImage
+	$(if $(UIMAGE_TIME),SOURCE_DATE_EPOCH="$(UIMAGE_TIME)") \
+	mkimage \
+		-A $(LINUX_KARCH) \
+		-O linux \
+		-T multi \
+		-C $(word 1,$(1)) \
+		-a $(KERNEL_LOADADDR) \
+		-e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
+		-n '$(if $(UIMAGE_NAME),$(UIMAGE_NAME),$(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION))' \
+		$(if $(UIMAGE_MAGIC),-M $(UIMAGE_MAGIC)) \
+		-d $@:$(word 2,$(1)):$(word 3,$(1)) \
+		$(wordlist 4,$(words $(1)),$(1)) \
+		$@.new
+	mv $@.new $@
+endef
+
 define Build/xor-image
 	$(STAGING_DIR_HOST)/bin/xorimage -i $@ -o $@.xor $(1)
 	mv $@.xor $@

From 4e544175022d9e4d50d6c5c7eae649b87eb86912 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sun, 30 Jun 2024 12:51:04 +0200
Subject: [PATCH 11/18] tools: firmware-utils: update to Git HEAD (2024-06-30)

0cfd1043e6c4 zytrx: add ZyXEL LTE7490-M904
3d09357fc7b5 asusuimage: new tool for creating TRX-images compatible with AsusWRT
f35781fcd2c3 asusuimage: fix compile error with old GCC release

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 tools/firmware-utils/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile
index f5fdc76e0f..03af5304a4 100644
--- a/tools/firmware-utils/Makefile
+++ b/tools/firmware-utils/Makefile
@@ -11,9 +11,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git
-PKG_SOURCE_DATE:=2024-06-20
-PKG_SOURCE_VERSION:=6ac44974185a3e7dc7848e97b964339948e817a7
-PKG_MIRROR_HASH:=ee5b29f45593750a6806cfa7cad3fd766b321b44107a6b481b890efe82a7dbf5
+PKG_SOURCE_DATE:=2024-06-30
+PKG_SOURCE_VERSION:=f35781fcd2c3c914247fdb941dc6682af5b98982
+PKG_MIRROR_HASH:=02f6a4a28699f86572b05cc9d039922d72609a847c3e5978a5031de2ebf0cc6b
 
 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/cmake.mk

From 3d7cb14211bb2b9f7ad34d001c40ac0bd1558767 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sun, 11 Feb 2024 18:57:52 +0100
Subject: [PATCH 12/18] qualcommax: ipq807x: add Asus RT-AX89X BX revision

This commit adds support for Asus RT-AX89X BX revision.

WARNING: Only the BX revision boards (So B1, B2 etc) are supported because
AX revision boards use IPQ8074 v1 SoC which is unsupported.

Specifications:
---------------
* CPU: Qualcomm IPQ8074A Quad core Cortex-A53 @ 2.2GHz
* RAM: 1024MB
* Storage: 256MB SLC NAND (Macronix MX30UF2G18AC)
* Ethernet:
	* 5x 1G RJ45 ports via QCA8337 switch
	* 3x 1G RJ45 ports via internal switch (QCA8075 PHY)
	* 1x 10G RJ45 via internal switch (AQR113C PHY)
	* 1x 10G SFP+ slot via internal switch
* WLAN:
	* 2.4GHz 4x4
	* 5GHz 8x8
	* 8 external antennas
* USB: 2x USB 3.0 Type-A
* Buttons:
	* Power switch
	* WPS
	* Reset
	* Wireless ON/OFF
	* LED ON/OFF
LED-s:
	* Power
	* Wi-Fi
	* WAN
	* 10G
	* SFP+
Power:
	* 19.5V via DC jack

Installation instructions:
--------------------------
1. Flash temporary OpenWrt initramfs:
* Flash openwrt-qualcommax-ipq807x-asus_rt-ax89x-initramfs-factory.trx
via the stock firmware.
Administration -> Firmware Upgrade -> Manual Firmware update (Upload)

After flashing the device will reboot with OpenWrt initramfs and it can
be accesed via any of the LAN ports via SSH with the usual OpenWrt
default credentials.

2. Sysupgrade from OpenWrt initramfs:
* Copy openwrt-qualcommax-ipq807x-asus_rt-ax89x-squashfs-sysupgrade.bin to
/tmp/openwrt-qualcommax-ipq807x-asus_rt-ax89x-squashfs-sysupgrade.bin of
the running initramfs image.
* Simply sysupgrade -n /tmp/openwrt-qualcommax-ipq807x-asus_rt-ax89x-squashfs-sysupgrade.bin

After flashing the device will reboot with OpenWrt initramfs and it can
be accesed via any of the LAN ports via SSH with the usual OpenWrt
default credentials.

Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 .../uboot-envtools/files/qualcommax_ipq807x   |   1 +
 .../arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts  | 741 ++++++++++++++++++
 target/linux/qualcommax/image/ipq807x.mk      |  51 ++
 .../ipq807x/base-files/etc/board.d/01_leds    |   5 +
 .../ipq807x/base-files/etc/board.d/02_network |   3 +
 .../etc/hotplug.d/firmware/11-ath11k-caldata  |   4 +
 .../base-files/lib/upgrade/platform.sh        |  17 +
 .../linux/qualcommax/ipq807x/config-default   |   1 +
 8 files changed, 823 insertions(+)
 create mode 100644 target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts

diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq807x b/package/boot/uboot-envtools/files/qualcommax_ipq807x
index 4ae0de4e26..852e05f29a 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq807x
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq807x
@@ -58,6 +58,7 @@ prpl,haze)
 	[ -n "$mmcpart" ] && \
 		ubootenv_add_uci_config "$mmcpart" "0x0" "0x40000" "0x400" "0x100"
 	;;
+asus,rt-ax89x|\
 qnap,301w)
 	idx="$(find_mtd_index 0:appsblenv)"
 	[ -n "$idx" ] && \
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts
new file mode 100644
index 0000000000..4af942c289
--- /dev/null
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts
@@ -0,0 +1,741 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/* Copyright (c) 2024, Robert Marko <robimarko@gmail.com> */
+
+/dts-v1/;
+
+#include "ipq8074.dtsi"
+#include "ipq8074-hk-cpu.dtsi"
+#include "ipq8074-ess.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "Asus RT-AX89X";
+	compatible = "asus,rt-ax89x", "qcom,ipq8074";
+
+	aliases {
+		serial0 = &blsp1_uart5;
+		mdio-gpio0 = &mdio1;
+		ethernet0 = &dp1;
+		ethernet1 = &dp2;
+		ethernet2 = &dp3;
+		ethernet3 = &dp4;
+		ethernet4 = &dp5_syn;
+		ethernet5 = &dp6_syn;
+		led-boot = &led_pwr;
+		led-failsafe = &led_pwr;
+		led-running = &led_pwr;
+		led-upgrade = &led_pwr;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		/* We have to override root and ubi device passed by bootloader */
+		bootargs-append = " ubi.block=0,jffs2 root=/dev/ubiblock0_4";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		wifi-button {
+			label = "wifi";
+			gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WLAN>;
+		};
+
+		reset-button {
+			label = "reset";
+			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps-button {
+			label = "wps";
+			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		led-button {
+			label = "led";
+			gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_LIGHTS_TOGGLE>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&led_pins>;
+		pinctrl-names = "default";
+
+		led_pwr: led-pwr {
+			function = LED_FUNCTION_POWER;
+			gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-2g {
+			function = LED_FUNCTION_WLAN_2GHZ;
+			gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		led-5g {
+			function = LED_FUNCTION_WLAN_5GHZ;
+			gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+			linux,default-trigger = "phy1radio";
+		};
+
+		led-10g-copper {
+			function = "aqr10g";
+			gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-lan {
+			function = LED_FUNCTION_LAN;
+			gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-sfp {
+			function = "sfp";
+			gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-wan-red {
+			function = LED_FUNCTION_WAN;
+			gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+		};
+
+		led-wan-white {
+			function = LED_FUNCTION_WAN;
+			gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+	};
+
+	gpio_fan: gpio-fan {
+		compatible = "gpio-fan";
+		pinctrl-0 = <&fan_pins>;
+		pinctrl-names = "default";
+		gpios = <&tlmm 64 GPIO_ACTIVE_HIGH
+			 &tlmm 66 GPIO_ACTIVE_HIGH>;
+		/*
+		 * Not supported upstream, but good to document for
+		 * future uses.
+		 * It seems that Delta AFB0712VHB fan has its tacho
+		 * output connected to GPIO 65.
+		 */
+		//rpm-gpios = <&tlmm 65 GPIO_ACTIVE_HIGH>;
+		gpio-fan,speed-map = <    0 0
+				          1600 1
+				          1850 2
+				          2100 3 >;
+		#cooling-cells = <2>;
+	};
+
+	usb0_vbus: regulator-usb0-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb0_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&tlmm 30 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+
+	usb1_vbus: regulator-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+
+	output-usb0-power {
+		compatible = "regulator-output";
+		vout-supply = <&usb0_vbus>;
+	};
+
+	output-usb1-power {
+		compatible = "regulator-output";
+		vout-supply = <&usb1_vbus>;
+	};
+};
+
+&cpu0_thermal {
+	trips {
+		cpu0_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu0_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cpu1_thermal {
+	trips {
+		cpu1_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu1_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cpu2_thermal {
+	trips {
+		cpu2_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu2_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cpu3_thermal {
+	trips {
+		cpu3_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu3_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cluster_thermal {
+	trips {
+		cluster_active: cluster-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cluster_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&tlmm {
+	button_pins: button-state {
+		pins = "gpio25", "gpio26", "gpio34", "gpio61";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	i2c_pins: i2c-pins {
+		pins = "gpio42", "gpio43";
+		function = "blsp1_i2c";
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	mdio_pins: mdio-pins {
+		mdc {
+			pins = "gpio68";
+			function = "mdc";
+			drive-strength = <16>;
+			bias-pull-up;
+		};
+
+		mdio {
+			pins = "gpio69";
+			function = "mdio";
+			drive-strength = <16>;
+			bias-pull-up;
+		};
+	};
+
+	mdio_gpio_pins: mdio-gpio-pins {
+		pins = "gpio54", "gpio56";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	uniphy_pins: uniphy_pinmux {
+		mux {
+			pins = "gpio60";
+			function = "rx2";
+			bias-disable;
+		};
+
+		sfp_tx_disable {
+			pins = "gpio48";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+			output-low;
+		};
+
+		sfp_tx_fault {
+			pins = "gpio62";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+			output-high;
+		};
+
+		sfp_mod_def0 {
+			pins = "gpio46";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	led_pins: led-state {
+		power {
+			pins = "gpio21";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		default_off {
+			pins = "gpio18", "gpio19", "gpio20", "gpio47",
+			       "gpio44", "gpio35", "gpio36";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	fan_pins: fan-state {
+		pins = "gpio64", "gpio66";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+		output-high;
+	};
+};
+
+&blsp1_uart5 {
+	status = "okay";
+};
+
+&prng {
+	status = "okay";
+};
+
+&cryptobam {
+	status = "okay";
+};
+
+&crypto {
+	status = "okay";
+};
+
+&ssphy_0 {
+	status = "okay";
+};
+
+&qusb_phy_0 {
+	status = "okay";
+};
+
+&ssphy_1 {
+	status = "okay";
+};
+
+&qusb_phy_1 {
+	status = "okay";
+};
+
+&usb_0 {
+	status = "okay";
+};
+
+&usb_1 {
+	status = "okay";
+};
+
+&qpic_bam {
+	status = "okay";
+};
+
+&qpic_nand {
+	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "0:sbl1";
+				reg = <0x0 0x60000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "0:mibib";
+				reg = <0x00060000 0x40000>;
+				read-only;
+			};
+
+			partition@a0000 {
+				label = "0:qsee";
+				reg = <0x000a0000 0x1e0000>;
+				read-only;
+			};
+
+			partition@280000 {
+				label = "0:devcfg";
+				reg = <0x00280000 0x20000>;
+				read-only;
+			};
+
+			partition@2a0000 {
+				label = "0:apdp";
+				reg = <0x002a0000 0x20000>;
+				read-only;
+			};
+
+			partition@2c0000 {
+				label = "0:rpm";
+				reg = <0x002c0000 0x40000>;
+				read-only;
+			};
+
+			partition@300000 {
+				label = "0:cdt";
+				reg = <0x00300000 0x20000>;
+				read-only;
+			};
+
+			partition@320000 {
+				label = "0:appsbl";
+				reg = <0x00320000 0xc0000>;
+				read-only;
+			};
+
+			partition@3e0000 {
+				label = "0:appsblenv";
+				reg = <0x003e0000 0x20000>;
+			};
+
+			partition@400000 {
+				compatible = "linux,ubi";
+				label = "UBI_DEV";
+				reg = <0x00400000 0xfc00000>;
+			};
+		};
+	};
+};
+
+&blsp1_i2c2 {
+	status = "okay";
+};
+
+&mdio {
+	status = "okay";
+
+	pinctrl-0 = <&mdio_pins>;
+	pinctrl-names = "default";
+	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+
+	qca8337_0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x0>;
+	};
+
+	qca8337_1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x1>;
+	};
+
+	qca8337_2: ethernet-phy@2 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x2>;
+	};
+
+	qca8337_3: ethernet-phy@3 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x3>;
+	};
+
+	qca8337_4: ethernet-phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x4>;
+	};
+
+	/*
+	 * Vendor bootloader has path for ethernet-phy@5 hardcoded
+	 * and if its there it will delete the node, but since we
+	 * need the QCA8035 for DSA lets fool the bootloader by using
+	 * ethernet-phy@05 even though it causes DTC to print a warning.
+	 */
+	qca8035: ethernet-phy@05 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x5>;
+	};
+
+	qca8033: ethernet-phy@6 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x6>;
+	};
+
+	ethernet-phy-package@8 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "qcom,qca8075-package";
+		reg = <8>;
+
+		qcom,package-mode = "qsgmii";
+
+		qca8075_8: ethernet-phy@8 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0x8>;
+		};
+
+		qca8075_9: ethernet-phy@9 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0x9>;
+		};
+
+		qca8075_a: ethernet-phy@a {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0xa>;
+		};
+
+		qca8075_b: ethernet-phy@b {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0xb>;
+		};
+	};
+
+	qca8337: switch@10 {
+		compatible = "qca,qca8337";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x10>;
+
+		ports {
+			port@0 {
+				reg = <0>;
+				label = "cpu";
+				ethernet = <&dp1>;
+				phy-mode = "rgmii-rxid";
+				phy-handle = <&qca8035>;
+			};
+
+			port@1 {
+				reg = <1>;
+				label = "lan7";
+				phy-handle = <&qca8337_0>;
+			};
+
+			port@2 {
+				reg = <2>;
+				label = "lan6";
+				phy-handle = <&qca8337_1>;
+			};
+
+			port@3 {
+				reg = <3>;
+				label = "lan5";
+				phy-handle = <&qca8337_2>;
+			};
+
+			port@4 {
+				reg = <4>;
+				label = "lan4";
+				phy-handle = <&qca8337_3>;
+			};
+
+			port@5 {
+				reg = <5>;
+				label = "lan3";
+				phy-handle = <&qca8337_4>;
+			};
+
+			port@6 {
+				reg = <6>;
+				label = "lan8";
+				phy-mode = "sgmii";
+				phy-handle = <&qca8033>;
+				managed = "in-band-status";
+				qca,sgmii-enable-pll;
+			};
+		};
+	};
+};
+
+&soc {
+	/*
+	 * This is techically incorrect and will cause a DTC warning as
+	 * all nodes under a bus are supposed to have addresses as well
+	 * but its required as bootloader has this path hardcoded in
+	 * order to enable AQR113C on newer revisions.
+	 */
+	mdio1: mdio1 {
+		compatible = "virtual,mdio-gpio";
+		pinctrl-0 = <&mdio_gpio_pins>;
+		pinctrl-names = "default";
+		gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>,
+			<&tlmm 54 GPIO_ACTIVE_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/*
+		 * PCB R5.00, AQR113C
+		 * No idea why the bitbanged this one.
+		 * @5 is wrong, but their bootloader has it hardcoded in
+		 * order to dynamically enable the PHY for newer HW.
+		 */
+		aqr113c: ethernet-phy@5 {
+			status = "disabled";
+			compatible ="ethernet-phy-ieee802.3-c45";
+			reg = <8>;
+		};
+	};
+};
+
+&switch {
+	status = "okay";
+
+	pinctrl-0 = <&uniphy_pins>;
+	pinctrl-names = "default";
+
+	switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT5 | ESS_PORT6)>; /* lan port bitmap */
+	switch_wan_bmp = <ESS_PORT4>; /* wan port bitmap */
+	switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
+	switch_mac_mode1 = <MAC_MODE_10GBASE_R>; /* mac mode for uniphy instance1*/
+	switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
+
+	qcom,port_phyinfo {
+		port@0 {
+			port_id = <1>;
+			phy_address = <0x8>;
+		};
+		port@1 {
+			port_id = <2>;
+			phy_address = <0x9>;
+		};
+		port@2 {
+			port_id = <3>;
+			phy_address = <0xa>;
+		};
+		port@3 {
+			port_id = <4>;
+			phy_address = <0xb>;
+		};
+
+		sfp: port@4 {
+			port_id = <5>;
+			phy_address = <30>;
+			phy_i2c_address = <30>;
+			phy-i2c-mode; /*i2c access phy */
+			media-type = "sfp"; /* fiber mode */
+			sfp_tx_dis_pin = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+			sfp_mod_present_pin = <&tlmm 46 GPIO_ACTIVE_LOW>;
+		};
+
+		/* PCB R5.00, AQR113C */
+		port@5_113c {
+			status = "disabled";
+			port_id = <6>;
+			phy_address = <8>;
+			ethernet-phy-ieee802.3-c45;
+			mdiobus = <&mdio1>;
+		};
+	};
+};
+
+&edma {
+	status = "okay";
+};
+
+&dp1 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_8>;
+	label = "switch";
+};
+
+&dp2 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_9>;
+	label = "lan2";
+};
+
+&dp3 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_a>;
+	label = "lan1";
+};
+
+&dp4 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_b>;
+	label = "wan";
+};
+
+&dp5_syn {
+	status = "okay";
+	phy-handle = <&sfp>;
+	label = "10g-sfp";
+};
+
+&dp6_syn {
+	status = "okay";
+	phy-handle = <&aqr113c>;
+	label = "10g-copper";
+};
+
+&wifi {
+	status = "okay";
+	qcom,ath11k-calibration-variant = "Asus-RT-AX89X";
+};
diff --git a/target/linux/qualcommax/image/ipq807x.mk b/target/linux/qualcommax/image/ipq807x.mk
index e2a6da569c..8caa6a322c 100644
--- a/target/linux/qualcommax/image/ipq807x.mk
+++ b/target/linux/qualcommax/image/ipq807x.mk
@@ -1,3 +1,26 @@
+define Build/asus-fake-ramdisk
+	rm -rf $(KDIR)/tmp/fakerd
+	dd if=/dev/zero bs=32 count=1 > $(KDIR)/tmp/fakerd
+	$(info KERNEL_INITRAMFS is $(KERNEL_INITRAMFS))
+endef
+
+define Build/asus-fake-rootfs
+	$(eval comp=$(word 1,$(1)))
+	$(eval filepath=$(word 2,$(1)))
+	$(eval filecont=$(word 3,$(1)))
+	rm -rf $(KDIR)/tmp/fakefs $(KDIR)/tmp/fakehsqs
+	mkdir -p $(KDIR)/tmp/fakefs/$$(dirname $(filepath))
+	echo '$(filecont)' > $(KDIR)/tmp/fakefs/$(filepath)
+	$(STAGING_DIR_HOST)/bin/mksquashfs4 $(KDIR)/tmp/fakefs $(KDIR)/tmp/fakehsqs -comp $(comp) \
+		-b 4096 -no-exports -no-sparse -no-xattrs -all-root -noappend \
+		$(wordlist 4,$(words $(1)),$(1))
+endef
+
+define Build/asus-trx
+	$(STAGING_DIR_HOST)/bin/asusuimage $(wordlist 1,$(words $(1)),$(1)) -i $@ -o $@.new
+	mv $@.new $@
+endef
+
 define Build/wax6xx-netgear-tar
 	mkdir $@.tmp
 	mv $@ $@.tmp/nand-ipq807x-apps.img
@@ -22,6 +45,34 @@ define Device/arcadyan_aw1000
 endef
 TARGET_DEVICES += arcadyan_aw1000
 
+define Device/asus_rt-ax89x
+       DEVICE_VENDOR := Asus
+	DEVICE_MODEL := RT-AX89X
+	BLOCKSIZE := 128k
+	PAGESIZE := 2048
+	DEVICE_DTS_CONFIG := config@hk01
+	SOC := ipq8074
+	DEVICE_PACKAGES := kmod-hwmon-gpiofan ipq-wifi-asus_rt-ax89x
+	KERNEL_NAME := vmlinux
+	KERNEL := kernel-bin | libdeflate-gzip
+	KERNEL_IN_UBI := 1
+	IMAGE/sysupgrade.bin/squashfs := \
+		append-kernel | asus-fake-ramdisk |\
+		multiImage gzip $$(KDIR)/tmp/fakerd $$(KDIR)/image-$$(DEVICE_DTS).dtb |\
+		sysupgrade-tar kernel=$$$$@ | append-metadata
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+	ARTIFACTS := initramfs-factory.trx initramfs-uImage.itb
+	ARTIFACT/initramfs-uImage.itb := \
+		append-image-stage initramfs-kernel.bin | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
+	ARTIFACT/initramfs-factory.trx := \
+		append-image-stage initramfs-kernel.bin |\
+		asus-fake-rootfs xz /lib/firmware/IPQ8074A/fw_version.txt "fake" -no-compression |\
+		multiImage gzip $$(KDIR)/tmp/fakehsqs $$(KDIR)/image-$$(DEVICE_DTS).dtb |\
+		asus-trx -v 2 -n RT-AX89U -b 388 -e 49000
+endif
+endef
+TARGET_DEVICES += asus_rt-ax89x
+
 define Device/buffalo_wxr-5950ax12
 	$(call Device/FitImage)
 	DEVICE_VENDOR := Buffalo
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
index 23d87f1b2d..b5c3cbc736 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
@@ -11,6 +11,11 @@ arcadyan,aw1000)
 	ucidef_set_led_netdev "wan" "WAN" "green:internet" "wan"
 	ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "90000.mdio-1:1c:green:wan" "wan" "tx rx link_10 link_100 link_1000 link_2500"
 	;;
+asus,rt-ax89x)
+	ucidef_set_led_netdev "aqr" "AQR" "white:aqr10g" "10g-copper"
+	ucidef_set_led_netdev "sfp" "SFP" "white:sfp" "10g-sfp"
+	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
+	;;
 dynalink,dl-wrx36)
 	ucidef_set_led_netdev "wan-port-link-green" "WAN-PORT-LINK-GREEN" "90000.mdio-1:1c:green:wan" "wan" "link_2500"
 	ucidef_set_led_netdev "wan-port-link-yellow" "WAN-PORT-LINK-YELLOW" "90000.mdio-1:1c:yellow:wan" "wan" "tx rx link_10 link_100 link_1000"
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
index 0bf224f380..f87dbdd2be 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
@@ -11,6 +11,9 @@ ipq807x_setup_interfaces()
 	local board="$1"
 
 	case "$board" in
+	asus,rt-ax89x)
+		ucidef_set_interfaces_lan_wan "10g-sfp 10g-copper lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8" "wan"
+		;;
 	arcadyan,aw1000|\
 	buffalo,wxr-5950ax12|\
 	dynalink,dl-wrx36|\
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata b/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
index 1170a35413..e413801ef9 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
@@ -9,6 +9,10 @@ board=$(board_name)
 case "$FIRMWARE" in
 "ath11k/IPQ8074/hw2.0/cal-ahb-c000000.wifi.bin")
 	case "$board" in
+	asus,rt-ax89x)
+		CI_UBIPART="UBI_DEV"
+		caldata_extract_ubi "Factory" 0x1000 0x20000
+		;;
 	arcadyan,aw1000|\
 	buffalo,wxr-5950ax12|\
 	cmcc,rm2-6|\
diff --git a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
index 5d89554133..f78a4b04f1 100644
--- a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
@@ -27,12 +27,23 @@ xiaomi_initramfs_prepare() {
 	ubiformat /dev/mtd$kern_mtdnum -y
 }
 
+asus_initial_setup() {
+	# Remove existing linux and jffs2 volumes
+	[ "$(rootfs_type)" = "tmpfs" ] || return 0
+
+	ubirmvol /dev/ubi0 -N linux
+	ubirmvol /dev/ubi0 -N jffs2
+}
+
 platform_check_image() {
 	return 0;
 }
 
 platform_pre_upgrade() {
 	case "$(board_name)" in
+	asus,rt-ax89x)
+		asus_initial_setup
+		;;
 	redmi,ax6|\
 	xiaomi,ax3600|\
 	xiaomi,ax9000)
@@ -56,6 +67,12 @@ platform_do_upgrade() {
 	netgear,wax630)
 		nand_do_upgrade "$1"
 		;;
+	asus,rt-ax89x)
+		CI_UBIPART="UBI_DEV"
+		CI_KERNPART="linux"
+		CI_ROOTPART="jffs2"
+		nand_do_upgrade "$1"
+		;;
 	buffalo,wxr-5950ax12)
 		CI_KERN_UBIPART="rootfs"
 		CI_ROOT_UBIPART="user_property"
diff --git a/target/linux/qualcommax/ipq807x/config-default b/target/linux/qualcommax/ipq807x/config-default
index 1fa8d84ad6..f4942c32cc 100644
--- a/target/linux/qualcommax/ipq807x/config-default
+++ b/target/linux/qualcommax/ipq807x/config-default
@@ -32,6 +32,7 @@ CONFIG_REGULATOR_CPR4_APSS=y
 # CONFIG_REGULATOR_QCOM_LABIBB is not set
 CONFIG_REGULATOR_QCOM_SPMI=y
 # CONFIG_REGULATOR_QCOM_USB_VBUS is not set
+CONFIG_REGULATOR_USERSPACE_CONSUMER=y
 CONFIG_RTC_DRV_PM8XXX=y
 CONFIG_SPMI=y
 # CONFIG_SPMI_HISI3670 is not set

From 3c95641366f78e34bbf147da5840d7d3217ac4e1 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 9 Jul 2024 04:27:11 +0200
Subject: [PATCH 13/18] kernel: fix broken initramfs images for Separate cpio

Commit 0137fbd74bff ("kernel: skip rebuilding kernel with
ROOTFS_INITRAMFS_SEPARATE") had a logic error error and didn't account
that the generic initramfs is still needed to be built to enable support
for the cpio compression and other config specific to initramfs. With
that commit we completely skip rebuilding the kernel with those new
options.

To better handle this, skip kernel build ONLY when we are handling Per
Device Rootfs, permitting the first generic build to be actually called
with the new options.

Fixes: 0137fbd74bff ("kernel: skip rebuilding kernel with ROOTFS_INITRAMFS_SEPARATE")
Link: https://github.com/openwrt/openwrt/pull/15912
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 include/kernel-defaults.mk | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk
index ff6c60d5b0..f6997ecf9e 100644
--- a/include/kernel-defaults.mk
+++ b/include/kernel-defaults.mk
@@ -166,6 +166,8 @@ endef
 ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
 # $1: Custom TARGET_DIR. If omitted TARGET_DIR is used.
 # $2: If defined Generate Per Rootfs Kernel Directory and use it
+# For Separate Initramf with $2 declared, skip kernel compile, it has
+# already been done previously on generic image build
 define Kernel/CompileImage/Initramfs
 	$(if $(2),$(call Kernel/PrepareConfigPerRootfs,$(LINUX_DIR)$(2)))
 	$(call Kernel/Configure/Initramfs,$(if $(1),$(1),$(TARGET_DIR)),$(LINUX_DIR)$(2))
@@ -185,6 +187,7 @@ endif
 	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZO),$(STAGING_DIR_HOST)/bin/lzop -9 -f $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio)
 	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_XZ),$(STAGING_DIR_HOST)/bin/xz -T$(if $(filter 1,$(NPROC)),2,0) -9 -fz --check=crc32 $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio)
 	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_ZSTD),$(STAGING_DIR_HOST)/bin/zstd -T0 -f -o $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio.zstd $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio)
+	$(if $(2),,$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all))
 	$(call Kernel/CopyImage,-initramfs,$(2))
 else
 	+$(call locked,$(if $(2),$(CP) $(LINUX_DIR)$(2)/.config* $(LINUX_DIR) && touch $(LINUX_DIR)/.config && )\

From 2beadefaa087be7575ac4b5bda6733632ac4fc30 Mon Sep 17 00:00:00 2001
From: Rosen Penev <rosenp@gmail.com>
Date: Tue, 9 Jul 2024 14:06:57 -0700
Subject: [PATCH 14/18] readline: override termlib for host

For some reason, it's not working right locally. Override as is done
with the target build.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15916
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 package/libs/readline/Makefile | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/package/libs/readline/Makefile b/package/libs/readline/Makefile
index 3ab28712af..11b9e0172f 100644
--- a/package/libs/readline/Makefile
+++ b/package/libs/readline/Makefile
@@ -48,6 +48,9 @@ endef
 HOST_CONFIGURE_ARGS += --disable-shared --with-pic
 CONFIGURE_ARGS += --with-curses --disable-install-examples
 
+HOST_CONFIGURE_VARS += \
+	bash_cv_termcap_lib=libncurses
+
 CONFIGURE_VARS += \
 	bash_cv_wcwidth_broken=no \
 	bash_cv_func_sigsetjmp=yes \

From 9a8111fb25d306cb61bad1b4d61b43cb789487c2 Mon Sep 17 00:00:00 2001
From: Tan Zien <nabsdh9@gmail.com>
Date: Sun, 7 Jul 2024 01:23:25 +0800
Subject: [PATCH 15/18] libiwinfo: update to Git HEAD (2024-07-06)

2158201 devices: add device id for Atheros AR9590

Signed-off-by: Tan Zien <nabsdh9@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15889
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 package/network/utils/iwinfo/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/network/utils/iwinfo/Makefile b/package/network/utils/iwinfo/Makefile
index 33661941a6..06005d3c6d 100644
--- a/package/network/utils/iwinfo/Makefile
+++ b/package/network/utils/iwinfo/Makefile
@@ -11,9 +11,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/iwinfo.git
-PKG_SOURCE_DATE:=2024-03-23
-PKG_SOURCE_VERSION:=79a96150647110fb03852bc321bd37159d63ae1a
-PKG_MIRROR_HASH:=0bf6230019f80a05ae2a49722f3ecb2a9000da7ae0d398fd0e163d168ee8b494
+PKG_SOURCE_DATE:=2024-07-06
+PKG_SOURCE_VERSION:=215820132b943b700d56441ecbd5a4efa09edc7c
+PKG_MIRROR_HASH:=f815ee1e0bde98f80a5de9f2711d5044479f936c07e21fc47d3a7f97955e7883
 PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
 PKG_LICENSE:=GPL-2.0
 

From 7a96d361887bf6c95e1fcf0efab2e9540559d645 Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Thu, 4 Jul 2024 21:09:03 +0800
Subject: [PATCH 16/18] rockchip: fix baudrate for Radxa E25

According to the documentation[1], the serial baudrate of E25 is
115.2 Kbps, and setting it to 1.5 Mbps will cause onboard CH340B
USB-UART chip unstable.

Since mainline TPL is yet available, download patched TPL binary
from Radxa.

1. https://wiki.radxa.com/Rock3/CM/CM3I/E25/getting_started

Fixes: https://github.com/openwrt/openwrt/issues/15814
Fixes: f7c732bf9ed9 ("rockchip: add Radxa E25 board support")
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/15870
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 package/boot/rkbin/Makefile                   | 26 ++++++++++++++++++-
 package/boot/uboot-rockchip/Makefile          |  2 ++
 target/linux/rockchip/image/armv8.mk          |  1 +
 .../linux/rockchip/image/radxa-e25.bootscript |  7 +++++
 4 files changed, 35 insertions(+), 1 deletion(-)
 create mode 100644 target/linux/rockchip/image/radxa-e25.bootscript

diff --git a/package/boot/rkbin/Makefile b/package/boot/rkbin/Makefile
index 4eacff042c..86d2dd0684 100644
--- a/package/boot/rkbin/Makefile
+++ b/package/boot/rkbin/Makefile
@@ -37,9 +37,33 @@ define Trusted-Firmware-A/rk3568
   TPL:=rk35/rk3568_ddr_1560MHz_v1.21.bin
 endef
 
+define Trusted-Firmware-A/rk3568-e25
+  NAME:=Radxa E25 board
+  BUILD_SUBTARGET:=armv8
+  ATF:=rk35/rk3568_bl31_v1.44.elf
+  TPL:=rk35/rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
+endef
+
 TFA_TARGETS:= \
 	rk3566 \
-	rk3568
+	rk3568 \
+	rk3568-e25
+
+ifeq ($(BUILD_VARIANT),rk3568-e25)
+  TPL_FILE:=rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
+  define Download/rk3568-tpl-e25
+    FILE:=$(TPL_FILE)
+    URL:=https://github.com/radxa/rkbin/raw/5696fab20dcac57c1458f72dc7604ba60e553adf/bin/rk35/
+    HASH:=1815f9649dc5661a3ef184b052da39286e51453a66f6ff53cc3e345d65dfabd4
+  endef
+
+  define Build/Prepare
+	$(eval $(call Download,rk3568-tpl-e25))
+	$(call Build/Prepare/Default)
+
+	$(CP) $(DL_DIR)/$(TPL_FILE) $(PKG_BUILD_DIR)/bin/rk35/
+  endef
+endif
 
 define Build/Compile
 endef
diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index 48d72ca55c..734f0304ee 100644
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -174,6 +174,8 @@ endef
 
 define U-Boot/radxa-e25-rk3568
   $(U-Boot/rk3568/Default)
+  DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3568-e25
+  TPL:=rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
   NAME:=E25
   BUILD_DEVICES:= \
     radxa_e25
diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index df0ca6ffb5..3f1e6934d1 100644
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -109,6 +109,7 @@ define Device/radxa_e25
   DEVICE_MODEL := E25
   SOC := rk3568
   DEVICE_DTS := rockchip/rk3568-radxa-e25
+  BOOT_SCRIPT := radxa-e25
   UBOOT_DEVICE_NAME := radxa-e25-rk3568
   DEVICE_PACKAGES := kmod-r8169 kmod-ata-ahci-platform
 endef
diff --git a/target/linux/rockchip/image/radxa-e25.bootscript b/target/linux/rockchip/image/radxa-e25.bootscript
new file mode 100644
index 0000000000..c91319f7fc
--- /dev/null
+++ b/target/linux/rockchip/image/radxa-e25.bootscript
@@ -0,0 +1,7 @@
+part uuid ${devtype} ${devnum}:2 uuid
+
+setenv bootargs "console=ttyS2,115200 earlycon=uart8250,mmio32,0xfe660000 root=PARTUUID=${uuid} rw rootwait";
+
+load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img
+
+bootm ${kernel_addr_r}

From 73eeac49be566d389df728b5335f7146d03d2f90 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@qq.com>
Date: Mon, 8 Jul 2024 00:05:14 +0800
Subject: [PATCH 17/18] ramips: limit max spi clock frequency to 50 MHz

In the past few years, we have received several reports about SPI
Flash not working properly. This is caused by excessively fast
clock frequency. It's really annoying to fix them one by one. Let's
reduce these aggressive frequencies to 50 MHz. This is a safe and
suggested value in the vendor SDK.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
---
 target/linux/ramips/dts/mt7620a_bolt_bl100.dts              | 2 +-
 target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts          | 2 +-
 target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts        | 2 +-
 target/linux/ramips/dts/mt7620a_domywifi.dtsi               | 2 +-
 target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi          | 2 +-
 target/linux/ramips/dts/mt7620a_netcore_nw5212.dts          | 2 +-
 target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi            | 2 +-
 target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts         | 2 +-
 target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi            | 2 +-
 target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts      | 2 +-
 target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi            | 2 +-
 target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts     | 2 +-
 target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi        | 2 +-
 target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts           | 2 +-
 target/linux/ramips/dts/mt7621_jcg_y2.dts                   | 2 +-
 target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts     | 2 +-
 target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts     | 2 +-
 target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts       | 2 +-
 target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi         | 2 +-
 target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts      | 2 +-
 target/linux/ramips/dts/mt7621_yuncore_ax820.dts            | 2 +-
 target/linux/ramips/dts/mt7621_yuncore_fap640.dts           | 2 +-
 target/linux/ramips/dts/mt7621_yuncore_fap690.dts           | 2 +-
 target/linux/ramips/dts/mt7628an_duzun_dm06.dts             | 2 +-
 target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi        | 2 +-
 target/linux/ramips/dts/mt7628an_motorola_mwr03.dts         | 2 +-
 target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi         | 2 +-
 target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts | 2 +-
 target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts    | 2 +-
 29 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/target/linux/ramips/dts/mt7620a_bolt_bl100.dts b/target/linux/ramips/dts/mt7620a_bolt_bl100.dts
index e4bc6e211b..cb1f3b8055 100644
--- a/target/linux/ramips/dts/mt7620a_bolt_bl100.dts
+++ b/target/linux/ramips/dts/mt7620a_bolt_bl100.dts
@@ -145,7 +145,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts b/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts
index 7ea288615c..6ed3063ecb 100644
--- a/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts
+++ b/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts
@@ -101,7 +101,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts b/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts
index 978de470f0..645030b5bb 100644
--- a/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts
+++ b/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts
@@ -97,7 +97,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7620a_domywifi.dtsi b/target/linux/ramips/dts/mt7620a_domywifi.dtsi
index e2bd8e103b..844c1a4ee4 100644
--- a/target/linux/ramips/dts/mt7620a_domywifi.dtsi
+++ b/target/linux/ramips/dts/mt7620a_domywifi.dtsi
@@ -95,7 +95,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi b/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
index 7fcd68e6ba..6a602b8411 100644
--- a/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
+++ b/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
@@ -31,7 +31,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts b/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts
index 2e112c7179..439ad2a118 100644
--- a/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts
+++ b/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts
@@ -75,7 +75,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi b/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi
index 4faa45933f..ce53781e60 100644
--- a/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi
+++ b/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi
@@ -52,7 +52,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions: partitions {
diff --git a/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts b/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts
index c5c4d01835..b032cd9d4f 100644
--- a/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts
+++ b/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts
@@ -55,7 +55,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi b/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi
index 8c565385e8..cedefe3c5e 100644
--- a/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi
+++ b/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi
@@ -158,7 +158,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts b/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
index c0141b196d..41221891f7 100644
--- a/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
+++ b/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
@@ -83,7 +83,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi
index 2f9920fc45..2ddb0d8408 100644
--- a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi
+++ b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi
@@ -63,7 +63,7 @@
 	flash0: flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts
index 4a5194c363..6895052eb9 100644
--- a/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts
+++ b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts
@@ -97,7 +97,7 @@
 		compatible = "jedec,spi-nor";
 
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi
index 6bfdffefb7..24869f3d56 100644
--- a/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi
+++ b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi
@@ -68,7 +68,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts b/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts
index 548ab7ba59..f1c593ea83 100644
--- a/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts
+++ b/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts
@@ -65,7 +65,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_jcg_y2.dts b/target/linux/ramips/dts/mt7621_jcg_y2.dts
index 5012bc3d62..555beae04f 100644
--- a/target/linux/ramips/dts/mt7621_jcg_y2.dts
+++ b/target/linux/ramips/dts/mt7621_jcg_y2.dts
@@ -41,7 +41,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts b/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
index cd0e7465ff..8ee88b2609 100644
--- a/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
+++ b/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
@@ -53,7 +53,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <104000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts b/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts
index de352741f8..4917ffc81e 100644
--- a/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts
+++ b/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts
@@ -102,7 +102,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts b/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts
index 234202ba87..165b48d209 100644
--- a/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts
+++ b/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts
@@ -92,7 +92,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi b/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
index 3264a8673c..ff2c39d704 100644
--- a/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
+++ b/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
@@ -44,7 +44,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts b/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts
index 7090869c4e..d40f56e1e9 100644
--- a/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts
+++ b/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts
@@ -67,7 +67,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <104000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_yuncore_ax820.dts b/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
index 316c180098..51421aba6a 100644
--- a/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
+++ b/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
@@ -87,7 +87,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_yuncore_fap640.dts b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
index 536b45e03f..5e18ded9b0 100644
--- a/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
+++ b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
@@ -100,7 +100,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_yuncore_fap690.dts b/target/linux/ramips/dts/mt7621_yuncore_fap690.dts
index 9f7ca43092..bb25ade1a8 100644
--- a/target/linux/ramips/dts/mt7621_yuncore_fap690.dts
+++ b/target/linux/ramips/dts/mt7621_yuncore_fap690.dts
@@ -69,7 +69,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_duzun_dm06.dts b/target/linux/ramips/dts/mt7628an_duzun_dm06.dts
index 59d411f88f..1c40c12caf 100644
--- a/target/linux/ramips/dts/mt7628an_duzun_dm06.dts
+++ b/target/linux/ramips/dts/mt7628an_duzun_dm06.dts
@@ -96,7 +96,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <60000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi b/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
index 42bb804c65..4b114c9414 100644
--- a/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
+++ b/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
@@ -36,7 +36,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts b/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts
index 1c57fce196..7b288701c9 100644
--- a/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts
+++ b/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts
@@ -50,7 +50,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi b/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi
index 41e5fb7e4b..a8e7353967 100644
--- a/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi
+++ b/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi
@@ -70,7 +70,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <86000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions: partitions {
diff --git a/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts b/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts
index 177cd4db8a..b6a5a61b7c 100644
--- a/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts
+++ b/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts
@@ -89,7 +89,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <104000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts b/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
index 7755b5dfef..658a71066a 100644
--- a/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
+++ b/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
@@ -56,7 +56,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <60000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";

From d92c42f46990db232c163e20a05c7443d9efd2e1 Mon Sep 17 00:00:00 2001
From: novenary enneagon <novenary@kwak.zip>
Date: Wed, 10 Jul 2024 12:16:03 +0300
Subject: [PATCH 18/18] ncurses: add foot terminfo

Add terminfo file for the terminal emulator foot.

https://codeberg.org/dnkl/foot

Signed-off-by: novenary enneagon <novenary@kwak.zip>
Link: https://github.com/openwrt/openwrt/pull/15915
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 package/libs/ncurses/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/package/libs/ncurses/Makefile b/package/libs/ncurses/Makefile
index 02791720c1..0958051533 100644
--- a/package/libs/ncurses/Makefile
+++ b/package/libs/ncurses/Makefile
@@ -126,6 +126,7 @@ ifneq ($(HOST_OS),FreeBSD)
 		a/ansi \
 		a/alacritty \
 		d/dumb \
+		f/foot \
 		l/linux \
 		r/rxvt \
 		r/rxvt-unicode \