From c873f61bb30af4a26561f4c7b940769cdb70cc70 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:18:02 +0800 Subject: [PATCH 01/25] =?UTF-8?q?Poedit=20=E8=87=AA=E5=8A=A8=E4=BF=AE?= =?UTF-8?q?=E5=A4=8D=E4=BA=86=E2=80=9Cmore.zh-cn.po=E2=80=9D=E6=96=87?= =?UTF-8?q?=E4=BB=B6=E4=B8=AD=E7=9A=84=E6=97=A0=E6=95=88=E5=86=85=E5=AE=B9?= =?UTF-8?q?=E3=80=82=20=E8=AF=A5=E6=96=87=E4=BB=B6=E4=B8=AD=E5=8C=85?= =?UTF-8?q?=E5=90=AB=E9=87=8D=E5=A4=8D=E7=9A=84=E9=A1=B9=E7=9B=AE=EF=BC=8C?= =?UTF-8?q?=E8=BF=99=E6=98=AF=E4=B8=8D=E5=85=81=E8=AE=B8=E7=9A=84=EF=BC=8C?= =?UTF-8?q?=E5=B9=B6=E4=B8=94=E5=BD=B1=E5=93=8D=E4=BA=86=E8=AF=A5=E6=96=87?= =?UTF-8?q?=E4=BB=B6=E8=A2=AB=E4=BD=BF=E7=94=A8=E3=80=82Poedit=20=E4=BF=AE?= =?UTF-8?q?=E5=A4=8D=E4=BA=86=E8=AF=A5=E9=97=AE=E9=A2=98=EF=BC=8C=E4=BD=86?= =?UTF-8?q?=E6=82=A8=E5=BA=94=E8=AF=A5=E5=AE=A1=E9=98=85=E4=BB=BB=E4=BD=95?= =?UTF-8?q?=E5=B7=B2=E8=A2=AB=E6=A0=87=E8=AE=B0=E4=B8=BA=E2=80=9C=E9=9C=80?= =?UTF-8?q?=E8=A6=81=E5=A4=84=E7=90=86=E2=80=9D=E7=9A=84=E7=BF=BB=E8=AF=91?= =?UTF-8?q?=E5=92=8C=E7=BA=A0=E6=AD=A3=E5=AE=83=E4=BB=AC=EF=BC=88=E5=A6=82?= =?UTF-8?q?=E6=9C=89=E5=BF=85=E8=A6=81=EF=BC=89=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../lean/default-settings/i18n/more.zh-cn.po | 72 +++++++++++-------- 1 file changed, 42 insertions(+), 30 deletions(-) diff --git a/package/lean/default-settings/i18n/more.zh-cn.po b/package/lean/default-settings/i18n/more.zh-cn.po index 404bf6dcad..3144b79635 100644 --- a/package/lean/default-settings/i18n/more.zh-cn.po +++ b/package/lean/default-settings/i18n/more.zh-cn.po @@ -1,7 +1,15 @@ msgid "" msgstr "" "Content-Type: text/plain; charset=UTF-8\n" -"Last-Translator: Hsing-Wang Liao \n" +"Last-Translator: dingpengyu \n" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Language-Team: \n" +"MIME-Version: 1.0\n" +"Content-Transfer-Encoding: 8bit\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" msgid "%d hour" msgstr "%d 小时" @@ -318,7 +326,7 @@ msgid "Policy assigned" msgstr "分配的策略" msgid "Protocol" -msgstr "通信协议" +msgstr "协议" msgid "Recovery interval" msgstr "故障恢复间隔" @@ -551,13 +559,13 @@ msgid "never" msgstr "从不" msgid "restart" -msgstr "" +msgstr "重启" msgid "start" -msgstr "" +msgstr "开机" msgid "stop" -msgstr "" +msgstr "关机" msgid "unreachable (reject)" msgstr "不可达（拒绝）" @@ -679,8 +687,8 @@ msgid "" "specific date, e.g. every 3rd. Choose \"Fixed interval\" to restart the " "accounting period exactly every N days, beginning at a given date." msgstr "" -"选择“每月的某一天”来设置统计周期的重启时间，例如：每个月的第 3 天。选择“固定周" -"期”来设置从给定日期开始每 N 天重启统计周期。" +"选择“每月的某一天”来设置统计周期的重启时间，例如：每个月的第 3 天。选择“固定" +"周期”来设置从给定日期开始每 N 天重启统计周期。" msgid "Commit interval" msgstr "提交间隔" @@ -688,11 +696,8 @@ msgstr "提交间隔" msgid "Compress database" msgstr "压缩数据库" -msgid "Configuration" -msgstr "配置" - msgid "Conn." -msgstr "连接" +msgstr "连接。" msgid "Connections" msgstr "连接" @@ -716,8 +721,8 @@ msgid "" "towards the end of month, e.g. \"-5\" to specify the 27th of July or the " "24th of Februrary." msgstr "" -"每个月重启统计周期的日期。使用负数表示从月底开始计算，例如：\"-5\" 可以表" -"示 7 月份的 27 号或者 2 月份的 24 号。" +"每个月重启统计周期的日期。使用负数表示从月底开始计算，例如：\"-5\" 可以表示 " +"7 月份的 27 号或者 2 月份的 24 号。" msgid "Display" msgstr "显示" @@ -750,7 +755,7 @@ msgid "Fixed interval" msgstr "固定周期" msgid "Force reload…" -msgstr "强制重新加载..." +msgstr "强制重新加载..…" msgid "General Settings" msgstr "基本设置" @@ -767,9 +772,6 @@ msgstr "主机名：example.org" msgid "IPv4 vs. IPv6" msgstr "IPv4 与 IPv6" -msgid "IPv6" -msgstr "IPv6" - msgid "Interval" msgstr "周期" @@ -830,9 +832,6 @@ msgstr "仅统计来自或目标为这些子网的连接流量。" msgid "Preallocate database" msgstr "预分配数据库" -msgid "Protocol" -msgstr "协议" - msgid "Protocol Mapping" msgstr "协议映射" @@ -841,8 +840,8 @@ msgid "" "line. The first value specifies the IP protocol, the second value the port " "number and the third column is the name of the mapped protocol." msgstr "" -"协议映射用于区分流量类型，每行一条。第一个值指定 IP 协议类型，第二个值是" -"端口号，第三个值是映射的协议名称。" +"协议映射用于区分流量类型，每行一条。第一个值指定 IP 协议类型，第二个值是端口" +"号，第三个值是映射的协议名称。" msgid "Refresh interval" msgstr "刷新间隔" @@ -872,8 +871,8 @@ msgid "" "The Netlink Bandwidth Monitor (nlbwmon) is a lightweight, efficient traffic " "accounting program keeping track of bandwidth usage per host and protocol." msgstr "" -"网络带宽监视器（nlbwmon）是一个轻量、高效的流量统计程序，可以统计每个主机和" -"协议的带宽使用情况。" +"网络带宽监视器（nlbwmon）是一个轻量、高效的流量统计程序，可以统计每个主机和协" +"议的带宽使用情况。" msgid "The following database files have been restored: %s" msgstr "以下数据库文件已恢复：%s" @@ -926,15 +925,15 @@ msgstr "无流量数据" msgid "other" msgstr "其他" -msgid "Enable IGMP snooping" -msgstr "开启 IGMP snooping" +msgid "" +"Enable IGMP " +"snooping" +msgstr "" +"开启 IGMP snooping" msgid "Enables IGMP snooping on this bridge" msgstr "在此桥接上启用 IGMP snooping 组播（多播）" -msgid "" -msgstr "Content-Type: text/plain; charset=UTF-8" - msgid "Action" msgstr "动作" @@ -975,7 +974,7 @@ msgid "Reboot Device to an Alternative Partition" msgstr "重启设备到备选分区" msgid "Reboot to alternative partition..." -msgstr "重启到备选分区" +msgstr "重启到备选分区。" msgid "Reboot to current partition" msgstr "重启到当前分区" @@ -995,6 +994,8 @@ msgid "" "address of your computer to reach the device again, depending on your " "settings." msgstr "" +"系统正在重启。
请勿关闭设备电源！
请等待几分钟，然后再尝试重新连" +"接。根据您的设置，可能需要更新计算机的地址才能再次访问该设备。" msgid "" "The system is rebooting to an alternative partition now.
DO NOT POWER " @@ -1002,12 +1003,16 @@ msgid "" "might be necessary to renew the address of your computer to reach the device " "again, depending on your settings." msgstr "" +"系统正在重新引导到备用分区。
请勿关闭设备电源！
请等待几分钟，然" +"后再尝试重新连接。根据您的设置，可能需要更新计算机的地址才能再次访问该设备。" msgid "" "The system is shutting down now.
DO NOT POWER OFF THE DEVICE!
It " "might be necessary to renew the address of your computer to reach the device " "again, depending on your settings." msgstr "" +"系统正在关闭。
请勿关闭设备电源！
根据您的设置，可能需要更新计算" +"机的地址才能再次访问该设备。" msgid "" "WARNING: An alternative partition might have its own settings and completely " @@ -1019,12 +1024,19 @@ msgid "" "back to the currently active partition.

Click \"Proceed\" below " "to reboot device to an alternative partition." msgstr "" +"警告：备用分区可能具有自己的设置和完全不同的固件。

由于备用分区上" +"的网络配置和WiFi SSID /密码可能有所不同，因此您可能必须调整计算机设置才能在设" +"备重启后访问设备。

另请注意，备用分区固件可能无法提供切换活动分区" +"并引导回当前活动分区的简便方法。

点击 \"继续\" 下面将设备重新引导" +"到备用分区。" msgid "" "WARNING: Power off might result in a reboot on a device which doesn't " "support power off.

Click \"Proceed\" below to power off your " "device." msgstr "" +"警告： 关闭电源可能会导致不支持关闭电源的设备重新启动。

单击下面的" +"\"继续\"以关闭设备电源。" msgid "Warning: There are unsaved changes that will get lost on reboot!" msgstr "警告：某些设置没有保存，重启将导致丢失这些配置！" From 4832be27f669d98ecea53de8eb481119553dee7d Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:22:49 +0800 Subject: [PATCH 02/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20luci-i18n-sqm.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=BF=BB=E8=AF=91=E6=9D=A1=E7=9B=AE?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../lean/default-settings/i18n/sqm.zh-cn.po | 106 ++++++------------ 1 file changed, 34 insertions(+), 72 deletions(-) diff --git a/package/lean/default-settings/i18n/sqm.zh-cn.po b/package/lean/default-settings/i18n/sqm.zh-cn.po index 20cc51c3fb..fa1b927079 100644 --- a/package/lean/default-settings/i18n/sqm.zh-cn.po +++ b/package/lean/default-settings/i18n/sqm.zh-cn.po @@ -2,14 +2,14 @@ msgid "" msgstr "" "Project-Id-Version: luci-i18n-sqm\n" "POT-Creation-Date: 2017-03-28 04:14+0800\n" -"PO-Revision-Date: 2017-03-28 04:15+0800\n" -"Last-Translator: \n" +"PO-Revision-Date: 2020-06-07 10:21+0800\n" +"Last-Translator: dingpengyu \n" "Language-Team: player131 \n" "Language: zh_CN\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" -"X-Generator: Poedit 1.8.10\n" +"X-Generator: Poedit 2.3.1\n" "X-Poedit-Basepath: .\n" "Plural-Forms: nplurals=1; plural=0;\n" "X-Poedit-KeywordsList: translate\n" @@ -25,12 +25,9 @@ msgstr "智能队列管理" #: usr/lib/lua/luci/model/cbi/sqm.lua:26 msgid "" -"With SQM you can enable " -"traffic shaping, better mixing (Fair Queueing), active queue length " -"management (AQM) and prioritisation on one network interface." -msgstr "" -"使用 SQM 你可以启用流量整形，更好的混合" -"(公平列队)主动列队管理(AQM) 并设置网络接口优先级。" +"With SQM you can enable traffic shaping, better mixing (Fair Queueing), active queue length management " +"(AQM) and prioritisation on one network interface." +msgstr "使用 SQM 你可以启用流量整形，更好的混合(公平列队)主动列队管理(AQM) 并设置网络接口优先级。" #: usr/lib/lua/luci/model/cbi/sqm.lua:32 msgid "Queues" @@ -50,57 +47,41 @@ msgstr "链路层适配" #: usr/lib/lua/luci/model/cbi/sqm.lua:40 msgid "Enable this SQM instance." -msgstr "启用此SQM实例" +msgstr "启用此SQM实例。" #: usr/lib/lua/luci/model/cbi/sqm.lua:54 msgid "" -"The SQM GUI has just enabled the sqm initscript on your behalf. Remember to " -"disable the sqm initscript manually under System Startup menu in case this " -"change was not wished for." -msgstr "" -"你刚刚开启了SQM随机启动功能，如果你不希望SQM随机启动，可以在系统启动菜单下手" -"动禁用。" +"The SQM GUI has just enabled the sqm initscript on your behalf. Remember to disable the sqm initscript manually under System Startup menu in case " +"this change was not wished for." +msgstr "你刚刚开启了SQM随机启动功能，如果你不希望SQM随机启动，可以在系统启动菜单下手动禁用。" #: usr/lib/lua/luci/model/cbi/sqm.lua:60 msgid "Interface name" msgstr "接口名称" #: usr/lib/lua/luci/model/cbi/sqm.lua:70 -msgid "" -"Download speed (kbit/s) (ingress) set to 0 to selectively disable ingress " -"shaping:" +msgid "Download speed (kbit/s) (ingress) set to 0 to selectively disable ingress shaping:" msgstr "下载速度(kbit/s)(入口)
设置为0关闭入口控制：" #: usr/lib/lua/luci/model/cbi/sqm.lua:74 -msgid "" -"Upload speed (kbit/s) (egress) set to 0 to selectively disable egress " -"shaping:" +msgid "Upload speed (kbit/s) (egress) set to 0 to selectively disable egress shaping:" msgstr "上传速度(kbit/s)(出口)
设置为0关闭出口控制：" #: usr/lib/lua/luci/model/cbi/sqm.lua:78 -msgid "" -"Create log file for this SQM instance under /var/run/sqm/${Inerface_name}." -"debug.log. Make sure to delete log files manually." -msgstr "" -"创建日志文件到/var/run/sqm/
${Inerface_name}.debug.log。
请务必手动" -"删除日志文件。" +msgid "Create log file for this SQM instance under /var/run/sqm/${Inerface_name}.debug.log. Make sure to delete log files manually." +msgstr "创建日志文件到/var/run/sqm/
${Inerface_name}.debug.log。
请务必手动删除日志文件。" #: usr/lib/lua/luci/model/cbi/sqm.lua:82 msgid "Verbosity of SQM's output into the system log." msgstr "SQM输出到系统日志的详细程度。" -#: usr/lib/lua/luci/model/cbi/sqm.lua:86 usr/lib/lua/luci/model/cbi/sqm.lua:99 -#: usr/lib/lua/luci/model/cbi/sqm.lua:148 -#: usr/lib/lua/luci/model/cbi/sqm.lua:155 -#: usr/lib/lua/luci/model/cbi/sqm.lua:202 -#: usr/lib/lua/luci/model/cbi/sqm.lua:243 +#: usr/lib/lua/luci/model/cbi/sqm.lua:86 usr/lib/lua/luci/model/cbi/sqm.lua:99 usr/lib/lua/luci/model/cbi/sqm.lua:148 +#: usr/lib/lua/luci/model/cbi/sqm.lua:155 usr/lib/lua/luci/model/cbi/sqm.lua:202 usr/lib/lua/luci/model/cbi/sqm.lua:243 msgid "default" msgstr "默认" #: usr/lib/lua/luci/model/cbi/sqm.lua:98 -msgid "" -"Queuing disciplines useable on this system. After installing a new qdisc, " -"you need to restart the router to see updates!" +msgid "Queuing disciplines useable on this system. After installing a new qdisc, you need to restart the router to see updates!" msgstr "系统上可用的列队规则。安装新的队列规则后，重新启动路由器才会看到更新！" #: usr/lib/lua/luci/model/cbi/sqm.lua:112 @@ -108,9 +89,7 @@ msgid "Queue setup script" msgstr "队列脚本设置" #: usr/lib/lua/luci/model/cbi/sqm.lua:129 -msgid "" -"Show and Use Advanced Configuration. Advanced options will only be used as " -"long as this box is checked." +msgid "Show and Use Advanced Configuration. Advanced options will only be used as long as this box is checked." msgstr "选中该复选框显示高级配置。" #: usr/lib/lua/luci/model/cbi/sqm.lua:133 @@ -119,22 +98,18 @@ msgstr "入站数据包压缩DSCP:" #: usr/lib/lua/luci/model/cbi/sqm.lua:140 msgid "Ignore DSCP on ingress:" -msgstr "忽略入站DSCP" +msgstr "忽略入站DSCP：" #: usr/lib/lua/luci/model/cbi/sqm.lua:147 -msgid "" -"Explicit congestion notification (ECN) status on inbound packets (ingress):" -msgstr "入站数据包的显式拥塞通知（ECN）状态" +msgid "Explicit congestion notification (ECN) status on inbound packets (ingress):" +msgstr "入站数据包的显式拥塞通知（ECN）状态：" #: usr/lib/lua/luci/model/cbi/sqm.lua:154 -msgid "" -"Explicit congestion notification (ECN) status on outbound packets (egress)." -msgstr "出站数据包的显式拥塞通知（ECN）状态" +msgid "Explicit congestion notification (ECN) status on outbound packets (egress)." +msgstr "出站数据包的显式拥塞通知（ECN）状态。" #: usr/lib/lua/luci/model/cbi/sqm.lua:161 -msgid "" -"Show and Use Dangerous Configuration. Dangerous options will only be used as " -"long as this box is checked." +msgid "Show and Use Dangerous Configuration. Dangerous options will only be used as long as this box is checked." msgstr "选中该复选框显示危险配置。" #: usr/lib/lua/luci/model/cbi/sqm.lua:166 @@ -154,16 +129,12 @@ msgid "Latency target for egress, e.g. 5ms [units: s, ms, or us]; leave empty fo msgstr "出站延迟目标，例如 5ms [单位: s, ms, 或 us]；留空为自动选择，default为列队规则默认值。" #: usr/lib/lua/luci/model/cbi/sqm.lua:192 -msgid "" -"Advanced option string to pass to the ingress queueing disciplines; no error " -"checking, use very carefully." -msgstr "传递到入站队列规则的高级选项字符串；没有错误检查。请谨慎使用！" +msgid "Advanced option string to pass to the ingress queueing disciplines; no error checking, use very carefully." +msgstr "传递到入站队列规则的高级选项字符串；没有错误检查。请谨慎使用。" #: usr/lib/lua/luci/model/cbi/sqm.lua:196 -msgid "" -"Advanced option string to pass to the egress queueing disciplines; no error " -"checking, use very carefully." -msgstr "传递到出站队列规则的高级选项字符串；没有错误检查。请谨慎使用！" +msgid "Advanced option string to pass to the egress queueing disciplines; no error checking, use very carefully." +msgstr "传递到出站队列规则的高级选项字符串；没有错误检查。请谨慎使用。" #: usr/lib/lua/luci/model/cbi/sqm.lua:201 msgid "Which link layer to account for:" @@ -171,31 +142,22 @@ msgstr "对哪个链路层生效:" #: usr/lib/lua/luci/model/cbi/sqm.lua:207 msgid "Per Packet Overhead (byte):" -msgstr "每个数据包开销" +msgstr "每个数据包的开销 (byte)：" #: usr/lib/lua/luci/model/cbi/sqm.lua:216 -msgid "" -"Show Advanced Linklayer Options, (only needed if MTU > 1500). Advanced " -"options will only be used as long as this box is checked." -msgstr "" -"显示高级链路选项，（仅在MTU> 1500时才需要）。 只有选中此框时，才会使用高级选" -"项。" +msgid "Show Advanced Linklayer Options, (only needed if MTU > 1500). Advanced options will only be used as long as this box is checked." +msgstr "显示高级链路选项，（仅在MTU> 1500时才需要）。 只有选中此框时，才会使用高级选项。" #: usr/lib/lua/luci/model/cbi/sqm.lua:221 -msgid "" -"Maximal Size for size and rate calculations, tcMTU (byte); needs to be >= " -"interface MTU + overhead:" +msgid "Maximal Size for size and rate calculations, tcMTU (byte); needs to be >= interface MTU + overhead:" msgstr "大小和速率计算的最大尺寸，tcMTU（byte）; 需要> =接口MTU +开销：" #: usr/lib/lua/luci/model/cbi/sqm.lua:228 -msgid "" -"Number of entries in size/rate tables, TSIZE; for ATM choose TSIZE = (tcMTU " -"+ 1) / 16:" +msgid "Number of entries in size/rate tables, TSIZE; for ATM choose TSIZE = (tcMTU + 1) / 16:" msgstr "大小/速率表中的条目数，TSIZE; 对于ATM选择TSIZE =（tcMTU + 1）/ 16：" #: usr/lib/lua/luci/model/cbi/sqm.lua:235 -msgid "" -"Minimal packet size, MPU (byte); needs to be > 0 for ethernet size tables:" +msgid "Minimal packet size, MPU (byte); needs to be > 0 for ethernet size tables:" msgstr "最小数据包大小，MPU（byte）; 在以太网中需要>0：" #: usr/lib/lua/luci/model/cbi/sqm.lua:242 From 7453ca8d067b7250ce9ac7c11310d96292b34bea Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:25:42 +0800 Subject: [PATCH 03/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20adbyby.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../luci-app-adbyby-plus/po/zh-cn/adbyby.po | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po b/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po index cbe23b737c..86d5db5eef 100644 --- a/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po +++ b/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po @@ -1,3 +1,16 @@ +msgid "" +msgstr "" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" + msgid "ADBYBY Plus +" msgstr "广告屏蔽大师 Plus+" @@ -121,7 +134,6 @@ msgstr "内存运行模式" msgid "Running Adbyby in RAM.More speed,less disk consumption" msgstr "在内存中运行Adbyby。更快的速度，更少的存储空间损耗" - msgid "User-defined Rule" msgstr "用户自定义规则" @@ -129,7 +141,7 @@ msgid "Client Filter Mode Settings" msgstr "客户端过滤模式设置" msgid "Filter mode settings can be set to specific LAN clients ( No filter , Global filter ) . Does not need to be set by default." -msgstr "可以为局域网客户端分别设置不同的过滤模式 ( 不过滤 , 全局过滤 ) 。默认无需设置" +msgstr "可以为局域网客户端分别设置不同的过滤模式 ( 不过滤 , 全局过滤 ) 。默认无需设置。" msgid "IP Address" msgstr "IP地址" @@ -150,7 +162,7 @@ msgid "（!）Will Always block these IP" msgstr "拦截黑名单内的IP地址（所有模式中生效）" msgid "Each line of the beginning exclamation mark is considered an annotation." -msgstr "每行一条规则，感叹号开头的被认为是注释" +msgstr "每行一条规则，感叹号开头的被认为是注释。" msgid "Adblock Plus Host List：" msgstr "Adblock Plus Host 列表：" @@ -184,4 +196,3 @@ msgstr "域名黑名单" msgid "Block IP List" msgstr "IP黑名单" - From 8dc4c4bf01f479f470a7d0ee5b4961ca21393440 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:31:47 +0800 Subject: [PATCH 04/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20cpufreq.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=BF=BB=E8=AF=91=E6=8E=92=E5=BA=8F?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../lean/luci-app-cpufreq/po/zh-cn/cpufreq.po | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/package/lean/luci-app-cpufreq/po/zh-cn/cpufreq.po b/package/lean/luci-app-cpufreq/po/zh-cn/cpufreq.po index af33725879..60fd39ff7a 100644 --- a/package/lean/luci-app-cpufreq/po/zh-cn/cpufreq.po +++ b/package/lean/luci-app-cpufreq/po/zh-cn/cpufreq.po @@ -1,3 +1,16 @@ +msgid "" +msgstr "" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" + msgid "CPU Freq" msgstr "CPU 性能优化调节" @@ -17,10 +30,10 @@ msgid "Performance Mode" msgstr "Performance 高性能模式（降低游戏转发延迟）" msgid "ondemand" -msgstr "Ondemand 自动平衡模式" +msgstr "ondemand 自动平衡模式" msgid "performance" -msgstr "Performance 高性能模式（降低游戏转发延迟）" +msgstr "performance 高性能模式（降低游戏转发延迟）" msgid "CPU Freq from 48000 to 716000 (Khz)" msgstr "CPU 频率范围为 48000 到 716000 (Khz)" @@ -42,4 +55,3 @@ msgstr "CPU 切换周期" msgid "The sampling rate determines how frequently the governor checks to tune the CPU (ms)" msgstr "CPU 检查切换的周期 (ms) 。注意：过于频繁的切换频率会引起网络延迟抖动" - From c01f66c913a82a204ce6f807d0e7fef8589d8d51 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:36:20 +0800 Subject: [PATCH 05/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20filetransfer.po=20?= =?UTF-8?q?=E4=BC=98=E5=8C=96=E7=BF=BB=E8=AF=91?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../po/zh-cn/filetransfer.po | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/package/lean/luci-app-filetransfer/po/zh-cn/filetransfer.po b/package/lean/luci-app-filetransfer/po/zh-cn/filetransfer.po index 27f40a92a6..925a47aab6 100644 --- a/package/lean/luci-app-filetransfer/po/zh-cn/filetransfer.po +++ b/package/lean/luci-app-filetransfer/po/zh-cn/filetransfer.po @@ -1,5 +1,15 @@ msgid "" -msgstr "Content-Type: text/plain; charset=UTF-8" +msgstr "" +"Content-Type: text/plain; charset=UTF-8\n" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" +"MIME-Version: 1.0\n" +"Content-Transfer-Encoding: 8bit\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" msgid "Choose local file:" msgstr "选择本地文件：" @@ -35,10 +45,10 @@ msgid "Modify time" msgstr "修改时间" msgid "No specify upload file." -msgstr "未指定上传文件" +msgstr "未指定上传文件。" msgid "Path on Route:" -msgstr "路由上目录" +msgstr "路由根目录：" msgid "Remove" msgstr "移除" From 0e98610329a46e56622b97f1bcd219877d8b5411 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:41:09 +0800 Subject: [PATCH 06/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20kodexplorer.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../po/zh-cn/kodexplorer.po | 21 +++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/package/lean/luci-app-kodexplorer/po/zh-cn/kodexplorer.po b/package/lean/luci-app-kodexplorer/po/zh-cn/kodexplorer.po index a985306d06..24e3e7839b 100644 --- a/package/lean/luci-app-kodexplorer/po/zh-cn/kodexplorer.po +++ b/package/lean/luci-app-kodexplorer/po/zh-cn/kodexplorer.po @@ -1,3 +1,16 @@ +msgid "" +msgstr "" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" + msgid "KodExplorer" msgstr "可道云" @@ -56,7 +69,7 @@ msgid "Click to update" msgstr "点击更新" msgid "Updating..." -msgstr "更新中" +msgstr "更新中..." msgid "Unexpected error" msgstr "意外错误" @@ -65,13 +78,13 @@ msgid "Updating, are you sure to close?" msgstr "正在更新，你确认要关闭吗？" msgid "Downloading..." -msgstr "下载中" +msgstr "下载中..." msgid "Unpacking..." -msgstr "解压中" +msgstr "解压中..." msgid "Moving..." -msgstr "移动中" +msgstr "移动中..." msgid "The latest version:" msgstr "最新版本：" From 1fd9d1de3fbf83af346bd72fd06e4bf7d369e1aa Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:42:50 +0800 Subject: [PATCH 07/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20forked-daapd.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../po/zh-cn/forked-daapd.po | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/package/lean/luci-app-music-remote-center/po/zh-cn/forked-daapd.po b/package/lean/luci-app-music-remote-center/po/zh-cn/forked-daapd.po index 58309d554e..9e4f1d4661 100644 --- a/package/lean/luci-app-music-remote-center/po/zh-cn/forked-daapd.po +++ b/package/lean/luci-app-music-remote-center/po/zh-cn/forked-daapd.po @@ -2,16 +2,17 @@ msgid "" msgstr "" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2015-06-23 20:16+0800\n" -"PO-Revision-Date: 2015-06-23 20:17+0800\n" -"Last-Translator: coolsnowwolf \n" +"PO-Revision-Date: 2020-06-07 10:42+0800\n" +"Last-Translator: dingpengyu \n" "Language-Team: PandoraBox Team\n" "Language: zh_CN\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=1; plural=0;\n" -"X-Generator: Poedit 1.8.1\n" +"X-Generator: Poedit 2.3.1\n" "X-Poedit-SourceCharset: UTF-8\n" +"Project-Id-Version: \n" msgid "Music Remote Center" msgstr "PCHiFi 数字转盘遥控" @@ -20,7 +21,7 @@ msgid "Open Web Interface" msgstr "打开 Web 管理界面" msgid "Music Remote Center is a DAAP (iTunes Remote), MPD (Music Player Daemon) and RSP (Roku) media server." -msgstr "PCHiFi 数字转盘遥控是一个基于 DAAP (iTunes Remote), MPD (Music Player Daemon) 和 RSP (Roku) media server 的服务器端播放器
后端输出支持 路由器本机声卡输出 /Airplay/ Chromecast" +msgstr "PCHiFi 数字转盘遥控是一个基于 DAAP (iTunes Remote), MPD (Music Player Daemon) 和 RSP (Roku) media server 的服务器端播放器
后端输出支持 路由器本机声卡输出 /Airplay/ Chromecast。" msgid "Database File Path" msgstr "数据库文件路径" @@ -33,4 +34,3 @@ msgstr "使用须知" msgid "About iOS Remote Pairing:
1. Open the web interface
2. Start iPhone Remote APP, go to Settings, Add Library
3. Enter the pair code in the web interface" msgstr "关于 iOS 设备匹配:
1. 先打开 Web 管理界面，在 Setting 里面找到 Remotes & Outputs
2. 安装 iTunes 遥控器, 点击 手动连接，获取匹配码
3. 在 Remote Pairing 输入刚才获取的匹配码即可" - From 9e09f3fbd5d0904578ef084a4f0e8e45363ea31c Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:45:38 +0800 Subject: [PATCH 08/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20nft-qos.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- package/lean/luci-app-nft-qos/po/zh-cn/nft-qos.po | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/package/lean/luci-app-nft-qos/po/zh-cn/nft-qos.po b/package/lean/luci-app-nft-qos/po/zh-cn/nft-qos.po index 73ce11f5d0..37a0d1841d 100644 --- a/package/lean/luci-app-nft-qos/po/zh-cn/nft-qos.po +++ b/package/lean/luci-app-nft-qos/po/zh-cn/nft-qos.po @@ -6,12 +6,12 @@ msgstr "" "Content-Type: text/plain; charset=UTF-8\n" "Project-Id-Version: \n" "POT-Creation-Date: \n" -"PO-Revision-Date: 2019-01-03 22:28+0800\n" +"PO-Revision-Date: 2020-06-07 10:45+0800\n" "Language-Team: \n" "MIME-Version: 1.0\n" "Content-Transfer-Encoding: 8bit\n" -"X-Generator: Gtranslator 3.30.1\n" -"Last-Translator: Yangfl \n" +"X-Generator: Poedit 2.3.1\n" +"Last-Translator: dingpengyu \n" "Plural-Forms: nplurals=1; plural=0;\n" "Language: zh_CN\n" @@ -23,7 +23,7 @@ msgstr "字节总数" #: applications/luci-app-nft-qos/luasrc/view/nft-qos/rate.htm:141 #: applications/luci-app-nft-qos/luasrc/view/nft-qos/rate.htm:160 msgid "Collecting data..." -msgstr "正在收集数据…" +msgstr "正在收集数据..." #: applications/luci-app-nft-qos/luasrc/model/cbi/nft-qos/nft-qos.lua:224 msgid "Comment" From edb9353889d1706f114f56698160478f0e1b1e8f Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 10:47:33 +0800 Subject: [PATCH 09/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20pppoe-relay.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../po/zh-cn/pppoe-relay.po | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/package/lean/luci-app-pppoe-relay/po/zh-cn/pppoe-relay.po b/package/lean/luci-app-pppoe-relay/po/zh-cn/pppoe-relay.po index e1a0c10340..f7321e6cbd 100644 --- a/package/lean/luci-app-pppoe-relay/po/zh-cn/pppoe-relay.po +++ b/package/lean/luci-app-pppoe-relay/po/zh-cn/pppoe-relay.po @@ -1,8 +1,21 @@ +msgid "" +msgstr "" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" + msgid "PPPoE Relay" msgstr "PPPoE 穿透" msgid "Opening the PPPoE relay allows devices in the Intranet to create a separate PPPoE connection that can cross NAT." -msgstr "开启 PPPoE 中继允许内网中的设备创建一个可穿过 NAT 的独立 PPPoE 连接" +msgstr "开启 PPPoE 中继允许内网中的设备创建一个可穿过 NAT 的独立 PPPoE 连接。" msgid "Enable or disable the PPPoE Relay" msgstr "启用或禁用PPPoE穿透" @@ -20,4 +33,4 @@ msgid "Specify the PPPoE client interface" msgstr "指定PPPoE客户端接口" msgid "Enabled" -msgstr "启用" \ No newline at end of file +msgstr "启用" From 90e04aa14fa417a4131b9d2eb4e5aa028ee22d2d Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 11:11:09 +0800 Subject: [PATCH 10/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20qbittorrent.po=20?= =?UTF-8?q?=E7=BF=BB=E8=AF=91=E6=96=B0=E6=9D=A1=E7=9B=AE=20=E4=BF=AE?= =?UTF-8?q?=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../po/zh-cn/qbittorrent.po | 1152 +++++++++-------- 1 file changed, 578 insertions(+), 574 deletions(-) diff --git a/package/lean/luci-app-qbittorrent/po/zh-cn/qbittorrent.po b/package/lean/luci-app-qbittorrent/po/zh-cn/qbittorrent.po index 001a33f599..0334df90aa 100644 --- a/package/lean/luci-app-qbittorrent/po/zh-cn/qbittorrent.po +++ b/package/lean/luci-app-qbittorrent/po/zh-cn/qbittorrent.po @@ -1,574 +1,578 @@ -msgid "qbittorrent" -msgstr "qbittorrent" - -msgid "Running" -msgstr "运行中" - -msgid "Not running" -msgstr "未运行" - -msgid "qbittorrent Run Status" -msgstr "qbittorrent运行状态" - -msgid "Basic Settings" -msgstr "基本设置" - -msgid "Enable" -msgstr "启用" - -msgid "qBittorrent is a cross-platform free and open-source BitTorrent client" -msgstr "qBittorrent是一个基于 QT 的跨平台的开源 BitTorrent 客户端" - -msgid "profile_dir" -msgstr "配置文件目录" - -msgid "Store configuration files in the Path" -msgstr "配置文件存放路径" - -msgid "program_dir" -msgstr "程序目录" - -msgid "library_dir" -msgstr "库目录" - -msgid "Store Program files in the Path" -msgstr "程序文件存放路径" - -msgid "Store Library in the Path" -msgstr "库文件存放路径" - -msgid "Download Settings" -msgstr "下载设置" - -msgid "download_dir" -msgstr "下载目录" - -msgid "Store download files in the Path" -msgstr "下载文件存放目录" - -msgid "WEBUI Settings" -msgstr "WEBUI设置" - -msgid "WEBUI listening port" -msgstr "WebUI 监听端口" - -msgid "Use Random Port" -msgstr "随机传入连接端口" - -msgid "Randomly assigns a different port every time qBittorrent starts up" -msgstr "在每次启动时使用不同的传入连接端口" - -msgid "Connection Port" -msgstr "用于传入连接的端口" - -msgid "Incoming connection port" -msgstr "推荐在防火墙 -> 流量规则 中，打开这个端口获得更好的下载速度（ TCP+UDP ）" - -msgid "Bittorrent Settings" -msgstr "Bittorrent 设置" - -msgid "WebUI Settings" -msgstr "WebUI 设置" - -msgid "Advance Settings" -msgstr "高级设置" - - -msgid "Run daemon as user" -msgstr "用户组" - -msgid "Parent Path for Profile Folder" -msgstr "配置保存路径" - -msgid "The path for storing profile folder using by command: --profile [PATH]." -msgstr "配置文件的保存路径，默认的配置文件夹在/tmp下。例如：/etc/config" - -msgid "Profile Folder Suffix" -msgstr "配置目录后缀" - -msgid "Suffix for profile folder, for example, qBittorrent_[NAME]." -msgstr "配置文件文件夹的后缀。例如： qBittorrent_[NAME]" - -msgid "Locale Language" -msgstr "WebUI语言" - -msgid "English" -msgstr "英文" - -msgid "Chinese" -msgstr "中文" - -msgid "Enable Log" -msgstr "启用日志" - -msgid "Enable logger to log file." -msgstr "qBittorrent的启动和运行信息文档。" - -msgid "Log Path" -msgstr "日志文件" - -msgid "The path for qbittorrent log." -msgstr "日志文件自定义保存路径，默认都在配置文件夹的data下。" - -msgid "Enable Backup" -msgstr "启用备份" - -msgid "Backup log file when oversize the given size." -msgstr "备份日志文件。" - -msgid "Delete Old Backup" -msgstr "删除备份" - -msgid "Delete the old log file." -msgstr "符合下列设定后将删除旧的日志文件。" - -msgid "Log Max Size" -msgstr "日志保存大小" - -msgid "Log Saving Period" -msgstr "日志保存期限" - -msgid "The max size for qbittorrent log (Unit: Bytes)." -msgstr "设定日志文件的大小（单位：字节）" - -msgid "The log file will be deteted after given time. 1d -- 1 day, 1m -- 1 month, 1y -- 1 year" -msgstr "设定日志文件的时间（1d-1天,1m-1个月,1y-1年）" - -msgid "Connection Settings" -msgstr "连接设置" - -msgid "Use UPnP for Connections" -msgstr "端口自动转发" - -msgid "Use UPnP/ NAT-PMP port forwarding from my router." -msgstr "使用路由器的UPnP/NAT-PMP端口自动转发。" - -msgid "Use Random Port" -msgstr "启用随机端口" - -msgid "Use different port on each startup voids the first" -msgstr "在每次启动时使用随机的端口。" - -msgid "Connection Port" -msgstr "自定义端口" - -msgid "Generate Randomly" -msgstr "默认端口：8999" - -msgid "Global Download Speed" -msgstr "全局下载速度限制" - -msgid "Global Download Speed Limit(KiB/s)." -msgstr "全局下载速度限制(KiB/s)，0为无限制。" - -msgid "Global Upload Speed" -msgstr "全局上传速度限制" - -msgid "Alternative Download Speed" -msgstr "备用下载速度限制" - -msgid "Alternative Upload Speed" -msgstr "备用上传速度限制" - -msgid "Global Upload Speed Limit(KiB/s)." -msgstr "全局上传速度限制(KiB/s)，0为无限制。" - -msgid "Alternative Download Speed Limit(KiB/s)." -msgstr "备用下载速度限制(KiB/s)，0为无限制。" - -msgid "Alternative Upload Speed Limit(KiB/s)." -msgstr "备用上传速度限制(KiB/s)，0为无限制。" - -msgid "Enabled protocol" -msgstr "启用的协议" - -msgid "The protocol that was enabled." -msgstr "当前已启用的协议。" - -msgid "TCP and UTP" -msgstr "TCP和UTP" - -msgid "Inet Address" -msgstr "输入地址" - -msgid "The address that respond to the trackers." -msgstr "响应跟踪器的地址。" - -msgid "When adding seeds" -msgstr "当添加种子时" - -msgid "Downloads Settings" -msgstr "下载设置" - -msgid "Create Subfolder" -msgstr "创建目录" - -msgid "Create subfolder for torrents with multiple files." -msgstr "为含多个文件的种子创建子文件夹。" - -msgid "Start In Pause" -msgstr "开始暂停" - -msgid "Do not start the download automatically." -msgstr "在下载任务添加后暂停。" - -msgid "Auto Delete Torrent File" -msgstr "删除种子" - -msgid "The .torrent files will be deleted afterwards." -msgstr "下载完成后自动删除这个种子文件。" - -msgid "Pre Allocation" -msgstr "磁盘预分配" - -msgid "Pre-allocate disk space for all files." -msgstr "为刚添加的文件预先分配磁盘空间。" - -msgid "Use Incomplete Extension" -msgstr "使用扩展名" - -msgid "The incomplete task will be added the extension of !qB." -msgstr "为不完整的文件添加后缀名!qB" - -msgid "Save Path" -msgstr "文件保存路径" - -msgid "The path to save the download file. For example:/mnt/sda1/download" -msgstr "下载文件的保存路径。例如：/mnt/sda1/download" - -msgid "Temp Path Enabled" -msgstr "启用临时目录" - -msgid "Temp Path" -msgstr "临时路径" - -msgid "The absolute and relative path can be set." -msgstr "可以设置绝对和相对路径。" - -msgid "Disk Cache Size (MiB)" -msgstr "磁盘缓存" - -msgid "The value -1 is auto and 0 is disable. In default, it is set to 64MiB." -msgstr "数值1是自动的，0是禁用的。默认设置为64MiB。" - -msgid "Disk Cache TTL (s)" -msgstr "磁盘缓存TTL" - -msgid "In default, it is set to 60s." -msgstr "默认设置为60秒。" - -msgid "Saving Management" -msgstr "保存管理" - -msgid "Default Torrent Management Mode" -msgstr "默认种子管理模式" - -msgid "Manual" -msgstr "手动" - -msgid "Automaic" -msgstr "自动" - -msgid "Torrent Category Changed" -msgstr "当种子分类修改时" - -msgid "Choose the action when torrent category changed." -msgstr "选择种子类别更改时的操作。" - -msgid "Switch torrent to Manual Mode" -msgstr "将种子切换到手动模式" - -msgid "Relocate torrent" -msgstr "重新定位种子" - -msgid "Default Save Path Changed" -msgstr "当默认保存路径修改时" - -msgid "Choose the action when default save path changed." -msgstr "选择默认保存路径更改时的操作。" - -msgid "Switch affected torrent to Manual Mode" -msgstr "将受影响的种子切换到手动模式" - -msgid "Relocate affected torrent" -msgstr "重新定位种子" - -msgid "Category Save Path Changed" -msgstr "当分类保存路径修改时" - -msgid "Choose the action when category save path changed." -msgstr "选择分类保存路径更改时的操作。" - -msgid "Torrent Export Dir" -msgstr "种子导出目录" - -msgid "The .torrent files will be copied to the target directory." -msgstr "种子文件将被复制到目标目录。例如：/etc/config" - -msgid "Finished Torrent Export Dir" -msgstr "复制种子文件" - -msgid "The .torrent files for finished downloads will be copied to the target directory." -msgstr "将已下载完成的种子文件复制到目标目录。例如：/etc/config" - -msgid "Bittorrent Settings" -msgstr "BT设置"" - -msgid "Enable DHT" -msgstr "启用DHT" - -msgid "Enable DHT (decentralized network) to find more peers" -msgstr "启用DHT(去中心化网络) 以找到更多用户。" - -msgid "Enable PeX" -msgstr "启用PeX" - -msgid "Enable Peer Exchange (PeX) to find more peers" -msgstr "启用用户交换(PeX)以找到更多用户。" - -msgid "Enable LSD" -msgstr "启用LSD" - -msgid "Enable Local Peer Discovery to find more peers" -msgstr "启用本地用户发现以找到更多用户。" - -msgid "uTP Rate Limit" -msgstr "uTP速度限制" - -msgid "Apply rate limit to µTP protocol." -msgstr "针对µTP协议进行速度限制。" - -msgid "Encryption Mode" -msgstr "加密模式" - -msgid "Enable DHT (decentralized network) to find more peers" -msgstr "使DHT（分散网络）能够找到更多的对等点。" - -msgid "Prefer Encryption" -msgstr "偏好加密" - -msgid "Require Encryption" -msgstr "强制加密" - -msgid "Disable Encryption" -msgstr "禁用加密" - -msgid "Max Connections" -msgstr "连接数限制" - -msgid "The max number of connections." -msgstr "全局最大连接数。" - -msgid "Max Connections Per Torrent" -msgstr "种子连接数限制" - -msgid "The max number of connections per torrent." -msgstr "每个种子的最大连接数。" - -msgid "Max Uploads" -msgstr "最大上传数" - -msgid "The max number of connected peers." -msgstr "全局最大上传线程数。" - -msgid "Max Uploads Per Torrent" -msgstr "种子上传限制" - -msgid "The max number of connected peers per torrent." -msgstr "每个种子上传线程最大值。" - -msgid "Share rate limit" -msgstr "分享率限制" - -msgid "Max Ratio" -msgstr "最大的分享率" - -msgid "The max ratio for seeding. -1 is to disable the seeding." -msgstr "分享的最大比例设定。-1是禁用做种。" - -msgid "Max Seeding Minutes" -msgstr "最大做种时间" - -msgid "Units: minutes" -msgstr "做种最大比例设定。单位：分钟" - -msgid "Max Ratio Action" -msgstr "达到后" - -msgid "The action when reach the max seeding ratio." -msgstr "达到设定分享率和时间后的动作。" - -msgid "Pause them" -msgstr "暂停" - -msgid "Remove them" -msgstr "删除" - -msgid "Queueing Setting" -msgstr "种子排队设置" - -msgid "Enable Torrent Queueing" -msgstr "启用种子排队" - -msgid "Maximum Active Downloads" -msgstr "最大活动的下载数" - -msgid "Max Active Uploads" -msgstr "最大活动的上传数" - -msgid "Max Active Torrents" -msgstr "最大活动的种子数" - -msgid "Ignore Slow Torrents" -msgstr "忽略慢速的种子" - -msgid "Do not count slow torrents in these limits." -msgstr "慢速的种子不包在括限制内。" - -msgid "Download rate threshold" -msgstr "下载速度阈值" - -msgid "Upload rate threshold" -msgstr "上传速度阈值" - -msgid "Units: KiB/s" -msgstr "单位：KiB/s" - -msgid "Torrent inactivity timer" -msgstr "种子不活动时间" - -msgid "Units: seconds" -msgstr "时间单位：分钟" - -msgid "WebUI Settings" -msgstr "WebUI设置" - -msgid "Username" -msgstr "" - -msgid "Password" -msgstr "" - -msgid "Use UPnP for WebUI" -msgstr "WebUI端口转发" - -msgid "Using the UPnP / NAT-PMP port of the router for connecting to WebUI." -msgstr "使用路由器的UPnP/NAT-PMP端口转发到WebUI。" - -msgid "The login name for WebUI." -msgstr "WebUI的登录用户名设置。" - -msgid "The login password for WebUI." -msgstr "WebUI用户的登录密码设置。" - -msgid "The listening port for WebUI." -msgstr "WebUI的登录端口设置。默认端口：8080" - -msgid "CSRF Protection" -msgstr "CSRF保护" - -msgid "Enable Cross-Site Request Forgery (CSRF) protection." -msgstr "启用跨站点请求伪造(CSRF)保护。" - -msgid "Clickjacking Protection" -msgstr "劫持保护" - -msgid "Enable clickjacking protection." -msgstr "启用点击劫持保护。" - -msgid "Host Header Validation" -msgstr "主机标头验证" - -msgid "Validate the host header." -msgstr "启用主机标头验证." - -msgid "Local Host Authentication" -msgstr "本地主机认证" - -msgid "Force authentication for clients on localhost." -msgstr "强制对本地主机上的客户端进行身份验证。" - -msgid "Enable Subnet Whitelist" -msgstr "使子网白名单" - -msgid "Subnet Whitelist" -msgstr "输入IP地址" - -msgid "Skip authentication for clients in the IP subnet white list." -msgstr "对IP子网白名单中的客户端跳过身份验证." - -msgid "Advance Settings" -msgstr "高级设置" - -msgid "Anonymous Mode" -msgstr "匿名模式" - -msgid "When enabled, qBittorrent will take certain measures to try" -msgstr "启用后，qBittorrent将采取某些措施隐藏其身份。" - -msgid "Super Seeding" -msgstr "超级种子" - -msgid "The super seeding mode." -msgstr "超级种子模式。" - -msgid "Limit Overhead Usage" -msgstr "开销限制" - -msgid "The overhead usage is been limitted." -msgstr "对传送总开销进行速度限制。" - -msgid "Ignore LAN Limit" -msgstr "LAN限制" - -msgid "Ignore the speed limit to LAN." -msgstr "忽略对LAN的速度限制。" - -msgid "Use os Cache" -msgstr "使用OS操作系统缓存管理" - -msgid "Max Outgoing Port" -msgstr "端口设置" - -msgid The max outgoing port."" -msgstr "最大输出端口。" - -msgid "Min Outgoing Port" -msgstr "端口设置" - -msgid "The min outgoing port." -msgstr "最小输出端口。" - -msgid "Choking Algorithm" -msgstr "数据传输算法" - -msgid "The strategy of choking algorithm." -msgstr "数据传输算法的策略。" - -msgid "Round Robin" -msgstr "负载均衡" - -msgid "Fastest Upload" -msgstr "最快上传" - -msgid "Anti-Leech" -msgstr "反吸血" - -msgid "Announce To All Trackers" -msgstr "对所有Trackers宣告" - -msgid "Announce To All Tiers" -msgstr "对所有Tiers宣告" - -msgid "configuration file" -msgstr "配置文件" - -msgid "Operation log" -msgstr "运行日志" - -msgid "This page is the log document content of qbittorrent." -msgstr "本页是qBittorrent的日志文档内容。" - -msgid "This page is the content of the configuration document under /etc/config/qbittorrent." -msgstr "本页是/etc/config/qbittorrent下的配置文档内容。" - +msgid "" +msgstr "" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" + +msgid "qbittorrent" +msgstr "qbittorrent" + +msgid "Running" +msgstr "运行中" + +msgid "Not running" +msgstr "未运行" + +msgid "qbittorrent Run Status" +msgstr "qbittorrent运行状态" + +msgid "Basic Settings" +msgstr "基本设置" + +msgid "Enable" +msgstr "启用" + +msgid "qBittorrent is a cross-platform free and open-source BitTorrent client" +msgstr "qBittorrent是一个基于 QT 的跨平台的开源 BitTorrent 客户端" + +msgid "profile_dir" +msgstr "配置文件目录" + +msgid "Store configuration files in the Path" +msgstr "配置文件存放路径" + +msgid "program_dir" +msgstr "程序目录" + +msgid "library_dir" +msgstr "库目录" + +msgid "Store Program files in the Path" +msgstr "程序文件存放路径" + +msgid "Store Library in the Path" +msgstr "库文件存放路径" + +msgid "Download Settings" +msgstr "下载设置" + +msgid "download_dir" +msgstr "下载目录" + +msgid "Store download files in the Path" +msgstr "下载文件存放目录" + +msgid "WEBUI Settings" +msgstr "WEBUI设置" + +msgid "WEBUI listening port" +msgstr "WebUI 监听端口" + +msgid "Use Random Port" +msgstr "使用随机端口" + +msgid "Randomly assigns a different port every time qBittorrent starts up" +msgstr "在每次启动时使用不同的传入连接端口" + +msgid "Connection Port" +msgstr "连接端口" + +msgid "Incoming connection port" +msgstr "" +"推荐在防火墙 -> 流量规则 中，打开这个端口获得更好的下载速度（ TCP+UDP ）" + +msgid "Bittorrent Settings" +msgstr "Bittorrent 设置" + +msgid "WebUI Settings" +msgstr "WebUI 设置" + +msgid "Advance Settings" +msgstr "高级设置" + +msgid "Run daemon as user" +msgstr "用户组" + +msgid "Parent Path for Profile Folder" +msgstr "配置保存路径" + +msgid "" +"The path for storing profile folder using by command: --profile [PATH]." +msgstr "" +"配置文件的保存路径，默认的配置文件夹在/tmp下。例如：/etc/config。" + +msgid "Profile Folder Suffix" +msgstr "配置目录后缀" + +msgid "Suffix for profile folder, for example, qBittorrent_[NAME]." +msgstr "配置文件文件夹的后缀。例如： qBittorrent_[NAME]。" + +msgid "Locale Language" +msgstr "WebUI语言" + +msgid "English" +msgstr "英文" + +msgid "Chinese" +msgstr "中文" + +msgid "Enable Log" +msgstr "启用日志" + +msgid "Enable logger to log file." +msgstr "启用日志记录器以记录日志文件。" + +msgid "Log Path" +msgstr "日志文件" + +msgid "The path for qbittorrent log." +msgstr "日志文件自定义保存路径，默认都在配置文件夹的data下。" + +msgid "Enable Backup" +msgstr "启用备份" + +msgid "Backup log file when oversize the given size." +msgstr "备份日志文件。" + +msgid "Delete Old Backup" +msgstr "删除备份" + +msgid "Delete the old log file." +msgstr "符合下列设定后将删除旧的日志文件。" + +msgid "Log Max Size" +msgstr "日志保存大小" + +msgid "Log Saving Period" +msgstr "日志保存期限" + +msgid "The max size for qbittorrent log (Unit: Bytes)." +msgstr "设定日志文件的大小（单位：字节）" + +msgid "" +"The log file will be deteted after given time. 1d -- 1 day, 1m -- 1 month, " +"1y -- 1 year" +msgstr "设定日志文件的时间（1d-1天,1m-1个月,1y-1年）" + +msgid "Connection Settings" +msgstr "连接设置" + +msgid "Use UPnP for Connections" +msgstr "端口自动转发" + +msgid "Use UPnP/ NAT-PMP port forwarding from my router." +msgstr "使用路由器的UPnP/NAT-PMP端口自动转发。" + +msgid "Use different port on each startup voids the first" +msgstr "在每次启动时使用随机的端口，可能会使第一个启动无效" + +msgid "Generate Randomly" +msgstr "默认端口：8999" + +msgid "Global Download Speed" +msgstr "全局下载速度限制" + +msgid "Global Download Speed Limit(KiB/s)." +msgstr "全局下载速度限制(KiB/s)，0为无限制。" + +msgid "Global Upload Speed" +msgstr "全局上传速度限制" + +msgid "Alternative Download Speed" +msgstr "备用下载速度限制" + +msgid "Alternative Upload Speed" +msgstr "备用上传速度限制" + +msgid "Global Upload Speed Limit(KiB/s)." +msgstr "全局上传速度限制(KiB/s)，0为无限制。" + +msgid "Alternative Download Speed Limit(KiB/s)." +msgstr "备用下载速度限制(KiB/s)，0为无限制。" + +msgid "Alternative Upload Speed Limit(KiB/s)." +msgstr "备用上传速度限制(KiB/s)，0为无限制。" + +msgid "Enabled protocol" +msgstr "启用的协议" + +msgid "The protocol that was enabled." +msgstr "当前已启用的协议。" + +msgid "TCP and UTP" +msgstr "TCP和UTP" + +msgid "Inet Address" +msgstr "输入地址" + +msgid "The address that respond to the trackers." +msgstr "响应跟踪器的地址。" + +msgid "When adding seeds" +msgstr "当添加种子时" + +msgid "Downloads Settings" +msgstr "下载设置" + +msgid "Create Subfolder" +msgstr "创建目录" + +msgid "Create subfolder for torrents with multiple files." +msgstr "为含多个文件的种子创建子文件夹。" + +msgid "Start In Pause" +msgstr "开始暂停" + +msgid "Do not start the download automatically." +msgstr "在下载任务添加后暂停。" + +msgid "Auto Delete Torrent File" +msgstr "删除种子" + +msgid "The .torrent files will be deleted afterwards." +msgstr "下载完成后自动删除这个种子文件。" + +msgid "Pre Allocation" +msgstr "磁盘预分配" + +msgid "Pre-allocate disk space for all files." +msgstr "为刚添加的文件预先分配磁盘空间。" + +msgid "Use Incomplete Extension" +msgstr "使用扩展名" + +msgid "The incomplete task will be added the extension of !qB." +msgstr "为不完整的文件添加后缀名!qB。" + +msgid "Save Path" +msgstr "文件保存路径" + +msgid "" +"The path to save the download file. For example:/mnt/sda1/download" +msgstr "下载文件的保存路径。例如：/mnt/sda1/download" + +msgid "Temp Path Enabled" +msgstr "启用临时目录" + +msgid "Temp Path" +msgstr "临时路径" + +msgid "The absolute and relative path can be set." +msgstr "可以设置绝对和相对路径。" + +msgid "Disk Cache Size (MiB)" +msgstr "磁盘缓存" + +msgid "The value -1 is auto and 0 is disable. In default, it is set to 64MiB." +msgstr "数值1是自动的，0是禁用的。默认设置为64MiB。" + +msgid "Disk Cache TTL (s)" +msgstr "磁盘缓存TTL" + +msgid "In default, it is set to 60s." +msgstr "默认设置为60秒。" + +msgid "Saving Management" +msgstr "保存管理" + +msgid "Default Torrent Management Mode" +msgstr "默认种子管理模式" + +msgid "Manual" +msgstr "手动" + +msgid "Automaic" +msgstr "自动" + +msgid "Torrent Category Changed" +msgstr "当种子分类修改时" + +msgid "Choose the action when torrent category changed." +msgstr "选择种子类别更改时的操作。" + +msgid "Switch torrent to Manual Mode" +msgstr "将种子切换到手动模式" + +msgid "Relocate torrent" +msgstr "重新定位种子" + +msgid "Default Save Path Changed" +msgstr "当默认保存路径修改时" + +msgid "Choose the action when default save path changed." +msgstr "选择默认保存路径更改时的操作。" + +msgid "Switch affected torrent to Manual Mode" +msgstr "将受影响的种子切换到手动模式" + +msgid "Relocate affected torrent" +msgstr "重新定位种子" + +msgid "Category Save Path Changed" +msgstr "当分类保存路径修改时" + +msgid "Choose the action when category save path changed." +msgstr "选择分类保存路径更改时的操作。" + +msgid "Torrent Export Dir" +msgstr "种子导出目录" + +msgid "The .torrent files will be copied to the target directory." +msgstr "种子文件将被复制到目标目录。例如：/etc/config。" + +msgid "Finished Torrent Export Dir" +msgstr "复制种子文件" + +msgid "" +"The .torrent files for finished downloads will be copied to the target " +"directory." +msgstr "" +"将已下载完成的种子文件复制到目标目录，例如：/etc/config。" + +msgid "Enable DHT" +msgstr "启用DHT" + +msgid "Enable DHT (decentralized network) to find more peers" +msgstr "启用DHT(去中心化网络) 使DHT（分散网络）能够找到更多的对等点" + +msgid "Enable PeX" +msgstr "启用PeX" + +msgid "Enable Peer Exchange (PeX) to find more peers" +msgstr "启用用户交换(PeX)以找到更多用户" + +msgid "Enable LSD" +msgstr "启用LSD" + +msgid "Enable Local Peer Discovery to find more peers" +msgstr "启用本地用户发现以找到更多用户" + +msgid "uTP Rate Limit" +msgstr "uTP速度限制" + +msgid "Apply rate limit to µTP protocol." +msgstr "针对µTP协议进行速度限制。" + +msgid "Encryption Mode" +msgstr "加密模式" + +msgid "Prefer Encryption" +msgstr "偏好加密" + +msgid "Require Encryption" +msgstr "强制加密" + +msgid "Disable Encryption" +msgstr "禁用加密" + +msgid "Max Connections" +msgstr "连接数限制" + +msgid "The max number of connections." +msgstr "全局最大连接数。" + +msgid "Max Connections Per Torrent" +msgstr "种子连接数限制" + +msgid "The max number of connections per torrent." +msgstr "每个种子的最大连接数。" + +msgid "Max Uploads" +msgstr "最大上传数" + +msgid "The max number of connected peers." +msgstr "全局最大上传线程数。" + +msgid "Max Uploads Per Torrent" +msgstr "种子上传限制" + +msgid "The max number of connected peers per torrent." +msgstr "每个种子上传线程最大值。" + +msgid "Share rate limit" +msgstr "分享率限制" + +msgid "Max Ratio" +msgstr "最大的分享率" + +msgid "The max ratio for seeding. -1 is to disable the seeding." +msgstr "分享的最大比例设定。-1是禁用做种。" + +msgid "Max Seeding Minutes" +msgstr "最大做种时间" + +msgid "Units: minutes" +msgstr "做种最大比例设定。单位：分钟" + +msgid "Max Ratio Action" +msgstr "达到后" + +msgid "The action when reach the max seeding ratio." +msgstr "达到设定分享率和时间后的动作。" + +msgid "Pause them" +msgstr "暂停" + +msgid "Remove them" +msgstr "删除" + +msgid "Queueing Setting" +msgstr "种子排队设置" + +msgid "Enable Torrent Queueing" +msgstr "启用种子排队" + +msgid "Maximum Active Downloads" +msgstr "最大活动的下载数" + +msgid "Max Active Uploads" +msgstr "最大活动的上传数" + +msgid "Max Active Torrents" +msgstr "最大活动的种子数" + +msgid "Ignore Slow Torrents" +msgstr "忽略慢速的种子" + +msgid "Do not count slow torrents in these limits." +msgstr "慢速的种子不包在括限制内。" + +msgid "Download rate threshold" +msgstr "下载速度阈值" + +msgid "Upload rate threshold" +msgstr "上传速度阈值" + +msgid "Units: KiB/s" +msgstr "单位：KiB/s" + +msgid "Torrent inactivity timer" +msgstr "种子不活动时间" + +msgid "Units: seconds" +msgstr "时间单位：分钟" + +msgid "Username" +msgstr "用户名" + +msgid "Password" +msgstr "密码" + +msgid "Use UPnP for WebUI" +msgstr "WebUI端口转发" + +msgid "Using the UPnP / NAT-PMP port of the router for connecting to WebUI." +msgstr "使用路由器的UPnP/NAT-PMP端口转发到WebUI。" + +msgid "The login name for WebUI." +msgstr "WebUI的登录用户名设置。" + +msgid "The login password for WebUI." +msgstr "WebUI用户的登录密码设置。" + +msgid "The listening port for WebUI." +msgstr "WebUI的登录端口设置，默认端口：8080。" + +msgid "CSRF Protection" +msgstr "CSRF保护" + +msgid "Enable Cross-Site Request Forgery (CSRF) protection." +msgstr "启用跨站点请求伪造(CSRF)保护。" + +msgid "Clickjacking Protection" +msgstr "劫持保护" + +msgid "Enable clickjacking protection." +msgstr "启用点击劫持保护。" + +msgid "Host Header Validation" +msgstr "主机标头验证" + +msgid "Validate the host header." +msgstr "启用主机标头验证." + +msgid "Local Host Authentication" +msgstr "本地主机认证" + +msgid "Force authentication for clients on localhost." +msgstr "强制对本地主机上的客户端进行身份验证。" + +msgid "Enable Subnet Whitelist" +msgstr "使子网白名单" + +msgid "Subnet Whitelist" +msgstr "输入IP地址" + +msgid "Skip authentication for clients in the IP subnet white list." +msgstr "对IP子网白名单中的客户端跳过身份验证." + +msgid "Anonymous Mode" +msgstr "匿名模式" + +msgid "When enabled, qBittorrent will take certain measures to try" +msgstr "启用后，qBittorrent将采取某些措施隐藏其身份" + +msgid "Super Seeding" +msgstr "超级种子" + +msgid "The super seeding mode." +msgstr "超级种子模式。" + +msgid "Limit Overhead Usage" +msgstr "开销限制" + +msgid "The overhead usage is been limitted." +msgstr "对传送总开销进行速度限制。" + +msgid "Ignore LAN Limit" +msgstr "LAN限制" + +msgid "Ignore the speed limit to LAN." +msgstr "忽略对LAN的速度限制。" + +msgid "Use os Cache" +msgstr "使用OS操作系统缓存管理" + +msgid "Max Outgoing Port" +msgstr "端口设置" + +msgid "Min Outgoing Port" +msgstr "端口设置" + +msgid "The min outgoing port." +msgstr "最小输出端口。" + +msgid "Choking Algorithm" +msgstr "数据传输算法" + +msgid "The strategy of choking algorithm." +msgstr "数据传输算法的策略。" + +msgid "Round Robin" +msgstr "负载均衡" + +msgid "Fastest Upload" +msgstr "最快上传" + +msgid "Anti-Leech" +msgstr "反吸血" + +msgid "Announce To All Trackers" +msgstr "对所有Trackers宣告" + +msgid "Announce To All Tiers" +msgstr "对所有Tiers宣告" + +msgid "configuration file" +msgstr "配置文件" + +msgid "Operation log" +msgstr "运行日志" + +msgid "This page is the log document content of qbittorrent." +msgstr "本页是qBittorrent的日志文档内容。" + +msgid "" +"This page is the content of the configuration document under /etc/config/" +"qbittorrent." +msgstr "本页是/etc/config/qbittorrent下的配置文档内容。" From 626b393bf0586029f13c4a6a02929a5398b20b95 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 11:16:50 +0800 Subject: [PATCH 11/25] =?UTF-8?q?=E7=BB=9F=E4=B8=80=E7=BF=BB=E8=AF=91?= =?UTF-8?q?=E7=9B=AE=E5=BD=95=E7=BB=93=E6=9E=84?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../lean/luci-app-rclone/po/{zh_Hans => zh-cn}/luci-app-rclone.po | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename package/lean/luci-app-rclone/po/{zh_Hans => zh-cn}/luci-app-rclone.po (100%) diff --git a/package/lean/luci-app-rclone/po/zh_Hans/luci-app-rclone.po b/package/lean/luci-app-rclone/po/zh-cn/luci-app-rclone.po similarity index 100% rename from package/lean/luci-app-rclone/po/zh_Hans/luci-app-rclone.po rename to package/lean/luci-app-rclone/po/zh-cn/luci-app-rclone.po From c721c2768b1b5743d8d13bea176d59ad666d1f48 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 11:19:48 +0800 Subject: [PATCH 12/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20luci-app-rclone.po?= =?UTF-8?q?=20=E4=BF=AE=E5=A4=8D=E6=9D=A1=E7=9B=AE=E6=8E=92=E5=BA=8F?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../lean/luci-app-rclone/po/zh-cn/luci-app-rclone.po | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/package/lean/luci-app-rclone/po/zh-cn/luci-app-rclone.po b/package/lean/luci-app-rclone/po/zh-cn/luci-app-rclone.po index 3e515c5293..846c1e7c95 100644 --- a/package/lean/luci-app-rclone/po/zh-cn/luci-app-rclone.po +++ b/package/lean/luci-app-rclone/po/zh-cn/luci-app-rclone.po @@ -2,14 +2,14 @@ msgid "" msgstr "" "Content-Type: text/plain; charset=UTF-8\n" "Project-Id-Version: \n" -"Last-Translator: ElonH \n" +"Last-Translator: dingpengyu \n" "Language-Team: none\n" -"Language: zh-Hans\n" +"Language: zh_CN\n" "MIME-Version: 1.0\n" "Content-Transfer-Encoding: 8bit\n" "POT-Creation-Date: \n" "PO-Revision-Date: \n" -"X-Generator: Poedit 2.0.6\n" +"X-Generator: Poedit 2.3.1\n" #: luasrc/model/cbi/rclone.lua:121 msgid "FAQ" @@ -48,7 +48,7 @@ msgid "" "commonly either http or socks5." msgstr "" "内容格式为: protocol://server:port\n" -"protocol 通常为 http 或者 socks5" +"protocol 通常为 http 或者 socks5。" #: luasrc/model/cbi/rclone.lua:43 msgid "Webui React" @@ -140,7 +140,7 @@ msgstr "启动 rclone 后台服务" #: luasrc/model/cbi/rclone.lua:80 msgid "than updaload configuration to here." -msgstr "然后上传配置文件到这里" +msgstr "然后上传配置文件到这里。" #: luasrc/model/cbi/rclone.lua:80 msgid "to setup configuration on pc," From af7295a7e2df5a949b6c238d61862ec9e624ff55 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 11:20:25 +0800 Subject: [PATCH 13/25] remove --- package/lean/luci-app-rclone/po/zh-cn/rclone.po | 1 - 1 file changed, 1 deletion(-) delete mode 120000 package/lean/luci-app-rclone/po/zh-cn/rclone.po diff --git a/package/lean/luci-app-rclone/po/zh-cn/rclone.po b/package/lean/luci-app-rclone/po/zh-cn/rclone.po deleted file mode 120000 index b08e41a9d2..0000000000 --- a/package/lean/luci-app-rclone/po/zh-cn/rclone.po +++ /dev/null @@ -1 +0,0 @@ -../zh_Hans/luci-app-rclone.po \ No newline at end of file From 5d17318c36389718b31bfe9a9996277b2186c2f9 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 11:21:55 +0800 Subject: [PATCH 14/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20samba4.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- package/lean/luci-app-samba4/po/zh-cn/samba4.po | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/package/lean/luci-app-samba4/po/zh-cn/samba4.po b/package/lean/luci-app-samba4/po/zh-cn/samba4.po index f1d681ecbf..80fb36f705 100644 --- a/package/lean/luci-app-samba4/po/zh-cn/samba4.po +++ b/package/lean/luci-app-samba4/po/zh-cn/samba4.po @@ -3,18 +3,18 @@ # msgid "" msgstr "" -"Project-Id-Version: PACKAGE VERSION\n" +"Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2009-06-10 03:40+0200\n" -"PO-Revision-Date: 2018-10-01 11:12+0800\n" -"Last-Translator: Yangfl \n" -"Language-Team: \n" +"PO-Revision-Date: 2020-06-07 11:21+0800\n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" "Language: zh_CN\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=1; plural=0;\n" -"X-Generator: Gtranslator 2.91.7\n" +"X-Generator: Poedit 2.3.1\n" #: applications/luci-app-samba4/luasrc/model/cbi/samba4.lua:78 msgid "Allow guests" @@ -66,7 +66,7 @@ msgstr "编辑模板" #: applications/luci-app-samba4/luasrc/model/cbi/samba4.lua:34 msgid "Edit the template that is used for generating the samba configuration." -msgstr "编辑用来生成 samba 设置的模板" +msgstr "编辑用来生成 samba 设置的模板。" #: applications/luci-app-samba4/luasrc/model/cbi/samba4.lua:19 msgid "Enable macOS compatible shares" From 5d4990f226abdde54e79012cce5f5ddf9e275ea7 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 11:26:36 +0800 Subject: [PATCH 15/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20vsftpd.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- package/lean/luci-app-vsftpd/po/zh-cn/vsftpd.po | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/package/lean/luci-app-vsftpd/po/zh-cn/vsftpd.po b/package/lean/luci-app-vsftpd/po/zh-cn/vsftpd.po index d77cb43adc..83abc1155c 100644 --- a/package/lean/luci-app-vsftpd/po/zh-cn/vsftpd.po +++ b/package/lean/luci-app-vsftpd/po/zh-cn/vsftpd.po @@ -1,16 +1,16 @@ msgid "" msgstr "" -"Project-Id-Version: PACKAGE VERSION\n" +"Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2016-02-17 18:00+0800\n"\ -"Last-Translator: Weijie Gao \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" "Language-Team: \n" -"Language: zh_CN\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" -"Plural-Forms: nplurals=1; plural=0;\n" -"X-Generator: Pootle 2.0.6\n" +"Language: zh_CN\n" +"X-Generator: Poedit 2.3.1\n" msgid "NAS" msgstr "网络存储" @@ -22,7 +22,7 @@ msgid "0 means no limitation" msgstr "0 表明不限制" msgid "A message will be displayed when entering a directory." -msgstr "在进入一个新目录时将显示的消息" +msgstr "在进入一个新目录时将显示的消息。" msgid "ASCII mode" msgstr "ASCII 模式" @@ -233,4 +233,3 @@ msgstr "Pasv 模式最小端口" msgid "Pasv Max Port" msgstr "Pasv 模式最大端口" - From da331c5b3486ca0675d0e501585c1f9e72351867 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 7 Jun 2020 11:28:14 +0800 Subject: [PATCH 16/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20webadmin.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E7=AC=A6=E5=8F=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- package/lean/luci-app-webadmin/po/zh-cn/webadmin.po | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/package/lean/luci-app-webadmin/po/zh-cn/webadmin.po b/package/lean/luci-app-webadmin/po/zh-cn/webadmin.po index 8370b7174b..bca5e5c2ad 100644 --- a/package/lean/luci-app-webadmin/po/zh-cn/webadmin.po +++ b/package/lean/luci-app-webadmin/po/zh-cn/webadmin.po @@ -5,6 +5,12 @@ msgstr "" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=1; plural=0;\n" +"Project-Id-Version: \n" +"POT-Creation-Date: \n" +"PO-Revision-Date: \n" +"Last-Translator: dingpengyu \n" +"Language-Team: \n" +"X-Generator: Poedit 2.3.1\n" msgid "Web Admin" msgstr "Web 管理" @@ -15,8 +21,8 @@ msgstr "Web 管理页面设置" msgid "Web Admin Settings Page" msgstr "设置更改Web管理页面端口，绑定地址，是否允许从互联网访问等" -msgid "HTTP listeners (address:port)"" -msgstr "HTTP 监听 (IP地址:端口)"" +msgid "HTTP listeners (address:port)\"" +msgstr "HTTP 监听 (IP地址：端口)\"" msgid "Bind to specific interface:port (by specifying interface address" msgstr "绑定到指定的IP地址:端口" @@ -38,4 +44,3 @@ msgstr "只允许内网访问" msgid "Prevent access from private (RFC1918) IPs on an interface if it has an public IP address" msgstr "拒绝从互联网访问Web管理页面" - From 925abfd272baea06f9aab46063049e5f2a86d331 Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Sun, 14 Jun 2020 05:29:12 +0800 Subject: [PATCH 17/25] =?UTF-8?q?=E6=9B=B4=E6=96=B0=20more.zh-cn.po=20?= =?UTF-8?q?=E4=BF=AE=E5=A4=8D=20restart=20=E7=BF=BB=E8=AF=91=20=E2=80=94?= =?UTF-8?q?=20=E4=B8=AD=E6=96=87=EF=BC=88=E4=B8=AD=E5=9B=BD=EF=BC=89:=20?= =?UTF-8?q?=E9=87=8D=E5=90=AF,=20ID:=20150=20start=20=E7=BF=BB=E8=AF=91=20?= =?UTF-8?q?=E2=80=94=20=E4=B8=AD=E6=96=87=EF=BC=88=E4=B8=AD=E5=9B=BD?= =?UTF-8?q?=EF=BC=89:=20=E5=90=AF=E5=8A=A8,=20ID:=20151=20stop=20=E7=BF=BB?= =?UTF-8?q?=E8=AF=91=20=E2=80=94=20=E4=B8=AD=E6=96=87=EF=BC=88=E4=B8=AD?= =?UTF-8?q?=E5=9B=BD=EF=BC=89:=20=E5=85=B3=E9=97=AD,=20ID:=20152=20?= =?UTF-8?q?=E4=B8=89=E4=B8=AA=E5=AD=97=E7=AC=A6=E4=B8=B2=E7=9A=84=E7=BF=BB?= =?UTF-8?q?=E8=AF=91=E9=94=99=E8=AF=AF?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- package/lean/default-settings/i18n/more.zh-cn.po | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/lean/default-settings/i18n/more.zh-cn.po b/package/lean/default-settings/i18n/more.zh-cn.po index 3144b79635..7bf8c55690 100644 --- a/package/lean/default-settings/i18n/more.zh-cn.po +++ b/package/lean/default-settings/i18n/more.zh-cn.po @@ -562,10 +562,10 @@ msgid "restart" msgstr "重启" msgid "start" -msgstr "开机" +msgstr "启动" msgid "stop" -msgstr "关机" +msgstr "关闭" msgid "unreachable (reject)" msgstr "不可达（拒绝）" From 7b9d809ba7ae566ce9ec5e6c5972beee4a7d35ba Mon Sep 17 00:00:00 2001 From: dingpengyu <26911141+dingpengyu@users.noreply.github.com> Date: Thu, 18 Jun 2020 04:16:52 +0800 Subject: [PATCH 18/25] =?UTF-8?q?=E4=BF=AE=E6=94=B9=20Lazy=20Rule=20?= =?UTF-8?q?=E5=92=8C=20Video=20Rule=E6=9D=A1=E7=9B=AE?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po b/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po index 86d5db5eef..dc27f32cbb 100644 --- a/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po +++ b/package/lean/luci-app-adbyby-plus/po/zh-cn/adbyby.po @@ -183,10 +183,10 @@ msgid "Last Update Checked" msgstr "上一次检查规则更新" msgid "Lazy Rule" -msgstr "普通规则版本" +msgstr "正式版规则" msgid "Video Rule" -msgstr "视频规则版本" +msgstr "测试版规则" msgid "Adblock Plus Host List" msgstr "广告屏蔽大师 Plus 规则列表" From 5240af2247dc4d4385117a169188d970bb4961b4 Mon Sep 17 00:00:00 2001 From: AmadeusGhost <42570690+AmadeusGhost@users.noreply.github.com> Date: Sun, 21 Jun 2020 16:09:39 +0800 Subject: [PATCH 19/25] ramips: add support for Xiaomi R2100 (Black) --- package/boot/uboot-envtools/files/ramips | 1 + .../dts/mt7621_xiaomi_mi-router-ac2100.dts | 40 ++++++ .../dts/mt7621_xiaomi_redmi-router-ac2100.dts | 116 +---------------- .../dts/mt7621_xiaomi_router-ac2100.dtsi | 120 ++++++++++++++++++ target/linux/ramips/image/mt7621.mk | 18 ++- .../mt7621/base-files/etc/board.d/01_leds | 3 + .../mt7621/base-files/etc/board.d/02_network | 2 + .../mt7621/base-files/lib/upgrade/platform.sh | 1 + 8 files changed, 185 insertions(+), 116 deletions(-) create mode 100644 target/linux/ramips/dts/mt7621_xiaomi_mi-router-ac2100.dts create mode 100644 target/linux/ramips/dts/mt7621_xiaomi_router-ac2100.dtsi diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips index 4988a4f6de..6d429240fb 100644 --- a/package/boot/uboot-envtools/files/ramips +++ b/package/boot/uboot-envtools/files/ramips @@ -37,6 +37,7 @@ linksys,ea7500-v2|\ xiaomi,mir3p|\ xiaomi,mir3g|\ xiaomi,miwifi-r3|\ +xiaomi,mi-router-ac2100|\ xiaomi,redmi-router-ac2100) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000" ;; diff --git a/target/linux/ramips/dts/mt7621_xiaomi_mi-router-ac2100.dts b/target/linux/ramips/dts/mt7621_xiaomi_mi-router-ac2100.dts new file mode 100644 index 0000000000..1023f76814 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_xiaomi_mi-router-ac2100.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "mt7621_xiaomi_router-ac2100.dtsi" + +/ { + compatible = "xiaomi,mi-router-ac2100", "mediatek,mt7621-soc"; + model = "Xiaomi Mi Router AC2100"; + + aliases { + led-boot = &led_status_yellow; + led-failsafe = &led_status_yellow; + led-running = &led_status_blue; + led-upgrade = &led_status_blue; + }; + + leds { + compatible = "gpio-leds"; + + wan_yellow { + label = "mi-router-ac2100:yellow:wan"; + gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + }; + + wan_blue { + label = "mi-router-ac2100:blue:wan"; + gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; + }; + + led_status_yellow: status_yellow { + label = "mi-router-ac2100:yellow:status"; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + }; + + led_status_blue: status_blue { + label = "mi-router-ac2100:blue:status"; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + }; + }; +}; diff --git a/target/linux/ramips/dts/mt7621_xiaomi_redmi-router-ac2100.dts b/target/linux/ramips/dts/mt7621_xiaomi_redmi-router-ac2100.dts index ded190e951..d8e01c128c 100644 --- a/target/linux/ramips/dts/mt7621_xiaomi_redmi-router-ac2100.dts +++ b/target/linux/ramips/dts/mt7621_xiaomi_redmi-router-ac2100.dts @@ -1,10 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; -#include "mt7621.dtsi" - -#include -#include +#include "mt7621_xiaomi_router-ac2100.dtsi" / { compatible = "xiaomi,redmi-router-ac2100", "mediatek,mt7621-soc"; @@ -17,10 +14,6 @@ led-upgrade = &led_status_white; }; - chosen { - bootargs = "console=ttyS0,115200n8"; - }; - leds { compatible = "gpio-leds"; @@ -44,111 +37,4 @@ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; }; }; - - keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; -}; - -&nand { - status = "okay"; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "Bootloader"; - reg = <0x0 0x80000>; - }; - - partition@80000 { - label = "Config"; - reg = <0x80000 0x40000>; - }; - - partition@c0000 { - label = "Bdata"; - reg = <0xc0000 0x40000>; - read-only; - }; - - factory: partition@100000 { - label = "factory"; - reg = <0x100000 0x40000>; - read-only; - }; - - partition@140000 { - label = "crash"; - reg = <0x140000 0x40000>; - }; - - partition@180000 { - label = "crash_syslog"; - reg = <0x180000 0x40000>; - }; - - partition@1c0000 { - label = "reserved0"; - reg = <0x1c0000 0x40000>; - read-only; - }; - - /* We keep stock xiaomi firmware (kernel0) here */ - partition@200000 { - label = "kernel_stock"; - reg = <0x200000 0x400000>; - }; - - partition@600000 { - label = "kernel"; - reg = <0x600000 0x400000>; - }; - - partition@a00000 { - label = "ubi"; - reg = <0xa00000 0x7580000>; - }; - }; -}; - -&pcie { - status = "okay"; -}; - -&pcie0 { - wifi@0,0 { - compatible = "mediatek,mt76"; - reg = <0x0000 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x8000>; - ieee80211-freq-limit = <5000000 6000000>; - }; -}; - -&pcie1 { - wifi@0,0 { - compatible = "mediatek,mt76"; - reg = <0x0000 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x0000>; - ieee80211-freq-limit = <2400000 2500000>; - }; -}; - -ðernet { - mtd-mac-address = <&factory 0xe000>; -}; - -&state_default { - gpio { - ralink,group = "uart2", "uart3", "wdt"; - ralink,function = "gpio"; - }; }; diff --git a/target/linux/ramips/dts/mt7621_xiaomi_router-ac2100.dtsi b/target/linux/ramips/dts/mt7621_xiaomi_router-ac2100.dtsi new file mode 100644 index 0000000000..ee92d4c20f --- /dev/null +++ b/target/linux/ramips/dts/mt7621_xiaomi_router-ac2100.dtsi @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include + +/ { + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Bootloader"; + reg = <0x0 0x80000>; + }; + + partition@80000 { + label = "Config"; + reg = <0x80000 0x40000>; + }; + + partition@c0000 { + label = "Bdata"; + reg = <0xc0000 0x40000>; + read-only; + }; + + factory: partition@100000 { + label = "factory"; + reg = <0x100000 0x40000>; + read-only; + }; + + partition@140000 { + label = "crash"; + reg = <0x140000 0x40000>; + }; + + partition@180000 { + label = "crash_syslog"; + reg = <0x180000 0x40000>; + }; + + partition@1c0000 { + label = "reserved0"; + reg = <0x1c0000 0x40000>; + read-only; + }; + + /* We keep stock xiaomi firmware (kernel0) here */ + partition@200000 { + label = "kernel_stock"; + reg = <0x200000 0x400000>; + }; + + partition@600000 { + label = "kernel"; + reg = <0x600000 0x400000>; + }; + + partition@a00000 { + label = "ubi"; + reg = <0xa00000 0x7580000>; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0000>; + ieee80211-freq-limit = <2400000 2500000>; + }; +}; + +ðernet { + mtd-mac-address = <&factory 0xe000>; +}; + +&state_default { + gpio { + ralink,group = "uart2", "uart3", "wdt"; + ralink,function = "gpio"; + }; +}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index f404389113..6cf2d75561 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -909,11 +909,27 @@ define Device/xiaomi_mir3p endef TARGET_DEVICES += xiaomi_mir3p +define Device/xiaomi_mi-router-ac2100 + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_SIZE := 4096k + IMAGE_SIZE := 120320k + UBINIZE_OPTS := -E 5 + IMAGES += kernel1.bin rootfs0.bin + IMAGE/kernel1.bin := append-kernel + IMAGE/rootfs0.bin := append-ubi | check-size $$$$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + DEVICE_VENDOR := Xiaomi + DEVICE_MODEL := Mi Router AC2100 + DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e wpad-openssl uboot-envtools +endef +TARGET_DEVICES += xiaomi_mi-router-ac2100 + define Device/xiaomi_redmi-router-ac2100 BLOCKSIZE := 128k PAGESIZE := 2048 KERNEL_SIZE := 4096k - IMAGE_SIZE := 124416k + IMAGE_SIZE := 120320k UBINIZE_OPTS := -E 5 IMAGES += kernel1.bin rootfs0.bin factory.bin IMAGE/kernel1.bin := append-kernel diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds index 16362b66a2..57747cf493 100755 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds @@ -88,6 +88,9 @@ xiaomi,mir3p) xzwifi,creativebox-v1) ucidef_set_led_switch "internet" "internet" "$boardname:blue:internet" "switch0" "0x10" ;; +xiaomi,mi-router-ac2100) + ucidef_set_led_netdev "wan" "wan" "$boardname:blue:wan" "wan" + ;; xiaomi,redmi-router-ac2100) ucidef_set_led_netdev "wan" "wan" "$boardname:white:wan" "wan" ;; diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index ad74592983..e69951315a 100755 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -155,6 +155,7 @@ ramips_setup_interfaces() ucidef_add_switch "switch0" \ "1:lan:3" "2:lan:2" "3:lan:1" "4:wan" "6@eth0" ;; + xiaomi,mi-router-ac2100|\ xiaomi,redmi-router-ac2100) ucidef_add_switch "switch0" \ "2:lan" "3:lan" "4:lan" "0:wan" "6@eth0" @@ -243,6 +244,7 @@ ramips_setup_macs() iodata,wn-ax1167gr2|\ iodata,wn-dx1167r|\ xiaomi,mir3g-v2|\ + xiaomi,mi-router-ac2100|\ xiaomi,redmi-router-ac2100) wan_mac=$(mtd_get_mac_binary factory 0xe006) label_mac=$wan_mac diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh index 8bd8052850..d5370295fd 100755 --- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh @@ -55,6 +55,7 @@ platform_do_upgrade() { netis,wf2881|\ xiaomi,mir3g|\ xiaomi,mir3p|\ + xiaomi,mi-router-ac2100|\ xiaomi,redmi-router-ac2100) nand_do_upgrade "$1" ;; From 378ca0f03e546c7d66cba2104f544a86ea6e075a Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Tue, 23 Jun 2020 23:44:27 +0800 Subject: [PATCH 20/25] x64: add EFI Image boot from emmc SSD support --- config/Config-images.in | 5 +- .../files/drivers/platform/mikrotik/Kconfig | 19 + .../files/drivers/platform/mikrotik/Makefile | 4 + .../drivers/platform/mikrotik/rb_hardconfig.c | 744 +++++++++++++++++ .../drivers/platform/mikrotik/rb_softconfig.c | 754 ++++++++++++++++++ .../drivers/platform/mikrotik/routerboot.c | 218 +++++ .../drivers/platform/mikrotik/routerboot.h | 37 + target/linux/x86/Makefile | 2 +- target/linux/x86/config-4.19 | 21 +- 9 files changed, 1795 insertions(+), 9 deletions(-) create mode 100644 target/linux/generic/files/drivers/platform/mikrotik/Kconfig create mode 100644 target/linux/generic/files/drivers/platform/mikrotik/Makefile create mode 100644 target/linux/generic/files/drivers/platform/mikrotik/rb_hardconfig.c create mode 100644 target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c create mode 100644 target/linux/generic/files/drivers/platform/mikrotik/routerboot.c create mode 100644 target/linux/generic/files/drivers/platform/mikrotik/routerboot.h diff --git a/config/Config-images.in b/config/Config-images.in index 6d240e772f..4d1c41eeea 100644 --- a/config/Config-images.in +++ b/config/Config-images.in @@ -202,13 +202,12 @@ menu "Target Images" depends on TARGET_ROOTFS_EXT4FS || TARGET_ROOTFS_ISO || TARGET_ROOTFS_JFFS2 || TARGET_ROOTFS_SQUASHFS select PACKAGE_grub2 select PACKAGE_grub2-efi - default n + default y config GRUB_CONSOLE bool "Use Console Terminal (in addition to Serial)" depends on GRUB_IMAGES || EFI_IMAGES - default n if (TARGET_x86_generic_Soekris45xx || TARGET_x86_generic_Soekris48xx || TARGET_x86_net5501 || TARGET_x86_geos || TARGET_x86_alix2) - default y + default n config GRUB_SERIAL string "Serial port device" diff --git a/target/linux/generic/files/drivers/platform/mikrotik/Kconfig b/target/linux/generic/files/drivers/platform/mikrotik/Kconfig new file mode 100644 index 0000000000..7499ba1e1c --- /dev/null +++ b/target/linux/generic/files/drivers/platform/mikrotik/Kconfig @@ -0,0 +1,19 @@ +menuconfig MIKROTIK + bool "Platform support for MikroTik RouterBoard virtual devices" + default n + help + Say Y here to get to see options for the MikroTik RouterBoard platform. + This option alone does not add any kernel code. + + +if MIKROTIK + +config MIKROTIK_RB_SYSFS + tristate "RouterBoot sysfs support" + depends on MTD + select LZO_DECOMPRESS + select CRC32 + help + This driver exposes RouterBoot configuration in sysfs. + +endif # MIKROTIK diff --git a/target/linux/generic/files/drivers/platform/mikrotik/Makefile b/target/linux/generic/files/drivers/platform/mikrotik/Makefile new file mode 100644 index 0000000000..a232e1a9e8 --- /dev/null +++ b/target/linux/generic/files/drivers/platform/mikrotik/Makefile @@ -0,0 +1,4 @@ +# +# Makefile for MikroTik RouterBoard platform specific drivers +# +obj-$(CONFIG_MIKROTIK_RB_SYSFS) += routerboot.o rb_hardconfig.o rb_softconfig.o diff --git a/target/linux/generic/files/drivers/platform/mikrotik/rb_hardconfig.c b/target/linux/generic/files/drivers/platform/mikrotik/rb_hardconfig.c new file mode 100644 index 0000000000..992689605d --- /dev/null +++ b/target/linux/generic/files/drivers/platform/mikrotik/rb_hardconfig.c @@ -0,0 +1,744 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for MikroTik RouterBoot hard config. + * + * Copyright (C) 2020 Thibaut VARÈNE + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * This driver exposes the data encoded in the "hard_config" flash segment of + * MikroTik RouterBOARDs devices. It presents the data in a sysfs folder + * named "hard_config". The WLAN calibration data is available on demand via + * the 'wlan_data' sysfs file in that folder. + * + * This driver permanently allocates a chunk of RAM as large as the hard_config + * MTD partition, although it is technically possible to operate entirely from + * the MTD device without using a local buffer (except when requesting WLAN + * calibration data), at the cost of a performance penalty. + * + * Note: PAGE_SIZE is assumed to be >= 4K, hence the device attribute show + * routines need not check for output overflow. + * + * Some constant defines extracted from routerboot.{c,h} by Gabor Juhos + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "routerboot.h" + +#define RB_HARDCONFIG_VER "0.04" +#define RB_HC_PR_PFX "[rb_hardconfig] " + +/* ID values for hardware settings */ +#define RB_ID_FLASH_INFO 0x03 +#define RB_ID_MAC_ADDRESS_PACK 0x04 +#define RB_ID_BOARD_PRODUCT_CODE 0x05 +#define RB_ID_BIOS_VERSION 0x06 +#define RB_ID_SDRAM_TIMINGS 0x08 +#define RB_ID_DEVICE_TIMINGS 0x09 +#define RB_ID_SOFTWARE_ID 0x0A +#define RB_ID_SERIAL_NUMBER 0x0B +#define RB_ID_MEMORY_SIZE 0x0D +#define RB_ID_MAC_ADDRESS_COUNT 0x0E +#define RB_ID_HW_OPTIONS 0x15 +#define RB_ID_WLAN_DATA 0x16 +#define RB_ID_BOARD_IDENTIFIER 0x17 +#define RB_ID_PRODUCT_NAME 0x21 +#define RB_ID_DEFCONF 0x26 + +/* Bit definitions for hardware options */ +#define RB_HW_OPT_NO_UART BIT(0) +#define RB_HW_OPT_HAS_VOLTAGE BIT(1) +#define RB_HW_OPT_HAS_USB BIT(2) +#define RB_HW_OPT_HAS_ATTINY BIT(3) +#define RB_HW_OPT_PULSE_DUTY_CYCLE BIT(9) +#define RB_HW_OPT_NO_NAND BIT(14) +#define RB_HW_OPT_HAS_LCD BIT(15) +#define RB_HW_OPT_HAS_POE_OUT BIT(16) +#define RB_HW_OPT_HAS_uSD BIT(17) +#define RB_HW_OPT_HAS_SIM BIT(18) +#define RB_HW_OPT_HAS_SFP BIT(20) +#define RB_HW_OPT_HAS_WIFI BIT(21) +#define RB_HW_OPT_HAS_TS_FOR_ADC BIT(22) +#define RB_HW_OPT_HAS_PLC BIT(29) + +static struct kobject *hc_kobj; +static u8 *hc_buf; // ro buffer after init(): no locking required +static size_t hc_buflen; + +/* + * For LZOR style WLAN data unpacking. + * This binary blob is prepended to the data encoded on some devices as + * RB_ID_WLAN_DATA, the result is then first decompressed with LZO, and then + * finally RLE-decoded. + * This binary blob has been extracted from RouterOS by + * https://forum.openwrt.org/u/ius + */ +static const u8 hc_lzor_prefix[] = { + 0x00, 0x05, 0x4c, 0x4c, 0x44, 0x00, 0x34, 0xfe, + 0xfe, 0x34, 0x11, 0x3c, 0x1e, 0x3c, 0x2e, 0x3c, + 0x4c, 0x34, 0x00, 0x52, 0x62, 0x92, 0xa2, 0xb2, + 0xc3, 0x2a, 0x14, 0x00, 0x00, 0x05, 0xfe, 0x6a, + 0x3c, 0x16, 0x32, 0x16, 0x11, 0x1e, 0x12, 0x46, + 0x32, 0x46, 0x11, 0x4e, 0x12, 0x36, 0x32, 0x36, + 0x11, 0x3e, 0x12, 0x5a, 0x9a, 0x64, 0x00, 0x04, + 0xfe, 0x10, 0x3c, 0x00, 0x01, 0x00, 0x00, 0x28, + 0x0c, 0x00, 0x0f, 0xfe, 0x14, 0x00, 0x24, 0x24, + 0x23, 0x24, 0x24, 0x23, 0x25, 0x22, 0x21, 0x21, + 0x23, 0x22, 0x21, 0x22, 0x21, 0x2d, 0x38, 0x00, + 0x0c, 0x25, 0x25, 0x24, 0x25, 0x25, 0x24, 0x23, + 0x22, 0x21, 0x20, 0x23, 0x21, 0x21, 0x22, 0x21, + 0x2d, 0x38, 0x00, 0x28, 0xb0, 0x00, 0x00, 0x22, + 0x00, 0x00, 0xc0, 0xfe, 0x03, 0x00, 0xc0, 0x00, + 0x62, 0xff, 0x62, 0xff, 0xfe, 0x06, 0x00, 0xbb, + 0xff, 0xba, 0xff, 0xfe, 0x08, 0x00, 0x9e, 0xff, + 0xfe, 0x0a, 0x00, 0x53, 0xff, 0xfe, 0x02, 0x00, + 0x20, 0xff, 0xb1, 0xfe, 0xfe, 0xb2, 0xfe, 0xfe, + 0xed, 0xfe, 0xfe, 0xfe, 0x04, 0x00, 0x3a, 0xff, + 0x3a, 0xff, 0xde, 0xfd, 0x5f, 0x04, 0x33, 0xff, + 0x4c, 0x74, 0x03, 0x05, 0x05, 0xff, 0x6d, 0xfe, + 0xfe, 0x6d, 0xfe, 0xfe, 0xaf, 0x08, 0x63, 0xff, + 0x64, 0x6f, 0x08, 0xac, 0xff, 0xbf, 0x6d, 0x08, + 0x7a, 0x6d, 0x08, 0x96, 0x74, 0x04, 0x00, 0x08, + 0x79, 0xff, 0xda, 0xfe, 0xfe, 0xdb, 0xfe, 0xfe, + 0x56, 0xff, 0xfe, 0x04, 0x00, 0x5e, 0xff, 0x5e, + 0xff, 0x6c, 0xfe, 0xfe, 0xfe, 0x06, 0x00, 0x41, + 0xff, 0x7f, 0x74, 0x03, 0x00, 0x11, 0x44, 0xff, + 0xa9, 0xfe, 0xfe, 0xa9, 0xfe, 0xfe, 0xa5, 0x8f, + 0x01, 0x00, 0x08, 0x01, 0x01, 0x02, 0x04, 0x08, + 0x02, 0x04, 0x08, 0x08, 0x01, 0x01, 0xfe, 0x22, + 0x00, 0x4c, 0x60, 0x64, 0x8c, 0x90, 0xd0, 0xd4, + 0xd8, 0x5c, 0x10, 0x09, 0xd8, 0xff, 0xb0, 0xff, + 0x00, 0x00, 0xba, 0xff, 0x14, 0x00, 0xba, 0xff, + 0x64, 0x00, 0x00, 0x08, 0xfe, 0x06, 0x00, 0x74, + 0xff, 0x42, 0xff, 0xce, 0xff, 0x60, 0xff, 0x0a, + 0x00, 0xb4, 0x00, 0xa0, 0x00, 0xa0, 0xfe, 0x07, + 0x00, 0x0a, 0x00, 0xb0, 0xff, 0x96, 0x4d, 0x00, + 0x56, 0x57, 0x18, 0xa6, 0xff, 0x92, 0x70, 0x11, + 0x00, 0x12, 0x90, 0x90, 0x76, 0x5a, 0x54, 0x54, + 0x4c, 0x46, 0x38, 0x00, 0x10, 0x10, 0x08, 0xfe, + 0x05, 0x00, 0x38, 0x29, 0x25, 0x23, 0x22, 0x22, + 0x1f, 0x00, 0x00, 0x00, 0xf6, 0xe1, 0xdd, 0xf8, + 0xfe, 0x00, 0xfe, 0x15, 0x00, 0x00, 0xd0, 0x02, + 0x74, 0x02, 0x08, 0xf8, 0xe5, 0xde, 0x02, 0x04, + 0x04, 0xfd, 0x00, 0x00, 0x00, 0x07, 0x50, 0x2d, + 0x01, 0x90, 0x90, 0x76, 0x60, 0xb0, 0x07, 0x07, + 0x0c, 0x0c, 0x04, 0xfe, 0x05, 0x00, 0x66, 0x66, + 0x5a, 0x56, 0xbc, 0x01, 0x06, 0xfc, 0xfc, 0xf1, + 0xfe, 0x07, 0x00, 0x24, 0x95, 0x70, 0x64, 0x18, + 0x06, 0x2c, 0xff, 0xb5, 0xfe, 0xfe, 0xb5, 0xfe, + 0xfe, 0xe2, 0x8c, 0x24, 0x02, 0x2f, 0xff, 0x2f, + 0xff, 0xb4, 0x78, 0x02, 0x05, 0x73, 0xff, 0xed, + 0xfe, 0xfe, 0x4f, 0xff, 0x36, 0x74, 0x1e, 0x09, + 0x4f, 0xff, 0x50, 0xff, 0xfe, 0x16, 0x00, 0x70, + 0xac, 0x70, 0x8e, 0xac, 0x40, 0x0e, 0x01, 0x70, + 0x7f, 0x8e, 0xac, 0x6c, 0x00, 0x0b, 0xfe, 0x02, + 0x00, 0xfe, 0x0a, 0x2c, 0x2a, 0x2a, 0x28, 0x26, + 0x1e, 0x1e, 0xfe, 0x02, 0x20, 0x65, 0x20, 0x00, + 0x00, 0x05, 0x12, 0x00, 0x11, 0x1e, 0x11, 0x11, + 0x41, 0x1e, 0x41, 0x11, 0x31, 0x1e, 0x31, 0x11, + 0x70, 0x75, 0x7a, 0x7f, 0x84, 0x89, 0x8e, 0x93, + 0x98, 0x30, 0x20, 0x00, 0x02, 0x00, 0xfe, 0x06, + 0x3c, 0xbc, 0x32, 0x0c, 0x00, 0x00, 0x2a, 0x12, + 0x1e, 0x12, 0x2e, 0x12, 0xcc, 0x12, 0x11, 0x1a, + 0x1e, 0x1a, 0x2e, 0x1a, 0x4c, 0x10, 0x1e, 0x10, + 0x11, 0x18, 0x1e, 0x42, 0x1e, 0x42, 0x2e, 0x42, + 0xcc, 0x42, 0x11, 0x4a, 0x1e, 0x4a, 0x2e, 0x4a, + 0x4c, 0x40, 0x1e, 0x40, 0x11, 0x48, 0x1e, 0x32, + 0x1e, 0x32, 0x2e, 0x32, 0xcc, 0x32, 0x11, 0x3a, + 0x1e, 0x3a, 0x2e, 0x3a, 0x4c, 0x30, 0x1e, 0x30, + 0x11, 0x38, 0x1e, 0x27, 0x9a, 0x01, 0x9d, 0xa2, + 0x2f, 0x28, 0x00, 0x00, 0x46, 0xde, 0xc4, 0xbf, + 0xa6, 0x9d, 0x81, 0x7b, 0x5c, 0x61, 0x40, 0xc7, + 0xc0, 0xae, 0xa9, 0x8c, 0x83, 0x6a, 0x62, 0x50, + 0x3e, 0xce, 0xc2, 0xae, 0xa3, 0x8c, 0x7b, 0x6a, + 0x5a, 0x50, 0x35, 0xd7, 0xc2, 0xb7, 0xa4, 0x95, + 0x7e, 0x72, 0x5a, 0x59, 0x37, 0xfe, 0x02, 0xf8, + 0x8c, 0x95, 0x90, 0x8f, 0x00, 0xd7, 0xc0, 0xb7, + 0xa2, 0x95, 0x7b, 0x72, 0x56, 0x59, 0x32, 0xc7, + 0xc3, 0xae, 0xad, 0x8c, 0x85, 0x6a, 0x63, 0x50, + 0x3e, 0xce, 0xc3, 0xae, 0xa4, 0x8c, 0x7c, 0x6a, + 0x59, 0x50, 0x34, 0xd7, 0xc2, 0xb7, 0xa5, 0x95, + 0x7e, 0x72, 0x59, 0x59, 0x36, 0xfc, 0x05, 0x00, + 0x02, 0xce, 0xc5, 0xae, 0xa5, 0x95, 0x83, 0x72, + 0x5c, 0x59, 0x36, 0xbf, 0xc6, 0xa5, 0xab, 0x8c, + 0x8c, 0x6a, 0x67, 0x50, 0x41, 0x64, 0x07, 0x00, + 0x02, 0x95, 0x8c, 0x72, 0x65, 0x59, 0x3f, 0xce, + 0xc7, 0xae, 0xa8, 0x95, 0x86, 0x72, 0x5f, 0x59, + 0x39, 0xfe, 0x02, 0xf8, 0x8b, 0x7c, 0x0b, 0x09, + 0xb7, 0xc2, 0x9d, 0xa4, 0x83, 0x85, 0x6a, 0x6b, + 0x50, 0x44, 0xb7, 0xc1, 0x64, 0x01, 0x00, 0x06, + 0x61, 0x5d, 0x48, 0x3d, 0xae, 0xc4, 0x9d, 0xad, + 0x7b, 0x85, 0x61, 0x66, 0x48, 0x46, 0xae, 0xc3, + 0x95, 0xa3, 0x72, 0x7c, 0x59, 0x56, 0x38, 0x31, + 0x7c, 0x0b, 0x00, 0x0c, 0x96, 0x91, 0x8f, 0x00, + 0xb7, 0xc0, 0xa5, 0xab, 0x8c, 0x8a, 0x6a, 0x64, + 0x50, 0x3c, 0xb7, 0xc0, 0x9d, 0xa0, 0x83, 0x80, + 0x6a, 0x64, 0x50, 0x3d, 0xb7, 0xc5, 0x9d, 0xa5, + 0x83, 0x87, 0x6c, 0x08, 0x07, 0xae, 0xc0, 0x9d, + 0xa8, 0x83, 0x88, 0x6a, 0x6d, 0x50, 0x46, 0xfc, + 0x05, 0x00, 0x16, 0xbf, 0xc0, 0xa5, 0xa2, 0x8c, + 0x7f, 0x6a, 0x57, 0x50, 0x2f, 0xb7, 0xc7, 0xa5, + 0xb1, 0x8c, 0x8e, 0x72, 0x6d, 0x59, 0x45, 0xbf, + 0xc6, 0xa5, 0xa8, 0x8c, 0x87, 0x6a, 0x5f, 0x50, + 0x37, 0xbf, 0xc2, 0xa5, 0xa4, 0x8c, 0x83, 0x6a, + 0x5c, 0x50, 0x34, 0xbc, 0x05, 0x00, 0x0e, 0x90, + 0x00, 0xc7, 0xc2, 0xae, 0xaa, 0x95, 0x82, 0x7b, + 0x60, 0x61, 0x3f, 0xb7, 0xc6, 0xa5, 0xb1, 0x8c, + 0x8d, 0x72, 0x6b, 0x61, 0x51, 0xbf, 0xc4, 0xa5, + 0xa5, 0x8c, 0x82, 0x72, 0x61, 0x59, 0x39, 0x6c, + 0x26, 0x03, 0x95, 0x82, 0x7b, 0x61, 0x61, 0x40, + 0xfc, 0x05, 0x00, 0x00, 0x7e, 0xd7, 0xc3, 0xb7, + 0xa8, 0x9d, 0x80, 0x83, 0x5d, 0x6a, 0x3f, 0xbf, + 0xc7, 0xa5, 0xa8, 0x8c, 0x84, 0x72, 0x60, 0x61, + 0x46, 0xbf, 0xc2, 0xae, 0xb0, 0x9d, 0x92, 0x83, + 0x6f, 0x6a, 0x50, 0xd7, 0xc3, 0xb7, 0xa7, 0x9d, + 0x80, 0x83, 0x5e, 0x6a, 0x40, 0xfe, 0x02, 0xf8, + 0x8d, 0x96, 0x90, 0x90, 0xfe, 0x05, 0x00, 0x8a, + 0xc4, 0x63, 0xb8, 0x3c, 0xa6, 0x29, 0x97, 0x16, + 0x81, 0x84, 0xb7, 0x5b, 0xa9, 0x33, 0x94, 0x1e, + 0x83, 0x11, 0x70, 0xb8, 0xc2, 0x70, 0xb1, 0x4d, + 0xa3, 0x2a, 0x8d, 0x1b, 0x7b, 0xa8, 0xbc, 0x68, + 0xab, 0x47, 0x9d, 0x27, 0x87, 0x18, 0x75, 0xae, + 0xc6, 0x7d, 0xbb, 0x4d, 0xaa, 0x1c, 0x84, 0x11, + 0x72, 0xa3, 0xbb, 0x6e, 0xad, 0x3c, 0x97, 0x24, + 0x85, 0x16, 0x71, 0x80, 0xb2, 0x57, 0xa4, 0x30, + 0x8e, 0x1c, 0x7c, 0x10, 0x68, 0xbb, 0xbd, 0x75, + 0xac, 0x4f, 0x9e, 0x2b, 0x87, 0x1a, 0x76, 0x96, + 0xc5, 0x5e, 0xb5, 0x3e, 0xa5, 0x1f, 0x8c, 0x12, + 0x7a, 0xc1, 0xc6, 0x42, 0x9f, 0x27, 0x8c, 0x16, + 0x77, 0x0f, 0x67, 0x9d, 0xbc, 0x68, 0xad, 0x36, + 0x95, 0x20, 0x83, 0x11, 0x6d, 0x9b, 0xb8, 0x67, + 0xa8, 0x34, 0x90, 0x1f, 0x7c, 0x10, 0x67, 0x9e, + 0xc9, 0x6a, 0xbb, 0x37, 0xa4, 0x20, 0x90, 0x11, + 0x7b, 0xc6, 0xc8, 0x47, 0xa4, 0x2a, 0x90, 0x18, + 0x7b, 0x10, 0x6c, 0xae, 0xc4, 0x5d, 0xad, 0x37, + 0x9a, 0x1f, 0x85, 0x13, 0x75, 0x70, 0xad, 0x42, + 0x99, 0x25, 0x84, 0x17, 0x74, 0x0b, 0x56, 0x87, + 0xc8, 0x57, 0xb8, 0x2b, 0x9e, 0x19, 0x8a, 0x0d, + 0x74, 0xa7, 0xc8, 0x6e, 0xb9, 0x36, 0xa0, 0x1f, + 0x8b, 0x11, 0x75, 0x94, 0xbe, 0x4b, 0xa5, 0x2a, + 0x92, 0x18, 0x7c, 0x0f, 0x6b, 0xaf, 0xc0, 0x58, + 0xa8, 0x34, 0x94, 0x1d, 0x7d, 0x12, 0x6d, 0x82, + 0xc0, 0x52, 0xb0, 0x25, 0x94, 0x14, 0x7f, 0x0c, + 0x68, 0x84, 0xbf, 0x3e, 0xa4, 0x22, 0x8e, 0x10, + 0x76, 0x0b, 0x65, 0x88, 0xb6, 0x42, 0x9b, 0x26, + 0x87, 0x14, 0x70, 0x0c, 0x5f, 0xc5, 0xc2, 0x3e, + 0x97, 0x23, 0x83, 0x13, 0x6c, 0x0c, 0x5c, 0xb1, + 0xc9, 0x76, 0xbc, 0x4a, 0xaa, 0x20, 0x8d, 0x12, + 0x78, 0x93, 0xbf, 0x46, 0xa3, 0x26, 0x8d, 0x14, + 0x74, 0x0c, 0x62, 0xc8, 0xc4, 0x3b, 0x97, 0x21, + 0x82, 0x11, 0x6a, 0x0a, 0x59, 0xa3, 0xb9, 0x68, + 0xa9, 0x30, 0x8d, 0x1a, 0x78, 0x0f, 0x61, 0xa0, + 0xc9, 0x73, 0xbe, 0x50, 0xb1, 0x30, 0x9f, 0x14, + 0x80, 0x83, 0xb7, 0x3c, 0x9a, 0x20, 0x84, 0x0e, + 0x6a, 0x0a, 0x57, 0xac, 0xc2, 0x68, 0xb0, 0x2e, + 0x92, 0x19, 0x7c, 0x0d, 0x63, 0x93, 0xbe, 0x62, + 0xb0, 0x3c, 0x9e, 0x1a, 0x80, 0x0e, 0x6b, 0xbb, + 0x02, 0xa0, 0x02, 0xa0, 0x02, 0x6f, 0x00, 0x75, + 0x00, 0x75, 0x00, 0x00, 0x00, 0xad, 0x02, 0xb3, + 0x02, 0x6f, 0x00, 0x87, 0x00, 0x85, 0xfe, 0x03, + 0x00, 0xc2, 0x02, 0x82, 0x4d, 0x92, 0x6e, 0x4d, + 0xb1, 0xa8, 0x84, 0x01, 0x00, 0x07, 0x7e, 0x00, + 0xa8, 0x02, 0xa4, 0x02, 0xa4, 0x02, 0xa2, 0x00, + 0xa6, 0x00, 0xa6, 0x00, 0x00, 0x00, 0xb4, 0x02, + 0xb4, 0x02, 0x92, 0x00, 0x96, 0x00, 0x96, 0x46, + 0x04, 0xb0, 0x02, 0x64, 0x02, 0x0a, 0x8c, 0x00, + 0x90, 0x02, 0x98, 0x02, 0x98, 0x02, 0x0e, 0x01, + 0x11, 0x01, 0x11, 0x50, 0xc3, 0x08, 0x88, 0x02, + 0x88, 0x02, 0x19, 0x01, 0x02, 0x01, 0x02, 0x01, + 0xf3, 0x2d, 0x00, 0x00 +}; + +/* Array of known hw_options bits with human-friendly parsing */ +static struct hc_hwopt { + const u32 bit; + const char *str; +} const hc_hwopts[] = { + { + .bit = RB_HW_OPT_NO_UART, + .str = "no UART\t\t", + }, { + .bit = RB_HW_OPT_HAS_VOLTAGE, + .str = "has Vreg\t", + }, { + .bit = RB_HW_OPT_HAS_USB, + .str = "has usb\t\t", + }, { + .bit = RB_HW_OPT_HAS_ATTINY, + .str = "has ATtiny\t", + }, { + .bit = RB_HW_OPT_NO_NAND, + .str = "no NAND\t\t", + }, { + .bit = RB_HW_OPT_HAS_LCD, + .str = "has LCD\t\t", + }, { + .bit = RB_HW_OPT_HAS_POE_OUT, + .str = "has POE out\t", + }, { + .bit = RB_HW_OPT_HAS_uSD, + .str = "has MicroSD\t", + }, { + .bit = RB_HW_OPT_HAS_SIM, + .str = "has SIM\t\t", + }, { + .bit = RB_HW_OPT_HAS_SFP, + .str = "has SFP\t\t", + }, { + .bit = RB_HW_OPT_HAS_WIFI, + .str = "has WiFi\t", + }, { + .bit = RB_HW_OPT_HAS_TS_FOR_ADC, + .str = "has TS ADC\t", + }, { + .bit = RB_HW_OPT_HAS_PLC, + .str = "has PLC\t\t", + }, +}; + +/* + * The MAC is stored network-endian on all devices, in 2 32-bit segments: + * . Kernel print has us covered. + */ +static ssize_t hc_tag_show_mac(const u8 *pld, u16 pld_len, char *buf) +{ + if (8 != pld_len) + return -EINVAL; + + return sprintf(buf, "%pM\n", pld); +} + +/* + * Print HW options in a human readable way: + * The raw number and in decoded form + */ +static ssize_t hc_tag_show_hwoptions(const u8 *pld, u16 pld_len, char *buf) +{ + char *out = buf; + u32 data; // cpu-endian + int i; + + if (sizeof(data) != pld_len) + return -EINVAL; + + data = *(u32 *)pld; + out += sprintf(out, "raw\t\t: 0x%08x\n\n", data); + + for (i = 0; i < ARRAY_SIZE(hc_hwopts); i++) + out += sprintf(out, "%s: %s\n", hc_hwopts[i].str, + (data & hc_hwopts[i].bit) ? "true" : "false"); + + return out - buf; +} + +static ssize_t hc_wlan_data_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count); + +static struct hc_wlan_attr { + struct bin_attribute battr; + u16 pld_ofs; + u16 pld_len; +} hc_wlandata_battr = { + .battr = __BIN_ATTR(wlan_data, S_IRUSR, hc_wlan_data_bin_read, NULL, 0), +}; + +static ssize_t hc_attr_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf); + +/* Array of known tags to publish in sysfs */ +static struct hc_attr { + const u16 tag_id; + ssize_t (* const tshow)(const u8 *pld, u16 pld_len, char *buf); + struct kobj_attribute kattr; + u16 pld_ofs; + u16 pld_len; +} hc_attrs[] = { + { + .tag_id = RB_ID_FLASH_INFO, + .tshow = routerboot_tag_show_u32s, + .kattr = __ATTR(flash_info, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_MAC_ADDRESS_PACK, + .tshow = hc_tag_show_mac, + .kattr = __ATTR(mac_base, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_BOARD_PRODUCT_CODE, + .tshow = routerboot_tag_show_string, + .kattr = __ATTR(board_product_code, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_BIOS_VERSION, + .tshow = routerboot_tag_show_string, + .kattr = __ATTR(booter_version, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_SERIAL_NUMBER, + .tshow = routerboot_tag_show_string, + .kattr = __ATTR(board_serial, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_MEMORY_SIZE, + .tshow = routerboot_tag_show_u32s, + .kattr = __ATTR(mem_size, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_MAC_ADDRESS_COUNT, + .tshow = routerboot_tag_show_u32s, + .kattr = __ATTR(mac_count, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_HW_OPTIONS, + .tshow = hc_tag_show_hwoptions, + .kattr = __ATTR(hw_options, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_WLAN_DATA, + .tshow = NULL, + }, { + .tag_id = RB_ID_BOARD_IDENTIFIER, + .tshow = routerboot_tag_show_string, + .kattr = __ATTR(board_identifier, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_PRODUCT_NAME, + .tshow = routerboot_tag_show_string, + .kattr = __ATTR(product_name, S_IRUSR, hc_attr_show, NULL), + }, { + .tag_id = RB_ID_DEFCONF, + .tshow = routerboot_tag_show_string, + .kattr = __ATTR(defconf, S_IRUSR, hc_attr_show, NULL), + } +}; + +/* + * If the RB_ID_WLAN_DATA payload starts with RB_MAGIC_ERD, then past + * that magic number the payload itself contains a routerboot tag node + * locating the LZO-compressed calibration data at id 0x1. + */ +static int hc_wlan_data_unpack_erd(const u8 *inbuf, size_t inlen, + void *outbuf, size_t *outlen) +{ + u16 lzo_ofs, lzo_len; + int ret; + + /* Find embedded tag */ + ret = routerboot_tag_find(inbuf, inlen, 0x1, // always id 1 + &lzo_ofs, &lzo_len); + if (ret) { + pr_debug(RB_HC_PR_PFX "ERD data not found\n"); + goto fail; + } + + if (lzo_len > inlen) { + pr_debug(RB_HC_PR_PFX "Invalid ERD data length\n"); + ret = -EINVAL; + goto fail; + } + + ret = lzo1x_decompress_safe(inbuf+lzo_ofs, lzo_len, outbuf, outlen); + if (ret) + pr_debug(RB_HC_PR_PFX "LZO decompression error (%d)\n", ret); + +fail: + return ret; +} + +/* + * If the RB_ID_WLAN_DATA payload starts with RB_MAGIC_LZOR, then past + * that magic number is a payload that must be appended to the hc_lzor_prefix, + * the resulting blob is LZO-compressed. In the LZO decompression result, + * the RB_MAGIC_ERD magic number (aligned) must be located. Following that + * magic, there is a routerboot tag node (id 0x1) locating the RLE-encoded + * calibration data payload. + */ +static int hc_wlan_data_unpack_lzor(const u8 *inbuf, size_t inlen, + void *outbuf, size_t *outlen) +{ + u16 rle_ofs, rle_len; + const u32 *needle; + u8 *tempbuf; + size_t templen, lzo_len; + int ret; + + lzo_len = inlen + sizeof(hc_lzor_prefix); + if (lzo_len > *outlen) + return -EFBIG; + + /* Temporary buffer same size as the outbuf */ + templen = *outlen; + tempbuf = kmalloc(templen, GFP_KERNEL); + if (!outbuf) + return -ENOMEM; + + /* Concatenate into the outbuf */ + memcpy(outbuf, hc_lzor_prefix, sizeof(hc_lzor_prefix)); + memcpy(outbuf + sizeof(hc_lzor_prefix), inbuf, inlen); + + /* LZO-decompress lzo_len bytes of outbuf into the tempbuf */ + ret = lzo1x_decompress_safe(outbuf, lzo_len, tempbuf, &templen); + if (ret) { + if (LZO_E_INPUT_NOT_CONSUMED == ret) { + /* + * The tag length appears to always be aligned (probably + * because it is the "root" RB_ID_WLAN_DATA tag), thus + * the LZO payload may be padded, which can trigger a + * spurious error which we ignore here. + */ + pr_debug(RB_HC_PR_PFX "LZOR: LZO EOF before buffer end - this may be harmless\n"); + } else { + pr_debug(RB_HC_PR_PFX "LZOR: LZO decompression error (%d)\n", ret); + goto fail; + } + } + + /* + * Post decompression we have a blob (possibly byproduct of the lzo + * dictionary). We need to find RB_MAGIC_ERD. The magic number seems to + * be 32bit-aligned in the decompression output. + */ + needle = (const u32 *)tempbuf; + while (RB_MAGIC_ERD != *needle++) { + if ((u8 *)needle >= tempbuf+templen) { + pr_debug(RB_HC_PR_PFX "LZOR: ERD magic not found\n"); + ret = -ENODATA; + goto fail; + } + }; + templen -= (u8 *)needle - tempbuf; + + /* Past magic. Look for tag node */ + ret = routerboot_tag_find((u8 *)needle, templen, 0x1, &rle_ofs, &rle_len); + if (ret) { + pr_debug(RB_HC_PR_PFX "LZOR: RLE data not found\n"); + goto fail; + } + + if (rle_len > templen) { + pr_debug(RB_HC_PR_PFX "LZOR: Invalid RLE data length\n"); + ret = -EINVAL; + goto fail; + } + + /* RLE-decode tempbuf from needle back into the outbuf */ + ret = routerboot_rle_decode((u8 *)needle+rle_ofs, rle_len, outbuf, outlen); + if (ret) + pr_debug(RB_HC_PR_PFX "LZOR: RLE decoding error (%d)\n", ret); + +fail: + kfree(tempbuf); + return ret; +} + +static int hc_wlan_data_unpack(const size_t tofs, size_t tlen, + void *outbuf, size_t *outlen) +{ + const u8 *lbuf; + u32 magic; + int ret; + + /* Caller ensure tlen > 0. tofs is aligned */ + if ((tofs + tlen) > hc_buflen) + return -EIO; + + lbuf = hc_buf + tofs; + magic = *(u32 *)lbuf; + + ret = -ENODATA; + switch (magic) { + case RB_MAGIC_LZOR: + /* Skip magic */ + lbuf += sizeof(magic); + tlen -= sizeof(magic); + ret = hc_wlan_data_unpack_lzor(lbuf, tlen, outbuf, outlen); + break; + case RB_MAGIC_ERD: + /* Skip magic */ + lbuf += sizeof(magic); + tlen -= sizeof(magic); + ret = hc_wlan_data_unpack_erd(lbuf, tlen, outbuf, outlen); + break; + default: + /* + * If the RB_ID_WLAN_DATA payload doesn't start with a + * magic number, the payload itself is the raw RLE-encoded + * calibration data. + */ + ret = routerboot_rle_decode(lbuf, tlen, outbuf, outlen); + if (ret) + pr_debug(RB_HC_PR_PFX "RLE decoding error (%d)\n", ret); + break; + } + + return ret; +} + +static ssize_t hc_attr_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + const struct hc_attr *hc_attr; + const u8 *pld; + u16 pld_len; + + hc_attr = container_of(attr, typeof(*hc_attr), kattr); + + if (!hc_attr->pld_len) + return -ENOENT; + + pld = hc_buf + hc_attr->pld_ofs; + pld_len = hc_attr->pld_len; + + return hc_attr->tshow(pld, pld_len, buf); +} + +/* + * This function will allocate and free memory every time it is called. This + * is not the fastest way to do this, but since the data is rarely read (mainly + * at boot time to load wlan caldata), this makes it possible to save memory for + * the system. + */ +static ssize_t hc_wlan_data_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + struct hc_wlan_attr *hc_wattr; + size_t outlen; + void *outbuf; + int ret; + + hc_wattr = container_of(attr, typeof(*hc_wattr), battr); + + if (!hc_wattr->pld_len) + return -ENOENT; + + outlen = RB_ART_SIZE; + + /* Don't bother unpacking if the source is already too large */ + if (hc_wattr->pld_len > outlen) + return -EFBIG; + + outbuf = kmalloc(outlen, GFP_KERNEL); + if (!outbuf) + return -ENOMEM; + + ret = hc_wlan_data_unpack(hc_wattr->pld_ofs, hc_wattr->pld_len, outbuf, &outlen); + if (ret) { + kfree(outbuf); + return ret; + } + + if (off >= outlen) { + kfree(outbuf); + return 0; + } + + if (off + count > outlen) + count = outlen - off; + + memcpy(buf, outbuf + off, count); + + kfree(outbuf); + return count; +} + +int __init rb_hardconfig_init(struct kobject *rb_kobj) +{ + struct mtd_info *mtd; + size_t bytes_read, buflen; + const u8 *buf; + int i, ret; + u32 magic; + + hc_buf = NULL; + hc_kobj = NULL; + + // TODO allow override + mtd = get_mtd_device_nm(RB_MTD_HARD_CONFIG); + if (IS_ERR(mtd)) + return -ENODEV; + + hc_buflen = mtd->size; + hc_buf = kmalloc(hc_buflen, GFP_KERNEL); + if (!hc_buf) + return -ENOMEM; + + ret = mtd_read(mtd, 0, hc_buflen, &bytes_read, hc_buf); + + if (ret) + goto fail; + + if (bytes_read != hc_buflen) { + ret = -EIO; + goto fail; + } + + /* Check we have what we expect */ + magic = *(const u32 *)hc_buf; + if (RB_MAGIC_HARD != magic) { + ret = -EINVAL; + goto fail; + } + + /* Skip magic */ + buf = hc_buf + sizeof(magic); + buflen = hc_buflen - sizeof(magic); + + /* Populate sysfs */ + ret = -ENOMEM; + hc_kobj = kobject_create_and_add(RB_MTD_HARD_CONFIG, rb_kobj); + if (!hc_kobj) + goto fail; + + /* Locate and publish all known tags */ + for (i = 0; i < ARRAY_SIZE(hc_attrs); i++) { + ret = routerboot_tag_find(buf, buflen, hc_attrs[i].tag_id, + &hc_attrs[i].pld_ofs, &hc_attrs[i].pld_len); + if (ret) { + hc_attrs[i].pld_ofs = hc_attrs[i].pld_len = 0; + continue; + } + + /* Account for skipped magic */ + hc_attrs[i].pld_ofs += sizeof(magic); + + /* Special case RB_ID_WLAN_DATA to prep and create the binary attribute */ + if ((RB_ID_WLAN_DATA == hc_attrs[i].tag_id) && hc_attrs[i].pld_len) { + hc_wlandata_battr.pld_ofs = hc_attrs[i].pld_ofs; + hc_wlandata_battr.pld_len = hc_attrs[i].pld_len; + + ret = sysfs_create_bin_file(hc_kobj, &hc_wlandata_battr.battr); + if (ret) + pr_warn(RB_HC_PR_PFX "Could not create %s sysfs entry (%d)\n", + hc_wlandata_battr.battr.attr.name, ret); + } + /* All other tags are published via standard attributes */ + else { + ret = sysfs_create_file(hc_kobj, &hc_attrs[i].kattr.attr); + if (ret) + pr_warn(RB_HC_PR_PFX "Could not create %s sysfs entry (%d)\n", + hc_attrs[i].kattr.attr.name, ret); + } + } + + pr_info("MikroTik RouterBOARD hardware configuration sysfs driver v" RB_HARDCONFIG_VER "\n"); + + return 0; + +fail: + kfree(hc_buf); + hc_buf = NULL; + return ret; +} + +void __exit rb_hardconfig_exit(void) +{ + kobject_put(hc_kobj); + kfree(hc_buf); +} diff --git a/target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c b/target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c new file mode 100644 index 0000000000..7bef497c9b --- /dev/null +++ b/target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c @@ -0,0 +1,754 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for MikroTik RouterBoot soft config. + * + * Copyright (C) 2020 Thibaut VARÈNE + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * This driver exposes the data encoded in the "soft_config" flash segment of + * MikroTik RouterBOARDs devices. It presents the data in a sysfs folder + * named "soft_config". The data is presented in a user/machine-friendly way + * with just as much parsing as can be generalized across mikrotik platforms + * (as inferred from reverse-engineering). + * + * The known soft_config tags are presented in the "soft_config" sysfs folder, + * with the addition of one specific file named "commit", which is only + * available if the driver supports writes to the mtd device: no modifications + * made to any of the other attributes are actually written back to flash media + * until a true value is input into this file (e.g. [Yy1]). This is to avoid + * unnecessary flash wear, and to permit to revert all changes by issuing a + * false value ([Nn0]). Reading the content of this file shows the current + * status of the driver: if the data in sysfs matches the content of the + * soft_config partition, the file will read "clean". Otherwise, it will read + * "dirty". + * + * The writeable sysfs files presented by this driver will accept only inputs + * which are in a valid range for the given tag. As a design choice, the driver + * will not assess whether the inputs are identical to the existing data. + * + * Note: PAGE_SIZE is assumed to be >= 4K, hence the device attribute show + * routines need not check for output overflow. + * + * Some constant defines extracted from rbcfg.h by Gabor Juhos + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ATH79 + #include +#endif + +#include "routerboot.h" + +#define RB_SOFTCONFIG_VER "0.02" +#define RB_SC_PR_PFX "[rb_softconfig] " + +/* + * mtd operations before 4.17 are asynchronous, not handled by this code + * Also make the driver act read-only if 4K_SECTORS are not enabled, since they + * are require to handle partial erasing of the small soft_config partition. + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 17, 0)) && defined(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS) + #define RB_SC_HAS_WRITE_SUPPORT true + #define RB_SC_WMODE S_IWUSR + #define RB_SC_RMODE S_IRUSR +#else + #define RB_SC_HAS_WRITE_SUPPORT false + #define RB_SC_WMODE 0 + #define RB_SC_RMODE S_IRUSR +#endif + +/* ID values for software settings */ +#define RB_SCID_UART_SPEED 0x01 // u32*1 +#define RB_SCID_BOOT_DELAY 0x02 // u32*1 +#define RB_SCID_BOOT_DEVICE 0x03 // u32*1 +#define RB_SCID_BOOT_KEY 0x04 // u32*1 +#define RB_SCID_CPU_MODE 0x05 // u32*1 +#define RB_SCID_BIOS_VERSION 0x06 // str +#define RB_SCID_BOOT_PROTOCOL 0x09 // u32*1 +#define RB_SCID_CPU_FREQ_IDX 0x0C // u32*1 +#define RB_SCID_BOOTER 0x0D // u32*1 +#define RB_SCID_SILENT_BOOT 0x0F // u32*1 +/* + * protected_routerboot seems to use tag 0x1F. It only works in combination with + * RouterOS, resulting in a wiped board otherwise, so it's not implemented here. + * The tag values are as follows: + * - off: 0x0 + * - on: the lower halfword encodes the max value in s for the reset feature, + * the higher halfword encodes the min value in s for the reset feature. + * Default value when on: 0x00140258: 0x14 = 20s / 0x258= 600s + * See details here: https://wiki.mikrotik.com/wiki/Manual:RouterBOARD_settings#Protected_bootloader + */ + +/* Tag values */ + +#define RB_UART_SPEED_115200 0 +#define RB_UART_SPEED_57600 1 +#define RB_UART_SPEED_38400 2 +#define RB_UART_SPEED_19200 3 +#define RB_UART_SPEED_9600 4 +#define RB_UART_SPEED_4800 5 +#define RB_UART_SPEED_2400 6 +#define RB_UART_SPEED_1200 7 +#define RB_UART_SPEED_OFF 8 + +/* valid boot delay: 1 - 9s in 1s increment */ +#define RB_BOOT_DELAY_MIN 1 +#define RB_BOOT_DELAY_MAX 9 + +#define RB_BOOT_DEVICE_ETHER 0 // "boot over Ethernet" +#define RB_BOOT_DEVICE_NANDETH 1 // "boot from NAND, if fail then Ethernet" +#define RB_BOOT_DEVICE_CFCARD 2 // (not available in rbcfg) +#define RB_BOOT_DEVICE_ETHONCE 3 // "boot Ethernet once, then NAND" +#define RB_BOOT_DEVICE_NANDONLY 5 // "boot from NAND only" +#define RB_BOOT_DEVICE_FLASHCFG 7 // "boot in flash configuration mode" +#define RB_BOOT_DEVICE_FLSHONCE 8 // "boot in flash configuration mode once, then NAND" + +/* + * ATH79 CPU frequency indices. + * It is unknown if they apply to all ATH79 RBs, and some do not seem to feature + * the up levels (QCA955x), while U3 is presumably AR9344-only. + */ +#define RB_CPU_FREQ_IDX_ATH79_D2 (0 << 3) +#define RB_CPU_FREQ_IDX_ATH79_D1 (1 << 3) // 0x8 +#define RB_CPU_FREQ_IDX_ATH79_N0 (2 << 3) // 0x10 - factory freq for many devices +#define RB_CPU_FREQ_IDX_ATH79_U1 (3 << 3) // 0x18 +#define RB_CPU_FREQ_IDX_ATH79_U2 (4 << 3) // 0x20 +#define RB_CPU_FREQ_IDX_ATH79_U3 (5 << 3) // 0x28 + +#define RB_CPU_FREQ_IDX_ATH79_MIN 0 // all devices support lowest setting +#define RB_CPU_FREQ_IDX_ATH79_AR9334_MAX 5 // stops at U3 +#define RB_CPU_FREQ_IDX_ATH79_QCA953X_MAX 4 // stops at U2 +#define RB_CPU_FREQ_IDX_ATH79_QCA9556_MAX 2 // stops at N0 +#define RB_CPU_FREQ_IDX_ATH79_QCA9558_MAX 3 // stops at U1 + +#define RB_SC_CRC32_OFFSET 4 // located right after magic + +static struct kobject *sc_kobj; +static u8 *sc_buf; +static size_t sc_buflen; +static rwlock_t sc_bufrwl; // rw lock to sc_buf + +/* MUST be used with lock held */ +#define RB_SC_CLRCRC() *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = 0 +#define RB_SC_GETCRC() *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) +#define RB_SC_SETCRC(_crc) *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = (_crc) + +struct sc_u32tvs { + const u32 val; + const char *str; +}; + +#define RB_SC_TVS(_val, _str) { \ + .val = (_val), \ + .str = (_str), \ +} + +static ssize_t sc_tag_show_u32tvs(const u8 *pld, u16 pld_len, char *buf, + const struct sc_u32tvs tvs[], const int tvselmts) +{ + const char *fmt; + char *out = buf; + u32 data; // cpu-endian + int i; + + if (tvselmts < 0) + return tvselmts; + + if (sizeof(data) != pld_len) + return -EINVAL; + + read_lock(&sc_bufrwl); + data = *(u32 *)pld; // pld aliases sc_buf + read_unlock(&sc_bufrwl); + + for (i = 0; i < tvselmts; i++) { + fmt = (tvs[i].val == data) ? "[%s] " : "%s "; + out += sprintf(out, fmt, tvs[i].str); + } + + out += sprintf(out, "\n"); + return out - buf; +} + +static ssize_t sc_tag_store_u32tvs(const u8 *pld, u16 pld_len, const char *buf, size_t count, + const struct sc_u32tvs tvs[], const int tvselmts) +{ + int i; + + if (tvselmts < 0) + return tvselmts; + + if (sizeof(u32) != pld_len) + return -EINVAL; + + for (i = 0; i < tvselmts; i++) { + if (sysfs_streq(buf, tvs[i].str)) { + write_lock(&sc_bufrwl); + *(u32 *)pld = tvs[i].val; // pld aliases sc_buf + RB_SC_CLRCRC(); + write_unlock(&sc_bufrwl); + return count; + } + } + + return -EINVAL; +} + +struct sc_boolts { + const char *strfalse; + const char *strtrue; +}; + +static ssize_t sc_tag_show_boolts(const u8 *pld, u16 pld_len, char *buf, + const struct sc_boolts *bts) +{ + const char *fmt; + char *out = buf; + u32 data; // cpu-endian + + if (sizeof(data) != pld_len) + return -EINVAL; + + read_lock(&sc_bufrwl); + data = *(u32 *)pld; // pld aliases sc_buf + read_unlock(&sc_bufrwl); + + fmt = (data) ? "%s [%s]\n" : "[%s] %s\n"; + out += sprintf(out, fmt, bts->strfalse, bts->strtrue); + + return out - buf; +} + +static ssize_t sc_tag_store_boolts(const u8 *pld, u16 pld_len, const char *buf, size_t count, + const struct sc_boolts *bts) +{ + u32 data; // cpu-endian + + if (sizeof(data) != pld_len) + return -EINVAL; + + if (sysfs_streq(buf, bts->strfalse)) + data = 0; + else if (sysfs_streq(buf, bts->strtrue)) + data = 1; + else + return -EINVAL; + + write_lock(&sc_bufrwl); + *(u32 *)pld = data; // pld aliases sc_buf + RB_SC_CLRCRC(); + write_unlock(&sc_bufrwl); + + return count; +} +static struct sc_u32tvs const sc_uartspeeds[] = { + RB_SC_TVS(RB_UART_SPEED_OFF, "off"), + RB_SC_TVS(RB_UART_SPEED_1200, "1200"), + RB_SC_TVS(RB_UART_SPEED_2400, "2400"), + RB_SC_TVS(RB_UART_SPEED_4800, "4800"), + RB_SC_TVS(RB_UART_SPEED_9600, "9600"), + RB_SC_TVS(RB_UART_SPEED_19200, "19200"), + RB_SC_TVS(RB_UART_SPEED_38400, "38400"), + RB_SC_TVS(RB_UART_SPEED_57600, "57600"), + RB_SC_TVS(RB_UART_SPEED_115200, "115200"), +}; + +/* + * While the defines are carried over from rbcfg, use strings that more clearly + * show the actual setting purpose (especially since the NAND* settings apply + * to both nand- and nor-based devices). "cfcard" was disabled in rbcfg: disable + * it here too. + */ +static struct sc_u32tvs const sc_bootdevices[] = { + RB_SC_TVS(RB_BOOT_DEVICE_ETHER, "eth"), + RB_SC_TVS(RB_BOOT_DEVICE_NANDETH, "flasheth"), + //RB_SC_TVS(RB_BOOT_DEVICE_CFCARD, "cfcard"), + RB_SC_TVS(RB_BOOT_DEVICE_ETHONCE, "ethonce"), + RB_SC_TVS(RB_BOOT_DEVICE_NANDONLY, "flash"), + RB_SC_TVS(RB_BOOT_DEVICE_FLASHCFG, "cfg"), + RB_SC_TVS(RB_BOOT_DEVICE_FLSHONCE, "cfgonce"), +}; + +static struct sc_boolts const sc_bootkey = { + .strfalse = "any", + .strtrue = "del", +}; + +static struct sc_boolts const sc_cpumode = { + .strfalse = "powersave", + .strtrue = "regular", +}; + +static struct sc_boolts const sc_bootproto = { + .strfalse = "bootp", + .strtrue = "dhcp", +}; + +static struct sc_boolts const sc_booter = { + .strfalse = "regular", + .strtrue = "backup", +}; + +static struct sc_boolts const sc_silent_boot = { + .strfalse = "off", + .strtrue = "on", +}; + +#define SC_TAG_SHOW_STORE_U32TVS_FUNCS(_name) \ +static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf) \ +{ \ + return sc_tag_show_u32tvs(pld, pld_len, buf, sc_##_name, ARRAY_SIZE(sc_##_name)); \ +} \ +static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count) \ +{ \ + return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_##_name, ARRAY_SIZE(sc_##_name)); \ +} + +#define SC_TAG_SHOW_STORE_BOOLTS_FUNCS(_name) \ +static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf) \ +{ \ + return sc_tag_show_boolts(pld, pld_len, buf, &sc_##_name); \ +} \ +static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count) \ +{ \ + return sc_tag_store_boolts(pld, pld_len, buf, count, &sc_##_name); \ +} + +SC_TAG_SHOW_STORE_U32TVS_FUNCS(uartspeeds) +SC_TAG_SHOW_STORE_U32TVS_FUNCS(bootdevices) +SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootkey) +SC_TAG_SHOW_STORE_BOOLTS_FUNCS(cpumode) +SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootproto) +SC_TAG_SHOW_STORE_BOOLTS_FUNCS(booter) +SC_TAG_SHOW_STORE_BOOLTS_FUNCS(silent_boot) + +static ssize_t sc_tag_show_bootdelays(const u8 *pld, u16 pld_len, char *buf) +{ + const char *fmt; + char *out = buf; + u32 data; // cpu-endian + int i; + + if (sizeof(data) != pld_len) + return -EINVAL; + + read_lock(&sc_bufrwl); + data = *(u32 *)pld; // pld aliases sc_buf + read_unlock(&sc_bufrwl); + + for (i = RB_BOOT_DELAY_MIN; i <= RB_BOOT_DELAY_MAX; i++) { + fmt = (i == data) ? "[%d] " : "%d "; + out += sprintf(out, fmt, i); + } + + out += sprintf(out, "\n"); + return out - buf; +} + +static ssize_t sc_tag_store_bootdelays(const u8 *pld, u16 pld_len, const char *buf, size_t count) +{ + u32 data; // cpu-endian + int ret; + + if (sizeof(data) != pld_len) + return -EINVAL; + + ret = kstrtou32(buf, 10, &data); + if (ret) + return ret; + + if ((data < RB_BOOT_DELAY_MIN) || (RB_BOOT_DELAY_MAX < data)) + return -EINVAL; + + write_lock(&sc_bufrwl); + *(u32 *)pld = data; // pld aliases sc_buf + RB_SC_CLRCRC(); + write_unlock(&sc_bufrwl); + + return count; +} + +/* Support CPU frequency accessors only when the tag format has been asserted */ +#if defined(CONFIG_ATH79) +static struct sc_u32tvs const sc_cpufreq_indexes_ath79[] = { + RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_D2, "-2"), + RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_D1, "-1"), + RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_N0, "0"), + RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_U1, "+1"), + RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_U2, "+2"), + RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_U3, "+3"), +}; + +static int sc_tag_cpufreq_ath79_idxmax(void) +{ + int idx_max = -EOPNOTSUPP; + + if (soc_is_ar9344()) + idx_max = RB_CPU_FREQ_IDX_ATH79_AR9334_MAX; + else if (soc_is_qca953x()) + idx_max = RB_CPU_FREQ_IDX_ATH79_QCA953X_MAX; + else if (soc_is_qca9556()) + idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9556_MAX; + else if (soc_is_qca9558()) + idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9558_MAX; + + return idx_max; +} + +static ssize_t sc_tag_show_cpufreq_indexes(const u8 *pld, u16 pld_len, char * buf) +{ + return sc_tag_show_u32tvs(pld, pld_len, buf, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_idxmax()+1); +} + +static ssize_t sc_tag_store_cpufreq_indexes(const u8 *pld, u16 pld_len, const char *buf, size_t count) +{ + return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_idxmax()+1); +} +#else + /* By default we only show the raw value to help with reverse-engineering */ + #define sc_tag_show_cpufreq_indexes routerboot_tag_show_u32s + #define sc_tag_store_cpufreq_indexes NULL +#endif + +static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf); +static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count); + +/* Array of known tags to publish in sysfs */ +static struct sc_attr { + const u16 tag_id; + /* sysfs tag show attribute. Must lock sc_buf when dereferencing pld */ + ssize_t (* const tshow)(const u8 *pld, u16 pld_len, char *buf); + /* sysfs tag store attribute. Must lock sc_buf when dereferencing pld */ + ssize_t (* const tstore)(const u8 *pld, u16 pld_len, const char *buf, size_t count); + struct kobj_attribute kattr; + u16 pld_ofs; + u16 pld_len; +} sc_attrs[] = { + { + .tag_id = RB_SCID_UART_SPEED, + .tshow = sc_tag_show_uartspeeds, + .tstore = sc_tag_store_uartspeeds, + .kattr = __ATTR(uart_speed, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_BOOT_DELAY, + .tshow = sc_tag_show_bootdelays, + .tstore = sc_tag_store_bootdelays, + .kattr = __ATTR(boot_delay, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_BOOT_DEVICE, + .tshow = sc_tag_show_bootdevices, + .tstore = sc_tag_store_bootdevices, + .kattr = __ATTR(boot_device, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_BOOT_KEY, + .tshow = sc_tag_show_bootkey, + .tstore = sc_tag_store_bootkey, + .kattr = __ATTR(boot_key, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_CPU_MODE, + .tshow = sc_tag_show_cpumode, + .tstore = sc_tag_store_cpumode, + .kattr = __ATTR(cpu_mode, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_BIOS_VERSION, + .tshow = routerboot_tag_show_string, + .tstore = NULL, + .kattr = __ATTR(bios_version, RB_SC_RMODE, sc_attr_show, NULL), + }, { + .tag_id = RB_SCID_BOOT_PROTOCOL, + .tshow = sc_tag_show_bootproto, + .tstore = sc_tag_store_bootproto, + .kattr = __ATTR(boot_proto, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_CPU_FREQ_IDX, + .tshow = sc_tag_show_cpufreq_indexes, + .tstore = sc_tag_store_cpufreq_indexes, + .kattr = __ATTR(cpufreq_index, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_BOOTER, + .tshow = sc_tag_show_booter, + .tstore = sc_tag_store_booter, + .kattr = __ATTR(booter, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, { + .tag_id = RB_SCID_SILENT_BOOT, + .tshow = sc_tag_show_silent_boot, + .tstore = sc_tag_store_silent_boot, + .kattr = __ATTR(silent_boot, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store), + }, +}; + +static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + const struct sc_attr *sc_attr; + const u8 *pld; + u16 pld_len; + + sc_attr = container_of(attr, typeof(*sc_attr), kattr); + + if (!sc_attr->pld_len) + return -ENOENT; + + pld = sc_buf + sc_attr->pld_ofs; // pld aliases sc_buf -> lock! + pld_len = sc_attr->pld_len; + + return sc_attr->tshow(pld, pld_len, buf); +} + +static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count) +{ + const struct sc_attr *sc_attr; + const u8 *pld; + u16 pld_len; + + if (!RB_SC_HAS_WRITE_SUPPORT) + return -EOPNOTSUPP; + + if (!capable(CAP_SYS_ADMIN)) + return -EACCES; + + sc_attr = container_of(attr, typeof(*sc_attr), kattr); + + if (!sc_attr->tstore) + return -EOPNOTSUPP; + + if (!sc_attr->pld_len) + return -ENOENT; + + pld = sc_buf + sc_attr->pld_ofs; // pld aliases sc_buf -> lock! + pld_len = sc_attr->pld_len; + + return sc_attr->tstore(pld, pld_len, buf, count); +} + +/* + * Shows the current buffer status: + * "clean": the buffer is in sync with the mtd data + * "dirty": the buffer is out of sync with the mtd data + */ +static ssize_t sc_commit_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + const char *str; + char *out = buf; + u32 crc; + + read_lock(&sc_bufrwl); + crc = RB_SC_GETCRC(); + read_unlock(&sc_bufrwl); + + str = (crc) ? "clean" : "dirty"; + out += sprintf(out, "%s\n", str); + + return out - buf; +} + +/* + * Performs buffer flushing: + * This routine expects an input compatible with kstrtobool(). + * - a "false" input discards the current changes and reads data back from mtd. + * - a "true" input commits the current changes to mtd. + * If there is no pending changes, this routine is a no-op. + * Handling failures is left as an exercise to userspace. + */ +static ssize_t sc_commit_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count) +{ + struct mtd_info *mtd; + struct erase_info ei; + size_t bytes_rw, ret = count; + bool flush; + u32 crc; + + if (!RB_SC_HAS_WRITE_SUPPORT) + return -EOPNOTSUPP; + + read_lock(&sc_bufrwl); + crc = RB_SC_GETCRC(); + read_unlock(&sc_bufrwl); + + if (crc) + return count; // NO-OP + + ret = kstrtobool(buf, &flush); + if (ret) + return ret; + + mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG); // TODO allow override + if (IS_ERR(mtd)) + return -ENODEV; + + write_lock(&sc_bufrwl); + if (!flush) // reread + ret = mtd_read(mtd, 0, mtd->size, &bytes_rw, sc_buf); + else { // crc32 + commit + /* + * CRC32 is computed on the entire buffer, excluding the CRC + * value itself. CRC is already null when we reach this point, + * so we can compute the CRC32 on the buffer as is. + * The expected CRC32 is Ethernet FCS style, meaning the seed is + * ~0 and the final result is also bitflipped. + */ + + crc = ~crc32(~0, sc_buf, sc_buflen); + RB_SC_SETCRC(crc); + + /* + * The soft_config partition is assumed to be entirely contained + * in a single eraseblock. + */ + + ei.addr = 0; + ei.len = mtd->size; + ret = mtd_erase(mtd, &ei); + if (!ret) + ret = mtd_write(mtd, 0, mtd->size, &bytes_rw, sc_buf); + + /* + * Handling mtd_write() failure here is a tricky situation. The + * proposed approach is to let userspace deal with retrying, + * with the caveat that it must try to flush the buffer again as + * rereading the mtd contents could potentially read garbage. + * The rationale is: even if we keep a shadow buffer of the + * original content, there is no guarantee that we will ever be + * able to write it anyway. + * Regardless, it appears that RouterBOOT will ignore an invalid + * soft_config (including a completely wiped segment) and will + * write back factory defaults when it happens. + */ + } + write_unlock(&sc_bufrwl); + + if (ret) + goto mtdfail; + + if (bytes_rw != sc_buflen) { + ret = -EIO; + goto mtdfail; + } + + return count; + +mtdfail: + RB_SC_CLRCRC(); // mark buffer content as dirty/invalid + return ret; +} + +static struct kobj_attribute sc_kattrcommit = __ATTR(commit, RB_SC_RMODE|RB_SC_WMODE, sc_commit_show, sc_commit_store); + +int __init rb_softconfig_init(struct kobject *rb_kobj) +{ + struct mtd_info *mtd; + size_t bytes_read, buflen; + const u8 *buf; + int i, ret; + u32 magic; + + sc_buf = NULL; + sc_kobj = NULL; + + // TODO allow override + mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG); + if (IS_ERR(mtd)) + return -ENODEV; + + sc_buflen = mtd->size; + sc_buf = kmalloc(sc_buflen, GFP_KERNEL); + if (!sc_buf) + return -ENOMEM; + + ret = mtd_read(mtd, 0, sc_buflen, &bytes_read, sc_buf); + + if (ret) + goto fail; + + if (bytes_read != sc_buflen) { + ret = -EIO; + goto fail; + } + + /* Check we have what we expect */ + magic = *(const u32 *)sc_buf; + if (RB_MAGIC_SOFT != magic) { + ret = -EINVAL; + goto fail; + } + + /* Skip magic and 32bit CRC located immediately after */ + buf = sc_buf + (sizeof(magic) + sizeof(u32)); + buflen = sc_buflen - (sizeof(magic) + sizeof(u32)); + + /* Populate sysfs */ + ret = -ENOMEM; + sc_kobj = kobject_create_and_add(RB_MTD_SOFT_CONFIG, rb_kobj); + if (!sc_kobj) + goto fail; + + rwlock_init(&sc_bufrwl); + + /* Locate and publish all known tags */ + for (i = 0; i < ARRAY_SIZE(sc_attrs); i++) { + ret = routerboot_tag_find(buf, buflen, sc_attrs[i].tag_id, + &sc_attrs[i].pld_ofs, &sc_attrs[i].pld_len); + if (ret) { + sc_attrs[i].pld_ofs = sc_attrs[i].pld_len = 0; + continue; + } + + /* Account for skipped magic and crc32 */ + sc_attrs[i].pld_ofs += sizeof(magic) + sizeof(u32); + + ret = sysfs_create_file(sc_kobj, &sc_attrs[i].kattr.attr); + if (ret) + pr_warn(RB_SC_PR_PFX "Could not create %s sysfs entry (%d)\n", + sc_attrs[i].kattr.attr.name, ret); + } + + /* Finally add the 'commit' attribute */ + if (RB_SC_HAS_WRITE_SUPPORT) { + ret = sysfs_create_file(sc_kobj, &sc_kattrcommit.attr); + if (ret) { + pr_err(RB_SC_PR_PFX "Could not create %s sysfs entry (%d), aborting!\n", + sc_kattrcommit.attr.name, ret); + goto sysfsfail; // required attribute + } + } + + pr_info("MikroTik RouterBOARD software configuration sysfs driver v" RB_SOFTCONFIG_VER "\n"); + + return 0; + +sysfsfail: + kobject_put(sc_kobj); + sc_kobj = NULL; +fail: + kfree(sc_buf); + sc_buf = NULL; + return ret; +} + +void __exit rb_softconfig_exit(void) +{ + kobject_put(sc_kobj); + kfree(sc_buf); +} diff --git a/target/linux/generic/files/drivers/platform/mikrotik/routerboot.c b/target/linux/generic/files/drivers/platform/mikrotik/routerboot.c new file mode 100644 index 0000000000..47e4471f8e --- /dev/null +++ b/target/linux/generic/files/drivers/platform/mikrotik/routerboot.c @@ -0,0 +1,218 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for MikroTik RouterBoot flash data. Common routines. + * + * Copyright (C) 2020 Thibaut VARÈNE + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include "routerboot.h" + +static struct kobject *rb_kobj; + +/** + * routerboot_tag_find() - Locate a given tag in routerboot config data. + * @bufhead: the buffer to look into. Must start with a tag node. + * @buflen: size of bufhead + * @tag_id: the tag identifier to look for + * @pld_ofs: will be updated with tag payload offset in bufhead, if tag found + * @pld_len: will be updated with tag payload size, if tag found + * + * This incarnation of tag_find() does only that: it finds a specific routerboot + * tag node in the input buffer. Routerboot tag nodes are u32 values: + * - The low nibble is the tag identification number, + * - The high nibble is the tag payload length (node excluded) in bytes. + * The payload immediately follows the tag node. Tag nodes are 32bit-aligned. + * The returned pld_ofs will always be aligned. pld_len may not end on 32bit + * boundary (the only known case is when parsing ERD data). + * The nodes are cpu-endian on the flash media. The payload is cpu-endian when + * applicable. Tag nodes are not ordered (by ID) on flash. + * + * Return: 0 on success (tag found) or errno + */ +int routerboot_tag_find(const u8 *bufhead, const size_t buflen, const u16 tag_id, + u16 *pld_ofs, u16 *pld_len) +{ + const u32 *datum, *bufend; + u32 node; + u16 id, len; + int ret; + + if (!bufhead || !tag_id) + return -EINVAL; + + ret = -ENOENT; + datum = (const u32 *)bufhead; + bufend = (const u32 *)(bufhead + buflen); + + while (datum < bufend) { + node = *datum++; + + /* Tag list ends with null node */ + if (!node) + break; + + id = node & 0xFFFF; + len = node >> 16; + + if (tag_id == id) { + if (datum >= bufend) + break; + + if (pld_ofs) + *pld_ofs = (u16)((u8 *)datum - bufhead); + if (pld_len) + *pld_len = len; + + ret = 0; + break; + } + + /* + * The only known situation where len may not end on 32bit + * boundary is within ERD data. Since we're only extracting + * one tag (the first and only one) from that data, we should + * never need to forcefully ALIGN(). Do it anyway, this is not a + * performance path. + */ + len = ALIGN(len, sizeof(*datum)); + datum += len / sizeof(*datum); + } + + return ret; +} + +/** + * routerboot_rle_decode() - Simple RLE (MikroTik variant) decoding routine. + * @in: input buffer to decode + * @inlen: size of in + * @out: output buffer to write decoded data to + * @outlen: pointer to out size when function is called, will be updated with + * size of decoded output on return + * + * MikroTik's variant of RLE operates as follows, considering a signed run byte: + * - positive run => classic RLE + * - negative run => the next - bytes must be copied verbatim + * The API is matched to the lzo1x routines for convenience. + * + * NB: The output buffer cannot overlap with the input buffer. + * + * Return: 0 on success or errno + */ +int routerboot_rle_decode(const u8 *in, size_t inlen, u8 *out, size_t *outlen) +{ + int ret, run, nbytes; // use native types for speed + u8 byte; + + if (!in || (inlen < 2) || !out) + return -EINVAL; + + ret = -ENOSPC; + nbytes = 0; + while (inlen >= 2) { + run = *in++; + inlen--; + + /* Verbatim copies */ + if (run & 0x80) { + /* Invert run byte sign */ + run = ~run & 0xFF; + run++; + + if (run > inlen) + goto fail; + + inlen -= run; + + nbytes += run; + if (nbytes > *outlen) + goto fail; + + /* Basic memcpy */ + while (run-- > 0) + *out++ = *in++; + } + /* Stream of half-words RLE: . run == 0 is ignored */ + else { + byte = *in++; + inlen--; + + nbytes += run; + if (nbytes > *outlen) + goto fail; + + while (run-- > 0) + *out++ = byte; + } + } + + ret = 0; +fail: + *outlen = nbytes; + return ret; +} + +static int __init routerboot_init(void) +{ + rb_kobj = kobject_create_and_add("mikrotik", firmware_kobj); + if (!rb_kobj) + return -ENOMEM; + + /* + * We ignore the following return values and always register. + * These init() routines are designed so that their failed state is + * always manageable by the corresponding exit() calls. + */ + rb_hardconfig_init(rb_kobj); + rb_softconfig_init(rb_kobj); + + return 0; +} + +static void __exit routerboot_exit(void) +{ + rb_softconfig_exit(); + rb_hardconfig_exit(); + kobject_put(rb_kobj); // recursive afaict +} + +/* Common routines */ + +ssize_t routerboot_tag_show_string(const u8 *pld, u16 pld_len, char *buf) +{ + return scnprintf(buf, pld_len+1, "%s\n", pld); +} + +ssize_t routerboot_tag_show_u32s(const u8 *pld, u16 pld_len, char *buf) +{ + char *out = buf; + u32 data; // cpu-endian + + /* Caller ensures pld_len > 0 */ + if (pld_len % sizeof(data)) + return -EINVAL; + + data = *(u32 *)pld; + + do { + out += sprintf(out, "0x%08x\n", data); + data++; + } while ((pld_len -= sizeof(data))); + + return out - buf; +} + +module_init(routerboot_init); +module_exit(routerboot_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("MikroTik RouterBoot sysfs support"); +MODULE_AUTHOR("Thibaut VARENE"); diff --git a/target/linux/generic/files/drivers/platform/mikrotik/routerboot.h b/target/linux/generic/files/drivers/platform/mikrotik/routerboot.h new file mode 100644 index 0000000000..67d89808d5 --- /dev/null +++ b/target/linux/generic/files/drivers/platform/mikrotik/routerboot.h @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Common definitions for MikroTik RouterBoot data. + * + * Copyright (C) 2020 Thibaut VARÈNE + */ + + +#ifndef _ROUTERBOOT_H_ +#define _ROUTERBOOT_H_ + +#include + +// these magic values are stored in cpu-endianness on flash +#define RB_MAGIC_HARD (('H') | ('a' << 8) | ('r' << 16) | ('d' << 24)) +#define RB_MAGIC_SOFT (('S') | ('o' << 8) | ('f' << 16) | ('t' << 24)) +#define RB_MAGIC_LZOR (('L') | ('Z' << 8) | ('O' << 16) | ('R' << 24)) +#define RB_MAGIC_ERD (('E' << 16) | ('R' << 8) | ('D')) + +#define RB_ART_SIZE 0x10000 + +#define RB_MTD_HARD_CONFIG "hard_config" +#define RB_MTD_SOFT_CONFIG "soft_config" + +int routerboot_tag_find(const u8 *bufhead, const size_t buflen, const u16 tag_id, u16 *pld_ofs, u16 *pld_len); +int routerboot_rle_decode(const u8 *in, size_t inlen, u8 *out, size_t *outlen); + +int __init rb_hardconfig_init(struct kobject *rb_kobj); +void __exit rb_hardconfig_exit(void); + +int __init rb_softconfig_init(struct kobject *rb_kobj); +void __exit rb_softconfig_exit(void); + +ssize_t routerboot_tag_show_string(const u8 *pld, u16 pld_len, char *buf); +ssize_t routerboot_tag_show_u32s(const u8 *pld, u16 pld_len, char *buf); + +#endif /* _ROUTERBOOT_H_ */ diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index ece742a83a..cb33fb617c 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -19,7 +19,7 @@ KERNELNAME:=bzImage include $(INCLUDE_DIR)/target.mk -DEFAULT_PACKAGES += partx-utils mkf2fs fdisk e2fsprogs wpad kmod-usb-hid \ +DEFAULT_PACKAGES += partx-utils mkf2fs fdisk e2fsprogs wpad kmod-usb-hid kmod-mmc-spi kmod-sdhci \ kmod-ath5k kmod-ath9k kmod-ath9k-htc kmod-ath10k kmod-rt2800-usb kmod-e1000e kmod-igb kmod-igbvf kmod-ixgbe kmod-pcnet32 kmod-tulip kmod-vmxnet3 kmod-i40e kmod-i40evf kmod-r8125 kmod-8139cp kmod-8139too kmod-fs-f2fs \ htop lm-sensors autocore automount autosamba luci-app-ipsec-vpnd luci-proto-bonding luci-app-unblockmusic luci-app-zerotier luci-app-xlnetacc ddns-scripts_aliyun ddns-scripts_dnspod ca-certificates \ luci-app-airplay2 luci-app-music-remote-center luci-app-qbittorrent luci-app-amule luci-app-openvpn-server \ diff --git a/target/linux/x86/config-4.19 b/target/linux/x86/config-4.19 index 0f5d3d062d..f910fb945f 100644 --- a/target/linux/x86/config-4.19 +++ b/target/linux/x86/config-4.19 @@ -326,7 +326,6 @@ CONFIG_IRQ_WORK=y # CONFIG_ISA is not set CONFIG_ISA_DMA_API=y # CONFIG_ISCSI_IBFT is not set -# CONFIG_ISCSI_IBFT_FIND is not set # CONFIG_IT8712F_WDT is not set # CONFIG_IT87_WDT is not set # CONFIG_ITCO_WDT is not set @@ -363,6 +362,18 @@ CONFIG_MIGRATION=y # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MK8 is not set +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +CONFIG_MMC_DEBUG=y +CONFIG_MMC_RICOH_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_PCI=y +# CONFIG_MMC_SDHCI_PLTFM is not set +CONFIG_MMC_TEST=y +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_WBSD is not set # CONFIG_MODIFY_LDT_SYSCALL is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_USE_ELF_REL=y @@ -438,6 +449,7 @@ CONFIG_PINCTRL=y # CONFIG_PINCTRL_GEMINILAKE is not set # CONFIG_PINCTRL_LEWISBURG is not set # CONFIG_PINCTRL_SUNRISEPOINT is not set +CONFIG_PLUGIN_HOSTCC="g++" CONFIG_PMC_ATOM=y # CONFIG_PMIC_OPREGION is not set CONFIG_PNP=y @@ -478,6 +490,7 @@ CONFIG_SCx200=y CONFIG_SCx200HR_TIMER=y # CONFIG_SCx200_GPIO is not set # CONFIG_SCx200_WDT is not set +CONFIG_SDIO_UART=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_PNP=y CONFIG_SERIO=y @@ -552,20 +565,18 @@ CONFIG_X86_CMPXCHG64=y # CONFIG_X86_CPUFREQ_NFORCE2 is not set # CONFIG_X86_CPUID is not set # CONFIG_X86_DEBUG_FPU is not set -CONFIG_X86_DECODER_SELFTEST=n +# CONFIG_X86_DECODER_SELFTEST is not set # CONFIG_X86_EXTENDED_PLATFORM is not set # CONFIG_X86_E_POWERSAVER is not set CONFIG_X86_F00F_BUG=y CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_GENERIC=y # CONFIG_X86_GX_SUSPMOD is not set -# CONFIG_X86_INTEL_MPX is not set -# CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set CONFIG_X86_INTEL_LPSS=y # CONFIG_X86_INTEL_PSTATE is not set +# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set -# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set CONFIG_X86_INTEL_UMIP=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 From f3225f6770eea621b4b6f0b647bdec20206bac4c Mon Sep 17 00:00:00 2001 From: goldkeyber112 <45441606+goldkeyber112@users.noreply.github.com> Date: Wed, 24 Jun 2020 05:25:15 +0800 Subject: [PATCH 21/25] bump to 9.003.05 add RTL8125B(S) support --- package/lean/r8125/Makefile | 2 +- package/lean/r8125/src/Makefile | 6 +- package/lean/r8125/src/r8125.h | 74 +- package/lean/r8125/src/r8125_dash.h | 14 +- package/lean/r8125/src/r8125_n.c | 3996 +++++++++++++++++------- package/lean/r8125/src/r8125_realwow.h | 2 +- package/lean/r8125/src/rtl_eeprom.c | 117 +- package/lean/r8125/src/rtl_eeprom.h | 19 +- package/lean/r8125/src/rtltool.c | 14 +- package/lean/r8125/src/rtltool.h | 2 +- 10 files changed, 3061 insertions(+), 1185 deletions(-) diff --git a/package/lean/r8125/Makefile b/package/lean/r8125/Makefile index 053147a286..cc7b502386 100755 --- a/package/lean/r8125/Makefile +++ b/package/lean/r8125/Makefile @@ -65,7 +65,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=r8125 -PKG_VERSION:=9.002.02 +PKG_VERSION:=9.003.05 PKG_RELEASE:=1 #PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 diff --git a/package/lean/r8125/src/Makefile b/package/lean/r8125/src/Makefile index 3724d00894..02d58004a0 100644 --- a/package/lean/r8125/src/Makefile +++ b/package/lean/r8125/src/Makefile @@ -37,8 +37,9 @@ CONFIG_DOWN_SPEED_100 = n CONFIG_ASPM = y ENABLE_S5WOL = y ENABLE_S5_KEEP_CURR_MAC = n -ENABLE_EEE = n +ENABLE_EEE = y ENABLE_S0_MAGIC_PACKET = n +ENABLE_TX_NO_CLOSE = y ifneq ($(KERNELRELEASE),) obj-m := r8125.o @@ -78,6 +79,9 @@ ifneq ($(KERNELRELEASE),) ifeq ($(ENABLE_S0_MAGIC_PACKET), y) EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET endif + ifeq ($(ENABLE_TX_NO_CLOSE), y) + EXTRA_CFLAGS += -DENABLE_TX_NO_CLOSE + endif else BASEDIR := /lib/modules/$(shell uname -r) KERNELDIR ?= $(BASEDIR)/build diff --git a/package/lean/r8125/src/r8125.h b/package/lean/r8125/src/r8125.h index fcddf18461..23a45a1006 100644 --- a/package/lean/r8125/src/r8125.h +++ b/package/lean/r8125/src/r8125.h @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -249,6 +249,14 @@ do { \ #define SUPPORTED_Asym_Pause (1 << 14) #endif +#ifndef MDIO_EEE_100TX +#define MDIO_EEE_100TX 0x0002 +#endif + +#ifndef MDIO_EEE_1000T +#define MDIO_EEE_1000T 0x0004 +#endif + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) #ifdef CONFIG_NET_POLL_CONTROLLER #define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8125_netpoll @@ -315,12 +323,12 @@ do { \ #define DASH_SUFFIX "" #endif -#define RTL8125_VERSION "9.002.02" NAPI_SUFFIX DASH_SUFFIX +#define RTL8125_VERSION "9.003.05" NAPI_SUFFIX DASH_SUFFIX #define MODULENAME "r8125" #define PFX MODULENAME ": " #define GPL_CLAIM "\ -r8125 Copyright (C) 2019 Realtek NIC software team \n \ +r8125 Copyright (C) 2020 Realtek NIC software team \n \ This program comes with ABSOLUTELY NO WARRANTY; for details, please see . \n \ This is free software, and you are welcome to redistribute it under certain conditions; see . \n" @@ -339,9 +347,6 @@ This is free software, and you are welcome to redistribute it under certain cond #define R8125_MSG_DEFAULT \ (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN) -#define TX_BUFFS_AVAIL(tp) \ - (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1) - #ifdef CONFIG_R8125_NAPI #define rtl8125_rx_hwaccel_skb vlan_hwaccel_receive_skb #define rtl8125_rx_quota(count, quota) min(count, quota) @@ -417,13 +422,15 @@ This is free software, and you are welcome to redistribute it under certain cond #define SHORT_PACKET_PADDING_BUF_SIZE 256 +#define RTK_MAGIC_DEBUG_VALUE 0x0badbeef + /* write/read MMIO register */ -#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) -#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) -#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) -#define RTL_R8(reg) readb (ioaddr + (reg)) -#define RTL_R16(reg) readw (ioaddr + (reg)) -#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) +#define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg)) +#define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg)) +#define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg)) +#define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg)) +#define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg)) +#define RTL_R32(tp, reg) ((unsigned long) readl(tp->mmio_addr + (reg))) #ifndef DMA_64BIT_MASK #define DMA_64BIT_MASK 0xffffffffffffffffULL @@ -479,6 +486,10 @@ This is free software, and you are welcome to redistribute it under certain cond #define RTK_ADVERTISE_2500FULL 0x80 +/* Tx NO CLOSE */ +#define MAX_TX_NO_CLOSE_DESC_PTR_V2 0x10000 +#define TX_NO_CLOSE_SW_PTR_MASK_V2 0x1FFFF + /*****************************************************************************/ //#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) @@ -1099,6 +1110,9 @@ enum RTL8125_registers { TIMER_INT1_8125 = 0x005C, TIMER_INT2_8125 = 0x008C, TIMER_INT3_8125 = 0x00F4, + EEE_TXIDLE_TIMER_8125 = 0x6048, + SW_TAIL_PTR0_8125 = 0x2800, + HW_CLO_PTR0_8125 = 0x2802, }; enum RTL8125_register_content { @@ -1562,6 +1576,7 @@ struct rtl8125_private { u8 ShortPacketSwChecksum; u8 UseSwPaddingShortPkt; + u16 SwPaddingShortPktLen; void *ShortPacketEmptyBuffer; dma_addr_t ShortPacketEmptyBufferPhy; @@ -1576,6 +1591,10 @@ struct rtl8125_private { u8 RequiredSecLanDonglePatch; + u8 RequirePhyMdiSwapPatch; + + u8 RequireLSOPatch; + u32 HwFiberModeVer; u32 HwFiberStat; u8 HwSwitchMdiToFiber; @@ -1594,6 +1613,11 @@ struct rtl8125_private { u32 HwPcieSNOffset; + u8 HwSuppTxNoCloseVer; + u8 EnableTxNoClose; + u32 NextHwDesCloPtr0; + u32 BeginHwDesCloPtr0; + //Dash+++++++++++++++++ u8 HwSuppDashVer; u8 DASH; @@ -1683,6 +1707,9 @@ struct rtl8125_private { //Realwow-------------- #endif //ENABLE_REALWOW_SUPPORT + u32 eee_adv_t; + u8 eee_enabled; + #ifdef ENABLE_R8125_PROCFS //Procfs support struct proc_dir_entry *proc_dir; @@ -1697,8 +1724,10 @@ enum eetype { }; enum mcfg { - CFG_METHOD_2=0, + CFG_METHOD_2=2, CFG_METHOD_3, + CFG_METHOD_4, + CFG_METHOD_5, CFG_METHOD_MAX, CFG_METHOD_DEFAULT = 0xFF }; @@ -1731,6 +1760,8 @@ enum mcfg { //Ram Code Version #define NIC_RAMCODE_VERSION_CFG_METHOD_2 (0x0b11) #define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0b33) +#define NIC_RAMCODE_VERSION_CFG_METHOD_4 (0x0b17) +#define NIC_RAMCODE_VERSION_CFG_METHOD_5 (0x0b34) //hwoptimize #define HW_PATCH_SOC_LAN (BIT_0) @@ -1738,11 +1769,11 @@ enum mcfg { void rtl8125_mdio_write(struct rtl8125_private *tp, u32 RegAddr, u32 value); void rtl8125_mdio_prot_write(struct rtl8125_private *tp, u32 RegAddr, u32 value); -void rtl8125_mdio_prot_write_phy_ocp(struct rtl8125_private *tp, u32 RegAddr, u32 value); +void rtl8125_mdio_prot_direct_write_phy_ocp(struct rtl8125_private *tp, u32 RegAddr, u32 value); u32 rtl8125_mdio_read(struct rtl8125_private *tp, u32 RegAddr); u32 rtl8125_mdio_prot_read(struct rtl8125_private *tp, u32 RegAddr); -u32 rtl8125_mdio_prot_read_phy_ocp(struct rtl8125_private *tp, u32 RegAddr); -void rtl8125_ephy_write(void __iomem *ioaddr, int RegAddr, int value); +u32 rtl8125_mdio_prot_direct_read_phy_ocp(struct rtl8125_private *tp, u32 RegAddr); +void rtl8125_ephy_write(struct rtl8125_private *tp, int RegAddr, int value); void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value); u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr); void rtl8125_clear_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask); @@ -1750,16 +1781,16 @@ void rtl8125_set_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask); void rtl8125_ocp_write(struct rtl8125_private *tp, u16 addr, u8 len, u32 data); void rtl8125_oob_notify(struct rtl8125_private *tp, u8 cmd); void rtl8125_init_ring_indexes(struct rtl8125_private *tp); -int rtl8125_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type); +int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type); void rtl8125_oob_mutex_lock(struct rtl8125_private *tp); u32 rtl8125_mdio_read(struct rtl8125_private *tp, u32 RegAddr); u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len); u32 rtl8125_ocp_read_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 base_address); u32 rtl8125_ocp_write_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 value, u32 base_address); -u32 rtl8125_eri_read(void __iomem *ioaddr, int addr, int len, int type); -u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int len, int type, u32 base_address); -int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int len, u32 value, int type, u32 base_address); -u16 rtl8125_ephy_read(void __iomem *ioaddr, int RegAddr); +u32 rtl8125_eri_read(struct rtl8125_private *tp, int addr, int len, int type); +u32 rtl8125_eri_read_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, int type, u32 base_address); +int rtl8125_eri_write_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, u32 value, int type, u32 base_address); +u16 rtl8125_ephy_read(struct rtl8125_private *tp, int RegAddr); void rtl8125_wait_txrx_fifo_empty(struct net_device *dev); void rtl8125_enable_now_is_oob(struct rtl8125_private *tp); void rtl8125_disable_now_is_oob(struct rtl8125_private *tp); @@ -1771,6 +1802,7 @@ void rtl8125_dash2_enable_rx(struct rtl8125_private *tp); void rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev); #define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 ) +#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0) #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) #define netdev_mc_count(dev) ((dev)->mc_count) diff --git a/package/lean/r8125/src/r8125_dash.h b/package/lean/r8125/src/r8125_dash.h index 61d3781743..9125eddd39 100644 --- a/package/lean/r8125/src/r8125_dash.h +++ b/package/lean/r8125/src/r8125_dash.h @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -241,12 +241,12 @@ RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2; #define CMAC_TXDESC_OFFSET 0x98 //TX: 0x98 - 0x9F /* cmac write/read MMIO register */ -#define RTL_CMAC_W8(reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg)) -#define RTL_CMAC_W16(reg, val16) writew ((val16), tp->cmac_ioaddr + (reg)) -#define RTL_CMAC_W32(reg, val32) writel ((val32), tp->cmac_ioaddr + (reg)) -#define RTL_CMAC_R8(reg) readb (tp->cmac_ioaddr + (reg)) -#define RTL_CMAC_R16(reg) readw (tp->cmac_ioaddr + (reg)) -#define RTL_CMAC_R32(reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg))) +#define RTL_CMAC_W8(tp, reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_R8(tp, reg) readb (tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_R16(tp, reg) readw (tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_R32(tp, reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg))) int rtl8125_dash_ioctl(struct net_device *dev, struct ifreq *ifr); void HandleDashInterrupt(struct net_device *dev); diff --git a/package/lean/r8125/src/r8125_n.c b/package/lean/r8125/src/r8125_n.c index 667f1aa1af..5dabc179b3 100644 --- a/package/lean/r8125/src/r8125_n.c +++ b/package/lean/r8125/src/r8125_n.c @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -57,8 +57,10 @@ #include #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) #include #endif +#endif #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) #include #endif @@ -100,18 +102,30 @@ static const struct { u32 RxConfigMask; /* Clears the bits supported by this chip */ u32 jumbo_frame_sz; } rtl_chip_info[] = { - _R("RTL8125", + _R("RTL8125A", CFG_METHOD_2, BIT_30 | BIT_22 | BIT_23 | (RX_DMA_BURST << RxCfgDMAShift), 0xff7e5880, Jumbo_Frame_9k), - _R("RTL8125", + _R("RTL8125A", CFG_METHOD_3, BIT_30 | BIT_22 | BIT_23 | (RX_DMA_BURST << RxCfgDMAShift), 0xff7e5880, Jumbo_Frame_9k), + _R("RTL8125B", + CFG_METHOD_4, + BIT_30 | BIT_22 | BIT_23 | (RX_DMA_BURST << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + + _R("RTL8125B", + CFG_METHOD_5, + BIT_30 | BIT_22 | BIT_23 | (RX_DMA_BURST << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + _R("Unknown", CFG_METHOD_DEFAULT, (RX_DMA_BURST << RxCfgDMAShift), @@ -180,9 +194,14 @@ static int s0_magic_packet = 1; #else static int s0_magic_packet = 0; #endif +#ifdef ENABLE_TX_NO_CLOSE +static int tx_no_close_enable = 1; +#else +static int tx_no_close_enable = 0; +#endif MODULE_AUTHOR("Realtek and the Linux r8125 crew "); -MODULE_DESCRIPTION("RealTek RTL8125 2.5Gigabit Ethernet driver"); +MODULE_DESCRIPTION("Realtek RTL8125 2.5Gigabit Ethernet driver"); module_param(speed_mode, uint, 0); MODULE_PARM_DESC(speed_mode, "force phy operation. Deprecated by ethtool (8)."); @@ -223,6 +242,9 @@ MODULE_PARM_DESC(hwoptimize, "Enable HW optimization function."); module_param(s0_magic_packet, int, 0); MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet."); +module_param(tx_no_close_enable, int, 0); +MODULE_PARM_DESC(tx_no_close_enable, "Enable TX No Close."); + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) module_param_named(debug, debug.msg_enable, int, 0); MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)"); @@ -257,9 +279,13 @@ static void rtl8125_hw_config(struct net_device *dev); static void rtl8125_hw_start(struct net_device *dev); static int rtl8125_close(struct net_device *dev); static void rtl8125_set_rx_mode(struct net_device *dev); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static void rtl8125_tx_timeout(struct net_device *dev, unsigned int txqueue); +#else static void rtl8125_tx_timeout(struct net_device *dev); +#endif static struct net_device_stats *rtl8125_get_stats(struct net_device *dev); -static int rtl8125_rx_interrupt(struct net_device *, struct rtl8125_private *, void __iomem *, napi_budget); +static int rtl8125_rx_interrupt(struct net_device *, struct rtl8125_private *, napi_budget); static int rtl8125_change_mtu(struct net_device *dev, int new_mtu); static void rtl8125_down(struct net_device *dev); @@ -588,6 +614,7 @@ static int proc_get_driver_variable(struct seq_file *m, void *v) seq_puts(m, "Variable\tValue\n----------\t-----\n"); seq_printf(m, "MODULENAME\t%s\n", MODULENAME); seq_printf(m, "driver version\t%s\n", RTL8125_VERSION); + seq_printf(m, "mcfg\t%d\n", tp->mcfg); seq_printf(m, "chipset\t%d\n", tp->chipset); seq_printf(m, "chipset_name\t%s\n", rtl_chip_info[tp->chipset].name); seq_printf(m, "mtu\t%d\n", dev->mtu); @@ -652,7 +679,7 @@ static int proc_get_driver_variable(struct seq_file *m, void *v) seq_printf(m, "aspm\t0x%x\n", aspm); seq_printf(m, "s5wol\t0x%x\n", s5wol); seq_printf(m, "s5_keep_curr_mac\t0x%x\n", s5_keep_curr_mac); - seq_printf(m, "eee_enable\t0x%x\n", eee_enable); + seq_printf(m, "eee_enable\t0x%x\n", tp->eee_enabled); seq_printf(m, "hwoptimize\t0x%lx\n", hwoptimize); seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num); seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet); @@ -660,6 +687,10 @@ static int proc_get_driver_variable(struct seq_file *m, void *v) seq_printf(m, "HwSuppCheckPhyDisableModeVer\t0x%x\n", tp->HwSuppCheckPhyDisableModeVer); seq_printf(m, "HwPkgDet\t0x%x\n", tp->HwPkgDet); seq_printf(m, "HwSuppGigaForceMode\t0x%x\n", tp->HwSuppGigaForceMode); + seq_printf(m, "HwSuppTxNoCloseVer\t0x%x\n", tp->HwSuppTxNoCloseVer); + seq_printf(m, "EnableTxNoClose\t0x%x\n", tp->EnableTxNoClose); + seq_printf(m, "NextHwDesCloPtr0\t0x%x\n", tp->NextHwDesCloPtr0); + seq_printf(m, "BeginHwDesCloPtr0\t0x%x\n", tp->BeginHwDesCloPtr0); seq_printf(m, "random_mac\t0x%x\n", tp->random_mac); seq_printf(m, "org_mac_addr\t%pM\n", tp->org_mac_addr); #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) @@ -676,7 +707,6 @@ static int proc_get_tally_counter(struct seq_file *m, void *v) { struct net_device *dev = m->private; struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; struct rtl8125_counters *counters; dma_addr_t paddr; u32 cmd; @@ -695,13 +725,13 @@ static int proc_get_tally_counter(struct seq_file *m, void *v) } spin_lock_irqsave(&tp->lock, flags); - RTL_W32(CounterAddrHigh, (u64)paddr >> 32); + RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32); cmd = (u64)paddr & DMA_BIT_MASK(32); - RTL_W32(CounterAddrLow, cmd); - RTL_W32(CounterAddrLow, cmd | CounterDump); + RTL_W32(tp, CounterAddrLow, cmd); + RTL_W32(tp, CounterAddrLow, cmd | CounterDump); WaitCnt = 0; - while (RTL_R32(CounterAddrLow) & CounterDump) { + while (RTL_R32(tp, CounterAddrLow) & CounterDump) { udelay(10); WaitCnt++; @@ -761,7 +791,6 @@ static int proc_get_pcie_phy(struct seq_file *m, void *v) int i, n, max = R8125_EPHY_REGS_SIZE/2; u16 word_rd; struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; unsigned long flags; seq_puts(m, "\nDump PCIE PHY\n"); @@ -772,7 +801,7 @@ static int proc_get_pcie_phy(struct seq_file *m, void *v) seq_printf(m, "\n0x%02x:\t", n); for (i = 0; i < 8 && n < max; i++, n++) { - word_rd = rtl8125_ephy_read(ioaddr, n); + word_rd = rtl8125_ephy_read(tp, n); seq_printf(m, "%04x ", word_rd); } } @@ -816,7 +845,6 @@ static int proc_get_extended_registers(struct seq_file *m, void *v) int i, n, max = R8125_ERI_REGS_SIZE; u32 dword_rd; struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; unsigned long flags; seq_puts(m, "\nDump Extended Registers\n"); @@ -827,7 +855,7 @@ static int proc_get_extended_registers(struct seq_file *m, void *v) seq_printf(m, "\n0x%02x:\t", n); for (i = 0; i < 4 && n < max; i++, n+=4) { - dword_rd = rtl8125_eri_read(ioaddr, n, 4, ERIAR_ExGMAC); + dword_rd = rtl8125_eri_read(tp, n, 4, ERIAR_ExGMAC); seq_printf(m, "%08x ", dword_rd); } } @@ -891,6 +919,7 @@ static int proc_get_driver_variable(char *page, char **start, len += snprintf(page + len, count - len, "MODULENAME\t%s\n" "driver version\t%s\n" + "mcfg\t%d\n" "chipset\t%d\n" "chipset_name\t%s\n" "mtu\t%d\n" @@ -963,6 +992,10 @@ static int proc_get_driver_variable(char *page, char **start, "HwSuppCheckPhyDisableModeVer\t0x%x\n" "HwPkgDet\t0x%x\n" "HwSuppGigaForceMode\t0x%x\n" + "HwSuppTxNoCloseVer\t0x%x\n" + "EnableTxNoClose\t0x%x\n" + "NextHwDesCloPtr0\t0x%x\n" + "BeginHwDesCloPtr0\t0x%x\n" "random_mac\t0x%x\n" "org_mac_addr\t%pM\n" #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) @@ -971,6 +1004,7 @@ static int proc_get_driver_variable(char *page, char **start, "dev_addr\t%pM\n", MODULENAME, RTL8125_VERSION, + tp->mcfg, tp->chipset, rtl_chip_info[tp->chipset].name, dev->mtu, @@ -1035,7 +1069,7 @@ static int proc_get_driver_variable(char *page, char **start, aspm, s5wol, s5_keep_curr_mac, - eee_enable, + tp->eee_enabled, hwoptimize, proc_init_num, s0_magic_packet, @@ -1043,6 +1077,10 @@ static int proc_get_driver_variable(char *page, char **start, tp->HwSuppCheckPhyDisableModeVer, tp->HwPkgDet, tp->HwSuppGigaForceMode, + tp->HwSuppTxNoCloseVer, + tp->EnableTxNoClose, + tp->NextHwDesCloPtr0, + tp->BeginHwDesCloPtr0, tp->random_mac, tp->org_mac_addr, #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) @@ -1064,7 +1102,6 @@ static int proc_get_tally_counter(char *page, char **start, { struct net_device *dev = data; struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; struct rtl8125_counters *counters; dma_addr_t paddr; u32 cmd; @@ -1086,13 +1123,13 @@ static int proc_get_tally_counter(char *page, char **start, } spin_lock_irqsave(&tp->lock, flags); - RTL_W32(CounterAddrHigh, (u64)paddr >> 32); + RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32); cmd = (u64)paddr & DMA_BIT_MASK(32); - RTL_W32(CounterAddrLow, cmd); - RTL_W32(CounterAddrLow, cmd | CounterDump); + RTL_W32(tp, CounterAddrLow, cmd); + RTL_W32(tp, CounterAddrLow, cmd | CounterDump); WaitCnt = 0; - while (RTL_R32(CounterAddrLow) & CounterDump) { + while (RTL_R32(tp, CounterAddrLow) & CounterDump) { udelay(10); WaitCnt++; @@ -1182,7 +1219,6 @@ static int proc_get_pcie_phy(char *page, char **start, int i, n, max = R8125_EPHY_REGS_SIZE/2; u16 word_rd; struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; unsigned long flags; int len = 0; @@ -1197,7 +1233,7 @@ static int proc_get_pcie_phy(char *page, char **start, n); for (i = 0; i < 8 && n < max; i++, n++) { - word_rd = rtl8125_ephy_read(ioaddr, n); + word_rd = rtl8125_ephy_read(tp, n); len += snprintf(page + len, count - len, "%04x ", word_rd); @@ -1258,7 +1294,6 @@ static int proc_get_extended_registers(char *page, char **start, int i, n, max = R8125_ERI_REGS_SIZE; u32 dword_rd; struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; unsigned long flags; int len = 0; @@ -1273,7 +1308,7 @@ static int proc_get_extended_registers(char *page, char **start, n); for (i = 0; i < 4 && n < max; i++, n+=4) { - dword_rd = rtl8125_eri_read(ioaddr, n, 4, ERIAR_ExGMAC); + dword_rd = rtl8125_eri_read(tp, n, 4, ERIAR_ExGMAC); len += snprintf(page + len, count - len, "%08x ", dword_rd); @@ -1360,6 +1395,14 @@ static int rtl8125_proc_open(struct inode *inode, struct file *file) return single_open(file, show, dev); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static const struct proc_ops rtl8125_proc_fops = { + .proc_open = rtl8125_proc_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; +#else static const struct file_operations rtl8125_proc_fops = { .open = rtl8125_proc_open, .read = seq_read, @@ -1368,6 +1411,8 @@ static const struct file_operations rtl8125_proc_fops = { }; #endif +#endif + /* * Table of proc files we need to create. */ @@ -1496,11 +1541,10 @@ static inline u16 map_phy_ocp_addr(u16 PageNum, u8 RegNum) return OcpPhyAddress; } -static void mdio_real_write_phy_ocp(struct rtl8125_private *tp, - u16 RegAddr, - u16 value) +static void mdio_real_direct_write_phy_ocp(struct rtl8125_private *tp, + u16 RegAddr, + u16 value) { - void __iomem *ioaddr = tp->mmio_addr; u32 data32; int i; @@ -1511,11 +1555,11 @@ static void mdio_real_write_phy_ocp(struct rtl8125_private *tp, data32 <<= OCPR_Addr_Reg_shift; data32 |= OCPR_Write | value; - RTL_W32(PHYOCP, data32); + RTL_W32(tp, PHYOCP, data32); for (i = 0; i < 100; i++) { udelay(1); - if (!(RTL_R32(PHYOCP) & OCPR_Flag)) + if (!(RTL_R32(tp, PHYOCP) & OCPR_Flag)) break; } } @@ -1526,9 +1570,10 @@ static void mdio_direct_write_phy_ocp(struct rtl8125_private *tp, { if (tp->rtk_enable_diag) return; - mdio_real_write_phy_ocp(tp, RegAddr, value); + mdio_real_direct_write_phy_ocp(tp, RegAddr, value); } +/* static void rtl8125_mdio_write_phy_ocp(struct rtl8125_private *tp, u16 PageNum, u32 RegAddr, @@ -1540,6 +1585,19 @@ static void rtl8125_mdio_write_phy_ocp(struct rtl8125_private *tp, mdio_direct_write_phy_ocp(tp, ocp_addr, value); } +*/ + +static void rtl8125_mdio_real_write_phy_ocp(struct rtl8125_private *tp, + u16 PageNum, + u32 RegAddr, + u32 value) +{ + u16 ocp_addr; + + ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); + + mdio_real_direct_write_phy_ocp(tp, ocp_addr, value); +} static void mdio_real_write(struct rtl8125_private *tp, u32 RegAddr, @@ -1549,7 +1607,7 @@ static void mdio_real_write(struct rtl8125_private *tp, tp->cur_page = value; return; } - rtl8125_mdio_write_phy_ocp(tp, tp->cur_page, RegAddr, value); + rtl8125_mdio_real_write_phy_ocp(tp, tp->cur_page, RegAddr, value); } void rtl8125_mdio_write(struct rtl8125_private *tp, @@ -1568,17 +1626,16 @@ void rtl8125_mdio_prot_write(struct rtl8125_private *tp, mdio_real_write(tp, RegAddr, value); } -void rtl8125_mdio_prot_write_phy_ocp(struct rtl8125_private *tp, - u32 RegAddr, - u32 value) +void rtl8125_mdio_prot_direct_write_phy_ocp(struct rtl8125_private *tp, + u32 RegAddr, + u32 value) { - mdio_real_write_phy_ocp(tp, RegAddr, value); + mdio_real_direct_write_phy_ocp(tp, RegAddr, value); } -static u32 mdio_real_read_phy_ocp(struct rtl8125_private *tp, - u16 RegAddr) +static u32 mdio_real_direct_read_phy_ocp(struct rtl8125_private *tp, + u16 RegAddr) { - void __iomem *ioaddr = tp->mmio_addr; u32 data32; int i, value = 0; @@ -1588,14 +1645,14 @@ static u32 mdio_real_read_phy_ocp(struct rtl8125_private *tp, data32 = RegAddr/2; data32 <<= OCPR_Addr_Reg_shift; - RTL_W32(PHYOCP, data32); + RTL_W32(tp, PHYOCP, data32); for (i = 0; i < 100; i++) { udelay(1); - if (RTL_R32(PHYOCP) & OCPR_Flag) + if (RTL_R32(tp, PHYOCP) & OCPR_Flag) break; } - value = RTL_R32(PHYOCP) & OCPDR_Data_Mask; + value = RTL_R32(tp, PHYOCP) & OCPDR_Data_Mask; return value; } @@ -1605,9 +1662,10 @@ static u32 mdio_direct_read_phy_ocp(struct rtl8125_private *tp, { if (tp->rtk_enable_diag) return 0xffffffff; - return mdio_real_read_phy_ocp(tp, RegAddr); + return mdio_real_direct_read_phy_ocp(tp, RegAddr); } +/* static u32 rtl8125_mdio_read_phy_ocp(struct rtl8125_private *tp, u16 PageNum, u32 RegAddr) @@ -1618,11 +1676,23 @@ static u32 rtl8125_mdio_read_phy_ocp(struct rtl8125_private *tp, return mdio_direct_read_phy_ocp(tp, ocp_addr); } +*/ + +static u32 rtl8125_mdio_real_read_phy_ocp(struct rtl8125_private *tp, + u16 PageNum, + u32 RegAddr) +{ + u16 ocp_addr; + + ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); + + return mdio_real_direct_read_phy_ocp(tp, ocp_addr); +} static u32 mdio_real_read(struct rtl8125_private *tp, u32 RegAddr) { - return rtl8125_mdio_read_phy_ocp(tp, tp->cur_page, RegAddr); + return rtl8125_mdio_real_read_phy_ocp(tp, tp->cur_page, RegAddr); } u32 rtl8125_mdio_read(struct rtl8125_private *tp, @@ -1639,10 +1709,10 @@ u32 rtl8125_mdio_prot_read(struct rtl8125_private *tp, return mdio_real_read(tp, RegAddr); } -u32 rtl8125_mdio_prot_read_phy_ocp(struct rtl8125_private *tp, - u32 RegAddr) +u32 rtl8125_mdio_prot_direct_read_phy_ocp(struct rtl8125_private *tp, + u32 RegAddr) { - return mdio_real_read_phy_ocp(tp, RegAddr); + return mdio_real_direct_read_phy_ocp(tp, RegAddr); } static void ClearAndSetEthPhyBit(struct rtl8125_private *tp, u8 addr, u16 clearmask, u16 setmask) @@ -1703,7 +1773,6 @@ void SetEthPhyOcpBit(struct rtl8125_private *tp, u16 addr, u16 mask) void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value) { - void __iomem *ioaddr = tp->mmio_addr; u32 data32; #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) @@ -1715,12 +1784,11 @@ void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value) data32 += value; data32 |= OCPR_Write; - RTL_W32(MACOCP, data32); + RTL_W32(tp, MACOCP, data32); } u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr) { - void __iomem *ioaddr = tp->mmio_addr; u32 data32; u16 data16 = 0; @@ -1731,8 +1799,8 @@ u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr) data32 = reg_addr/2; data32 <<= OCPR_Addr_Reg_shift; - RTL_W32(MACOCP, data32); - data16 = (u16)RTL_R32(MACOCP); + RTL_W32(tp, MACOCP, data32); + data16 = (u16)RTL_R32(tp, MACOCP); return data16; } @@ -1783,9 +1851,7 @@ SetMcuAccessRegBit( u32 rtl8125_ocp_read_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, const u32 base_address) { - void __iomem *ioaddr = tp->mmio_addr; - - return rtl8125_eri_read_with_oob_base_address(ioaddr, addr, len, ERIAR_OOB, base_address); + return rtl8125_eri_read_with_oob_base_address(tp, addr, len, ERIAR_OOB, base_address); } u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len) @@ -1802,9 +1868,7 @@ u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len) u32 rtl8125_ocp_write_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 value, const u32 base_address) { - void __iomem *ioaddr = tp->mmio_addr; - - return rtl8125_eri_write_with_oob_base_address(ioaddr, addr, len, value, ERIAR_OOB, base_address); + return rtl8125_eri_write_with_oob_base_address(tp, addr, len, value, ERIAR_OOB, base_address); } void rtl8125_ocp_write(struct rtl8125_private *tp, u16 addr, u8 len, u32 value) @@ -1828,6 +1892,8 @@ void rtl8125_oob_mutex_lock(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: default: ocp_reg_mutex_oob = 0x110; ocp_reg_mutex_ib = 0x114; @@ -1875,6 +1941,8 @@ void rtl8125_oob_mutex_unlock(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: default: ocp_reg_mutex_oob = 0x110; ocp_reg_mutex_ib = 0x114; @@ -1888,9 +1956,7 @@ void rtl8125_oob_mutex_unlock(struct rtl8125_private *tp) void rtl8125_oob_notify(struct rtl8125_private *tp, u8 cmd) { - void __iomem *ioaddr = tp->mmio_addr; - - rtl8125_eri_write(ioaddr, 0xE8, 1, cmd, ERIAR_ExGMAC); + rtl8125_eri_write(tp, 0xE8, 1, cmd, ERIAR_ExGMAC); rtl8125_ocp_write(tp, 0x30, 1, 0x01); } @@ -1914,12 +1980,12 @@ void rtl8125_dash2_disable_tx(struct rtl8125_private *tp) u8 TmpUchar; //Disable oob Tx - RTL_CMAC_W8(CMAC_IBCR2, RTL_CMAC_R8(CMAC_IBCR2) & ~( BIT_0 )); + RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) & ~( BIT_0 )); WaitCnt = 0; //wait oob tx disable do { - TmpUchar = RTL_CMAC_R8(CMAC_IBISR0); + TmpUchar = RTL_CMAC_R8(tp, CMAC_IBISR0); if ( TmpUchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE ) { break; @@ -1930,7 +1996,7 @@ void rtl8125_dash2_disable_tx(struct rtl8125_private *tp) } while(WaitCnt < 2000); //Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE - RTL_CMAC_W8(CMAC_IBISR0, RTL_CMAC_R8(CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE); + RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE); } } @@ -1939,7 +2005,7 @@ void rtl8125_dash2_enable_tx(struct rtl8125_private *tp) if (!tp->DASH) return; if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { - RTL_CMAC_W8(CMAC_IBCR2, RTL_CMAC_R8(CMAC_IBCR2) | BIT_0); + RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) | BIT_0); } } @@ -1948,7 +2014,7 @@ void rtl8125_dash2_disable_rx(struct rtl8125_private *tp) if (!tp->DASH) return; if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { - RTL_CMAC_W8(CMAC_IBCR0, RTL_CMAC_R8(CMAC_IBCR0) & ~( BIT_0 )); + RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) & ~( BIT_0 )); } } @@ -1957,7 +2023,7 @@ void rtl8125_dash2_enable_rx(struct rtl8125_private *tp) if (!tp->DASH) return; if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { - RTL_CMAC_W8(CMAC_IBCR0, RTL_CMAC_R8(CMAC_IBCR0) | BIT_0); + RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) | BIT_0); } } @@ -2018,11 +2084,11 @@ static void rtl8125_driver_stop(struct rtl8125_private *tp) } } -void rtl8125_ephy_write(void __iomem *ioaddr, int RegAddr, int value) +void rtl8125_ephy_write(struct rtl8125_private *tp, int RegAddr, int value) { int i; - RTL_W32(EPHYAR, + RTL_W32(tp, EPHYAR, EPHYAR_Write | (RegAddr & EPHYAR_Reg_Mask_v2) << EPHYAR_Reg_shift | (value & EPHYAR_Data_Mask)); @@ -2031,27 +2097,27 @@ void rtl8125_ephy_write(void __iomem *ioaddr, int RegAddr, int value) udelay(100); /* Check if the RTL8125 has completed EPHY write */ - if (!(RTL_R32(EPHYAR) & EPHYAR_Flag)) + if (!(RTL_R32(tp, EPHYAR) & EPHYAR_Flag)) break; } udelay(20); } -u16 rtl8125_ephy_read(void __iomem *ioaddr, int RegAddr) +u16 rtl8125_ephy_read(struct rtl8125_private *tp, int RegAddr) { int i; u16 value = 0xffff; - RTL_W32(EPHYAR, + RTL_W32(tp, EPHYAR, EPHYAR_Read | (RegAddr & EPHYAR_Reg_Mask_v2) << EPHYAR_Reg_shift); for (i = 0; i < 10; i++) { udelay(100); /* Check if the RTL8125 has completed EPHY read */ - if (RTL_R32(EPHYAR) & EPHYAR_Flag) { - value = (u16) (RTL_R32(EPHYAR) & EPHYAR_Data_Mask); + if (RTL_R32(tp, EPHYAR) & EPHYAR_Flag) { + value = (u16) (RTL_R32(tp, EPHYAR) & EPHYAR_Data_Mask); break; } } @@ -2061,16 +2127,14 @@ u16 rtl8125_ephy_read(void __iomem *ioaddr, int RegAddr) return value; } -/* static void ClearAndSetPCIePhyBit(struct rtl8125_private *tp, u8 addr, u16 clearmask, u16 setmask) { - void __iomem *ioaddr = tp->mmio_addr; u16 EphyValue; - EphyValue = rtl8125_ephy_read( ioaddr, addr ); + EphyValue = rtl8125_ephy_read(tp, addr); EphyValue &= ~clearmask; EphyValue |= setmask; - rtl8125_ephy_write( ioaddr, addr, EphyValue); + rtl8125_ephy_write(tp, addr, EphyValue); } static void ClearPCIePhyBit(struct rtl8125_private *tp, u8 addr, u16 mask) @@ -2090,14 +2154,12 @@ static void SetPCIePhyBit( struct rtl8125_private *tp, u8 addr, u16 mask) mask ); } -*/ static u32 rtl8125_csi_other_fun_read(struct rtl8125_private *tp, u8 multi_fun_sel_bit, u32 addr) { - void __iomem *ioaddr = tp->mmio_addr; u32 cmd; int i; u32 value = 0; @@ -2112,14 +2174,14 @@ rtl8125_csi_other_fun_read(struct rtl8125_private *tp, cmd |= multi_fun_sel_bit << 16; - RTL_W32(CSIAR, cmd); + RTL_W32(tp, CSIAR, cmd); for (i = 0; i < 10; i++) { udelay(100); /* Check if the RTL8125 has completed CSI read */ - if (RTL_R32(CSIAR) & CSIAR_Flag) { - value = (u32)RTL_R32(CSIDR); + if (RTL_R32(tp, CSIAR) & CSIAR_Flag) { + value = (u32)RTL_R32(tp, CSIDR); break; } } @@ -2135,11 +2197,10 @@ rtl8125_csi_other_fun_write(struct rtl8125_private *tp, u32 addr, u32 value) { - void __iomem *ioaddr = tp->mmio_addr; u32 cmd; int i; - RTL_W32(CSIDR, value); + RTL_W32(tp, CSIDR, value); cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask); if (tp->mcfg == CFG_METHOD_DEFAULT) multi_fun_sel_bit = 0; @@ -2149,13 +2210,13 @@ rtl8125_csi_other_fun_write(struct rtl8125_private *tp, cmd |= multi_fun_sel_bit << 16; - RTL_W32(CSIAR, cmd); + RTL_W32(tp, CSIAR, cmd); for (i = 0; i < 10; i++) { udelay(100); /* Check if the RTL8125 has completed CSI write */ - if (!(RTL_R32(CSIAR) & CSIAR_Flag)) + if (!(RTL_R32(tp, CSIAR) & CSIAR_Flag)) break; } @@ -2168,10 +2229,7 @@ rtl8125_csi_read(struct rtl8125_private *tp, { u8 multi_fun_sel_bit; - if (tp->mcfg == CFG_METHOD_DEFAULT) - multi_fun_sel_bit = 0; - else - multi_fun_sel_bit = 1; + multi_fun_sel_bit = 0; return rtl8125_csi_other_fun_read(tp, multi_fun_sel_bit, addr); } @@ -2183,10 +2241,7 @@ rtl8125_csi_write(struct rtl8125_private *tp, { u8 multi_fun_sel_bit; - if (tp->mcfg == CFG_METHOD_DEFAULT) - multi_fun_sel_bit = 0; - else - multi_fun_sel_bit = 1; + multi_fun_sel_bit = 0; rtl8125_csi_other_fun_write(tp, multi_fun_sel_bit, addr, value); } @@ -2243,7 +2298,7 @@ rtl8125_csi_fun0_write_byte(struct rtl8125_private *tp, udelay(20); } -u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int len, int type, const u32 base_address) +u32 rtl8125_eri_read_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, int type, const u32 base_address) { int i, val_shift, shift = 0; u32 value1 = 0, value2 = 0, mask; @@ -2270,13 +2325,13 @@ u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int l eri_cmd |= (tmp << 20) & 0x00F00000; } - RTL_W32(ERIAR, eri_cmd); + RTL_W32(tp, ERIAR, eri_cmd); for (i = 0; i < 10; i++) { udelay(100); /* Check if the RTL8125 has completed ERI read */ - if (RTL_R32(ERIAR) & ERIAR_Flag) + if (RTL_R32(tp, ERIAR) & ERIAR_Flag) break; } @@ -2285,7 +2340,7 @@ u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int l else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; - value1 = RTL_R32(ERIDR) & mask; + value1 = RTL_R32(tp, ERIDR) & mask; value2 |= (value1 >> val_shift * 8) << shift * 8; if (len <= 4 - val_shift) { @@ -2302,12 +2357,12 @@ u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int l return value2; } -u32 rtl8125_eri_read(void __iomem *ioaddr, int addr, int len, int type) +u32 rtl8125_eri_read(struct rtl8125_private *tp, int addr, int len, int type) { - return rtl8125_eri_read_with_oob_base_address(ioaddr, addr, len, type, 0); + return rtl8125_eri_read_with_oob_base_address(tp, addr, len, type, 0); } -int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int len, u32 value, int type, const u32 base_address) +int rtl8125_eri_write_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, u32 value, int type, const u32 base_address) { int i, val_shift, shift = 0; u32 value1 = 0, mask; @@ -2326,10 +2381,10 @@ int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; - value1 = rtl8125_eri_read_with_oob_base_address(ioaddr, addr, 4, type, base_address) & ~mask; + value1 = rtl8125_eri_read_with_oob_base_address(tp, addr, 4, type, base_address) & ~mask; value1 |= ((value << val_shift * 8) >> shift * 8); - RTL_W32(ERIDR, value1); + RTL_W32(tp, ERIDR, value1); eri_cmd = ERIAR_Write | transformed_base_address | @@ -2344,13 +2399,13 @@ int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int eri_cmd |= (tmp << 20) & 0x00F00000; } - RTL_W32(ERIAR, eri_cmd); + RTL_W32(tp, ERIAR, eri_cmd); for (i = 0; i < 10; i++) { udelay(100); /* Check if the RTL8125 has completed ERI write */ - if (!(RTL_R32(ERIAR) & ERIAR_Flag)) + if (!(RTL_R32(tp, ERIAR) & ERIAR_Flag)) break; } @@ -2368,21 +2423,22 @@ int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int return 0; } -int rtl8125_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type) +int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type) { - return rtl8125_eri_write_with_oob_base_address(ioaddr, addr, len, value, type, NO_BASE_ADDRESS); + return rtl8125_eri_write_with_oob_base_address(tp, addr, len, value, type, NO_BASE_ADDRESS); } static void rtl8125_enable_rxdvgate(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(0xF2, RTL_R8(0xF2) | BIT_3); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3); mdelay(2); break; } @@ -2392,12 +2448,13 @@ static void rtl8125_disable_rxdvgate(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_3); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3); mdelay(2); break; } @@ -2426,12 +2483,11 @@ static u8 rtl8125_is_phy_disable_mode_enabled(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u8 phy_disable_mode_enabled = FALSE; switch (tp->HwSuppCheckPhyDisableModeVer) { case 3: - if (RTL_R8(0xF2) & BIT_5) + if (RTL_R8(tp, 0xF2) & BIT_5) phy_disable_mode_enabled = TRUE; break; } @@ -2460,11 +2516,10 @@ static void rtl8125_enable_phy_disable_mode(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->HwSuppCheckPhyDisableModeVer) { case 3: - RTL_W8(0xF2, RTL_R8(0xF2) | BIT_5); + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5); break; } @@ -2475,11 +2530,10 @@ static void rtl8125_disable_phy_disable_mode(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->HwSuppCheckPhyDisableModeVer) { case 3: - RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_5); + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5); break; } @@ -2492,15 +2546,28 @@ void rtl8125_wait_txrx_fifo_empty(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; int i; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - for (i = 0; i < 10; i++) { - udelay(100); - if ((RTL_R8(MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty)) + case CFG_METHOD_4: + case CFG_METHOD_5: + for (i = 0; i < 3000; i++) { + udelay(50); + if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty)) + break; + + } + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_4: + case CFG_METHOD_5: + for (i = 0; i < 3000; i++) { + udelay(50); + if ((RTL_R16(tp, IntrMitigate) & (BIT_0 | BIT_1 | BIT_8)) == (BIT_0 | BIT_1 | BIT_8)) break; } @@ -2511,93 +2578,93 @@ rtl8125_wait_txrx_fifo_empty(struct net_device *dev) #ifdef ENABLE_DASH_SUPPORT inline void -rtl8125_enable_dash2_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr) +rtl8125_enable_dash2_interrupt(struct rtl8125_private *tp) { if (!tp->DASH) return; if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { - RTL_CMAC_W8(CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE )); + RTL_CMAC_W8(tp, CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE )); } } static inline void -rtl8125_disable_dash2_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr) +rtl8125_disable_dash2_interrupt(struct rtl8125_private *tp) { if (!tp->DASH) return; if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { - RTL_CMAC_W8(CMAC_IBIMR0, 0); + RTL_CMAC_W8(tp, CMAC_IBIMR0, 0); } } #endif static inline void -rtl8125_enable_hw_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr) +rtl8125_enable_hw_interrupt(struct rtl8125_private *tp) { - RTL_W32(IMR0_8125, tp->intr_mask); + RTL_W32(tp, IMR0_8125, tp->intr_mask); #ifdef ENABLE_DASH_SUPPORT if (tp->DASH) - rtl8125_enable_dash2_interrupt(tp, ioaddr); + rtl8125_enable_dash2_interrupt(tp); #endif } static inline void -rtl8125_disable_hw_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr) +rtl8125_disable_hw_interrupt(struct rtl8125_private *tp) { - RTL_W32(IMR0_8125, 0x0000); + RTL_W32(tp, IMR0_8125, 0x0000); #ifdef ENABLE_DASH_SUPPORT if (tp->DASH) - rtl8125_disable_dash2_interrupt(tp, ioaddr); + rtl8125_disable_dash2_interrupt(tp); #endif } static inline void -rtl8125_switch_to_hw_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr) +rtl8125_switch_to_hw_interrupt(struct rtl8125_private *tp) { - RTL_W32(TIMER_INT0_8125, 0x0000); + RTL_W32(tp, TIMER_INT0_8125, 0x0000); - rtl8125_enable_hw_interrupt(tp, ioaddr); + rtl8125_enable_hw_interrupt(tp); } static inline void -rtl8125_switch_to_timer_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr) +rtl8125_switch_to_timer_interrupt(struct rtl8125_private *tp) { if (tp->use_timer_interrrupt) { - RTL_W32(TIMER_INT0_8125, timer_count); - RTL_W32(TCTR0_8125, timer_count); - RTL_W32(IMR0_8125, tp->timer_intr_mask); + RTL_W32(tp, TIMER_INT0_8125, timer_count); + RTL_W32(tp, TCTR0_8125, timer_count); + RTL_W32(tp, IMR0_8125, tp->timer_intr_mask); #ifdef ENABLE_DASH_SUPPORT if (tp->DASH) - rtl8125_enable_dash2_interrupt(tp, ioaddr); + rtl8125_enable_dash2_interrupt(tp); #endif } else { - rtl8125_switch_to_hw_interrupt(tp, ioaddr); + rtl8125_switch_to_hw_interrupt(tp); } } static void -rtl8125_irq_mask_and_ack(struct rtl8125_private *tp, void __iomem *ioaddr) +rtl8125_irq_mask_and_ack(struct rtl8125_private *tp) { - rtl8125_disable_hw_interrupt(tp, ioaddr); + rtl8125_disable_hw_interrupt(tp); #ifdef ENABLE_DASH_SUPPORT if (tp->DASH) { if (tp->dash_printer_enabled) { - RTL_W16(IntrStatus, RTL_R16(IntrStatus) & + RTL_W16(tp, IntrStatus, RTL_R16(tp, IntrStatus) & ~(ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET)); } else { if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { - RTL_CMAC_W8(CMAC_IBISR0, RTL_CMAC_R8(CMAC_IBISR0)); + RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0)); } } } else { - RTL_W16(IntrStatus, RTL_R16(IntrStatus)); + RTL_W16(tp, IntrStatus, RTL_R16(tp, IntrStatus)); } #else - RTL_W16(IntrStatus, RTL_R16(IntrStatus)); + RTL_W16(tp, IntrStatus, RTL_R16(tp, IntrStatus)); #endif } @@ -2605,10 +2672,9 @@ static void rtl8125_nic_reset(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; int i; - RTL_W32(RxConfig, (RX_DMA_BURST << RxCfgDMAShift)); + RTL_W32(tp, RxConfig, (RX_DMA_BURST << RxCfgDMAShift)); rtl8125_enable_rxdvgate(dev); @@ -2617,18 +2683,20 @@ rtl8125_nic_reset(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: default: mdelay(2); break; } /* Soft reset the chip. */ - RTL_W8(ChipCmd, CmdReset); + RTL_W8(tp, ChipCmd, CmdReset); /* Check that the chip has finished the reset. */ for (i = 100; i > 0; i--) { udelay(100); - if ((RTL_R8(ChipCmd) & CmdReset) == 0) + if ((RTL_R8(tp, ChipCmd) & CmdReset) == 0) break; } } @@ -2637,15 +2705,16 @@ static void rtl8125_hw_clear_timer_int(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W32(TIMER_INT0_8125, 0x0000); - RTL_W32(TIMER_INT1_8125, 0x0000); - RTL_W32(TIMER_INT2_8125, 0x0000); - RTL_W32(TIMER_INT3_8125, 0x0000); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W32(tp, TIMER_INT0_8125, 0x0000); + RTL_W32(tp, TIMER_INT1_8125, 0x0000); + RTL_W32(tp, TIMER_INT2_8125, 0x0000); + RTL_W32(tp, TIMER_INT3_8125, 0x0000); break; } } @@ -2654,15 +2723,16 @@ static void rtl8125_hw_clear_int_miti(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; int i; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: //IntMITI_0-IntMITI_31 for (i=0xA00; i<0xB00; i+=4) { - RTL_W32(i, 0x0000); + RTL_W32(tp, i, 0x0000); } break; } @@ -2672,10 +2742,9 @@ static void rtl8125_hw_reset(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; /* Disable interrupts */ - rtl8125_irq_mask_and_ack(tp, ioaddr); + rtl8125_irq_mask_and_ack(tp); rtl8125_hw_clear_timer_int(dev); @@ -2698,10 +2767,9 @@ static unsigned int rtl8125_xmii_link_ok(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; unsigned int retval; - retval = (RTL_R16(PHYstatus) & LinkStatus) ? 1 : 0; + retval = (RTL_R16(tp, PHYstatus) & LinkStatus) ? 1 : 0; return retval; } @@ -2745,6 +2813,8 @@ void rtl8125_init_ring_indexes(struct rtl8125_private *tp) tp->dirty_rx = 0; tp->cur_tx = 0; tp->cur_rx = 0; + tp->NextHwDesCloPtr0 = 0; + tp->BeginHwDesCloPtr0 = 0; } static void @@ -2753,6 +2823,8 @@ rtl8125_issue_offset_99_event(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xE09A, rtl8125_mac_ocp_read(tp, 0xE09A) | BIT_0); break; } @@ -2762,15 +2834,13 @@ rtl8125_issue_offset_99_event(struct rtl8125_private *tp) static void NICChkTypeEnableDashInterrupt(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - if (tp->DASH) { // // even disconnected, enable 3 dash interrupt mask bits for in-band/out-band communication // if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { - rtl8125_enable_dash2_interrupt(tp, ioaddr); - RTL_W16(IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET)); + rtl8125_enable_dash2_interrupt(tp); + RTL_W16(tp, IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET)); } } } @@ -2784,6 +2854,8 @@ static int rtl8125_enable_eee_plus(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xE080, rtl8125_mac_ocp_read(tp, 0xE080)|BIT_1); break; @@ -2804,6 +2876,8 @@ static int rtl8125_disable_eee_plus(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xE080, rtl8125_mac_ocp_read(tp, 0xE080)&~BIT_1); break; @@ -2820,7 +2894,6 @@ static void rtl8125_check_link_status(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; int link_status_on; link_status_on = tp->link_ok(dev); @@ -2831,14 +2904,17 @@ rtl8125_check_link_status(struct net_device *dev) if ((tp->mcfg == CFG_METHOD_2) && netif_running(dev)) { - if (RTL_R16(PHYstatus)&FullDup) - RTL_W32(TxConfig, (RTL_R32(TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19); + if (RTL_R16(tp, PHYstatus)&FullDup) + RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19); else - RTL_W32(TxConfig, (RTL_R32(TxConfig) | BIT_25) & ~(BIT_19 | BIT_24)); + RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_25) & ~(BIT_19 | BIT_24)); } - if ((tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) && - (RTL_R8(PHYstatus) & _10bps)) + if ((tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) && + (RTL_R8(tp, PHYstatus) & _10bps)) rtl8125_enable_eee_plus(tp); rtl8125_hw_start(dev); @@ -2858,7 +2934,10 @@ rtl8125_check_link_status(struct net_device *dev) tp->phy_reg_anlpar = 0; - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + if (tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) rtl8125_disable_eee_plus(tp); netif_stop_queue(dev); @@ -2924,7 +3003,10 @@ rtl8125_enable_ocp_phy_power_saving(struct net_device *dev) struct rtl8125_private *tp = netdev_priv(dev); u16 val; - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) { + if (tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { val = mdio_direct_read_phy_ocp(tp, 0xC416); if (val != 0x0050) { rtl8125_set_phy_mcu_patch_request(tp); @@ -2942,7 +3024,10 @@ rtl8125_disable_ocp_phy_power_saving(struct net_device *dev) struct rtl8125_private *tp = netdev_priv(dev); u16 val; - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) { + if (tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { val = mdio_direct_read_phy_ocp(tp, 0xC416); if (val != 0x0500) { rtl8125_set_phy_mcu_patch_request(tp); @@ -2957,12 +3042,11 @@ static void rtl8125_wait_ll_share_fifo_ready(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; int i; for (i = 0; i < 10; i++) { udelay(100); - if (RTL_R16(0xD2) & BIT_9) + if (RTL_R16(tp, 0xD2) & BIT_9) break; } } @@ -2973,6 +3057,8 @@ rtl8125_disable_pci_offset_99(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xE032, rtl8125_mac_ocp_read(tp, 0xE032) & ~(BIT_0 | BIT_1)); break; } @@ -2980,6 +3066,8 @@ rtl8125_disable_pci_offset_99(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_csi_fun0_write_byte(tp, 0x99, 0x00); break; } @@ -2993,6 +3081,8 @@ rtl8125_enable_pci_offset_99(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99); break; } @@ -3000,6 +3090,8 @@ rtl8125_enable_pci_offset_99(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032); csi_tmp &= ~(BIT_0 | BIT_1); if (!(tp->org_pci_offset_99 & (BIT_5 | BIT_6))) @@ -3036,6 +3128,31 @@ rtl8125_init_pci_offset_99(struct rtl8125_private *tp) csi_tmp |= (BIT_0); rtl8125_mac_ocp_write(tp, 0xE0A2, csi_tmp); break; + case CFG_METHOD_4: + case CFG_METHOD_5: + rtl8125_mac_ocp_write(tp, 0xCDD0, 0x9003); + csi_tmp = rtl8125_mac_ocp_read(tp, 0xE034); + csi_tmp |= (BIT_15 | BIT_14); + rtl8125_mac_ocp_write(tp, 0xE034, csi_tmp); + rtl8125_mac_ocp_write(tp, 0xCDD2, 0x889C); + rtl8125_mac_ocp_write(tp, 0xCDD8, 0x9003); + rtl8125_mac_ocp_write(tp, 0xCDD4, 0x8C30); + rtl8125_mac_ocp_write(tp, 0xCDDA, 0x9003); + rtl8125_mac_ocp_write(tp, 0xCDD6, 0x9003); + rtl8125_mac_ocp_write(tp, 0xCDDC, 0x9003); + rtl8125_mac_ocp_write(tp, 0xCDE8, 0x883E); + rtl8125_mac_ocp_write(tp, 0xCDEA, 0x9003); + rtl8125_mac_ocp_write(tp, 0xCDEC, 0x889C); + rtl8125_mac_ocp_write(tp, 0xCDEE, 0x9003); + rtl8125_mac_ocp_write(tp, 0xCDF0, 0x8C09); + rtl8125_mac_ocp_write(tp, 0xCDF2, 0x9003); + csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032); + csi_tmp |= (BIT_14); + rtl8125_mac_ocp_write(tp, 0xE032, csi_tmp); + csi_tmp = rtl8125_mac_ocp_read(tp, 0xE0A2); + csi_tmp |= (BIT_0); + rtl8125_mac_ocp_write(tp, 0xE0A2, csi_tmp); + break; } rtl8125_enable_pci_offset_99(tp); @@ -3049,7 +3166,8 @@ rtl8125_disable_pci_offset_180(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032); + case CFG_METHOD_4: + case CFG_METHOD_5: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE092); csi_tmp &= 0xFF00; rtl8125_mac_ocp_write(tp, 0xE092, csi_tmp); @@ -3065,6 +3183,8 @@ rtl8125_enable_pci_offset_180(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE094); csi_tmp &= 0x00FF; rtl8125_mac_ocp_write(tp, 0xE094, csi_tmp); @@ -3074,15 +3194,14 @@ rtl8125_enable_pci_offset_180(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032); + case CFG_METHOD_4: + case CFG_METHOD_5: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE092); csi_tmp &= 0xFF00; csi_tmp |= BIT_2; rtl8125_mac_ocp_write(tp, 0xE092, csi_tmp); break; } - - rtl8125_mac_ocp_write(tp, 0xE094, 0x0000); } static void @@ -3102,6 +3221,8 @@ rtl8125_set_pci_99_180_exit_driver_para(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_issue_offset_99_event(tp); break; } @@ -3109,12 +3230,16 @@ rtl8125_set_pci_99_180_exit_driver_para(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_disable_pci_offset_99(tp); break; } switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_disable_pci_offset_180(tp); break; } @@ -3123,34 +3248,31 @@ rtl8125_set_pci_99_180_exit_driver_para(struct net_device *dev) static void rtl8125_enable_cfg9346_write(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - - RTL_W8(Cfg9346, RTL_R8(Cfg9346) | Cfg9346_Unlock); + RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock); } static void rtl8125_disable_cfg9346_write(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - - RTL_W8(Cfg9346, RTL_R8(Cfg9346) & ~Cfg9346_Unlock); + RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock); } static void rtl8125_hw_d3_para(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - RTL_W16(RxMaxSize, RX_BUF_SIZE); + RTL_W16(tp, RxMaxSize, RX_BUF_SIZE); switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); rtl8125_enable_cfg9346_write(tp); - RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); - RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); rtl8125_disable_cfg9346_write(tp); break; } @@ -3162,6 +3284,8 @@ rtl8125_hw_d3_para(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xEA18, 0x0064); break; } @@ -3169,7 +3293,10 @@ rtl8125_hw_d3_para(struct net_device *dev) rtl8125_set_pci_99_180_exit_driver_para(dev); /*disable ocp phy power saving*/ - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + if (tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) rtl8125_disable_ocp_phy_power_saving(dev); rtl8125_disable_rxdvgate(dev); @@ -3204,7 +3331,6 @@ static void rtl8125_get_hw_wol(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u8 options; u32 csi_tmp; unsigned long flags; @@ -3212,11 +3338,11 @@ rtl8125_get_hw_wol(struct net_device *dev) spin_lock_irqsave(&tp->lock, flags); tp->wol_opts = 0; - options = RTL_R8(Config1); + options = RTL_R8(tp, Config1); if (!(options & PMEnable)) goto out_unlock; - options = RTL_R8(Config3); + options = RTL_R8(tp, Config3); if (options & LinkUp) tp->wol_opts |= WAKE_PHY; @@ -3228,7 +3354,7 @@ rtl8125_get_hw_wol(struct net_device *dev) break; } - options = RTL_R8(Config5); + options = RTL_R8(tp, Config5); if (options & UWF) tp->wol_opts |= WAKE_UCAST; if (options & BWF) @@ -3246,7 +3372,6 @@ static void rtl8125_set_hw_wol(struct net_device *dev, u32 wolopts) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; int i,tmp; static struct { u32 opt; @@ -3275,10 +3400,10 @@ rtl8125_set_hw_wol(struct net_device *dev, u32 wolopts) rtl8125_enable_cfg9346_write(tp); for (i = 0; i < tmp; i++) { - u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask; + u8 options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask; if (wolopts & cfg[i].opt) options |= cfg[i].mask; - RTL_W8(cfg[i].reg, options); + RTL_W8(tp, cfg[i].reg, options); } rtl8125_disable_cfg9346_write(tp); @@ -3327,7 +3452,6 @@ static void rtl8125_powerdown_pll(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) { int auto_nego; @@ -3337,9 +3461,11 @@ rtl8125_powerdown_pll(struct net_device *dev) rtl8125_set_hw_wol(dev, tp->wol_opts); if (tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) { + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { rtl8125_enable_cfg9346_write(tp); - RTL_W8(Config2, RTL_R8(Config2) | PMSTS_En); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En); rtl8125_disable_cfg9346_write(tp); } @@ -3369,7 +3495,9 @@ rtl8125_powerdown_pll(struct net_device *dev) rtl8125_mdio_write(tp, MII_ADVERTISE, auto_nego); rtl8125_mdio_write(tp, MII_CTRL1000, giga_ctrl); if (tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) { + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { int ctrl_2500; ctrl_2500 = mdio_direct_read_phy_ocp(tp, 0xA5D4); @@ -3378,7 +3506,7 @@ rtl8125_powerdown_pll(struct net_device *dev) } rtl8125_phy_restart_nway(dev); - RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys); + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys); return; } @@ -3391,14 +3519,18 @@ rtl8125_powerdown_pll(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(PMCH, RTL_R8(PMCH) & ~BIT_7); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7); break; } switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_6); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6); break; } } @@ -3406,12 +3538,13 @@ rtl8125_powerdown_pll(struct net_device *dev) static void rtl8125_powerup_pll(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(PMCH, RTL_R8(PMCH) | BIT_7 | BIT_6); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6); break; } @@ -3424,7 +3557,6 @@ rtl8125_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u8 options; unsigned long flags; @@ -3439,7 +3571,7 @@ rtl8125_get_wol(struct net_device *dev, spin_lock_irqsave(&tp->lock, flags); - options = RTL_R8(Config1); + options = RTL_R8(tp, Config1); if (!(options & PMEnable)) goto out_unlock; @@ -3705,7 +3837,6 @@ rtl8125_set_rx_csum(struct net_device *dev, u32 data) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; unsigned long flags; if (tp->mcfg == CFG_METHOD_DEFAULT) @@ -3718,7 +3849,7 @@ rtl8125_set_rx_csum(struct net_device *dev, else tp->cp_cmd &= ~RxChkSum; - RTL_W16(CPlusCmd, tp->cp_cmd); + RTL_W16(tp, CPlusCmd, tp->cp_cmd); spin_unlock_irqrestore(&tp->lock, flags); @@ -3756,19 +3887,20 @@ rtl8125_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; unsigned long flags; spin_lock_irqsave(&tp->lock, flags); tp->vlgrp = grp; if (tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) { + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { if (tp->vlgrp) { tp->rtl8125_rx_config |= (BIT_22 | BIT_23); - RTL_W32(RxConfig, RTL_R32(RxConfig) | (BIT_22 | BIT_23)) + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | (BIT_22 | BIT_23)) } else { tp->rtl8125_rx_config &= ~(BIT_22 | BIT_23); - RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(BIT_22 | BIT_23)) + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(BIT_22 | BIT_23)) } } spin_unlock_irqrestore(&tp->lock, flags); @@ -3855,6 +3987,9 @@ static netdev_features_t rtl8125_fix_features(struct net_device *dev, features &= ~NETIF_F_ALL_TSO; features &= ~NETIF_F_ALL_CSUM; } +#ifndef CONFIG_R8125_VLAN + features &= ~NETIF_F_ALL_CSUM; +#endif spin_unlock_irqrestore(&tp->lock, flags); return features; @@ -3864,10 +3999,9 @@ static int rtl8125_hw_set_features(struct net_device *dev, netdev_features_t features) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u32 rx_config; - rx_config = RTL_R32(RxConfig); + rx_config = RTL_R32(tp, RxConfig); if (features & NETIF_F_RXALL) rx_config |= (AcceptErr | AcceptRunt); else @@ -3878,15 +4012,15 @@ static int rtl8125_hw_set_features(struct net_device *dev, else rx_config &= ~(BIT_22 | BIT_23); - RTL_W32(RxConfig, rx_config); + RTL_W32(tp, RxConfig, rx_config); if (features & NETIF_F_RXCSUM) tp->cp_cmd |= RxChkSum; else tp->cp_cmd &= ~RxChkSum; - RTL_W16(CPlusCmd, tp->cp_cmd); - RTL_R16(CPlusCmd); + RTL_W16(tp, CPlusCmd, tp->cp_cmd); + RTL_R16(tp, CPlusCmd); return 0; } @@ -3918,7 +4052,6 @@ static void rtl8125_gset_xmii(struct net_device *dev, ) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u16 status; u8 autoneg, duplex; u32 speed = 0; @@ -3964,7 +4097,7 @@ static void rtl8125_gset_xmii(struct net_device *dev, autoneg = AUTONEG_DISABLE; } - status = RTL_R16(PHYstatus); + status = RTL_R16(tp, PHYstatus); if (status & LinkStatus) { /*link on*/ @@ -4054,7 +4187,7 @@ static void rtl8125_get_regs(struct net_device *dev, struct ethtool_regs *regs, data = (u8*)p + 256 * 2; for (i = 0; i < R8125_EPHY_REGS_SIZE/2; i++) { - *(u16*)data = rtl8125_ephy_read(ioaddr, i); + *(u16*)data = rtl8125_ephy_read(tp, i); data += 2; } data = (u8*)p + 256 * 3; @@ -4062,9 +4195,11 @@ static void rtl8125_get_regs(struct net_device *dev, struct ethtool_regs *regs, switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: default: for (i = 0; i < R8125_ERI_REGS_SIZE; i+=4) { - *(u32*)data = rtl8125_eri_read(ioaddr, i , 4, ERIAR_ExGMAC); + *(u32*)data = rtl8125_eri_read(tp, i , 4, ERIAR_ExGMAC); data += 4; } break; @@ -4132,7 +4267,6 @@ rtl8125_get_ethtool_stats(struct net_device *dev, u64 *data) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; struct rtl8125_counters *counters; dma_addr_t paddr; u32 cmd; @@ -4147,13 +4281,13 @@ rtl8125_get_ethtool_stats(struct net_device *dev, return; spin_lock_irqsave(&tp->lock, flags); - RTL_W32(CounterAddrHigh, (u64)paddr >> 32); + RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32); cmd = (u64)paddr & DMA_BIT_MASK(32); - RTL_W32(CounterAddrLow, cmd); - RTL_W32(CounterAddrLow, cmd | CounterDump); + RTL_W32(tp, CounterAddrLow, cmd); + RTL_W32(tp, CounterAddrLow, cmd | CounterDump); WaitCnt = 0; - while (RTL_R32(CounterAddrLow) & CounterDump) { + while (RTL_R32(tp, CounterAddrLow) & CounterDump) { udelay(10); WaitCnt++; @@ -4217,6 +4351,8 @@ static int rtl_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: default: VPD_addr = 0xD2; VPD_data = 0xD4; @@ -4298,106 +4434,111 @@ static int _kc_ethtool_op_set_sg(struct net_device *dev, u32 data) } #endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) -static int -rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *eee) +static int rtl8125_enable_eee(struct rtl8125_private *tp) { - struct rtl8125_private *tp = netdev_priv(net); - void __iomem *ioaddr = tp->mmio_addr; - u32 lp, adv, supported = 0; - unsigned long flags; - u16 val; + int ret; + ret = 0; switch (tp->mcfg) { - default: - return -EOPNOTSUPP; - } + case CFG_METHOD_2: + case CFG_METHOD_3: + SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); + SetMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1)); - if (unlikely(tp->rtk_enable_diag)) - return -EBUSY; - - spin_lock_irqsave(&tp->lock, flags); - - rtl8125_mdio_write(tp, 0x1F, 0x0A5C); - val = rtl8125_mdio_read(tp, 0x12); - supported = mmd_eee_cap_to_ethtool_sup_t(val); - - rtl8125_mdio_write(tp, 0x1F, 0x0A5D); - val = rtl8125_mdio_read(tp, 0x10); - adv = mmd_eee_adv_to_ethtool_adv_t(val); - - val = rtl8125_mdio_read(tp, 0x11); - lp = mmd_eee_adv_to_ethtool_adv_t(val); - - val = rtl8125_eri_read(ioaddr, 0x1B0, 2, ERIAR_ExGMAC); - val &= BIT_1 | BIT_0; - - rtl8125_mdio_write(tp, 0x1F, 0x0000); - - spin_unlock_irqrestore(&tp->lock, flags); - - eee->eee_enabled = !!val; - eee->eee_active = !!(supported & adv & lp); - eee->supported = supported; - eee->advertised = adv; - eee->lp_advertised = lp; - - return 0; -} - -static int -rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *eee) -{ - struct rtl8125_private *tp = netdev_priv(net); - unsigned long flags; - u32 data; - - switch (tp->mcfg) { - default: - return -EOPNOTSUPP; - } - - if (unlikely(tp->rtk_enable_diag)) - return -EBUSY; - - spin_lock_irqsave(&tp->lock, flags); - - if (eee->eee_enabled) { - data = rtl8125_mac_ocp_read(tp, 0xE040); - data &= ~(BIT_1 | BIT_0); - rtl8125_mac_ocp_write(tp, 0xE040, data); - ClearEthPhyOcpBit(tp, 0xA432, BIT_4); - ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1)); - ClearEthPhyOcpBit(tp, 0xA428, BIT_7); + SetEthPhyOcpBit(tp, 0xA432, BIT_4); + SetEthPhyOcpBit(tp, 0xA5D0, tp->eee_adv_t); ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0); ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4); ClearEthPhyOcpBit(tp, 0xA428, BIT_7); ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9); - } else { - data = rtl8125_mac_ocp_read(tp, 0xE040); - data &= ~(BIT_1 | BIT_0); - rtl8125_mac_ocp_write(tp, 0xE040, data); - ClearEthPhyOcpBit(tp, 0xA432, BIT_4); - ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1)); - ClearEthPhyOcpBit(tp, 0xA428, BIT_7); + break; + case CFG_METHOD_4: + case CFG_METHOD_5: + SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); + + SetEthPhyOcpBit(tp, 0xA5D0, tp->eee_adv_t); ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0); ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4); ClearEthPhyOcpBit(tp, 0xA428, BIT_7); ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9); + break; + default: +// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); + ret = -EOPNOTSUPP; + break; } - rtl8125_mdio_write(tp, 0x1F, 0x0000); - data = rtl8125_mdio_read(tp, MII_BMCR); - data |= BMCR_RESET; - rtl8125_mdio_write(tp, MII_BMCR, data); + /*Advanced EEE*/ + switch (tp->mcfg) { + case CFG_METHOD_2: + case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: + rtl8125_set_phy_mcu_patch_request(tp); + ClearMcuAccessRegBit(tp, 0xE052, BIT_0); + ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13); + ClearEthPhyOcpBit(tp, 0xA430, BIT_15); + rtl8125_clear_phy_mcu_patch_request(tp); + break; + } - spin_unlock_irqrestore(&tp->lock, flags); - - return 0; + return ret; +} + +static int rtl8125_disable_eee(struct rtl8125_private *tp) +{ + int ret; + + ret = 0; + switch (tp->mcfg) { + case CFG_METHOD_2: + case CFG_METHOD_3: + ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); + ClearMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1)); + + ClearEthPhyOcpBit(tp, 0xA432, BIT_4); + ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1)); + ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0); + + ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4); + ClearEthPhyOcpBit(tp, 0xA428, BIT_7); + ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9); + break; + case CFG_METHOD_4: + case CFG_METHOD_5: + ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); + + ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1)); + ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0); + + ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4); + ClearEthPhyOcpBit(tp, 0xA428, BIT_7); + ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9); + break; + default: +// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); + ret = -EOPNOTSUPP; + break; + } + + /*Advanced EEE*/ + switch (tp->mcfg) { + case CFG_METHOD_2: + case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: + rtl8125_set_phy_mcu_patch_request(tp); + ClearMcuAccessRegBit(tp, 0xE052, BIT_0); + ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13); + ClearEthPhyOcpBit(tp, 0xA430, BIT_15); + rtl8125_clear_phy_mcu_patch_request(tp); + break; + } + + return ret; } -#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */ static int rtl_nway_reset(struct net_device *dev) { @@ -4405,11 +4546,13 @@ static int rtl_nway_reset(struct net_device *dev) unsigned long flags; int ret, bmcr; - if (unlikely(tp->rtk_enable_diag)) - return -EBUSY; - spin_lock_irqsave(&tp->lock, flags); + if (unlikely(tp->rtk_enable_diag)) { + spin_unlock_irqrestore(&tp->lock, flags); + return -EBUSY; + } + /* if autoneg is off, it's an error */ rtl8125_mdio_write(tp, 0x1F, 0x0000); bmcr = rtl8125_mdio_read(tp, MII_BMCR); @@ -4427,6 +4570,81 @@ static int rtl_nway_reset(struct net_device *dev) return ret; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) +static int +rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *eee) +{ + struct rtl8125_private *tp = netdev_priv(net); + u32 lp, adv, supported = 0; + unsigned long flags; + u16 val; + + spin_lock_irqsave(&tp->lock, flags); + + if (unlikely(tp->rtk_enable_diag)) { + spin_unlock_irqrestore(&tp->lock, flags); + return -EBUSY; + } + + /* Get Supported EEE */ + val = mdio_direct_read_phy_ocp(tp, 0xA5C4); + supported = mmd_eee_cap_to_ethtool_sup_t(val); + + /* Get advertisement EEE */ + val = mdio_direct_read_phy_ocp(tp, 0xA5D0); + adv = mmd_eee_adv_to_ethtool_adv_t(val); + + /* Get LP advertisement EEE */ + val = mdio_direct_read_phy_ocp(tp, 0xA5D2); + lp = mmd_eee_adv_to_ethtool_adv_t(val); + + val = rtl8125_mac_ocp_read(tp, 0xE040); + val &= BIT_1 | BIT_0; + + spin_unlock_irqrestore(&tp->lock, flags); + + eee->eee_enabled = !!val; + eee->eee_active = !!(supported & adv & lp); + eee->supported = supported; + eee->advertised = adv; + eee->lp_advertised = lp; + + return 0; +} + +static int +rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *eee) +{ + struct rtl8125_private *tp = netdev_priv(net); + unsigned long flags; + + if (!HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) + return -EOPNOTSUPP; + + spin_lock_irqsave(&tp->lock, flags); + + if (unlikely(tp->rtk_enable_diag)) { + spin_unlock_irqrestore(&tp->lock, flags); + return -EBUSY; + } + + tp->eee_enabled = eee->eee_enabled; + tp->eee_adv_t = ethtool_adv_to_mmd_eee_adv_t(eee->advertised); + + if (tp->eee_enabled) { + rtl8125_enable_eee(tp); + } else { + rtl8125_disable_eee(tp); + } + + spin_unlock_irqrestore(&tp->lock, flags); + + rtl_nway_reset(net); + + return 0; +} +#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */ + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) static const struct ethtool_ops rtl8125_ethtool_ops = { .get_drvinfo = rtl8125_get_drvinfo, @@ -4481,88 +4699,6 @@ static const struct ethtool_ops rtl8125_ethtool_ops = { }; #endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) -static int rtl8125_enable_eee(struct rtl8125_private *tp) -{ - int ret; - - ret = 0; - switch (tp->mcfg) { - case CFG_METHOD_2: - case CFG_METHOD_3: - SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); - SetMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1)); - - SetEthPhyOcpBit(tp, 0xA432, BIT_4); - SetEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1)); - ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0); - - ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4); - SetEthPhyOcpBit(tp, 0xA4A2, BIT_9); - SetEthPhyOcpBit(tp, 0xA428, BIT_7); - break; - - default: -// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); - ret = -EOPNOTSUPP; - break; - } - - /*Advanced EEE*/ - switch (tp->mcfg) { - case CFG_METHOD_2: - case CFG_METHOD_3: - rtl8125_set_phy_mcu_patch_request(tp); - SetMcuAccessRegBit(tp, 0xE052, BIT_0); - ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13); - ClearEthPhyOcpBit(tp, 0xA430, BIT_15); - rtl8125_clear_phy_mcu_patch_request(tp); - break; - } - - return ret; -} - -static int rtl8125_disable_eee(struct rtl8125_private *tp) -{ - int ret; - - ret = 0; - switch (tp->mcfg) { - case CFG_METHOD_2: - case CFG_METHOD_3: - ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); - ClearMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1)); - - ClearEthPhyOcpBit(tp, 0xA432, BIT_4); - ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1)); - ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0); - - ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4); - ClearEthPhyOcpBit(tp, 0xA428, BIT_7); - ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9); - break; - - default: -// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); - ret = -EOPNOTSUPP; - break; - } - - /*Advanced EEE*/ - switch (tp->mcfg) { - case CFG_METHOD_2: - case CFG_METHOD_3: - rtl8125_set_phy_mcu_patch_request(tp); - ClearMcuAccessRegBit(tp, 0xE052, BIT_0); - ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13); - ClearEthPhyOcpBit(tp, 0xA430, BIT_15); - rtl8125_clear_phy_mcu_patch_request(tp); - break; - } - - return ret; -} - #if 0 static int rtl8125_enable_green_feature(struct rtl8125_private *tp) @@ -4573,6 +4709,8 @@ static int rtl8125_enable_green_feature(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: mdio_direct_write_phy_ocp(tp, 0xA436, 0x8011); SetEthPhyOcpBit(tp, 0xA438, BIT_15); rtl8125_mdio_write(tp, 0x00, 0x9200); @@ -4593,6 +4731,8 @@ static int rtl8125_disable_green_feature(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: mdio_direct_write_phy_ocp(tp, 0xA436, 0x8011); ClearEthPhyOcpBit(tp, 0xA438, BIT_15); rtl8125_mdio_write(tp, 0x00, 0x9200); @@ -4607,12 +4747,12 @@ static int rtl8125_disable_green_feature(struct rtl8125_private *tp) #endif -static void rtl8125_get_mac_version(struct rtl8125_private *tp, void __iomem *ioaddr) +static void rtl8125_get_mac_version(struct rtl8125_private *tp) { u32 reg,val32; u32 ICVerID; - val32 = RTL_R32(TxConfig); + val32 = RTL_R32(tp, TxConfig); reg = val32 & 0x7c800000; ICVerID = val32 & 0x00700000; @@ -4627,6 +4767,18 @@ static void rtl8125_get_mac_version(struct rtl8125_private *tp, void __iomem *io tp->HwIcVerUnknown = TRUE; } + tp->efuse_ver = EFUSE_SUPPORT_V4; + break; + case 0x64000000: + if (ICVerID == 0x00000000) { + tp->mcfg = CFG_METHOD_4; + } else if (ICVerID == 0x100000) { + tp->mcfg = CFG_METHOD_5; + } else { + tp->mcfg = CFG_METHOD_5; + tp->HwIcVerUnknown = TRUE; + } + tp->efuse_ver = EFUSE_SUPPORT_V4; break; default: @@ -4656,25 +4808,21 @@ rtl8125_print_mac_version(struct rtl8125_private *tp) static void rtl8125_tally_counter_addr_fill(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - if (!tp->tally_paddr) return; - RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32); - RTL_W32(CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32))); + RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32); + RTL_W32(tp, CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32))); } static void rtl8125_tally_counter_clear(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - if (!tp->tally_paddr) return; - RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32); - RTL_W32(CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset); + RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32); + RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset); } static void @@ -4682,6 +4830,12 @@ rtl8125_clear_phy_ups_reg(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); + switch (tp->mcfg) { + case CFG_METHOD_4: + case CFG_METHOD_5: + ClearEthPhyOcpBit(tp, 0xA466, BIT_0); + break; + }; ClearEthPhyOcpBit(tp, 0xA468, BIT_3 | BIT_1); } @@ -4691,7 +4845,9 @@ rtl8125_is_ups_resume(struct net_device *dev) struct rtl8125_private *tp = netdev_priv(dev); if (tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) return (rtl8125_mac_ocp_read(tp, 0xD42C) & BIT_8); return 0; @@ -4703,7 +4859,9 @@ rtl8125_clear_ups_resume_bit(struct net_device *dev) struct rtl8125_private *tp = netdev_priv(dev); if (tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) rtl8125_mac_ocp_write(tp, 0xD408, rtl8125_mac_ocp_read(tp, 0xD408) & ~(BIT_8)); } @@ -4715,7 +4873,9 @@ rtl8125_wait_phy_ups_resume(struct net_device *dev, u16 PhyState) int i=0; if (tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) { + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { do { TmpPhyState = mdio_direct_read_phy_ocp(tp, 0xA420); TmpPhyState &= 0x7; @@ -4732,20 +4892,16 @@ rtl8125_wait_phy_ups_resume(struct net_device *dev, u16 PhyState) void rtl8125_enable_now_is_oob(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - if ( tp->HwSuppNowIsOobVer == 1 ) { - RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) | Now_is_oob); + RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | Now_is_oob); } } void rtl8125_disable_now_is_oob(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - if ( tp->HwSuppNowIsOobVer == 1 ) { - RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) & ~Now_is_oob); + RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) & ~Now_is_oob); } } @@ -4753,14 +4909,15 @@ static void rtl8125_exit_oob(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u16 data16; - RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | AcceptAllPhys)); + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | AcceptAllPhys)); switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_dash2_disable_txrx(dev); break; } @@ -4780,6 +4937,8 @@ rtl8125_exit_oob(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xC0BC, 0x00FF); break; } @@ -4790,6 +4949,8 @@ rtl8125_exit_oob(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_disable_now_is_oob(tp); data16 = rtl8125_mac_ocp_read(tp, 0xE8DE) & ~BIT_14; @@ -4797,7 +4958,7 @@ rtl8125_exit_oob(struct net_device *dev) rtl8125_wait_ll_share_fifo_ready(dev); rtl8125_mac_ocp_write(tp, 0xC0AA, 0x07D0); - rtl8125_mac_ocp_write(tp, 0xC0A6, 0x0150); + rtl8125_mac_ocp_write(tp, 0xC0A6, 0x01B5); rtl8125_mac_ocp_write(tp, 0xC01E, 0x5555); rtl8125_wait_ll_share_fifo_ready(dev); @@ -4808,6 +4969,8 @@ rtl8125_exit_oob(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: if (rtl8125_is_ups_resume(dev)) { rtl8125_wait_phy_ups_resume(dev, 2); rtl8125_clear_ups_resume_bit(dev); @@ -4823,14 +4986,15 @@ void rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_enable_cfg9346_write(tp); - RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); - RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); rtl8125_disable_cfg9346_write(tp); break; } @@ -4838,6 +5002,8 @@ rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xFC38, 0x0000); break; } @@ -4845,6 +5011,8 @@ rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xFC28, 0x0000); rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0000); rtl8125_mac_ocp_write(tp, 0xFC2C, 0x0000); @@ -4859,124 +5027,102 @@ rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) } } +static void +rtl8125_set_mac_mcu_8125a_1(struct net_device *dev) +{ + rtl8125_hw_disable_mac_mcu_bps(dev); +} + static void rtl8125_set_mac_mcu_8125a_2(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8125a_2[] = { + 0xE008, 0xE01E, 0xE02E, 0xE054, 0xE057, 0xE059, 0xE0C2, 0xE0CB, 0x9996, + 0x49D1, 0xF005, 0x49D4, 0xF10A, 0x49D8, 0xF108, 0xC00F, 0x7100, 0x209C, + 0x249C, 0xC009, 0x9900, 0xE004, 0xC006, 0x1900, 0x9900, 0xC602, 0xBE00, + 0x5A48, 0xE0C2, 0x0004, 0xE10A, 0xC60F, 0x73C4, 0x49B3, 0xF106, 0x73C2, + 0xC608, 0xB406, 0xC609, 0xFF80, 0xC605, 0xB406, 0xC605, 0xFF80, 0x0544, + 0x0568, 0xE906, 0xCDE8, 0xC724, 0xC624, 0x9EE2, 0x1E01, 0x9EE0, 0x76E0, + 0x49E0, 0xF1FE, 0x76E6, 0x486D, 0x4868, 0x9EE4, 0x1E03, 0x9EE0, 0x76E0, + 0x49E0, 0xF1FE, 0xC615, 0x9EE2, 0x1E01, 0x9EE0, 0x76E0, 0x49E0, 0xF1FE, + 0x76E6, 0x486F, 0x9EE4, 0x1E03, 0x9EE0, 0x76E0, 0x49E0, 0xF1FE, 0x7196, + 0xC702, 0xBF00, 0x5A44, 0xEB0E, 0x0070, 0x00C3, 0x1BC0, 0xC602, 0xBE00, + 0x0E26, 0xC602, 0xBE00, 0x0EBA, 0x1501, 0xF02A, 0x1500, 0xF15D, 0xC661, + 0x75C8, 0x49D5, 0xF00A, 0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, + 0x75D2, 0x49D9, 0xF150, 0xC553, 0x77A0, 0x75C8, 0x4855, 0x4856, 0x4857, + 0x4858, 0x48DA, 0x48DB, 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, + 0x9DC8, 0x75D2, 0x4859, 0x9DD2, 0xC643, 0x75C0, 0x49D4, 0xF033, 0x49D0, + 0xF137, 0xE030, 0xC63A, 0x75C8, 0x49D5, 0xF00E, 0x49D6, 0xF00C, 0x49D7, + 0xF00A, 0x49D8, 0xF008, 0x75D2, 0x49D9, 0xF005, 0xC62E, 0x75C0, 0x49D7, + 0xF125, 0xC528, 0x77A0, 0xC627, 0x75C8, 0x4855, 0x4856, 0x4857, 0x4858, + 0x48DA, 0x48DB, 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, 0x9DC8, + 0x75D2, 0x4859, 0x9DD2, 0xC616, 0x75C0, 0x4857, 0x9DC0, 0xC613, 0x75C0, + 0x49DA, 0xF003, 0x49D0, 0xF107, 0xC60B, 0xC50E, 0x48D9, 0x9DC0, 0x4859, + 0x9DC0, 0xC608, 0xC702, 0xBF00, 0x3AE0, 0xE860, 0xB400, 0xB5D4, 0xE908, + 0xE86C, 0x1200, 0xC409, 0x6780, 0x48F1, 0x8F80, 0xC404, 0xC602, 0xBE00, + 0x10AA, 0xC010, 0xEA7C, 0xC602, 0xBE00, 0x0000 + }; rtl8125_hw_disable_mac_mcu_bps(dev); - rtl8125_mac_ocp_write(tp, 0xF800, 0xE008); - rtl8125_mac_ocp_write(tp, 0xF802, 0xE01E); - rtl8125_mac_ocp_write(tp, 0xF804, 0xE02E); - rtl8125_mac_ocp_write(tp, 0xF806, 0xE054); - rtl8125_mac_ocp_write(tp, 0xF808, 0xE057); - rtl8125_mac_ocp_write(tp, 0xF80A, 0xE059); - rtl8125_mac_ocp_write(tp, 0xF80C, 0xE05B); - rtl8125_mac_ocp_write(tp, 0xF80E, 0xE05D); - rtl8125_mac_ocp_write(tp, 0xF810, 0x9996); - rtl8125_mac_ocp_write(tp, 0xF812, 0x49D1); - rtl8125_mac_ocp_write(tp, 0xF814, 0xF005); - rtl8125_mac_ocp_write(tp, 0xF816, 0x49D4); - rtl8125_mac_ocp_write(tp, 0xF818, 0xF10A); - rtl8125_mac_ocp_write(tp, 0xF81A, 0x49D8); - rtl8125_mac_ocp_write(tp, 0xF81C, 0xF108); - rtl8125_mac_ocp_write(tp, 0xF81E, 0xC00F); - rtl8125_mac_ocp_write(tp, 0xF820, 0x7100); - rtl8125_mac_ocp_write(tp, 0xF822, 0x209C); - rtl8125_mac_ocp_write(tp, 0xF824, 0x249C); - rtl8125_mac_ocp_write(tp, 0xF826, 0xC009); - rtl8125_mac_ocp_write(tp, 0xF828, 0x9900); - rtl8125_mac_ocp_write(tp, 0xF82A, 0xE004); - rtl8125_mac_ocp_write(tp, 0xF82C, 0xC006); - rtl8125_mac_ocp_write(tp, 0xF82E, 0x1900); - rtl8125_mac_ocp_write(tp, 0xF830, 0x9900); - rtl8125_mac_ocp_write(tp, 0xF832, 0xC602); - rtl8125_mac_ocp_write(tp, 0xF834, 0xBE00); - rtl8125_mac_ocp_write(tp, 0xF836, 0x5A48); - rtl8125_mac_ocp_write(tp, 0xF838, 0xE0C2); - rtl8125_mac_ocp_write(tp, 0xF83A, 0x0004); - rtl8125_mac_ocp_write(tp, 0xF83C, 0xE10A); - rtl8125_mac_ocp_write(tp, 0xF83E, 0xC60F); - rtl8125_mac_ocp_write(tp, 0xF840, 0x73C4); - rtl8125_mac_ocp_write(tp, 0xF842, 0x49B3); - rtl8125_mac_ocp_write(tp, 0xF844, 0xF106); - rtl8125_mac_ocp_write(tp, 0xF846, 0x73C2); - rtl8125_mac_ocp_write(tp, 0xF848, 0xC608); - rtl8125_mac_ocp_write(tp, 0xF84A, 0xB406); - rtl8125_mac_ocp_write(tp, 0xF84C, 0xC609); - rtl8125_mac_ocp_write(tp, 0xF84E, 0xFF80); - rtl8125_mac_ocp_write(tp, 0xF850, 0xC605); - rtl8125_mac_ocp_write(tp, 0xF852, 0xB406); - rtl8125_mac_ocp_write(tp, 0xF854, 0xC605); - rtl8125_mac_ocp_write(tp, 0xF856, 0xFF80); - rtl8125_mac_ocp_write(tp, 0xF858, 0x0544); - rtl8125_mac_ocp_write(tp, 0xF85A, 0x0568); - rtl8125_mac_ocp_write(tp, 0xF85C, 0xE906); - rtl8125_mac_ocp_write(tp, 0xF85E, 0xCDE8); - rtl8125_mac_ocp_write(tp, 0xF860, 0xC724); - rtl8125_mac_ocp_write(tp, 0xF862, 0xC624); - rtl8125_mac_ocp_write(tp, 0xF864, 0x9EE2); - rtl8125_mac_ocp_write(tp, 0xF866, 0x1E01); - rtl8125_mac_ocp_write(tp, 0xF868, 0x9EE0); - rtl8125_mac_ocp_write(tp, 0xF86A, 0x76E0); - rtl8125_mac_ocp_write(tp, 0xF86C, 0x49E0); - rtl8125_mac_ocp_write(tp, 0xF86E, 0xF1FE); - rtl8125_mac_ocp_write(tp, 0xF870, 0x76E6); - rtl8125_mac_ocp_write(tp, 0xF872, 0x486D); - rtl8125_mac_ocp_write(tp, 0xF874, 0x4868); - rtl8125_mac_ocp_write(tp, 0xF876, 0x9EE4); - rtl8125_mac_ocp_write(tp, 0xF878, 0x1E03); - rtl8125_mac_ocp_write(tp, 0xF87A, 0x9EE0); - rtl8125_mac_ocp_write(tp, 0xF87C, 0x76E0); - rtl8125_mac_ocp_write(tp, 0xF87E, 0x49E0); - rtl8125_mac_ocp_write(tp, 0xF880, 0xF1FE); - rtl8125_mac_ocp_write(tp, 0xF882, 0xC615); - rtl8125_mac_ocp_write(tp, 0xF884, 0x9EE2); - rtl8125_mac_ocp_write(tp, 0xF886, 0x1E01); - rtl8125_mac_ocp_write(tp, 0xF888, 0x9EE0); - rtl8125_mac_ocp_write(tp, 0xF88A, 0x76E0); - rtl8125_mac_ocp_write(tp, 0xF88C, 0x49E0); - rtl8125_mac_ocp_write(tp, 0xF88E, 0xF1FE); - rtl8125_mac_ocp_write(tp, 0xF890, 0x76E6); - rtl8125_mac_ocp_write(tp, 0xF892, 0x486F); - rtl8125_mac_ocp_write(tp, 0xF894, 0x9EE4); - rtl8125_mac_ocp_write(tp, 0xF896, 0x1E03); - rtl8125_mac_ocp_write(tp, 0xF898, 0x9EE0); - rtl8125_mac_ocp_write(tp, 0xF89A, 0x76E0); - rtl8125_mac_ocp_write(tp, 0xF89C, 0x49E0); - rtl8125_mac_ocp_write(tp, 0xF89E, 0xF1FE); - rtl8125_mac_ocp_write(tp, 0xF8A0, 0x7196); - rtl8125_mac_ocp_write(tp, 0xF8A2, 0xC702); - rtl8125_mac_ocp_write(tp, 0xF8A4, 0xBF00); - rtl8125_mac_ocp_write(tp, 0xF8A6, 0x5A44); - rtl8125_mac_ocp_write(tp, 0xF8A8, 0xEB0E); - rtl8125_mac_ocp_write(tp, 0xF8AA, 0x0070); - rtl8125_mac_ocp_write(tp, 0xF8AC, 0x00C3); - rtl8125_mac_ocp_write(tp, 0xF8AE, 0x1BC0); - rtl8125_mac_ocp_write(tp, 0xF8B0, 0xC602); - rtl8125_mac_ocp_write(tp, 0xF8B2, 0xBE00); - rtl8125_mac_ocp_write(tp, 0xF8B4, 0x0E26); - rtl8125_mac_ocp_write(tp, 0xF8B6, 0xC602); - rtl8125_mac_ocp_write(tp, 0xF8B8, 0xBE00); - rtl8125_mac_ocp_write(tp, 0xF8BA, 0x0EBA); - rtl8125_mac_ocp_write(tp, 0xF8BC, 0xC602); - rtl8125_mac_ocp_write(tp, 0xF8BE, 0xBE00); - rtl8125_mac_ocp_write(tp, 0xF8C0, 0x0000); - rtl8125_mac_ocp_write(tp, 0xF8C2, 0xC602); - rtl8125_mac_ocp_write(tp, 0xF8C4, 0xBE00); - rtl8125_mac_ocp_write(tp, 0xF8C6, 0x0000); - rtl8125_mac_ocp_write(tp, 0xF8C8, 0xC602); - rtl8125_mac_ocp_write(tp, 0xF8CA, 0xBE00); - rtl8125_mac_ocp_write(tp, 0xF8CC, 0x0000); + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8125a_2); i++) { + rtl8125_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8125a_2[i]); + } rtl8125_mac_ocp_write(tp, 0xFC26, 0x8000); rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0540); rtl8125_mac_ocp_write(tp, 0xFC2E, 0x0E24); rtl8125_mac_ocp_write(tp, 0xFC30, 0x0EB8); + rtl8125_mac_ocp_write(tp, 0xFC32, 0x3A5C); + rtl8125_mac_ocp_write(tp, 0xFC34, 0x10A8); - rtl8125_mac_ocp_write(tp, 0xFC48, 0x001A); + rtl8125_mac_ocp_write(tp, 0xFC48, 0x007A); +} + +static void +rtl8125_set_mac_mcu_8125b_1(struct net_device *dev) +{ + rtl8125_hw_disable_mac_mcu_bps(dev); +} + +static void +rtl8125_set_mac_mcu_8125b_2(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8125b_2[] = { + 0xE008, 0xE013, 0xE01E, 0xE02F, 0xE035, 0xE04F, 0xE053, 0xE055, 0x740A, + 0x4846, 0x4847, 0x9C0A, 0xC607, 0x74C0, 0x48C6, 0x9CC0, 0xC602, 0xBE00, + 0x13F0, 0xE054, 0x72CA, 0x4826, 0x4827, 0x9ACA, 0xC607, 0x72C0, 0x48A6, + 0x9AC0, 0xC602, 0xBE00, 0x081C, 0xE054, 0xC60F, 0x74C4, 0x49CC, 0xF109, + 0xC60C, 0x74CA, 0x48C7, 0x9CCA, 0xC609, 0x74C0, 0x4846, 0x9CC0, 0xC602, + 0xBE00, 0x2494, 0xE092, 0xE0C0, 0xE054, 0x7420, 0x48C0, 0x9C20, 0x7444, + 0xC602, 0xBE00, 0x12DC, 0x733A, 0x21B5, 0x25BC, 0x1304, 0xF111, 0x1B12, + 0x1D2A, 0x3168, 0x3ADA, 0x31AB, 0x1A00, 0x9AC0, 0x1300, 0xF1FB, 0x7620, + 0x236E, 0x276F, 0x1A3C, 0x22A1, 0x41B5, 0x9EE2, 0x76E4, 0x486F, 0x9EE4, + 0xC602, 0xBE00, 0x4A26, 0x733A, 0x49BB, 0xC602, 0xBE00, 0x47A2, 0xC602, + 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000 + }; + + rtl8125_hw_disable_mac_mcu_bps(dev); + + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8125b_2); i++) { + rtl8125_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8125b_2[i]); + } + + rtl8125_mac_ocp_write(tp, 0xFC26, 0x8000); + + rtl8125_mac_ocp_write(tp, 0xFC28, 0x13E6); + rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0812); + rtl8125_mac_ocp_write(tp, 0xFC2C, 0x248C); + rtl8125_mac_ocp_write(tp, 0xFC2E, 0x12DA); + rtl8125_mac_ocp_write(tp, 0xFC30, 0x4A20); + rtl8125_mac_ocp_write(tp, 0xFC32, 0x47A0); + + rtl8125_mac_ocp_write(tp, 0xFC48, 0x003F); } static void @@ -4988,11 +5134,17 @@ rtl8125_hw_mac_mcu_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: - rtl8125_hw_disable_mac_mcu_bps(dev); + rtl8125_set_mac_mcu_8125a_1(dev); break; case CFG_METHOD_3: rtl8125_set_mac_mcu_8125a_2(dev); break; + case CFG_METHOD_4: + rtl8125_set_mac_mcu_8125b_1(dev); + break; + case CFG_METHOD_5: + rtl8125_set_mac_mcu_8125b_2(dev); + break; } } @@ -5000,17 +5152,18 @@ static void rtl8125_hw_init(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u32 csi_tmp; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_enable_cfg9346_write(tp); - RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); - RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); rtl8125_disable_cfg9346_write(tp); - RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7); + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); break; } @@ -5018,6 +5171,8 @@ rtl8125_hw_init(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xD40A, rtl8125_mac_ocp_read( tp, 0xD40A) & ~(BIT_4)); break; } @@ -5025,7 +5180,10 @@ rtl8125_hw_init(struct net_device *dev) rtl8125_hw_mac_mcu_config(dev); /*disable ocp phy power saving*/ - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + if (tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) rtl8125_disable_ocp_phy_power_saving(dev); //Set PCIE uncorrectable error status mask pcie 0x108 @@ -5041,50 +5199,118 @@ static void rtl8125_hw_ephy_config(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: - rtl8125_ephy_write(ioaddr, 0x01, 0xA812); - rtl8125_ephy_write(ioaddr, 0x09, 0x520C); - rtl8125_ephy_write(ioaddr, 0x04, 0xD000); - rtl8125_ephy_write(ioaddr, 0x0D, 0xF702); - rtl8125_ephy_write(ioaddr, 0x0A, 0x8653); - rtl8125_ephy_write(ioaddr, 0x06, 0x001E); - rtl8125_ephy_write(ioaddr, 0x08, 0x3595); - rtl8125_ephy_write(ioaddr, 0x20, 0x9455); - rtl8125_ephy_write(ioaddr, 0x21, 0x99FF); - rtl8125_ephy_write(ioaddr, 0x02, 0x6046); - rtl8125_ephy_write(ioaddr, 0x29, 0xFE00); - rtl8125_ephy_write(ioaddr, 0x23, 0xAB62); + rtl8125_ephy_write(tp, 0x01, 0xA812); + rtl8125_ephy_write(tp, 0x09, 0x520C); + rtl8125_ephy_write(tp, 0x04, 0xD000); + rtl8125_ephy_write(tp, 0x0D, 0xF702); + rtl8125_ephy_write(tp, 0x0A, 0x8653); + rtl8125_ephy_write(tp, 0x06, 0x001E); + rtl8125_ephy_write(tp, 0x08, 0x3595); + rtl8125_ephy_write(tp, 0x20, 0x9455); + rtl8125_ephy_write(tp, 0x21, 0x99FF); + rtl8125_ephy_write(tp, 0x02, 0x6046); + rtl8125_ephy_write(tp, 0x29, 0xFE00); + rtl8125_ephy_write(tp, 0x23, 0xAB62); - rtl8125_ephy_write(ioaddr, 0x41, 0xA80C); - rtl8125_ephy_write(ioaddr, 0x49, 0x520C); - rtl8125_ephy_write(ioaddr, 0x44, 0xD000); - rtl8125_ephy_write(ioaddr, 0x4D, 0xF702); - rtl8125_ephy_write(ioaddr, 0x4A, 0x8653); - rtl8125_ephy_write(ioaddr, 0x46, 0x001E); - rtl8125_ephy_write(ioaddr, 0x48, 0x3595); - rtl8125_ephy_write(ioaddr, 0x60, 0x9455); - rtl8125_ephy_write(ioaddr, 0x61, 0x99FF); - rtl8125_ephy_write(ioaddr, 0x42, 0x6046); - rtl8125_ephy_write(ioaddr, 0x69, 0xFE00); - rtl8125_ephy_write(ioaddr, 0x63, 0xAB62); + rtl8125_ephy_write(tp, 0x41, 0xA80C); + rtl8125_ephy_write(tp, 0x49, 0x520C); + rtl8125_ephy_write(tp, 0x44, 0xD000); + rtl8125_ephy_write(tp, 0x4D, 0xF702); + rtl8125_ephy_write(tp, 0x4A, 0x8653); + rtl8125_ephy_write(tp, 0x46, 0x001E); + rtl8125_ephy_write(tp, 0x48, 0x3595); + rtl8125_ephy_write(tp, 0x60, 0x9455); + rtl8125_ephy_write(tp, 0x61, 0x99FF); + rtl8125_ephy_write(tp, 0x42, 0x6046); + rtl8125_ephy_write(tp, 0x69, 0xFE00); + rtl8125_ephy_write(tp, 0x63, 0xAB62); break; case CFG_METHOD_3: - rtl8125_ephy_write(ioaddr, 0x04, 0xD000); - rtl8125_ephy_write(ioaddr, 0x0A, 0x8653); - rtl8125_ephy_write(ioaddr, 0x23, 0xAB66); - rtl8125_ephy_write(ioaddr, 0x20, 0x9455); - rtl8125_ephy_write(ioaddr, 0x21, 0x99FF); - rtl8125_ephy_write(ioaddr, 0x29, 0xFE04); + rtl8125_ephy_write(tp, 0x04, 0xD000); + rtl8125_ephy_write(tp, 0x0A, 0x8653); + rtl8125_ephy_write(tp, 0x23, 0xAB66); + rtl8125_ephy_write(tp, 0x20, 0x9455); + rtl8125_ephy_write(tp, 0x21, 0x99FF); + rtl8125_ephy_write(tp, 0x29, 0xFE04); - rtl8125_ephy_write(ioaddr, 0x44, 0xD000); - rtl8125_ephy_write(ioaddr, 0x4A, 0x8653); - rtl8125_ephy_write(ioaddr, 0x63, 0xAB66); - rtl8125_ephy_write(ioaddr, 0x60, 0x9455); - rtl8125_ephy_write(ioaddr, 0x61, 0x99FF); - rtl8125_ephy_write(ioaddr, 0x69, 0xFE04); + rtl8125_ephy_write(tp, 0x44, 0xD000); + rtl8125_ephy_write(tp, 0x4A, 0x8653); + rtl8125_ephy_write(tp, 0x63, 0xAB66); + rtl8125_ephy_write(tp, 0x60, 0x9455); + rtl8125_ephy_write(tp, 0x61, 0x99FF); + rtl8125_ephy_write(tp, 0x69, 0xFE04); + + ClearAndSetPCIePhyBit(tp, + 0x2A, + (BIT_14 | BIT_13 | BIT_12), + (BIT_13 | BIT_12) + ); + ClearPCIePhyBit(tp, 0x19, BIT_6); + SetPCIePhyBit(tp, 0x1B, (BIT_11 | BIT_10 | BIT_9)); + ClearPCIePhyBit(tp, 0x1B, (BIT_14 | BIT_13 | BIT_12)); + rtl8125_ephy_write(tp, 0x02, 0x6042); + rtl8125_ephy_write(tp, 0x06, 0x0014); + + ClearAndSetPCIePhyBit(tp, + 0x6A, + (BIT_14 | BIT_13 | BIT_12), + (BIT_13 | BIT_12) + ); + ClearPCIePhyBit(tp, 0x59, BIT_6); + SetPCIePhyBit(tp, 0x5B, (BIT_11 | BIT_10 | BIT_9)); + ClearPCIePhyBit(tp, 0x5B, (BIT_14 | BIT_13 | BIT_12)); + rtl8125_ephy_write(tp, 0x42, 0x6042); + rtl8125_ephy_write(tp, 0x46, 0x0014); + break; + case CFG_METHOD_4: + rtl8125_ephy_write(tp, 0x06, 0x001F); + rtl8125_ephy_write(tp, 0x0A, 0xB66B); + rtl8125_ephy_write(tp, 0x01, 0xA852); + rtl8125_ephy_write(tp, 0x24, 0x0008); + rtl8125_ephy_write(tp, 0x2F, 0x6052); + rtl8125_ephy_write(tp, 0x0D, 0xF716); + rtl8125_ephy_write(tp, 0x20, 0xD477); + rtl8125_ephy_write(tp, 0x21, 0x4477); + rtl8125_ephy_write(tp, 0x22, 0x0013); + rtl8125_ephy_write(tp, 0x23, 0xBB66); + rtl8125_ephy_write(tp, 0x0B, 0xA909); + rtl8125_ephy_write(tp, 0x29, 0xFF04); + rtl8125_ephy_write(tp, 0x1B, 0x1EA0); + + rtl8125_ephy_write(tp, 0x46, 0x001F); + rtl8125_ephy_write(tp, 0x4A, 0xB66B); + rtl8125_ephy_write(tp, 0x41, 0xA84A); + rtl8125_ephy_write(tp, 0x64, 0x000C); + rtl8125_ephy_write(tp, 0x6F, 0x604A); + rtl8125_ephy_write(tp, 0x4D, 0xF716); + rtl8125_ephy_write(tp, 0x60, 0xD477); + rtl8125_ephy_write(tp, 0x61, 0x4477); + rtl8125_ephy_write(tp, 0x62, 0x0013); + rtl8125_ephy_write(tp, 0x63, 0xBB66); + rtl8125_ephy_write(tp, 0x4B, 0xA909); + rtl8125_ephy_write(tp, 0x69, 0xFF04); + rtl8125_ephy_write(tp, 0x5B, 0x1EA0); + break; + case CFG_METHOD_5: + rtl8125_ephy_write(tp, 0x0B, 0xA908); + rtl8125_ephy_write(tp, 0x1E, 0x20EB); + + rtl8125_ephy_write(tp, 0x4B, 0xA908); + rtl8125_ephy_write(tp, 0x5E, 0x20EB); + + ClearAndSetPCIePhyBit(tp, + 0x22, + (BIT_5 | BIT_4), + BIT_5 + ); + ClearAndSetPCIePhyBit(tp, + 0x62, + (BIT_5 | BIT_4), + BIT_5 + ); break; } } @@ -5098,6 +5324,8 @@ rtl8125_check_hw_phy_mcu_code_ver(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E); tp->hw_ram_code_ver = mdio_direct_read_phy_ocp(tp, 0xA438); break; @@ -5122,6 +5350,8 @@ rtl8125_write_hw_phy_mcu_code_ver(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E); mdio_direct_write_phy_ocp(tp, 0xA438, tp->sw_ram_code_ver); tp->hw_ram_code_ver = tp->sw_ram_code_ver; @@ -5141,6 +5371,12 @@ rtl8125_acquire_phy_mcu_patch_key_lock(struct rtl8125_private *tp) case CFG_METHOD_3: PatchKey = 0x8601; break; + case CFG_METHOD_4: + PatchKey = 0x3700; + break; + case CFG_METHOD_5: + PatchKey = 0x3701; + break; default: return; } @@ -5156,6 +5392,8 @@ rtl8125_release_phy_mcu_patch_key_lock(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: mdio_direct_write_phy_ocp(tp, 0xA436, 0x0000); mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); ClearEthPhyOcpBit(tp, 0xB82E, BIT_0); @@ -5216,7 +5454,32 @@ rtl8125_clear_phy_mcu_patch_request(struct rtl8125_private *tp) } static void -rtl8125_real_set_phy_mcu_8125_2(struct net_device *dev) +rtl8125_set_phy_mcu_ram_code(struct net_device *dev, const u16 *ramcode, u16 codesize) +{ + struct rtl8125_private *tp = netdev_priv(dev); + u16 i; + u16 addr; + u16 val; + + if (ramcode == NULL || codesize % 2) { + goto out; + } + + for (i = 0; i < codesize; i += 2) { + addr = ramcode[i]; + val = ramcode[i + 1]; + if (addr == 0xFFFF && val == 0xFFFF) { + break; + } + mdio_direct_write_phy_ocp(tp, addr, val); + } + +out: + return; +} + +static void +rtl8125_real_set_phy_mcu_8125a_1(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); @@ -6049,19 +6312,19 @@ rtl8125_real_set_phy_mcu_8125_2(struct net_device *dev) } static void -rtl8125_set_phy_mcu_8125_2(struct net_device *dev) +rtl8125_set_phy_mcu_8125a_1(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); rtl8125_set_phy_mcu_patch_request(tp); - rtl8125_real_set_phy_mcu_8125_2(dev); + rtl8125_real_set_phy_mcu_8125a_1(dev); rtl8125_clear_phy_mcu_patch_request(tp); } static void -rtl8125_real_set_phy_mcu_8125_3(struct net_device *dev) +rtl8125_real_set_phy_mcu_8125a_2(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); @@ -6636,13 +6899,829 @@ rtl8125_real_set_phy_mcu_8125_3(struct net_device *dev) } static void -rtl8125_set_phy_mcu_8125_3(struct net_device *dev) +rtl8125_set_phy_mcu_8125a_2(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); rtl8125_set_phy_mcu_patch_request(tp); - rtl8125_real_set_phy_mcu_8125_3(dev); + rtl8125_real_set_phy_mcu_8125a_2(dev); + + rtl8125_clear_phy_mcu_patch_request(tp); +} + +static const u16 phy_mcu_ram_code_8125b_1[] = { + 0xa436, 0x8024, 0xa438, 0x3700, 0xa436, 0xB82E, 0xa438, 0x0001, + 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012, + 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, + 0xa438, 0x1800, 0xa438, 0x8025, 0xa438, 0x1800, 0xa438, 0x803a, + 0xa438, 0x1800, 0xa438, 0x8044, 0xa438, 0x1800, 0xa438, 0x8083, + 0xa438, 0x1800, 0xa438, 0x808d, 0xa438, 0x1800, 0xa438, 0x808d, + 0xa438, 0x1800, 0xa438, 0x808d, 0xa438, 0xd712, 0xa438, 0x4077, + 0xa438, 0xd71e, 0xa438, 0x4159, 0xa438, 0xd71e, 0xa438, 0x6099, + 0xa438, 0x7f44, 0xa438, 0x1800, 0xa438, 0x1a14, 0xa438, 0x9040, + 0xa438, 0x9201, 0xa438, 0x1800, 0xa438, 0x1b1a, 0xa438, 0xd71e, + 0xa438, 0x2425, 0xa438, 0x1a14, 0xa438, 0xd71f, 0xa438, 0x3ce5, + 0xa438, 0x1afb, 0xa438, 0x1800, 0xa438, 0x1b00, 0xa438, 0xd712, + 0xa438, 0x4077, 0xa438, 0xd71e, 0xa438, 0x4159, 0xa438, 0xd71e, + 0xa438, 0x60b9, 0xa438, 0x2421, 0xa438, 0x1c17, 0xa438, 0x1800, + 0xa438, 0x1a14, 0xa438, 0x9040, 0xa438, 0x1800, 0xa438, 0x1c2c, + 0xa438, 0xd71e, 0xa438, 0x2425, 0xa438, 0x1a14, 0xa438, 0xd71f, + 0xa438, 0x3ce5, 0xa438, 0x1c0f, 0xa438, 0x1800, 0xa438, 0x1c13, + 0xa438, 0xd702, 0xa438, 0xd501, 0xa438, 0x6072, 0xa438, 0x8401, + 0xa438, 0xf002, 0xa438, 0xa401, 0xa438, 0x1000, 0xa438, 0x146e, + 0xa438, 0x1800, 0xa438, 0x0b77, 0xa438, 0xd703, 0xa438, 0x665d, + 0xa438, 0x653e, 0xa438, 0x641f, 0xa438, 0xd700, 0xa438, 0x62c4, + 0xa438, 0x6185, 0xa438, 0x6066, 0xa438, 0x1800, 0xa438, 0x165a, + 0xa438, 0xc101, 0xa438, 0xcb00, 0xa438, 0x1000, 0xa438, 0x1945, + 0xa438, 0xd700, 0xa438, 0x7fa6, 0xa438, 0x1800, 0xa438, 0x807d, + 0xa438, 0xc102, 0xa438, 0xcb00, 0xa438, 0x1000, 0xa438, 0x1945, + 0xa438, 0xd700, 0xa438, 0x2569, 0xa438, 0x8058, 0xa438, 0x1800, + 0xa438, 0x807d, 0xa438, 0xc104, 0xa438, 0xcb00, 0xa438, 0x1000, + 0xa438, 0x1945, 0xa438, 0xd700, 0xa438, 0x7fa4, 0xa438, 0x1800, + 0xa438, 0x807d, 0xa438, 0xc120, 0xa438, 0xcb00, 0xa438, 0x1000, + 0xa438, 0x1945, 0xa438, 0xd703, 0xa438, 0x7fbf, 0xa438, 0x1800, + 0xa438, 0x807d, 0xa438, 0xc140, 0xa438, 0xcb00, 0xa438, 0x1000, + 0xa438, 0x1945, 0xa438, 0xd703, 0xa438, 0x7fbe, 0xa438, 0x1800, + 0xa438, 0x807d, 0xa438, 0xc180, 0xa438, 0xcb00, 0xa438, 0x1000, + 0xa438, 0x1945, 0xa438, 0xd703, 0xa438, 0x7fbd, 0xa438, 0xc100, + 0xa438, 0xcb00, 0xa438, 0xd708, 0xa438, 0x6018, 0xa438, 0x1800, + 0xa438, 0x165a, 0xa438, 0x1000, 0xa438, 0x14f6, 0xa438, 0xd014, + 0xa438, 0xd1e3, 0xa438, 0x1000, 0xa438, 0x1356, 0xa438, 0xd705, + 0xa438, 0x5fbe, 0xa438, 0x1800, 0xa438, 0x1559, 0xa436, 0xA026, + 0xa438, 0xffff, 0xa436, 0xA024, 0xa438, 0xffff, 0xa436, 0xA022, + 0xa438, 0xffff, 0xa436, 0xA020, 0xa438, 0x1557, 0xa436, 0xA006, + 0xa438, 0x1677, 0xa436, 0xA004, 0xa438, 0x0b75, 0xa436, 0xA002, + 0xa438, 0x1c17, 0xa436, 0xA000, 0xa438, 0x1b04, 0xa436, 0xA008, + 0xa438, 0x1f00, 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, + 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, + 0xa438, 0x1800, 0xa438, 0x817f, 0xa438, 0x1800, 0xa438, 0x82ab, + 0xa438, 0x1800, 0xa438, 0x83f8, 0xa438, 0x1800, 0xa438, 0x8444, + 0xa438, 0x1800, 0xa438, 0x8454, 0xa438, 0x1800, 0xa438, 0x8459, + 0xa438, 0x1800, 0xa438, 0x8465, 0xa438, 0xcb11, 0xa438, 0xa50c, + 0xa438, 0x8310, 0xa438, 0xd701, 0xa438, 0x4076, 0xa438, 0x0c03, + 0xa438, 0x0903, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, + 0xa438, 0x0d00, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d00, + 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0x1000, 0xa438, 0x0a4d, + 0xa438, 0xcb12, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x5f84, 0xa438, 0xd102, 0xa438, 0xd040, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xd701, + 0xa438, 0x60f3, 0xa438, 0xd413, 0xa438, 0x1000, 0xa438, 0x0a37, + 0xa438, 0xd410, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xcb13, + 0xa438, 0xa108, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8108, + 0xa438, 0xa00a, 0xa438, 0xa910, 0xa438, 0xa780, 0xa438, 0xd14a, + 0xa438, 0xd048, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd701, + 0xa438, 0x6255, 0xa438, 0xd700, 0xa438, 0x5f74, 0xa438, 0x6326, + 0xa438, 0xd702, 0xa438, 0x5f07, 0xa438, 0x800a, 0xa438, 0xa004, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0x0c03, + 0xa438, 0x0902, 0xa438, 0xffe2, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x5fab, 0xa438, 0xba08, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8b, 0xa438, 0x9a08, + 0xa438, 0x800a, 0xa438, 0xd702, 0xa438, 0x6535, 0xa438, 0xd40d, + 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xcb14, 0xa438, 0xa004, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0xa00a, + 0xa438, 0xa780, 0xa438, 0xd14a, 0xa438, 0xd048, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x6206, + 0xa438, 0xd702, 0xa438, 0x5f47, 0xa438, 0x800a, 0xa438, 0xa004, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0x0c03, + 0xa438, 0x0902, 0xa438, 0x1800, 0xa438, 0x8064, 0xa438, 0x800a, + 0xa438, 0xd40e, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xb920, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, + 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x7f8c, 0xa438, 0xd701, 0xa438, 0x6073, 0xa438, 0xd701, + 0xa438, 0x4216, 0xa438, 0xa004, 0xa438, 0x1000, 0xa438, 0x0a42, + 0xa438, 0x8004, 0xa438, 0xa001, 0xa438, 0x1000, 0xa438, 0x0a42, + 0xa438, 0x8001, 0xa438, 0xd120, 0xa438, 0xd040, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x8504, + 0xa438, 0xcb21, 0xa438, 0xa301, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd700, 0xa438, 0x5f9f, 0xa438, 0x8301, 0xa438, 0xd704, + 0xa438, 0x40e0, 0xa438, 0xd196, 0xa438, 0xd04d, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb22, + 0xa438, 0x1000, 0xa438, 0x0a6d, 0xa438, 0x0c03, 0xa438, 0x1502, + 0xa438, 0xa640, 0xa438, 0x9503, 0xa438, 0x8910, 0xa438, 0x8720, + 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d01, + 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0x1000, + 0xa438, 0x0a7d, 0xa438, 0x0c1f, 0xa438, 0x0f14, 0xa438, 0xcb23, + 0xa438, 0x8fc0, 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xaf40, + 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0x0cc0, 0xa438, 0x0f80, + 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xafc0, 0xa438, 0x1000, + 0xa438, 0x0a25, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd701, + 0xa438, 0x5dee, 0xa438, 0xcb24, 0xa438, 0x8f1f, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd701, 0xa438, 0x7f6e, 0xa438, 0xa111, + 0xa438, 0xa215, 0xa438, 0xa401, 0xa438, 0x8404, 0xa438, 0xa720, + 0xa438, 0xcb25, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8640, + 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x0b43, 0xa438, 0x1000, + 0xa438, 0x0b86, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xb920, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, + 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x7f8c, 0xa438, 0xcb26, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x5f82, 0xa438, 0x8111, 0xa438, 0x8205, + 0xa438, 0x8404, 0xa438, 0xcb27, 0xa438, 0xd404, 0xa438, 0x1000, + 0xa438, 0x0a37, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, + 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02, + 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xa710, 0xa438, 0xa104, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8104, 0xa438, 0xa001, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0xa120, + 0xa438, 0xaa0f, 0xa438, 0x8110, 0xa438, 0xa284, 0xa438, 0xa404, + 0xa438, 0xa00a, 0xa438, 0xd193, 0xa438, 0xd046, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb28, + 0xa438, 0xa110, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fa8, 0xa438, 0x8110, 0xa438, 0x8284, 0xa438, 0xa404, + 0xa438, 0x800a, 0xa438, 0x8710, 0xa438, 0xb804, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f82, 0xa438, 0x9804, + 0xa438, 0xcb29, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x5f85, 0xa438, 0xa710, 0xa438, 0xb820, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f65, 0xa438, 0x9820, + 0xa438, 0xcb2a, 0xa438, 0xa190, 0xa438, 0xa284, 0xa438, 0xa404, + 0xa438, 0xa00a, 0xa438, 0xd13d, 0xa438, 0xd04a, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x8149, + 0xa438, 0xa220, 0xa438, 0xd1a0, 0xa438, 0xd040, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x8151, + 0xa438, 0xd702, 0xa438, 0x5f51, 0xa438, 0xcb2f, 0xa438, 0xa302, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd708, 0xa438, 0x5f63, + 0xa438, 0xd411, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0x8302, + 0xa438, 0xd409, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xb920, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, + 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x7f8c, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x5fa3, 0xa438, 0x8190, 0xa438, 0x82a4, 0xa438, 0x8404, + 0xa438, 0x800a, 0xa438, 0xb808, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x7fa3, 0xa438, 0x9808, 0xa438, 0x1800, + 0xa438, 0x0433, 0xa438, 0xcb15, 0xa438, 0xa508, 0xa438, 0xd700, + 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0xf003, + 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0x1000, 0xa438, 0x0a7d, + 0xa438, 0x1000, 0xa438, 0x0a4d, 0xa438, 0xa301, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5f9f, 0xa438, 0x8301, + 0xa438, 0xd704, 0xa438, 0x40e0, 0xa438, 0xd115, 0xa438, 0xd04f, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, + 0xa438, 0xd413, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xcb16, + 0xa438, 0x1000, 0xa438, 0x0a6d, 0xa438, 0x0c03, 0xa438, 0x1502, + 0xa438, 0xa640, 0xa438, 0x9503, 0xa438, 0x8720, 0xa438, 0xd17a, + 0xa438, 0xd04c, 0xa438, 0x0c1f, 0xa438, 0x0f14, 0xa438, 0xcb17, + 0xa438, 0x8fc0, 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xaf40, + 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0x0cc0, 0xa438, 0x0f80, + 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xafc0, 0xa438, 0x1000, + 0xa438, 0x0a25, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd701, + 0xa438, 0x61ce, 0xa438, 0xd700, 0xa438, 0x5db4, 0xa438, 0xcb18, + 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8640, 0xa438, 0x9503, + 0xa438, 0xa720, 0xa438, 0x1000, 0xa438, 0x0b43, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xffd6, 0xa438, 0x8f1f, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd701, 0xa438, 0x7f8e, 0xa438, 0xa131, + 0xa438, 0xaa0f, 0xa438, 0xa2d5, 0xa438, 0xa407, 0xa438, 0xa720, + 0xa438, 0x8310, 0xa438, 0xa308, 0xa438, 0x8308, 0xa438, 0xcb19, + 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8640, 0xa438, 0x9503, + 0xa438, 0x1000, 0xa438, 0x0b43, 0xa438, 0x1000, 0xa438, 0x0b86, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xb920, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, 0xa438, 0x9920, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8c, + 0xa438, 0xcb1a, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x5f82, 0xa438, 0x8111, 0xa438, 0x82c5, 0xa438, 0xa404, + 0xa438, 0x8402, 0xa438, 0xb804, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x7f82, 0xa438, 0x9804, 0xa438, 0xcb1b, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5f85, + 0xa438, 0xa710, 0xa438, 0xb820, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x7f65, 0xa438, 0x9820, 0xa438, 0xcb1c, + 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d02, + 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02, 0xa438, 0x1000, + 0xa438, 0x0a7d, 0xa438, 0xa110, 0xa438, 0xa284, 0xa438, 0xa404, + 0xa438, 0x8402, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fa8, 0xa438, 0xcb1d, 0xa438, 0xa180, 0xa438, 0xa402, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa8, + 0xa438, 0xa220, 0xa438, 0xd1f5, 0xa438, 0xd049, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x8221, + 0xa438, 0xd702, 0xa438, 0x5f51, 0xa438, 0xb920, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, 0xa438, 0x9920, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8c, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fa3, + 0xa438, 0xa504, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, + 0xa438, 0x0d00, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d00, + 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xa00a, 0xa438, 0x8190, + 0xa438, 0x82a4, 0xa438, 0x8402, 0xa438, 0xa404, 0xa438, 0xb808, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7fa3, + 0xa438, 0x9808, 0xa438, 0xcb2b, 0xa438, 0xcb2c, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5f84, 0xa438, 0xd14a, + 0xa438, 0xd048, 0xa438, 0xa780, 0xa438, 0xcb2d, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5f94, 0xa438, 0x6208, + 0xa438, 0xd702, 0xa438, 0x5f27, 0xa438, 0x800a, 0xa438, 0xa004, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001, + 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0x0c03, + 0xa438, 0x0902, 0xa438, 0xa00a, 0xa438, 0xffe9, 0xa438, 0xcb2e, + 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d02, + 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02, 0xa438, 0x1000, + 0xa438, 0x0a7d, 0xa438, 0xa190, 0xa438, 0xa284, 0xa438, 0xa406, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa8, + 0xa438, 0xa220, 0xa438, 0xd1a0, 0xa438, 0xd040, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x827d, + 0xa438, 0xd702, 0xa438, 0x5f51, 0xa438, 0xcb2f, 0xa438, 0xa302, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd708, 0xa438, 0x5f63, + 0xa438, 0xd411, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0x8302, + 0xa438, 0xd409, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xb920, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, + 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x7f8c, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x5fa3, 0xa438, 0x8190, 0xa438, 0x82a4, 0xa438, 0x8406, + 0xa438, 0x800a, 0xa438, 0xb808, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x7fa3, 0xa438, 0x9808, 0xa438, 0x1800, + 0xa438, 0x0433, 0xa438, 0xcb30, 0xa438, 0x8380, 0xa438, 0xcb31, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5f86, + 0xa438, 0x9308, 0xa438, 0xb204, 0xa438, 0xb301, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd701, 0xa438, 0x5fa2, 0xa438, 0xb302, + 0xa438, 0x9204, 0xa438, 0xcb32, 0xa438, 0xd408, 0xa438, 0x1000, + 0xa438, 0x0a37, 0xa438, 0xd141, 0xa438, 0xd043, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xd704, + 0xa438, 0x4ccc, 0xa438, 0xd700, 0xa438, 0x4c81, 0xa438, 0xd702, + 0xa438, 0x609e, 0xa438, 0xd1e5, 0xa438, 0xd04d, 0xa438, 0xf003, + 0xa438, 0xd1e5, 0xa438, 0xd04d, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xd700, 0xa438, 0x6083, + 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0xf003, 0xa438, 0x0c1f, + 0xa438, 0x0d01, 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0x8710, + 0xa438, 0xa108, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8108, + 0xa438, 0xa203, 0xa438, 0x8120, 0xa438, 0x8a0f, 0xa438, 0xa111, + 0xa438, 0x8204, 0xa438, 0xa140, 0xa438, 0x1000, 0xa438, 0x0a42, + 0xa438, 0x8140, 0xa438, 0xd17a, 0xa438, 0xd04b, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xa204, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa7, + 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x5fac, 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x7f8c, 0xa438, 0xd404, 0xa438, 0x1000, + 0xa438, 0x0a37, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, + 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02, + 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xa710, 0xa438, 0x8101, + 0xa438, 0x8201, 0xa438, 0xa104, 0xa438, 0x1000, 0xa438, 0x0a42, + 0xa438, 0x8104, 0xa438, 0xa120, 0xa438, 0xaa0f, 0xa438, 0x8110, + 0xa438, 0xa284, 0xa438, 0xa404, 0xa438, 0xa00a, 0xa438, 0xd193, + 0xa438, 0xd047, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fb4, 0xa438, 0xa110, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd700, 0xa438, 0x5fa8, 0xa438, 0xa180, 0xa438, 0xd13d, + 0xa438, 0xd04a, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fb4, 0xa438, 0xf024, 0xa438, 0xa710, 0xa438, 0xa00a, + 0xa438, 0x8190, 0xa438, 0x8204, 0xa438, 0xa280, 0xa438, 0xa404, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa7, + 0xa438, 0x8710, 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x5fac, 0xa438, 0x9920, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8c, 0xa438, 0x800a, + 0xa438, 0x8190, 0xa438, 0x8284, 0xa438, 0x8406, 0xa438, 0xd700, + 0xa438, 0x4121, 0xa438, 0xd701, 0xa438, 0x60f3, 0xa438, 0xd1e5, + 0xa438, 0xd04d, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fb4, 0xa438, 0x8710, 0xa438, 0xa00a, 0xa438, 0x8190, + 0xa438, 0x8204, 0xa438, 0xa280, 0xa438, 0xa404, 0xa438, 0xb920, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, + 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, + 0xa438, 0x7f8c, 0xa438, 0xcb33, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd71f, 0xa438, 0x5f85, 0xa438, 0xa710, 0xa438, 0xb820, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f65, + 0xa438, 0x9820, 0xa438, 0xcb34, 0xa438, 0xa00a, 0xa438, 0xa190, + 0xa438, 0xa284, 0xa438, 0xa404, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd700, 0xa438, 0x5fa9, 0xa438, 0xd701, 0xa438, 0x6853, + 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d00, + 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d00, 0xa438, 0x1000, + 0xa438, 0x0a7d, 0xa438, 0x8190, 0xa438, 0x8284, 0xa438, 0xcb35, + 0xa438, 0xd407, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0x8110, + 0xa438, 0x8204, 0xa438, 0xa280, 0xa438, 0xa00a, 0xa438, 0xd704, + 0xa438, 0x4215, 0xa438, 0xa304, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd700, 0xa438, 0x5fb8, 0xa438, 0xd1c3, 0xa438, 0xd043, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, + 0xa438, 0x8304, 0xa438, 0xd700, 0xa438, 0x4109, 0xa438, 0xf01e, + 0xa438, 0xcb36, 0xa438, 0xd412, 0xa438, 0x1000, 0xa438, 0x0a37, + 0xa438, 0xd700, 0xa438, 0x6309, 0xa438, 0xd702, 0xa438, 0x42c7, + 0xa438, 0x800a, 0xa438, 0x8180, 0xa438, 0x8280, 0xa438, 0x8404, + 0xa438, 0xa004, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, + 0xa438, 0xa001, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, + 0xa438, 0x0c03, 0xa438, 0x0902, 0xa438, 0xa00a, 0xa438, 0xd14a, + 0xa438, 0xd048, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fb4, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, + 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02, + 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xcc55, 0xa438, 0xcb37, + 0xa438, 0xa00a, 0xa438, 0xa190, 0xa438, 0xa2a4, 0xa438, 0xa404, + 0xa438, 0xd700, 0xa438, 0x6041, 0xa438, 0xa402, 0xa438, 0xd13d, + 0xa438, 0xd04a, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fb4, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, + 0xa438, 0x5fa9, 0xa438, 0xd702, 0xa438, 0x5f71, 0xa438, 0xcb38, + 0xa438, 0x8224, 0xa438, 0xa288, 0xa438, 0x8180, 0xa438, 0xa110, + 0xa438, 0xa404, 0xa438, 0x800a, 0xa438, 0xd700, 0xa438, 0x6041, + 0xa438, 0x8402, 0xa438, 0xd415, 0xa438, 0x1000, 0xa438, 0x0a37, + 0xa438, 0xd13d, 0xa438, 0xd04a, 0xa438, 0x1000, 0xa438, 0x0a5e, + 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb39, 0xa438, 0xa00a, + 0xa438, 0xa190, 0xa438, 0xa2a0, 0xa438, 0xa404, 0xa438, 0xd700, + 0xa438, 0x6041, 0xa438, 0xa402, 0xa438, 0xd17a, 0xa438, 0xd047, + 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, + 0xa438, 0x1800, 0xa438, 0x0560, 0xa438, 0xa111, 0xa438, 0x0000, + 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0xd3f5, + 0xa438, 0xd219, 0xa438, 0x1000, 0xa438, 0x0c31, 0xa438, 0xd708, + 0xa438, 0x5fa5, 0xa438, 0xa215, 0xa438, 0xd30e, 0xa438, 0xd21a, + 0xa438, 0x1000, 0xa438, 0x0c31, 0xa438, 0xd708, 0xa438, 0x63e9, + 0xa438, 0xd708, 0xa438, 0x5f65, 0xa438, 0xd708, 0xa438, 0x7f36, + 0xa438, 0xa004, 0xa438, 0x1000, 0xa438, 0x0c35, 0xa438, 0x8004, + 0xa438, 0xa001, 0xa438, 0x1000, 0xa438, 0x0c35, 0xa438, 0x8001, + 0xa438, 0xd708, 0xa438, 0x4098, 0xa438, 0xd102, 0xa438, 0x9401, + 0xa438, 0xf003, 0xa438, 0xd103, 0xa438, 0xb401, 0xa438, 0x1000, + 0xa438, 0x0c27, 0xa438, 0xa108, 0xa438, 0x1000, 0xa438, 0x0c35, + 0xa438, 0x8108, 0xa438, 0x8110, 0xa438, 0x8294, 0xa438, 0xa202, + 0xa438, 0x1800, 0xa438, 0x0bdb, 0xa438, 0xd39c, 0xa438, 0xd210, + 0xa438, 0x1000, 0xa438, 0x0c31, 0xa438, 0xd708, 0xa438, 0x5fa5, + 0xa438, 0xd39c, 0xa438, 0xd210, 0xa438, 0x1000, 0xa438, 0x0c31, + 0xa438, 0xd708, 0xa438, 0x5fa5, 0xa438, 0x1000, 0xa438, 0x0c31, + 0xa438, 0xd708, 0xa438, 0x29b5, 0xa438, 0x840e, 0xa438, 0xd708, + 0xa438, 0x5f4a, 0xa438, 0x0c1f, 0xa438, 0x1014, 0xa438, 0x1000, + 0xa438, 0x0c31, 0xa438, 0xd709, 0xa438, 0x7fa4, 0xa438, 0x901f, + 0xa438, 0x1800, 0xa438, 0x0c23, 0xa438, 0xcb43, 0xa438, 0xa508, + 0xa438, 0xd701, 0xa438, 0x3699, 0xa438, 0x844a, 0xa438, 0xa504, + 0xa438, 0xa190, 0xa438, 0xa2a0, 0xa438, 0xa404, 0xa438, 0xa00a, + 0xa438, 0xd700, 0xa438, 0x2109, 0xa438, 0x05ea, 0xa438, 0xa402, + 0xa438, 0x1800, 0xa438, 0x05ea, 0xa438, 0xcb90, 0xa438, 0x0cf0, + 0xa438, 0x0ca0, 0xa438, 0x1800, 0xa438, 0x06db, 0xa438, 0xd1ff, + 0xa438, 0xd052, 0xa438, 0xa508, 0xa438, 0x8718, 0xa438, 0xa00a, + 0xa438, 0xa190, 0xa438, 0xa2a0, 0xa438, 0xa404, 0xa438, 0x0cf0, + 0xa438, 0x0c50, 0xa438, 0x1800, 0xa438, 0x09ef, 0xa438, 0x1000, + 0xa438, 0x0a5e, 0xa438, 0xd704, 0xa438, 0x2e70, 0xa438, 0x06da, + 0xa438, 0xd700, 0xa438, 0x5f55, 0xa438, 0xa90c, 0xa438, 0x1800, + 0xa438, 0x0645, 0xa436, 0xA10E, 0xa438, 0x0644, 0xa436, 0xA10C, + 0xa438, 0x09e9, 0xa436, 0xA10A, 0xa438, 0x06da, 0xa436, 0xA108, + 0xa438, 0x05e1, 0xa436, 0xA106, 0xa438, 0x0be4, 0xa436, 0xA104, + 0xa438, 0x0435, 0xa436, 0xA102, 0xa438, 0x0141, 0xa436, 0xA100, + 0xa438, 0x026d, 0xa436, 0xA110, 0xa438, 0x00ff, 0xa436, 0xb87c, + 0xa438, 0x85fe, 0xa436, 0xb87e, 0xa438, 0xaf86, 0xa438, 0x16af, + 0xa438, 0x8699, 0xa438, 0xaf86, 0xa438, 0xe5af, 0xa438, 0x86f9, + 0xa438, 0xaf87, 0xa438, 0x7aaf, 0xa438, 0x883a, 0xa438, 0xaf88, + 0xa438, 0x58af, 0xa438, 0x8b6c, 0xa438, 0xd48b, 0xa438, 0x7c02, + 0xa438, 0x8644, 0xa438, 0x2c00, 0xa438, 0x503c, 0xa438, 0xffd6, + 0xa438, 0xac27, 0xa438, 0x18e1, 0xa438, 0x82fe, 0xa438, 0xad28, + 0xa438, 0x0cd4, 0xa438, 0x8b84, 0xa438, 0x0286, 0xa438, 0x442c, + 0xa438, 0x003c, 0xa438, 0xac27, 0xa438, 0x06ee, 0xa438, 0x8299, + 0xa438, 0x01ae, 0xa438, 0x04ee, 0xa438, 0x8299, 0xa438, 0x00af, + 0xa438, 0x23dc, 0xa438, 0xf9fa, 0xa438, 0xcefa, 0xa438, 0xfbef, + 0xa438, 0x79fb, 0xa438, 0xc4bf, 0xa438, 0x8b76, 0xa438, 0x026c, + 0xa438, 0x6dac, 0xa438, 0x2804, 0xa438, 0xd203, 0xa438, 0xae02, + 0xa438, 0xd201, 0xa438, 0xbdd8, 0xa438, 0x19d9, 0xa438, 0xef94, + 0xa438, 0x026c, 0xa438, 0x6d78, 0xa438, 0x03ef, 0xa438, 0x648a, + 0xa438, 0x0002, 0xa438, 0xbdd8, 0xa438, 0x19d9, 0xa438, 0xef94, + 0xa438, 0x026c, 0xa438, 0x6d78, 0xa438, 0x03ef, 0xa438, 0x7402, + 0xa438, 0x72cd, 0xa438, 0xac50, 0xa438, 0x02ef, 0xa438, 0x643a, + 0xa438, 0x019f, 0xa438, 0xe4ef, 0xa438, 0x4678, 0xa438, 0x03ac, + 0xa438, 0x2002, 0xa438, 0xae02, 0xa438, 0xd0ff, 0xa438, 0xffef, + 0xa438, 0x97ff, 0xa438, 0xfec6, 0xa438, 0xfefd, 0xa438, 0x041f, + 0xa438, 0x771f, 0xa438, 0x221c, 0xa438, 0x450d, 0xa438, 0x481f, + 0xa438, 0x00ac, 0xa438, 0x7f04, 0xa438, 0x1a94, 0xa438, 0xae08, + 0xa438, 0x1a94, 0xa438, 0xac7f, 0xa438, 0x03d7, 0xa438, 0x0100, + 0xa438, 0xef46, 0xa438, 0x0d48, 0xa438, 0x1f00, 0xa438, 0x1c45, + 0xa438, 0xef69, 0xa438, 0xef57, 0xa438, 0xef74, 0xa438, 0x0272, + 0xa438, 0xe8a7, 0xa438, 0xffff, 0xa438, 0x0d1a, 0xa438, 0x941b, + 0xa438, 0x979e, 0xa438, 0x072d, 0xa438, 0x0100, 0xa438, 0x1a64, + 0xa438, 0xef76, 0xa438, 0xef97, 0xa438, 0x0d98, 0xa438, 0xd400, + 0xa438, 0xff1d, 0xa438, 0x941a, 0xa438, 0x89cf, 0xa438, 0x1a75, + 0xa438, 0xaf74, 0xa438, 0xf9bf, 0xa438, 0x8b79, 0xa438, 0x026c, + 0xa438, 0x6da1, 0xa438, 0x0005, 0xa438, 0xe180, 0xa438, 0xa0ae, + 0xa438, 0x03e1, 0xa438, 0x80a1, 0xa438, 0xaf26, 0xa438, 0x9aac, + 0xa438, 0x284d, 0xa438, 0xe08f, 0xa438, 0xffef, 0xa438, 0x10c0, + 0xa438, 0xe08f, 0xa438, 0xfe10, 0xa438, 0x1b08, 0xa438, 0xa000, + 0xa438, 0x04c8, 0xa438, 0xaf40, 0xa438, 0x67c8, 0xa438, 0xbf8b, + 0xa438, 0x8c02, 0xa438, 0x6c4e, 0xa438, 0xc4bf, 0xa438, 0x8b8f, + 0xa438, 0x026c, 0xa438, 0x6def, 0xa438, 0x74e0, 0xa438, 0x830c, + 0xa438, 0xad20, 0xa438, 0x0302, 0xa438, 0x74ac, 0xa438, 0xccef, + 0xa438, 0x971b, 0xa438, 0x76ad, 0xa438, 0x5f02, 0xa438, 0xae13, + 0xa438, 0xef69, 0xa438, 0xef30, 0xa438, 0x1b32, 0xa438, 0xc4ef, + 0xa438, 0x46e4, 0xa438, 0x8ffb, 0xa438, 0xe58f, 0xa438, 0xfce7, + 0xa438, 0x8ffd, 0xa438, 0xcc10, 0xa438, 0x11ae, 0xa438, 0xb8d1, + 0xa438, 0x00a1, 0xa438, 0x1f03, 0xa438, 0xaf40, 0xa438, 0x4fbf, + 0xa438, 0x8b8c, 0xa438, 0x026c, 0xa438, 0x4ec4, 0xa438, 0xbf8b, + 0xa438, 0x8f02, 0xa438, 0x6c6d, 0xa438, 0xef74, 0xa438, 0xe083, + 0xa438, 0x0cad, 0xa438, 0x2003, 0xa438, 0x0274, 0xa438, 0xaccc, + 0xa438, 0xef97, 0xa438, 0x1b76, 0xa438, 0xad5f, 0xa438, 0x02ae, + 0xa438, 0x04ef, 0xa438, 0x69ef, 0xa438, 0x3111, 0xa438, 0xaed1, + 0xa438, 0x0287, 0xa438, 0x80af, 0xa438, 0x2293, 0xa438, 0xf8f9, + 0xa438, 0xfafb, 0xa438, 0xef59, 0xa438, 0xe080, 0xa438, 0x13ad, + 0xa438, 0x252f, 0xa438, 0xbf88, 0xa438, 0x2802, 0xa438, 0x6c6d, + 0xa438, 0xef64, 0xa438, 0x1f44, 0xa438, 0xe18f, 0xa438, 0xb91b, + 0xa438, 0x64ad, 0xa438, 0x4f1d, 0xa438, 0xd688, 0xa438, 0x2bd7, + 0xa438, 0x882e, 0xa438, 0x0274, 0xa438, 0x73ad, 0xa438, 0x5008, + 0xa438, 0xbf88, 0xa438, 0x3102, 0xa438, 0x737c, 0xa438, 0xae03, + 0xa438, 0x0287, 0xa438, 0xd0bf, 0xa438, 0x882b, 0xa438, 0x0273, + 0xa438, 0x73e0, 0xa438, 0x824c, 0xa438, 0xf621, 0xa438, 0xe482, + 0xa438, 0x4cbf, 0xa438, 0x8834, 0xa438, 0x0273, 0xa438, 0x7cef, + 0xa438, 0x95ff, 0xa438, 0xfefd, 0xa438, 0xfc04, 0xa438, 0xf8f9, + 0xa438, 0xfafb, 0xa438, 0xef79, 0xa438, 0xbf88, 0xa438, 0x1f02, + 0xa438, 0x737c, 0xa438, 0x1f22, 0xa438, 0xac32, 0xa438, 0x31ef, + 0xa438, 0x12bf, 0xa438, 0x8822, 0xa438, 0x026c, 0xa438, 0x4ed6, + 0xa438, 0x8fba, 0xa438, 0x1f33, 0xa438, 0xac3c, 0xa438, 0x1eef, + 0xa438, 0x13bf, 0xa438, 0x8837, 0xa438, 0x026c, 0xa438, 0x4eef, + 0xa438, 0x96d8, 0xa438, 0x19d9, 0xa438, 0xbf88, 0xa438, 0x2502, + 0xa438, 0x6c4e, 0xa438, 0xbf88, 0xa438, 0x2502, 0xa438, 0x6c4e, + 0xa438, 0x1616, 0xa438, 0x13ae, 0xa438, 0xdf12, 0xa438, 0xaecc, + 0xa438, 0xbf88, 0xa438, 0x1f02, 0xa438, 0x7373, 0xa438, 0xef97, + 0xa438, 0xfffe, 0xa438, 0xfdfc, 0xa438, 0x0466, 0xa438, 0xac88, + 0xa438, 0x54ac, 0xa438, 0x88f0, 0xa438, 0xac8a, 0xa438, 0x92ac, + 0xa438, 0xbadd, 0xa438, 0xac6c, 0xa438, 0xeeac, 0xa438, 0x6cff, + 0xa438, 0xad02, 0xa438, 0x99ac, 0xa438, 0x0030, 0xa438, 0xac88, + 0xa438, 0xd4c3, 0xa438, 0x5000, 0xa438, 0x0000, 0xa438, 0x0000, + 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, + 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x00b4, 0xa438, 0xecee, + 0xa438, 0x8298, 0xa438, 0x00af, 0xa438, 0x1412, 0xa438, 0xf8bf, + 0xa438, 0x8b5d, 0xa438, 0x026c, 0xa438, 0x6d58, 0xa438, 0x03e1, + 0xa438, 0x8fb8, 0xa438, 0x2901, 0xa438, 0xe58f, 0xa438, 0xb8a0, + 0xa438, 0x0049, 0xa438, 0xef47, 0xa438, 0xe483, 0xa438, 0x02e5, + 0xa438, 0x8303, 0xa438, 0xbfc2, 0xa438, 0x5f1a, 0xa438, 0x95f7, + 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00d8, 0xa438, 0xf605, + 0xa438, 0x1f11, 0xa438, 0xef60, 0xa438, 0xbf8b, 0xa438, 0x3002, + 0xa438, 0x6c4e, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c6d, + 0xa438, 0xf728, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e, + 0xa438, 0xf628, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e, + 0xa438, 0x0c64, 0xa438, 0xef46, 0xa438, 0xbf8b, 0xa438, 0x6002, + 0xa438, 0x6c4e, 0xa438, 0x0289, 0xa438, 0x9902, 0xa438, 0x3920, + 0xa438, 0xaf89, 0xa438, 0x96a0, 0xa438, 0x0149, 0xa438, 0xef47, + 0xa438, 0xe483, 0xa438, 0x04e5, 0xa438, 0x8305, 0xa438, 0xbfc2, + 0xa438, 0x5f1a, 0xa438, 0x95f7, 0xa438, 0x05ee, 0xa438, 0xffd2, + 0xa438, 0x00d8, 0xa438, 0xf605, 0xa438, 0x1f11, 0xa438, 0xef60, + 0xa438, 0xbf8b, 0xa438, 0x3002, 0xa438, 0x6c4e, 0xa438, 0xbf8b, + 0xa438, 0x3302, 0xa438, 0x6c6d, 0xa438, 0xf729, 0xa438, 0xbf8b, + 0xa438, 0x3302, 0xa438, 0x6c4e, 0xa438, 0xf629, 0xa438, 0xbf8b, + 0xa438, 0x3302, 0xa438, 0x6c4e, 0xa438, 0x0c64, 0xa438, 0xef46, + 0xa438, 0xbf8b, 0xa438, 0x6302, 0xa438, 0x6c4e, 0xa438, 0x0289, + 0xa438, 0x9902, 0xa438, 0x3920, 0xa438, 0xaf89, 0xa438, 0x96a0, + 0xa438, 0x0249, 0xa438, 0xef47, 0xa438, 0xe483, 0xa438, 0x06e5, + 0xa438, 0x8307, 0xa438, 0xbfc2, 0xa438, 0x5f1a, 0xa438, 0x95f7, + 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00d8, 0xa438, 0xf605, + 0xa438, 0x1f11, 0xa438, 0xef60, 0xa438, 0xbf8b, 0xa438, 0x3002, + 0xa438, 0x6c4e, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c6d, + 0xa438, 0xf72a, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e, + 0xa438, 0xf62a, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e, + 0xa438, 0x0c64, 0xa438, 0xef46, 0xa438, 0xbf8b, 0xa438, 0x6602, + 0xa438, 0x6c4e, 0xa438, 0x0289, 0xa438, 0x9902, 0xa438, 0x3920, + 0xa438, 0xaf89, 0xa438, 0x96ef, 0xa438, 0x47e4, 0xa438, 0x8308, + 0xa438, 0xe583, 0xa438, 0x09bf, 0xa438, 0xc25f, 0xa438, 0x1a95, + 0xa438, 0xf705, 0xa438, 0xeeff, 0xa438, 0xd200, 0xa438, 0xd8f6, + 0xa438, 0x051f, 0xa438, 0x11ef, 0xa438, 0x60bf, 0xa438, 0x8b30, + 0xa438, 0x026c, 0xa438, 0x4ebf, 0xa438, 0x8b33, 0xa438, 0x026c, + 0xa438, 0x6df7, 0xa438, 0x2bbf, 0xa438, 0x8b33, 0xa438, 0x026c, + 0xa438, 0x4ef6, 0xa438, 0x2bbf, 0xa438, 0x8b33, 0xa438, 0x026c, + 0xa438, 0x4e0c, 0xa438, 0x64ef, 0xa438, 0x46bf, 0xa438, 0x8b69, + 0xa438, 0x026c, 0xa438, 0x4e02, 0xa438, 0x8999, 0xa438, 0x0239, + 0xa438, 0x20af, 0xa438, 0x8996, 0xa438, 0xaf39, 0xa438, 0x1ef8, + 0xa438, 0xf9fa, 0xa438, 0xe08f, 0xa438, 0xb838, 0xa438, 0x02ad, + 0xa438, 0x2702, 0xa438, 0xae03, 0xa438, 0xaf8b, 0xa438, 0x201f, + 0xa438, 0x66ef, 0xa438, 0x65bf, 0xa438, 0xc21f, 0xa438, 0x1a96, + 0xa438, 0xf705, 0xa438, 0xeeff, 0xa438, 0xd200, 0xa438, 0xdaf6, + 0xa438, 0x05bf, 0xa438, 0xc22f, 0xa438, 0x1a96, 0xa438, 0xf705, + 0xa438, 0xeeff, 0xa438, 0xd200, 0xa438, 0xdbf6, 0xa438, 0x05ef, + 0xa438, 0x021f, 0xa438, 0x110d, 0xa438, 0x42bf, 0xa438, 0x8b3c, + 0xa438, 0x026c, 0xa438, 0x4eef, 0xa438, 0x021b, 0xa438, 0x031f, + 0xa438, 0x110d, 0xa438, 0x42bf, 0xa438, 0x8b36, 0xa438, 0x026c, + 0xa438, 0x4eef, 0xa438, 0x021a, 0xa438, 0x031f, 0xa438, 0x110d, + 0xa438, 0x42bf, 0xa438, 0x8b39, 0xa438, 0x026c, 0xa438, 0x4ebf, + 0xa438, 0xc23f, 0xa438, 0x1a96, 0xa438, 0xf705, 0xa438, 0xeeff, + 0xa438, 0xd200, 0xa438, 0xdaf6, 0xa438, 0x05bf, 0xa438, 0xc24f, + 0xa438, 0x1a96, 0xa438, 0xf705, 0xa438, 0xeeff, 0xa438, 0xd200, + 0xa438, 0xdbf6, 0xa438, 0x05ef, 0xa438, 0x021f, 0xa438, 0x110d, + 0xa438, 0x42bf, 0xa438, 0x8b45, 0xa438, 0x026c, 0xa438, 0x4eef, + 0xa438, 0x021b, 0xa438, 0x031f, 0xa438, 0x110d, 0xa438, 0x42bf, + 0xa438, 0x8b3f, 0xa438, 0x026c, 0xa438, 0x4eef, 0xa438, 0x021a, + 0xa438, 0x031f, 0xa438, 0x110d, 0xa438, 0x42bf, 0xa438, 0x8b42, + 0xa438, 0x026c, 0xa438, 0x4eef, 0xa438, 0x56d0, 0xa438, 0x201f, + 0xa438, 0x11bf, 0xa438, 0x8b4e, 0xa438, 0x026c, 0xa438, 0x4ebf, + 0xa438, 0x8b48, 0xa438, 0x026c, 0xa438, 0x4ebf, 0xa438, 0x8b4b, + 0xa438, 0x026c, 0xa438, 0x4ee1, 0xa438, 0x8578, 0xa438, 0xef03, + 0xa438, 0x480a, 0xa438, 0x2805, 0xa438, 0xef20, 0xa438, 0x1b01, + 0xa438, 0xad27, 0xa438, 0x3f1f, 0xa438, 0x44e0, 0xa438, 0x8560, + 0xa438, 0xe185, 0xa438, 0x61bf, 0xa438, 0x8b51, 0xa438, 0x026c, + 0xa438, 0x4ee0, 0xa438, 0x8566, 0xa438, 0xe185, 0xa438, 0x67bf, + 0xa438, 0x8b54, 0xa438, 0x026c, 0xa438, 0x4ee0, 0xa438, 0x856c, + 0xa438, 0xe185, 0xa438, 0x6dbf, 0xa438, 0x8b57, 0xa438, 0x026c, + 0xa438, 0x4ee0, 0xa438, 0x8572, 0xa438, 0xe185, 0xa438, 0x73bf, + 0xa438, 0x8b5a, 0xa438, 0x026c, 0xa438, 0x4ee1, 0xa438, 0x8fb8, + 0xa438, 0x5900, 0xa438, 0xf728, 0xa438, 0xe58f, 0xa438, 0xb8af, + 0xa438, 0x8b2c, 0xa438, 0xe185, 0xa438, 0x791b, 0xa438, 0x21ad, + 0xa438, 0x373e, 0xa438, 0x1f44, 0xa438, 0xe085, 0xa438, 0x62e1, + 0xa438, 0x8563, 0xa438, 0xbf8b, 0xa438, 0x5102, 0xa438, 0x6c4e, + 0xa438, 0xe085, 0xa438, 0x68e1, 0xa438, 0x8569, 0xa438, 0xbf8b, + 0xa438, 0x5402, 0xa438, 0x6c4e, 0xa438, 0xe085, 0xa438, 0x6ee1, + 0xa438, 0x856f, 0xa438, 0xbf8b, 0xa438, 0x5702, 0xa438, 0x6c4e, + 0xa438, 0xe085, 0xa438, 0x74e1, 0xa438, 0x8575, 0xa438, 0xbf8b, + 0xa438, 0x5a02, 0xa438, 0x6c4e, 0xa438, 0xe18f, 0xa438, 0xb859, + 0xa438, 0x00f7, 0xa438, 0x28e5, 0xa438, 0x8fb8, 0xa438, 0xae4a, + 0xa438, 0x1f44, 0xa438, 0xe085, 0xa438, 0x64e1, 0xa438, 0x8565, + 0xa438, 0xbf8b, 0xa438, 0x5102, 0xa438, 0x6c4e, 0xa438, 0xe085, + 0xa438, 0x6ae1, 0xa438, 0x856b, 0xa438, 0xbf8b, 0xa438, 0x5402, + 0xa438, 0x6c4e, 0xa438, 0xe085, 0xa438, 0x70e1, 0xa438, 0x8571, + 0xa438, 0xbf8b, 0xa438, 0x5702, 0xa438, 0x6c4e, 0xa438, 0xe085, + 0xa438, 0x76e1, 0xa438, 0x8577, 0xa438, 0xbf8b, 0xa438, 0x5a02, + 0xa438, 0x6c4e, 0xa438, 0xe18f, 0xa438, 0xb859, 0xa438, 0x00f7, + 0xa438, 0x28e5, 0xa438, 0x8fb8, 0xa438, 0xae0c, 0xa438, 0xe18f, + 0xa438, 0xb839, 0xa438, 0x04ac, 0xa438, 0x2f04, 0xa438, 0xee8f, + 0xa438, 0xb800, 0xa438, 0xfefd, 0xa438, 0xfc04, 0xa438, 0xf0ac, + 0xa438, 0x8efc, 0xa438, 0xac8c, 0xa438, 0xf0ac, 0xa438, 0xfaf0, + 0xa438, 0xacf8, 0xa438, 0xf0ac, 0xa438, 0xf6f0, 0xa438, 0xad00, + 0xa438, 0xf0ac, 0xa438, 0xfef0, 0xa438, 0xacfc, 0xa438, 0xf0ac, + 0xa438, 0xf4f0, 0xa438, 0xacf2, 0xa438, 0xf0ac, 0xa438, 0xf0f0, + 0xa438, 0xacb0, 0xa438, 0xf0ac, 0xa438, 0xaef0, 0xa438, 0xacac, + 0xa438, 0xf0ac, 0xa438, 0xaaf0, 0xa438, 0xacee, 0xa438, 0xf0b0, + 0xa438, 0x24f0, 0xa438, 0xb0a4, 0xa438, 0xf0b1, 0xa438, 0x24f0, + 0xa438, 0xb1a4, 0xa438, 0xee8f, 0xa438, 0xb800, 0xa438, 0xd400, + 0xa438, 0x00af, 0xa438, 0x3976, 0xa438, 0x66ac, 0xa438, 0xeabb, + 0xa438, 0xa430, 0xa438, 0x6e50, 0xa438, 0x6e53, 0xa438, 0x6e56, + 0xa438, 0x6e59, 0xa438, 0x6e5c, 0xa438, 0x6e5f, 0xa438, 0x6e62, + 0xa438, 0x6e65, 0xa438, 0xd9ac, 0xa438, 0x70f0, 0xa438, 0xac6a, + 0xa436, 0xb85e, 0xa438, 0x23b7, 0xa436, 0xb860, 0xa438, 0x74db, + 0xa436, 0xb862, 0xa438, 0x268c, 0xa436, 0xb864, 0xa438, 0x3FE5, + 0xa436, 0xb886, 0xa438, 0x2250, 0xa436, 0xb888, 0xa438, 0x140e, + 0xa436, 0xb88a, 0xa438, 0x3696, 0xa436, 0xb88c, 0xa438, 0x3973, + 0xa436, 0xb838, 0xa438, 0x00ff, 0xb820, 0x0010, 0xa436, 0x8464, + 0xa438, 0xaf84, 0xa438, 0x7caf, 0xa438, 0x8485, 0xa438, 0xaf85, + 0xa438, 0x13af, 0xa438, 0x851e, 0xa438, 0xaf85, 0xa438, 0xb9af, + 0xa438, 0x8684, 0xa438, 0xaf87, 0xa438, 0x01af, 0xa438, 0x8701, + 0xa438, 0xac38, 0xa438, 0x03af, 0xa438, 0x38bb, 0xa438, 0xaf38, + 0xa438, 0xc302, 0xa438, 0x4618, 0xa438, 0xbf85, 0xa438, 0x0a02, + 0xa438, 0x54b7, 0xa438, 0xbf85, 0xa438, 0x1002, 0xa438, 0x54c0, + 0xa438, 0xd400, 0xa438, 0x0fbf, 0xa438, 0x8507, 0xa438, 0x024f, + 0xa438, 0x48bf, 0xa438, 0x8504, 0xa438, 0x024f, 0xa438, 0x6759, + 0xa438, 0xf0a1, 0xa438, 0x3008, 0xa438, 0xbf85, 0xa438, 0x0d02, + 0xa438, 0x54c0, 0xa438, 0xae06, 0xa438, 0xbf85, 0xa438, 0x0d02, + 0xa438, 0x54b7, 0xa438, 0xbf85, 0xa438, 0x0402, 0xa438, 0x4f67, + 0xa438, 0xa183, 0xa438, 0x02ae, 0xa438, 0x15a1, 0xa438, 0x8502, + 0xa438, 0xae10, 0xa438, 0x59f0, 0xa438, 0xa180, 0xa438, 0x16bf, + 0xa438, 0x8501, 0xa438, 0x024f, 0xa438, 0x67a1, 0xa438, 0x381b, + 0xa438, 0xae0b, 0xa438, 0xe18f, 0xa438, 0xffbf, 0xa438, 0x84fe, + 0xa438, 0x024f, 0xa438, 0x48ae, 0xa438, 0x17bf, 0xa438, 0x84fe, + 0xa438, 0x0254, 0xa438, 0xb7bf, 0xa438, 0x84fb, 0xa438, 0x0254, + 0xa438, 0xb7ae, 0xa438, 0x09a1, 0xa438, 0x5006, 0xa438, 0xbf84, + 0xa438, 0xfb02, 0xa438, 0x54c0, 0xa438, 0xaf04, 0xa438, 0x4700, + 0xa438, 0xad34, 0xa438, 0xfdad, 0xa438, 0x0670, 0xa438, 0xae14, + 0xa438, 0xf0a6, 0xa438, 0x00b8, 0xa438, 0xbd32, 0xa438, 0x30bd, + 0xa438, 0x30aa, 0xa438, 0xbd2c, 0xa438, 0xccbd, 0xa438, 0x2ca1, + 0xa438, 0x0705, 0xa438, 0xec80, 0xa438, 0xaf40, 0xa438, 0xf7af, + 0xa438, 0x40f5, 0xa438, 0xd101, 0xa438, 0xbf85, 0xa438, 0xa402, + 0xa438, 0x4f48, 0xa438, 0xbf85, 0xa438, 0xa702, 0xa438, 0x54c0, + 0xa438, 0xd10f, 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48, + 0xa438, 0x024d, 0xa438, 0x6abf, 0xa438, 0x85ad, 0xa438, 0x024f, + 0xa438, 0x67bf, 0xa438, 0x8ff7, 0xa438, 0xddbf, 0xa438, 0x85b0, + 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ff8, 0xa438, 0xddbf, + 0xa438, 0x85b3, 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ff9, + 0xa438, 0xddbf, 0xa438, 0x85b6, 0xa438, 0x024f, 0xa438, 0x67bf, + 0xa438, 0x8ffa, 0xa438, 0xddd1, 0xa438, 0x00bf, 0xa438, 0x85aa, + 0xa438, 0x024f, 0xa438, 0x4802, 0xa438, 0x4d6a, 0xa438, 0xbf85, + 0xa438, 0xad02, 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfbdd, + 0xa438, 0xbf85, 0xa438, 0xb002, 0xa438, 0x4f67, 0xa438, 0xbf8f, + 0xa438, 0xfcdd, 0xa438, 0xbf85, 0xa438, 0xb302, 0xa438, 0x4f67, + 0xa438, 0xbf8f, 0xa438, 0xfddd, 0xa438, 0xbf85, 0xa438, 0xb602, + 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfedd, 0xa438, 0xbf85, + 0xa438, 0xa702, 0xa438, 0x54b7, 0xa438, 0xbf85, 0xa438, 0xa102, + 0xa438, 0x54b7, 0xa438, 0xaf3c, 0xa438, 0x2066, 0xa438, 0xb800, + 0xa438, 0xb8bd, 0xa438, 0x30ee, 0xa438, 0xbd2c, 0xa438, 0xb8bd, + 0xa438, 0x7040, 0xa438, 0xbd86, 0xa438, 0xc8bd, 0xa438, 0x8640, + 0xa438, 0xbd88, 0xa438, 0xc8bd, 0xa438, 0x8802, 0xa438, 0x1929, + 0xa438, 0xa202, 0xa438, 0x02ae, 0xa438, 0x03a2, 0xa438, 0x032e, + 0xa438, 0xd10f, 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48, + 0xa438, 0xe18f, 0xa438, 0xf7bf, 0xa438, 0x85ad, 0xa438, 0x024f, + 0xa438, 0x48e1, 0xa438, 0x8ff8, 0xa438, 0xbf85, 0xa438, 0xb002, + 0xa438, 0x4f48, 0xa438, 0xe18f, 0xa438, 0xf9bf, 0xa438, 0x85b3, + 0xa438, 0x024f, 0xa438, 0x48e1, 0xa438, 0x8ffa, 0xa438, 0xbf85, + 0xa438, 0xb602, 0xa438, 0x4f48, 0xa438, 0xae2c, 0xa438, 0xd100, + 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48, 0xa438, 0xe18f, + 0xa438, 0xfbbf, 0xa438, 0x85ad, 0xa438, 0x024f, 0xa438, 0x48e1, + 0xa438, 0x8ffc, 0xa438, 0xbf85, 0xa438, 0xb002, 0xa438, 0x4f48, + 0xa438, 0xe18f, 0xa438, 0xfdbf, 0xa438, 0x85b3, 0xa438, 0x024f, + 0xa438, 0x48e1, 0xa438, 0x8ffe, 0xa438, 0xbf85, 0xa438, 0xb602, + 0xa438, 0x4f48, 0xa438, 0xbf86, 0xa438, 0x7e02, 0xa438, 0x4f67, + 0xa438, 0xa100, 0xa438, 0x02ae, 0xa438, 0x25a1, 0xa438, 0x041d, + 0xa438, 0xe18f, 0xa438, 0xf1bf, 0xa438, 0x8675, 0xa438, 0x024f, + 0xa438, 0x48e1, 0xa438, 0x8ff2, 0xa438, 0xbf86, 0xa438, 0x7802, + 0xa438, 0x4f48, 0xa438, 0xe18f, 0xa438, 0xf3bf, 0xa438, 0x867b, + 0xa438, 0x024f, 0xa438, 0x48ae, 0xa438, 0x29a1, 0xa438, 0x070b, + 0xa438, 0xae24, 0xa438, 0xbf86, 0xa438, 0x8102, 0xa438, 0x4f67, + 0xa438, 0xad28, 0xa438, 0x1be1, 0xa438, 0x8ff4, 0xa438, 0xbf86, + 0xa438, 0x7502, 0xa438, 0x4f48, 0xa438, 0xe18f, 0xa438, 0xf5bf, + 0xa438, 0x8678, 0xa438, 0x024f, 0xa438, 0x48e1, 0xa438, 0x8ff6, + 0xa438, 0xbf86, 0xa438, 0x7b02, 0xa438, 0x4f48, 0xa438, 0xaf09, + 0xa438, 0x8420, 0xa438, 0xbc32, 0xa438, 0x20bc, 0xa438, 0x3e76, + 0xa438, 0xbc08, 0xa438, 0xfda6, 0xa438, 0x1a00, 0xa438, 0xb64e, + 0xa438, 0xd101, 0xa438, 0xbf85, 0xa438, 0xa402, 0xa438, 0x4f48, + 0xa438, 0xbf85, 0xa438, 0xa702, 0xa438, 0x54c0, 0xa438, 0xd10f, + 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48, 0xa438, 0x024d, + 0xa438, 0x6abf, 0xa438, 0x85ad, 0xa438, 0x024f, 0xa438, 0x67bf, + 0xa438, 0x8ff7, 0xa438, 0xddbf, 0xa438, 0x85b0, 0xa438, 0x024f, + 0xa438, 0x67bf, 0xa438, 0x8ff8, 0xa438, 0xddbf, 0xa438, 0x85b3, + 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ff9, 0xa438, 0xddbf, + 0xa438, 0x85b6, 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ffa, + 0xa438, 0xddd1, 0xa438, 0x00bf, 0xa438, 0x85aa, 0xa438, 0x024f, + 0xa438, 0x4802, 0xa438, 0x4d6a, 0xa438, 0xbf85, 0xa438, 0xad02, + 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfbdd, 0xa438, 0xbf85, + 0xa438, 0xb002, 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfcdd, + 0xa438, 0xbf85, 0xa438, 0xb302, 0xa438, 0x4f67, 0xa438, 0xbf8f, + 0xa438, 0xfddd, 0xa438, 0xbf85, 0xa438, 0xb602, 0xa438, 0x4f67, + 0xa438, 0xbf8f, 0xa438, 0xfedd, 0xa438, 0xbf85, 0xa438, 0xa702, + 0xa438, 0x54b7, 0xa438, 0xaf00, 0xa438, 0x8800, 0xa436, 0xb818, + 0xa438, 0x38b8, 0xa436, 0xb81a, 0xa438, 0x0444, 0xa436, 0xb81c, + 0xa438, 0x40ee, 0xa436, 0xb81e, 0xa438, 0x3C1A, 0xa436, 0xb850, + 0xa438, 0x0981, 0xa436, 0xb852, 0xa438, 0x0085, 0xa436, 0xb878, + 0xa438, 0xffff, 0xa436, 0xb884, 0xa438, 0xffff, 0xa436, 0xb832, + 0xa438, 0x003f, 0xa436, 0x0000, 0xa438, 0x0000, 0xa436, 0xB82E, + 0xa438, 0x0000, 0xa436, 0x8024, 0xa438, 0x0000, 0xb820, 0x0000, + 0xa436, 0x801E, 0xa438, 0x0021, 0xFFFF, 0xFFFF +}; + +static const u16 phy_mcu_ram_code_8125b_2[] = { + 0xa436, 0x8024, 0xa438, 0x3701, 0xa436, 0xB82E, 0xa438, 0x0001, + 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012, + 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, + 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x8024, + 0xa438, 0x1800, 0xa438, 0x802f, 0xa438, 0x1800, 0xa438, 0x8051, + 0xa438, 0x1800, 0xa438, 0x8057, 0xa438, 0x1800, 0xa438, 0x8063, + 0xa438, 0x1800, 0xa438, 0x8068, 0xa438, 0xd093, 0xa438, 0xd1c4, + 0xa438, 0x1000, 0xa438, 0x135c, 0xa438, 0xd704, 0xa438, 0x5fbc, + 0xa438, 0xd504, 0xa438, 0xc9f1, 0xa438, 0x1800, 0xa438, 0x0fc9, + 0xa438, 0xbb50, 0xa438, 0xd505, 0xa438, 0xa202, 0xa438, 0xd504, + 0xa438, 0x8c0f, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1519, + 0xa438, 0x1800, 0xa438, 0x1548, 0xa438, 0x2f70, 0xa438, 0x802a, + 0xa438, 0x2f73, 0xa438, 0x156a, 0xa438, 0x1800, 0xa438, 0x155c, + 0xa438, 0xd505, 0xa438, 0xa202, 0xa438, 0xd500, 0xa438, 0x1800, + 0xa438, 0x1551, 0xa438, 0xc0c1, 0xa438, 0xc0c0, 0xa438, 0xd05a, + 0xa438, 0xd1ba, 0xa438, 0xd701, 0xa438, 0x2529, 0xa438, 0x022a, + 0xa438, 0xd0a7, 0xa438, 0xd1b9, 0xa438, 0xa208, 0xa438, 0x1000, + 0xa438, 0x080e, 0xa438, 0xd701, 0xa438, 0x408b, 0xa438, 0x1000, + 0xa438, 0x0a65, 0xa438, 0xf003, 0xa438, 0x1000, 0xa438, 0x0a6b, + 0xa438, 0xd701, 0xa438, 0x1000, 0xa438, 0x0920, 0xa438, 0x1000, + 0xa438, 0x0915, 0xa438, 0x1000, 0xa438, 0x0909, 0xa438, 0x228f, + 0xa438, 0x8038, 0xa438, 0x9801, 0xa438, 0xd71e, 0xa438, 0x5d61, + 0xa438, 0xd701, 0xa438, 0x1800, 0xa438, 0x022a, 0xa438, 0x2005, + 0xa438, 0x091a, 0xa438, 0x3bd9, 0xa438, 0x0919, 0xa438, 0x1800, + 0xa438, 0x0916, 0xa438, 0x1000, 0xa438, 0x14c5, 0xa438, 0xd703, + 0xa438, 0x3181, 0xa438, 0x8061, 0xa438, 0x60ad, 0xa438, 0x1000, + 0xa438, 0x135c, 0xa438, 0xd703, 0xa438, 0x5fba, 0xa438, 0x1800, + 0xa438, 0x0cc7, 0xa438, 0xd096, 0xa438, 0xd1a9, 0xa438, 0xd503, + 0xa438, 0x1800, 0xa438, 0x0c94, 0xa436, 0xA026, 0xa438, 0xffff, + 0xa436, 0xA024, 0xa438, 0x0c93, 0xa436, 0xA022, 0xa438, 0x0cc5, + 0xa436, 0xA020, 0xa438, 0x0915, 0xa436, 0xA006, 0xa438, 0x020a, + 0xa436, 0xA004, 0xa438, 0x155b, 0xa436, 0xA002, 0xa438, 0x1542, + 0xa436, 0xA000, 0xa438, 0x0fc7, 0xa436, 0xA008, 0xa438, 0x7f00, + 0xa436, 0xA016, 0xa438, 0x0010, 0xa436, 0xA012, 0xa438, 0x0000, + 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800, + 0xa438, 0x801d, 0xa438, 0x1800, 0xa438, 0x802c, 0xa438, 0x1800, + 0xa438, 0x802c, 0xa438, 0x1800, 0xa438, 0x802c, 0xa438, 0x1800, + 0xa438, 0x802c, 0xa438, 0x1800, 0xa438, 0x802c, 0xa438, 0x1800, + 0xa438, 0x802c, 0xa438, 0xd700, 0xa438, 0x6090, 0xa438, 0x60d1, + 0xa438, 0xc95c, 0xa438, 0xf007, 0xa438, 0x60b1, 0xa438, 0xc95a, + 0xa438, 0xf004, 0xa438, 0xc956, 0xa438, 0xf002, 0xa438, 0xc94e, + 0xa438, 0x1800, 0xa438, 0x00cd, 0xa438, 0xd700, 0xa438, 0x6090, + 0xa438, 0x60d1, 0xa438, 0xc95c, 0xa438, 0xf007, 0xa438, 0x60b1, + 0xa438, 0xc95a, 0xa438, 0xf004, 0xa438, 0xc956, 0xa438, 0xf002, + 0xa438, 0xc94e, 0xa438, 0x1000, 0xa438, 0x022a, 0xa438, 0x1800, + 0xa438, 0x0132, 0xa436, 0xA08E, 0xa438, 0xffff, 0xa436, 0xA08C, + 0xa438, 0xffff, 0xa436, 0xA08A, 0xa438, 0xffff, 0xa436, 0xA088, + 0xa438, 0xffff, 0xa436, 0xA086, 0xa438, 0xffff, 0xa436, 0xA084, + 0xa438, 0xffff, 0xa436, 0xA082, 0xa438, 0x012f, 0xa436, 0xA080, + 0xa438, 0x00cc, 0xa436, 0xA090, 0xa438, 0x0103, 0xa436, 0xA016, + 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014, + 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x801e, + 0xa438, 0x1800, 0xa438, 0x8026, 0xa438, 0x1800, 0xa438, 0x802f, + 0xa438, 0x1800, 0xa438, 0x8036, 0xa438, 0x1800, 0xa438, 0x8036, + 0xa438, 0x1800, 0xa438, 0x8036, 0xa438, 0x1800, 0xa438, 0x8036, + 0xa438, 0xd107, 0xa438, 0xd042, 0xa438, 0xa404, 0xa438, 0xd700, + 0xa438, 0x5ff4, 0xa438, 0x8280, 0xa438, 0xd700, 0xa438, 0x6065, + 0xa438, 0xd125, 0xa438, 0xf002, 0xa438, 0xd12b, 0xa438, 0xd040, + 0xa438, 0x1800, 0xa438, 0x077f, 0xa438, 0x0cf0, 0xa438, 0x0c50, + 0xa438, 0xd104, 0xa438, 0xd040, 0xa438, 0xd700, 0xa438, 0x5ff4, + 0xa438, 0x1800, 0xa438, 0x0a2e, 0xa438, 0xcb9b, 0xa438, 0xd110, + 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x0b7b, 0xa438, 0xd700, + 0xa438, 0x5ff4, 0xa438, 0x1800, 0xa438, 0x081b, 0xa438, 0x1000, + 0xa438, 0x09df, 0xa438, 0xd704, 0xa438, 0x7fb8, 0xa438, 0xa718, + 0xa438, 0x1800, 0xa438, 0x074e, 0xa436, 0xA10E, 0xa438, 0xffff, + 0xa436, 0xA10C, 0xa438, 0xffff, 0xa436, 0xA10A, 0xa438, 0xffff, + 0xa436, 0xA108, 0xa438, 0xffff, 0xa436, 0xA106, 0xa438, 0x074d, + 0xa436, 0xA104, 0xa438, 0x0818, 0xa436, 0xA102, 0xa438, 0x0a2c, + 0xa436, 0xA100, 0xa438, 0x077e, 0xa436, 0xA110, 0xa438, 0x000f, + 0xa436, 0xb87c, 0xa438, 0x8625, 0xa436, 0xb87e, 0xa438, 0xaf86, + 0xa438, 0x3daf, 0xa438, 0x8689, 0xa438, 0xaf88, 0xa438, 0x69af, + 0xa438, 0x8887, 0xa438, 0xaf88, 0xa438, 0x9caf, 0xa438, 0x889c, + 0xa438, 0xaf88, 0xa438, 0x9caf, 0xa438, 0x889c, 0xa438, 0xbf86, + 0xa438, 0x49d7, 0xa438, 0x0040, 0xa438, 0x0277, 0xa438, 0x7daf, + 0xa438, 0x2727, 0xa438, 0x0000, 0xa438, 0x7205, 0xa438, 0x0000, + 0xa438, 0x7208, 0xa438, 0x0000, 0xa438, 0x71f3, 0xa438, 0x0000, + 0xa438, 0x71f6, 0xa438, 0x0000, 0xa438, 0x7229, 0xa438, 0x0000, + 0xa438, 0x722c, 0xa438, 0x0000, 0xa438, 0x7217, 0xa438, 0x0000, + 0xa438, 0x721a, 0xa438, 0x0000, 0xa438, 0x721d, 0xa438, 0x0000, + 0xa438, 0x7211, 0xa438, 0x0000, 0xa438, 0x7220, 0xa438, 0x0000, + 0xa438, 0x7214, 0xa438, 0x0000, 0xa438, 0x722f, 0xa438, 0x0000, + 0xa438, 0x7223, 0xa438, 0x0000, 0xa438, 0x7232, 0xa438, 0x0000, + 0xa438, 0x7226, 0xa438, 0xf8f9, 0xa438, 0xfae0, 0xa438, 0x85b3, + 0xa438, 0x3802, 0xa438, 0xad27, 0xa438, 0x02ae, 0xa438, 0x03af, + 0xa438, 0x8830, 0xa438, 0x1f66, 0xa438, 0xef65, 0xa438, 0xbfc2, + 0xa438, 0x1f1a, 0xa438, 0x96f7, 0xa438, 0x05ee, 0xa438, 0xffd2, + 0xa438, 0x00da, 0xa438, 0xf605, 0xa438, 0xbfc2, 0xa438, 0x2f1a, + 0xa438, 0x96f7, 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00db, + 0xa438, 0xf605, 0xa438, 0xef02, 0xa438, 0x1f11, 0xa438, 0x0d42, + 0xa438, 0xbf88, 0xa438, 0x4202, 0xa438, 0x6e7d, 0xa438, 0xef02, + 0xa438, 0x1b03, 0xa438, 0x1f11, 0xa438, 0x0d42, 0xa438, 0xbf88, + 0xa438, 0x4502, 0xa438, 0x6e7d, 0xa438, 0xef02, 0xa438, 0x1a03, + 0xa438, 0x1f11, 0xa438, 0x0d42, 0xa438, 0xbf88, 0xa438, 0x4802, + 0xa438, 0x6e7d, 0xa438, 0xbfc2, 0xa438, 0x3f1a, 0xa438, 0x96f7, + 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00da, 0xa438, 0xf605, + 0xa438, 0xbfc2, 0xa438, 0x4f1a, 0xa438, 0x96f7, 0xa438, 0x05ee, + 0xa438, 0xffd2, 0xa438, 0x00db, 0xa438, 0xf605, 0xa438, 0xef02, + 0xa438, 0x1f11, 0xa438, 0x0d42, 0xa438, 0xbf88, 0xa438, 0x4b02, + 0xa438, 0x6e7d, 0xa438, 0xef02, 0xa438, 0x1b03, 0xa438, 0x1f11, + 0xa438, 0x0d42, 0xa438, 0xbf88, 0xa438, 0x4e02, 0xa438, 0x6e7d, + 0xa438, 0xef02, 0xa438, 0x1a03, 0xa438, 0x1f11, 0xa438, 0x0d42, + 0xa438, 0xbf88, 0xa438, 0x5102, 0xa438, 0x6e7d, 0xa438, 0xef56, + 0xa438, 0xd020, 0xa438, 0x1f11, 0xa438, 0xbf88, 0xa438, 0x5402, + 0xa438, 0x6e7d, 0xa438, 0xbf88, 0xa438, 0x5702, 0xa438, 0x6e7d, + 0xa438, 0xbf88, 0xa438, 0x5a02, 0xa438, 0x6e7d, 0xa438, 0xe185, + 0xa438, 0xa0ef, 0xa438, 0x0348, 0xa438, 0x0a28, 0xa438, 0x05ef, + 0xa438, 0x201b, 0xa438, 0x01ad, 0xa438, 0x2735, 0xa438, 0x1f44, + 0xa438, 0xe085, 0xa438, 0x88e1, 0xa438, 0x8589, 0xa438, 0xbf88, + 0xa438, 0x5d02, 0xa438, 0x6e7d, 0xa438, 0xe085, 0xa438, 0x8ee1, + 0xa438, 0x858f, 0xa438, 0xbf88, 0xa438, 0x6002, 0xa438, 0x6e7d, + 0xa438, 0xe085, 0xa438, 0x94e1, 0xa438, 0x8595, 0xa438, 0xbf88, + 0xa438, 0x6302, 0xa438, 0x6e7d, 0xa438, 0xe085, 0xa438, 0x9ae1, + 0xa438, 0x859b, 0xa438, 0xbf88, 0xa438, 0x6602, 0xa438, 0x6e7d, + 0xa438, 0xaf88, 0xa438, 0x3cbf, 0xa438, 0x883f, 0xa438, 0x026e, + 0xa438, 0x9cad, 0xa438, 0x2835, 0xa438, 0x1f44, 0xa438, 0xe08f, + 0xa438, 0xf8e1, 0xa438, 0x8ff9, 0xa438, 0xbf88, 0xa438, 0x5d02, + 0xa438, 0x6e7d, 0xa438, 0xe08f, 0xa438, 0xfae1, 0xa438, 0x8ffb, + 0xa438, 0xbf88, 0xa438, 0x6002, 0xa438, 0x6e7d, 0xa438, 0xe08f, + 0xa438, 0xfce1, 0xa438, 0x8ffd, 0xa438, 0xbf88, 0xa438, 0x6302, + 0xa438, 0x6e7d, 0xa438, 0xe08f, 0xa438, 0xfee1, 0xa438, 0x8fff, + 0xa438, 0xbf88, 0xa438, 0x6602, 0xa438, 0x6e7d, 0xa438, 0xaf88, + 0xa438, 0x3ce1, 0xa438, 0x85a1, 0xa438, 0x1b21, 0xa438, 0xad37, + 0xa438, 0x341f, 0xa438, 0x44e0, 0xa438, 0x858a, 0xa438, 0xe185, + 0xa438, 0x8bbf, 0xa438, 0x885d, 0xa438, 0x026e, 0xa438, 0x7de0, + 0xa438, 0x8590, 0xa438, 0xe185, 0xa438, 0x91bf, 0xa438, 0x8860, + 0xa438, 0x026e, 0xa438, 0x7de0, 0xa438, 0x8596, 0xa438, 0xe185, + 0xa438, 0x97bf, 0xa438, 0x8863, 0xa438, 0x026e, 0xa438, 0x7de0, + 0xa438, 0x859c, 0xa438, 0xe185, 0xa438, 0x9dbf, 0xa438, 0x8866, + 0xa438, 0x026e, 0xa438, 0x7dae, 0xa438, 0x401f, 0xa438, 0x44e0, + 0xa438, 0x858c, 0xa438, 0xe185, 0xa438, 0x8dbf, 0xa438, 0x885d, + 0xa438, 0x026e, 0xa438, 0x7de0, 0xa438, 0x8592, 0xa438, 0xe185, + 0xa438, 0x93bf, 0xa438, 0x8860, 0xa438, 0x026e, 0xa438, 0x7de0, + 0xa438, 0x8598, 0xa438, 0xe185, 0xa438, 0x99bf, 0xa438, 0x8863, + 0xa438, 0x026e, 0xa438, 0x7de0, 0xa438, 0x859e, 0xa438, 0xe185, + 0xa438, 0x9fbf, 0xa438, 0x8866, 0xa438, 0x026e, 0xa438, 0x7dae, + 0xa438, 0x0ce1, 0xa438, 0x85b3, 0xa438, 0x3904, 0xa438, 0xac2f, + 0xa438, 0x04ee, 0xa438, 0x85b3, 0xa438, 0x00af, 0xa438, 0x39d9, + 0xa438, 0x22ac, 0xa438, 0xeaf0, 0xa438, 0xacf6, 0xa438, 0xf0ac, + 0xa438, 0xfaf0, 0xa438, 0xacf8, 0xa438, 0xf0ac, 0xa438, 0xfcf0, + 0xa438, 0xad00, 0xa438, 0xf0ac, 0xa438, 0xfef0, 0xa438, 0xacf0, + 0xa438, 0xf0ac, 0xa438, 0xf4f0, 0xa438, 0xacf2, 0xa438, 0xf0ac, + 0xa438, 0xb0f0, 0xa438, 0xacae, 0xa438, 0xf0ac, 0xa438, 0xacf0, + 0xa438, 0xacaa, 0xa438, 0xa100, 0xa438, 0x0ce1, 0xa438, 0x8ff7, + 0xa438, 0xbf88, 0xa438, 0x8402, 0xa438, 0x6e7d, 0xa438, 0xaf26, + 0xa438, 0xe9e1, 0xa438, 0x8ff6, 0xa438, 0xbf88, 0xa438, 0x8402, + 0xa438, 0x6e7d, 0xa438, 0xaf26, 0xa438, 0xf520, 0xa438, 0xac86, + 0xa438, 0xbf88, 0xa438, 0x3f02, 0xa438, 0x6e9c, 0xa438, 0xad28, + 0xa438, 0x03af, 0xa438, 0x3324, 0xa438, 0xad38, 0xa438, 0x03af, + 0xa438, 0x32e6, 0xa438, 0xaf32, 0xa438, 0xfb00, 0xa436, 0xb87c, + 0xa438, 0x8ff6, 0xa436, 0xb87e, 0xa438, 0x0705, 0xa436, 0xb87c, + 0xa438, 0x8ff8, 0xa436, 0xb87e, 0xa438, 0x19cc, 0xa436, 0xb87c, + 0xa438, 0x8ffa, 0xa436, 0xb87e, 0xa438, 0x28e3, 0xa436, 0xb87c, + 0xa438, 0x8ffc, 0xa436, 0xb87e, 0xa438, 0x1047, 0xa436, 0xb87c, + 0xa438, 0x8ffe, 0xa436, 0xb87e, 0xa438, 0x0a45, 0xa436, 0xb85e, + 0xa438, 0x271E, 0xa436, 0xb860, 0xa438, 0x3846, 0xa436, 0xb862, + 0xa438, 0x26E6, 0xa436, 0xb864, 0xa438, 0x32E3, 0xa436, 0xb886, + 0xa438, 0xffff, 0xa436, 0xb888, 0xa438, 0xffff, 0xa436, 0xb88a, + 0xa438, 0xffff, 0xa436, 0xb88c, 0xa438, 0xffff, 0xa436, 0xb838, + 0xa438, 0x000f, 0xb820, 0x0010, 0xa436, 0x0000, 0xa438, 0x0000, + 0xa436, 0xB82E, 0xa438, 0x0000, 0xa436, 0x8024, 0xa438, 0x0000, + 0xb820, 0x0000, 0xa436, 0x801E, 0xa438, 0x0015, 0xFFFF, 0xFFFF +}; + +static void +rtl8125_real_set_phy_mcu_8125b_1(struct net_device *dev) +{ + rtl8125_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8125b_1, + ARRAY_SIZE(phy_mcu_ram_code_8125b_1) + ); +} + +static void +rtl8125_set_phy_mcu_8125b_1(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + + rtl8125_set_phy_mcu_patch_request(tp); + + rtl8125_real_set_phy_mcu_8125b_1(dev); + + rtl8125_clear_phy_mcu_patch_request(tp); +} + +static void +rtl8125_real_set_phy_mcu_8125b_2(struct net_device *dev) +{ + rtl8125_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8125b_2, + ARRAY_SIZE(phy_mcu_ram_code_8125b_2) + ); +} + +static void +rtl8125_set_phy_mcu_8125b_2(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + + rtl8125_set_phy_mcu_patch_request(tp); + + rtl8125_real_set_phy_mcu_8125b_2(dev); rtl8125_clear_phy_mcu_patch_request(tp); } @@ -6664,10 +7743,16 @@ rtl8125_init_hw_phy_mcu(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: - rtl8125_set_phy_mcu_8125_2(dev); + rtl8125_set_phy_mcu_8125a_1(dev); break; case CFG_METHOD_3: - rtl8125_set_phy_mcu_8125_3(dev); + rtl8125_set_phy_mcu_8125a_2(dev); + break; + case CFG_METHOD_4: + rtl8125_set_phy_mcu_8125b_1(dev); + break; + case CFG_METHOD_5: + rtl8125_set_phy_mcu_8125b_2(dev); break; } @@ -6681,6 +7766,917 @@ rtl8125_init_hw_phy_mcu(struct net_device *dev) tp->HwHasWrRamCodeToMicroP = TRUE; } +static void +rtl8125_enable_phy_aldps(struct rtl8125_private *tp) +{ + //enable aldps + //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps) + SetEthPhyOcpBit(tp, 0xA430, BIT_2); +} + +static void +rtl8125_hw_phy_config_8125a_1(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + + ClearAndSetEthPhyOcpBit(tp, + 0xAD40, + 0x03FF, + 0x84 + ); + + SetEthPhyOcpBit(tp, 0xAD4E, BIT_4); + ClearAndSetEthPhyOcpBit(tp, + 0xAD16, + 0x03FF, + 0x0006 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xAD32, + 0x003F, + 0x0006 + ); + ClearEthPhyOcpBit(tp, 0xAC08, BIT_12); + ClearEthPhyOcpBit(tp, 0xAC08, BIT_8); + ClearAndSetEthPhyOcpBit(tp, + 0xAC8A, + BIT_15|BIT_14|BIT_13|BIT_12, + BIT_14|BIT_13|BIT_12 + ); + SetEthPhyOcpBit(tp, 0xAD18, BIT_10); + SetEthPhyOcpBit(tp, 0xAD1A, 0x3FF); + SetEthPhyOcpBit(tp, 0xAD1C, 0x3FF); + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0xC400 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EB); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0x0700, + 0x0300 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F8); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x1C00 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F1); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x3000 + ); + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80FE); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0xA500 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8102); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x5000 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8105); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x3300 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8100); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x7000 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8104); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0xF000 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8106); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x6500 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DC); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0xED00 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DF); + SetEthPhyOcpBit(tp, 0xA438, BIT_8); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80E1); + ClearEthPhyOcpBit(tp, 0xA438, BIT_8); + + ClearAndSetEthPhyOcpBit(tp, + 0xBF06, + 0x003F, + 0x38 + ); + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x819F); + mdio_direct_write_phy_ocp(tp, 0xA438, 0xD0B6); + + mdio_direct_write_phy_ocp(tp, 0xBC34, 0x5555); + ClearAndSetEthPhyOcpBit(tp, + 0xBF0A, + BIT_11|BIT_10|BIT_9, + BIT_11|BIT_9 + ); + + ClearEthPhyOcpBit(tp, 0xA5C0, BIT_10); + + SetEthPhyOcpBit(tp, 0xA442, BIT_11); + + //enable aldps + //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps) + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8125_enable_phy_aldps(tp); + } + } +} + +static void +rtl8125_hw_phy_config_8125a_2(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + + SetEthPhyOcpBit(tp, 0xAD4E, BIT_4); + ClearAndSetEthPhyOcpBit(tp, + 0xAD16, + 0x03FF, + 0x03FF + ); + ClearAndSetEthPhyOcpBit(tp, + 0xAD32, + 0x003F, + 0x0006 + ); + ClearEthPhyOcpBit(tp, 0xAC08, BIT_12); + ClearEthPhyOcpBit(tp, 0xAC08, BIT_8); + ClearAndSetEthPhyOcpBit(tp, + 0xACC0, + BIT_1|BIT_0, + BIT_1 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xAD40, + BIT_7|BIT_6|BIT_5, + BIT_6 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xAD40, + BIT_2|BIT_1|BIT_0, + BIT_2 + ); + ClearEthPhyOcpBit(tp, 0xAC14, BIT_7); + ClearEthPhyOcpBit(tp, 0xAC80, BIT_9|BIT_8); + ClearAndSetEthPhyOcpBit(tp, + 0xAC5E, + BIT_2|BIT_1|BIT_0, + BIT_1 + ); + mdio_direct_write_phy_ocp(tp, 0xAD4C, 0x00A8); + mdio_direct_write_phy_ocp(tp, 0xAC5C, 0x01FF); + ClearAndSetEthPhyOcpBit(tp, + 0xAC8A, + BIT_7|BIT_6|BIT_5|BIT_4, + BIT_5|BIT_4 + ); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8157); + ClearAndSetEthPhyOcpBit(tp, + 0xB87E, + 0xFF00, + 0x0500 + ); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8159); + ClearAndSetEthPhyOcpBit(tp, + 0xB87E, + 0xFF00, + 0x0700 + ); + + + RTL_W16(tp, EEE_TXIDLE_TIMER_8125, 0x2400 + 0x20); + + + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80A2); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x809C); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153); + + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x81B3); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0043); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00A7); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00D6); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00EC); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00F6); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FB); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FD); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FF); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x00BB); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0058); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0029); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0013); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0009); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0004); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0002); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8257); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x020F); + + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x7843); + + + rtl8125_set_phy_mcu_patch_request(tp); + + ClearEthPhyOcpBit(tp, 0xB896, BIT_0); + ClearEthPhyOcpBit(tp, 0xB892, 0xFF00); + + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC091); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC092); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x1214); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC094); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x1516); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC096); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x171B); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC098); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x1B1C); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09A); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x1F1F); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09C); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x2021); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09E); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x2224); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A0); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A2); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A4); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC018); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x0AF2); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01A); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x0D4A); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01C); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x0F26); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01E); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x118D); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC020); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x14F3); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC022); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x175A); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC024); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x19C0); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC026); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x1C26); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC089); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x6050); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08A); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x5F6E); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08C); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08E); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC090); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12); + + SetEthPhyOcpBit(tp, 0xB896, BIT_0); + + rtl8125_clear_phy_mcu_patch_request(tp); + + + SetEthPhyOcpBit(tp, 0xD068, BIT_13); + + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x81A2); + SetEthPhyOcpBit(tp, 0xA438, BIT_8); + ClearAndSetEthPhyOcpBit(tp, + 0xB54C, + 0xFF00, + 0xDB00); + + + ClearEthPhyOcpBit(tp, 0xA454, BIT_0); + + + SetEthPhyOcpBit(tp, 0xA5D4, BIT_5); + ClearEthPhyOcpBit(tp, 0xAD4E, BIT_4); + ClearEthPhyOcpBit(tp, 0xA86A, BIT_0); + + + SetEthPhyOcpBit(tp, 0xA442, BIT_11); + + + if (tp->RequirePhyMdiSwapPatch) { + u16 adccal_offset_p0; + u16 adccal_offset_p1; + u16 adccal_offset_p2; + u16 adccal_offset_p3; + u16 rg_lpf_cap_xg_p0; + u16 rg_lpf_cap_xg_p1; + u16 rg_lpf_cap_xg_p2; + u16 rg_lpf_cap_xg_p3; + u16 rg_lpf_cap_p0; + u16 rg_lpf_cap_p1; + u16 rg_lpf_cap_p2; + u16 rg_lpf_cap_p3; + + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0007, + 0x0001 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0000 + ); + adccal_offset_p0 = mdio_direct_read_phy_ocp(tp, 0xD06A); + adccal_offset_p0 &= 0x07FF; + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0008 + ); + adccal_offset_p1 = mdio_direct_read_phy_ocp(tp, 0xD06A); + adccal_offset_p1 &= 0x07FF; + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0010 + ); + adccal_offset_p2 = mdio_direct_read_phy_ocp(tp, 0xD06A); + adccal_offset_p2 &= 0x07FF; + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0018 + ); + adccal_offset_p3 = mdio_direct_read_phy_ocp(tp, 0xD06A); + adccal_offset_p3 &= 0x07FF; + + + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0000 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD06A, + 0x07FF, + adccal_offset_p3 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0008 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD06A, + 0x07FF, + adccal_offset_p2 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0010 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD06A, + 0x07FF, + adccal_offset_p1 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD068, + 0x0018, + 0x0018 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xD06A, + 0x07FF, + adccal_offset_p0 + ); + + + rg_lpf_cap_xg_p0 = mdio_direct_read_phy_ocp(tp, 0xBD5A); + rg_lpf_cap_xg_p0 &= 0x001F; + rg_lpf_cap_xg_p1 = mdio_direct_read_phy_ocp(tp, 0xBD5A); + rg_lpf_cap_xg_p1 &= 0x1F00; + rg_lpf_cap_xg_p2 = mdio_direct_read_phy_ocp(tp, 0xBD5C); + rg_lpf_cap_xg_p2 &= 0x001F; + rg_lpf_cap_xg_p3 = mdio_direct_read_phy_ocp(tp, 0xBD5C); + rg_lpf_cap_xg_p3 &= 0x1F00; + rg_lpf_cap_p0 = mdio_direct_read_phy_ocp(tp, 0xBC18); + rg_lpf_cap_p0 &= 0x001F; + rg_lpf_cap_p1 = mdio_direct_read_phy_ocp(tp, 0xBC18); + rg_lpf_cap_p1 &= 0x1F00; + rg_lpf_cap_p2 = mdio_direct_read_phy_ocp(tp, 0xBC1A); + rg_lpf_cap_p2 &= 0x001F; + rg_lpf_cap_p3 = mdio_direct_read_phy_ocp(tp, 0xBC1A); + rg_lpf_cap_p3 &= 0x1F00; + + + ClearAndSetEthPhyOcpBit(tp, + 0xBD5A, + 0x001F, + rg_lpf_cap_xg_p3 >> 8 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xBD5A, + 0x1F00, + rg_lpf_cap_xg_p2 << 8 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xBD5C, + 0x001F, + rg_lpf_cap_xg_p1 >> 8 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xBD5C, + 0x1F00, + rg_lpf_cap_xg_p0 << 8 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xBC18, + 0x001F, + rg_lpf_cap_p3 >> 8 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xBC18, + 0x1F00, + rg_lpf_cap_p2 << 8 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xBC1A, + 0x001F, + rg_lpf_cap_p1 >> 8 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xBC1A, + 0x1F00, + rg_lpf_cap_p0 << 8 + ); + } + + + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8125_enable_phy_aldps(tp); + } + } +} + +static void +rtl8125_hw_phy_config_8125b_1(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + + SetEthPhyOcpBit(tp, 0xA442, BIT_11); + + + SetEthPhyOcpBit(tp, 0xBC08, (BIT_3 | BIT_2)); + + + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FFF); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x0400 + ); + } + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8560); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x19CC); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8562); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x19CC); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8564); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x19CC); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8566); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x147D); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8568); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x147D); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x856A); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x147D); + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFE); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0907); + } + ClearAndSetEthPhyOcpBit(tp, + 0xACDA, + 0xFF00, + 0xFF00 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xACDE, + 0xF000, + 0xF000 + ); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80D6); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x2801); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80F2); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x2801); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80F4); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6077); + mdio_direct_write_phy_ocp(tp, 0xB506, 0x01E7); + mdio_direct_write_phy_ocp(tp, 0xAC8C, 0x0FFC); + mdio_direct_write_phy_ocp(tp, 0xAC46, 0xB7B4); + mdio_direct_write_phy_ocp(tp, 0xAC50, 0x0FBC); + mdio_direct_write_phy_ocp(tp, 0xAC3C, 0x9240); + mdio_direct_write_phy_ocp(tp, 0xAC4E, 0x0DB4); + mdio_direct_write_phy_ocp(tp, 0xACC6, 0x0707); + mdio_direct_write_phy_ocp(tp, 0xACC8, 0xA0D3); + mdio_direct_write_phy_ocp(tp, 0xAD08, 0x0007); + + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8013); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0700); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FB9); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x2801); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FBA); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0100); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FBC); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x1900); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FBE); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xE100); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC0); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0800); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC2); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xE500); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC4); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0F00); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC6); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF100); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC8); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0400); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FCa); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF300); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FCc); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFD00); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FCe); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFF00); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD0); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFB00); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD2); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0100); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD4); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF400); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD6); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFF00); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD8); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF600); + + + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x813D); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x390E); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814F); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x790E); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80B0); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0F31); + SetEthPhyOcpBit(tp, 0xBF4C, BIT_1); + SetEthPhyOcpBit(tp, 0xBCCA, (BIT_9 | BIT_8)); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8141); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x320E); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8153); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x720E); + ClearEthPhyOcpBit(tp, 0xA432, BIT_6); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8529); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x050E); + + + RTL_W16(tp, EEE_TXIDLE_TIMER_8125, 0x2400 + 0x20); + + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x816C); + mdio_direct_write_phy_ocp(tp, 0xA438, 0xC4A0); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8170); + mdio_direct_write_phy_ocp(tp, 0xA438, 0xC4A0); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8174); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x04A0); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8178); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x04A0); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x817C); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0719); + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FF4); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0400); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FF1); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0404); + } + mdio_direct_write_phy_ocp(tp, 0xBF4A, 0x001B); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8033); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8037); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x803B); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFC32); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x803F); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8043); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8047); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13); + + + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8145); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x370E); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8157); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x770E); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8169); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0D0A); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x817B); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x1D0A); + + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x8217); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x5000 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x821A); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x5000 + ); + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DA); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0403); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DC); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x1000 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80B3); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x0384); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80B7); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x2007); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80BA); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x6C00 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80B5); + mdio_direct_write_phy_ocp(tp, 0xA438, 0xF009); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80BD); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x9F00 + ); + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80C7); + mdio_direct_write_phy_ocp(tp, 0xA438, 0xf083); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DD); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x03f0); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DF); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x1000 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80CB); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x2007); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80CE); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x6C00 + ); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80C9); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x8009); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80D1); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0x8000 + ); + + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A3); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x200A); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A5); + mdio_direct_write_phy_ocp(tp, 0xA438, 0xF0AD); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x809F); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x6073); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A1); + mdio_direct_write_phy_ocp(tp, 0xA438, 0x000B); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A9); + ClearAndSetEthPhyOcpBit(tp, + 0xA438, + 0xFF00, + 0xC000 + ); + + rtl8125_set_phy_mcu_patch_request(tp); + + ClearEthPhyOcpBit(tp, 0xB896, BIT_0); + ClearEthPhyOcpBit(tp, 0xB892, 0xFF00); + + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC23E); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x0000); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC240); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x0103); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC242); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x0507); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC244); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x090B); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC246); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x0C0E); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC248); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x1012); + mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC24A); + mdio_direct_write_phy_ocp(tp, 0xB890, 0x1416); + + SetEthPhyOcpBit(tp, 0xB896, BIT_0); + + rtl8125_clear_phy_mcu_patch_request(tp); + + + SetEthPhyOcpBit(tp, 0xA86A, BIT_0); + SetEthPhyOcpBit(tp, 0xA6F0, BIT_0); + + + mdio_direct_write_phy_ocp(tp, 0xBFA0, 0xD70D); + mdio_direct_write_phy_ocp(tp, 0xBFA2, 0x4100); + mdio_direct_write_phy_ocp(tp, 0xBFA4, 0xE868); + mdio_direct_write_phy_ocp(tp, 0xBFA6, 0xDC59); + mdio_direct_write_phy_ocp(tp, 0xB54C, 0x3C18); + ClearEthPhyOcpBit(tp, 0xBFA4, BIT_5); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x817D); + SetEthPhyOcpBit(tp, 0xA438, BIT_12); + + + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8125_enable_phy_aldps(tp); + } + } +} + +static void +rtl8125_hw_phy_config_8125b_2(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + + SetEthPhyOcpBit(tp, 0xA442, BIT_11); + + + ClearAndSetEthPhyOcpBit(tp, + 0xAC46, + 0x00F0, + 0x0090 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xAD30, + 0x0003, + 0x0001 + ); + + + RTL_W16(tp, EEE_TXIDLE_TIMER_8125, 0x2400 + 0x20); + + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80F5); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x760E); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8107); + mdio_direct_write_phy_ocp(tp, 0xB87E, 0x360E); + mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8551); + ClearAndSetEthPhyOcpBit(tp, + 0xB87E, + BIT_15 | BIT_14 | BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8, + BIT_11 + ); + + ClearAndSetEthPhyOcpBit(tp, + 0xbf00, + 0xE000, + 0xA000 + ); + ClearAndSetEthPhyOcpBit(tp, + 0xbf46, + 0x0F00, + 0x0300 + ); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x8044); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x804A); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x8050); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x8056); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x805C); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x8062); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x8068); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x806E); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x8074); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + mdio_direct_write_phy_ocp(tp, 0xa436, 0x807A); + mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417); + + + SetEthPhyOcpBit(tp, 0xA4CA, BIT_6); + + /* + mdio_direct_write_phy_ocp(tp, 0xBFA0, 0xD70D); + mdio_direct_write_phy_ocp(tp, 0xBFA2, 0x4100); + mdio_direct_write_phy_ocp(tp, 0xBFA4, 0xE868); + mdio_direct_write_phy_ocp(tp, 0xBFA6, 0xDC59); + mdio_direct_write_phy_ocp(tp, 0xB54C, 0x3C18); + ClearEthPhyOcpBit(tp, 0xBFA4, BIT_5); + mdio_direct_write_phy_ocp(tp, 0xA436, 0x817D); + SetEthPhyOcpBit(tp, 0xA438, BIT_12); + */ + + + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8125_enable_phy_aldps(tp); + } + } +} + +static void +rtl8125_set_hw_phy_before_init_phy_mcu(struct net_device *dev) +{ + struct rtl8125_private *tp = netdev_priv(dev); + u16 PhyRegValue; + + switch (tp->mcfg) { + case CFG_METHOD_4: + case CFG_METHOD_5: + mdio_direct_write_phy_ocp(tp, 0xBF86, 0x9000); + + SetEthPhyOcpBit(tp, 0xC402, BIT_10); + ClearEthPhyOcpBit(tp, 0xC402, BIT_10); + + PhyRegValue = mdio_direct_read_phy_ocp(tp, 0xBF86); + PhyRegValue &= (BIT_1 | BIT_0); + if (PhyRegValue != 0) + dprintk("PHY watch dog not clear, value = 0x%x \n", PhyRegValue); + + mdio_direct_write_phy_ocp(tp, 0xBD86, 0x1010); + mdio_direct_write_phy_ocp(tp, 0xBD88, 0x1010); + + ClearAndSetEthPhyOcpBit(tp, + 0xBD4E, + BIT_11 | BIT_10, + BIT_11); + ClearAndSetEthPhyOcpBit(tp, + 0xBF46, + BIT_11 | BIT_10 | BIT_9 | BIT_8, + BIT_10 | BIT_9 | BIT_8); + break; + } +} + static void rtl8125_hw_phy_config(struct net_device *dev) { @@ -6690,324 +8686,23 @@ rtl8125_hw_phy_config(struct net_device *dev) if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) return; + rtl8125_set_hw_phy_before_init_phy_mcu(dev); + rtl8125_init_hw_phy_mcu(dev); - if (tp->mcfg == CFG_METHOD_2) { - ClearAndSetEthPhyOcpBit(tp, - 0xAD40, - 0x03FF, - 0x84 - ); - - SetEthPhyOcpBit(tp, 0xAD4E, BIT_4); - ClearAndSetEthPhyOcpBit(tp, - 0xAD16, - 0x03FF, - 0x0006 - ); - ClearAndSetEthPhyOcpBit(tp, - 0xAD32, - 0x003F, - 0x0006 - ); - ClearEthPhyOcpBit(tp, 0xAC08, BIT_12); - ClearEthPhyOcpBit(tp, 0xAC08, BIT_8); - ClearAndSetEthPhyOcpBit(tp, - 0xAC8A, - BIT_15|BIT_14|BIT_13|BIT_12, - BIT_14|BIT_13|BIT_12 - ); - SetEthPhyOcpBit(tp, 0xAD18, BIT_10); - SetEthPhyOcpBit(tp, 0xAD1A, 0x3FF); - SetEthPhyOcpBit(tp, 0xAD1C, 0x3FF); - - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0xC400 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EB); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0x0700, - 0x0300 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F8); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0x1C00 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F1); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0x3000 - ); - - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80FE); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0xA500 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x8102); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0x5000 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x8105); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0x3300 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x8100); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0x7000 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x8104); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0xF000 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x8106); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0x6500 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DC); - ClearAndSetEthPhyOcpBit(tp, - 0xA438, - 0xFF00, - 0xED00 - ); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DF); - SetEthPhyOcpBit(tp, 0xA438, BIT_8); - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80E1); - ClearEthPhyOcpBit(tp, 0xA438, BIT_8); - - ClearAndSetEthPhyOcpBit(tp, - 0xBF06, - 0x003F, - 0x38 - ); - - mdio_direct_write_phy_ocp(tp, 0xA436, 0x819F); - mdio_direct_write_phy_ocp(tp, 0xA438, 0xD0B6); - - mdio_direct_write_phy_ocp(tp, 0xBC34, 0x5555); - ClearAndSetEthPhyOcpBit(tp, - 0xBF0A, - BIT_11|BIT_10|BIT_9, - BIT_11|BIT_9 - ); - - ClearEthPhyOcpBit(tp, 0xA5C0, BIT_10); - - SetEthPhyOcpBit(tp, 0xA442, BIT_11); - - //enable aldps - //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps) - if (aspm) { - if (tp->HwHasWrRamCodeToMicroP == TRUE) { - SetEthPhyOcpBit(tp, 0xA430, BIT_2); - } - } - } else if (tp->mcfg == CFG_METHOD_3) { - SetEthPhyOcpBit(tp, 0xAD4E, BIT_4); - ClearAndSetEthPhyOcpBit(tp, - 0xAD16, - 0x03FF, - 0x03FF - ); - ClearAndSetEthPhyOcpBit(tp, - 0xAD32, - 0x003F, - 0x0006 - ); - ClearEthPhyOcpBit(tp, 0xAC08, BIT_12); - ClearEthPhyOcpBit(tp, 0xAC08, BIT_8); - ClearAndSetEthPhyOcpBit(tp, - 0xACC0, - BIT_1|BIT_0, - BIT_1 - ); - ClearAndSetEthPhyOcpBit(tp, - 0xAD40, - BIT_7|BIT_6|BIT_5, - BIT_6 - ); - ClearAndSetEthPhyOcpBit(tp, - 0xAD40, - BIT_2|BIT_1|BIT_0, - BIT_2 - ); - ClearEthPhyOcpBit(tp, 0xAC14, BIT_7); - ClearEthPhyOcpBit(tp, 0xAC80, BIT_9|BIT_8); - ClearAndSetEthPhyOcpBit(tp, - 0xAC5E, - BIT_2|BIT_1|BIT_0, - BIT_1 - ); - mdio_direct_write_phy_ocp(tp, 0xAD4C, 0x00A8); - mdio_direct_write_phy_ocp(tp, 0xAC5C, 0x01FF); - ClearAndSetEthPhyOcpBit(tp, - 0xAC8A, - BIT_7|BIT_6|BIT_5|BIT_4, - BIT_5|BIT_4 - ); - - mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80A2); - mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153); - mdio_direct_write_phy_ocp(tp, 0xB87C, 0x809C); - mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153); - - - mdio_direct_write_phy_ocp(tp, 0xA436, 0x81B3); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0043); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00A7); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00D6); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00EC); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00F6); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FB); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FD); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FF); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x00BB); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0058); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0029); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0013); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0009); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0004); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0002); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); - - - mdio_direct_write_phy_ocp(tp, 0xA436, 0x8257); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x020F); - - - mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA); - mdio_direct_write_phy_ocp(tp, 0xA438, 0x7843); - - - rtl8125_set_phy_mcu_patch_request(tp); - - ClearEthPhyOcpBit(tp, 0xB896, BIT_0); - ClearEthPhyOcpBit(tp, 0xB892, 0xFF00); - - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC091); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC092); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x1214); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC094); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x1516); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC096); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x171B); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC098); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x1B1C); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09A); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x1F1F); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09C); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x2021); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09E); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x2224); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A0); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A2); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A4); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC018); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x0AF2); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01A); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x0D4A); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01C); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x0F26); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01E); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x118D); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC020); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x14F3); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC022); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x175A); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC024); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x19C0); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC026); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x1C26); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC089); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x6050); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08A); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x5F6E); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08C); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08E); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E); - mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC090); - mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12); - - SetEthPhyOcpBit(tp, 0xB896, BIT_0); - - rtl8125_clear_phy_mcu_patch_request(tp); - - - SetEthPhyOcpBit(tp, 0xD068, BIT_13); - - - mdio_direct_write_phy_ocp(tp, 0xA436, 0x81A2); - SetEthPhyOcpBit(tp, 0xA438, BIT_8); - ClearAndSetEthPhyOcpBit(tp, - 0xB54C, - 0xFF00, - 0xDB00); - - - ClearEthPhyOcpBit(tp, 0xA454, BIT_0); - - - SetEthPhyOcpBit(tp, 0xA5D4, BIT_5); - ClearEthPhyOcpBit(tp, 0xAD4E, BIT_4); - ClearEthPhyOcpBit(tp, 0xA86A, BIT_0); - - - SetEthPhyOcpBit(tp, 0xA442, BIT_11); - - //enable aldps - //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps) - if (aspm) { - if (tp->HwHasWrRamCodeToMicroP == TRUE) { - SetEthPhyOcpBit(tp, 0xA430, BIT_2); - } - } + switch (tp->mcfg) { + case CFG_METHOD_2: + rtl8125_hw_phy_config_8125a_1(dev); + break; + case CFG_METHOD_3: + rtl8125_hw_phy_config_8125a_2(dev); + break; + case CFG_METHOD_4: + rtl8125_hw_phy_config_8125b_1(dev); + break; + case CFG_METHOD_5: + rtl8125_hw_phy_config_8125b_2(dev); + break; } /*ocp phy power saving*/ @@ -7020,8 +8715,8 @@ rtl8125_hw_phy_config(struct net_device *dev) rtl8125_mdio_write(tp, 0x1F, 0x0000); - if (tp->HwHasWrRamCodeToMicroP == TRUE) { - if (eee_enable == 1) + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + if (tp->eee_enabled == 1) rtl8125_enable_eee(tp); else rtl8125_disable_eee(tp); @@ -7089,12 +8784,13 @@ static void rtl8125_get_bios_setting(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - tp->bios_setting = RTL_R32(TimeInt2); + case CFG_METHOD_4: + case CFG_METHOD_5: + tp->bios_setting = RTL_R32(tp, TimeInt2); break; } } @@ -7103,12 +8799,13 @@ static void rtl8125_set_bios_setting(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W32(TimeInt2, tp->bios_setting); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W32(tp, TimeInt2, tp->bios_setting); break; } } @@ -7118,13 +8815,14 @@ rtl8125_init_software_variable(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); struct pci_dev *pdev = tp->pci_dev; - void __iomem *ioaddr = tp->mmio_addr; rtl8125_get_bios_setting(dev); switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: //tp->HwSuppDashVer = 3; break; default: @@ -7135,6 +8833,8 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: tp->HwPkgDet = rtl8125_mac_ocp_read(tp, 0xDC00); tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x07; break; @@ -7146,6 +8846,8 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: tp->HwSuppNowIsOobVer = 1; break; } @@ -7153,6 +8855,8 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: tp->HwPcieSNOffset = 0x16C; break; } @@ -7203,6 +8907,8 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: default: tp->intr_mask = RxDescUnavail | TxOK | RxOK | SWInt; tp->timer_intr_mask = PCSTimeout; @@ -7221,6 +8927,8 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: tp->org_pci_offset_99 = rtl8125_csi_fun0_read_byte(tp, 0x99); tp->org_pci_offset_99 &= ~(BIT_5|BIT_6); break; @@ -7229,6 +8937,10 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + tp->org_pci_offset_180 = rtl8125_csi_fun0_read_byte(tp, 0x264); + break; + case CFG_METHOD_4: + case CFG_METHOD_5: tp->org_pci_offset_180 = rtl8125_csi_fun0_read_byte(tp, 0x214); break; } @@ -7240,6 +8952,8 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: default: tp->use_timer_interrrupt = TRUE; break; @@ -7248,9 +8962,17 @@ rtl8125_init_software_variable(struct net_device *dev) if (timer_count == 0 || tp->mcfg == CFG_METHOD_DEFAULT) tp->use_timer_interrrupt = FALSE; + switch (tp->mcfg) { + default: + tp->SwPaddingShortPktLen = ETH_ZLEN; + break; + } + switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V3; break; default: @@ -7261,6 +8983,8 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: tp->HwSuppCheckPhyDisableModeVer = 3; break; } @@ -7268,10 +8992,31 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: tp->HwSuppGigaForceMode = TRUE; break; } + switch (tp->mcfg) { + case CFG_METHOD_2: + case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: + tp->HwSuppTxNoCloseVer = 3; + break; + } + + if (tp->HwSuppTxNoCloseVer > 0 && tx_no_close_enable == 1) + tp->EnableTxNoClose = TRUE; + + switch (tp->mcfg) { + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->RequireLSOPatch = TRUE; + break; + } + switch (tp->mcfg) { case CFG_METHOD_2: tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_2; @@ -7279,6 +9024,12 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_3; break; + case CFG_METHOD_4: + tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_4; + break; + case CFG_METHOD_5: + tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_5; + break; } if (tp->HwIcVerUnknown) { @@ -7286,7 +9037,17 @@ rtl8125_init_software_variable(struct net_device *dev) tp->NotWrMcuPatchCode = TRUE; } - tp->NicCustLedValue = RTL_R16(CustomLED); + switch (tp->mcfg) { + case CFG_METHOD_3: + if ((rtl8125_mac_ocp_read(tp, 0xD442) & BIT_5) && + (mdio_direct_read_phy_ocp(tp, 0xD068) & BIT_1) + ) { + tp->RequirePhyMdiSwapPatch = TRUE; + } + break; + } + + tp->NicCustLedValue = RTL_R16(tp, CustomLED); rtl8125_get_hw_wol(dev); @@ -7303,14 +9064,16 @@ rtl8125_init_software_variable(struct net_device *dev) dev->min_mtu = ETH_ZLEN; dev->max_mtu = tp->max_jumbo_frame_size; #endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + tp->eee_enabled = eee_enable; + tp->eee_adv_t = MDIO_EEE_1000T | MDIO_EEE_100TX; } static void rtl8125_release_board(struct pci_dev *pdev, - struct net_device *dev, - void __iomem *ioaddr) + struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); + void __iomem *ioaddr = tp->mmio_addr; rtl8125_set_bios_setting(dev); rtl8125_rar_set(tp, tp->org_mac_addr); @@ -7337,17 +9100,18 @@ static int rtl8125_get_mac_address(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; int i; u8 mac_addr[MAC_ADDR_LEN]; for (i = 0; i < MAC_ADDR_LEN; i++) - mac_addr[i] = RTL_R8(MAC0 + i); + mac_addr[i] = RTL_R8(tp, MAC0 + i); if(tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) { - *(u32*)&mac_addr[0] = RTL_R32(BACKUP_ADDR0_8125); - *(u16*)&mac_addr[4] = RTL_R16(BACKUP_ADDR1_8125); + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { + *(u32*)&mac_addr[0] = RTL_R32(tp, BACKUP_ADDR0_8125); + *(u16*)&mac_addr[4] = RTL_R16(tp, BACKUP_ADDR1_8125); } if (!is_valid_ether_addr(mac_addr)) { @@ -7363,7 +9127,7 @@ rtl8125_get_mac_address(struct net_device *dev) rtl8125_rar_set(tp, mac_addr); for (i = 0; i < MAC_ADDR_LEN; i++) { - dev->dev_addr[i] = RTL_R8(MAC0 + i); + dev->dev_addr[i] = RTL_R8(tp, MAC0 + i); tp->org_mac_addr[i] = dev->dev_addr[i]; /* keep the original MAC address */ } #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) @@ -7413,7 +9177,6 @@ void rtl8125_rar_set(struct rtl8125_private *tp, uint8_t *addr) { - void __iomem *ioaddr = tp->mmio_addr; uint32_t rar_low = 0; uint32_t rar_high = 0; @@ -7426,8 +9189,8 @@ rtl8125_rar_set(struct rtl8125_private *tp, ((uint32_t) addr[5] << 8)); rtl8125_enable_cfg9346_write(tp); - RTL_W32(MAC0, rar_low); - RTL_W32(MAC4, rar_high); + RTL_W32(tp, MAC0, rar_low); + RTL_W32(tp, MAC4, rar_high); rtl8125_disable_cfg9346_write(tp); } @@ -8184,6 +9947,8 @@ rtl8125_phy_power_up(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_wait_phy_ups_resume(dev, 3); break; }; @@ -8320,8 +10085,10 @@ rtl8125_init_board(struct pci_dev *pdev, goto err_out_free_res; } + tp->mmio_addr = ioaddr; + /* Identify chip attached to board */ - rtl8125_get_mac_version(tp, ioaddr); + rtl8125_get_mac_version(tp); rtl8125_print_mac_version(tp); @@ -8638,7 +10405,6 @@ rtl8125_init_one(struct pci_dev *pdev, tp = netdev_priv(dev); assert(ioaddr != NULL); - tp->mmio_addr = ioaddr; tp->set_speed = rtl8125_set_speed_xmii; tp->get_settings = rtl8125_gset_xmii; tp->phy_reset_enable = rtl8125_xmii_reset_enable; @@ -8670,7 +10436,7 @@ rtl8125_init_one(struct pci_dev *pdev, } #endif - tp->cp_cmd |= RTL_R16(CPlusCmd); + tp->cp_cmd |= RTL_R16(tp, CPlusCmd); if (tp->mcfg != CFG_METHOD_DEFAULT) { dev->features |= NETIF_F_IP_CSUM; #if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) @@ -8722,11 +10488,12 @@ rtl8125_init_one(struct pci_dev *pdev, rtl8125_eeprom_type(tp); if (tp->eeprom_type == EEPROM_TYPE_93C46 || tp->eeprom_type == EEPROM_TYPE_93C56) - rtl8125_set_eeprom_sel_low(ioaddr); + rtl8125_set_eeprom_sel_low(tp); rtl8125_get_mac_address(dev); - tp->tally_vaddr = pci_alloc_consistent(pdev, sizeof(*tp->tally_vaddr), &tp->tally_paddr); + tp->tally_vaddr = dma_alloc_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), + &tp->tally_paddr, GFP_KERNEL); if (!tp->tally_vaddr) { rc = -ENOMEM; goto err_out; @@ -8755,8 +10522,8 @@ out: err_out: if (tp->tally_vaddr != NULL) { - pci_free_consistent(pdev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, - tp->tally_paddr); + dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, + tp->tally_paddr); tp->tally_vaddr = NULL; } @@ -8764,7 +10531,7 @@ err_out: RTL_NAPI_DEL(tp); #endif rtl8125_disable_msi(pdev, tp); - rtl8125_release_board(pdev, dev, ioaddr); + rtl8125_release_board(pdev, dev); goto out; } @@ -8790,11 +10557,11 @@ rtl8125_remove_one(struct pci_dev *pdev) rtl8125_proc_remove(dev); #endif if (tp->tally_vaddr != NULL) { - pci_free_consistent(pdev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr); + dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr); tp->tally_vaddr = NULL; } - rtl8125_release_board(pdev, dev, tp->mmio_addr); + rtl8125_release_board(pdev, dev); pci_set_drvdata(pdev, NULL); } @@ -8824,19 +10591,19 @@ static int rtl8125_open(struct net_device *dev) * Rx and Tx descriptors needs 256 bytes alignment. * pci_alloc_consistent provides more. */ - tp->TxDescArray = pci_alloc_consistent(pdev, R8125_TX_RING_BYTES, - &tp->TxPhyAddr); + tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8125_TX_RING_BYTES, + &tp->TxPhyAddr, GFP_KERNEL); if (!tp->TxDescArray) goto err_free_all_allocated_mem; - tp->RxDescArray = pci_alloc_consistent(pdev, R8125_RX_RING_BYTES, - &tp->RxPhyAddr); + tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8125_RX_RING_BYTES, + &tp->RxPhyAddr, GFP_KERNEL); if (!tp->RxDescArray) goto err_free_all_allocated_mem; if (tp->UseSwPaddingShortPkt) { - tp->ShortPacketEmptyBuffer = pci_alloc_consistent(pdev, SHORT_PACKET_PADDING_BUF_SIZE, - &tp->ShortPacketEmptyBufferPhy); + tp->ShortPacketEmptyBuffer = dma_alloc_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE, + &tp->ShortPacketEmptyBufferPhy, GFP_KERNEL); if (!tp->ShortPacketEmptyBuffer) goto err_free_all_allocated_mem; @@ -8905,20 +10672,20 @@ out: err_free_all_allocated_mem: if (tp->RxDescArray != NULL) { - pci_free_consistent(pdev, R8125_RX_RING_BYTES, tp->RxDescArray, - tp->RxPhyAddr); + dma_free_coherent(&pdev->dev, R8125_RX_RING_BYTES, tp->RxDescArray, + tp->RxPhyAddr); tp->RxDescArray = NULL; } if (tp->TxDescArray != NULL) { - pci_free_consistent(pdev, R8125_TX_RING_BYTES, tp->TxDescArray, - tp->TxPhyAddr); + dma_free_coherent(&pdev->dev, R8125_TX_RING_BYTES, tp->TxDescArray, + tp->TxPhyAddr); tp->TxDescArray = NULL; } if (tp->ShortPacketEmptyBuffer != NULL) { - pci_free_consistent(pdev, ETH_ZLEN, tp->ShortPacketEmptyBuffer, - tp->ShortPacketEmptyBufferPhy); + dma_free_coherent(&pdev->dev, ETH_ZLEN, tp->ShortPacketEmptyBuffer, + tp->ShortPacketEmptyBufferPhy); tp->ShortPacketEmptyBuffer = NULL; } @@ -8958,7 +10725,6 @@ static void rtl8125_hw_set_rx_packet_filter(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u32 mc_filter[2]; /* Multicast hash filter */ int rx_mode; u32 tmp = 0; @@ -9012,11 +10778,11 @@ rtl8125_hw_set_rx_packet_filter(struct net_device *dev) mc_filter[1] = swab32(tmp); tp->rtl8125_rx_config = rtl_chip_info[tp->chipset].RCR_Cfg; - tmp = tp->rtl8125_rx_config | rx_mode | (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); + tmp = tp->rtl8125_rx_config | rx_mode | (RTL_R32(tp, RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); - RTL_W32(RxConfig, tmp); - RTL_W32(MAR0 + 0, mc_filter[0]); - RTL_W32(MAR0 + 4, mc_filter[1]); + RTL_W32(tp, RxConfig, tmp); + RTL_W32(tp, MAR0 + 0, mc_filter[0]); + RTL_W32(tp, MAR0 + 4, mc_filter[1]); } static void @@ -9036,20 +10802,11 @@ static void rtl8125_hw_config(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; struct pci_dev *pdev = tp->pci_dev; u16 mac_ocp_data; int i; -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) - if (dev->mtu > ETH_DATA_LEN) { - dev->features &= ~(NETIF_F_IP_CSUM); - } else { - dev->features |= NETIF_F_IP_CSUM; - } -#endif - - RTL_W32(RxConfig, (RX_DMA_BURST << RxCfgDMAShift)); + RTL_W32(tp, RxConfig, (RX_DMA_BURST << RxCfgDMAShift)); rtl8125_hw_reset(dev); @@ -9057,9 +10814,11 @@ rtl8125_hw_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7); - RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); - RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); break; } @@ -9067,16 +10826,20 @@ rtl8125_hw_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - RTL_W8(Config3, RTL_R8(Config3) & ~BIT_1); + case CFG_METHOD_4: + case CFG_METHOD_5: + RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1); break; } switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: //IntMITI_0-IntMITI_31 for (i=0xA00; i<0xB00; i+=4) - RTL_W32(i, 0x00000000); + RTL_W32(tp, i, 0x00000000); break; } @@ -9084,8 +10847,10 @@ rtl8125_hw_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xC0B6); - mac_ocp_data &= ~(BIT_0); + mac_ocp_data &= BIT_0; rtl8125_mac_ocp_write(tp, 0xC0B6, mac_ocp_data); break; } @@ -9095,20 +10860,25 @@ rtl8125_hw_config(struct net_device *dev) rtl8125_desc_addr_fill(tp); /* Set DMA burst size and Interframe Gap Time */ - RTL_W32(TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) | + RTL_W32(tp, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) | (InterFrameGap << TxInterFrameGapShift)); + if (tp->EnableTxNoClose) + RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_6)); + if (tp->mcfg == CFG_METHOD_2 || - tp->mcfg == CFG_METHOD_3) { + tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_4 || + tp->mcfg == CFG_METHOD_5) { set_offset70F(tp, 0x27); set_offset79(tp, 0x50); - RTL_W16(0x382, 0x221B); + RTL_W16(tp, 0x382, 0x221B); - RTL_W8(0x4500, 0x00); - RTL_W16(0x4800, 0x0000); + RTL_W8(tp, 0x4500, 0x00); + RTL_W16(tp, 0x4800, 0x0000); - RTL_W8(Config1, RTL_R8(Config1) & ~0x10); + RTL_W8(tp, Config1, RTL_R8(tp, Config1) & ~0x10); rtl8125_mac_ocp_write(tp, 0xC140, 0xFFFF); rtl8125_mac_ocp_write(tp, 0xC142, 0xFFFF); @@ -9133,10 +10903,14 @@ rtl8125_hw_config(struct net_device *dev) mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE614); mac_ocp_data &= ~( BIT_10 | BIT_9 | BIT_8); - if (tp->DASH && !(rtl8125_csi_fun0_read_byte(tp, 0x79) & BIT_0)) - mac_ocp_data |= ((3 & 0x07) << 8); - else - mac_ocp_data |= ((4 & 0x07) << 8); + if (tp->mcfg == CFG_METHOD_4 || tp->mcfg == CFG_METHOD_5) { + mac_ocp_data |= ((2 & 0x07) << 8); + } else { + if (tp->DASH && !(rtl8125_csi_fun0_read_byte(tp, 0x79) & BIT_0)) + mac_ocp_data |= ((3 & 0x07) << 8); + else + mac_ocp_data |= ((4 & 0x07) << 8); + } rtl8125_mac_ocp_write(tp, 0xE614, mac_ocp_data); mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE63E); @@ -9146,7 +10920,8 @@ rtl8125_hw_config(struct net_device *dev) mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE63E); mac_ocp_data &= ~(BIT_5 | BIT_4); - mac_ocp_data |= ((0x02 & 0x03) << 4); + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + mac_ocp_data |= ((0x02 & 0x03) << 4); rtl8125_mac_ocp_write(tp, 0xE63E, mac_ocp_data); mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xC0B4); @@ -9168,14 +10943,19 @@ rtl8125_hw_config(struct net_device *dev) mac_ocp_data |= (BIT_4 | BIT_5); rtl8125_mac_ocp_write(tp, 0xE056, mac_ocp_data); - RTL_W8(TDFNR, 0x10); + RTL_W8(tp, TDFNR, 0x10); - //RTL_W8(0xD0, RTL_R8(0xD0) | BIT_7); + RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7); mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE040); mac_ocp_data &= ~(BIT_12); rtl8125_mac_ocp_write(tp, 0xE040, mac_ocp_data); + mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xEA1C); + mac_ocp_data &= ~(BIT_1 | BIT_0); + mac_ocp_data |= (BIT_0); + rtl8125_mac_ocp_write(tp, 0xEA1C, mac_ocp_data); + mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE0C0); mac_ocp_data &= ~(BIT_14 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_3 | BIT_2 | BIT_1 | BIT_0); mac_ocp_data |= (BIT_14 | BIT_10 | BIT_1 | BIT_0); @@ -9196,9 +10976,17 @@ rtl8125_hw_config(struct net_device *dev) //rtl8125_mac_ocp_write(tp, 0xE0C0, 0x4F87); mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE84C); - mac_ocp_data |= (BIT_7 | BIT_6); + mac_ocp_data &= ~BIT_6; + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + mac_ocp_data |= BIT_6; + mac_ocp_data |= BIT_7; rtl8125_mac_ocp_write(tp, 0xE84C, mac_ocp_data); + RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6); + + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) | BIT_0); + rtl8125_disable_eee_plus(tp); mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xEA1C); @@ -9208,7 +10996,7 @@ rtl8125_hw_config(struct net_device *dev) SetMcuAccessRegBit(tp, 0xEB54, BIT_0); udelay(1); ClearMcuAccessRegBit(tp, 0xEB54, BIT_0); - RTL_W16(0x1880, RTL_R16(0x1880)&~(BIT_4 | BIT_5)); + RTL_W16(tp, 0x1880, RTL_R16(tp, 0x1880) & ~(BIT_4 | BIT_5)); } /* csum offload command for RTL8125 */ @@ -9226,6 +11014,8 @@ rtl8125_hw_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: rtl8125_mac_ocp_write(tp, 0xE098, 0xC302); break; } @@ -9233,6 +11023,8 @@ rtl8125_hw_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: if (aspm) { rtl8125_init_pci_offset_99(tp); } @@ -9241,6 +11033,8 @@ rtl8125_hw_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: if (aspm) { rtl8125_init_pci_offset_180(tp); } @@ -9252,14 +11046,16 @@ rtl8125_hw_config(struct net_device *dev) ASF | Macdbgo_sel); #if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) - RTL_W16(CPlusCmd, tp->cp_cmd); + RTL_W16(tp, CPlusCmd, tp->cp_cmd); #else rtl8125_hw_set_features(dev, dev->features); #endif switch (tp->mcfg) { case CFG_METHOD_2: - case CFG_METHOD_3: { + case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: { int timeout; for (timeout = 0; timeout < 10; timeout++) { if ((rtl8125_mac_ocp_read(tp, 0xE00E) & BIT_13)==0) @@ -9270,7 +11066,7 @@ rtl8125_hw_config(struct net_device *dev) break; } - RTL_W16(RxMaxSize, tp->rx_buf_sz); + RTL_W16(tp, RxMaxSize, tp->rx_buf_sz); rtl8125_disable_rxdvgate(dev); @@ -9308,12 +11104,14 @@ rtl8125_hw_config(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: if (aspm) { - RTL_W8(Config5, RTL_R8(Config5) | BIT_0); - RTL_W8(Config2, RTL_R8(Config2) | BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) | BIT_7); } else { - RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); - RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); } break; } @@ -9327,11 +11125,10 @@ static void rtl8125_hw_start(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); + RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb); - rtl8125_enable_hw_interrupt(tp, ioaddr); + rtl8125_enable_hw_interrupt(tp); } @@ -9408,8 +11205,8 @@ rtl8125_free_rx_skb(struct rtl8125_private *tp, { struct pci_dev *pdev = tp->pci_dev; - pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz, - PCI_DMA_FROMDEVICE); + dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), tp->rx_buf_sz, + DMA_FROM_DEVICE); dev_kfree_skb(*sk_buff); *sk_buff = NULL; rtl8125_make_unusable_by_asic(desc); @@ -9455,8 +11252,8 @@ rtl8125_alloc_rx_skb(struct rtl8125_private *tp, skb_reserve(skb, RTK_RX_ALIGN); - mapping = pci_map_single(tp->pci_dev, skb->data, rx_buf_sz, - PCI_DMA_FROMDEVICE); + mapping = dma_map_single(&tp->pci_dev->dev, skb->data, rx_buf_sz, + DMA_FROM_DEVICE); if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { if (unlikely(net_ratelimit())) netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n"); @@ -9522,15 +11319,13 @@ rtl8125_mark_as_last_descriptor(struct RxDesc *desc) static void rtl8125_desc_addr_fill(struct rtl8125_private *tp) { - void __iomem *ioaddr = tp->mmio_addr; - if (!tp->TxPhyAddr || !tp->RxPhyAddr) return; - RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_BIT_MASK(32))); - RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32)); - RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_BIT_MASK(32))); - RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32)); + RTL_W32(tp, TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_BIT_MASK(32))); + RTL_W32(tp, TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32)); + RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_BIT_MASK(32))); + RTL_W32(tp, RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32)); } static void @@ -9584,8 +11379,9 @@ rtl8125_unmap_tx_skb(struct pci_dev *pdev, { unsigned int len = tx_skb->len; - pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE); - desc->opts1 = 0x00; + dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE); + + desc->opts1 = cpu_to_le32(RTK_MAGIC_DEBUG_VALUE); desc->opts2 = 0x00; desc->addr = 0x00; tx_skb->len = 0; @@ -9650,6 +11446,9 @@ static void rtl8125_schedule_work(struct net_device *dev, work_func_t task) static void rtl8125_cancel_schedule_work(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); + struct work_struct *work = &tp->task.work; + + if (!work->func) return; cancel_delayed_work_sync(&tp->task); } @@ -9659,7 +11458,6 @@ static void rtl8125_wait_for_quiescence(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; synchronize_irq(dev->irq); @@ -9670,7 +11468,7 @@ rtl8125_wait_for_quiescence(struct net_device *dev) #endif #endif//CONFIG_R8125_NAPI - rtl8125_irq_mask_and_ack(tp, ioaddr); + rtl8125_irq_mask_and_ack(tp); #ifdef CONFIG_R8125_NAPI #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) @@ -9737,9 +11535,9 @@ static void rtl8125_reset_task(struct work_struct *work) rtl8125_wait_for_quiescence(dev); #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) - rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, &budget); + rtl8125_rx_interrupt(dev, tp, &budget); #else - rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, budget); + rtl8125_rx_interrupt(dev, tp, budget); #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) spin_lock_irqsave(&tp->lock, flags); @@ -9764,9 +11562,13 @@ static void rtl8125_reset_task(struct work_struct *work) rtl8125_schedule_work(dev, rtl8125_reset_task); } } - +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static void +rtl8125_tx_timeout(struct net_device *dev, unsigned int txqueue) +#else static void rtl8125_tx_timeout(struct net_device *dev) +#endif { struct rtl8125_private *tp = netdev_priv(dev); unsigned long flags; @@ -9781,6 +11583,17 @@ rtl8125_tx_timeout(struct net_device *dev) rtl8125_schedule_work(dev, rtl8125_reset_task); } +static u32 +rtl8125_get_txd_opts1(u32 opts1, u32 len, unsigned int entry) +{ + u32 status = opts1 | len; + + if (entry == NUM_TX_DESC - 1) + status |= RingEnd; + + return status; +} + static int rtl8125_xmit_frags(struct rtl8125_private *tp, struct sk_buff *skb, @@ -9792,6 +11605,7 @@ rtl8125_xmit_frags(struct rtl8125_private *tp, struct TxDesc *txd = NULL; const unsigned char nr_frags = info->nr_frags; unsigned long PktLenCnt = 0; + bool LsoPatchEnabled = FALSE; entry = tp->cur_tx; for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) { @@ -9810,12 +11624,13 @@ rtl8125_xmit_frags(struct rtl8125_private *tp, len = skb_frag_size(frag); addr = skb_frag_address(frag); #endif - if ((cur_frag == nr_frags - 1) && + if (tp->RequireLSOPatch && + (cur_frag == nr_frags - 1) && (opts1 & (GiantSendv4|GiantSendv6)) && PktLenCnt < ETH_FRAME_LEN && len > 1) { len -= 1; - mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE); + mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE); if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { if (unlikely(net_ratelimit())) @@ -9825,14 +11640,15 @@ rtl8125_xmit_frags(struct rtl8125_private *tp, } /* anti gcc 2.95.3 bugware (sic) */ - status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); + status = rtl8125_get_txd_opts1(opts1, len, entry); txd->addr = cpu_to_le64(mapping); tp->tx_skb[entry].len = len; - txd->opts1 = cpu_to_le32(status); txd->opts2 = cpu_to_le32(opts2); + wmb(); + txd->opts1 = cpu_to_le32(status); //second txd addr += len; @@ -9840,9 +11656,11 @@ rtl8125_xmit_frags(struct rtl8125_private *tp, entry = (entry + 1) % NUM_TX_DESC; txd = tp->TxDescArray + entry; cur_frag += 1; + + LsoPatchEnabled = TRUE; } - mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE); + mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE); if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { if (unlikely(net_ratelimit())) @@ -9852,24 +11670,23 @@ rtl8125_xmit_frags(struct rtl8125_private *tp, } /* anti gcc 2.95.3 bugware (sic) */ - status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); + status = rtl8125_get_txd_opts1(opts1, len, entry); + if (cur_frag == (nr_frags - 1) || LsoPatchEnabled == TRUE) { + tp->tx_skb[entry].skb = skb; + status |= LastFrag; + } txd->addr = cpu_to_le64(mapping); tp->tx_skb[entry].len = len; - txd->opts1 = cpu_to_le32(status); txd->opts2 = cpu_to_le32(opts2); + wmb(); + txd->opts1 = cpu_to_le32(status); PktLenCnt += len; } - if (cur_frag) { - tp->tx_skb[entry].skb = skb; - wmb(); - txd->opts1 |= cpu_to_le32(LastFrag); - } - return cur_frag; err_out: @@ -9949,7 +11766,9 @@ rtl8125_tx_csum(struct sk_buff *skb, } } - if (tp->ShortPacketSwChecksum && skb->len < 60 && csum_cmd != 0) + if (tp->ShortPacketSwChecksum && + skb->len < tp->SwPaddingShortPktLen && + csum_cmd != 0) sw_calc_csum = TRUE; if (sw_calc_csum) { @@ -9979,7 +11798,7 @@ rtl8125_sw_padding_short_pkt(struct rtl8125_private *tp, struct TxDesc *txd = NULL; int ret = 0; - if (skb->len >= ETH_ZLEN) + if (skb->len >= tp->SwPaddingShortPktLen) goto out; entry = tp->cur_tx; @@ -9987,9 +11806,9 @@ rtl8125_sw_padding_short_pkt(struct rtl8125_private *tp, entry = (entry + 1) % NUM_TX_DESC; txd = tp->TxDescArray + entry; - len = ETH_ZLEN - skb->len; + len = tp->SwPaddingShortPktLen - skb->len; addr = tp->ShortPacketEmptyBuffer; - mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE); + mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE); if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { if (unlikely(net_ratelimit())) netif_err(tp, drv, tp->dev, @@ -9997,15 +11816,14 @@ rtl8125_sw_padding_short_pkt(struct rtl8125_private *tp, ret = -ENOMEM; goto out; } - status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); + status = rtl8125_get_txd_opts1(opts1, len, entry); + status |= LastFrag; txd->addr = cpu_to_le64(mapping); - txd->opts1 = cpu_to_le32(status); txd->opts2 = cpu_to_le32(opts2); - wmb(); - txd->opts1 |= cpu_to_le32(LastFrag); + txd->opts1 = cpu_to_le32(status); out: return ret; } @@ -10074,6 +11892,15 @@ static int msdn_giant_send_check(struct sk_buff *skb) } #endif +static bool rtl8125_tx_slots_avail(struct rtl8125_private *tp, + unsigned int nr_frags) +{ + unsigned int slots_avail = tp->dirty_tx + NUM_TX_DESC - tp->cur_tx; + + /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */ + return slots_avail > nr_frags; +} + static int rtl8125_start_xmit(struct sk_buff *skb, struct net_device *dev) @@ -10081,7 +11908,6 @@ rtl8125_start_xmit(struct sk_buff *skb, struct rtl8125_private *tp = netdev_priv(dev); unsigned int entry; struct TxDesc *txd; - void __iomem *ioaddr = tp->mmio_addr; dma_addr_t mapping; u32 len; u32 opts1; @@ -10089,10 +11915,11 @@ rtl8125_start_xmit(struct sk_buff *skb, int ret = NETDEV_TX_OK; unsigned long flags, large_send; int frags; + u8 EnableTxNoClose = tp->EnableTxNoClose; spin_lock_irqsave(&tp->lock, flags); - if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) { + if (unlikely(!rtl8125_tx_slots_avail(tp, skb_shinfo(skb)->nr_frags))) { if (netif_msg_drv(tp)) { printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n", @@ -10104,8 +11931,16 @@ rtl8125_start_xmit(struct sk_buff *skb, entry = tp->cur_tx % NUM_TX_DESC; txd = tp->TxDescArray + entry; - if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) - goto err_stop; + if (!EnableTxNoClose) { + if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) { + if (netif_msg_drv(tp)) { + printk(KERN_ERR + "%s: BUG! Tx Desc is own by hardware!\n", + dev->name); + } + goto err_stop; + } + } opts1 = DescOwn; opts2 = rtl8125_tx_vlan_tag(tp, skb); @@ -10176,7 +12011,7 @@ rtl8125_start_xmit(struct sk_buff *skb, tp->tx_skb[entry].skb = skb; - if (tp->UseSwPaddingShortPkt && len < 60) { + if (tp->UseSwPaddingShortPkt && len < tp->SwPaddingShortPktLen) { if (unlikely(rtl8125_sw_padding_short_pkt(tp, skb, opts1, opts2))) goto err_dma_1; opts1 |= FirstFrag; @@ -10186,8 +12021,8 @@ rtl8125_start_xmit(struct sk_buff *skb, } } - opts1 |= len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); - mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE); + opts1 = rtl8125_get_txd_opts1(opts1, len, entry); + mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, DMA_TO_DEVICE); if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { if (unlikely(net_ratelimit())) netif_err(tp, drv, dev, "Failed to map TX DMA!\n"); @@ -10196,7 +12031,6 @@ rtl8125_start_xmit(struct sk_buff *skb, tp->tx_skb[entry].len = len; txd->addr = cpu_to_le64(mapping); txd->opts2 = cpu_to_le32(opts2); - txd->opts1 = cpu_to_le32(opts1&~DescOwn); wmb(); txd->opts1 = cpu_to_le32(opts1); @@ -10210,12 +12044,15 @@ rtl8125_start_xmit(struct sk_buff *skb, wmb(); - RTL_W16(TPPOLL_8125, BIT_0); /* set polling bit */ + if (EnableTxNoClose) + RTL_W16(tp, SW_TAIL_PTR0_8125, tp->cur_tx % MAX_TX_NO_CLOSE_DESC_PTR_V2); + else + RTL_W16(tp, TPPOLL_8125, BIT_0); /* set polling bit */ - if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) { + if (!rtl8125_tx_slots_avail(tp, MAX_SKB_FRAGS)) { netif_stop_queue(dev); smp_rmb(); - if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS) + if (rtl8125_tx_slots_avail(tp, MAX_SKB_FRAGS)) netif_wake_queue(dev); } @@ -10240,20 +12077,33 @@ err_stop: goto out; } +static u32 +rtl8125_fast_mod(const u32 input, const u32 ceil) +{ + return input >= ceil ? input % ceil : input; +} + static void rtl8125_tx_interrupt(struct net_device *dev, - struct rtl8125_private *tp, - void __iomem *ioaddr) + struct rtl8125_private *tp) { unsigned int dirty_tx, tx_left; + u8 EnableTxNoClose = tp->EnableTxNoClose; assert(dev != NULL); assert(tp != NULL); - assert(ioaddr != NULL); dirty_tx = tp->dirty_tx; - smp_rmb(); - tx_left = tp->cur_tx - dirty_tx; + if (EnableTxNoClose) { + u32 NextHwDesCloPtr0 = RTL_R16(tp, HW_CLO_PTR0_8125); + tp->NextHwDesCloPtr0 = NextHwDesCloPtr0; + smp_rmb(); + tx_left = rtl8125_fast_mod(NextHwDesCloPtr0 - tp->BeginHwDesCloPtr0, MAX_TX_NO_CLOSE_DESC_PTR_V2); + tp->BeginHwDesCloPtr0 = NextHwDesCloPtr0; + } else { + smp_rmb(); + tx_left = tp->cur_tx - dirty_tx; + } while (tx_left > 0) { unsigned int entry = dirty_tx % NUM_TX_DESC; @@ -10263,7 +12113,7 @@ rtl8125_tx_interrupt(struct net_device *dev, rmb(); status = le32_to_cpu(tp->TxDescArray[entry].opts1); - if (status & DescOwn) + if (!EnableTxNoClose && (status & DescOwn)) break; RTLDEV->stats.tx_bytes += len; @@ -10289,12 +12139,12 @@ rtl8125_tx_interrupt(struct net_device *dev, tp->dirty_tx = dirty_tx; smp_wmb(); if (netif_queue_stopped(dev) && - (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) { + (rtl8125_tx_slots_avail(tp, MAX_SKB_FRAGS))) { netif_wake_queue(dev); } smp_rmb(); - if (tp->cur_tx != dirty_tx) { - RTL_W16(TPPOLL_8125, BIT_0); + if (!EnableTxNoClose && (tp->cur_tx != dirty_tx)) { + RTL_W16(tp, TPPOLL_8125, BIT_0); } } } @@ -10372,7 +12222,7 @@ rtl8125_rx_skb(struct rtl8125_private *tp, static int rtl8125_rx_interrupt(struct net_device *dev, struct rtl8125_private *tp, - void __iomem *ioaddr, napi_budget budget) + napi_budget budget) { unsigned int cur_rx, rx_left; unsigned int delta, count = 0; @@ -10383,7 +12233,6 @@ rtl8125_rx_interrupt(struct net_device *dev, assert(dev != NULL); assert(tp != NULL); - assert(ioaddr != NULL); if ((tp->RxDescArray == NULL) || (tp->Rx_skbuff == NULL)) goto rx_out; @@ -10420,8 +12269,6 @@ rtl8125_rx_interrupt(struct net_device *dev, } else { struct sk_buff *skb; int pkt_size; - void (*pci_action)(struct pci_dev *, dma_addr_t, - size_t, int); process_pkt: if (likely(!(dev->features & NETIF_F_RXFCS))) @@ -10442,22 +12289,23 @@ process_pkt: } skb = tp->Rx_skbuff[entry]; - if (tp->cp_cmd & RxChkSum) - rtl8125_rx_csum(tp, skb, desc); - pci_dma_sync_single_for_cpu(tp->pci_dev, - le64_to_cpu(desc->addr), tp->rx_buf_sz, - PCI_DMA_FROMDEVICE); + dma_sync_single_for_cpu(&tp->pci_dev->dev, + le64_to_cpu(desc->addr), tp->rx_buf_sz, + DMA_FROM_DEVICE); - pci_action = pci_dma_sync_single_for_device; if (rtl8125_try_rx_copy(tp, &skb, pkt_size, desc, tp->rx_buf_sz)) { - pci_action = pci_unmap_single; tp->Rx_skbuff[entry] = NULL; + dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr), + tp->rx_buf_sz, DMA_FROM_DEVICE); + } else { + dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(desc->addr), + tp->rx_buf_sz, DMA_FROM_DEVICE); } - pci_action(tp->pci_dev, le64_to_cpu(desc->addr), - tp->rx_buf_sz, PCI_DMA_FROMDEVICE); + if (tp->cp_cmd & RxChkSum) + rtl8125_rx_csum(tp, skb, desc); skb->dev = dev; skb_put(skb, pkt_size); @@ -10517,12 +12365,11 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) { struct net_device *dev = (struct net_device *) dev_instance; struct rtl8125_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; u32 status; int handled = 0; do { - status = RTL_R32(ISR0_8125); + status = RTL_R32(tp, ISR0_8125); if (!(tp->features & RTL_FEATURE_MSI)) { /* hotplug/major error/no more work/shared irq */ @@ -10538,9 +12385,9 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) handled = 1; - rtl8125_disable_hw_interrupt(tp, ioaddr); + rtl8125_disable_hw_interrupt(tp); - RTL_W32(ISR0_8125, status&~RxFIFOOver); + RTL_W32(tp, ISR0_8125, status&~RxFIFOOver); #ifdef ENABLE_DASH_SUPPORT if (tp->DASH) { @@ -10550,7 +12397,7 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) if (status & ISRIMR_DASH_INTR_CMAC_RESET) tp->CmacResetIntr = TRUE; - DashIntType2Status = RTL_CMAC_R8(CMAC_IBISR0); + DashIntType2Status = RTL_CMAC_R8(tp, CMAC_IBISR0); if (DashIntType2Status & ISRIMR_DASH_TYPE2_ROK) { tp->RcvFwDashOkEvt = TRUE; } @@ -10561,7 +12408,7 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) tp->DashFwDisableRx = TRUE; } - RTL_CMAC_W8(CMAC_IBISR0, DashIntType2Status); + RTL_CMAC_W8(tp, CMAC_IBISR0, DashIntType2Status); } } #endif @@ -10578,7 +12425,7 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) dev->name, status); } else { tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; - rtl8125_switch_to_hw_interrupt(tp, ioaddr); + rtl8125_switch_to_hw_interrupt(tp); } #else if (status & tp->intr_mask || tp->keep_intr_cnt-- > 0) { @@ -10587,11 +12434,11 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) if (status & tp->intr_mask) tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) - rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, &budget); + rtl8125_rx_interrupt(dev, tp, &budget); #else - rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, budget); + rtl8125_rx_interrupt(dev, tp, budget); #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) - rtl8125_tx_interrupt(dev, tp, ioaddr); + rtl8125_tx_interrupt(dev, tp); #ifdef ENABLE_DASH_SUPPORT if (tp->DASH) { @@ -10601,10 +12448,10 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) } #endif - rtl8125_switch_to_timer_interrupt(tp, ioaddr); + rtl8125_switch_to_timer_interrupt(tp); } else { tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; - rtl8125_switch_to_hw_interrupt(tp, ioaddr); + rtl8125_switch_to_hw_interrupt(tp); } #endif @@ -10617,16 +12464,15 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance) static int rtl8125_poll(napi_ptr napi, napi_budget budget) { struct rtl8125_private *tp = RTL_GET_PRIV(napi, struct rtl8125_private); - void __iomem *ioaddr = tp->mmio_addr; RTL_GET_NETDEV(tp) unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev); unsigned int work_done; unsigned long flags; - work_done = rtl8125_rx_interrupt(dev, tp, ioaddr, budget); + work_done = rtl8125_rx_interrupt(dev, tp, budget); spin_lock_irqsave(&tp->lock, flags); - rtl8125_tx_interrupt(dev, tp, ioaddr); + rtl8125_tx_interrupt(dev, tp); spin_unlock_irqrestore(&tp->lock, flags); RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget); @@ -10655,7 +12501,7 @@ static int rtl8125_poll(napi_ptr napi, napi_budget budget) */ smp_wmb(); - rtl8125_switch_to_timer_interrupt(tp, ioaddr); + rtl8125_switch_to_timer_interrupt(tp); } return RTL_NAPI_RETURN_VALUE; @@ -10724,16 +12570,16 @@ static int rtl8125_close(struct net_device *dev) free_irq(dev->irq, dev); - pci_free_consistent(pdev, R8125_RX_RING_BYTES, tp->RxDescArray, - tp->RxPhyAddr); - pci_free_consistent(pdev, R8125_TX_RING_BYTES, tp->TxDescArray, - tp->TxPhyAddr); + dma_free_coherent(&pdev->dev, R8125_RX_RING_BYTES, tp->RxDescArray, + tp->RxPhyAddr); + dma_free_coherent(&pdev->dev, R8125_TX_RING_BYTES, tp->TxDescArray, + tp->TxPhyAddr); tp->TxDescArray = NULL; tp->RxDescArray = NULL; if (tp->ShortPacketEmptyBuffer != NULL) { - pci_free_consistent(pdev, SHORT_PACKET_PADDING_BUF_SIZE, tp->ShortPacketEmptyBuffer, - tp->ShortPacketEmptyBufferPhy); + dma_free_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE, tp->ShortPacketEmptyBuffer, + tp->ShortPacketEmptyBufferPhy); tp->ShortPacketEmptyBuffer = NULL; } } else { diff --git a/package/lean/r8125/src/r8125_realwow.h b/package/lean/r8125/src/r8125_realwow.h index 9825300911..c42e1118e8 100644 --- a/package/lean/r8125/src/r8125_realwow.h +++ b/package/lean/r8125/src/r8125_realwow.h @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free diff --git a/package/lean/r8125/src/rtl_eeprom.c b/package/lean/r8125/src/rtl_eeprom.c index 5965487773..3f1eb98bd2 100644 --- a/package/lean/r8125/src/rtl_eeprom.c +++ b/package/lean/r8125/src/rtl_eeprom.c @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -52,18 +52,17 @@ //------------------------------------------------------------------- void rtl8125_eeprom_type(struct rtl8125_private *tp) { - void __iomem *ioaddr=tp->mmio_addr; u16 magic = 0; if (tp->mcfg == CFG_METHOD_DEFAULT) goto out_no_eeprom; - if(RTL_R8(0xD2)&0x04) { + if(RTL_R8(tp, 0xD2)&0x04) { //not support //tp->eeprom_type = EEPROM_TWSI; //tp->eeprom_len = 256; goto out_no_eeprom; - } else if(RTL_R32(RxConfig) & RxCfg_9356SEL) { + } else if(RTL_R32(tp, RxConfig) & RxCfg_9356SEL) { tp->eeprom_type = EEPROM_TYPE_93C56; tp->eeprom_len = 256; } else { @@ -80,28 +79,28 @@ out_no_eeprom: } } -void rtl8125_eeprom_cleanup(void __iomem *ioaddr) +void rtl8125_eeprom_cleanup(struct rtl8125_private *tp) { u8 x; - x = RTL_R8(Cfg9346); + x = RTL_R8(tp, Cfg9346); x &= ~(Cfg9346_EEDI | Cfg9346_EECS); - RTL_W8(Cfg9346, x); + RTL_W8(tp, Cfg9346, x); - rtl8125_raise_clock(&x, ioaddr); - rtl8125_lower_clock(&x, ioaddr); + rtl8125_raise_clock(tp, &x); + rtl8125_lower_clock(tp, &x); } -int rtl8125_eeprom_cmd_done(void __iomem *ioaddr) +int rtl8125_eeprom_cmd_done(struct rtl8125_private *tp) { u8 x; int i; - rtl8125_stand_by(ioaddr); + rtl8125_stand_by(tp); for (i = 0; i < 50000; i++) { - x = RTL_R8(Cfg9346); + x = RTL_R8(tp, Cfg9346); if (x & Cfg9346_EEDO) { udelay(RTL_CLOCK_RATE * 2 * 3); @@ -119,7 +118,6 @@ int rtl8125_eeprom_cmd_done(void __iomem *ioaddr) //------------------------------------------------------------------- u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg) { - void __iomem *ioaddr=tp->mmio_addr; int addr_sz = 6; u8 x; u16 data; @@ -134,16 +132,16 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg) addr_sz = 8; x = Cfg9346_EEM1 | Cfg9346_EECS; - RTL_W8(Cfg9346, x); + RTL_W8(tp, Cfg9346, x); - rtl8125_shift_out_bits(RTL_EEPROM_READ_OPCODE, 3, ioaddr); - rtl8125_shift_out_bits(reg, addr_sz, ioaddr); + rtl8125_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3); + rtl8125_shift_out_bits(tp, reg, addr_sz); - data = rtl8125_shift_in_bits(ioaddr); + data = rtl8125_shift_in_bits(tp); - rtl8125_eeprom_cleanup(ioaddr); + rtl8125_eeprom_cleanup(tp); - RTL_W8(Cfg9346, 0); + RTL_W8(tp, Cfg9346, 0); return data; } @@ -154,7 +152,6 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg) //------------------------------------------------------------------- void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data) { - void __iomem *ioaddr=tp->mmio_addr; u8 x; int addr_sz = 6; int w_dummy_addr = 4; @@ -172,56 +169,56 @@ void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data) } x = Cfg9346_EEM1 | Cfg9346_EECS; - RTL_W8(Cfg9346, x); + RTL_W8(tp, Cfg9346, x); - rtl8125_shift_out_bits(RTL_EEPROM_EWEN_OPCODE, 5, ioaddr); - rtl8125_shift_out_bits(reg, w_dummy_addr, ioaddr); - rtl8125_stand_by(ioaddr); + rtl8125_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5); + rtl8125_shift_out_bits(tp, reg, w_dummy_addr); + rtl8125_stand_by(tp); - rtl8125_shift_out_bits(RTL_EEPROM_ERASE_OPCODE, 3, ioaddr); - rtl8125_shift_out_bits(reg, addr_sz, ioaddr); - if (rtl8125_eeprom_cmd_done(ioaddr) < 0) { + rtl8125_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3); + rtl8125_shift_out_bits(tp, reg, addr_sz); + if (rtl8125_eeprom_cmd_done(tp) < 0) { return; } - rtl8125_stand_by(ioaddr); + rtl8125_stand_by(tp); - rtl8125_shift_out_bits(RTL_EEPROM_WRITE_OPCODE, 3, ioaddr); - rtl8125_shift_out_bits(reg, addr_sz, ioaddr); - rtl8125_shift_out_bits(data, 16, ioaddr); - if (rtl8125_eeprom_cmd_done(ioaddr) < 0) { + rtl8125_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3); + rtl8125_shift_out_bits(tp, reg, addr_sz); + rtl8125_shift_out_bits(tp, data, 16); + if (rtl8125_eeprom_cmd_done(tp) < 0) { return; } - rtl8125_stand_by(ioaddr); + rtl8125_stand_by(tp); - rtl8125_shift_out_bits(RTL_EEPROM_EWDS_OPCODE, 5, ioaddr); - rtl8125_shift_out_bits(reg, w_dummy_addr, ioaddr); + rtl8125_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5); + rtl8125_shift_out_bits(tp, reg, w_dummy_addr); - rtl8125_eeprom_cleanup(ioaddr); - RTL_W8(Cfg9346, 0); + rtl8125_eeprom_cleanup(tp); + RTL_W8(tp, Cfg9346, 0); } -void rtl8125_raise_clock(u8 *x, void __iomem *ioaddr) +void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x) { *x = *x | Cfg9346_EESK; - RTL_W8(Cfg9346, *x); + RTL_W8(tp, Cfg9346, *x); udelay(RTL_CLOCK_RATE); } -void rtl8125_lower_clock(u8 *x, void __iomem *ioaddr) +void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x) { *x = *x & ~Cfg9346_EESK; - RTL_W8(Cfg9346, *x); + RTL_W8(tp, Cfg9346, *x); udelay(RTL_CLOCK_RATE); } -void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr) +void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count) { u8 x; int mask; mask = 0x01 << (count - 1); - x = RTL_R8(Cfg9346); + x = RTL_R8(tp, Cfg9346); x &= ~(Cfg9346_EEDI | Cfg9346_EEDO); do { @@ -230,62 +227,62 @@ void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr) else x &= ~Cfg9346_EEDI; - RTL_W8(Cfg9346, x); + RTL_W8(tp, Cfg9346, x); udelay(RTL_CLOCK_RATE); - rtl8125_raise_clock(&x, ioaddr); - rtl8125_lower_clock(&x, ioaddr); + rtl8125_raise_clock(tp, &x); + rtl8125_lower_clock(tp, &x); mask = mask >> 1; } while(mask); x &= ~Cfg9346_EEDI; - RTL_W8(Cfg9346, x); + RTL_W8(tp, Cfg9346, x); } -u16 rtl8125_shift_in_bits(void __iomem *ioaddr) +u16 rtl8125_shift_in_bits(struct rtl8125_private *tp) { u8 x; u16 d, i; - x = RTL_R8(Cfg9346); + x = RTL_R8(tp, Cfg9346); x &= ~(Cfg9346_EEDI | Cfg9346_EEDO); d = 0; for (i = 0; i < 16; i++) { d = d << 1; - rtl8125_raise_clock(&x, ioaddr); + rtl8125_raise_clock(tp, &x); - x = RTL_R8(Cfg9346); + x = RTL_R8(tp, Cfg9346); x &= ~Cfg9346_EEDI; if (x & Cfg9346_EEDO) d |= 1; - rtl8125_lower_clock(&x, ioaddr); + rtl8125_lower_clock(tp, &x); } return d; } -void rtl8125_stand_by(void __iomem *ioaddr) +void rtl8125_stand_by(struct rtl8125_private *tp) { u8 x; - x = RTL_R8(Cfg9346); + x = RTL_R8(tp, Cfg9346); x &= ~(Cfg9346_EECS | Cfg9346_EESK); - RTL_W8(Cfg9346, x); + RTL_W8(tp, Cfg9346, x); udelay(RTL_CLOCK_RATE); x |= Cfg9346_EECS; - RTL_W8(Cfg9346, x); + RTL_W8(tp, Cfg9346, x); } -void rtl8125_set_eeprom_sel_low(void __iomem *ioaddr) +void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp) { - RTL_W8(Cfg9346, Cfg9346_EEM1); - RTL_W8(Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK); + RTL_W8(tp, Cfg9346, Cfg9346_EEM1); + RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK); udelay(20); - RTL_W8(Cfg9346, Cfg9346_EEM1); + RTL_W8(tp, Cfg9346, Cfg9346_EEM1); } diff --git a/package/lean/r8125/src/rtl_eeprom.h b/package/lean/r8125/src/rtl_eeprom.h index 36cdd1bc62..e8d55091bc 100644 --- a/package/lean/r8125/src/rtl_eeprom.h +++ b/package/lean/r8125/src/rtl_eeprom.h @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -41,15 +41,12 @@ #define RTL_CLOCK_RATE 3 void rtl8125_eeprom_type(struct rtl8125_private *tp); -void rtl8125_eeprom_cleanup(void __iomem *ioaddr); +void rtl8125_eeprom_cleanup(struct rtl8125_private *tp); u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg); void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data); -void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr); -u16 rtl8125_shift_in_bits(void __iomem *ioaddr); -void rtl8125_raise_clock(u8 *x, void __iomem *ioaddr); -void rtl8125_lower_clock(u8 *x, void __iomem *ioaddr); -void rtl8125_stand_by(void __iomem *ioaddr); -void rtl8125_set_eeprom_sel_low(void __iomem *ioaddr); - - - +void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count); +u16 rtl8125_shift_in_bits(struct rtl8125_private *tp); +void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x); +void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x); +void rtl8125_stand_by(struct rtl8125_private *tp); +void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp); diff --git a/package/lean/r8125/src/rtltool.c b/package/lean/r8125/src/rtltool.c index a0a7dbba99..614fd91e1e 100644 --- a/package/lean/r8125/src/rtltool.c +++ b/package/lean/r8125/src/rtltool.c @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -121,7 +121,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr) return -EPERM; spin_lock_irqsave(&tp->lock, flags); - my_cmd.data = rtl8125_ephy_read(tp->mmio_addr, my_cmd.offset); + my_cmd.data = rtl8125_ephy_read(tp, my_cmd.offset); spin_unlock_irqrestore(&tp->lock, flags); if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { @@ -136,7 +136,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr) return -EPERM; spin_lock_irqsave(&tp->lock, flags); - rtl8125_ephy_write(tp->mmio_addr, my_cmd.offset, my_cmd.data); + rtl8125_ephy_write(tp, my_cmd.offset, my_cmd.data); spin_unlock_irqrestore(&tp->lock, flags); break; @@ -144,7 +144,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr) my_cmd.data = 0; if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) { spin_lock_irqsave(&tp->lock, flags); - my_cmd.data = rtl8125_eri_read(tp->mmio_addr, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC); + my_cmd.data = rtl8125_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC); spin_unlock_irqrestore(&tp->lock, flags); } else { ret = -EOPNOTSUPP; @@ -167,7 +167,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr) if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) { spin_lock_irqsave(&tp->lock, flags); - rtl8125_eri_write(tp->mmio_addr, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC); + rtl8125_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC); spin_unlock_irqrestore(&tp->lock, flags); } else { ret = -EOPNOTSUPP; @@ -330,7 +330,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr) return -EPERM; spin_lock_irqsave(&tp->lock, flags); - my_cmd.data = rtl8125_mdio_prot_read_phy_ocp(tp, my_cmd.offset); + my_cmd.data = rtl8125_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset); spin_unlock_irqrestore(&tp->lock, flags); if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { @@ -345,7 +345,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr) return -EPERM; spin_lock_irqsave(&tp->lock, flags); - rtl8125_mdio_prot_write_phy_ocp(tp, my_cmd.offset, my_cmd.data); + rtl8125_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data); spin_unlock_irqrestore(&tp->lock, flags); break; diff --git a/package/lean/r8125/src/rtltool.h b/package/lean/r8125/src/rtltool.h index c70594eb81..97e22a4c1e 100644 --- a/package/lean/r8125/src/rtltool.h +++ b/package/lean/r8125/src/rtltool.h @@ -4,7 +4,7 @@ # r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free From c6bb4b7e8839db797a532c022593aaa4d3b773cd Mon Sep 17 00:00:00 2001 From: ricksuzade-maker <58425544+ricksuzade-maker@users.noreply.github.com> Date: Wed, 24 Jun 2020 08:51:46 +0800 Subject: [PATCH 22/25] Bump wireguard to 1.0.20200623 Bump wireguard to the newest version --- package/network/services/wireguard/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/network/services/wireguard/Makefile b/package/network/services/wireguard/Makefile index c796aa82f9..b7adf27ec1 100644 --- a/package/network/services/wireguard/Makefile +++ b/package/network/services/wireguard/Makefile @@ -11,12 +11,12 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=wireguard -PKG_VERSION:=1.0.20200611 +PKG_VERSION:=1.0.20200623 PKG_RELEASE:=1 PKG_SOURCE:=wireguard-linux-compat-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://git.zx2c4.com/wireguard-linux-compat/snapshot/ -PKG_HASH:=9b0478c3b1f3a7b488916e632e2fcbb1383bb1a2ef294489858ce2ba1da3246d +PKG_HASH:=130937724515799edf05ff8216bc837df8acda879428f3a7f96a3287758f9445 PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=COPYING From fc6930876d8b9f83b9ff78df55934d8351169b00 Mon Sep 17 00:00:00 2001 From: zhusir Date: Wed, 24 Jun 2020 09:11:10 +0800 Subject: [PATCH 23/25] update v2ray version to 4.25.1 --- package/lean/v2ray/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/lean/v2ray/Makefile b/package/lean/v2ray/Makefile index 0189fbcb53..638f0781fd 100644 --- a/package/lean/v2ray/Makefile +++ b/package/lean/v2ray/Makefile @@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=v2ray -PKG_VERSION:=4.25.0 +PKG_VERSION:=4.25.1 PKG_RELEASE:=1 PKG_BUILD_DIR:=$(BUILD_DIR)/v2ray-core-$(PKG_VERSION) PKG_SOURCE:=v2ray-core-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://codeload.github.com/v2fly/v2ray-core/tar.gz/v$(PKG_VERSION)? -PKG_HASH:=473936a19c63aaa2a51047230fc955c6236c4c9002e25307dd2f7a2673c40161 +PKG_HASH:=e6fd18d556ea52eb154eb4857759a75be4d3d77053e4ba29f9d2820763a3ca52 PKG_LICENSE:=MIT PKG_LICENSE_FILES:=LICENSE From c2134e0e184decbd3191f0f470aeda82d4f030cb Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Thu, 25 Jun 2020 16:20:13 +0800 Subject: [PATCH 24/25] x64: Mellanox Connect-X 40Gbps card by default --- target/linux/x86/64/target.mk | 2 +- target/linux/x86/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/linux/x86/64/target.mk b/target/linux/x86/64/target.mk index 08611832e1..95e32b3360 100644 --- a/target/linux/x86/64/target.mk +++ b/target/linux/x86/64/target.mk @@ -1,6 +1,6 @@ ARCH:=x86_64 BOARDNAME:=x64 64bit -DEFAULT_PACKAGES += kmod-button-hotplug kmod-e1000e kmod-e1000 kmod-r8169 kmod-igb kmod-bnx2 +DEFAULT_PACKAGES += kmod-button-hotplug kmod-e1000e kmod-e1000 kmod-igb kmod-bnx2 define Target/Description Build images for 64 bit systems including virtualized guests. diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index cb33fb617c..36610c8acb 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -25,7 +25,7 @@ htop lm-sensors autocore automount autosamba luci-app-ipsec-vpnd luci-proto-bond luci-app-airplay2 luci-app-music-remote-center luci-app-qbittorrent luci-app-amule luci-app-openvpn-server \ ath10k-firmware-qca988x ath10k-firmware-qca9888 ath10k-firmware-qca9984 brcmfmac-firmware-43602a1-pcie \ kmod-sound-hda-core kmod-sound-hda-codec-realtek kmod-sound-hda-codec-via kmod-sound-via82xx kmod-sound-hda-intel kmod-sound-hda-codec-hdmi kmod-sound-i8x0 kmod-usb-audio \ -kmod-usb-net kmod-usb-net-asix kmod-usb-net-asix-ax88179 kmod-usb-net-rtl8150 kmod-usb-net-rtl8152 kmod-r8168 +kmod-usb-net kmod-usb-net-asix kmod-usb-net-asix-ax88179 kmod-usb-net-rtl8150 kmod-usb-net-rtl8152 kmod-r8168 kmod-mlx4-core kmod-mlx5-core $(eval $(call BuildTarget)) From 0d171461ffdc22df4b2119b7f7dbcef2eff1ccf8 Mon Sep 17 00:00:00 2001 From: doveki <2290218900@qq.com> Date: Thu, 25 Jun 2020 20:54:14 +0800 Subject: [PATCH 25/25] ramips: mt7621: add support for Xiaomi Mi Router 4 --- package/boot/uboot-envtools/files/ramips | 1 + .../linux/ramips/dts/mt7621_xiaomi_mir4.dts | 173 ++++++++++++++++++ target/linux/ramips/image/mt7621.mk | 16 ++ .../mt7621/base-files/etc/board.d/02_network | 7 +- .../mt7621/base-files/lib/upgrade/platform.sh | 1 + 5 files changed, 197 insertions(+), 1 deletion(-) create mode 100755 target/linux/ramips/dts/mt7621_xiaomi_mir4.dts diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips index 6d429240fb..59f6f4d609 100644 --- a/package/boot/uboot-envtools/files/ramips +++ b/package/boot/uboot-envtools/files/ramips @@ -36,6 +36,7 @@ zbtlink,zbt-wg2626) linksys,ea7500-v2|\ xiaomi,mir3p|\ xiaomi,mir3g|\ +xiaomi,mir4|\ xiaomi,miwifi-r3|\ xiaomi,mi-router-ac2100|\ xiaomi,redmi-router-ac2100) diff --git a/target/linux/ramips/dts/mt7621_xiaomi_mir4.dts b/target/linux/ramips/dts/mt7621_xiaomi_mir4.dts new file mode 100755 index 0000000000..ad9bce0033 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_xiaomi_mir4.dts @@ -0,0 +1,173 @@ +/dts-v1/; + +#include "mt7621.dtsi" + +#include +#include + +/ { + compatible = "xiaomi,mir4", "mediatek,mt7621-soc"; + model = "Xiaomi Mi Router 4"; + + aliases { + led-boot = &led_status_yellow; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_yellow; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: status_red { + label = "mir4:red:status"; + gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + }; + + led_status_blue: status_blue { + label = "mir4:blue:status"; + gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; + }; + + led_status_yellow: status_yellow { + label = "mir4:yellow:status"; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + minet { + label = "minet"; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Bootloader"; + reg = <0x0 0x80000>; + }; + + partition@80000 { + label = "Config"; + reg = <0x80000 0x40000>; + }; + + partition@c0000 { + label = "Bdata"; + reg = <0xc0000 0x40000>; + }; + + factory: partition@100000 { + label = "factory"; + reg = <0x100000 0x40000>; + }; + + partition@140000 { + label = "crash"; + reg = <0x140000 0x40000>; + }; + + partition@180000 { + label = "crash_syslog"; + reg = <0x180000 0x40000>; + }; + + partition@1c0000 { + label = "reserved0"; + reg = <0x1c0000 0x40000>; + }; + + /* uboot expects to find kernels at 0x200000 & 0x600000 + * referred to as system 1 & system 2 respectively. + * a kernel is considered suitable for handing control over + * if its linux magic number exists & uImage CRC are correct. + * If either of those conditions fail, a matching sys'n'_fail flag + * is set in uboot env & a restart performed in the hope that the + * alternate kernel is okay. + * if neither kernel checksums ok and both are marked failed, system 2 + * is booted anyway. + * + * Note uboot's tftp flash install writes the transferred + * image to both kernel partitions. + */ + + partition@200000 { + label = "kernel_stock"; + reg = <0x200000 0x400000>; + }; + + partition@600000 { + label = "kernel"; + reg = <0x600000 0x400000>; + }; + + /* ubi partition is the result of squashing + * next consecutive stock partitions: + * - rootfs0 (rootfs partition for stock kernel0), + * - rootfs1 (rootfs partition for stock failsafe kernel1), + * - overlay (used as ubi overlay in stock fw) + * resulting 117,5MiB space for packages. + */ + + partition@a00000 { + label = "ubi"; + reg = <0xa00000 0x7580000>; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "pci14c3,7603"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0000>; + ieee80211-freq-limit = <2400000 2500000>; + }; +}; + +&pcie1 { + wifi@0,0 { + compatible = "pci14c3,7662"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +ðernet { + mtd-mac-address = <&factory 0xe000>; + mediatek,portmap = "llllw"; +}; + +&state_default { + gpio { + ralink,group = "jtag", "uart2", "uart3", "wdt"; + ralink,function = "gpio"; + }; +}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 6cf2d75561..19e59e91c9 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -909,6 +909,22 @@ define Device/xiaomi_mir3p endef TARGET_DEVICES += xiaomi_mir3p +define Device/xiaomi_mir4 + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_SIZE := 4096k + IMAGE_SIZE := 124416k + UBINIZE_OPTS := -E 5 + IMAGES += kernel1.bin rootfs0.bin + IMAGE/kernel1.bin := append-kernel + IMAGE/rootfs0.bin := append-ubi | check-size $$$$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + DEVICE_VENDOR := Xiaomi + DEVICE_MODEL := Mi Router 4 + DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 wpad-openssl uboot-envtools +endef +TARGET_DEVICES += xiaomi_mir4 + define Device/xiaomi_mi-router-ac2100 BLOCKSIZE := 128k PAGESIZE := 2048 diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index e69951315a..e56e24bf60 100755 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -155,6 +155,10 @@ ramips_setup_interfaces() ucidef_add_switch "switch0" \ "1:lan:3" "2:lan:2" "3:lan:1" "4:wan" "6@eth0" ;; + xiaomi,mir4) + ucidef_add_switch "switch0" \ + "1:lan:2" "2:lan:1" "4:wan" "6t@eth0" + ;; xiaomi,mi-router-ac2100|\ xiaomi,redmi-router-ac2100) ucidef_add_switch "switch0" \ @@ -296,7 +300,8 @@ ramips_setup_macs() label_mac=$wan_mac ;; xiaomi,mir3g|\ - xiaomi,mir3p) + xiaomi,mir3p|\ + xiaomi,mir4) lan_mac=$(mtd_get_mac_binary factory 0xe006) label_mac=$lan_mac ;; diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh index d5370295fd..568b0fb4d6 100755 --- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh @@ -55,6 +55,7 @@ platform_do_upgrade() { netis,wf2881|\ xiaomi,mir3g|\ xiaomi,mir3p|\ + xiaomi,mir4|\ xiaomi,mi-router-ac2100|\ xiaomi,redmi-router-ac2100) nand_do_upgrade "$1"