From 9fefa4f77a28c1c608db8e908f606e102f367c17 Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Sat, 21 Sep 2024 17:03:10 +0800 Subject: [PATCH] rockchip: fix armsom sige3 i2s1 clks Signed-off-by: Tianling Shen --- .../arm64/boot/dts/rockchip/rk3568-armsom-sige3.dts | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-armsom-sige3.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-armsom-sige3.dts index 73cf6700e5..4dd18e3c81 100644 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-armsom-sige3.dts +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-armsom-sige3.dts @@ -226,11 +226,6 @@ cpu-supply = <&vdd_cpu>; }; -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - &gmac1 { assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; @@ -253,6 +248,11 @@ status = "okay"; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &hdmi { avdd-0v9-supply = <&vdda0v9_image>; avdd-1v8-supply = <&vcca1v8_image>; @@ -283,6 +283,8 @@ reg = <0x20>; interrupt-parent = <&gpio0>; interrupts = ; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; #clock-cells = <1>; clock-names = "mclk"; clocks = <&cru I2S1_MCLKOUT_TX>;