From a05a50c21283e8b4c1ffd7454b4f36b8d4fc822b Mon Sep 17 00:00:00 2001 From: CN_SZTL Date: Sat, 18 Jul 2020 14:52:23 +0800 Subject: [PATCH] sunxi: switch to kernel 5.4 --- target/linux/sunxi/Makefile | 3 +- .../036-SWC-add-nanopi-r1-and-duo2.patch | 266 ++++++++++++++++++ ...0-ARM-dts-friendlyelec-nanopi-r1s-h5.patch | 245 ++++++++++++++++ 3 files changed, 512 insertions(+), 2 deletions(-) create mode 100644 target/linux/sunxi/patches-5.4/036-SWC-add-nanopi-r1-and-duo2.patch create mode 100644 target/linux/sunxi/patches-5.4/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch diff --git a/target/linux/sunxi/Makefile b/target/linux/sunxi/Makefile index 7639f42f6d..16eb4090fc 100644 --- a/target/linux/sunxi/Makefile +++ b/target/linux/sunxi/Makefile @@ -14,8 +14,7 @@ FEATURES:=fpu usb ext4 display rtc squashfs SUBTARGETS:=cortexa8 cortexa7 cortexa53 MAINTAINER:=Zoltan HERPAI -KERNEL_PATCHVER:=4.19 -KERNEL_TESTING_PATCHVER:=5.4 +KERNEL_PATCHVER:=5.4 KERNELNAME:=zImage dtbs # A10: Cortex-A8 diff --git a/target/linux/sunxi/patches-5.4/036-SWC-add-nanopi-r1-and-duo2.patch b/target/linux/sunxi/patches-5.4/036-SWC-add-nanopi-r1-and-duo2.patch new file mode 100644 index 0000000000..cc4673e55a --- /dev/null +++ b/target/linux/sunxi/patches-5.4/036-SWC-add-nanopi-r1-and-duo2.patch @@ -0,0 +1,266 @@ +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -1108,6 +1108,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \ + sun8i-h3-nanopi-m1.dtb \ + sun8i-h3-nanopi-m1-plus.dtb \ + sun8i-h3-nanopi-neo.dtb \ ++ sun8i-h3-nanopi-duo2.dtb \ ++ sun8i-h3-nanopi-r1.dtb \ + sun8i-h3-nanopi-neo-air.dtb \ + sun8i-h3-orangepi-2.dtb \ + sun8i-h3-orangepi-lite.dtb \ +--- /dev/null ++++ b/configs/nanopi_r1_defconfig +@@ -0,0 +1,22 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN8I_H3=y ++CONFIG_DRAM_CLK=408 ++CONFIG_DRAM_ZQ=3881979 ++CONFIG_DRAM_ODT_EN=y ++CONFIG_MACPWR="PD6" ++# CONFIG_VIDEO_DE2 is not set ++CONFIG_NR_DRAM_BANKS=1 ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_CONSOLE_MUX=y ++CONFIG_SYS_CLK_FREQ=480000000 ++# CONFIG_CMD_FLASH is not set ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-r1" ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +--- /dev/null ++++ b/configs/nanopi_duo2_defconfig +@@ -0,0 +1,21 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SYS_TEXT_BASE=0x4a000000 ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_MACH_SUN8I_H3=y ++CONFIG_DRAM_CLK=408 ++CONFIG_DRAM_ZQ=3881979 ++CONFIG_DRAM_ODT_EN=y ++# CONFIG_VIDEO_DE2 is not set ++CONFIG_DEVEL=y ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_CONSOLE_MUX=y ++CONFIG_SPL=y ++CONFIG_SYS_CLK_FREQ=480000000 ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_SPL_SPI_SUNXI=y ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +--- /dev/null ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts +@@ -0,0 +1,98 @@ ++/* ++ * adapted by Igor Pecovnik igor@armbian.com ++ * Copyright (C) 2017 Jelle van der Waa ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun8i-h3.dtsi" ++#include "sunxi-common-regulators.dtsi" ++ ++#include ++#include ++ ++/ { ++ model = "FriendlyARM NanoPi DUO 2"; ++ compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr { ++ label = "nanopi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ ++ default-state = "on"; ++ }; ++ ++ status { ++ label = "nanopi:blue:status"; ++ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ ++ }; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ ++ cd-inverted; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* USB VBUS is always on */ ++ status = "okay"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts +@@ -0,0 +1,102 @@ ++/* ++ * Copyright (C) 2019 Igor Pecovnik ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include "sun8i-h3-nanopi.dtsi" ++ ++/ { ++ model = "FriendlyARM NanoPi R1"; ++ compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&pio { ++ gmac_power_pin_nanopi: gmac_power_pin@0 { ++ pins = "PD6"; ++ function = "gpio_out"; ++ }; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; diff --git a/target/linux/sunxi/patches-5.4/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch b/target/linux/sunxi/patches-5.4/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch new file mode 100644 index 0000000000..2f0c3a4669 --- /dev/null +++ b/target/linux/sunxi/patches-5.4/230-ARM-dts-friendlyelec-nanopi-r1s-h5.patch @@ -0,0 +1,245 @@ +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-em + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s.dts +@@ -0,0 +1,232 @@ ++/* ++ * Copyright (C) 2017 Icenowy Zheng ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun50i-h5.dtsi" ++ ++#include ++#include ++#include ++#include ++/ { ++ model = "FriendlyElec NanoPi-R1S-H5"; ++ compatible = "friendlyelec,nanopi-r1s-h5", "allwinner,sun50i-h5"; ++ ++ aliases { ++ ethernet0 = &emac; ++ serial0 = &uart0; ++ }; ++ ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_en_npi>; ++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ ++ post-power-on-delay-ms = <200>; ++ }; ++ ++ r-gpio-keys { ++ compatible = "gpio-keys"; ++ ++ k1@0 { ++ label = "k1"; ++ linux,code = ; ++ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ status { ++ label = "status_led"; ++ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ label = "LED2"; ++ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ linux,default-trigger = "netdev"; ++ }; ++ ++ led3 { ++ label = "LED3"; ++ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ linux,default-trigger = "netdev"; ++ }; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ reg_usb0_vbus: usb0-vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb0-vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ ++ status = "okay"; ++ }; ++}; ++ ++ ++ ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@7 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++}; ++&r_pio { ++ wifi_en_npi: wifi_en_pin { ++ pins = "PL7"; ++ function = "gpio_out"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++®_usb0_vbus { ++ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* USB Type-A port's VBUS is always on */ ++ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ ++ usb0_vbus-supply = <®_usb0_vbus>; ++ status = "okay"; ++}; ++