From e40b9a7fa002154e85459791101a0444d99dfb86 Mon Sep 17 00:00:00 2001 From: Tomasz Maciej Nowak Date: Tue, 11 Jul 2023 16:06:21 +0200 Subject: [PATCH 01/11] ib: split out processing user provided packages Some device recipes remove default target packages. If user tries to add them back they will be ignored, since packages list is processed in one go. Process the device recipe packages first and do user ones later, so additions won't get filtered out. Signed-off-by: Tomasz Maciej Nowak --- target/imagebuilder/files/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/imagebuilder/files/Makefile b/target/imagebuilder/files/Makefile index 5020373792..78ec7e2e94 100644 --- a/target/imagebuilder/files/Makefile +++ b/target/imagebuilder/files/Makefile @@ -127,9 +127,11 @@ _call_info: FORCE echo 'Available Profiles:' echo; $(PROFILE_LIST) -BUILD_PACKAGES:=$(USER_PACKAGES) $(sort $(DEFAULT_PACKAGES) $($(USER_PROFILE)_PACKAGES) kernel) +BUILD_PACKAGES:=$(sort $(DEFAULT_PACKAGES) $($(USER_PROFILE)_PACKAGES) kernel) # "-pkgname" in the package list means remove "pkgname" from the package list BUILD_PACKAGES:=$(filter-out $(filter -%,$(BUILD_PACKAGES)) $(patsubst -%,%,$(filter -%,$(BUILD_PACKAGES))),$(BUILD_PACKAGES)) +BUILD_PACKAGES:=$(USER_PACKAGES) $(BUILD_PACKAGES) +BUILD_PACKAGES:=$(filter-out $(filter -%,$(BUILD_PACKAGES)) $(patsubst -%,%,$(filter -%,$(BUILD_PACKAGES))),$(BUILD_PACKAGES)) PACKAGES:= _call_image: staging_dir/host/.prereq-build From 2d5f7035cf45801158bed6f5d0ac0de0002c1810 Mon Sep 17 00:00:00 2001 From: Tomasz Maciej Nowak Date: Tue, 11 Jul 2023 16:09:49 +0200 Subject: [PATCH 02/11] sdk: rename README 'help' target fails not finding a file, so follow up on a change[2] made as a fix for main README[1]. 1. d0113711a31f ("README: port to 21st century") 2. 751486b31fd9 ("build: fix README.md reference after rename") Signed-off-by: Tomasz Maciej Nowak --- target/sdk/files/{README.SDK => README.md} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename target/sdk/files/{README.SDK => README.md} (100%) diff --git a/target/sdk/files/README.SDK b/target/sdk/files/README.md similarity index 100% rename from target/sdk/files/README.SDK rename to target/sdk/files/README.md From bdb4b78210cfb6bc8a6cda62fc990dd45ec3054c Mon Sep 17 00:00:00 2001 From: Adones Pitogo Date: Tue, 11 Jul 2023 13:31:50 +0800 Subject: [PATCH 03/11] build: fix generation of large .vdi images Instead of loading the whole image into the memory when generating the sha256 sum, we load the file in chunks and update the hash incrementally to avoid MemoryError in python. Also remove a stray empty line. Fixes: #13056 Signed-off-by: Adones Pitogo (mention empty line removal, adds Fixes from PR) Signed-off-by: Christian Lamparter --- scripts/json_add_image_info.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/scripts/json_add_image_info.py b/scripts/json_add_image_info.py index 3aeb7ba5fc..915e5f6181 100755 --- a/scripts/json_add_image_info.py +++ b/scripts/json_add_image_info.py @@ -13,7 +13,6 @@ if len(argv) != 2: json_path = Path(argv[1]) file_path = Path(getenv("FILE_DIR")) / getenv("FILE_NAME") - if not file_path.is_file(): print("Skip JSON creation for non existing file", file_path) exit(0) @@ -37,7 +36,14 @@ def get_titles(): device_id = getenv("DEVICE_ID") -hash_file = hashlib.sha256(file_path.read_bytes()).hexdigest() + +sha256_hash = hashlib.sha256() +with open(str(file_path),"rb") as f: + # Read and update hash string value in blocks of 4K + for byte_block in iter(lambda: f.read(4096),b""): + sha256_hash.update(byte_block) + +hash_file = sha256_hash.hexdigest() if file_path.with_suffix(file_path.suffix + ".sha256sum").exists(): hash_unsigned = ( From 861b608ab507bba16bc4dd68055a1e34cd11cf43 Mon Sep 17 00:00:00 2001 From: Christian Svensson Date: Wed, 5 Jul 2023 00:48:46 +0200 Subject: [PATCH 04/11] octeon: enable AT24 unconditionally For the N821 platform we need to load the AT24 EEPROM driver before everything else in order for the MAC address to be available at driver initialization time. Signed-off-by: Christian Svensson --- target/linux/octeon/config-5.15 | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/linux/octeon/config-5.15 b/target/linux/octeon/config-5.15 index cf64ae34f9..2350e45295 100644 --- a/target/linux/octeon/config-5.15 +++ b/target/linux/octeon/config-5.15 @@ -65,6 +65,7 @@ CONFIG_EDAC_OCTEON_LMC=y CONFIG_EDAC_OCTEON_PC=y CONFIG_EDAC_OCTEON_PCI=y CONFIG_EDAC_SUPPORT=y +CONFIG_EEPROM_AT24=y CONFIG_EXT4_FS=y CONFIG_F2FS_FS=y CONFIG_FAT_FS=y @@ -158,6 +159,7 @@ CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y CONFIG_NR_CPUS=16 CONFIG_NR_CPUS_DEFAULT_64=y CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y CONFIG_OCTEON_ETHERNET=y CONFIG_OCTEON_ILM=y CONFIG_OCTEON_MGMT_ETHERNET=y @@ -191,6 +193,8 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_RAS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y CONFIG_RELAY=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y From 6bf0e7649400f5c25828061d14dd5aa76bfc1211 Mon Sep 17 00:00:00 2001 From: Christian Svensson Date: Mon, 3 Jul 2023 00:31:59 +0200 Subject: [PATCH 05/11] octeon: n821: add Cisco vEdge 1000 base This is the first commit to introduce the base for the N821 board used in Cisco vEdge 1000. This commit does not include the custom CPLD drivers but rather everything else that is already present in the upstream kernel. This results in an image that boots, but e.g. the SFP ports are not usable. Hardware: - CPU: Cavium Networks CN6130, 4 cores @ 1.0 GHz - Flash: - 16 MiB SPI NOR presented as 2x8 MiB for A/B boot recovery - 8192 MiB eMMC - RAM: 4096 MiB - Ethernet 1Gbit ports: 1x - Ethernet SFP ports: 8x - USB ports: 2x 3.0 Type-A on front panel - Serial: Two, one internal and one external - JTAG: Yes - LED count: 18x - Button count: 1x - GPIOs: 1x - Power: 2x redundant DC 12V barrel plug - Extra: Slot for SD card on front See the OpenWrt wiki for more hardware details. Installation: - Flash squashfs to /dev/sda2 and put kernel on /dev/sda1. - Update uboot's bootcmd environment variable to match. Full installation guide will be added to OpenWrt wiki when sysupgrade support is added. Signed-off-by: Christian Svensson Signed-off-by: Tommy Nevtelen Tested-by: Viktor Ekmark Tested-by: Daniel Wennberg --- package/boot/uboot-envtools/files/octeon | 23 ++ .../octeon/base-files/etc/board.d/01_network | 3 + .../octeon/base-files/lib/preinit/01_sysinfo | 9 + .../cavium-octeon/cn6130_cisco_vedge1000.dts | 293 ++++++++++++++++++ target/linux/octeon/image/Makefile | 18 ++ 5 files changed, 346 insertions(+) create mode 100644 package/boot/uboot-envtools/files/octeon create mode 100644 target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts diff --git a/package/boot/uboot-envtools/files/octeon b/package/boot/uboot-envtools/files/octeon new file mode 100644 index 0000000000..a6faed6eb3 --- /dev/null +++ b/package/boot/uboot-envtools/files/octeon @@ -0,0 +1,23 @@ +# +# Copyright (C) 2023 OpenWrt.org +# + +[ -e /etc/config/ubootenv ] && exit 0 + +touch /etc/config/ubootenv + +. /lib/uboot-envtools.sh +. /lib/functions.sh + +board=$(board_name) + +case "$board" in +cisco,vedge1000) + ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" + ;; +esac + +config_load ubootenv +config_foreach ubootenv_add_app_config ubootenv + +exit 0 diff --git a/target/linux/octeon/base-files/etc/board.d/01_network b/target/linux/octeon/base-files/etc/board.d/01_network index 906e838a6f..2443c90d60 100644 --- a/target/linux/octeon/base-files/etc/board.d/01_network +++ b/target/linux/octeon/base-files/etc/board.d/01_network @@ -17,6 +17,9 @@ ubnt,edgerouter-4) ubnt,edgerouter-6p) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "lan0" ;; +cisco,vedge1000) + ucidef_set_interfaces_lan_wan "mgmt0" "lan0" + ;; *) ucidef_set_interfaces_lan_wan "eth0" "eth1" ;; diff --git a/target/linux/octeon/base-files/lib/preinit/01_sysinfo b/target/linux/octeon/base-files/lib/preinit/01_sysinfo index b3246eab41..923e3824c7 100644 --- a/target/linux/octeon/base-files/lib/preinit/01_sysinfo +++ b/target/linux/octeon/base-files/lib/preinit/01_sysinfo @@ -3,6 +3,15 @@ do_sysinfo_octeon() { local name machine=$(grep "^system type" /proc/cpuinfo | sed "s/system type.*: \(.*\)/\1/g") + of_machine=$(head -n1 /sys/firmware/devicetree/base/compatible) + + # Sadly for whatever reason the N821 (Cisco Viptela vEdge 1000) uses the + # same supposedly unique board ID as the EdgeRouter. This is bad, so + # we override what cpuinfo gives us using the device tree as a hint. + case "$of_machine" in + "cisco,vedge1000"*) + return 0 + esac case "$machine" in "UBNT_E100"*) diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts new file mode 100644 index 0000000000..e1f308dd52 --- /dev/null +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts @@ -0,0 +1,293 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/include/ "octeon_3xxx.dtsi" + +/ { + compatible = "cisco,vedge1000", "cavium,cn6130"; + model = "Cisco/Viptela vEdge 1000"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&ciu>; + + soc@0 { + smi0: mdio@1180000001800 { + mgmtphy: ethernet-phy@0 { + reg = <0x00>; + }; + }; + + mgmt0: ethernet@1070000100000 { + compatible = "cavium,octeon-5750-mix"; + reg = <0x10700 0x100000 0x00 0x100>, + <0x11800 0xe0000000 0x00 0x300>, + <0x11800 0xe0000400 0x00 0x400>, + <0x11800 0xe0002000 0x00 0x08>; + cell-index = <0x00>; + interrupts = <0x00 0x3e 0x01 0x2e>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + phy-handle = <&mgmtphy>; + }; + + pip: pip@11800a0000000 { + interface@0 { + ethernet@0 { + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(3)>; + label = "lan2"; + /delete-property/ local-mac-address; + }; + + ethernet@1 { + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(4)>; + label = "lan3"; + /delete-property/ local-mac-address; + }; + + ethernet@2 { + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(1)>; + label = "lan0"; + /delete-property/ local-mac-address; + }; + + ethernet@3 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x3>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(2)>; + label = "lan1"; + }; + }; + + interface@1 { + ethernet@0 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x0>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(7)>; + label = "lan6"; + }; + + ethernet@1 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x1>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(8)>; + label = "lan7"; + }; + + ethernet@2 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x2>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(5)>; + label = "lan4"; + }; + + ethernet@3 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x3>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(6)>; + label = "lan5"; + }; + }; + }; + + twsi0: i2c@1180000001000 { + clock-frequency = <400000>; + + jc42@18 { + compatible = "jedec,jc-42.4-temp"; + reg = <0x18>; + }; + }; + + twsi2: i2c@1180000001200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,octeon-3860-twsi"; + reg = <0x11800 0x1200 0x00 0x200>; + interrupts = <0x00 0x3b>; + clock-frequency = <400000>; + + tmp@4c { + compatible = "maxim,max6699"; + reg = <0x4c>; + }; + + rtc@6f { + compatible = "microchip,mcp7941x"; + reg = <0x6f>; + }; + + tlv-eeprom@54 { + compatible = "atmel,24c512"; + reg = <0x54>; + pagesize = <0x80>; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_eeprom: mac-address@8 { + reg = <0x8 6>; + }; + }; + }; + + uart0: serial@1180000000800 { + clock-frequency = <600000000>; + current-speed = <115200>; + }; + + uart1: serial@1180000000c00 { + compatible = "cavium,octeon-3860-uart", "ns16550"; + reg = <0x11800 0xc00 0x00 0x400>; + reg-shift = <0x03>; + interrupts = <0x00 0x23>; + clock-frequency = <600000000>; + current-speed = <115200>; + }; + + mmc0: mmc@1180000002000 { + compatible = "cavium,octeon-6130-mmc"; + reg = <0x11800 0x2000 0x00 0x100 0x11800 0x168 0x00 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x01 0x13 0x00 0x3f>; + + mmc-slot@0 { + compatible = "cavium,octeon-6130-mmc-slot"; + reg = <0x00>; + voltage-ranges = <0xce4 0xce4>; + max-frequency = <0x3197500>; + wp-gpios = <&gpio 0x02 0x00>; + cd-gpios = <&gpio 0x03 0x01>; + cavium,bus-max-width = <0x04>; + }; + }; + + bootbus: bootbus@1180000000000 { + compatible = "cavium,octeon-3860-bootbus"; + reg = <0x11800 0x00 0x00 0x200>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x00 0x1ec00000 0x1400000>, + <1 0 0x10000 0x20000000 0x00>, + <2 0 0x10000 0x30000000 0x00>, + <3 0 0x10000 0x40000000 0x00>, + <4 0 0x10000 0x50000000 0x00>, + <5 0 0x10000 0x60000000 0x00>, + <6 0 0x00 0x1e000000 0x10000>, + <7 0 0x10000 0x80000000 0x00>; + + cavium,cs-config@0 { + compatible = "cavium,octeon-3860-bootbus-config"; + cavium,cs-index = <0x00>; + cavium,t-adr = <0x0a>; + cavium,t-ce = <0x32>; + cavium,t-oe = <0x32>; + cavium,t-we = <0x23>; + cavium,t-rd-hld = <0x19>; + cavium,t-wr-hld = <0x23>; + cavium,t-pause = <0x00>; + cavium,t-wait = <0x12c>; + cavium,t-page = <0x19>; + cavium,t-rd-dly = <0x00>; + cavium,t-ale = <0x03>; + cavium,pages = <0x00>; + cavium,bus-width = <0x10>; + }; + + /delete-node/ cavium,cs-config@1; + /delete-node/ cavium,cs-config@2; + /delete-node/ cavium,cs-config@3; + /delete-node/ cavium,cs-config@4; + /delete-node/ cavium,cs-config@5; + + cavium,cs-config@6 { + compatible = "cavium,octeon-3860-bootbus-config"; + cavium,cs-index = <0x06>; + cavium,t-adr = <0x0a>; + cavium,t-ce = <0x0a>; + cavium,t-oe = <0xa0>; + cavium,t-we = <0x64>; + cavium,t-rd-hld = <0x00>; + cavium,t-wr-hld = <0x00>; + cavium,t-pause = <0x32>; + cavium,t-wait = <0x12c>; + cavium,t-page = <0x12c>; + cavium,t-rd-dly = <0x0a>; + cavium,t-ale = <0x3f>; + cavium,pages = <0x00>; + cavium,bus-width = <0x08>; + /delete-property/ cavium,wait-mode; + }; + + flash0: nor@0,0 { + compatible = "cfi-flash"; + reg = <0x00 0x00 0x1000000>; + bank-width = <2>; + device-width = <1>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x00 0x200000>; + read-only; + }; + + partition@fe0000 { + label = "environment"; + reg = <0xfe0000 0x20000>; + }; + }; + + cpld: cpld@6,0 { + compatible = "cisco,n821-cpld", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg-io-width = <1>; // Syscon uses 4-byte accesses by default + + reg = <0x06 0x00 0x28>; // This is the regmap to be defined for syscon devices.. + ranges = <0 0x06 0x0 0x50>; // .. and this is the addresses to map general subdevices on + }; + }; + + uctl@118006f000000 { + compatible = "cavium,octeon-6335-uctl"; + reg = <0x11800 0x6f000000 0x00 0x100>; + ranges; + #address-cells = <2>; + #size-cells = <2>; + refclk-frequency = <0xb71b00>; + refclk-type = "crystal"; + + ehci@16f0000000000 { + compatible = "cavium,octeon-6335-ehci", "usb-ehci"; + reg = <0x16f00 0x00 0x00 0x100>; + interrupts = <0x00 0x38>; + big-endian-regs; + }; + + ohci@16f0000000400 { + compatible = "cavium,octeon-6335-ohci", "usb-ohci"; + reg = <0x16f00 0x400 0x00 0x100>; + interrupts = <0x00 0x38>; + big-endian-regs; + }; + }; + }; +}; + diff --git a/target/linux/octeon/image/Makefile b/target/linux/octeon/image/Makefile index fa845a2499..dcab815791 100644 --- a/target/linux/octeon/image/Makefile +++ b/target/linux/octeon/image/Makefile @@ -94,4 +94,22 @@ define Device/ubnt_unifi-usg endef TARGET_DEVICES += ubnt_unifi-usg +define Device/cisco_vedge1000 + DEVICE_VENDOR := Cisco Viptela + DEVICE_MODEL := vEdge 1000 + BOARD_NAME := cisco,vedge1000 + DEVICE_PACKAGES += \ + kmod-hwmon-jc42 \ + kmod-hwmon-max6697 \ + kmod-of-mdio \ + kmod-rtc-ds1307 \ + kmod-usb-dwc3 \ + kmod-usb-storage-uas \ + kmod-usb3 + KERNEL := kernel-bin | append-dtb-elf + KERNEL_DEPENDS := $$(wildcard $(DTS_DIR)/$(DEVICE_DTS).dts) + DEVICE_DTS := cn6130_cisco_vedge1000 +endef +TARGET_DEVICES += cisco_vedge1000 + $(eval $(call BuildImage)) From 9009672930f7bda99ec8f6f09a92eb49b6c9aac8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Carsten=20Spie=C3=9F?= Date: Wed, 12 Jul 2023 10:41:25 +0200 Subject: [PATCH 06/11] octeon: ubnt-edgerouter-e300: fix LED settings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit LEDs on Edgerouter 6P didn't work correctly: blue /white LED swapped, on/off state inverted Fixed in device tree: swap the GPIO ports for power:blue and power:white LEDs change LED activity from LOW to HIGH Tested on Edgerouter 6P Signed-off-by: Carsten Spieß --- .../boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi index 7eafa32cf6..e63598fc97 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi @@ -33,12 +33,12 @@ led_power_blue: power_blue { label = "blue:power"; - gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; }; led_power_white: power_white { label = "white:power"; - gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; }; }; From 2b1d7965c7e74e1b31ff29a966eaf6334b0d7057 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Carsten=20Spie=C3=9F?= Date: Wed, 12 Jul 2023 10:16:27 +0200 Subject: [PATCH 07/11] octeon: ubnt-edgerouter-e300: fix missing MTD partition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MAC addresses should be read from 3rd MTD partition, but only two MTD partitions are populated. To fix it, a partitions node has to surround the partition nodes in device tree. Tested with Edgerouter 6P Signed-off-by: Carsten Spieß (fixed checkpatch complains) Signed-off-by: Christian Lamparter --- .../cn7130_ubnt_edgerouter-e300.dtsi | 34 +++++++++++-------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi index e63598fc97..855736b209 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi @@ -99,22 +99,28 @@ reg = <0>; spi-max-frequency = <25000000>; - partition@0 { - label = "boot0"; - read-only; - reg = <0x000000 0x300000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - partition@300000 { - label = "dummy"; - read-only; - reg = <0x300000 0x100000>; - }; + partition@0 { + label = "boot0"; + read-only; + reg = <0x000000 0x300000>; + }; - eeprom: partition@400000 { - label = "eeprom"; - read-only; - reg = <0x400000 0x10000>; + partition@300000 { + label = "dummy"; + read-only; + reg = <0x300000 0x100000>; + }; + + eeprom: partition@400000 { + label = "eeprom"; + read-only; + reg = <0x400000 0x10000>; + }; }; }; }; From 700f11aaadb7baa38285ed8f928e976a29a72eed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Carsten=20Spie=C3=9F?= Date: Wed, 12 Jul 2023 10:24:11 +0200 Subject: [PATCH 08/11] octeon: ubnt-edgerouter-4/6p: devicetree cleanup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit removed redundant eeprom partition nodes from cn7130_ubnt_edgerouter-4.dts and cn7130_ubnt_edgerouter-6p.dts as they are identically defined in cn7130_ubnt_edgerouter-e300.dtsi. Signed-off-by: Carsten Spieß (integrated eeprom referenced node in the .dtsi) Signed-off-by: Christian Lamparter --- .../cn7130_ubnt_edgerouter-4.dts | 10 --------- .../cn7130_ubnt_edgerouter-6p.dts | 9 -------- .../cn7130_ubnt_edgerouter-e300.dtsi | 21 +++++++++---------- 3 files changed, 10 insertions(+), 30 deletions(-) diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts index 75e2c794b9..f8d511b599 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts @@ -19,13 +19,3 @@ }; }; }; - -&eeprom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_eeprom_0: macaddr@0 { - reg = <0x0 0x6>; - }; -}; diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts index c1a41cbf70..f354d08199 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts @@ -62,12 +62,3 @@ }; }; -&eeprom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_eeprom_0: macaddr@0 { - reg = <0x0 0x6>; - }; -}; diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi index 855736b209..9be52f9175 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi @@ -116,10 +116,18 @@ reg = <0x300000 0x100000>; }; - eeprom: partition@400000 { + partition@400000 { + compatible = "nvmem-cells"; + reg = <0x400000 0x10000>; label = "eeprom"; read-only; - reg = <0x400000 0x10000>; + + #address-cells = <1>; + #size-cells = <1>; + + macaddr_eeprom_0: macaddr@0 { + reg = <0x0 0x6>; + }; }; }; }; @@ -213,12 +221,3 @@ }; }; -&eeprom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_eeprom_0: macaddr@0 { - reg = <0x0 0x6>; - }; -}; From b370753fc409eb2220af7caed9ffd66beed2d041 Mon Sep 17 00:00:00 2001 From: Pawel Dembicki Date: Fri, 7 Jul 2023 13:51:49 +0200 Subject: [PATCH 09/11] realtek: add support for HPE 1920-8g-poe+ Hardware information: --------------------- - RTL8380 SoC - 8 Gigabit RJ45 PoE ports (built-in RTL8218B) - 2 SFP ports (built-in SerDes) - RJ45 RS232 port on front panel - 32 MiB NOR Flash - 128 MiB DDR3 DRAM - PT7A7514 watchdog - PoE chips: Nuvoton M0516LDE + BCM59121 Known issues: --------------------- - PoE LEDs are uncontrolled. (Manual taken from f2f09bc00280) Booting initramfs image: ------------------------ - Prepare a FTP or TFTP server serving the OpenWrt initramfs image and connect the server to a switch port. - Connect to the console port of the device and enter the extended boot menu by typing Ctrl+B when prompted. - Choose the menu option "<3> Enter Ethernet SubMenu". - Set network parameters via the option "<5> Modify Ethernet Parameter". Enter the FTP/TFTP filename as "Load File Name" ("Target File Name" can be left blank, it is not required for booting from RAM). Note that the configuration is saved on flash, so it only needs to be done once. - Select "<1> Download Application Program To SDRAM And Run". Initial installation: --------------------- - Boot an initramfs image as described above, then use sysupgrade to install OpenWrt permanently. After initial installation, the bootloader needs to be configured to load the correct image file - Enter the extended boot menu again and choose "<4> File Control", then select "<2> Set Application File type". - Enter the number of the file "openwrt-kernel.bin" (should be 1), and use the option "<1> +Main" to select it as boot image. - Choose "<0> Exit To Main Menu" and then "<1> Boot System". NOTE: The bootloader on these devices can only boot from the VFS filesystem which normally spans most of the flash. With OpenWrt, only the first part of the firmware partition contains a valid filesystem, the rest is used for rootfs. As the bootloader does not know about this, you must not do any file operations in the bootloader, as this may corrupt the OpenWrt installation (selecting the boot image is an exception, as it only stores a flag in the bootloader data, but doesn't write to the filesystem). Example PoE config file (/etc/config/poe): --------------------- config global option budget '180' config port option enable '1' option id '1' option name 'lan8' option poe_plus '1' option priority '2' config port option enable '1' option id '2' option name 'lan7' option poe_plus '1' option priority '2' config port option enable '1' option id '3' option name 'lan6' option poe_plus '1' option priority '2' config port option enable '1' option id '4' option name 'lan5' option poe_plus '1' option priority '2' config port option enable '1' option id '5' option name 'lan4' option poe_plus '1' option priority '2' config port option enable '1' option id '6' option name 'lan3' option poe_plus '1' option priority '2' config port option enable '1' option id '7' option name 'lan2' option poe_plus '1' option priority '2' config port option enable '1' option id '8' option name 'lan1' option poe_plus '1' option priority '2' Signed-off-by: Pawel Dembicki --- .../realtek/base-files/etc/board.d/02_network | 5 + .../base-files/etc/board.d/03_gpio_switches | 16 +++ .../dts-5.15/rtl8380_hpe_1920-8g-poe.dts | 12 ++ .../realtek/dts-5.15/rtl8380_hpe_1920-8g.dts | 109 +---------------- .../realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi | 112 ++++++++++++++++++ target/linux/realtek/image/rtl838x.mk | 8 ++ 6 files changed, 154 insertions(+), 108 deletions(-) create mode 100644 target/linux/realtek/base-files/etc/board.d/03_gpio_switches create mode 100644 target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts create mode 100644 target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network index 1dea2ad5a6..90b45abf94 100644 --- a/target/linux/realtek/base-files/etc/board.d/02_network +++ b/target/linux/realtek/base-files/etc/board.d/02_network @@ -21,6 +21,7 @@ board=$(board_name) board_config_update lan_list=$(ls -1 -v -d /sys/class/net/lan* | xargs -n1 basename | xargs) +lan_list_rev=$(ls -1 -v -d -r /sys/class/net/lan* | xargs -n1 basename | xargs) ucidef_set_bridge_device switch ucidef_set_interface_lan "$lan_list" @@ -30,6 +31,7 @@ lan_mac_end="" label_mac="" case $board in hpe,1920-8g|\ +hpe,1920-8g-poe|\ hpe,1920-16g|\ hpe,1920-24g) label_mac=$(mtd_get_mac_binary factory 0x68) @@ -65,6 +67,9 @@ done [ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac case $board in +hpe,1920-8g-poe) + ucidef_set_poe 180 "$lan_list_rev" "lan9 lan10" + ;; netgear,gs110tpp-v1) ucidef_set_poe 130 "$lan_list" "lan9 lan10" ;; diff --git a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches new file mode 100644 index 0000000000..abfcb8e592 --- /dev/null +++ b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches @@ -0,0 +1,16 @@ + +. /lib/functions/uci-defaults.sh + +board_config_update + +board=$(board_name) + +case "$board" in +hpe,1920-8g-poe) + ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts new file mode 100644 index 0000000000..3b00c31411 --- /dev/null +++ b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "rtl8380_hpe_1920-8g.dtsi" + +/ { + compatible = "hpe,1920-8g-poe", "realtek,rtl838x-soc"; + model = "HPE 1920-8G-PoE+ (JG922A)"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts index 6ddb2d8dcc..ac95a00c01 100644 --- a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts +++ b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts @@ -1,115 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT -#include "rtl838x.dtsi" -#include "rtl838x_hpe_1920.dtsi" +#include "rtl8380_hpe_1920-8g.dtsi" / { compatible = "hpe,1920-8g", "realtek,rtl838x-soc"; model = "HPE 1920-8G (JG920A)"; - - gpio1: rtl8231-gpio { - compatible = "realtek,rtl8231-gpio"; - #gpio-cells = <2>; - gpio-controller; - indirect-access-bus-id = <0>; - }; - - i2c0: i2c-gpio-0 { - compatible = "i2c-gpio"; - sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <2>; - #address-cells = <1>; - #size-cells = <0>; - }; - - sfp0: sfp-0 { - compatible = "sff,sfp"; - i2c-bus = <&i2c0>; - los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>; - // tx-fault and tx-disable unconnected - }; - - i2c1: i2c-gpio-1 { - compatible = "i2c-gpio"; - sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <2>; - #address-cells = <1>; - #size-cells = <0>; - }; - - sfp1: sfp-1 { - compatible = "sff,sfp"; - i2c-bus = <&i2c1>; - los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>; - // tx-fault and tx-disable unconnected - }; -}; - -ðernet0 { - mdio: mdio-bus { - compatible = "realtek,rtl838x-mdio"; - regmap = <ðernet0>; - #address-cells = <1>; - #size-cells = <0>; - - INTERNAL_PHY(8) - INTERNAL_PHY(9) - INTERNAL_PHY(10) - INTERNAL_PHY(11) - INTERNAL_PHY(12) - INTERNAL_PHY(13) - INTERNAL_PHY(14) - INTERNAL_PHY(15) - - INTERNAL_PHY(24) - INTERNAL_PHY(26) - }; -}; - -&switch0 { - ports { - #address-cells = <1>; - #size-cells = <0>; - - SWITCH_PORT(8, 1, internal) - SWITCH_PORT(9, 2, internal) - SWITCH_PORT(10, 3, internal) - SWITCH_PORT(11, 4, internal) - SWITCH_PORT(12, 5, internal) - SWITCH_PORT(13, 6, internal) - SWITCH_PORT(14, 7, internal) - SWITCH_PORT(15, 8, internal) - - port@24 { - reg = <24>; - label = "lan9"; - phy-handle = <&phy24>; - phy-mode = "1000base-x"; - managed = "in-band-status"; - sfp = <&sfp0>; - }; - - port@26 { - reg = <26>; - label = "lan10"; - phy-handle = <&phy26>; - phy-mode = "1000base-x"; - managed = "in-band-status"; - sfp = <&sfp1>; - }; - - port@28 { - ethernet = <ðernet0>; - reg = <28>; - phy-mode = "internal"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; }; diff --git a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi new file mode 100644 index 0000000000..58f2c1f6c9 --- /dev/null +++ b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "rtl838x.dtsi" +#include "rtl838x_hpe_1920.dtsi" + +/ { + gpio1: rtl8231-gpio { + compatible = "realtek,rtl8231-gpio"; + #gpio-cells = <2>; + gpio-controller; + indirect-access-bus-id = <0>; + }; + + i2c0: i2c-gpio-0 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp0: sfp-0 { + compatible = "sff,sfp"; + i2c-bus = <&i2c0>; + los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>; + // tx-fault and tx-disable unconnected + }; + + i2c1: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp1: sfp-1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>; + // tx-fault and tx-disable unconnected + }; +}; + +ðernet0 { + mdio: mdio-bus { + compatible = "realtek,rtl838x-mdio"; + regmap = <ðernet0>; + #address-cells = <1>; + #size-cells = <0>; + + INTERNAL_PHY(8) + INTERNAL_PHY(9) + INTERNAL_PHY(10) + INTERNAL_PHY(11) + INTERNAL_PHY(12) + INTERNAL_PHY(13) + INTERNAL_PHY(14) + INTERNAL_PHY(15) + + INTERNAL_PHY(24) + INTERNAL_PHY(26) + }; +}; + +&switch0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + SWITCH_PORT(8, 1, internal) + SWITCH_PORT(9, 2, internal) + SWITCH_PORT(10, 3, internal) + SWITCH_PORT(11, 4, internal) + SWITCH_PORT(12, 5, internal) + SWITCH_PORT(13, 6, internal) + SWITCH_PORT(14, 7, internal) + SWITCH_PORT(15, 8, internal) + + port@24 { + reg = <24>; + label = "lan9"; + phy-handle = <&phy24>; + phy-mode = "1000base-x"; + managed = "in-band-status"; + sfp = <&sfp0>; + }; + + port@26 { + reg = <26>; + label = "lan10"; + phy-handle = <&phy26>; + phy-mode = "1000base-x"; + managed = "in-band-status"; + sfp = <&sfp1>; + }; + + port@28 { + ethernet = <ðernet0>; + reg = <28>; + phy-mode = "internal"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk index 7c7bc8a0e5..73930f4d6f 100644 --- a/target/linux/realtek/image/rtl838x.mk +++ b/target/linux/realtek/image/rtl838x.mk @@ -99,6 +99,14 @@ define Device/hpe_1920-8g endef TARGET_DEVICES += hpe_1920-8g +define Device/hpe_1920-8g-poe + $(Device/hpe_1920) + SOC := rtl8380 + DEVICE_MODEL := 1920-8G-PoE+ (JG922A) + H3C_DEVICE_ID := 0x00010025 +endef +TARGET_DEVICES += hpe_1920-8g-poe + define Device/hpe_1920-16g $(Device/hpe_1920) SOC := rtl8382 From e9911f10e482f3174f745a36c0c9fd7964758caf Mon Sep 17 00:00:00 2001 From: Christian Lamparter Date: Sat, 15 Jul 2023 20:58:10 +0200 Subject: [PATCH 10/11] sdk: update SDK Makefile the SDK's Makefile referenced the old file name. Update it too. Fixes: 2d5f7035cf45 ("sdk: rename README") Signed-off-by: Christian Lamparter --- target/sdk/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sdk/Makefile b/target/sdk/Makefile index b688eb4cba..667d00b43f 100644 --- a/target/sdk/Makefile +++ b/target/sdk/Makefile @@ -145,7 +145,7 @@ $(BIN_DIR)/$(SDK_NAME).tar.xz: clean ./files/Config.in \ ./files/Makefile \ ./files/include/prepare.mk \ - ./files/README.SDK \ + ./files/README.md \ $(SDK_BUILD_DIR)/ mkdir -p $(SDK_BUILD_DIR)/package/kernel $(CP) \ From 1c56801dd2e696cac7da45912b5e3ea1165549d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Kwiatek?= Date: Wed, 12 Jul 2023 21:39:39 +0200 Subject: [PATCH 11/11] ath11k-firmware: update to stable WLAN.HK.2.9.0.1-01837 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Changelog from quic: Bug fixes, stability improvements from previous releases are present. There are no backward comatibility issues with this release. Tested-by: Michał Kwiatek # Xiaomi AX3600 Signed-off-by: Michał Kwiatek [ improve commit description ] Signed-off-by: Christian Marangi --- package/firmware/ath11k-firmware/Makefile | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/package/firmware/ath11k-firmware/Makefile b/package/firmware/ath11k-firmware/Makefile index fc7968a957..7acc233b6f 100644 --- a/package/firmware/ath11k-firmware/Makefile +++ b/package/firmware/ath11k-firmware/Makefile @@ -8,9 +8,9 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ath11k-firmware -PKG_SOURCE_DATE:=2023-03-31 -PKG_SOURCE_VERSION:=a039049a9349722fa5c74185452ab04644a0d351 -PKG_MIRROR_HASH:=ed401e3f6e91d70565b3396139193f7e815f410db93700697205ac8ed1b828c5 +PKG_SOURCE_DATE:=2023-07-06 +PKG_SOURCE_VERSION:=69f6b7346b64784188dba791a9cfb614eefa441f +PKG_MIRROR_HASH:=0f0203f755cb6713f6a1f41397dcd0f1a24e5cdbe75258af961343b927ebb3e9 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git @@ -60,14 +60,14 @@ $(eval $(call Download,qcn9074-board)) define Package/ath11k-firmware-ipq8074/install $(INSTALL_DIR) $(1)/lib/firmware/IPQ8074 $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \ + $(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/2.9.0.1/WLAN.HK.2.9.0.1-01837-QCAHKSWPL_SILICONZ-1/* \ $(1)/lib/firmware/IPQ8074/ endef define Package/ath11k-firmware-qcn9074/install $(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCN9074/hw1.0 $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \ + $(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/2.9.0.1/WLAN.HK.2.9.0.1-01837-QCAHKSWPL_SILICONZ-1/* \ $(1)/lib/firmware/ath11k/QCN9074/hw1.0/ $(INSTALL_BIN) \ $(DL_DIR)/$(QCN9074_BOARD_FILE) $(1)/lib/firmware/ath11k/QCN9074/hw1.0/board-2.bin