diff --git a/include/cmake.mk b/include/cmake.mk index e2d13c8ab3..12855982f6 100644 --- a/include/cmake.mk +++ b/include/cmake.mk @@ -60,6 +60,12 @@ define Build/Configure/Default -DDL_LIBRARY=$(STAGING_DIR) \ -DCMAKE_PREFIX_PATH=$(STAGING_DIR) \ -DCMAKE_SKIP_RPATH=TRUE \ + -DCMAKE_EXPORT_PACKAGE_REGISTRY=FALSE \ + -DCMAKE_EXPORT_NO_PACKAGE_REGISTRY=TRUE \ + -DCMAKE_FIND_USE_PACKAGE_REGISTRY=FALSE \ + -DCMAKE_FIND_PACKAGE_NO_PACKAGE_REGISTRY=TRUE \ + -DCMAKE_FIND_USE_SYSTEM_PACKAGE_REGISTRY=FALSE \ + -DCMAKE_FIND_PACKAGE_NO_SYSTEM_PACKAGE_REGISTRY=TRUE \ $(CMAKE_OPTIONS) \ $(CMAKE_SOURCE_DIR) \ ) @@ -93,6 +99,12 @@ define Host/Configure/Default -DCMAKE_PREFIX_PATH=$(HOST_BUILD_PREFIX) \ -DCMAKE_SKIP_RPATH=TRUE \ -DCMAKE_INSTALL_LIBDIR=lib \ + -DCMAKE_EXPORT_PACKAGE_REGISTRY=FALSE \ + -DCMAKE_EXPORT_NO_PACKAGE_REGISTRY=TRUE \ + -DCMAKE_FIND_USE_PACKAGE_REGISTRY=FALSE \ + -DCMAKE_FIND_PACKAGE_NO_PACKAGE_REGISTRY=TRUE \ + -DCMAKE_FIND_USE_SYSTEM_PACKAGE_REGISTRY=FALSE \ + -DCMAKE_FIND_PACKAGE_NO_SYSTEM_PACKAGE_REGISTRY=TRUE \ $(CMAKE_HOST_OPTIONS) \ $(HOST_CMAKE_SOURCE_DIR) \ ) diff --git a/include/kernel-version.mk b/include/kernel-version.mk index 39d31e479e..007ae358cd 100644 --- a/include/kernel-version.mk +++ b/include/kernel-version.mk @@ -8,11 +8,11 @@ endif LINUX_VERSION-4.14 = .193 LINUX_VERSION-4.19 = .138 -LINUX_VERSION-5.4 = .59 +LINUX_VERSION-5.4 = .60 LINUX_KERNEL_HASH-4.14.193 = 0b0fb41d4430e1a42738b341cbfd2f41951aa5cd02acabbd53f076119c8b9f03 LINUX_KERNEL_HASH-4.19.138 = d15c27d05f6c527269b75b30cc72972748e55720e7e00ad8abbaa4fe3b1d5e02 -LINUX_KERNEL_HASH-5.4.59 = 9bcb9db2e4435f2e5948375862baf0973f1d7860ebe3d750383e5a6deac4b2fd +LINUX_KERNEL_HASH-5.4.60 = add2ab2385c40fc9a3dfebe403e56da8500b633dc7dc42cf0c670c61d151a223 remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1)))) sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1))))))) diff --git a/package/firmware/linux-firmware/Makefile b/package/firmware/linux-firmware/Makefile index b50a025409..7dbcbdd8a3 100644 --- a/package/firmware/linux-firmware/Makefile +++ b/package/firmware/linux-firmware/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=linux-firmware -PKG_VERSION:=20200619 -PKG_RELEASE:=1 +PKG_VERSION:=20200817 +PKG_RELEASE:=2 PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=962d3ae197d226c8259f9cc7746f7ef12a9d23787cd56bd27302021ba6339722 +PKG_HASH:=76d05d5f1eff268d3b80675245fa596f557bd55ee2e16ddd54d18ffeae943887 PKG_MAINTAINER:=Felix Fietkau diff --git a/package/firmware/linux-firmware/marvell.mk b/package/firmware/linux-firmware/marvell.mk index 6c3f171216..78edac0ff3 100644 --- a/package/firmware/linux-firmware/marvell.mk +++ b/package/firmware/linux-firmware/marvell.mk @@ -20,12 +20,14 @@ define Package/mwifiex-pcie-firmware/install endef $(eval $(call BuildPackage,mwifiex-pcie-firmware)) -Package/mwifiex-sdio-firmware = $(call Package/firmware-default,Marvell 8887 firmware) +Package/mwifiex-sdio-firmware = $(call Package/firmware-default,Marvell 8887/8997 firmware) define Package/mwifiex-sdio-firmware/install $(INSTALL_DIR) $(1)/lib/firmware/mrvl $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/mrvl/sd8887_uapsta.bin \ + $(PKG_BUILD_DIR)/mrvl/sdsd8997_combo_v4.bin \ $(1)/lib/firmware/mrvl/ + ln -s ../mrvl/sdsd8997_combo_v4.bin $(1)/lib/firmware/mrvl/sd8997_uapsta.bin endef $(eval $(call BuildPackage,mwifiex-sdio-firmware)) diff --git a/package/kernel/exfat/Makefile b/package/kernel/exfat/Makefile index 1fa859c607..c3d20fe263 100644 --- a/package/kernel/exfat/Makefile +++ b/package/kernel/exfat/Makefile @@ -7,24 +7,17 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=exfat -PKG_VERSION:=5.8.4 +PKG_VERSION:=5.8.7 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://codeload.github.com/namjaejeon/linux-exfat-oot/tar.gz/$(PKG_VERSION)? -PKG_HASH:=47162495bdf9a7e02d6142dfcd4364d7325a4cf75a0439926cf9e8a9d959627b +PKG_HASH:=20254677bed3f456e89cc9d757c1a47abbadab4d75640eef4a995370a37be3f4 PKG_MAINTAINER:= PKG_LICENSE:=GPL-2.0-only -#PKG_BUILD_PARALLEL:=1 -#PKG_USE_MIPS16:=0 - -# exfat-oot's makefile needs this to know where to build the kernel module -#export KERNELDIR:=$(LINUX_DIR) - include $(INCLUDE_DIR)/package.mk -#include $(INCLUDE_DIR)/kernel-defaults.mk TAR_OPTIONS+= --strip-components 1 TAR_CMD=$(HOST_TAR) -C $(1) $(TAR_OPTIONS) @@ -49,7 +42,6 @@ define Build/Compile $(PKG_EXTRA_KCONFIG) \ CONFIG_EXFAT_FS=m \ modules -# $(MAKE) -C $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION) M="$(PKG_BUILD_DIR)" modules endef $(eval $(call KernelPackage,fs-exfat)) diff --git a/package/kernel/exfat/patches/010-fstream.patch b/package/kernel/exfat/patches/010-fstream.patch deleted file mode 100644 index dc1221c611..0000000000 --- a/package/kernel/exfat/patches/010-fstream.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/super.c -+++ b/super.c -@@ -292,14 +292,14 @@ static const struct fs_parameter_spec exfat_param_specs[] = { - #endif - fsparam_flag("discard", Opt_discard), - fsparam_s32("time_offset", Opt_time_offset), -- __fsparam(NULL, "utf8", Opt_utf8, fs_param_deprecated, -- NULL), -- __fsparam(NULL, "debug", Opt_debug, fs_param_deprecated, -- NULL), -+ __fsparam(NULL, "utf8", Opt_utf8, fs_param_deprecated -+ ), -+ __fsparam(NULL, "debug", Opt_debug, fs_param_deprecated -+ ), - __fsparam(fs_param_is_u32, "namecase", Opt_namecase, -- fs_param_deprecated, NULL), -+ fs_param_deprecated), - __fsparam(fs_param_is_u32, "codepage", Opt_codepage, -- fs_param_deprecated, NULL), -+ fs_param_deprecated), - {} - }; - diff --git a/package/kernel/linux/modules/hwmon.mk b/package/kernel/linux/modules/hwmon.mk index 0b9e9d8b13..a39a8910f0 100644 --- a/package/kernel/linux/modules/hwmon.mk +++ b/package/kernel/linux/modules/hwmon.mk @@ -409,7 +409,9 @@ $(eval $(call KernelPackage,hwmon-pwmfan)) define KernelPackage/hwmon-sch5627 TITLE:=SMSC SCH5627 monitoring support - KCONFIG:=CONFIG_SENSORS_SCH5627 + KCONFIG:= \ + CONFIG_SENSORS_SCH5627 \ + CONFIG_WATCHDOG_CORE=y FILES:= \ $(LINUX_DIR)/drivers/hwmon/sch5627.ko \ $(LINUX_DIR)/drivers/hwmon/sch56xx-common.ko diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk index 7a57df568b..26c8f937f4 100644 --- a/package/kernel/mac80211/ath.mk +++ b/package/kernel/mac80211/ath.mk @@ -1,6 +1,6 @@ PKG_DRIVERS += \ ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k \ - carl9170 owl-loader + carl9170 owl-loader ar5523 PKG_CONFIG_DEPENDS += \ CONFIG_PACKAGE_ATH_DEBUG \ @@ -67,6 +67,7 @@ config-$(call config_package,ath6kl-sdio) += ATH6KL_SDIO config-$(call config_package,ath6kl-usb) += ATH6KL_USB config-$(call config_package,carl9170) += CARL9170 +config-$(call config_package,ar5523) += AR5523 define KernelPackage/ath/config if PACKAGE_kmod-ath @@ -301,3 +302,11 @@ define KernelPackage/owl-loader/description This is necessary for devices like the Cisco Meraki Z1. endef + +define KernelPackage/ar5523 + $(call KernelPackage/mac80211/Default) + TITLE:=Driver for Atheros AR5523 USB sticks + DEPENDS:=@USB_SUPPORT +kmod-mac80211 +kmod-ath +kmod-usb-core +kmod-input-core + FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ar5523/ar5523.ko + AUTOLOAD:=$(call AutoProbe,ar5523) +endef diff --git a/package/libs/mbedtls/Makefile b/package/libs/mbedtls/Makefile index 3b4913da6b..c23dd2df66 100644 --- a/package/libs/mbedtls/Makefile +++ b/package/libs/mbedtls/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mbedtls -PKG_VERSION:=2.16.6 +PKG_VERSION:=2.16.7 PKG_RELEASE:=1 PKG_USE_MIPS16:=0 -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-gpl.tgz -PKG_SOURCE_URL:=https://tls.mbed.org/download/ -PKG_HASH:=80a484df42f32dbe95665cd4b18ce0dd14b6c67dfd561d36d1475802e41eb3ed +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz +PKG_SOURCE_URL:=https://codeload.github.com/ARMmbed/mbedtls/tar.gz/v$(PKG_VERSION)? +PKG_HASH:=c95b11557ee97d2bdfd48cd57cf9b648a6cddd2ca879e3c35c4e7525f2871992 PKG_BUILD_PARALLEL:=1 PKG_LICENSE:=GPL-2.0-or-later diff --git a/package/libs/mbedtls/patches/200-config.patch b/package/libs/mbedtls/patches/200-config.patch index 298fa4aa79..70d178feb8 100644 --- a/package/libs/mbedtls/patches/200-config.patch +++ b/package/libs/mbedtls/patches/200-config.patch @@ -1,6 +1,6 @@ --- a/include/mbedtls/config.h +++ b/include/mbedtls/config.h -@@ -633,14 +633,14 @@ +@@ -658,14 +658,14 @@ * * Enable Output Feedback mode (OFB) for symmetric ciphers. */ @@ -17,7 +17,7 @@ /** * \def MBEDTLS_CIPHER_NULL_CIPHER -@@ -757,19 +757,19 @@ +@@ -782,19 +782,19 @@ * * Comment macros to disable the curve and functions for it */ @@ -46,7 +46,7 @@ /** * \def MBEDTLS_ECP_NIST_OPTIM -@@ -871,7 +871,7 @@ +@@ -918,7 +918,7 @@ * See dhm.h for more details. * */ @@ -55,7 +55,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED -@@ -891,7 +891,7 @@ +@@ -938,7 +938,7 @@ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA */ @@ -64,7 +64,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED -@@ -916,7 +916,7 @@ +@@ -963,7 +963,7 @@ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA */ @@ -73,7 +73,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED -@@ -1050,7 +1050,7 @@ +@@ -1097,7 +1097,7 @@ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 */ @@ -82,7 +82,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED -@@ -1074,7 +1074,7 @@ +@@ -1121,7 +1121,7 @@ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 */ @@ -91,7 +91,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED -@@ -1178,7 +1178,7 @@ +@@ -1225,7 +1225,7 @@ * This option is only useful if both MBEDTLS_SHA256_C and * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used. */ @@ -100,7 +100,7 @@ /** * \def MBEDTLS_ENTROPY_NV_SEED -@@ -1273,14 +1273,14 @@ +@@ -1320,14 +1320,14 @@ * Uncomment this macro to disable the use of CRT in RSA. * */ @@ -117,7 +117,7 @@ /** * \def MBEDTLS_SHA256_SMALLER -@@ -1434,7 +1434,7 @@ +@@ -1481,7 +1481,7 @@ * configuration of this extension). * */ @@ -126,7 +126,7 @@ /** * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO -@@ -1609,7 +1609,7 @@ +@@ -1656,7 +1656,7 @@ * * Comment this macro to disable support for SSL session tickets */ @@ -135,7 +135,7 @@ /** * \def MBEDTLS_SSL_EXPORT_KEYS -@@ -1639,7 +1639,7 @@ +@@ -1686,7 +1686,7 @@ * * Comment this macro to disable support for truncated HMAC in SSL */ @@ -144,7 +144,7 @@ /** * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT -@@ -1698,7 +1698,7 @@ +@@ -1745,7 +1745,7 @@ * * Comment this to disable run-time checking and save ROM space */ @@ -153,7 +153,7 @@ /** * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 -@@ -2028,7 +2028,7 @@ +@@ -2075,7 +2075,7 @@ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 */ @@ -162,7 +162,7 @@ /** * \def MBEDTLS_ARIA_C -@@ -2094,7 +2094,7 @@ +@@ -2141,7 +2141,7 @@ * This module enables the AES-CCM ciphersuites, if other requisites are * enabled as well. */ @@ -171,7 +171,7 @@ /** * \def MBEDTLS_CERTS_C -@@ -2106,7 +2106,7 @@ +@@ -2153,7 +2153,7 @@ * * This module is used for testing (ssl_client/server). */ @@ -180,7 +180,7 @@ /** * \def MBEDTLS_CHACHA20_C -@@ -2214,7 +2214,7 @@ +@@ -2261,7 +2261,7 @@ * \warning DES is considered a weak cipher and its use constitutes a * security risk. We recommend considering stronger ciphers instead. */ @@ -189,7 +189,7 @@ /** * \def MBEDTLS_DHM_C -@@ -2377,7 +2377,7 @@ +@@ -2424,7 +2424,7 @@ * This module adds support for the Hashed Message Authentication Code * (HMAC)-based key derivation function (HKDF). */ @@ -198,7 +198,7 @@ /** * \def MBEDTLS_HMAC_DRBG_C -@@ -2687,7 +2687,7 @@ +@@ -2734,7 +2734,7 @@ * * This module enables abstraction of common (libc) functions. */ @@ -207,7 +207,7 @@ /** * \def MBEDTLS_POLY1305_C -@@ -2708,7 +2708,7 @@ +@@ -2755,7 +2755,7 @@ * Caller: library/md.c * */ @@ -216,7 +216,7 @@ /** * \def MBEDTLS_RSA_C -@@ -2815,7 +2815,7 @@ +@@ -2862,7 +2862,7 @@ * * Requires: MBEDTLS_CIPHER_C */ @@ -225,7 +225,7 @@ /** * \def MBEDTLS_SSL_CLI_C -@@ -2915,7 +2915,7 @@ +@@ -2962,7 +2962,7 @@ * * This module provides run-time version information. */ @@ -234,7 +234,7 @@ /** * \def MBEDTLS_X509_USE_C -@@ -3025,7 +3025,7 @@ +@@ -3072,7 +3072,7 @@ * Module: library/xtea.c * Caller: */ diff --git a/package/network/config/firewall/Makefile b/package/network/config/firewall/Makefile index 9ad9efd520..7b2c567001 100644 --- a/package/network/config/firewall/Makefile +++ b/package/network/config/firewall/Makefile @@ -15,7 +15,7 @@ PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firewall3.git PKG_SOURCE_DATE:=2020-07-25 PKG_SOURCE_VERSION:=e9b90dfac2225927c035f6a76277b850c282dc9a -PKG_MIRROR_HASH:=9164089058b5c8d62e81806dcd2261b9f78b050fb40cd84cbd127794ad7a940e +PKG_MIRROR_HASH:=917f662d48a766f86ee61a83e13a61688d6eca3647dd4aca1973b1fa1ea64fec PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=ISC diff --git a/package/network/utils/ipset/Makefile b/package/network/utils/ipset/Makefile index 0bab21a12f..2d0c561198 100644 --- a/package/network/utils/ipset/Makefile +++ b/package/network/utils/ipset/Makefile @@ -9,12 +9,12 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=ipset -PKG_VERSION:=7.4 +PKG_VERSION:=7.6 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=http://ipset.netfilter.org -PKG_HASH:=4a974176e57fe4b7e2984abb231c4a18af2291bdc41536ef64e4b8ec4d4a1884 +PKG_HASH:=0e7d44caa9c153d96a9b5f12644fbe35a632537a5a7f653792b72e53d9d5c2db PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=GPL-2.0 diff --git a/scripts/download.pl b/scripts/download.pl index 2901df8c67..3acd696a87 100755 --- a/scripts/download.pl +++ b/scripts/download.pl @@ -273,7 +273,6 @@ foreach my $mirror (@ARGV) { } } -push @mirrors, 'https://sources.cdn.openwrt.org'; #push @mirrors, 'https://mirror1.openwrt.org'; push @mirrors, 'https://sources.openwrt.org'; push @mirrors, 'https://mirror2.openwrt.org/sources'; diff --git a/target/linux/arc770/config-5.4 b/target/linux/arc770/config-5.4 index fcbad961fd..ce712b4c34 100644 --- a/target/linux/arc770/config-5.4 +++ b/target/linux/arc770/config-5.4 @@ -196,4 +196,3 @@ CONFIG_TIMER_PROBE=y CONFIG_TREE_SRCU=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_USB_SUPPORT=y -CONFIG_WATCHDOG_CORE=y diff --git a/target/linux/armvirt/config-5.4 b/target/linux/armvirt/config-5.4 index 0754831fe4..4842825a1e 100644 --- a/target/linux/armvirt/config-5.4 +++ b/target/linux/armvirt/config-5.4 @@ -237,5 +237,4 @@ CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_PCI_LEGACY=y -CONFIG_WATCHDOG_CORE=y CONFIG_XPS=y diff --git a/target/linux/ath79/config-5.4 b/target/linux/ath79/config-5.4 index 6ef32cfefa..0f5352a921 100644 --- a/target/linux/ath79/config-5.4 +++ b/target/linux/ath79/config-5.4 @@ -245,4 +245,3 @@ CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_TINY_SRCU=y CONFIG_USB_SUPPORT=y CONFIG_USE_OF=y -CONFIG_WATCHDOG_CORE=y diff --git a/target/linux/bcm27xx/patches-5.4/950-0018-Register-the-clocks-early-during-the-boot-process-so.patch b/target/linux/bcm27xx/patches-5.4/950-0018-Register-the-clocks-early-during-the-boot-process-so.patch index 40653989b4..322be7bc5c 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0018-Register-the-clocks-early-during-the-boot-process-so.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0018-Register-the-clocks-early-during-the-boot-process-so.patch @@ -13,7 +13,7 @@ Signed-off-by: Martin Sperl --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -2248,8 +2248,15 @@ static int bcm2835_clk_probe(struct plat +@@ -2265,8 +2265,15 @@ static int bcm2835_clk_probe(struct plat if (ret) return ret; @@ -30,7 +30,7 @@ Signed-off-by: Martin Sperl } static const struct cprman_plat_data cprman_bcm2835_plat_data = { -@@ -2275,7 +2282,11 @@ static struct platform_driver bcm2835_cl +@@ -2292,7 +2299,11 @@ static struct platform_driver bcm2835_cl .probe = bcm2835_clk_probe, }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0020-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch b/target/linux/bcm27xx/patches-5.4/950-0020-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch index 8baed2af49..63f116f68f 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0020-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0020-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch @@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1363,6 +1363,11 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1379,6 +1379,11 @@ bcm2835_register_pll_divider(struct bcm2 divider->div.hw.init = &init; divider->div.table = NULL; diff --git a/target/linux/bcm27xx/patches-5.4/950-0021-clk-bcm2835-Add-claim-clocks-property.patch b/target/linux/bcm27xx/patches-5.4/950-0021-clk-bcm2835-Add-claim-clocks-property.patch index 928fe23253..87113e8829 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0021-clk-bcm2835-Add-claim-clocks-property.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0021-clk-bcm2835-Add-claim-clocks-property.patch @@ -17,7 +17,7 @@ Signed-off-by: Phil Elwell --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1295,6 +1295,8 @@ static const struct clk_ops bcm2835_vpu_ +@@ -1311,6 +1311,8 @@ static const struct clk_ops bcm2835_vpu_ .debug_init = bcm2835_clock_debug_init, }; @@ -26,7 +26,7 @@ Signed-off-by: Phil Elwell static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman, const struct bcm2835_pll_data *data) { -@@ -1311,6 +1313,9 @@ static struct clk_hw *bcm2835_register_p +@@ -1327,6 +1329,9 @@ static struct clk_hw *bcm2835_register_p init.ops = &bcm2835_pll_clk_ops; init.flags = CLK_IGNORE_UNUSED; @@ -36,7 +36,7 @@ Signed-off-by: Phil Elwell pll = kzalloc(sizeof(*pll), GFP_KERNEL); if (!pll) return NULL; -@@ -1364,8 +1369,10 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1380,8 +1385,10 @@ bcm2835_register_pll_divider(struct bcm2 divider->div.table = NULL; if (!(cprman_read(cprman, data->cm_reg) & data->hold_mask)) { @@ -49,7 +49,7 @@ Signed-off-by: Phil Elwell } divider->cprman = cprman; -@@ -2173,6 +2180,8 @@ static const struct bcm2835_clk_desc clk +@@ -2189,6 +2196,8 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_PERIICTL), }; @@ -58,7 +58,7 @@ Signed-off-by: Phil Elwell /* * Permanently take a reference on the parent of the SDRAM clock. * -@@ -2192,6 +2201,19 @@ static int bcm2835_mark_sdc_parent_criti +@@ -2208,6 +2217,19 @@ static int bcm2835_mark_sdc_parent_criti return clk_prepare_enable(parent); } @@ -78,7 +78,7 @@ Signed-off-by: Phil Elwell static int bcm2835_clk_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; -@@ -2202,6 +2224,7 @@ static int bcm2835_clk_probe(struct plat +@@ -2218,6 +2240,7 @@ static int bcm2835_clk_probe(struct plat const size_t asize = ARRAY_SIZE(clk_desc_array); const struct cprman_plat_data *pdata; size_t i; @@ -86,7 +86,7 @@ Signed-off-by: Phil Elwell int ret; pdata = of_device_get_match_data(&pdev->dev); -@@ -2221,6 +2244,13 @@ static int bcm2835_clk_probe(struct plat +@@ -2237,6 +2260,13 @@ static int bcm2835_clk_probe(struct plat if (IS_ERR(cprman->regs)) return PTR_ERR(cprman->regs); diff --git a/target/linux/bcm27xx/patches-5.4/950-0022-clk-bcm2835-Read-max-core-clock-from-firmware.patch b/target/linux/bcm27xx/patches-5.4/950-0022-clk-bcm2835-Read-max-core-clock-from-firmware.patch index b6d0b8173d..094eed705b 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0022-clk-bcm2835-Read-max-core-clock-from-firmware.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0022-clk-bcm2835-Read-max-core-clock-from-firmware.patch @@ -48,9 +48,9 @@ Signed-off-by: Phil Elwell void __iomem *regs; + struct rpi_firmware *fw; spinlock_t regs_lock; /* spinlock for all clocks */ + unsigned int soc; - /* -@@ -999,6 +1003,30 @@ static unsigned long bcm2835_clock_get_r +@@ -1015,6 +1019,30 @@ static unsigned long bcm2835_clock_get_r return bcm2835_clock_rate_from_divisor(clock, parent_rate, div); } @@ -81,7 +81,7 @@ Signed-off-by: Phil Elwell static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock) { struct bcm2835_cprman *cprman = clock->cprman; -@@ -1287,7 +1315,7 @@ static int bcm2835_vpu_clock_is_on(struc +@@ -1303,7 +1331,7 @@ static int bcm2835_vpu_clock_is_on(struc */ static const struct clk_ops bcm2835_vpu_clock_clk_ops = { .is_prepared = bcm2835_vpu_clock_is_on, @@ -90,7 +90,7 @@ Signed-off-by: Phil Elwell .set_rate = bcm2835_clock_set_rate, .determine_rate = bcm2835_clock_determine_rate, .set_parent = bcm2835_clock_set_parent, -@@ -2223,6 +2251,7 @@ static int bcm2835_clk_probe(struct plat +@@ -2239,6 +2267,7 @@ static int bcm2835_clk_probe(struct plat const struct bcm2835_clk_desc *desc; const size_t asize = ARRAY_SIZE(clk_desc_array); const struct cprman_plat_data *pdata; @@ -98,7 +98,7 @@ Signed-off-by: Phil Elwell size_t i; u32 clk_id; int ret; -@@ -2244,6 +2273,14 @@ static int bcm2835_clk_probe(struct plat +@@ -2260,6 +2289,14 @@ static int bcm2835_clk_probe(struct plat if (IS_ERR(cprman->regs)) return PTR_ERR(cprman->regs); diff --git a/target/linux/bcm27xx/patches-5.4/950-0023-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch b/target/linux/bcm27xx/patches-5.4/950-0023-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch index b01c267035..bee256b030 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0023-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0023-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch @@ -20,7 +20,7 @@ Signed-off-by: Eric Anholt --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1455,6 +1455,15 @@ static struct clk_hw *bcm2835_register_c +@@ -1471,6 +1471,15 @@ static struct clk_hw *bcm2835_register_c init.flags = data->flags | CLK_IGNORE_UNUSED; /* diff --git a/target/linux/bcm27xx/patches-5.4/950-0179-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch b/target/linux/bcm27xx/patches-5.4/950-0179-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch index c5285056fe..717822f5cd 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0179-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0179-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch @@ -13,7 +13,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -2335,7 +2335,7 @@ static int bcm2835_clk_probe(struct plat +@@ -2352,7 +2352,7 @@ static int bcm2835_clk_probe(struct plat return ret; /* note that we have registered all the clocks */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0216-clk-bcm2835-Don-t-wait-for-pllh-lock.patch b/target/linux/bcm27xx/patches-5.4/950-0216-clk-bcm2835-Don-t-wait-for-pllh-lock.patch index d60b6f3d85..77625e8e23 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0216-clk-bcm2835-Don-t-wait-for-pllh-lock.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0216-clk-bcm2835-Don-t-wait-for-pllh-lock.patch @@ -10,7 +10,7 @@ Signed-off-by: Phil Elwell --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -628,15 +628,17 @@ static int bcm2835_pll_on(struct clk_hw +@@ -643,15 +643,17 @@ static int bcm2835_pll_on(struct clk_hw spin_unlock(&cprman->regs_lock); /* Wait for the PLL to lock. */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0219-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch b/target/linux/bcm27xx/patches-5.4/950-0219-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch index 056dc69ae7..26b17393d9 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0219-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0219-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch @@ -14,7 +14,7 @@ Signed-off-by: Eric Anholt --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1098,15 +1098,19 @@ static int bcm2835_clock_set_rate(struct +@@ -1114,15 +1114,19 @@ static int bcm2835_clock_set_rate(struct spin_lock(&cprman->regs_lock); @@ -42,7 +42,7 @@ Signed-off-by: Eric Anholt ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0; cprman_write(cprman, data->ctl_reg, ctl); -@@ -1476,7 +1480,7 @@ static struct clk_hw *bcm2835_register_c +@@ -1492,7 +1496,7 @@ static struct clk_hw *bcm2835_register_c init.ops = &bcm2835_vpu_clock_clk_ops; } else { init.ops = &bcm2835_clock_clk_ops; diff --git a/target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch b/target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch index 59d030c1eb..22ecf91d63 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch @@ -15,7 +15,7 @@ Signed-off-by: Eric Anholt --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1087,8 +1087,10 @@ static int bcm2835_clock_on(struct clk_h +@@ -1103,8 +1103,10 @@ static int bcm2835_clock_on(struct clk_h return 0; } @@ -28,7 +28,7 @@ Signed-off-by: Eric Anholt { struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); struct bcm2835_cprman *cprman = clock->cprman; -@@ -1110,6 +1112,11 @@ static int bcm2835_clock_set_rate(struct +@@ -1126,6 +1128,11 @@ static int bcm2835_clock_set_rate(struct bcm2835_clock_wait_busy(clock); } @@ -40,7 +40,7 @@ Signed-off-by: Eric Anholt ctl &= ~CM_FRAC; ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0; cprman_write(cprman, data->ctl_reg, ctl); -@@ -1121,6 +1128,12 @@ static int bcm2835_clock_set_rate(struct +@@ -1137,6 +1144,12 @@ static int bcm2835_clock_set_rate(struct return 0; } @@ -53,7 +53,7 @@ Signed-off-by: Eric Anholt static bool bcm2835_clk_is_pllc(struct clk_hw *hw) { -@@ -1304,6 +1317,7 @@ static const struct clk_ops bcm2835_cloc +@@ -1320,6 +1333,7 @@ static const struct clk_ops bcm2835_cloc .unprepare = bcm2835_clock_off, .recalc_rate = bcm2835_clock_get_rate, .set_rate = bcm2835_clock_set_rate, @@ -61,7 +61,7 @@ Signed-off-by: Eric Anholt .determine_rate = bcm2835_clock_determine_rate, .set_parent = bcm2835_clock_set_parent, .get_parent = bcm2835_clock_get_parent, -@@ -1480,7 +1494,6 @@ static struct clk_hw *bcm2835_register_c +@@ -1496,7 +1510,6 @@ static struct clk_hw *bcm2835_register_c init.ops = &bcm2835_vpu_clock_clk_ops; } else { init.ops = &bcm2835_clock_clk_ops; diff --git a/target/linux/bcm27xx/patches-5.4/950-0270-clk-bcm2835-Avoid-null-pointer-exception.patch b/target/linux/bcm27xx/patches-5.4/950-0270-clk-bcm2835-Avoid-null-pointer-exception.patch index d669d4066b..1542f781f0 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0270-clk-bcm2835-Avoid-null-pointer-exception.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0270-clk-bcm2835-Avoid-null-pointer-exception.patch @@ -12,7 +12,7 @@ Signed-off-by: popcornmix --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -2262,9 +2262,11 @@ static bool bcm2835_clk_is_claimed(const +@@ -2278,9 +2278,11 @@ static bool bcm2835_clk_is_claimed(const int i; for (i = 0; i < ARRAY_SIZE(clk_desc_array); i++) { diff --git a/target/linux/bcm27xx/patches-5.4/950-0351-clk-bcm2835-Disable-v3d-clock.patch b/target/linux/bcm27xx/patches-5.4/950-0351-clk-bcm2835-Disable-v3d-clock.patch index 160b39b9cd..7e55e7d8a6 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0351-clk-bcm2835-Disable-v3d-clock.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0351-clk-bcm2835-Disable-v3d-clock.patch @@ -12,7 +12,7 @@ Signed-off-by: popcornmix --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1716,16 +1716,12 @@ static const struct bcm2835_clk_desc clk +@@ -1732,16 +1732,12 @@ static const struct bcm2835_clk_desc clk .hold_mask = CM_PLLA_HOLDCORE, .fixed_divider = 1, .flags = CLK_SET_RATE_PARENT), @@ -35,7 +35,7 @@ Signed-off-by: popcornmix [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( SOC_ALL, .name = "plla_dsi0", -@@ -2003,14 +1999,12 @@ static const struct bcm2835_clk_desc clk +@@ -2019,14 +2015,12 @@ static const struct bcm2835_clk_desc clk .int_bits = 6, .frac_bits = 0, .tcnt_mux = 3), diff --git a/target/linux/bcm27xx/patches-5.4/950-0394-Initialise-rpi-firmware-before-clk-bcm2835.patch b/target/linux/bcm27xx/patches-5.4/950-0394-Initialise-rpi-firmware-before-clk-bcm2835.patch index 0e0173085d..f993fb4e1a 100644 --- a/target/linux/bcm27xx/patches-5.4/950-0394-Initialise-rpi-firmware-before-clk-bcm2835.patch +++ b/target/linux/bcm27xx/patches-5.4/950-0394-Initialise-rpi-firmware-before-clk-bcm2835.patch @@ -25,7 +25,7 @@ Co-authored-by: Phil Elwell --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -2382,7 +2382,7 @@ static int __init __bcm2835_clk_driver_i +@@ -2399,7 +2399,7 @@ static int __init __bcm2835_clk_driver_i { return platform_driver_register(&bcm2835_clk_driver); } diff --git a/target/linux/bcm63xx/config-5.4 b/target/linux/bcm63xx/config-5.4 index 6c2cbb4cc3..dd4d67224c 100644 --- a/target/linux/bcm63xx/config-5.4 +++ b/target/linux/bcm63xx/config-5.4 @@ -277,6 +277,5 @@ CONFIG_TINY_SRCU=y CONFIG_USB_SUPPORT=y CONFIG_USE_OF=y CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y CONFIG_WATCHDOG_NOWAYOUT=y CONFIG_WEAK_ORDERING=y diff --git a/target/linux/generic/backport-5.4/041-genirq-affinity-Make-affinity-setting-if-activated-o.patch b/target/linux/generic/backport-5.4/041-genirq-affinity-Make-affinity-setting-if-activated-o.patch deleted file mode 100644 index cf4f6e1e21..0000000000 --- a/target/linux/generic/backport-5.4/041-genirq-affinity-Make-affinity-setting-if-activated-o.patch +++ /dev/null @@ -1,129 +0,0 @@ -From: Thomas Gleixner -Date: Fri, 24 Jul 2020 22:44:41 +0200 -Subject: [PATCH] genirq/affinity: Make affinity setting if activated opt-in - -commit f0c7baca180046824e07fc5f1326e83a8fd150c7 upstream. - -John reported that on a RK3288 system the perf per CPU interrupts are all -affine to CPU0 and provided the analysis: - - "It looks like what happens is that because the interrupts are not per-CPU - in the hardware, armpmu_request_irq() calls irq_force_affinity() while - the interrupt is deactivated and then request_irq() with IRQF_PERCPU | - IRQF_NOBALANCING. - - Now when irq_startup() runs with IRQ_STARTUP_NORMAL, it calls - irq_setup_affinity() which returns early because IRQF_PERCPU and - IRQF_NOBALANCING are set, leaving the interrupt on its original CPU." - -This was broken by the recent commit which blocked interrupt affinity -setting in hardware before activation of the interrupt. While this works in -general, it does not work for this particular case. As contrary to the -initial analysis not all interrupt chip drivers implement an activate -callback, the safe cure is to make the deferred interrupt affinity setting -at activation time opt-in. - -Implement the necessary core logic and make the two irqchip implementations -for which this is required opt-in. In hindsight this would have been the -right thing to do, but ... - -Fixes: baedb87d1b53 ("genirq/affinity: Handle affinity setting on inactive interrupts correctly") -Reported-by: John Keeping -Signed-off-by: Thomas Gleixner -Tested-by: Marc Zyngier -Acked-by: Marc Zyngier -Cc: stable@vger.kernel.org -Link: https://lkml.kernel.org/r/87blk4tzgm.fsf@nanos.tec.linutronix.de -Signed-off-by: Greg Kroah-Hartman ---- - ---- a/arch/x86/kernel/apic/vector.c -+++ b/arch/x86/kernel/apic/vector.c -@@ -554,6 +554,10 @@ static int x86_vector_alloc_irqs(struct - irqd->chip_data = apicd; - irqd->hwirq = virq + i; - irqd_set_single_target(irqd); -+ -+ /* Don't invoke affinity setter on deactivated interrupts */ -+ irqd_set_affinity_on_activate(irqd); -+ - /* - * Legacy vectors are already assigned when the IOAPIC - * takes them over. They stay on the same vector. This is ---- a/drivers/irqchip/irq-gic-v3-its.c -+++ b/drivers/irqchip/irq-gic-v3-its.c -@@ -2581,6 +2581,7 @@ static int its_irq_domain_alloc(struct i - msi_alloc_info_t *info = args; - struct its_device *its_dev = info->scratchpad[0].ptr; - struct its_node *its = its_dev->its; -+ struct irq_data *irqd; - irq_hw_number_t hwirq; - int err; - int i; -@@ -2600,7 +2601,9 @@ static int its_irq_domain_alloc(struct i - - irq_domain_set_hwirq_and_chip(domain, virq + i, - hwirq + i, &its_irq_chip, its_dev); -- irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); -+ irqd = irq_get_irq_data(virq + i); -+ irqd_set_single_target(irqd); -+ irqd_set_affinity_on_activate(irqd); - pr_debug("ID:%d pID:%d vID:%d\n", - (int)(hwirq + i - its_dev->event_map.lpi_base), - (int)(hwirq + i), virq + i); ---- a/include/linux/irq.h -+++ b/include/linux/irq.h -@@ -211,6 +211,8 @@ struct irq_data { - * IRQD_CAN_RESERVE - Can use reservation mode - * IRQD_MSI_NOMASK_QUIRK - Non-maskable MSI quirk for affinity change - * required -+ * IRQD_AFFINITY_ON_ACTIVATE - Affinity is set on activation. Don't call -+ * irq_chip::irq_set_affinity() when deactivated. - */ - enum { - IRQD_TRIGGER_MASK = 0xf, -@@ -234,6 +236,7 @@ enum { - IRQD_DEFAULT_TRIGGER_SET = (1 << 25), - IRQD_CAN_RESERVE = (1 << 26), - IRQD_MSI_NOMASK_QUIRK = (1 << 27), -+ IRQD_AFFINITY_ON_ACTIVATE = (1 << 29), - }; - - #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors) -@@ -408,6 +411,16 @@ static inline bool irqd_msi_nomask_quirk - return __irqd_to_state(d) & IRQD_MSI_NOMASK_QUIRK; - } - -+static inline void irqd_set_affinity_on_activate(struct irq_data *d) -+{ -+ __irqd_to_state(d) |= IRQD_AFFINITY_ON_ACTIVATE; -+} -+ -+static inline bool irqd_affinity_on_activate(struct irq_data *d) -+{ -+ return __irqd_to_state(d) & IRQD_AFFINITY_ON_ACTIVATE; -+} -+ - #undef __irqd_to_state - - static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d) ---- a/kernel/irq/manage.c -+++ b/kernel/irq/manage.c -@@ -281,12 +281,16 @@ static bool irq_set_affinity_deactivated - struct irq_desc *desc = irq_data_to_desc(data); - - /* -+ * Handle irq chips which can handle affinity only in activated -+ * state correctly -+ * - * If the interrupt is not yet activated, just store the affinity - * mask and do not call the chip driver at all. On activation the - * driver has to make sure anyway that the interrupt is in a - * useable state so startup works. - */ -- if (!IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) || irqd_is_activated(data)) -+ if (!IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) || -+ irqd_is_activated(data) || !irqd_affinity_on_activate(data)) - return false; - - cpumask_copy(desc->irq_common_data.affinity, mask); diff --git a/target/linux/generic/backport-5.4/756-v5.8-net-dsa-rtl8366-Pass-GENMASK-signed-bits.patch b/target/linux/generic/backport-5.4/756-v5.8-net-dsa-rtl8366-Pass-GENMASK-signed-bits.patch new file mode 100644 index 0000000000..4c5d559e16 --- /dev/null +++ b/target/linux/generic/backport-5.4/756-v5.8-net-dsa-rtl8366-Pass-GENMASK-signed-bits.patch @@ -0,0 +1,27 @@ +From 733993f502f254912b1415e13f73651d9f2e74ef Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Sun, 5 Jul 2020 22:42:27 +0200 +Subject: [PATCH 1/5] net: dsa: rtl8366: Pass GENMASK() signed bits + +Oddly, GENMASK() requires signed bit numbers, so that it can compare +them for < 0. If passed an unsigned type, we get warnings about the +test never being true. + +Signed-off-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/rtl8366.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/rtl8366.c ++++ b/drivers/net/dsa/rtl8366.c +@@ -285,7 +285,7 @@ int rtl8366_init_vlan(struct realtek_smi + /* For the CPU port, make all ports members of this + * VLAN. + */ +- mask = GENMASK(smi->num_ports - 1, 0); ++ mask = GENMASK((int)smi->num_ports - 1, 0); + else + /* For all other ports, enable itself plus the + * CPU port. diff --git a/target/linux/generic/backport-5.4/757-v5.8-net-dsa-tag_rtl4_a-Implement-Realtek-4-byte-A-tag.patch b/target/linux/generic/backport-5.4/757-v5.8-net-dsa-tag_rtl4_a-Implement-Realtek-4-byte-A-tag.patch new file mode 100644 index 0000000000..70d7000ba1 --- /dev/null +++ b/target/linux/generic/backport-5.4/757-v5.8-net-dsa-tag_rtl4_a-Implement-Realtek-4-byte-A-tag.patch @@ -0,0 +1,232 @@ +From 078ced30af696b52a450a016a16eb47499d68117 Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Wed, 8 Jul 2020 14:25:36 +0200 +Subject: [PATCH 2/5] net: dsa: tag_rtl4_a: Implement Realtek 4 byte A tag + +This implements the known parts of the Realtek 4 byte +tag protocol version 0xA, as found in the RTL8366RB +DSA switch. + +It is designated as protocol version 0xA as a +different Realtek 4 byte tag format with protocol +version 0x9 is known to exist in the Realtek RTL8306 +chips. + +The tag and switch chip lacks public documentation, so +the tag format has been reverse-engineered from +packet dumps. As only ingress traffic has been available +for analysis an egress tag has not been possible to +develop (even using educated guesses about bit fields) +so this is as far as it gets. It is not known if the +switch even supports egress tagging. + +Excessive attempts to figure out the egress tag format +was made. When nothing else worked, I just tried all bit +combinations with 0xannp where a is protocol and p is +port. I looped through all values several times trying +to get a response from ping, without any positive +result. + +Using just these ingress tags however, the switch +functionality is vastly improved and the packets find +their way into the destination port without any +tricky VLAN configuration. On the D-Link DIR-685 the +LAN ports now come up and respond to ping without +any command line configuration so this is a real +improvement for users. + +Egress packets need to be restricted to the proper +target ports using VLAN, which the RTL8366RB DSA +switch driver already sets up. + +Cc: DENG Qingfang +Cc: Mauri Sandberg +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Signed-off-by: Linus Walleij +Signed-off-by: David S. Miller +--- + include/net/dsa.h | 2 + + net/dsa/Kconfig | 7 +++ + net/dsa/Makefile | 1 + + net/dsa/tag_rtl4_a.c | 130 +++++++++++++++++++++++++++++++++++++++++++ + 4 files changed, 140 insertions(+) + create mode 100644 net/dsa/tag_rtl4_a.c + +--- a/include/net/dsa.h ++++ b/include/net/dsa.h +@@ -42,6 +42,7 @@ struct phylink_link_state; + #define DSA_TAG_PROTO_8021Q_VALUE 12 + #define DSA_TAG_PROTO_SJA1105_VALUE 13 + #define DSA_TAG_PROTO_KSZ8795_VALUE 14 ++#define DSA_TAG_PROTO_RTL4_A_VALUE 17 + + enum dsa_tag_protocol { + DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE, +@@ -59,6 +60,7 @@ enum dsa_tag_protocol { + DSA_TAG_PROTO_8021Q = DSA_TAG_PROTO_8021Q_VALUE, + DSA_TAG_PROTO_SJA1105 = DSA_TAG_PROTO_SJA1105_VALUE, + DSA_TAG_PROTO_KSZ8795 = DSA_TAG_PROTO_KSZ8795_VALUE, ++ DSA_TAG_PROTO_RTL4_A = DSA_TAG_PROTO_RTL4_A_VALUE, + }; + + struct packet_type; +--- a/net/dsa/Kconfig ++++ b/net/dsa/Kconfig +@@ -80,6 +80,13 @@ config NET_DSA_TAG_KSZ + Say Y if you want to enable support for tagging frames for the + Microchip 8795/9477/9893 families of switches. + ++config NET_DSA_TAG_RTL4_A ++ tristate "Tag driver for Realtek 4 byte protocol A tags" ++ help ++ Say Y or M if you want to enable support for tagging frames for the ++ Realtek switches with 4 byte protocol A tags, sich as found in ++ the Realtek RTL8366RB. ++ + config NET_DSA_TAG_QCA + tristate "Tag driver for Qualcomm Atheros QCA8K switches" + help +--- a/net/dsa/Makefile ++++ b/net/dsa/Makefile +@@ -10,6 +10,7 @@ obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa + obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o + obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o + obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o ++obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o + obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o + obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o + obj-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o +--- /dev/null ++++ b/net/dsa/tag_rtl4_a.c +@@ -0,0 +1,130 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Handler for Realtek 4 byte DSA switch tags ++ * Currently only supports protocol "A" found in RTL8366RB ++ * Copyright (c) 2020 Linus Walleij ++ * ++ * This "proprietary tag" header looks like so: ++ * ++ * ------------------------------------------------- ++ * | MAC DA | MAC SA | 0x8899 | 2 bytes tag | Type | ++ * ------------------------------------------------- ++ * ++ * The 2 bytes tag form a 16 bit big endian word. The exact ++ * meaning has been guessed from packet dumps from ingress ++ * frames, as no working egress traffic has been available ++ * we do not know the format of the egress tags or if they ++ * are even supported. ++ */ ++ ++#include ++#include ++ ++#include "dsa_priv.h" ++ ++#define RTL4_A_HDR_LEN 4 ++#define RTL4_A_ETHERTYPE 0x8899 ++#define RTL4_A_PROTOCOL_SHIFT 12 ++/* ++ * 0x1 = Realtek Remote Control protocol (RRCP) ++ * 0x2/0x3 seems to be used for loopback testing ++ * 0x9 = RTL8306 DSA protocol ++ * 0xa = RTL8366RB DSA protocol ++ */ ++#define RTL4_A_PROTOCOL_RTL8366RB 0xa ++ ++static struct sk_buff *rtl4a_tag_xmit(struct sk_buff *skb, ++ struct net_device *dev) ++{ ++ /* ++ * Just let it pass thru, we don't know if it is possible ++ * to tag a frame with the 0x8899 ethertype and direct it ++ * to a specific port, all attempts at reverse-engineering have ++ * ended up with the frames getting dropped. ++ * ++ * The VLAN set-up needs to restrict the frames to the right port. ++ * ++ * If you have documentation on the tagging format for RTL8366RB ++ * (tag type A) then please contribute. ++ */ ++ return skb; ++} ++ ++static struct sk_buff *rtl4a_tag_rcv(struct sk_buff *skb, ++ struct net_device *dev, ++ struct packet_type *pt) ++{ ++ u16 protport; ++ __be16 *p; ++ u16 etype; ++ u8 *tag; ++ u8 prot; ++ u8 port; ++ ++ if (unlikely(!pskb_may_pull(skb, RTL4_A_HDR_LEN))) ++ return NULL; ++ ++ /* The RTL4 header has its own custom Ethertype 0x8899 and that ++ * starts right at the beginning of the packet, after the src ++ * ethernet addr. Apparantly skb->data always points 2 bytes in, ++ * behind the Ethertype. ++ */ ++ tag = skb->data - 2; ++ p = (__be16 *)tag; ++ etype = ntohs(*p); ++ if (etype != RTL4_A_ETHERTYPE) { ++ /* Not custom, just pass through */ ++ netdev_dbg(dev, "non-realtek ethertype 0x%04x\n", etype); ++ return skb; ++ } ++ p = (__be16 *)(tag + 2); ++ protport = ntohs(*p); ++ /* The 4 upper bits are the protocol */ ++ prot = (protport >> RTL4_A_PROTOCOL_SHIFT) & 0x0f; ++ if (prot != RTL4_A_PROTOCOL_RTL8366RB) { ++ netdev_err(dev, "unknown realtek protocol 0x%01x\n", prot); ++ return NULL; ++ } ++ port = protport & 0xff; ++ ++ skb->dev = dsa_master_find_slave(dev, 0, port); ++ if (!skb->dev) { ++ netdev_dbg(dev, "could not find slave for port %d\n", port); ++ return NULL; ++ } ++ ++ /* Remove RTL4 tag and recalculate checksum */ ++ skb_pull_rcsum(skb, RTL4_A_HDR_LEN); ++ ++ /* Move ethernet DA and SA in front of the data */ ++ memmove(skb->data - ETH_HLEN, ++ skb->data - ETH_HLEN - RTL4_A_HDR_LEN, ++ 2 * ETH_ALEN); ++ ++ skb->offload_fwd_mark = 1; ++ ++ return skb; ++} ++ ++static int rtl4a_tag_flow_dissect(const struct sk_buff *skb, __be16 *proto, ++ int *offset) ++{ ++ *offset = RTL4_A_HDR_LEN; ++ /* Skip past the tag and fetch the encapsulated Ethertype */ ++ *proto = ((__be16 *)skb->data)[1]; ++ ++ return 0; ++} ++ ++static const struct dsa_device_ops rtl4a_netdev_ops = { ++ .name = "rtl4a", ++ .proto = DSA_TAG_PROTO_RTL4_A, ++ .xmit = rtl4a_tag_xmit, ++ .rcv = rtl4a_tag_rcv, ++ .flow_dissect = rtl4a_tag_flow_dissect, ++ .overhead = RTL4_A_HDR_LEN, ++}; ++module_dsa_tag_driver(rtl4a_netdev_ops); ++ ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_RTL4_A); diff --git a/target/linux/generic/backport-5.4/758-v5.8-net-dsa-rtl8366rb-Support-the-CPU-DSA-tag.patch b/target/linux/generic/backport-5.4/758-v5.8-net-dsa-rtl8366rb-Support-the-CPU-DSA-tag.patch new file mode 100644 index 0000000000..b68c033bbe --- /dev/null +++ b/target/linux/generic/backport-5.4/758-v5.8-net-dsa-rtl8366rb-Support-the-CPU-DSA-tag.patch @@ -0,0 +1,100 @@ +From c633ba43b7a9c2bfdb992ffd198d4c661520466f Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Wed, 8 Jul 2020 14:25:37 +0200 +Subject: [PATCH 3/5] net: dsa: rtl8366rb: Support the CPU DSA tag + +This activates the support to use the CPU tag to properly +direct ingress traffic to the right port. + +Bit 15 in register RTL8368RB_CPU_CTRL_REG can be set to +1 to disable the insertion of the CPU tag which is what +the code currently does. The bit 15 define calls this +setting RTL8368RB_CPU_INSTAG which is confusing since the +inverse meaning is implied: programmers may think that +setting this bit to 1 will *enable* inserting the tag +rather than disabling it, so rename this setting in +bit 15 to RTL8368RB_CPU_NO_TAG which is more to the +point. + +After this e.g. ping works out-of-the-box with the +RTL8366RB. + +Cc: DENG Qingfang +Cc: Mauri Sandberg +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Signed-off-by: Linus Walleij +Signed-off-by: David S. Miller +--- + drivers/net/dsa/Kconfig | 1 + + drivers/net/dsa/rtl8366rb.c | 31 ++++++++----------------------- + 2 files changed, 9 insertions(+), 23 deletions(-) + +--- a/drivers/net/dsa/Kconfig ++++ b/drivers/net/dsa/Kconfig +@@ -66,6 +66,7 @@ config NET_DSA_QCA8K + config NET_DSA_REALTEK_SMI + tristate "Realtek SMI Ethernet switch family support" + depends on NET_DSA ++ select NET_DSA_TAG_RTL4_A + select FIXED_PHY + select IRQ_DOMAIN + select REALTEK_PHY +--- a/drivers/net/dsa/rtl8366rb.c ++++ b/drivers/net/dsa/rtl8366rb.c +@@ -109,8 +109,8 @@ + /* CPU port control reg */ + #define RTL8368RB_CPU_CTRL_REG 0x0061 + #define RTL8368RB_CPU_PORTS_MSK 0x00FF +-/* Enables inserting custom tag length/type 0x8899 */ +-#define RTL8368RB_CPU_INSTAG BIT(15) ++/* Disables inserting custom tag length/type 0x8899 */ ++#define RTL8368RB_CPU_NO_TAG BIT(15) + + #define RTL8366RB_SMAR0 0x0070 /* bits 0..15 */ + #define RTL8366RB_SMAR1 0x0071 /* bits 16..31 */ +@@ -844,16 +844,14 @@ static int rtl8366rb_setup(struct dsa_sw + if (ret) + return ret; + +- /* Enable CPU port and enable inserting CPU tag ++ /* Enable CPU port with custom DSA tag 8899. + * +- * Disabling RTL8368RB_CPU_INSTAG here will change the behaviour +- * of the switch totally and it will start talking Realtek RRCP +- * internally. It is probably possible to experiment with this, +- * but then the kernel needs to understand and handle RRCP first. ++ * If you set RTL8368RB_CPU_NO_TAG (bit 15) in this registers ++ * the custom tag is turned off. + */ + ret = regmap_update_bits(smi->map, RTL8368RB_CPU_CTRL_REG, + 0xFFFF, +- RTL8368RB_CPU_INSTAG | BIT(smi->cpu_port)); ++ BIT(smi->cpu_port)); + if (ret) + return ret; + +@@ -966,21 +964,8 @@ static int rtl8366rb_setup(struct dsa_sw + static enum dsa_tag_protocol rtl8366_get_tag_protocol(struct dsa_switch *ds, + int port) + { +- /* For now, the RTL switches are handled without any custom tags. +- * +- * It is possible to turn on "custom tags" by removing the +- * RTL8368RB_CPU_INSTAG flag when enabling the port but what it +- * does is unfamiliar to DSA: ethernet frames of type 8899, the Realtek +- * Remote Control Protocol (RRCP) start to appear on the CPU port of +- * the device. So this is not the ordinary few extra bytes in the +- * frame. Instead it appears that the switch starts to talk Realtek +- * RRCP internally which means a pretty complex RRCP implementation +- * decoding and responding the RRCP protocol is needed to exploit this. +- * +- * The OpenRRCP project (dormant since 2009) have reverse-egineered +- * parts of the protocol. +- */ +- return DSA_TAG_PROTO_NONE; ++ /* This switch uses the 4 byte protocol A Realtek DSA tag */ ++ return DSA_TAG_PROTO_RTL4_A; + } + + static void rtl8366rb_adjust_link(struct dsa_switch *ds, int port, diff --git a/target/linux/generic/hack-5.4/204-module_strip.patch b/target/linux/generic/hack-5.4/204-module_strip.patch index a36b6d959f..458736b498 100644 --- a/target/linux/generic/hack-5.4/204-module_strip.patch +++ b/target/linux/generic/hack-5.4/204-module_strip.patch @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau config MODULES_TREE_LOOKUP --- a/kernel/module.c +++ b/kernel/module.c -@@ -3110,9 +3110,11 @@ static int setup_load_info(struct load_i +@@ -3126,9 +3126,11 @@ static int setup_load_info(struct load_i static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau if (flags & MODULE_INIT_IGNORE_VERMAGIC) modmagic = NULL; -@@ -3133,6 +3135,7 @@ static int check_modinfo(struct module * +@@ -3149,6 +3151,7 @@ static int check_modinfo(struct module * mod->name); add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK); } diff --git a/target/linux/generic/hack-5.4/902-debloat_proc.patch b/target/linux/generic/hack-5.4/902-debloat_proc.patch index 7eb6224d4e..8813b38da7 100644 --- a/target/linux/generic/hack-5.4/902-debloat_proc.patch +++ b/target/linux/generic/hack-5.4/902-debloat_proc.patch @@ -330,7 +330,7 @@ Signed-off-by: Felix Fietkau --- a/net/core/sock.c +++ b/net/core/sock.c -@@ -3613,6 +3613,8 @@ static __net_initdata struct pernet_oper +@@ -3634,6 +3634,8 @@ static __net_initdata struct pernet_oper static int __init proto_init(void) { diff --git a/target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch b/target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch index 0fd837d45e..2544645809 100644 --- a/target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch +++ b/target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch @@ -226,7 +226,8 @@ Signed-off-by: Felix Fietkau have = netpoll_poll_lock(n); - weight = n->weight; -- ++ work = __napi_poll(n, &do_repoll); + - /* This NAPI_STATE_SCHED test is for avoiding a race - * with netpoll's poll_napi(). Only the entity which - * obtains the lock and sees NAPI_STATE_SCHED set will @@ -243,8 +244,7 @@ Signed-off-by: Felix Fietkau - - if (likely(work < weight)) - goto out_unlock; -+ work = __napi_poll(n, &do_repoll); - +- - /* Drivers must not modify the NAPI state if they - * consume the entire weight. In such cases this code - * still "owns" the NAPI instance and therefore can diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index a28927cde7..b2fdc427e2 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -48,7 +48,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &nand_controller { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts index f86f61f5ca..6ba3d70808 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts @@ -56,7 +56,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &pcie2 { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts index 1f2cd247b6..2d5685558e 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts @@ -355,7 +355,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &mdio0 { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts index dc25a42403..3183ac3f9c 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts @@ -176,7 +176,7 @@ reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; - force_gen1 = <1>; + max-link-speed = <1>; }; &nand_controller { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi index c0c8372eec..3e6732e9df 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi @@ -23,7 +23,7 @@ &pcie0 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &pcie1 { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts index 868d1e9a9a..082ae50949 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts @@ -157,7 +157,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &nand_controller { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts index 8cb6376ee7..dc912a990c 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts @@ -187,7 +187,7 @@ reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; - force_gen1 = <1>; + max-link-speed = <1>; }; &nand_controller { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi index 350965200b..b9ee86a891 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi @@ -41,15 +41,15 @@ }; &pcie0 { - phy-tx0-term-offset = <0>; + compatible = "qcom,pcie-ipq8064-v2"; }; &pcie1 { - phy-tx0-term-offset = <0>; + compatible = "qcom,pcie-ipq8064-v2"; }; &pcie2 { - phy-tx0-term-offset = <0>; + compatible = "qcom,pcie-ipq8064-v2"; }; &sata { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts index 8cc69bca88..2f46b220a8 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts @@ -278,7 +278,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &mdio0 { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts index 322968dfdb..8120eee142 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts @@ -310,7 +310,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &qcom_pinmux { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts index 812757131a..476c6bab40 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts @@ -381,7 +381,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; }; &qcom_pinmux { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts index dab5c4ccd5..781394f75a 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts @@ -214,7 +214,7 @@ reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; - force_gen1 = <1>; + max-link-speed = <1>; }; &mdio0 { diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts index 7b272b74ca..89c1a5653c 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts @@ -430,7 +430,7 @@ &pcie1 { status = "okay"; - force_gen1 = <1>; + max-link-speed = <1>; bridge@0,0 { reg = <0x00000000 0 0 0 0>; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi index b706bfa3a7..ab67d504e6 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi @@ -46,15 +46,15 @@ }; &pcie0 { - phy-tx0-term-offset = <0>; + compatible = "qcom,pcie-ipq8064-v2"; }; &pcie1 { - phy-tx0-term-offset = <0>; + compatible = "qcom,pcie-ipq8064-v2"; }; &pcie2 { - phy-tx0-term-offset = <0>; + compatible = "qcom,pcie-ipq8064-v2"; }; &sata { diff --git a/target/linux/ipq806x/patches-5.4/0071-2-PCI-qcom-Fixed-IPQ806x-PCIE-reset-changes.patch b/target/linux/ipq806x/patches-5.4/0071-2-PCI-qcom-Fixed-IPQ806x-PCIE-reset-changes.patch deleted file mode 100644 index 5bd865a42e..0000000000 --- a/target/linux/ipq806x/patches-5.4/0071-2-PCI-qcom-Fixed-IPQ806x-PCIE-reset-changes.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 490d103232287eb51c92c49a4ef8865fd0a9d59e Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 19 Jul 2016 18:58:18 +0530 -Subject: PCI: qcom: Fixed IPQ806x PCIE reset changes - -Change-Id: Ia6590e960b9754b1e8b7a51f318788cd63e9e321 -Signed-off-by: Sham Muthayyan ---- - ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -92,6 +92,7 @@ struct qcom_pcie_resources_2_1_0 { - struct reset_control *ahb_reset; - struct reset_control *por_reset; - struct reset_control *phy_reset; -+ struct reset_control *ext_reset; - struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY]; - }; - -@@ -261,6 +262,10 @@ static int qcom_pcie_get_resources_2_1_0 - if (IS_ERR(res->por_reset)) - return PTR_ERR(res->por_reset); - -+ res->ext_reset = devm_reset_control_get(dev, "ext"); -+ if (IS_ERR(res->ext_reset)) -+ return PTR_ERR(res->ext_reset); -+ - res->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); - return PTR_ERR_OR_ZERO(res->phy_reset); - } -@@ -274,6 +279,7 @@ static void qcom_pcie_deinit_2_1_0(struc - reset_control_assert(res->ahb_reset); - reset_control_assert(res->por_reset); - reset_control_assert(res->pci_reset); -+ reset_control_assert(res->ext_reset); - clk_disable_unprepare(res->iface_clk); - clk_disable_unprepare(res->core_clk); - clk_disable_unprepare(res->phy_clk); -@@ -290,15 +296,21 @@ static int qcom_pcie_init_2_1_0(struct q - u32 val; - int ret; - -+ ret = reset_control_assert(res->ahb_reset); -+ if (ret) { -+ dev_err(dev, "cannot assert ahb reset\n"); -+ return ret; -+ } -+ - ret = regulator_bulk_enable(ARRAY_SIZE(res->supplies), res->supplies); - if (ret < 0) { - dev_err(dev, "cannot enable regulators\n"); - return ret; - } - -- ret = reset_control_assert(res->ahb_reset); -+ ret = reset_control_deassert(res->ext_reset); - if (ret) { -- dev_err(dev, "cannot assert ahb reset\n"); -+ dev_err(dev, "cannot assert ext reset\n"); - goto err_assert_ahb; - } - diff --git a/target/linux/ipq806x/patches-5.4/0071-3-PCI-qcom-Fixed-IPQ806x-PCIE-init-changes.patch b/target/linux/ipq806x/patches-5.4/0071-3-PCI-qcom-Fixed-IPQ806x-PCIE-init-changes.patch deleted file mode 100644 index dde8fbaa7b..0000000000 --- a/target/linux/ipq806x/patches-5.4/0071-3-PCI-qcom-Fixed-IPQ806x-PCIE-init-changes.patch +++ /dev/null @@ -1,124 +0,0 @@ -From eddd13215d0f2b549ebc5f0e8796d5b1231f90a0 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 19 Jul 2016 19:58:22 +0530 -Subject: PCI: qcom: Fixed IPQ806x PCIE init changes - -Change-Id: Ic319b1aec27a47809284759f8fcb6a8815b7cf7e -Signed-off-by: Sham Muthayyan ---- - ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -45,7 +45,13 @@ - #define PCIE_CAP_CPL_TIMEOUT_DISABLE 0x10 - - #define PCIE20_PARF_PHY_CTRL 0x40 -+#define PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK (0x1f << 16) -+#define PHY_CTRL_PHY_TX0_TERM_OFFSET(x) (x << 16) -+ - #define PCIE20_PARF_PHY_REFCLK 0x4C -+#define REF_SSP_EN BIT(16) -+#define REF_USE_PAD BIT(12) -+ - #define PCIE20_PARF_DBI_BASE_ADDR 0x168 - #define PCIE20_PARF_SLV_ADDR_SPACE_SIZE 0x16C - #define PCIE20_PARF_MHI_CLOCK_RESET_CTRL 0x174 -@@ -76,6 +82,18 @@ - #define DBI_RO_WR_EN 1 - - #define PERST_DELAY_US 1000 -+/* PARF registers */ -+#define PCIE20_PARF_PCS_DEEMPH 0x34 -+#define PCS_DEEMPH_TX_DEEMPH_GEN1(x) (x << 16) -+#define PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(x) (x << 8) -+#define PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(x) (x << 0) -+ -+#define PCIE20_PARF_PCS_SWING 0x38 -+#define PCS_SWING_TX_SWING_FULL(x) (x << 8) -+#define PCS_SWING_TX_SWING_LOW(x) (x << 0) -+ -+#define PCIE20_PARF_CONFIG_BITS 0x50 -+#define PHY_RX0_EQ(x) (x << 24) - - #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358 - #define SLV_ADDR_SPACE_SZ 0x10000000 -@@ -94,6 +112,7 @@ struct qcom_pcie_resources_2_1_0 { - struct reset_control *phy_reset; - struct reset_control *ext_reset; - struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY]; -+ uint8_t phy_tx0_term_offset; - }; - - struct qcom_pcie_resources_1_0_0 { -@@ -173,6 +192,16 @@ struct qcom_pcie { - - #define to_qcom_pcie(x) dev_get_drvdata((x)->dev) - -+static inline void -+writel_masked(void __iomem *addr, u32 clear_mask, u32 set_mask) -+{ -+ u32 val = readl(addr); -+ -+ val &= ~clear_mask; -+ val |= set_mask; -+ writel(val, addr); -+} -+ - static void qcom_ep_reset_assert(struct qcom_pcie *pcie) - { - gpiod_set_value_cansleep(pcie->reset, 1); -@@ -266,6 +295,10 @@ static int qcom_pcie_get_resources_2_1_0 - if (IS_ERR(res->ext_reset)) - return PTR_ERR(res->ext_reset); - -+ if (of_property_read_u8(dev->of_node, "phy-tx0-term-offset", -+ &res->phy_tx0_term_offset)) -+ res->phy_tx0_term_offset = 0; -+ - res->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); - return PTR_ERR_OR_ZERO(res->phy_reset); - } -@@ -293,7 +326,6 @@ static int qcom_pcie_init_2_1_0(struct q - struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; - struct dw_pcie *pci = pcie->pci; - struct device *dev = pci->dev; -- u32 val; - int ret; - - ret = reset_control_assert(res->ahb_reset); -@@ -350,15 +382,26 @@ static int qcom_pcie_init_2_1_0(struct q - goto err_deassert_ahb; - } - -- /* enable PCIe clocks and resets */ -- val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); -- val &= ~BIT(0); -- writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); -- -- /* enable external reference clock */ -- val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); -- val |= BIT(16); -- writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); -+ writel_masked(pcie->parf + PCIE20_PARF_PHY_CTRL, BIT(0), 0); -+ -+ /* Set Tx termination offset */ -+ writel_masked(pcie->parf + PCIE20_PARF_PHY_CTRL, -+ PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK, -+ PHY_CTRL_PHY_TX0_TERM_OFFSET(res->phy_tx0_term_offset)); -+ -+ /* PARF programming */ -+ writel(PCS_DEEMPH_TX_DEEMPH_GEN1(0x18) | -+ PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(0x18) | -+ PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(0x22), -+ pcie->parf + PCIE20_PARF_PCS_DEEMPH); -+ writel(PCS_SWING_TX_SWING_FULL(0x78) | -+ PCS_SWING_TX_SWING_LOW(0x78), -+ pcie->parf + PCIE20_PARF_PCS_SWING); -+ writel(PHY_RX0_EQ(0x4), pcie->parf + PCIE20_PARF_CONFIG_BITS); -+ -+ /* Enable reference clock */ -+ writel_masked(pcie->parf + PCIE20_PARF_PHY_REFCLK, -+ REF_USE_PAD, REF_SSP_EN); - - ret = reset_control_deassert(res->phy_reset); - if (ret) { diff --git a/target/linux/ipq806x/patches-5.4/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch b/target/linux/ipq806x/patches-5.4/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch deleted file mode 100644 index f6ebe0c0af..0000000000 --- a/target/linux/ipq806x/patches-5.4/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch +++ /dev/null @@ -1,112 +0,0 @@ -From d27c303e828d7e42f339a459d2abfe30c51698e9 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 26 Jul 2016 12:28:31 +0530 -Subject: PCI: qcom: Programming the PCIE iATU for IPQ806x - -Resolved PCIE EP detection errors caused due to missing iATU programming. - -Change-Id: Ie95c0f8cb940abc0192a8a3c4e825ddba54b72fe -Signed-off-by: Sham Muthayyan ---- - ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -76,6 +76,30 @@ - #define PCIE20_CAP_LINK_1 (PCIE20_CAP + 0x14) - #define PCIE_CAP_LINK1_VAL 0x2FD7F - -+#define PCIE20_CAP_LINKCTRLSTATUS (PCIE20_CAP + 0x10) -+ -+#define PCIE20_AXI_MSTR_RESP_COMP_CTRL0 0x818 -+#define PCIE20_AXI_MSTR_RESP_COMP_CTRL1 0x81c -+ -+#define PCIE20_PLR_IATU_VIEWPORT 0x900 -+#define PCIE20_PLR_IATU_REGION_OUTBOUND (0x0 << 31) -+#define PCIE20_PLR_IATU_REGION_INDEX(x) (x << 0) -+ -+#define PCIE20_PLR_IATU_CTRL1 0x904 -+#define PCIE20_PLR_IATU_TYPE_CFG0 (0x4 << 0) -+#define PCIE20_PLR_IATU_TYPE_MEM (0x0 << 0) -+ -+#define PCIE20_PLR_IATU_CTRL2 0x908 -+#define PCIE20_PLR_IATU_ENABLE BIT(31) -+ -+#define PCIE20_PLR_IATU_LBAR 0x90C -+#define PCIE20_PLR_IATU_UBAR 0x910 -+#define PCIE20_PLR_IATU_LAR 0x914 -+#define PCIE20_PLR_IATU_LTAR 0x918 -+#define PCIE20_PLR_IATU_UTAR 0x91c -+ -+#define MSM_PCIE_DEV_CFG_ADDR 0x01000000 -+ - #define PCIE20_PARF_Q2A_FLUSH 0x1AC - - #define PCIE20_MISC_CONTROL_1_REG 0x8BC -@@ -240,6 +264,57 @@ static void qcom_pcie_2_1_0_ltssm_enable - writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL); - } - -+static void qcom_pcie_prog_viewport_cfg0(struct qcom_pcie *pcie, u32 busdev) -+{ -+ struct pcie_port *pp = &pcie->pci->pp; -+ -+ /* -+ * program and enable address translation region 0 (device config -+ * address space); region type config; -+ * axi config address range to device config address range -+ */ -+ writel(PCIE20_PLR_IATU_REGION_OUTBOUND | -+ PCIE20_PLR_IATU_REGION_INDEX(0), -+ pcie->pci->dbi_base + PCIE20_PLR_IATU_VIEWPORT); -+ -+ writel(PCIE20_PLR_IATU_TYPE_CFG0, pcie->pci->dbi_base + PCIE20_PLR_IATU_CTRL1); -+ writel(PCIE20_PLR_IATU_ENABLE, pcie->pci->dbi_base + PCIE20_PLR_IATU_CTRL2); -+ writel(pp->cfg0_base, pcie->pci->dbi_base + PCIE20_PLR_IATU_LBAR); -+ writel((pp->cfg0_base >> 32), pcie->pci->dbi_base + PCIE20_PLR_IATU_UBAR); -+ writel((pp->cfg0_base + pp->cfg0_size - 1), -+ pcie->pci->dbi_base + PCIE20_PLR_IATU_LAR); -+ writel(busdev, pcie->pci->dbi_base + PCIE20_PLR_IATU_LTAR); -+ writel(0, pcie->pci->dbi_base + PCIE20_PLR_IATU_UTAR); -+} -+ -+static void qcom_pcie_prog_viewport_mem2_outbound(struct qcom_pcie *pcie) -+{ -+ struct pcie_port *pp = &pcie->pci->pp; -+ -+ /* -+ * program and enable address translation region 2 (device resource -+ * address space); region type memory; -+ * axi device bar address range to device bar address range -+ */ -+ writel(PCIE20_PLR_IATU_REGION_OUTBOUND | -+ PCIE20_PLR_IATU_REGION_INDEX(2), -+ pcie->pci->dbi_base + PCIE20_PLR_IATU_VIEWPORT); -+ -+ writel(PCIE20_PLR_IATU_TYPE_MEM, pcie->pci->dbi_base + PCIE20_PLR_IATU_CTRL1); -+ writel(PCIE20_PLR_IATU_ENABLE, pcie->pci->dbi_base + PCIE20_PLR_IATU_CTRL2); -+ writel(pp->mem_base, pcie->pci->dbi_base + PCIE20_PLR_IATU_LBAR); -+ writel((pp->mem_base >> 32), pcie->pci->dbi_base + PCIE20_PLR_IATU_UBAR); -+ writel(pp->mem_base + pp->mem_size - 1, -+ pcie->pci->dbi_base + PCIE20_PLR_IATU_LAR); -+ writel(pp->mem_bus_addr, pcie->pci->dbi_base + PCIE20_PLR_IATU_LTAR); -+ writel(upper_32_bits(pp->mem_bus_addr), -+ pcie->pci->dbi_base + PCIE20_PLR_IATU_UTAR); -+ -+ /* 256B PCIE buffer setting */ -+ writel(0x1, pcie->pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL0); -+ writel(0x1, pcie->pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL1); -+} -+ - static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie) - { - struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; -@@ -437,6 +512,9 @@ static int qcom_pcie_init_2_1_0(struct q - writel(CFG_BRIDGE_SB_INIT, - pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL1); - -+ qcom_pcie_prog_viewport_cfg0(pcie, MSM_PCIE_DEV_CFG_ADDR); -+ qcom_pcie_prog_viewport_mem2_outbound(pcie); -+ - return 0; - - err_deassert_ahb: diff --git a/target/linux/ipq806x/patches-5.4/0071-6-PCI-qcom-Force-GEN1-support.patch b/target/linux/ipq806x/patches-5.4/0071-6-PCI-qcom-Force-GEN1-support.patch deleted file mode 100644 index 275b7c0915..0000000000 --- a/target/linux/ipq806x/patches-5.4/0071-6-PCI-qcom-Force-GEN1-support.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 4910cfd150342ec7b038892262923c725a9c4001 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Wed, 7 Sep 2016 16:44:28 +0530 -Subject: PCI: qcom: Force GEN1 support - -Change-Id: Ica54ddb737d7b851469deab1745f54bf431bd3f0 -Signed-off-by: Sham Muthayyan ---- - ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -122,6 +122,8 @@ - #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358 - #define SLV_ADDR_SPACE_SZ 0x10000000 - -+#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0 -+ - #define QCOM_PCIE_2_1_0_MAX_SUPPLY 3 - struct qcom_pcie_resources_2_1_0 { - struct clk *iface_clk; -@@ -212,6 +214,7 @@ struct qcom_pcie { - struct phy *phy; - struct gpio_desc *reset; - const struct qcom_pcie_ops *ops; -+ uint32_t force_gen1; - }; - - #define to_qcom_pcie(x) dev_get_drvdata((x)->dev) -@@ -504,6 +507,11 @@ static int qcom_pcie_init_2_1_0(struct q - - /* wait for clock acquisition */ - usleep_range(1000, 1500); -+ if (pcie->force_gen1) { -+ writel_relaxed((readl_relaxed( -+ pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2) | 1), -+ pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2); -+ } - - - /* Set the Max TLP size to 2K, instead of using default of 4K */ -@@ -1340,6 +1348,8 @@ static int qcom_pcie_probe(struct platfo - struct dw_pcie *pci; - struct qcom_pcie *pcie; - int ret; -+ uint32_t force_gen1 = 0; -+ struct device_node *np = pdev->dev.of_node; - - pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); - if (!pcie) -@@ -1370,6 +1380,9 @@ static int qcom_pcie_probe(struct platfo - goto err_pm_runtime_put; - } - -+ of_property_read_u32(np, "force_gen1", &force_gen1); -+ pcie->force_gen1 = force_gen1; -+ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf"); - pcie->parf = devm_ioremap_resource(dev, res); - if (IS_ERR(pcie->parf)) { diff --git a/target/linux/ipq806x/patches-5.4/0071-7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch b/target/linux/ipq806x/patches-5.4/0071-7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch deleted file mode 100644 index 51df248c04..0000000000 --- a/target/linux/ipq806x/patches-5.4/0071-7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch +++ /dev/null @@ -1,69 +0,0 @@ -From edff8f777c6321ca89bb950a382f409c4a126e28 Mon Sep 17 00:00:00 2001 -From: Gokul Sriram Palanisamy -Date: Thu, 15 Dec 2016 17:38:18 +0530 -Subject: pcie: Set PCIE MRRS and MPS to 256B - -Set Max Read Request Size and Max Payload Size to 256 bytes, -per chip team recommendation. - -Change-Id: I097004be2ced1b3096ffc10c318aae0b2bb155e8 -Signed-off-by: Gokul Sriram Palanisamy ---- - drivers/pci/host/pcie-qcom.c | 37 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -(limited to 'drivers/pci/host/pcie-qcom.c') - ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -124,6 +124,14 @@ - - #define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0 - -+#define __set(v, a, b) (((v) << (b)) & GENMASK(a, b)) -+#define __mask(a, b) (((1 << ((a) + 1)) - 1) & ~((1 << (b)) - 1)) -+#define PCIE20_DEV_CAS 0x78 -+#define PCIE20_MRRS_MASK __mask(14, 12) -+#define PCIE20_MRRS(x) __set(x, 14, 12) -+#define PCIE20_MPS_MASK __mask(7, 5) -+#define PCIE20_MPS(x) __set(x, 7, 5) -+ - #define QCOM_PCIE_2_1_0_MAX_SUPPLY 3 - struct qcom_pcie_resources_2_1_0 { - struct clk *iface_clk; -@@ -1448,6 +1456,35 @@ err_pm_runtime_put: - return ret; - } - -+static void qcom_pcie_fixup_final(struct pci_dev *dev) -+{ -+ int cap, err; -+ u16 ctl, reg_val; -+ -+ cap = pci_pcie_cap(dev); -+ if (!cap) -+ return; -+ -+ err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); -+ -+ if (err) -+ return; -+ -+ reg_val = ctl; -+ -+ if (((reg_val & PCIE20_MRRS_MASK) >> 12) > 1) -+ reg_val = (reg_val & ~(PCIE20_MRRS_MASK)) | PCIE20_MRRS(0x1); -+ -+ if (((ctl & PCIE20_MPS_MASK) >> 5) > 1) -+ reg_val = (reg_val & ~(PCIE20_MPS_MASK)) | PCIE20_MPS(0x1); -+ -+ err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, reg_val); -+ -+ if (err) -+ pr_err("pcie config write failed %d\n", err); -+} -+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, qcom_pcie_fixup_final); -+ - static const struct of_device_id qcom_pcie_match[] = { - { .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 }, - { .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 }, diff --git a/target/linux/ipq806x/patches-5.4/0071-8-pcie-qcom-Fixed-pcie_phy_clk-branch-issue.patch b/target/linux/ipq806x/patches-5.4/0071-8-pcie-qcom-Fixed-pcie_phy_clk-branch-issue.patch deleted file mode 100644 index 7cbeb3bed7..0000000000 --- a/target/linux/ipq806x/patches-5.4/0071-8-pcie-qcom-Fixed-pcie_phy_clk-branch-issue.patch +++ /dev/null @@ -1,91 +0,0 @@ -From b74bab6186131eea09459eedf5d737645a3559c9 Mon Sep 17 00:00:00 2001 -From: Abhishek Sahu -Date: Thu, 22 Dec 2016 11:18:45 +0530 -Subject: pcie: qcom: Fixed pcie_phy_clk branch issue - -Following backtraces are observed in PCIe deinit operation. - - Hardware name: Qualcomm (Flattened Device Tree) - (unwind_backtrace) from [] (show_stack+0x10/0x14) - (show_stack) from [] (dump_stack+0x84/0x98) - (dump_stack) from [] (warn_slowpath_common+0x9c/0xb8) - (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40) - (warn_slowpath_fmt) from [] (clk_branch_wait+0x114/0x120) - (clk_branch_wait) from [] (clk_core_disable+0xd0/0x1f4) - (clk_core_disable) from [] (clk_disable+0x24/0x30) - (clk_disable) from [] (qcom_pcie_deinit_v0+0x6c/0xb8) - (qcom_pcie_deinit_v0) from [] (qcom_pcie_host_init+0xe0/0xe8) - (qcom_pcie_host_init) from [] (dw_pcie_host_init+0x3b0/0x538) - (dw_pcie_host_init) from [] (qcom_pcie_probe+0x20c/0x2e4) - -pcie_phy_clk is generated for PCIe controller itself and the -GCC controls its branch operation. This error is coming since -the assert operations turn off the parent clock before branch -clock. Now this patch moves clk_disable_unprepare before assert -operations. - -Similarly, during probe function, the clock branch operation -should be done after dessert operation. Currently, it does not -generate any error since bootloader enables the pcie_phy_clk -but the same error is coming during probe, if bootloader -disables pcie_phy_clk. - -Change-Id: Ib29c154d10eb64363d9cc982ce5fd8107af5627d -Signed-off-by: Abhishek Sahu ---- - drivers/pci/host/pcie-qcom.c | 16 +++++++--------- - 1 file changed, 7 insertions(+), 9 deletions(-) - ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -393,6 +393,7 @@ static void qcom_pcie_deinit_2_1_0(struc - { - struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; - -+ clk_disable_unprepare(res->phy_clk); - reset_control_assert(res->pci_reset); - reset_control_assert(res->axi_reset); - reset_control_assert(res->ahb_reset); -@@ -401,7 +402,6 @@ static void qcom_pcie_deinit_2_1_0(struc - reset_control_assert(res->ext_reset); - clk_disable_unprepare(res->iface_clk); - clk_disable_unprepare(res->core_clk); -- clk_disable_unprepare(res->phy_clk); - clk_disable_unprepare(res->aux_clk); - clk_disable_unprepare(res->ref_clk); - regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); -@@ -444,12 +444,6 @@ static int qcom_pcie_init_2_1_0(struct q - goto err_clk_core; - } - -- ret = clk_prepare_enable(res->phy_clk); -- if (ret) { -- dev_err(dev, "cannot prepare/enable phy clock\n"); -- goto err_clk_phy; -- } -- - ret = clk_prepare_enable(res->aux_clk); - if (ret) { - dev_err(dev, "cannot prepare/enable aux clock\n"); -@@ -513,6 +507,12 @@ static int qcom_pcie_init_2_1_0(struct q - return ret; - } - -+ ret = clk_prepare_enable(res->phy_clk); -+ if (ret) { -+ dev_err(dev, "cannot prepare/enable phy clock\n"); -+ goto err_deassert_ahb; -+ } -+ - /* wait for clock acquisition */ - usleep_range(1000, 1500); - if (pcie->force_gen1) { -@@ -538,8 +538,6 @@ err_deassert_ahb: - err_clk_ref: - clk_disable_unprepare(res->aux_clk); - err_clk_aux: -- clk_disable_unprepare(res->phy_clk); --err_clk_phy: - clk_disable_unprepare(res->core_clk); - err_clk_core: - clk_disable_unprepare(res->iface_clk); diff --git a/target/linux/ipq806x/patches-5.4/0071-9-pcie-qcom-change-duplicate-pci-reset-to-phy-reset.patch b/target/linux/ipq806x/patches-5.4/0071-9-pcie-qcom-change-duplicate-pci-reset-to-phy-reset.patch deleted file mode 100644 index 3fff78bfd4..0000000000 --- a/target/linux/ipq806x/patches-5.4/0071-9-pcie-qcom-change-duplicate-pci-reset-to-phy-reset.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 1a9c48123bd09f75562b6a2ee0f0a7b2d533cd45 Mon Sep 17 00:00:00 2001 -From: Abhishek Sahu -Date: Thu, 22 Dec 2016 11:50:49 +0530 -Subject: pcie: qcom: change duplicate pci reset to phy reset - -The deinit issues reset_control_assert for pci twice and -does not contain phy reset. - -Change-Id: Iba849963c7e5f9a2a1063f0e2e89635df70b8a99 -Signed-off-by: Abhishek Sahu ---- - drivers/pci/host/pcie-qcom.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -394,7 +394,7 @@ static void qcom_pcie_deinit_2_1_0(struc - struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; - - clk_disable_unprepare(res->phy_clk); -- reset_control_assert(res->pci_reset); -+ reset_control_assert(res->phy_reset); - reset_control_assert(res->axi_reset); - reset_control_assert(res->ahb_reset); - reset_control_assert(res->por_reset); diff --git a/target/linux/ipq806x/patches-5.4/085-ipq8064-v1.0-dtsi-additions.patch b/target/linux/ipq806x/patches-5.4/085-ipq8064-v1.0-dtsi-additions.patch index 9837fb156d..58f6a46e4f 100644 --- a/target/linux/ipq806x/patches-5.4/085-ipq8064-v1.0-dtsi-additions.patch +++ b/target/linux/ipq806x/patches-5.4/085-ipq8064-v1.0-dtsi-additions.patch @@ -4,7 +4,7 @@ for the (local) additional contents of qcom-ipq8064.dtsi --- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi -@@ -56,3 +56,19 @@ +@@ -56,3 +56,7 @@ }; }; }; @@ -12,15 +12,3 @@ for the (local) additional contents of qcom-ipq8064.dtsi +&CPU_SPC { + status = "okay"; +}; -+ -+&pcie0 { -+ phy-tx0-term-offset = <7>; -+}; -+ -+&pcie1 { -+ phy-tx0-term-offset = <7>; -+}; -+ -+&pcie2 { -+ phy-tx0-term-offset = <7>; -+}; diff --git a/target/linux/ipq806x/patches-5.4/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch b/target/linux/ipq806x/patches-5.4/093-1-v5.8-ipq806x-PCI-qcom-Add-missing-ipq806x-clocks-in-PCIe-driver.patch similarity index 63% rename from target/linux/ipq806x/patches-5.4/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch rename to target/linux/ipq806x/patches-5.4/093-1-v5.8-ipq806x-PCI-qcom-Add-missing-ipq806x-clocks-in-PCIe-driver.patch index 3a3e0a0000..6098cb8fe0 100644 --- a/target/linux/ipq806x/patches-5.4/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch +++ b/target/linux/ipq806x/patches-5.4/093-1-v5.8-ipq806x-PCI-qcom-Add-missing-ipq806x-clocks-in-PCIe-driver.patch @@ -1,15 +1,25 @@ -From 86655aa14304ca88a8ce8847276147dbc1a83238 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 19 Jul 2016 18:44:49 +0530 -Subject: PCI: qcom: Fixed IPQ806x specific clocks +From 8b6f0330b5f9a7543356bfa9e76d580f03aa2c1e Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Mon, 15 Jun 2020 23:05:57 +0200 +Subject: PCI: qcom: Add missing ipq806x clocks in PCIe driver -Change-Id: I488e1bc707d6a22b37a338f41935e3922009ba5e +Aux and Ref clk are missing in PCIe qcom driver. Add support for this +optional clks for ipq8064/apq8064 SoC. + +Link: https://lore.kernel.org/r/20200615210608.21469-2-ansuelsmth@gmail.com +Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver") Signed-off-by: Sham Muthayyan +Signed-off-by: Ansuel Smith +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Rob Herring +Acked-by: Stanimir Varbanov --- + drivers/pci/controller/dwc/pcie-qcom.c | 38 +++++++++++++++++++++++++++++----- + 1 file changed, 33 insertions(+), 5 deletions(-) --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -85,6 +85,8 @@ struct qcom_pcie_resources_2_1_0 { +@@ -103,6 +103,8 @@ struct qcom_pcie_resources_2_1_0 { struct clk *iface_clk; struct clk *core_clk; struct clk *phy_clk; @@ -18,22 +28,22 @@ Signed-off-by: Sham Muthayyan struct reset_control *pci_reset; struct reset_control *axi_reset; struct reset_control *ahb_reset; -@@ -235,6 +237,14 @@ static int qcom_pcie_get_resources_2_1_0 +@@ -253,6 +255,14 @@ static int qcom_pcie_get_resources_2_1_0 if (IS_ERR(res->phy_clk)) return PTR_ERR(res->phy_clk); -+ res->aux_clk = devm_clk_get(dev, "aux"); ++ res->aux_clk = devm_clk_get_optional(dev, "aux"); + if (IS_ERR(res->aux_clk)) + return PTR_ERR(res->aux_clk); + -+ res->ref_clk = devm_clk_get(dev, "ref"); ++ res->ref_clk = devm_clk_get_optional(dev, "ref"); + if (IS_ERR(res->ref_clk)) + return PTR_ERR(res->ref_clk); + res->pci_reset = devm_reset_control_get_exclusive(dev, "pci"); if (IS_ERR(res->pci_reset)) return PTR_ERR(res->pci_reset); -@@ -267,6 +277,8 @@ static void qcom_pcie_deinit_2_1_0(struc +@@ -285,6 +295,8 @@ static void qcom_pcie_deinit_2_1_0(struc clk_disable_unprepare(res->iface_clk); clk_disable_unprepare(res->core_clk); clk_disable_unprepare(res->phy_clk); @@ -42,7 +52,7 @@ Signed-off-by: Sham Muthayyan regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); } -@@ -296,16 +308,28 @@ static int qcom_pcie_init_2_1_0(struct q +@@ -315,16 +327,28 @@ static int qcom_pcie_init_2_1_0(struct q goto err_assert_ahb; } @@ -74,7 +84,7 @@ Signed-off-by: Sham Muthayyan } ret = reset_control_deassert(res->ahb_reset); -@@ -361,10 +385,14 @@ static int qcom_pcie_init_2_1_0(struct q +@@ -400,10 +424,14 @@ static int qcom_pcie_init_2_1_0(struct q return 0; err_deassert_ahb: diff --git a/target/linux/ipq806x/patches-5.4/093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch b/target/linux/ipq806x/patches-5.4/093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch new file mode 100644 index 0000000000..9600419710 --- /dev/null +++ b/target/linux/ipq806x/patches-5.4/093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch @@ -0,0 +1,72 @@ +From dd58318c019f10bc94db36df66af6c55d4c0cbba Mon Sep 17 00:00:00 2001 +From: Abhishek Sahu +Date: Mon, 15 Jun 2020 23:05:59 +0200 +Subject: PCI: qcom: Change duplicate PCI reset to phy reset + +The deinit issues reset_control_assert for PCI twice and does not contain +phy reset. + +Link: https://lore.kernel.org/r/20200615210608.21469-4-ansuelsmth@gmail.com +Signed-off-by: Abhishek Sahu +Signed-off-by: Ansuel Smith +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Rob Herring +Acked-by: Stanimir Varbanov +--- + drivers/pci/controller/dwc/pcie-qcom.c | 18 ++++++++---------- + 1 file changed, 8 insertions(+), 10 deletions(-) + +--- a/drivers/pci/controller/dwc/pcie-qcom.c ++++ b/drivers/pci/controller/dwc/pcie-qcom.c +@@ -287,14 +287,14 @@ static void qcom_pcie_deinit_2_1_0(struc + { + struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; + ++ clk_disable_unprepare(res->phy_clk); + reset_control_assert(res->pci_reset); + reset_control_assert(res->axi_reset); + reset_control_assert(res->ahb_reset); + reset_control_assert(res->por_reset); +- reset_control_assert(res->pci_reset); ++ reset_control_assert(res->phy_reset); + clk_disable_unprepare(res->iface_clk); + clk_disable_unprepare(res->core_clk); +- clk_disable_unprepare(res->phy_clk); + clk_disable_unprepare(res->aux_clk); + clk_disable_unprepare(res->ref_clk); + regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); +@@ -333,12 +333,6 @@ static int qcom_pcie_init_2_1_0(struct q + goto err_clk_core; + } + +- ret = clk_prepare_enable(res->phy_clk); +- if (ret) { +- dev_err(dev, "cannot prepare/enable phy clock\n"); +- goto err_clk_phy; +- } +- + ret = clk_prepare_enable(res->aux_clk); + if (ret) { + dev_err(dev, "cannot prepare/enable aux clock\n"); +@@ -411,6 +405,12 @@ static int qcom_pcie_init_2_1_0(struct q + return ret; + } + ++ ret = clk_prepare_enable(res->phy_clk); ++ if (ret) { ++ dev_err(dev, "cannot prepare/enable phy clock\n"); ++ goto err_deassert_ahb; ++ } ++ + /* wait for clock acquisition */ + usleep_range(1000, 1500); + +@@ -428,8 +428,6 @@ err_deassert_ahb: + err_clk_ref: + clk_disable_unprepare(res->aux_clk); + err_clk_aux: +- clk_disable_unprepare(res->phy_clk); +-err_clk_phy: + clk_disable_unprepare(res->core_clk); + err_clk_core: + clk_disable_unprepare(res->iface_clk); diff --git a/target/linux/ipq806x/patches-5.4/093-3-v5.8-ipq806x-PCI-qcom-Add-missing-reset-for-ipq806x.patch b/target/linux/ipq806x/patches-5.4/093-3-v5.8-ipq806x-PCI-qcom-Add-missing-reset-for-ipq806x.patch new file mode 100644 index 0000000000..fe31e55de3 --- /dev/null +++ b/target/linux/ipq806x/patches-5.4/093-3-v5.8-ipq806x-PCI-qcom-Add-missing-reset-for-ipq806x.patch @@ -0,0 +1,62 @@ +From ee367e2cdd2202b5714982739e684543cd2cee0e Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Mon, 15 Jun 2020 23:06:00 +0200 +Subject: PCI: qcom: Add missing reset for ipq806x + +Add missing ext reset used by ipq8064 SoC in PCIe qcom driver. + +Link: https://lore.kernel.org/r/20200615210608.21469-5-ansuelsmth@gmail.com +Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver") +Signed-off-by: Sham Muthayyan +Signed-off-by: Ansuel Smith +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Rob Herring +Reviewed-by: Philipp Zabel +Acked-by: Stanimir Varbanov +Cc: stable@vger.kernel.org # v4.5+ +--- + drivers/pci/controller/dwc/pcie-qcom.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/drivers/pci/controller/dwc/pcie-qcom.c ++++ b/drivers/pci/controller/dwc/pcie-qcom.c +@@ -110,6 +110,7 @@ struct qcom_pcie_resources_2_1_0 { + struct reset_control *ahb_reset; + struct reset_control *por_reset; + struct reset_control *phy_reset; ++ struct reset_control *ext_reset; + struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY]; + }; + +@@ -279,6 +280,10 @@ static int qcom_pcie_get_resources_2_1_0 + if (IS_ERR(res->por_reset)) + return PTR_ERR(res->por_reset); + ++ res->ext_reset = devm_reset_control_get_optional_exclusive(dev, "ext"); ++ if (IS_ERR(res->ext_reset)) ++ return PTR_ERR(res->ext_reset); ++ + res->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); + return PTR_ERR_OR_ZERO(res->phy_reset); + } +@@ -292,6 +297,7 @@ static void qcom_pcie_deinit_2_1_0(struc + reset_control_assert(res->axi_reset); + reset_control_assert(res->ahb_reset); + reset_control_assert(res->por_reset); ++ reset_control_assert(res->ext_reset); + reset_control_assert(res->phy_reset); + clk_disable_unprepare(res->iface_clk); + clk_disable_unprepare(res->core_clk); +@@ -351,6 +357,12 @@ static int qcom_pcie_init_2_1_0(struct q + goto err_deassert_ahb; + } + ++ ret = reset_control_deassert(res->ext_reset); ++ if (ret) { ++ dev_err(dev, "cannot deassert ext reset\n"); ++ goto err_deassert_ahb; ++ } ++ + /* enable PCIe clocks and resets */ + val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); + val &= ~BIT(0); diff --git a/target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch b/target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch new file mode 100644 index 0000000000..32fc297fe0 --- /dev/null +++ b/target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch @@ -0,0 +1,228 @@ +From 6a114526af4689938863bf34976c83bfd279f517 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Mon, 15 Jun 2020 23:06:02 +0200 +Subject: PCI: qcom: Use bulk clk api and assert on error + +Rework 2.1.0 revision to use bulk clk api and fix missing assert on +reset_control_deassert error. + +Link: https://lore.kernel.org/r/20200615210608.21469-7-ansuelsmth@gmail.com +Signed-off-by: Ansuel Smith +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Rob Herring +Acked-by: Stanimir Varbanov +--- + drivers/pci/controller/dwc/pcie-qcom.c | 131 ++++++++++++--------------------- + 1 file changed, 46 insertions(+), 85 deletions(-) + +--- a/drivers/pci/controller/dwc/pcie-qcom.c ++++ b/drivers/pci/controller/dwc/pcie-qcom.c +@@ -99,12 +99,9 @@ + #define SLV_ADDR_SPACE_SZ 0x10000000 + + #define QCOM_PCIE_2_1_0_MAX_SUPPLY 3 ++#define QCOM_PCIE_2_1_0_MAX_CLOCKS 5 + struct qcom_pcie_resources_2_1_0 { +- struct clk *iface_clk; +- struct clk *core_clk; +- struct clk *phy_clk; +- struct clk *aux_clk; +- struct clk *ref_clk; ++ struct clk_bulk_data clks[QCOM_PCIE_2_1_0_MAX_CLOCKS]; + struct reset_control *pci_reset; + struct reset_control *axi_reset; + struct reset_control *ahb_reset; +@@ -244,25 +241,21 @@ static int qcom_pcie_get_resources_2_1_0 + if (ret) + return ret; + +- res->iface_clk = devm_clk_get(dev, "iface"); +- if (IS_ERR(res->iface_clk)) +- return PTR_ERR(res->iface_clk); +- +- res->core_clk = devm_clk_get(dev, "core"); +- if (IS_ERR(res->core_clk)) +- return PTR_ERR(res->core_clk); +- +- res->phy_clk = devm_clk_get(dev, "phy"); +- if (IS_ERR(res->phy_clk)) +- return PTR_ERR(res->phy_clk); +- +- res->aux_clk = devm_clk_get_optional(dev, "aux"); +- if (IS_ERR(res->aux_clk)) +- return PTR_ERR(res->aux_clk); +- +- res->ref_clk = devm_clk_get_optional(dev, "ref"); +- if (IS_ERR(res->ref_clk)) +- return PTR_ERR(res->ref_clk); ++ res->clks[0].id = "iface"; ++ res->clks[1].id = "core"; ++ res->clks[2].id = "phy"; ++ res->clks[3].id = "aux"; ++ res->clks[4].id = "ref"; ++ ++ /* iface, core, phy are required */ ++ ret = devm_clk_bulk_get(dev, 3, res->clks); ++ if (ret < 0) ++ return ret; ++ ++ /* aux, ref are optional */ ++ ret = devm_clk_bulk_get_optional(dev, 2, res->clks + 3); ++ if (ret < 0) ++ return ret; + + res->pci_reset = devm_reset_control_get_exclusive(dev, "pci"); + if (IS_ERR(res->pci_reset)) +@@ -292,17 +285,13 @@ static void qcom_pcie_deinit_2_1_0(struc + { + struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; + +- clk_disable_unprepare(res->phy_clk); ++ clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks); + reset_control_assert(res->pci_reset); + reset_control_assert(res->axi_reset); + reset_control_assert(res->ahb_reset); + reset_control_assert(res->por_reset); + reset_control_assert(res->ext_reset); + reset_control_assert(res->phy_reset); +- clk_disable_unprepare(res->iface_clk); +- clk_disable_unprepare(res->core_clk); +- clk_disable_unprepare(res->aux_clk); +- clk_disable_unprepare(res->ref_clk); + regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); + } + +@@ -321,47 +310,45 @@ static int qcom_pcie_init_2_1_0(struct q + return ret; + } + +- ret = reset_control_assert(res->ahb_reset); ++ ret = reset_control_deassert(res->ahb_reset); + if (ret) { +- dev_err(dev, "cannot assert ahb reset\n"); +- goto err_assert_ahb; ++ dev_err(dev, "cannot deassert ahb reset\n"); ++ goto err_deassert_ahb; + } + +- ret = clk_prepare_enable(res->iface_clk); ++ ret = reset_control_deassert(res->ext_reset); + if (ret) { +- dev_err(dev, "cannot prepare/enable iface clock\n"); +- goto err_assert_ahb; ++ dev_err(dev, "cannot deassert ext reset\n"); ++ goto err_deassert_ext; + } + +- ret = clk_prepare_enable(res->core_clk); ++ ret = reset_control_deassert(res->phy_reset); + if (ret) { +- dev_err(dev, "cannot prepare/enable core clock\n"); +- goto err_clk_core; ++ dev_err(dev, "cannot deassert phy reset\n"); ++ goto err_deassert_phy; + } + +- ret = clk_prepare_enable(res->aux_clk); ++ ret = reset_control_deassert(res->pci_reset); + if (ret) { +- dev_err(dev, "cannot prepare/enable aux clock\n"); +- goto err_clk_aux; ++ dev_err(dev, "cannot deassert pci reset\n"); ++ goto err_deassert_pci; + } + +- ret = clk_prepare_enable(res->ref_clk); ++ ret = reset_control_deassert(res->por_reset); + if (ret) { +- dev_err(dev, "cannot prepare/enable ref clock\n"); +- goto err_clk_ref; ++ dev_err(dev, "cannot deassert por reset\n"); ++ goto err_deassert_por; + } + +- ret = reset_control_deassert(res->ahb_reset); ++ ret = reset_control_deassert(res->axi_reset); + if (ret) { +- dev_err(dev, "cannot deassert ahb reset\n"); +- goto err_deassert_ahb; ++ dev_err(dev, "cannot deassert axi reset\n"); ++ goto err_deassert_axi; + } + +- ret = reset_control_deassert(res->ext_reset); +- if (ret) { +- dev_err(dev, "cannot deassert ext reset\n"); +- goto err_deassert_ahb; +- } ++ ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks); ++ if (ret) ++ goto err_clks; + + /* enable PCIe clocks and resets */ + val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); +@@ -393,36 +380,6 @@ static int qcom_pcie_init_2_1_0(struct q + val |= PHY_REFCLK_SSP_EN; + writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); + +- ret = reset_control_deassert(res->phy_reset); +- if (ret) { +- dev_err(dev, "cannot deassert phy reset\n"); +- return ret; +- } +- +- ret = reset_control_deassert(res->pci_reset); +- if (ret) { +- dev_err(dev, "cannot deassert pci reset\n"); +- return ret; +- } +- +- ret = reset_control_deassert(res->por_reset); +- if (ret) { +- dev_err(dev, "cannot deassert por reset\n"); +- return ret; +- } +- +- ret = reset_control_deassert(res->axi_reset); +- if (ret) { +- dev_err(dev, "cannot deassert axi reset\n"); +- return ret; +- } +- +- ret = clk_prepare_enable(res->phy_clk); +- if (ret) { +- dev_err(dev, "cannot prepare/enable phy clock\n"); +- goto err_deassert_ahb; +- } +- + /* wait for clock acquisition */ + usleep_range(1000, 1500); + +@@ -435,15 +392,19 @@ static int qcom_pcie_init_2_1_0(struct q + + return 0; + ++err_clks: ++ reset_control_assert(res->axi_reset); ++err_deassert_axi: ++ reset_control_assert(res->por_reset); ++err_deassert_por: ++ reset_control_assert(res->pci_reset); ++err_deassert_pci: ++ reset_control_assert(res->phy_reset); ++err_deassert_phy: ++ reset_control_assert(res->ext_reset); ++err_deassert_ext: ++ reset_control_assert(res->ahb_reset); + err_deassert_ahb: +- clk_disable_unprepare(res->ref_clk); +-err_clk_ref: +- clk_disable_unprepare(res->aux_clk); +-err_clk_aux: +- clk_disable_unprepare(res->core_clk); +-err_clk_core: +- clk_disable_unprepare(res->iface_clk); +-err_assert_ahb: + regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); + + return ret; diff --git a/target/linux/ipq806x/patches-5.4/093-7-v5.8-ipq806x-PCI-qcom-Add-ipq8064-rev2-variant.patch b/target/linux/ipq806x/patches-5.4/093-7-v5.8-ipq806x-PCI-qcom-Add-ipq8064-rev2-variant.patch new file mode 100644 index 0000000000..4e8fa41f35 --- /dev/null +++ b/target/linux/ipq806x/patches-5.4/093-7-v5.8-ipq806x-PCI-qcom-Add-ipq8064-rev2-variant.patch @@ -0,0 +1,36 @@ +From 8df093fe2ae1717389df0dcdc620c02cc35abb21 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Mon, 15 Jun 2020 23:06:05 +0200 +Subject: PCI: qcom: Add ipq8064 rev2 variant + +Ipq8064-v2 have tx term offset set to 0. Introduce this variant to permit +different offset based on the revision. + +Link: https://lore.kernel.org/r/20200615210608.21469-10-ansuelsmth@gmail.com +Signed-off-by: Ansuel Smith +Signed-off-by: Lorenzo Pieralisi +Acked-by: Stanimir Varbanov +--- + drivers/pci/controller/dwc/pcie-qcom.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/pci/controller/dwc/pcie-qcom.c ++++ b/drivers/pci/controller/dwc/pcie-qcom.c +@@ -355,7 +355,8 @@ static int qcom_pcie_init_2_1_0(struct q + val &= ~BIT(0); + writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); + +- if (of_device_is_compatible(node, "qcom,pcie-ipq8064")) { ++ if (of_device_is_compatible(node, "qcom,pcie-ipq8064") || ++ of_device_is_compatible(node, "qcom,pcie-ipq8064-v2")) { + writel(PCS_DEEMPH_TX_DEEMPH_GEN1(24) | + PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(24) | + PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(34), +@@ -1315,6 +1316,7 @@ err_pm_runtime_put: + static const struct of_device_id qcom_pcie_match[] = { + { .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 }, + { .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 }, ++ { .compatible = "qcom,pcie-ipq8064-v2", .data = &ops_2_1_0 }, + { .compatible = "qcom,pcie-apq8064", .data = &ops_2_1_0 }, + { .compatible = "qcom,pcie-msm8996", .data = &ops_2_3_2 }, + { .compatible = "qcom,pcie-ipq8074", .data = &ops_2_3_3 }, diff --git a/target/linux/ipq806x/patches-5.4/093-8-v5.8-ipq806x-PCI-qcom-Support-pci-speed-set-for-ipq806x.patch b/target/linux/ipq806x/patches-5.4/093-8-v5.8-ipq806x-PCI-qcom-Support-pci-speed-set-for-ipq806x.patch new file mode 100644 index 0000000000..9f60f14619 --- /dev/null +++ b/target/linux/ipq806x/patches-5.4/093-8-v5.8-ipq806x-PCI-qcom-Support-pci-speed-set-for-ipq806x.patch @@ -0,0 +1,74 @@ +From 51ed2c2b60265006bde7531d10993cf24def0aee Mon Sep 17 00:00:00 2001 +From: Sham Muthayyan +Date: Mon, 15 Jun 2020 23:06:07 +0200 +Subject: PCI: qcom: Support pci speed set for ipq806x + +Some SoC based on ipq8064/5 needs to be limited to pci GEN1 speed due to +some hardware limitations. Add support for speed setting defined by the +max-link-speed binding. If not defined the max speed is set to GEN2 by +default. + +Link: https://lore.kernel.org/r/20200615210608.21469-12-ansuelsmth@gmail.com +Signed-off-by: Sham Muthayyan +Signed-off-by: Ansuel Smith +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Rob Herring +Acked-by: Stanimir Varbanov +--- + +Backported with light changes: +* One include is missing in kernel 5.4 + + drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/pci/controller/dwc/pcie-qcom.c ++++ b/drivers/pci/controller/dwc/pcie-qcom.c +@@ -27,6 +27,7 @@ + #include + #include + ++#include "../../pci.h" + #include "pcie-designware.h" + + #define PCIE20_PARF_SYS_CTRL 0x00 +@@ -98,6 +99,8 @@ + #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358 + #define SLV_ADDR_SPACE_SZ 0x10000000 + ++#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xa0 ++ + #define QCOM_PCIE_2_1_0_MAX_SUPPLY 3 + #define QCOM_PCIE_2_1_0_MAX_CLOCKS 5 + struct qcom_pcie_resources_2_1_0 { +@@ -184,6 +187,7 @@ struct qcom_pcie { + struct phy *phy; + struct gpio_desc *reset; + const struct qcom_pcie_ops *ops; ++ int gen; + }; + + #define to_qcom_pcie(x) dev_get_drvdata((x)->dev) +@@ -384,6 +388,11 @@ static int qcom_pcie_init_2_1_0(struct q + /* wait for clock acquisition */ + usleep_range(1000, 1500); + ++ if (pcie->gen == 1) { ++ val = readl(pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2); ++ val |= PCI_EXP_LNKSTA_CLS_2_5GB; ++ writel(val, pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2); ++ } + + /* Set the Max TLP size to 2K, instead of using default of 4K */ + writel(CFG_REMOTE_RD_REQ_BRIDGE_SIZE_2K, +@@ -1248,6 +1257,10 @@ static int qcom_pcie_probe(struct platfo + goto err_pm_runtime_put; + } + ++ pcie->gen = of_pci_get_max_link_speed(pdev->dev.of_node); ++ if (pcie->gen < 0) ++ pcie->gen = 2; ++ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf"); + pcie->parf = devm_ioremap_resource(dev, res); + if (IS_ERR(pcie->parf)) { diff --git a/target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch b/target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch index 23839a36cd..f062276254 100644 --- a/target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch +++ b/target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch @@ -30,7 +30,7 @@ Signed-off-by: Horia Geantă --- a/drivers/crypto/caam/caamalg.c +++ b/drivers/crypto/caam/caamalg.c -@@ -3542,13 +3542,14 @@ int caam_algapi_init(struct device *ctrl +@@ -3520,13 +3520,14 @@ int caam_algapi_init(struct device *ctrl * First, detect presence and attributes of DES, AES, and MD blocks. */ if (priv->era < 10) { @@ -47,7 +47,7 @@ Signed-off-by: Horia Geantă des_inst = (cha_inst & CHA_ID_LS_DES_MASK) >> CHA_ID_LS_DES_SHIFT; aes_inst = cha_inst & CHA_ID_LS_AES_MASK; -@@ -3558,24 +3559,24 @@ int caam_algapi_init(struct device *ctrl +@@ -3534,23 +3535,23 @@ int caam_algapi_init(struct device *ctrl ccha_inst = 0; ptha_inst = 0; @@ -73,10 +73,8 @@ Signed-off-by: Horia Geantă md_inst = mdha & CHA_VER_NUM_MASK; - ccha_inst = rd_reg32(&priv->ctrl->vreg.ccha) & CHA_VER_NUM_MASK; - ptha_inst = rd_reg32(&priv->ctrl->vreg.ptha) & CHA_VER_NUM_MASK; -- arc4_inst = rd_reg32(&priv->ctrl->vreg.afha) & CHA_VER_NUM_MASK; + ccha_inst = rd_reg32(&vreg->ccha) & CHA_VER_NUM_MASK; + ptha_inst = rd_reg32(&vreg->ptha) & CHA_VER_NUM_MASK; -+ arc4_inst = rd_reg32(&vreg->afha) & CHA_VER_NUM_MASK; gcm_support = aesa & CHA_VER_MISC_AES_GCM; } diff --git a/target/linux/layerscape/patches-5.4/804-crypto-0022-MLK-19801-2-crypto-caam-add-support-of-tagged-keys-i.patch b/target/linux/layerscape/patches-5.4/804-crypto-0022-MLK-19801-2-crypto-caam-add-support-of-tagged-keys-i.patch index cf982f8a58..81f2010aba 100644 --- a/target/linux/layerscape/patches-5.4/804-crypto-0022-MLK-19801-2-crypto-caam-add-support-of-tagged-keys-i.patch +++ b/target/linux/layerscape/patches-5.4/804-crypto-0022-MLK-19801-2-crypto-caam-add-support-of-tagged-keys-i.patch @@ -127,8 +127,8 @@ Signed-off-by: Horia Geantă /* skcipher_encrypt shared descriptor */ desc = ctx->sh_desc_enc; cnstr_shdsc_skcipher_encap(desc, &ctx->cdata, ivsize, is_rfc3686, -@@ -824,6 +867,14 @@ static int arc4_skcipher_setkey(struct c - return skcipher_setkey(skcipher, key, keylen, 0); +@@ -818,6 +861,14 @@ static int ctr_skcipher_setkey(struct cr + return skcipher_setkey(skcipher, key, keylen, ctx1_iv_off); } +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_TK_API @@ -142,7 +142,7 @@ Signed-off-by: Horia Geantă static int des_skcipher_setkey(struct crypto_skcipher *skcipher, const u8 *key, unsigned int keylen) { -@@ -1924,6 +1975,25 @@ static struct caam_skcipher_alg driver_a +@@ -1918,6 +1969,25 @@ static struct caam_skcipher_alg driver_a }, .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, }, @@ -168,7 +168,7 @@ Signed-off-by: Horia Geantă { .skcipher = { .base = { -@@ -2043,6 +2113,24 @@ static struct caam_skcipher_alg driver_a +@@ -2037,6 +2107,24 @@ static struct caam_skcipher_alg driver_a }, .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_ECB, }, @@ -193,7 +193,7 @@ Signed-off-by: Horia Geantă { .skcipher = { .base = { -@@ -3507,7 +3595,8 @@ static void caam_skcipher_alg_init(struc +@@ -3486,7 +3574,8 @@ static void caam_skcipher_alg_init(struc struct skcipher_alg *alg = &t_alg->skcipher; alg->base.cra_module = THIS_MODULE; diff --git a/target/linux/malta/config-5.4 b/target/linux/malta/config-5.4 index 2b678cead6..29566ee171 100644 --- a/target/linux/malta/config-5.4 +++ b/target/linux/malta/config-5.4 @@ -340,5 +340,4 @@ CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_VXFS_FS=y -CONFIG_WATCHDOG_CORE=y CONFIG_XPS=y diff --git a/target/linux/mvebu/patches-5.4/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch b/target/linux/mvebu/patches-5.4/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch index 1a608f2b6a..7b112eb8ad 100644 --- a/target/linux/mvebu/patches-5.4/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch +++ b/target/linux/mvebu/patches-5.4/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch @@ -15,7 +15,7 @@ Signed-off-by: Tomasz Maciej Nowak --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -137,7 +137,7 @@ +@@ -143,7 +143,7 @@ dsa,member = <0 0>; diff --git a/target/linux/mvebu/patches-5.4/523-arm64-dts-marvell-espressobin-remove-COMPHY-nodes-as.patch b/target/linux/mvebu/patches-5.4/523-arm64-dts-marvell-espressobin-remove-COMPHY-nodes-as.patch index 75c4688c75..dd7a9b2cd1 100644 --- a/target/linux/mvebu/patches-5.4/523-arm64-dts-marvell-espressobin-remove-COMPHY-nodes-as.patch +++ b/target/linux/mvebu/patches-5.4/523-arm64-dts-marvell-espressobin-remove-COMPHY-nodes-as.patch @@ -24,7 +24,7 @@ Signed-off-by: Tomasz Maciej Nowak --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -54,8 +54,6 @@ +@@ -60,8 +60,6 @@ /* J6 */ &sata { status = "okay"; @@ -33,7 +33,7 @@ Signed-off-by: Tomasz Maciej Nowak }; /* J1 */ -@@ -121,11 +119,17 @@ +@@ -127,11 +125,17 @@ /* J7 */ &usb3 { status = "okay"; diff --git a/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch b/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch index 200baec643..833604ae55 100644 --- a/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch +++ b/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch @@ -22,7 +22,7 @@ Signed-off-by: Tim Harvey #include #include #include -@@ -5619,3 +5620,34 @@ static void apex_pci_fixup_class(struct +@@ -5622,3 +5623,34 @@ static void apex_pci_fixup_class(struct } DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); diff --git a/target/linux/x86/geode/config-4.19 b/target/linux/x86/geode/config-4.19 index 316111aa0e..651c369178 100644 --- a/target/linux/x86/geode/config-4.19 +++ b/target/linux/x86/geode/config-4.19 @@ -121,7 +121,6 @@ CONFIG_VGACON_SOFT_SCROLLBACK=y CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 CONFIG_VIA_RHINE=y CONFIG_VIA_RHINE_MMIO=y -CONFIG_WATCHDOG_CORE=y # CONFIG_WDT is not set # CONFIG_X86_ACPI_CPUFREQ is not set # CONFIG_X86_AMD_PLATFORM_DEVICE is not set diff --git a/target/linux/x86/geode/config-5.4 b/target/linux/x86/geode/config-5.4 index 316111aa0e..651c369178 100644 --- a/target/linux/x86/geode/config-5.4 +++ b/target/linux/x86/geode/config-5.4 @@ -121,7 +121,6 @@ CONFIG_VGACON_SOFT_SCROLLBACK=y CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 CONFIG_VIA_RHINE=y CONFIG_VIA_RHINE_MMIO=y -CONFIG_WATCHDOG_CORE=y # CONFIG_WDT is not set # CONFIG_X86_ACPI_CPUFREQ is not set # CONFIG_X86_AMD_PLATFORM_DEVICE is not set diff --git a/target/linux/x86/legacy/config-4.19 b/target/linux/x86/legacy/config-4.19 index c1cd353114..2e5199185a 100644 --- a/target/linux/x86/legacy/config-4.19 +++ b/target/linux/x86/legacy/config-4.19 @@ -206,7 +206,6 @@ CONFIG_USB_STORAGE=y CONFIG_VGACON_SOFT_SCROLLBACK=y # CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -CONFIG_WATCHDOG_CORE=y # CONFIG_WDT is not set CONFIG_X86_ACPI_CPUFREQ=y # CONFIG_X86_ACPI_CPUFREQ_CPB is not set diff --git a/target/linux/x86/legacy/config-5.4 b/target/linux/x86/legacy/config-5.4 index c1cd353114..2e5199185a 100644 --- a/target/linux/x86/legacy/config-5.4 +++ b/target/linux/x86/legacy/config-5.4 @@ -206,7 +206,6 @@ CONFIG_USB_STORAGE=y CONFIG_VGACON_SOFT_SCROLLBACK=y # CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -CONFIG_WATCHDOG_CORE=y # CONFIG_WDT is not set CONFIG_X86_ACPI_CPUFREQ=y # CONFIG_X86_ACPI_CPUFREQ_CPB is not set diff --git a/toolchain/uClibc/common.mk b/toolchain/uClibc/common.mk index a79a838be4..bb093b1dc7 100644 --- a/toolchain/uClibc/common.mk +++ b/toolchain/uClibc/common.mk @@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/target.mk -PKG_VERSION:=1.0.31 +PKG_VERSION:=1.0.34 PKG_RELEASE:=1 PKG_NAME:=uClibc-ng @@ -17,7 +17,7 @@ CONFIG_DIR:=$(PATH_PREFIX)/config PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz LIBC_SO_VERSION:=$(PKG_VERSION) -PKG_HASH:=2215d7377118434d1697fd575f10d7a6be3f29e460d6b0e1ee9f6f5306288060 +PKG_HASH:=e6776229eee8d3f5a1cd29fb4286630e3cb9e97dded4e8f4a3a9bb4fa8c0d5e3 HOST_BUILD_DIR:=$(BUILD_DIR_TOOLCHAIN)/$(PKG_NAME)-$(PKG_VERSION) diff --git a/toolchain/uClibc/config/arc b/toolchain/uClibc/config/arc index de1ffc4415..f92328b7ed 100644 --- a/toolchain/uClibc/config/arc +++ b/toolchain/uClibc/config/arc @@ -3,8 +3,6 @@ ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y TARGET_ARCH="arc" TARGET_arc=y -CONFIG_ARC_CPU_700=y -# CONFIG_ARC_CPU_HS is not set CONFIG_ARC_PAGE_SIZE_8K=y # CONFIG_ARC_PAGE_SIZE_16K is not set # CONFIG_ARC_PAGE_SIZE_4K is not set diff --git a/toolchain/uClibc/config/archs b/toolchain/uClibc/config/archs index 961628ed8c..f92328b7ed 100644 --- a/toolchain/uClibc/config/archs +++ b/toolchain/uClibc/config/archs @@ -3,8 +3,6 @@ ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y TARGET_ARCH="arc" TARGET_arc=y -# CONFIG_ARC_CPU_700 is not set -CONFIG_ARC_CPU_HS=y CONFIG_ARC_PAGE_SIZE_8K=y # CONFIG_ARC_PAGE_SIZE_16K is not set # CONFIG_ARC_PAGE_SIZE_4K is not set diff --git a/toolchain/uClibc/config/arm b/toolchain/uClibc/config/arm index 41a60b1c38..9544f144d1 100644 --- a/toolchain/uClibc/config/arm +++ b/toolchain/uClibc/config/arm @@ -1,9 +1,7 @@ ARCH_ANY_ENDIAN=y ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y -# COMPILE_IN_THUMB_MODE is not set TARGET_ARCH="arm" TARGET_arm=y -# USE_BX is not set CONFIG_ARM_EABI=y diff --git a/toolchain/uClibc/config/armeb b/toolchain/uClibc/config/armeb index 2e46dd67d9..e329c7e369 100644 --- a/toolchain/uClibc/config/armeb +++ b/toolchain/uClibc/config/armeb @@ -1,9 +1,7 @@ ARCH_ANY_ENDIAN=y ARCH_BIG_ENDIAN=y ARCH_WANTS_BIG_ENDIAN=y -# COMPILE_IN_THUMB_MODE is not set TARGET_ARCH="arm" TARGET_arm=y -# USE_BX is not set CONFIG_ARM_EABI=y diff --git a/toolchain/uClibc/config/common b/toolchain/uClibc/config/common index b679c0a1ec..d88d5bf473 100644 --- a/toolchain/uClibc/config/common +++ b/toolchain/uClibc/config/common @@ -7,13 +7,11 @@ ARCH_USE_MMU=y # ARCH_WANTS_BIG_ENDIAN is not set # ARCH_WANTS_LITTLE_ENDIAN is not set ASSUME_DEVPTS=y -# COMPAT_ATEXIT is not set CROSS_COMPILER_PREFIX="" DEVEL_PREFIX="/usr/" # DOASSERTS is not set # DODEBUG is not set # DODEBUG_PT is not set -# DOMULTI is not set DOPIC=y DOSTRIP=y DO_C99_MATH=y @@ -33,7 +31,6 @@ LDSO_CACHE_SUPPORT=y # LDSO_GNU_HASH_SUPPORT is not set LDSO_LD_LIBRARY_PATH=y LDSO_LDD_SUPPORT=y -# LDSO_NO_CLEANUP is not set # LDSO_PRELINK_SUPPORT is not set # LDSO_PRELOAD_FILE_SUPPORT is not set LDSO_PRELOAD_ENV_SUPPORT=y @@ -42,12 +39,9 @@ LDSO_SAFE_RUNPATH=y # LDSO_RUNPATH_OF_EXECUTABLE is not set # LDSO_SEARCH_INTERP_PATH is not set # LDSO_STANDALONE_SUPPORT is not set -# LINUXTHREADS_NEW is not set -# LINUXTHREADS_OLD is not set # UCLIBC_HAS_BACKTRACE is not set UCLIBC_HAS_THREADS_NATIVE=y # MALLOC is not set -MALLOC_GLIBC_COMPAT=y # MALLOC_SIMPLE is not set MALLOC_STANDARD=y MULTILIB_DIR="lib" @@ -63,12 +57,10 @@ TARGET_SUBARCH="" # TARGET_bfin is not set # TARGET_c6x is not set # TARGET_cris is not set -# TARGET_e1 is not set # TARGET_frv is not set # TARGET_h8300 is not set # TARGET_hppa is not set # TARGET_i386 is not set -# TARGET_i960 is not set # TARGET_ia64 is not set # TARGET_lm32 is not set # TARGET_m68k is not set @@ -80,10 +72,7 @@ TARGET_SUBARCH="" # TARGET_or1k is not set # TARGET_powerpc is not set # TARGET_sh is not set -# TARGET_sh64 is not set # TARGET_sparc is not set -# TARGET_v850 is not set -# TARGET_vax is not set # TARGET_x86_64 is not set # TARGET_xtensa is not set UCLIBC_BSD_SPECIFIC=y @@ -96,10 +85,9 @@ UCLIBC_DYNAMIC_ATEXIT=y UCLIBC_EXTRA_CFLAGS="" UCLIBC_GRP_BUFFER_SIZE=256 UCLIBC_HAS_ADVANCED_REALTIME=y -# UCLIBC_HAS_ARC4RANDOM is not set # UCLIBC_HAS_ARGP is not set UCLIBC_HAS_BSD_ERR=y -UCLIBC_HAS_BSD_RES_CLOSE=y +# UCLIBC_HAS_BSD_RES_CLOSE is not set # UCLIBC_HAS_COMPAT_RES_STATE is not set UCLIBC_HAS_CRYPT=y UCLIBC_HAS_CRYPT_IMPL=y @@ -114,14 +102,12 @@ UCLIBC_HAS_ERRNO_MESSAGES=y # UCLIBC_HAS_FENV is not set UCLIBC_HAS_FLOATS=y UCLIBC_HAS_FNMATCH=y -UCLIBC_HAS_FNMATCH_OLD=y # UCLIBC_HAS_FOPEN_CLOSEEXEC_MODE is not set UCLIBC_HAS_FOPEN_EXCLUSIVE_MODE=y # UCLIBC_HAS_FOPEN_LARGEFILE_MODE is not set # UCLIBC_HAS_FPU is not set UCLIBC_HAS_FTS=y -UCLIBC_HAS_FTW=y -# UCLIBC_HAS_FULL_RPC is not set +# UCLIBC_HAS_FTW is not set UCLIBC_HAS_GETPT=y UCLIBC_HAS_GLIBC_CUSTOM_PRINTF=y UCLIBC_HAS_GLIBC_CUSTOM_STREAMS=y @@ -135,29 +121,22 @@ UCLIBC_HAS_HEXADECIMAL_FLOATS=y UCLIBC_HAS_IPV4=y UCLIBC_HAS_IPV6=y UCLIBC_HAS_LFS=y -UCLIBC_HAS_LIBNSL_STUB=y -UCLIBC_HAS_LIBRESOLV_STUB=y UCLIBC_HAS_LIBUTIL=y # UCLIBC_HAS_LOCALE is not set # UCLIBC_BUILD_ALL_LOCALE is not set # UCLIBC_BUILD_MINIMAL_LOCALE is not set -# UCLIBC_PREGENERATED_LOCALE_DATA is not set UCLIBC_HAS_LONG_DOUBLE_MATH=y UCLIBC_HAS_NETWORK_SUPPORT=y UCLIBC_HAS_NFTW=y -UCLIBC_HAS_OBSOLETE_BSD_SIGNAL=y +# UCLIBC_HAS_OBSOLETE_BSD_SIGNAL is not set # UCLIBC_HAS_OBSOLETE_SYSV_SIGNAL is not set UCLIBC_HAS_PRINTF_M_SPEC=y # UCLIBC_HAS_PROFILING is not set UCLIBC_HAS_PROGRAM_INVOCATION_NAME=y UCLIBC_HAS_PTY=y UCLIBC_HAS_REALTIME=y -# UCLIBC_HAS_REENTRANT_RPC is not set UCLIBC_HAS_REGEX=y -UCLIBC_HAS_REGEX_OLD=y UCLIBC_HAS_RESOLVER_SUPPORT=y -# UCLIBC_HAS_RPC is not set -UCLIBC_HAS_SCANF_GLIBC_A_FLAG=y # UCLIBC_HAS_SHA256_CRYPT_IMPL is not set # UCLIBC_HAS_SHA512_CRYPT_IMPL is not set UCLIBC_HAS_SHADOW=y @@ -165,7 +144,6 @@ UCLIBC_HAS_SIGNUM_MESSAGES=y UCLIBC_HAS_SOCKET=y UCLIBC_HAS_SOFT_FLOAT=y # UCLIBC_HAS_SSP is not set -# UCLIBC_HAS_SSP_COMPAT is not set UCLIBC_HAS_STDIO_AUTO_RW_TRANSITION=y # UCLIBC_HAS_STDIO_BUFSIZ_1024 is not set # UCLIBC_HAS_STDIO_BUFSIZ_2048 is not set @@ -198,11 +176,8 @@ UCLIBC_HAS_WORDEXP=y UCLIBC_HAS_XATTR=y # UCLIBC_HAS_XLOCALE is not set UCLIBC_HAS___PROGNAME=y -# UCLIBC_LINUX_MODULE_24 is not set -UCLIBC_LINUX_MODULE_26=y UCLIBC_LINUX_SPECIFIC=y # UCLIBC_MALLOC_DEBUGGING is not set -# UCLIBC_MJN3_ONLY is not set # UCLIBC_NTP_LEGACY is not set # USE_OLD_VFPRINTF is not set UCLIBC_PRINTF_SCANF_POSITIONAL_ARGS=9 @@ -211,16 +186,14 @@ UCLIBC_PWD_BUFFER_SIZE=256 # UCLIBC_STRICT_HEADERS is not set UCLIBC_SUPPORT_AI_ADDRCONFIG=y UCLIBC_SUSV3_LEGACY=y -UCLIBC_SUSV3_LEGACY_MACROS=y +# UCLIBC_SUSV3_LEGACY_MACROS is not set UCLIBC_SUSV4_LEGACY=y # UCLIBC_SV4_DEPRECATED is not set UCLIBC_TZ_FILE_PATH="/etc/TZ" # UCLIBC_FALLBACK_TO_ETC_LOCALTIME is not set UCLIBC_USE_NETLINK=y # UNIX98PTY_ONLY is not set -USE_BX=y WARNINGS="-Wall" -# UCLIBC_HAS_OBSTACK is not set # UCLIBC_SUSV2_LEGACY is not set # UCLIBC_HAS_CONTEXT_FUNCS is not set UCLIBC_HAS_GETOPT_LONG=y diff --git a/toolchain/uClibc/config/i386 b/toolchain/uClibc/config/i386 index 5ef264c271..cddb709630 100644 --- a/toolchain/uClibc/config/i386 +++ b/toolchain/uClibc/config/i386 @@ -2,20 +2,7 @@ ARCH_LITTLE_ENDIAN=y # CONFIG_386 is not set CONFIG_486=y # CONFIG_586 is not set -# CONFIG_586MMX is not set # CONFIG_686 is not set -# CONFIG_CRUSOE is not set -# CONFIG_CYRIXIII is not set -# CONFIG_ELAN is not set -# CONFIG_GENERIC_386 is not set -# CONFIG_K6 is not set -# CONFIG_K7 is not set -# CONFIG_NEHEMIAH is not set -# CONFIG_PENTIUM4 is not set -# CONFIG_PENTIUMII is not set -# CONFIG_PENTIUMIII is not set -# CONFIG_WINCHIP2 is not set -# CONFIG_WINCHIPC6 is not set TARGET_ARCH="i386" TARGET_i386=y UCLIBC_HAS_FPU=y diff --git a/toolchain/uClibc/config/i686 b/toolchain/uClibc/config/i686 index ba615f6b86..8a25f41e23 100644 --- a/toolchain/uClibc/config/i686 +++ b/toolchain/uClibc/config/i686 @@ -2,20 +2,7 @@ ARCH_LITTLE_ENDIAN=y # CONFIG_386 is not set # CONFIG_486 is not set # CONFIG_586 is not set -# CONFIG_586MMX is not set CONFIG_686=y -# CONFIG_CRUSOE is not set -# CONFIG_CYRIXIII is not set -# CONFIG_ELAN is not set -# CONFIG_GENERIC_386 is not set -# CONFIG_K6 is not set -# CONFIG_K7 is not set -# CONFIG_NEHEMIAH is not set -# CONFIG_PENTIUM4 is not set -# CONFIG_PENTIUMII is not set -# CONFIG_PENTIUMIII is not set -# CONFIG_WINCHIP2 is not set -# CONFIG_WINCHIPC6 is not set TARGET_ARCH="i386" TARGET_i386=y UCLIBC_HAS_FPU=y diff --git a/toolchain/uClibc/config/m68k b/toolchain/uClibc/config/m68k index 14ce5aef7b..0675bb9080 100644 --- a/toolchain/uClibc/config/m68k +++ b/toolchain/uClibc/config/m68k @@ -1,5 +1,4 @@ ARCH_BIG_ENDIAN=y -LINUXTHREADS_OLD=y TARGET_ARCH="m68k" TARGET_SUBARCH="" TARGET_m68k=y diff --git a/toolchain/uClibc/config/mips b/toolchain/uClibc/config/mips index 8cec22f4de..c8f71f03c9 100644 --- a/toolchain/uClibc/config/mips +++ b/toolchain/uClibc/config/mips @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_BIG_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_WANTS_BIG_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -CONFIG_MIPS_ISA_MIPS32=y -# CONFIG_MIPS_ISA_MIPS32R2 is not set -# CONFIG_MIPS_ISA_MIPS64 is not set -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set # CONFIG_MIPS_N64_ABI is not set CONFIG_MIPS_O32_ABI=y diff --git a/toolchain/uClibc/config/mips64 b/toolchain/uClibc/config/mips64 index 566d87a6e4..453293def3 100644 --- a/toolchain/uClibc/config/mips64 +++ b/toolchain/uClibc/config/mips64 @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_BIG_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_WANTS_BIG_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set CONFIG_MIPS_N64_ABI=y # CONFIG_MIPS_O32_ABI is not set diff --git a/toolchain/uClibc/config/mips64.32 b/toolchain/uClibc/config/mips64.32 index b7ea8f457e..4e98968633 100644 --- a/toolchain/uClibc/config/mips64.32 +++ b/toolchain/uClibc/config/mips64.32 @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_BIG_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_WANTS_BIG_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set # CONFIG_MIPS_N64_ABI is not set CONFIG_MIPS_O32_ABI=y diff --git a/toolchain/uClibc/config/mips64.64 b/toolchain/uClibc/config/mips64.64 index 2a0b755a73..bf4ecca704 100644 --- a/toolchain/uClibc/config/mips64.64 +++ b/toolchain/uClibc/config/mips64.64 @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_BIG_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_WANTS_BIG_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set CONFIG_MIPS_N64_ABI=y # CONFIG_MIPS_O32_ABI is not set diff --git a/toolchain/uClibc/config/mips64.n32 b/toolchain/uClibc/config/mips64.n32 index f8def5837f..c26ecec4c2 100644 --- a/toolchain/uClibc/config/mips64.n32 +++ b/toolchain/uClibc/config/mips64.n32 @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_BIG_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_WANTS_BIG_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set CONFIG_MIPS_N32_ABI=y # CONFIG_MIPS_N64_ABI is not set # CONFIG_MIPS_O32_ABI is not set diff --git a/toolchain/uClibc/config/mips64el b/toolchain/uClibc/config/mips64el index 53580787b5..98d9bb4569 100644 --- a/toolchain/uClibc/config/mips64el +++ b/toolchain/uClibc/config/mips64el @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set CONFIG_MIPS_N64_ABI=y # CONFIG_MIPS_O32_ABI is not set diff --git a/toolchain/uClibc/config/mips64el.32 b/toolchain/uClibc/config/mips64el.32 index a10840bf96..03ab17c24f 100644 --- a/toolchain/uClibc/config/mips64el.32 +++ b/toolchain/uClibc/config/mips64el.32 @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set # CONFIG_MIPS_N64_ABI is not set CONFIG_MIPS_O32_ABI=y diff --git a/toolchain/uClibc/config/mips64el.64 b/toolchain/uClibc/config/mips64el.64 index 8b90a54a57..884640c756 100644 --- a/toolchain/uClibc/config/mips64el.64 +++ b/toolchain/uClibc/config/mips64el.64 @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set CONFIG_MIPS_N64_ABI=y # CONFIG_MIPS_O32_ABI is not set diff --git a/toolchain/uClibc/config/mips64el.n32 b/toolchain/uClibc/config/mips64el.n32 index 4ac4d06c0d..9a8bb3d3fb 100644 --- a/toolchain/uClibc/config/mips64el.n32 +++ b/toolchain/uClibc/config/mips64el.n32 @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -CONFIG_MIPS_ISA_MIPS64=y -# CONFIG_MIPS_ISA_MIPS64R2 is not set CONFIG_MIPS_N32_ABI=y # CONFIG_MIPS_N64_ABI is not set # CONFIG_MIPS_O32_ABI is not set diff --git a/toolchain/uClibc/config/mipsel b/toolchain/uClibc/config/mipsel index d9dedbb02c..2a79c16bdb 100644 --- a/toolchain/uClibc/config/mipsel +++ b/toolchain/uClibc/config/mipsel @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -# CONFIG_MIPS_ISA_3 is not set -# CONFIG_MIPS_ISA_4 is not set -CONFIG_MIPS_ISA_MIPS32=y -# CONFIG_MIPS_ISA_MIPS32R2 is not set -# CONFIG_MIPS_ISA_MIPS64 is not set -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set # CONFIG_MIPS_N64_ABI is not set CONFIG_MIPS_O32_ABI=y diff --git a/toolchain/uClibc/config/mipsel.cobalt b/toolchain/uClibc/config/mipsel.cobalt index 1d42a70f23..2a79c16bdb 100644 --- a/toolchain/uClibc/config/mipsel.cobalt +++ b/toolchain/uClibc/config/mipsel.cobalt @@ -2,14 +2,6 @@ ARCH_ANY_ENDIAN=y ARCH_CFLAGS="-mno-split-addresses" ARCH_LITTLE_ENDIAN=y ARCH_WANTS_LITTLE_ENDIAN=y -# CONFIG_MIPS_ISA_1 is not set -# CONFIG_MIPS_ISA_2 is not set -CONFIG_MIPS_ISA_3=y -# CONFIG_MIPS_ISA_4 is not set -# CONFIG_MIPS_ISA_MIPS32 is not set -# CONFIG_MIPS_ISA_MIPS32R2 is not set -# CONFIG_MIPS_ISA_MIPS64 is not set -# CONFIG_MIPS_ISA_MIPS64R2 is not set # CONFIG_MIPS_N32_ABI is not set # CONFIG_MIPS_N64_ABI is not set CONFIG_MIPS_O32_ABI=y diff --git a/toolchain/uClibc/config/sparc b/toolchain/uClibc/config/sparc index e1596c4100..3630b24a7e 100644 --- a/toolchain/uClibc/config/sparc +++ b/toolchain/uClibc/config/sparc @@ -1,8 +1,6 @@ ARCH_BIG_ENDIAN=y # CONFIG_SPARC_V7 is not set # CONFIG_SPARC_V8 is not set -CONFIG_SPARC_V9=y -# CONFIG_SPARC_V9B is not set TARGET_ARCH="sparc" TARGET_sparc=y UCLIBC_HAS_LONG_DOUBLE_MATH=y diff --git a/toolchain/uClibc/config/sparc.leon b/toolchain/uClibc/config/sparc.leon index eb725ac05d..3deb5148d9 100644 --- a/toolchain/uClibc/config/sparc.leon +++ b/toolchain/uClibc/config/sparc.leon @@ -1,8 +1,6 @@ ARCH_BIG_ENDIAN=y # CONFIG_SPARC_V7 is not set CONFIG_SPARC_V8=y -# CONFIG_SPARC_V9 is not set -# CONFIG_SPARC_V9B is not set TARGET_ARCH="sparc" TARGET_sparc=y UCLIBC_HAS_LONG_DOUBLE_MATH=y diff --git a/toolchain/uClibc/config/x86_64 b/toolchain/uClibc/config/x86_64 index b6dc2c2afe..a13d659ba1 100644 --- a/toolchain/uClibc/config/x86_64 +++ b/toolchain/uClibc/config/x86_64 @@ -1,5 +1,4 @@ ARCH_LITTLE_ENDIAN=y -# LINUXTHREADS_NEW is not set TARGET_ARCH="x86_64" TARGET_x86_64=y UCLIBC_BSD_SPECIFIC=y