Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-10-08 20:31:46 +08:00
commit a6d19f0932
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
69 changed files with 945 additions and 1017 deletions

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@ -89,6 +89,7 @@ define Build/Configure/Default
CXXFLAGS="$(TARGET_CXXFLAGS) $(EXTRA_CXXFLAGS)" \
LDFLAGS="$(TARGET_LDFLAGS) $(EXTRA_LDFLAGS)" \
cmake \
--no-warn-unused-cli \
-DCMAKE_SYSTEM_NAME=Linux \
-DCMAKE_SYSTEM_VERSION=1 \
-DCMAKE_SYSTEM_PROCESSOR=$(ARCH) \
@ -141,6 +142,7 @@ define Host/Configure/Default
CXXFLAGS="$(HOST_CFLAGS)" \
LDFLAGS="$(HOST_LDFLAGS)" \
cmake \
--no-warn-unused-cli \
-DCMAKE_BUILD_TYPE=Release \
-DCMAKE_C_COMPILER_LAUNCHER="$(CMAKE_C_COMPILER_LAUNCHER)" \
-DCMAKE_C_COMPILER="$(CMAKE_HOST_C_COMPILER)" \

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@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .132
LINUX_KERNEL_HASH-5.15.132 = 4177b5c4d6e749bb8339ac4aa68eb0932ead9490b956a80d9a597089959618ac
LINUX_VERSION-5.15 = .134
LINUX_KERNEL_HASH-5.15.134 = f37182aecb57ed6853d01e1074d3a60a653331e35f3115728381e08be050b9d3

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@ -1,2 +1,2 @@
LINUX_VERSION-6.1 = .55
LINUX_KERNEL_HASH-6.1.55 = a87e241ec15d53452c4efe219713a3769d88cc436b5b98cf6efb262c4aff15c0
LINUX_VERSION-6.1 = .56
LINUX_KERNEL_HASH-6.1.56 = 9edefdde32c2298389dcd19566402332b3c2016f5ada17e5820f500b908d478c

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@ -34,8 +34,8 @@ endif
ifneq ($(if $(DUMP),1,$(__quilt_inc)),1)
__quilt_inc:=1
PATCH_DIR?=./patches
FILES_DIR?=./files
PATCH_DIR?=$(CURDIR)/patches
FILES_DIR?=$(CURDIR)/files
HOST_PATCH_DIR?=$(PATCH_DIR)
HOST_FILES_DIR?=$(FILES_DIR)
@ -106,13 +106,14 @@ define Kernel/Patch/Default
endef
define Quilt/RefreshDir
mkdir -p $(2)
-rm -f $(2)/* 2>/dev/null >/dev/null
@( \
-rm -rf $(2) 2>/dev/null >/dev/null
[ -f $(1)/.quilt_no_patch ] || mkdir -p $(2)
@[ -f $(1)/.quilt_no_patch ] || { \
for patch in $$$$($(if $(3),grep "^$(3)",cat) $(1)/patches/series | awk '{print $$$$1}'); do \
$(CP) -v "$(1)/patches/$$$$patch" $(2); \
done; \
)
}
@-rm -f $(1)/.quilt_no_patch 2>/dev/null >/dev/null;
endef
define Quilt/Refresh/Host
@ -156,7 +157,7 @@ define Quilt/Template
}
@[ -f "$(1)/patches/series" ] || { \
echo "The source directory contains no quilt patches."; \
false; \
touch $(1)/patches/series $(1)/.quilt_no_patch; \
}
@[ -n "$$$$(ls $(1)/patches/series)" -o \
"$$$$(cat $(1)/patches/series | $(MKHASH) md5)" = "$$(sort $(1)/patches/series | $(MKHASH) md5)" ] || { \
@ -165,10 +166,12 @@ define Quilt/Template
}
$(3)refresh: $(3)quilt-check
@cd "$(1)"; $(QUILT_CMD) pop -a -f >/dev/null 2>/dev/null
@cd "$(1)"; while $(QUILT_CMD) next 2>/dev/null >/dev/null && $(QUILT_CMD) push; do \
QUILT_DIFF_OPTS="-p" $(QUILT_CMD) refresh -p ab --no-index --no-timestamps; \
done; ! $(QUILT_CMD) next 2>/dev/null >/dev/null
@[ -f $(1)/.quilt_no_patch ] || { \
cd "$(1)"; $(QUILT_CMD) pop -a -f >/dev/null 2>/dev/null; \
while $(QUILT_CMD) next 2>/dev/null >/dev/null && $(QUILT_CMD) push; do \
QUILT_DIFF_OPTS="-p" $(QUILT_CMD) refresh -p ab --no-index --no-timestamps; \
done; ! $(QUILT_CMD) next 2>/dev/null >/dev/null; \
}
$(Quilt/Refresh/$(4))
$(3)update: $(3)quilt-check

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@ -38,6 +38,10 @@ askey,rt4230w-rev6)
edgecore,ecw5410)
ubootenv_add_uci_config "/dev/mtd11" "0x0" "0x10000" "0x10000"
;;
extreme,ap3935)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x10000" "0x10000"
;;
linksys,ea7500-v1|\
linksys,ea8500)
ubootenv_add_uci_config "/dev/mtd10" "0x0" "0x20000" "0x20000"

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@ -117,9 +117,23 @@ Do not install it for any other device!
PREV_BOARD+=ipq-wifi-$(1)
endef
# Add board name to ALLWIFIBOARDS
# Place files in this directory as board-<devicename>.<qca4019|qca9888|qca9889|qca9984|qca99x0|ipq8074>
# Add $(eval $(call generate-ipq-wifi-package,<devicename>,<display name>))
# To add local files for testing:
# 1. create a new directory in the ipq-wifi package directory called "files".
# 2. place there the needed board files.
#
# To send a board file upstream:
# 1. create a pull request in https://github.com/openwrt/firmware_qca-wireless or
# send a patch to the mailing list adding the tag firmware/qca-wireless before
# the PATCH tag.
# 2. create a pull request in the main openwrt repository bumping the ipq-wifi
# package to the new version and adding the required lines to add the board file.
#
# Changes needed to the ipq-wifi Makefile:
# 1. Add board name to ALLWIFIBOARDS
# 2. Add $(eval $(call generate-ipq-wifi-package,<devicename>,<display name>))
#
# Board files should follow this name structure:
# board-<devicename>.<qca4019|qca9888|qca9889|qca9984|qca99x0|ipq8074>
$(eval $(call generate-ipq-wifi-package,buffalo_wxr-5950ax12,Buffalo WXR-5950AX12))
$(eval $(call generate-ipq-wifi-package,compex_wpq873,Compex WPQ-873))

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@ -21,6 +21,7 @@ PKG_BUILD_PARALLEL:=1
PKG_LICENSE:=GPL-2.0+
PKG_CPE_ID:=cpe:/a:linux-atm:linux-atm
PKG_FIXUP:=autoreconf
PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk
@ -98,6 +99,8 @@ endef
$(foreach t,$(ATM_DEBUG_TOOLS),$(eval $(call GenAtmPlugin,atm-$(t),$(t))))
TARGET_CFLAGS += -I$(LINUX_DIR)/user_headers/include
define Build/Configure
$(call Build/Configure/Default)
# prevent autoheader invocation

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@ -83,6 +83,8 @@ proto_qmi_setup() {
echo "Waiting for SIM initialization"
local uninitialized_timeout=0
# timeout 3s for first call to avoid hanging uqmi
uqmi -d "$device" --get-pin-status -t 3000 > /dev/null 2>&1
while uqmi -s -d "$device" --get-pin-status | grep '"UIM uninitialized"' > /dev/null; do
[ -e "$device" ] || return 1
if [ "$uninitialized_timeout" -lt "$timeout" -o "$timeout" = "0" ]; then

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@ -5,6 +5,7 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/kempniu/yafut.git
PKG_MIRROR_HASH:=6eece622d1df99ffee1a18d162d36292f32bf2d5e514663a6b61fd82c2ecbcba
PKG_SOURCE_DATE:=2023-03-31
PKG_SOURCE_VERSION:=16435e89d449f953712983315e1a89cdb678620d

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@ -1,42 +0,0 @@
#!/bin/sh
#
# Empty/wrong machtype-workaround generator
#
# Copyright (C) 2006-2012 Imre Kaloz <kaloz@openwrt.org>
# based on linux/arch/arm/boot/compressed/head-xscale.S
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
# NOTE: for now it's for only IXP4xx in big endian mode
# list of supported boards, in "boardname machtypeid" format
for board in "avila 526" "gateway7001 731" "nslu2 597" "nas100d 865" "wg302v1 889" "wg302v2 890" "pronghorn 928" "pronghornmetro 1040" "compex 1273" "wrt300nv2 1077" "loft 849" "dsmg600 964" "fsg3 1091" "ap1000 1543" "tw2662 1658" "tw5334 1664" "ixdpg425 604" "cambria 1468" "sidewinder 1041" "ap42x 4418"
do
set -- $board
hexid=$(printf %x\\n $2)
if [ "$2" -lt "256" ]; then
# we have a low machtypeid, we just need a "mov" (e3a)
printf "\xe3\xa0\x10\x$hexid" > $BIN_DIR/$IMG_PREFIX-$1-zImage
else
# we have a high machtypeid, we need a "mov" (e3a) and an "orr" (e38)
if [ "$2" -lt "4096" ]; then
printf "\xe3\xa0\x10\x$(echo $hexid|cut -b "2 3")\xe3\x81\x1c\x$(echo $hexid|cut -b 1)" > $BIN_DIR/$IMG_PREFIX-$1-zImage
else
printf "\xe3\xa0\x10\x$(echo $hexid|cut -b "3 4")\xe3\x81\x1c\x$(echo $hexid|cut -b "1 2")" > $BIN_DIR/$IMG_PREFIX-$1-zImage
fi
fi
# generate the image
cat $BIN_DIR/$IMG_PREFIX-zImage >> $BIN_DIR/$IMG_PREFIX-$1-zImage
done

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@ -599,6 +599,10 @@ CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RELOCATABLE=y
# CONFIG_RAVB is not set
CONFIG_RCAR_DMAC=y
# CONFIG_RCAR_GEN3_THERMAL is not set

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@ -151,11 +151,6 @@ static int rb4xx_cpld_probe(struct spi_device *spi)
NULL, 0, NULL);
}
static int rb4xx_cpld_remove(struct spi_device *spi)
{
return 0;
}
static const struct of_device_id rb4xx_cpld_dt_match[] = {
{ .compatible = "mikrotik,rb4xx-cpld", },
{ },
@ -164,7 +159,6 @@ MODULE_DEVICE_TABLE(of, rb4xx_cpld_dt_match);
static struct spi_driver rb4xx_cpld_driver = {
.probe = rb4xx_cpld_probe,
.remove = rb4xx_cpld_remove,
.driver = {
.name = "rb4xx-cpld",
.bus = &spi_bus_type,

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@ -14,15 +14,15 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -3033,6 +3033,7 @@ int brcmnand_probe(struct platform_devic
@@ -3059,6 +3059,7 @@ int brcmnand_probe(struct platform_devic
dev_set_drvdata(dev, ctrl);
ctrl->dev = dev;
+ ctrl->soc = soc;
init_completion(&ctrl->done);
init_completion(&ctrl->dma_done);
@@ -3173,8 +3174,6 @@ int brcmnand_probe(struct platform_devic
/* Enable the static key if the soc provides I/O operations indicating
* that a non-memory mapped IO access path must be used
@@ -3205,8 +3206,6 @@ int brcmnand_probe(struct platform_devic
* interesting ways
*/
if (soc) {

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@ -1,150 +0,0 @@
From: Florian Fainelli <f.fainelli@gmail.com>
Subject: [PATCH v3 2/9] mtd: rawnand: brcmnand: Allow SoC to provide I/O operations
Date: Fri, 07 Jan 2022 10:46:07 -0800
Content-Type: text/plain; charset="utf-8"
Allow a brcmnand_soc instance to provide a custom set of I/O operations
which we will require when using this driver on a BCMA bus which is not
directly memory mapped I/O. Update the nand_{read,write}_reg accordingly
to use the SoC operations if provided.
To minimize the penalty on other SoCs which do support standard MMIO
accesses, we use a static key which is disabled by default and gets
enabled if a soc implementation does provide I/O operations.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 28 +++++++++++++++++++++--
drivers/mtd/nand/raw/brcmnand/brcmnand.h | 29 ++++++++++++++++++++++++
2 files changed, 55 insertions(+), 2 deletions(-)
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -25,6 +25,7 @@
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
+#include <linux/static_key.h>
#include <linux/list.h>
#include <linux/log2.h>
@@ -207,6 +208,8 @@ enum {
struct brcmnand_host;
+static DEFINE_STATIC_KEY_FALSE(brcmnand_soc_has_ops_key);
+
struct brcmnand_controller {
struct device *dev;
struct nand_controller controller;
@@ -592,15 +595,25 @@ enum {
INTFC_CTLR_READY = BIT(31),
};
+static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl)
+{
+ return static_branch_unlikely(&brcmnand_soc_has_ops_key);
+}
+
static inline u32 nand_readreg(struct brcmnand_controller *ctrl, u32 offs)
{
+ if (brcmnand_non_mmio_ops(ctrl))
+ return brcmnand_soc_read(ctrl->soc, offs);
return brcmnand_readl(ctrl->nand_base + offs);
}
static inline void nand_writereg(struct brcmnand_controller *ctrl, u32 offs,
u32 val)
{
- brcmnand_writel(val, ctrl->nand_base + offs);
+ if (brcmnand_non_mmio_ops(ctrl))
+ brcmnand_soc_write(ctrl->soc, val, offs);
+ else
+ brcmnand_writel(val, ctrl->nand_base + offs);
}
static int brcmnand_revision_init(struct brcmnand_controller *ctrl)
@@ -766,13 +779,18 @@ static inline void brcmnand_rmw_reg(stru
static inline u32 brcmnand_read_fc(struct brcmnand_controller *ctrl, int word)
{
+ if (brcmnand_non_mmio_ops(ctrl))
+ return brcmnand_soc_read(ctrl->soc, BRCMNAND_NON_MMIO_FC_ADDR);
return __raw_readl(ctrl->nand_fc + word * 4);
}
static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl,
int word, u32 val)
{
- __raw_writel(val, ctrl->nand_fc + word * 4);
+ if (brcmnand_non_mmio_ops(ctrl))
+ brcmnand_soc_write(ctrl->soc, val, BRCMNAND_NON_MMIO_FC_ADDR);
+ else
+ __raw_writel(val, ctrl->nand_fc + word * 4);
}
static inline void edu_writel(struct brcmnand_controller *ctrl,
@@ -3035,6 +3053,12 @@ int brcmnand_probe(struct platform_devic
ctrl->dev = dev;
ctrl->soc = soc;
+ /* Enable the static key if the soc provides I/O operations indicating
+ * that a non-memory mapped IO access path must be used
+ */
+ if (brcmnand_soc_has_ops(ctrl->soc))
+ static_branch_enable(&brcmnand_soc_has_ops_key);
+
init_completion(&ctrl->done);
init_completion(&ctrl->dma_done);
init_completion(&ctrl->edu_done);
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h
@@ -11,12 +11,25 @@
struct platform_device;
struct dev_pm_ops;
+struct brcmnand_io_ops;
+
+/* Special register offset constant to intercept a non-MMIO access
+ * to the flash cache register space. This is intentionally large
+ * not to overlap with an existing offset.
+ */
+#define BRCMNAND_NON_MMIO_FC_ADDR 0xffffffff
struct brcmnand_soc {
bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
bool is_param);
+ const struct brcmnand_io_ops *ops;
+};
+
+struct brcmnand_io_ops {
+ u32 (*read_reg)(struct brcmnand_soc *soc, u32 offset);
+ void (*write_reg)(struct brcmnand_soc *soc, u32 val, u32 offset);
};
static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc,
@@ -58,6 +71,22 @@ static inline void brcmnand_writel(u32 v
writel_relaxed(val, addr);
}
+static inline bool brcmnand_soc_has_ops(struct brcmnand_soc *soc)
+{
+ return soc && soc->ops && soc->ops->read_reg && soc->ops->write_reg;
+}
+
+static inline u32 brcmnand_soc_read(struct brcmnand_soc *soc, u32 offset)
+{
+ return soc->ops->read_reg(soc, offset);
+}
+
+static inline void brcmnand_soc_write(struct brcmnand_soc *soc, u32 val,
+ u32 offset)
+{
+ soc->ops->write_reg(soc, val, offset);
+}
+
int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
int brcmnand_remove(struct platform_device *pdev);

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@ -16,7 +16,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2806,7 +2806,7 @@ static const struct nand_controller_ops
@@ -2814,7 +2814,7 @@ static const struct nand_controller_ops
static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
{
struct brcmnand_controller *ctrl = host->ctrl;
@ -25,7 +25,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
struct mtd_info *mtd;
struct nand_chip *chip;
int ret;
@@ -2814,7 +2814,7 @@ static int brcmnand_init_cs(struct brcmn
@@ -2822,7 +2822,7 @@ static int brcmnand_init_cs(struct brcmn
ret = of_property_read_u32(dn, "reg", &host->cs);
if (ret) {
@ -34,7 +34,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
return -ENXIO;
}
@@ -2823,13 +2823,13 @@ static int brcmnand_init_cs(struct brcmn
@@ -2831,13 +2831,13 @@ static int brcmnand_init_cs(struct brcmn
nand_set_flash_node(chip, dn);
nand_set_controller_data(chip, host);

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@ -17,7 +17,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2803,7 +2803,7 @@ static const struct nand_controller_ops
@@ -2811,7 +2811,7 @@ static const struct nand_controller_ops
.attach_chip = brcmnand_attach_chip,
};
@ -26,7 +26,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
{
struct brcmnand_controller *ctrl = host->ctrl;
struct device *dev = ctrl->dev;
@@ -2812,16 +2812,9 @@ static int brcmnand_init_cs(struct brcmn
@@ -2820,16 +2820,9 @@ static int brcmnand_init_cs(struct brcmn
int ret;
u16 cfg_offs;
@ -43,7 +43,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
nand_set_controller_data(chip, host);
mtd->name = devm_kasprintf(dev, GFP_KERNEL, "brcmnand.%d",
host->cs);
@@ -3228,7 +3221,16 @@ int brcmnand_probe(struct platform_devic
@@ -3236,7 +3229,16 @@ int brcmnand_probe(struct platform_devic
host->pdev = pdev;
host->ctrl = ctrl;

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@ -23,7 +23,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
unsigned int dma_irq;
int nand_version;
@@ -1642,7 +1642,7 @@ static bool brcmstb_nand_wait_for_comple
@@ -1650,7 +1650,7 @@ static bool brcmstb_nand_wait_for_comple
bool err = false;
int sts;
@ -32,7 +32,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
/* switch to interrupt polling and PIO mode */
disable_ctrl_irqs(ctrl);
sts = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY,
@@ -3179,33 +3179,29 @@ int brcmnand_probe(struct platform_devic
@@ -3187,33 +3187,29 @@ int brcmnand_probe(struct platform_devic
}
/* IRQ */

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@ -23,7 +23,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
#include <linux/err.h>
#include <linux/completion.h>
#include <linux/interrupt.h>
@@ -2803,7 +2804,8 @@ static const struct nand_controller_ops
@@ -2811,7 +2812,8 @@ static const struct nand_controller_ops
.attach_chip = brcmnand_attach_chip,
};
@ -33,7 +33,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
{
struct brcmnand_controller *ctrl = host->ctrl;
struct device *dev = ctrl->dev;
@@ -2856,7 +2858,7 @@ static int brcmnand_init_cs(struct brcmn
@@ -2864,7 +2866,7 @@ static int brcmnand_init_cs(struct brcmn
if (ret)
return ret;
@ -42,7 +42,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
if (ret)
nand_cleanup(chip);
@@ -3025,17 +3027,15 @@ static int brcmnand_edu_setup(struct pla
@@ -3033,17 +3035,15 @@ static int brcmnand_edu_setup(struct pla
int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
{
@ -63,7 +63,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
return -ENODEV;
ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
@@ -3062,7 +3062,7 @@ int brcmnand_probe(struct platform_devic
@@ -3070,7 +3070,7 @@ int brcmnand_probe(struct platform_devic
/* NAND register range */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ctrl->nand_base = devm_ioremap_resource(dev, res);
@ -72,7 +72,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
return PTR_ERR(ctrl->nand_base);
/* Enable clock before using NAND registers */
@@ -3206,7 +3206,6 @@ int brcmnand_probe(struct platform_devic
@@ -3214,7 +3214,6 @@ int brcmnand_probe(struct platform_devic
for_each_available_child_of_node(dn, child) {
if (of_device_is_compatible(child, "brcm,nandcs")) {
@ -80,7 +80,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
if (!host) {
@@ -3226,7 +3225,7 @@ int brcmnand_probe(struct platform_devic
@@ -3234,7 +3233,7 @@ int brcmnand_probe(struct platform_devic
nand_set_flash_node(&host->chip, child);
@ -89,7 +89,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
if (ret) {
devm_kfree(dev, host);
continue; /* Try all chip-selects */
@@ -3236,6 +3235,32 @@ int brcmnand_probe(struct platform_devic
@@ -3244,6 +3243,32 @@ int brcmnand_probe(struct platform_devic
}
}

View File

@ -14,7 +14,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -916,6 +916,12 @@ static void brcmnand_wr_corr_thresh(stru
@@ -951,6 +951,12 @@ static void brcmnand_wr_corr_thresh(stru
static inline int brcmnand_cmd_shift(struct brcmnand_controller *ctrl)
{

View File

@ -187,7 +187,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+MODULE_DESCRIPTION("NAND controller driver glue for BCMA chips");
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -598,7 +598,11 @@ enum {
@@ -627,7 +627,11 @@ enum {
static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl)
{

View File

@ -20,7 +20,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -37,7 +37,11 @@
@@ -38,7 +38,11 @@
* 1: NAND_WP is set by default, cleared for erase/write operations
* 2: NAND_WP is always cleared
*/

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@ -1,35 +0,0 @@
From 91994e59079dcb455783d3f9ea338eea6f671af3 Mon Sep 17 00:00:00 2001
From: Aleksey Nasibulin <alealexpro100@ya.ru>
Date: Wed, 12 Jul 2023 03:40:17 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys
EA6500 V2
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Linksys ea6500-v2 have 256MB of ram. Currently we only use 128MB.
Expand the definition to use all the available RAM.
Fixes: 03e96644d7a8 ("ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2")
Signed-off-by: Aleksey Nasibulin <alealexpro100@ya.ru>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Cc: stable@vger.kernel.org
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230712014017.28123-1-ansuelsmth@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
@@ -19,7 +19,8 @@
memory@0 {
device_type = "memory";
- reg = <0x00000000 0x08000000>;
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
};
gpio-keys {

View File

@ -11,8 +11,7 @@ FEATURES:=squashfs pci rtc usb dt gpio display ext4 rootfs-part boot-part
CPU_TYPE:=fa526
SUBTARGETS:=generic
KERNEL_PATCHVER:=5.15
KERNEL_TESTING_PATCHVER:=6.1
KERNEL_PATCHVER:=6.1
define Target/Description
Build firmware images for the StorLink/Cortina Gemini CS351x ARM FA526 CPU

View File

@ -1,420 +0,0 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_AMBA_PL08X=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_GEMINI=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_ARCH_MOXART is not set
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V4=y
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
# CONFIG_ARCH_MULTI_V5 is not set
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_CRYPTO=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_SMMU is not set
CONFIG_ARM_UNWIND=y
CONFIG_ATA=y
CONFIG_ATAGS=y
CONFIG_ATA_FORCE=y
CONFIG_ATA_VERBOSE_ERROR=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BOUNCE=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_PERCENTAGE=10
# CONFIG_CMA_SIZE_SEL_MAX is not set
# CONFIG_CMA_SIZE_SEL_MBYTES is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
CONFIG_CMA_SIZE_SEL_PERCENTAGE=y
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_GEMINI=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTIG_ALLOC=y
CONFIG_COREDUMP=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
CONFIG_CPU_CACHE_FA=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FA=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_FA526=y
CONFIG_CPU_NO_EFFICIENT_FFS=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_TLB_FA=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRASH_CORE=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC_CCITT=y
CONFIG_CRC_ITU_T=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_SL3516=y
# CONFIG_CRYPTO_DEV_SL3516_DEBUG is not set
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_ENGINE=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DMADEVICES=y
CONFIG_DMATEST=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_ENGINE_RAID=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_REMAP=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DRM=y
CONFIG_DRM_BRIDGE=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_FBDEV_OVERALLOC=100
CONFIG_DRM_GEM_CMA_HELPER=y
CONFIG_DRM_KMS_CMA_HELPER=y
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_PANEL=y
CONFIG_DRM_PANEL_BRIDGE=y
CONFIG_DRM_PANEL_ILITEK_IL9322=y
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
CONFIG_DRM_TVE200=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_93CX6=y
CONFIG_ELF_CORE=y
# CONFIG_EMBEDDED is not set
# CONFIG_EXPERT is not set
CONFIG_EXT4_FS=y
CONFIG_FARADAY_FTINTC010=y
CONFIG_FB=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_FOPS=y
CONFIG_FB_SYS_IMAGEBLIT=y
CONFIG_FHANDLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FTTMR010_TIMER=y
CONFIG_FTWDT010_WATCHDOG=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GEMINI_ETHERNET=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_FTGPIO010=y
CONFIG_GPIO_GENERIC=y
CONFIG_GRO_CELLS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HDMI=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HWMON=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_KEYBOARD=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IPC_NS=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
CONFIG_KALLSYMS=y
CONFIG_KCMP=y
CONFIG_KERNEL_LZMA=y
# CONFIG_KERNEL_XZ is not set
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
CONFIG_KEYBOARD_DLINK_DIR685=y
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_LDM_DEBUG is not set
CONFIG_LDM_PARTITION=y
CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_GPIO=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_MQ_IOSCHED_DEADLINE=y
CONFIG_MQ_IOSCHED_KYBER=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_GEMINI=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_WRGG_FW=y
CONFIG_NAMESPACES=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_REALTEK_SMI=y
CONFIG_NET_DSA_TAG_RTL4_A=y
CONFIG_NET_NS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NVMEM=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_PATA_FTIDE010=y
CONFIG_PCI=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_FTPCI100=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PID_NS=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_GEMINI=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GEMINI_POWEROFF=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PREEMPT=y
CONFIG_PREEMPTION=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RATIONAL=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZ4=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
CONFIG_REALTEK_PHY=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RELAY=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RSEQ=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_FTRTC010=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_RTC_NVMEM=y
CONFIG_SATA_GEMINI=y
CONFIG_SATA_HOST=y
CONFIG_SATA_PMP=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SENSORS_DRIVETEMP=y
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SENSORS_LM75=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_EXAR=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIO=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_SERPORT=y
CONFIG_SG_POOL=y
CONFIG_SLUB_DEBUG=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SWPHY=y
CONFIG_SYNC_FILE=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_UNWINDER_ARM=y
CONFIG_USB_SUPPORT=y
CONFIG_USER_NS=y
CONFIG_USE_OF=y
CONFIG_UTS_NS=y
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_VITESSE_PHY=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_X86=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZLIB_INFLATE=y

View File

@ -3,11 +3,8 @@ define KernelPackage/usb-fotg210
DEPENDS:=@USB_SUPPORT @TARGET_gemini
KCONFIG:=CONFIG_USB_FOTG210 \
CONFIG_USB_FOTG210_HCD
FILES:=$(if $(CONFIG_USB_FOTG210_HCD),$(LINUX_DIR)/drivers/usb/host/fotg210-hcd.ko@lt6.1) \
$(if $(CONFIG_USB_FOTG210),$(LINUX_DIR)/drivers/usb/fotg210/fotg210.ko@ge6.1)
AUTOLOAD:=$(call AutoLoad,50, \
$(if $(CONFIG_USB_FOTG210_HCD),fotg210-hcd@lt6.1) \
$(if $(CONFIG_USB_FOTG210),fotg210@ge6.1),1)
FILES:=$(LINUX_DIR)/drivers/usb/fotg210/fotg210.ko
AUTOLOAD:=$(call AutoLoad,50,1)
$(call AddDepends/usb)
endef

View File

@ -1,131 +0,0 @@
From ff887de2f7af17d6264eb946f6b336e6e1521222 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 21 Apr 2017 22:19:00 +0200
Subject: [PATCH 1/2] usb: host: fotg2: add Gemini-specific handling
The Cortina Systems Gemini has bolted on a PHY inside the
silicon that can be handled by six bits in a MISC register in
the system controller.
If we are running on Gemini, look up a syscon regmap through
a phandle and enable VBUS and optionally the Mini-B connector.
If the device is flagged as "wakeup-source" using the standard
DT bindings, we also enable this in the global controller for
respective port.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/usb/host/Kconfig | 1 +
drivers/usb/host/fotg210-hcd.c | 76 ++++++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+)
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -381,6 +381,7 @@ config USB_ISP1362_HCD
config USB_FOTG210_HCD
tristate "FOTG210 HCD support"
depends on USB && HAS_DMA && HAS_IOMEM
+ select MFD_SYSCON
help
Faraday FOTG210 is an OTG controller which can be configured as
an USB2.0 host. It is designed to meet USB2.0 EHCI specification
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -34,6 +34,10 @@
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/clk.h>
+#include <linux/bitops.h>
+/* For Cortina Gemini */
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
#include <asm/byteorder.h>
#include <asm/irq.h>
@@ -5557,6 +5561,72 @@ static void fotg210_init(struct fotg210_
}
/*
+ * Gemini-specific initialization function, only executed on the
+ * Gemini SoC using the global misc control register.
+ */
+#define GEMINI_GLOBAL_MISC_CTRL 0x30
+#define GEMINI_MISC_USB0_WAKEUP BIT(14)
+#define GEMINI_MISC_USB1_WAKEUP BIT(15)
+#define GEMINI_MISC_USB0_VBUS_ON BIT(22)
+#define GEMINI_MISC_USB1_VBUS_ON BIT(23)
+#define GEMINI_MISC_USB0_MINI_B BIT(29)
+#define GEMINI_MISC_USB1_MINI_B BIT(30)
+
+static int fotg210_gemini_init(struct device *dev, struct usb_hcd *hcd)
+{
+ struct device_node *np = dev->of_node;
+ struct regmap *map;
+ bool mini_b;
+ bool wakeup;
+ u32 mask, val;
+ int ret;
+
+ map = syscon_regmap_lookup_by_phandle(np, "syscon");
+ if (IS_ERR(map)) {
+ dev_err(dev, "no syscon\n");
+ return PTR_ERR(map);
+ }
+ mini_b = of_property_read_bool(np, "cortina,gemini-mini-b");
+ wakeup = of_property_read_bool(np, "wakeup-source");
+
+ /*
+ * Figure out if this is USB0 or USB1 by simply checking the
+ * physical base address.
+ */
+ mask = 0;
+ if (hcd->rsrc_start == 0x69000000) {
+ val = GEMINI_MISC_USB1_VBUS_ON;
+ if (mini_b)
+ val |= GEMINI_MISC_USB1_MINI_B;
+ else
+ mask |= GEMINI_MISC_USB1_MINI_B;
+ if (wakeup)
+ val |= GEMINI_MISC_USB1_WAKEUP;
+ else
+ mask |= GEMINI_MISC_USB1_WAKEUP;
+ } else {
+ val = GEMINI_MISC_USB0_VBUS_ON;
+ if (mini_b)
+ val |= GEMINI_MISC_USB0_MINI_B;
+ else
+ mask |= GEMINI_MISC_USB0_MINI_B;
+ if (wakeup)
+ val |= GEMINI_MISC_USB0_WAKEUP;
+ else
+ mask |= GEMINI_MISC_USB0_WAKEUP;
+ }
+
+ ret = regmap_update_bits(map, GEMINI_GLOBAL_MISC_CTRL, mask, val);
+ if (ret) {
+ dev_err(dev, "failed to initialize Gemini PHY\n");
+ return ret;
+ }
+
+ dev_info(dev, "initialized Gemini PHY\n");
+ return 0;
+}
+
+/**
* fotg210_hcd_probe - initialize faraday FOTG210 HCDs
*
* Allocates basic resources for this USB host controller, and
@@ -5633,6 +5703,12 @@ static int fotg210_hcd_probe(struct plat
fotg210_init(fotg210);
+ if (of_device_is_compatible(dev->of_node, "cortina,gemini-usb")) {
+ retval = fotg210_gemini_init(dev, hcd);
+ if (retval)
+ goto failed_dis_clk;
+ }
+
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (retval) {
dev_err(dev, "failed to add hcd with err %d\n", retval);

View File

@ -1,37 +0,0 @@
From 36ee838bf83c01cff7cb47c7b07be278d2950ac0 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 11 Mar 2019 15:44:29 +0100
Subject: [PATCH 2/2] ARM: dts: Augment DIR-685 partition table for OpenWrt
Rename the firmware partition so that the firmware MTD
splitter will do its job, drop the rootfs arguments as
the MTD splitter will set this up automatically.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -20,7 +20,7 @@
};
chosen {
- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
+ bootargs = "console=ttyS0,19200n8 consoleblank=300";
stdout-path = "uart0:19200n8";
};
@@ -317,9 +317,9 @@
* this is called "upgrade" on the vendor system.
*/
partition@40000 {
- label = "upgrade";
+ compatible = "wrg";
+ label = "firmware";
reg = <0x00040000 0x01f40000>;
- read-only;
};
/* RGDB, Residental Gateway Database? */
partition@1f80000 {

View File

@ -382,7 +382,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
}
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -1083,6 +1083,7 @@ static struct mm_struct *mm_init(struct
@@ -1091,6 +1091,7 @@ static struct mm_struct *mm_init(struct
goto fail_nocontext;
mm->user_ns = get_user_ns(user_ns);
@ -390,7 +390,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
return mm;
fail_nocontext:
@@ -1125,6 +1126,7 @@ static inline void __mmput(struct mm_str
@@ -1133,6 +1134,7 @@ static inline void __mmput(struct mm_str
}
if (mm->binfmt)
module_put(mm->binfmt->module);
@ -398,7 +398,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
mmdrop(mm);
}
@@ -2617,6 +2619,13 @@ pid_t kernel_clone(struct kernel_clone_a
@@ -2625,6 +2627,13 @@ pid_t kernel_clone(struct kernel_clone_a
get_task_struct(p);
}

View File

@ -116,7 +116,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
extern spinlock_t css_set_lock;
#define task_css_set_check(task, __c) \
rcu_dereference_check((task)->cgroups, \
@@ -708,6 +719,8 @@ struct cgroup;
@@ -709,6 +720,8 @@ struct cgroup;
static inline u64 cgroup_id(const struct cgroup *cgrp) { return 1; }
static inline void css_get(struct cgroup_subsys_state *css) {}
static inline void css_put(struct cgroup_subsys_state *css) {}

View File

@ -335,7 +335,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
if (order > 0)
return 0;
@@ -5383,6 +5396,7 @@ static int mem_cgroup_css_online(struct
@@ -5386,6 +5399,7 @@ static int mem_cgroup_css_online(struct
if (unlikely(mem_cgroup_is_root(memcg)))
queue_delayed_work(system_unbound_wq, &stats_flush_dwork,
2UL*HZ);
@ -343,7 +343,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
return 0;
offline_kmem:
memcg_offline_kmem(memcg);
@@ -5414,6 +5428,7 @@ static void mem_cgroup_css_offline(struc
@@ -5417,6 +5431,7 @@ static void mem_cgroup_css_offline(struc
memcg_offline_kmem(memcg);
reparent_shrinker_deferred(memcg);
wb_memcg_offline(memcg);
@ -351,7 +351,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
drain_all_stock(memcg);
@@ -5425,6 +5440,7 @@ static void mem_cgroup_css_released(stru
@@ -5428,6 +5443,7 @@ static void mem_cgroup_css_released(stru
struct mem_cgroup *memcg = mem_cgroup_from_css(css);
invalidate_reclaim_iterators(memcg);

View File

@ -0,0 +1,61 @@
From 5652d1741574eb89cc02576e50ee3e348bd6dd77 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Wed, 4 Oct 2023 11:19:03 +0200
Subject: [PATCH 1/2] net: dsa: qca8k: fix regmap bulk read/write methods on
big endian systems
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Commit c766e077d927 ("net: dsa: qca8k: convert to regmap read/write
API") introduced bulk read/write methods to qca8k's regmap.
The regmap bulk read/write methods get the register address in a buffer
passed as a void pointer parameter (the same buffer contains also the
read/written values). The register address occupies only as many bytes
as it requires at the beginning of this buffer. For example if the
.reg_bits member in regmap_config is 16 (as is the case for this
driver), the register address occupies only the first 2 bytes in this
buffer, so it can be cast to u16.
But the original commit implementing these bulk read/write methods cast
the buffer to u32:
u32 reg = *(u32 *)reg_buf & U16_MAX;
taking the first 4 bytes. This works on little endian systems where the
first 2 bytes of the buffer correspond to the low 16-bits, but it
obviously cannot work on big endian systems.
Fix this by casting the beginning of the buffer to u16 as
u32 reg = *(u16 *)reg_buf;
Fixes: c766e077d927 ("net: dsa: qca8k: convert to regmap read/write API")
Signed-off-by: Marek Behún <kabel@kernel.org>
Tested-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/qca/qca8k-8xxx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -504,8 +504,8 @@ qca8k_bulk_read(void *ctx, const void *r
void *val_buf, size_t val_len)
{
int i, count = val_len / sizeof(u32), ret;
- u32 reg = *(u32 *)reg_buf & U16_MAX;
struct qca8k_priv *priv = ctx;
+ u32 reg = *(u16 *)reg_buf;
if (priv->mgmt_master &&
!qca8k_read_eth(priv, reg, val_buf, val_len))
@@ -526,8 +526,8 @@ qca8k_bulk_gather_write(void *ctx, const
const void *val_buf, size_t val_len)
{
int i, count = val_len / sizeof(u32), ret;
- u32 reg = *(u32 *)reg_buf & U16_MAX;
struct qca8k_priv *priv = ctx;
+ u32 reg = *(u16 *)reg_buf;
u32 *val = (u32 *)val_buf;
if (priv->mgmt_master &&

View File

@ -0,0 +1,106 @@
From 526c8ee04bdbd4d8d19a583b1f3b06700229a815 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Wed, 4 Oct 2023 11:19:04 +0200
Subject: [PATCH 2/2] net: dsa: qca8k: fix potential MDIO bus conflict when
accessing internal PHYs via management frames
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Besides the QCA8337 switch the Turris 1.x device has on it's MDIO bus
also Micron ethernet PHY (dedicated to the WAN port).
We've been experiencing a strange behavior of the WAN ethernet
interface, wherein the WAN PHY started timing out the MDIO accesses, for
example when the interface was brought down and then back up.
Bisecting led to commit 2cd548566384 ("net: dsa: qca8k: add support for
phy read/write with mgmt Ethernet"), which added support to access the
QCA8337 switch's internal PHYs via management ethernet frames.
Connecting the MDIO bus pins onto an oscilloscope, I was able to see
that the MDIO bus was active whenever a request to read/write an
internal PHY register was done via an management ethernet frame.
My theory is that when the switch core always communicates with the
internal PHYs via the MDIO bus, even when externally we request the
access via ethernet. This MDIO bus is the same one via which the switch
and internal PHYs are accessible to the board, and the board may have
other devices connected on this bus. An ASCII illustration may give more
insight:
+---------+
+----| |
| | WAN PHY |
| +--| |
| | +---------+
| |
| | +----------------------------------+
| | | QCA8337 |
MDC | | | +-------+ |
------o-+--|--------o------------o--| | |
MDIO | | | | | PHY 1 |-|--to RJ45
--------o--|---o----+---------o--+--| | |
| | | | | +-------+ |
| +-------------+ | o--| | |
| | MDIO MDC | | | | PHY 2 |-|--to RJ45
eth1 | | | o--+--| | |
-----------|-|port0 | | | +-------+ |
| | | | o--| | |
| | switch core | | | | PHY 3 |-|--to RJ45
| +-------------+ o--+--| | |
| | | +-------+ |
| | o--| ... | |
+----------------------------------+
When we send a request to read an internal PHY register via an ethernet
management frame via eth1, the switch core receives the ethernet frame
on port 0 and then communicates with the internal PHY via MDIO. At this
time, other potential devices, such as the WAN PHY on Turris 1.x, cannot
use the MDIO bus, since it may cause a bus conflict.
Fix this issue by locking the MDIO bus even when we are accessing the
PHY registers via ethernet management frames.
Fixes: 2cd548566384 ("net: dsa: qca8k: add support for phy read/write with mgmt Ethernet")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/qca/qca8k-8xxx.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -665,6 +665,15 @@ qca8k_phy_eth_command(struct qca8k_priv
goto err_read_skb;
}
+ /* It seems that accessing the switch's internal PHYs via management
+ * packets still uses the MDIO bus within the switch internally, and
+ * these accesses can conflict with external MDIO accesses to other
+ * devices on the MDIO bus.
+ * We therefore need to lock the MDIO bus onto which the switch is
+ * connected.
+ */
+ mutex_lock(&priv->bus->mdio_lock);
+
/* Actually start the request:
* 1. Send mdio master packet
* 2. Busy Wait for mdio master command
@@ -677,6 +686,7 @@ qca8k_phy_eth_command(struct qca8k_priv
mgmt_master = priv->mgmt_master;
if (!mgmt_master) {
mutex_unlock(&mgmt_eth_data->mutex);
+ mutex_unlock(&priv->bus->mdio_lock);
ret = -EINVAL;
goto err_mgmt_master;
}
@@ -764,6 +774,7 @@ exit:
QCA8K_ETHERNET_TIMEOUT);
mutex_unlock(&mgmt_eth_data->mutex);
+ mutex_unlock(&priv->bus->mdio_lock);
return ret;

View File

@ -20,7 +20,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -778,21 +778,6 @@ err_clear_skb:
@@ -789,21 +789,6 @@ err_clear_skb:
return ret;
}

View File

@ -71,7 +71,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static void
qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
@@ -1829,6 +1830,10 @@ qca8k_setup(struct dsa_switch *ds)
@@ -1840,6 +1841,10 @@ qca8k_setup(struct dsa_switch *ds)
if (ret)
return ret;

View File

@ -6500,6 +6500,7 @@ CONFIG_SND_X86=y
# CONFIG_SPI_AX88796C is not set
# CONFIG_SPI_AXI_SPI_ENGINE is not set
# CONFIG_SPI_BCM2835 is not set
# CONFIG_SPI_BCM63XX_HSSPI is not set
# CONFIG_SPI_BCM_QSPI is not set
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_BUTTERFLY is not set

View File

@ -590,7 +590,7 @@ static int rtl8366_set_pvid(struct rtl8366_smi *smi, unsigned port,
return -ENOSPC;
}
int rtl8366_enable_vlan(struct rtl8366_smi *smi, int enable)
static int rtl8366_smi_enable_vlan(struct rtl8366_smi *smi, int enable)
{
int err;
@ -607,9 +607,8 @@ int rtl8366_enable_vlan(struct rtl8366_smi *smi, int enable)
return err;
}
EXPORT_SYMBOL_GPL(rtl8366_enable_vlan);
static int rtl8366_enable_vlan4k(struct rtl8366_smi *smi, int enable)
static int rtl8366_smi_enable_vlan4k(struct rtl8366_smi *smi, int enable)
{
int err;
@ -629,7 +628,7 @@ static int rtl8366_enable_vlan4k(struct rtl8366_smi *smi, int enable)
return 0;
}
int rtl8366_enable_all_ports(struct rtl8366_smi *smi, int enable)
static int rtl8366_smi_enable_all_ports(struct rtl8366_smi *smi, int enable)
{
int port;
int err;
@ -642,16 +641,15 @@ int rtl8366_enable_all_ports(struct rtl8366_smi *smi, int enable)
return 0;
}
EXPORT_SYMBOL_GPL(rtl8366_enable_all_ports);
int rtl8366_reset_vlan(struct rtl8366_smi *smi)
static int rtl8366_smi_reset_vlan(struct rtl8366_smi *smi)
{
struct rtl8366_vlan_mc vlanmc;
int err;
int i;
rtl8366_enable_vlan(smi, 0);
rtl8366_enable_vlan4k(smi, 0);
rtl8366_smi_enable_vlan(smi, 0);
rtl8366_smi_enable_vlan4k(smi, 0);
/* clear VLAN member configurations */
vlanmc.vid = 0;
@ -667,14 +665,13 @@ int rtl8366_reset_vlan(struct rtl8366_smi *smi)
return 0;
}
EXPORT_SYMBOL_GPL(rtl8366_reset_vlan);
static int rtl8366_init_vlan(struct rtl8366_smi *smi)
{
int port;
int err;
err = rtl8366_reset_vlan(smi);
err = rtl8366_smi_reset_vlan(smi);
if (err)
return err;
@ -695,7 +692,7 @@ static int rtl8366_init_vlan(struct rtl8366_smi *smi)
return err;
}
return rtl8366_enable_vlan(smi, 1);
return rtl8366_smi_enable_vlan(smi, 1);
}
#ifdef CONFIG_RTL8366_SMI_DEBUG_FS
@ -1073,15 +1070,15 @@ int rtl8366_sw_reset_switch(struct switch_dev *dev)
if (err)
return err;
err = rtl8366_reset_vlan(smi);
err = rtl8366_smi_reset_vlan(smi);
if (err)
return err;
err = rtl8366_enable_vlan(smi, 1);
err = rtl8366_smi_enable_vlan(smi, 1);
if (err)
return err;
return rtl8366_enable_all_ports(smi, 1);
return rtl8366_smi_enable_all_ports(smi, 1);
}
EXPORT_SYMBOL_GPL(rtl8366_sw_reset_switch);
@ -1343,9 +1340,9 @@ int rtl8366_sw_set_vlan_enable(struct switch_dev *dev,
return -EINVAL;
if (attr->ofs == 1)
err = rtl8366_enable_vlan(smi, val->value.i);
err = rtl8366_smi_enable_vlan(smi, val->value.i);
else
err = rtl8366_enable_vlan4k(smi, val->value.i);
err = rtl8366_smi_enable_vlan4k(smi, val->value.i);
return err;
}
@ -1494,7 +1491,7 @@ int rtl8366_smi_init(struct rtl8366_smi *smi)
goto err_free_sck;
}
err = rtl8366_enable_all_ports(smi, 1);
err = rtl8366_smi_enable_all_ports(smi, 1);
if (err)
goto err_free_sck;

View File

@ -115,10 +115,6 @@ int rtl8366_smi_write_reg_noack(struct rtl8366_smi *smi, u32 addr, u32 data);
int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data);
int rtl8366_smi_rmwr(struct rtl8366_smi *smi, u32 addr, u32 mask, u32 data);
int rtl8366_reset_vlan(struct rtl8366_smi *smi);
int rtl8366_enable_vlan(struct rtl8366_smi *smi, int enable);
int rtl8366_enable_all_ports(struct rtl8366_smi *smi, int enable);
#ifdef CONFIG_RTL8366_SMI_DEBUG_FS
int rtl8366_debugfs_open(struct inode *inode, struct file *file);
#endif

View File

@ -406,3 +406,14 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
return register_pernet_subsys(&ip_rt_proc_ops);
}
--- a/net/ipv4/inet_timewait_sock.c
+++ b/net/ipv4/inet_timewait_sock.c
@@ -269,7 +269,7 @@ void __inet_twsk_schedule(struct inet_ti
*/
if (!rearm) {
- bool kill = timeo <= 4*HZ;
+ bool __maybe_unused kill = timeo <= 4*HZ;
__NET_INC_STATS(twsk_net(tw), kill ? LINUX_MIB_TIMEWAITKILLED :
LINUX_MIB_TIMEWAITED);

View File

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -7729,7 +7729,7 @@ static int nft_register_flowtable_net_ho
@@ -7707,7 +7707,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

View File

@ -51,7 +51,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -14,6 +14,7 @@
@@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mbus.h>

View File

@ -134,7 +134,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/*
* Define if arch has non-standard setup. This is a _PCI_ standard
@@ -894,6 +897,12 @@ struct ata_port {
@@ -898,6 +901,12 @@ struct ata_port {
#ifdef CONFIG_ATA_ACPI
struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */
#endif

View File

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -7886,7 +7886,7 @@ static int nft_register_flowtable_net_ho
@@ -7864,7 +7864,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

View File

@ -16,7 +16,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -1993,6 +1993,8 @@ static const struct dsa_switch_ops qca8k
@@ -2004,6 +2004,8 @@ static const struct dsa_switch_ops qca8k
.port_fdb_add = qca8k_port_fdb_add,
.port_fdb_del = qca8k_port_fdb_del,
.port_fdb_dump = qca8k_port_fdb_dump,

View File

@ -14,7 +14,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -1882,15 +1882,12 @@ qca8k_setup(struct dsa_switch *ds)
@@ -1893,15 +1893,12 @@ qca8k_setup(struct dsa_switch *ds)
}
}

View File

@ -26,7 +26,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -1719,6 +1719,117 @@ qca8k_get_tag_protocol(struct dsa_switch
@@ -1730,6 +1730,117 @@ qca8k_get_tag_protocol(struct dsa_switch
return DSA_TAG_PROTO_QCA;
}
@ -144,7 +144,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
static void
qca8k_master_change(struct dsa_switch *ds, const struct net_device *master,
bool operational)
@@ -2005,8 +2116,9 @@ static const struct dsa_switch_ops qca8k
@@ -2016,8 +2127,9 @@ static const struct dsa_switch_ops qca8k
.phylink_mac_link_down = qca8k_phylink_mac_link_down,
.phylink_mac_link_up = qca8k_phylink_mac_link_up,
.get_phy_flags = qca8k_get_phy_flags,

View File

@ -0,0 +1,57 @@
From 0f6599167c126ce32c85d4f8a1f3d1775a268572 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Fri, 6 Oct 2023 12:44:00 +0200
Subject: [PATCH] net: dsa: qca8k: enable assisted learning on CPU port
Enable assisted learning on CPU port.
It has been verified that there is a problem in packet roaming
from one BSS to another in the same security settings from one
physical R7800 to another physical R7800 where they are in the
same L2 broadcast domain backhauled/linked together via one
of the ethernet ports.
DHCP will fail to complete and traffic cannot flow for around 300
seconds.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/net/dsa/qca/qca8k-8xxx.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -2002,6 +2002,12 @@ qca8k_setup(struct dsa_switch *ds)
dev_err(priv->dev, "failed enabling QCA header mode on port %d", dp->index);
return ret;
}
+
+ /* Disable learning by default on all ports */
+ ret = regmap_clear_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(dp->index),
+ QCA8K_PORT_LOOKUP_LEARN);
+ if (ret)
+ return ret;
}
/* Forward all unknown frames to CPU port for Linux processing */
@@ -2031,11 +2037,6 @@ qca8k_setup(struct dsa_switch *ds)
if (ret)
return ret;
- ret = regmap_clear_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(port),
- QCA8K_PORT_LOOKUP_LEARN);
- if (ret)
- return ret;
-
/* For port based vlans to work we need to set the
* default egress vid
*/
@@ -2087,6 +2088,9 @@ qca8k_setup(struct dsa_switch *ds)
/* Set max number of LAGs supported */
ds->num_lag_ids = QCA8K_NUM_LAGS;
+ /* HW learn on CPU port is limited and require manual setting */
+ ds->assisted_learning_on_cpu_port = true;
+
return 0;
}

View File

@ -67,6 +67,10 @@
};
};
&scm {
qcom,sdi-enabled;
};
&tlmm {
fw_pinmux: fw_pinmux {
wp {

View File

@ -0,0 +1,83 @@
From ff4aa3bc98258a240b9bbab53fd8d2fb8184c485 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 16 Aug 2023 18:45:39 +0200
Subject: [PATCH] firmware: qcom_scm: disable SDI if required
IPQ5018 has SDI (Secure Debug Image) enabled by TZ by default, and that
means that WDT being asserted or just trying to reboot will hang the board
in the debug mode and only pulling the power and repowering will help.
Some IPQ4019 boards like Google WiFI have it enabled as well.
Luckily, SDI can be disabled via an SCM call.
So, lets use the boolean DT property to identify boards that have SDI
enabled by default and use the SCM call to disable SDI during SCM probe.
It is important to disable it as soon as possible as we might have a WDT
assertion at any time which would then leave the board in debug mode,
thus disabling it during SCM removal is not enough.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
Link: https://lore.kernel.org/r/20230816164641.3371878-2-robimarko@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
---
drivers/firmware/qcom_scm.c | 30 ++++++++++++++++++++++++++++++
drivers/firmware/qcom_scm.h | 1 +
2 files changed, 31 insertions(+)
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -400,6 +400,29 @@ int qcom_scm_set_remote_state(u32 state,
}
EXPORT_SYMBOL(qcom_scm_set_remote_state);
+static int qcom_scm_disable_sdi(void)
+{
+ int ret;
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_SVC_BOOT,
+ .cmd = QCOM_SCM_BOOT_SDI_CONFIG,
+ .args[0] = 1, /* Disable watchdog debug */
+ .args[1] = 0, /* Disable SDI */
+ .arginfo = QCOM_SCM_ARGS(2),
+ .owner = ARM_SMCCC_OWNER_SIP,
+ };
+ struct qcom_scm_res res;
+
+ ret = qcom_scm_clk_enable();
+ if (ret)
+ return ret;
+ ret = qcom_scm_call(__scm->dev, &desc, &res);
+
+ qcom_scm_clk_disable();
+
+ return ret ? : res.result[0];
+}
+
static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
{
struct qcom_scm_desc desc = {
@@ -1404,6 +1427,13 @@ static int qcom_scm_probe(struct platfor
__get_convention();
+
+ /*
+ * Disable SDI if indicated by DT that it is enabled by default.
+ */
+ if (of_property_read_bool(pdev->dev.of_node, "qcom,sdi-enabled"))
+ qcom_scm_disable_sdi();
+
/*
* If requested enable "download mode", from this point on warmboot
* will cause the boot stages to enter download mode, unless
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device
#define QCOM_SCM_SVC_BOOT 0x01
#define QCOM_SCM_BOOT_SET_ADDR 0x01
#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
+#define QCOM_SCM_BOOT_SDI_CONFIG 0x09
#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
#define QCOM_SCM_BOOT_SET_ADDR_MC 0x11
#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a

View File

@ -0,0 +1,24 @@
From ea9fba16d972becc84cd2a82d25030975dc609a5 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 30 Sep 2023 13:09:27 +0200
Subject: [PATCH] ARM: dts: qcom: ipq4019: add label to SCM
Some IPQ4019 boards require SDI to be disabled by adding a property to the
SCM node, so lets make that easy by adding a label to the SCM node.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -155,7 +155,7 @@
};
firmware {
- scm {
+ scm: scm {
compatible = "qcom,scm-ipq4019", "qcom,scm";
};
};

View File

@ -1,60 +0,0 @@
From b514bc3c0a5a57bc83843dc66c72788b9c9435ac Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 18 May 2023 16:02:23 +0200
Subject: [PATCH 1/3] firmware: qcom: scm: Add SDI disable support
Some SoC-s like IPQ5018 require SDI(Secure Debug Image) to be disabled
before trying to reboot, otherwise board will just hang after reboot has
been issued via PSCI.
So, provide a call to SCM that allows disabling it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
drivers/firmware/qcom_scm.c | 23 +++++++++++++++++++++++
drivers/firmware/qcom_scm.h | 1 +
2 files changed, 24 insertions(+)
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -400,6 +400,29 @@ int qcom_scm_set_remote_state(u32 state,
}
EXPORT_SYMBOL(qcom_scm_set_remote_state);
+static int qcom_scm_disable_sdi(void)
+{
+ int ret;
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_SVC_BOOT,
+ .cmd = QCOM_SCM_BOOT_SDI_CONFIG,
+ .args[0] = 1, /* Disable watchdog debug */
+ .args[1] = 0, /* Disable SDI */
+ .arginfo = QCOM_SCM_ARGS(2),
+ .owner = ARM_SMCCC_OWNER_SIP,
+ };
+ struct qcom_scm_res res;
+
+ ret = qcom_scm_clk_enable();
+ if (ret)
+ return ret;
+ ret = qcom_scm_call(__scm->dev, &desc, &res);
+
+ qcom_scm_clk_disable();
+
+ return ret ? : res.result[0];
+}
+
static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
{
struct qcom_scm_desc desc = {
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device
#define QCOM_SCM_SVC_BOOT 0x01
#define QCOM_SCM_BOOT_SET_ADDR 0x01
#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
+#define QCOM_SCM_BOOT_SDI_CONFIG 0x09
#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
#define QCOM_SCM_BOOT_SET_ADDR_MC 0x11
#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a

View File

@ -1,34 +0,0 @@
From a658ad57c2b9d46eb5395c7bb8cf83b8e0f289e7 Mon Sep 17 00:00:00 2001
From: Brian Norris <computersforpeace@gmail.com>
Date: Fri, 28 Jul 2023 12:02:19 +0200
Subject: [PATCH 2/3] firmware: qcom: scm: disable SDI on Google WiFi
Google WiFi seems to have SDI (Secure Debug Image) enabled by default which
prevents normal reboot from working causing the board to just hang after
reboot is called.
So lets disable SDI during SCM probe on Google WiFi boards in order to
avoid a state where WDT will kick in and then the board will just hang
in the debug mode.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
---
drivers/firmware/qcom_scm.c | 7 +++++++
1 file changed, 7 insertions(+)
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -1435,6 +1435,13 @@ static int qcom_scm_probe(struct platfor
if (download_mode)
qcom_scm_set_download_mode(true);
+ /*
+ * Factory firmware leaves SDI (a debug interface), which prevents
+ * clean reboot.
+ */
+ if (of_machine_is_compatible("google,wifi"))
+ qcom_scm_disable_sdi();
+
return 0;
}

View File

@ -33,6 +33,10 @@ edgecore,ecw5410)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy0tpt"
;;
extreme,ap3935)
ucidef_set_led_netdev "wan" "wan" "orange:lan1" "eth1"
ucidef_set_led_netdev "lan" "lan" "orange:lan2" "eth0"
;;
meraki,mr52)
ucidef_set_led_netdev "eth0" "eth0" "green:lan1" "eth0"
ucidef_set_led_netdev "eth1" "eth1" "green:lan2" "eth1"

View File

@ -40,7 +40,8 @@ ipq806x_setup_interfaces()
tplink,onhub)
ucidef_set_interfaces_lan_wan "lan1" "wan"
;;
edgecore,ecw5410)
edgecore,ecw5410 |\
extreme,ap3935)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
qcom,ipq8064-ap161)

View File

@ -15,6 +15,11 @@ case "$board" in
ubnt,unifi-ac-hd)
macaddr_add $(mtd_get_mac_binary EEPROM 0x6) $(($PHYNBR + 1)) > /sys${DEVPATH}/macaddress
;;
extreme,ap3935)
echo "##### PHYNBR=$PHYNBR DEVPATH=$DEVPATH"
[ "$PHYNBR" = "0" ] && echo $(mtd_get_mac_ascii CFG1 RADIOADDR0) > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && echo $(mtd_get_mac_ascii CFG1 RADIOADDR1) > /sys${DEVPATH}/macaddress
;;
esac
OPATH=${DEVPATH##/devices/platform/}

View File

@ -12,6 +12,9 @@ boot() {
edgecore,ecw5410)
fw_setenv bootcount 0
;;
extreme,ap3935)
fw_setenv WATCHDOG_COUNT 0x00000000
;;
linksys,ea7500-v1 |\
linksys,ea8500)
mtd resetbc s_env || true

View File

@ -44,6 +44,11 @@ platform_do_upgrade() {
fi
nand_do_upgrade "$1"
;;
extreme,ap3935)
CI_ROOTPART="nand_flash"
CI_KERNPART="PriImg"
nand_do_upgrade "$1"
;;
linksys,ea7500-v1 |\
linksys,ea8500)
platform_do_upgrade_linksys "$1"

View File

@ -318,6 +318,7 @@ CONFIG_NVMEM_QCOM_QFPROM=y
# CONFIG_NVMEM_QCOM_SEC_QFPROM is not set
# CONFIG_NVMEM_SPMI_SDAM is not set
CONFIG_NVMEM_SYSFS=y
CONFIG_NVMEM_U_BOOT_ENV=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y

View File

@ -451,13 +451,23 @@
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
function-enumerator = <1>;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_AMBER>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
function-enumerator = <2>;
default-state = "keep";
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
function-enumerator = <3>;
default-state = "keep";
};
};
@ -477,13 +487,23 @@
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_AMBER>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
default-state = "keep";
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
default-state = "keep";
};
};
@ -503,13 +523,23 @@
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_AMBER>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
default-state = "keep";
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
default-state = "keep";
};
};
@ -529,13 +559,23 @@
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_AMBER>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
default-state = "keep";
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
default-state = "keep";
};
};
@ -555,13 +595,23 @@
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_AMBER>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
default-state = "keep";
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
default-state = "keep";
};
};

View File

@ -0,0 +1,351 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq8064-v2.0.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Extreme Networks AP3935";
compatible = "extreme,ap3935", "qcom,ipq8064";
memory@0 {
reg = <0x41400000 0x3ec00000>;
device_type = "memory";
};
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi2_serial;
mdio-gpio0 = &mdio0;
ethernet0 = &gmac0;
ethernet1 = &gmac2;
led-boot = &led_power_green;
led-failsafe = &led_power_orange;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-override = "ubi.block=0,0 root=/dev/ubiblock0_0";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset {
label = "reset";
gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_power_green: power_green {
label = "green:power";
gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
};
led_power_orange: power_orange {
label = "orange:power";
gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
};
led_wlan2g_green {
label = "green:wlan2g";
gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_wlan5g_green {
label = "green:wlan5g";
gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led_lan1_green {
label = "green:lan1";
gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
};
led_lan1_orange {
label = "orange:lan1";
gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>;
};
led_lan2_green {
label = "green:lan2";
gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
};
led_lan2_orange {
label = "orange:lan2";
gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>;
};
};
};
&qcom_pinmux {
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19";
function = "gsbi5";
drive-strength = <10>;
bias-pull-down;
};
clk {
pins = "gpio21";
function = "gsbi5";
drive-strength = <12>;
bias-pull-down;
};
cs {
pins = "gpio20";
function = "gpio";
drive-strength = <10>;
bias-pull-up;
};
};
led_pins: led_pins {
mux {
pins = "gpio22", "gpio23", "gpio24", "gpio25",
"gpio26", "gpio27", "gpio28", "gpio29";
function = "gpio";
drive-strength = <10>;
bias-pull-up;
};
};
button_pins: button_pins {
mux {
pins = "gpio56";
function = "gpio";
bias-pull-up;
};
};
};
&gsbi2 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
gsbi2_serial: serial@12490000 {
status = "okay";
};
};
&gsbi4 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
serial@16340000 {
status = "disabled";
};
};
&gsbi7 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
gsbi7_serial: serial@16640000 {
status = "okay";
};
};
&gsbi5 {
qcom,mode = <GSBI_PROT_SPI>;
status = "okay";
spi4: spi@1a280000 {
status = "okay";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
partitions {
compatible = "fixed-partitions";
cfg1@02a0000 {
compatible = "u-boot,env-redundant-bool";
label = "CFG1";
reg = <0x02a0000 0x0010000>;
ethaddr: ethaddr {
};
};
bootpri@02b0000 {
label = "BootPRI";
reg = <0x02b0000 0x0080000>;
};
cfg2@0330000 {
label = "CFG2";
reg = <0x0330000 0x0010000>;
};
fs@0340000 {
label = "FS";
reg = <0x0340000 0x0080000>;
};
priimg@03c0000 {
label = "PriImg";
reg = <0x03c0000 0x0e10000>;
};
secimg@11d0000 {
label = "SecImg";
reg = <0x11d0000 0x0e10000>;
};
};
};
};
};
&pcie0 {
status = "okay";
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
};
};
};
&pcie1 {
status = "okay";
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
};
};
};
&nand {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
compatible = "qcom,nandcs";
reg = <0>;
nand-ecc-strength = <8>;
nand-bus-width = <8>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
ubi@0 {
label = "ubi";
reg = <0x0000000 0x20000000>;
};
};
};
};
&soc {
mdio1: mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
};
};
&gmac0 {
status = "okay";
qcom,id = <0>;
mdiobus = <&mdio1>;
phy-mode = "rgmii";
phy-handle = <&phy1>;
nvmem-cells = <&ethaddr>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&gmac2 {
status = "okay";
qcom,id = <2>;
mdiobus = <&mdio1>;
phy-mode = "sgmii";
phy-handle = <&phy2>;
};
&adm_dma {
status = "okay";
};

View File

@ -160,6 +160,23 @@ define Device/edgecore_ecw5410
endef
TARGET_DEVICES += edgecore_ecw5410
define Device/extreme_ap3935
$(call Device/LegacyImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Extreme Networks
DEVICE_MODEL := AP3935
SOC := qcom-ipq8068
PAGESIZE := 2048
BLOCKSIZE := 128k
KERNEL = kernel-bin | append-dtb | uImage none | append-uImage-fakehdr filesystem
KERNEL_LOADADDR = 0x41408000
KERNEL_SIZE := 14400k
KERNEL_SUFFIX := -uImage
UBINIZE_OPTS := -E 5
DEVICE_PACKAGES := ath10k-firmware-qca99x0-ct
endef
TARGET_DEVICES += extreme_ap3935
define Device/linksys_ea7500-v1
$(call Device/LegacyImage)
$(Device/kernel-size-migration)

View File

@ -19,7 +19,7 @@
},
[PORT_NPCM] = {
.name = "Nuvoton 16550",
@@ -2763,6 +2763,11 @@ serial8250_do_set_termios(struct uart_po
@@ -2766,6 +2766,11 @@ serial8250_do_set_termios(struct uart_po
unsigned long flags;
unsigned int baud, quot, frac = 0;

View File

@ -0,0 +1,17 @@
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
@@ -319,7 +319,13 @@ static int mtk_pcie_startup_port(struct
msleep(100);
/* De-assert reset signals */
- val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
+ val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB);
+ writel_relaxed(val, port->base + PCIE_RST_CTRL_REG);
+
+ msleep(100);
+
+ /* De-assert PERST# signals */
+ val &= ~(PCIE_PE_RSTB);
writel_relaxed(val, port->base + PCIE_RST_CTRL_REG);
/* Check if the link is up or not */

View File

@ -72,7 +72,7 @@ Signed-off-by: Wolfram Sang <wsa@kernel.org>
idev->adapter.dev.parent = &pdev->dev;
--- a/drivers/i2c/busses/i2c-aspeed.c
+++ b/drivers/i2c/busses/i2c-aspeed.c
@@ -1024,7 +1024,7 @@ static int aspeed_i2c_probe_bus(struct p
@@ -1027,7 +1027,7 @@ static int aspeed_i2c_probe_bus(struct p
bus->adap.algo = &aspeed_i2c_algo;
bus->adap.dev.parent = &pdev->dev;
bus->adap.dev.of_node = pdev->dev.of_node;

View File

@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
@@ -1025,7 +1025,7 @@ static struct platform_driver mtk_pcie_d
@@ -1031,7 +1031,7 @@ static struct platform_driver mtk_pcie_d
.probe = mtk_pcie_probe,
.remove = mtk_pcie_remove,
.driver = {

View File

@ -19,7 +19,7 @@
},
[PORT_NPCM] = {
.name = "Nuvoton 16550",
@@ -2770,6 +2770,11 @@ serial8250_do_set_termios(struct uart_po
@@ -2773,6 +2773,11 @@ serial8250_do_set_termios(struct uart_po
unsigned long flags;
unsigned int baud, quot, frac = 0;

View File

@ -0,0 +1,17 @@
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
@@ -350,7 +350,13 @@ static int mtk_pcie_startup_port(struct
msleep(100);
/* De-assert reset signals */
- val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
+ val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB);
+ writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
+
+ msleep(100);
+
+ /* De-assert PERST# signals */
+ val &= ~(PCIE_PE_RSTB);
writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
/* Check if the link is up or not */

View File

@ -36,7 +36,7 @@
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -923,6 +923,8 @@ struct ata_port_operations {
@@ -927,6 +927,8 @@ struct ata_port_operations {
enum ata_completion_errors (*qc_prep)(struct ata_queued_cmd *qc);
unsigned int (*qc_issue)(struct ata_queued_cmd *qc);
bool (*qc_fill_rtf)(struct ata_queued_cmd *qc);
@ -45,7 +45,7 @@
/*
* Configuration and exception handling
@@ -1013,6 +1015,9 @@ struct ata_port_operations {
@@ -1017,6 +1019,9 @@ struct ata_port_operations {
void (*phy_reset)(struct ata_port *ap);
void (*eng_timeout)(struct ata_port *ap);

View File

@ -152,7 +152,7 @@ static void rtl83xx_vlan_setup(struct rtl838x_switch_priv *priv)
static void rtl83xx_setup_bpdu_traps(struct rtl838x_switch_priv *priv)
{
for (int i = 0; i < priv->cpu_port; i++)
priv->r->set_receive_management_action(i, BPDU, COPY2CPU);
priv->r->set_receive_management_action(i, BPDU, TRAP2CPU);
}
static void rtl83xx_port_set_salrn(struct rtl838x_switch_priv *priv,
@ -429,8 +429,11 @@ static void rtl93xx_phylink_validate(struct dsa_switch *ds, int port,
phylink_set(mask, 10000baseCR_Full);
}
if (state->interface == PHY_INTERFACE_MODE_USXGMII)
if (state->interface == PHY_INTERFACE_MODE_USXGMII) {
phylink_set(mask, 2500baseT_Full);
phylink_set(mask, 5000baseT_Full);
phylink_set(mask, 10000baseT_Full);
}
phylink_set(mask, 10baseT_Half);
phylink_set(mask, 10baseT_Full);
@ -559,7 +562,7 @@ static int rtl93xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
}
if (priv->family_id == RTL9310_FAMILY_ID
&& (port >= 52 || port <= 55)) { /* Internal serdes */
&& (port >= 52 && port <= 55)) { /* Internal serdes */
state->speed = SPEED_10000;
state->link = 1;
state->duplex = 1;

View File

@ -12,8 +12,8 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION)
PKG_SOURCE_VERSION:=7c32cb7dd88cf100b0b412163896e30aa2ee671a
PKG_MIRROR_HASH:=92afa3672e4af0c3ba9d360e9aaac60c094a0aad9334ef78a1fd2ee49f5e1b64
PKG_SOURCE_VERSION:=b4e23c75aea756b4bddc4abcf27a1c6dca8b6bd3
PKG_MIRROR_HASH:=4d5b3de6ec7b47427700f74fdb529e32083b54a512f6ca86ec824a61092ecdd4
PKG_SOURCE_URL:=https://sourceware.org/git/glibc.git
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-$(PKG_SOURCE_VERSION).tar.xz
PKG_CPE_ID:=cpe:/a:gnu:glibc