diff --git a/target/linux/sunxi/patches-4.19/023-cpufreq-dt-platdev-Add-allwinner-sun50i-h5-compatible.patch b/target/linux/sunxi/patches-4.19/023-cpufreq-dt-platdev-Add-allwinner-sun50i-h5-compatible.patch new file mode 100644 index 0000000000..7db08fc011 --- /dev/null +++ b/target/linux/sunxi/patches-4.19/023-cpufreq-dt-platdev-Add-allwinner-sun50i-h5-compatible.patch @@ -0,0 +1,21 @@ +From 1d78fb6bf60b011bd60ebc9d6ef9499f91c29267 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Thu, 30 Mar 2017 12:58:43 +0200 +Subject: [PATCH 08/82] cpufreq: dt-platdev: Add allwinner,sun50i-h5 compatible + +--- + drivers/cpufreq/cpufreq-dt-platdev.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c +index fe14c57de6ca..afb511aa5050 100644 +--- a/drivers/cpufreq/cpufreq-dt-platdev.c ++++ b/drivers/cpufreq/cpufreq-dt-platdev.c +@@ -29,6 +29,7 @@ static const struct of_device_id whitelist[] __initconst = { + { .compatible = "allwinner,sun8i-a23", }, + { .compatible = "allwinner,sun8i-a83t", }, + { .compatible = "allwinner,sun8i-h3", }, ++ { .compatible = "allwinner,sun50i-h5", }, + + { .compatible = "apm,xgene-shadowcat", }, + diff --git a/target/linux/sunxi/patches-4.19/321-ARM-dts-sun8i-h3-Add-clock-frequency.patch b/target/linux/sunxi/patches-4.19/321-ARM-dts-sun8i-h3-Add-clock-frequency.patch new file mode 100644 index 0000000000..66727a193b --- /dev/null +++ b/target/linux/sunxi/patches-4.19/321-ARM-dts-sun8i-h3-Add-clock-frequency.patch @@ -0,0 +1,48 @@ +From 0d1194aaf2b2ebc571cf01d2353d252c12146d2e Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Mon, 27 Jun 2016 16:08:26 +0200 +Subject: [PATCH 10/82] ARM: dts: sun8i-h3: Add clock-frequency + +To avoid error messages during boot. + +Signed-off-by: Ondrej Jirman +--- + arch/arm/boot/dts/sun8i-h3.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index f0096074a467..cb19ff797606 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -78,6 +78,7 @@ + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; ++ clock-frequency = <1200000000>; + }; + + cpu1: cpu@1 { +@@ -88,6 +89,7 @@ + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; ++ clock-frequency = <1200000000>; + }; + + cpu2: cpu@2 { +@@ -98,6 +100,7 @@ + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; ++ clock-frequency = <1200000000>; + }; + + cpu3: cpu@3 { +@@ -108,6 +111,7 @@ + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; ++ clock-frequency = <1200000000>; + }; + }; + diff --git a/target/linux/sunxi/patches-4.19/322-arm64-dts-sun50i-h5-Add-clock-frequency.patch b/target/linux/sunxi/patches-4.19/322-arm64-dts-sun50i-h5-Add-clock-frequency.patch new file mode 100644 index 0000000000..d764400af5 --- /dev/null +++ b/target/linux/sunxi/patches-4.19/322-arm64-dts-sun50i-h5-Add-clock-frequency.patch @@ -0,0 +1,30 @@ +From 6328da39df61f962190870089aaa171a7f8aab2c Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Thu, 30 Mar 2017 13:04:25 +0200 +Subject: [PATCH 11/82] arm64: dts: sun50i-h5: Add clock-frequency + +To avoid error messages during boot. + +Signed-off-by: Ondrej Jirman +--- + arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +index 62d646baac3c..4452ab873dec 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +@@ -76,6 +76,13 @@ + }; + }; + ++ reg_cpu_fallback: reg_cpu_fallback { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd-cpux-dummy"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ }; ++ + psci { + compatible = "arm,psci-0.2"; + method = "smc"; diff --git a/target/linux/sunxi/patches-4.19/323-arm-dts-sunxi-h3-h5-Move-CPU-OPP-table-to-dtsi-share.patch b/target/linux/sunxi/patches-4.19/323-arm-dts-sunxi-h3-h5-Move-CPU-OPP-table-to-dtsi-share.patch new file mode 100644 index 0000000000..a00018da29 --- /dev/null +++ b/target/linux/sunxi/patches-4.19/323-arm-dts-sunxi-h3-h5-Move-CPU-OPP-table-to-dtsi-share.patch @@ -0,0 +1,82 @@ +From d4028daf51824eb792fb3c9cc77553ff1edc5d68 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Mon, 14 May 2018 00:56:50 +0200 +Subject: [PATCH 12/82] ARM: dts: sunxi-h3-h5: Move CPU OPP table to dtsi + shared by H3/H5 + +It is identical for H3 and H5, so it better live there. + +Signed-off-by: Ondrej Jirman +--- + arch/arm/boot/dts/sun8i-h3.dtsi | 23 ----------------------- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 23 +++++++++++++++++++++++ + 2 files changed, 23 insertions(+), 23 deletions(-) + +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index cb19ff797606..261ca0356358 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -43,29 +43,6 @@ + #include "sunxi-h3-h5.dtsi" + + / { +- cpu0_opp_table: opp_table0 { +- compatible = "operating-points-v2"; +- opp-shared; +- +- opp-648000000 { +- opp-hz = /bits/ 64 <648000000>; +- opp-microvolt = <1040000 1040000 1300000>; +- clock-latency-ns = <244144>; /* 8 32k periods */ +- }; +- +- opp-816000000 { +- opp-hz = /bits/ 64 <816000000>; +- opp-microvolt = <1100000 1100000 1300000>; +- clock-latency-ns = <244144>; /* 8 32k periods */ +- }; +- +- opp-1008000000 { +- opp-hz = /bits/ 64 <1008000000>; +- opp-microvolt = <1200000 1200000 1300000>; +- clock-latency-ns = <244144>; /* 8 32k periods */ +- }; +- }; +- + cpus { + #address-cells = <1>; + #size-cells = <0>; +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index 13fe5e316136..539b69fecbe9 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -105,6 +105,29 @@ + }; + }; + ++ cpu0_opp_table: opp_table0 { ++ compatible = "operating-points-v2"; ++ opp-shared; ++ ++ opp@648000000 { ++ opp-hz = /bits/ 64 <648000000>; ++ opp-microvolt = <1040000 1040000 1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp@816000000 { ++ opp-hz = /bits/ 64 <816000000>; ++ opp-microvolt = <1100000 1100000 1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp@1008000000 { ++ opp-hz = /bits/ 64 <1008000000>; ++ opp-microvolt = <1200000 1200000 1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ }; ++ + de: display-engine { + compatible = "allwinner,sun8i-h3-display-engine"; + allwinner,pipelines = <&mixer0>; diff --git a/target/linux/sunxi/patches-4.19/324-arm-dts-sunxi-h3-h5-Add-more-CPU-OPP-for-H3-H5.patch b/target/linux/sunxi/patches-4.19/324-arm-dts-sunxi-h3-h5-Add-more-CPU-OPP-for-H3-H5.patch new file mode 100644 index 0000000000..4b37c934e0 --- /dev/null +++ b/target/linux/sunxi/patches-4.19/324-arm-dts-sunxi-h3-h5-Add-more-CPU-OPP-for-H3-H5.patch @@ -0,0 +1,54 @@ +From 9e05f3d014b05df39a55dfd6a08d4bd18a301307 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Mon, 14 May 2018 01:13:01 +0200 +Subject: [PATCH 13/82] ARM: dts: sunxi-h3-h5: Add more CPU OPP for H3/H5 + +These OPPs can be used with better cooling and/or thermal regulation. + +Signed-off-by: Ondrej Jirman +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 78 ++++++++++++++++++++++++++++++ + 1 file changed, 78 insertions(+) + +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index 539b69fecbe9..f47c22b622f9 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -109,6 +109,24 @@ + compatible = "operating-points-v2"; + opp-shared; + ++ opp@120000000 { ++ opp-hz = /bits/ 64 <120000000>; ++ opp-microvolt = <1040000 1040000 1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp@240000000 { ++ opp-hz = /bits/ 64 <240000000>; ++ opp-microvolt = <1040000 1040000 1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ ++ opp@480000000 { ++ opp-hz = /bits/ 64 <480000000>; ++ opp-microvolt = <1040000 1040000 1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ + opp@648000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <1040000 1040000 1300000>; +@@ -121,6 +139,12 @@ + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + ++ opp@960000000 { ++ opp-hz = /bits/ 64 <960000000>; ++ opp-microvolt = <1200000 1200000 1300000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ + opp@1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1200000 1200000 1300000>; diff --git a/target/linux/sunxi/patches-4.19/325-arm64-dts-sun50i-h5-Enable-cpufreq-dt-on-H5-CPU.patch b/target/linux/sunxi/patches-4.19/325-arm64-dts-sun50i-h5-Enable-cpufreq-dt-on-H5-CPU.patch new file mode 100644 index 0000000000..d494753f6c --- /dev/null +++ b/target/linux/sunxi/patches-4.19/325-arm64-dts-sun50i-h5-Enable-cpufreq-dt-on-H5-CPU.patch @@ -0,0 +1,50 @@ +From 25be6ff78bebfd869a3be0017715f101bd75bb64 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Mon, 14 May 2018 01:19:06 +0200 +Subject: [PATCH 15/82] arm64: dts: sun50i-h5: Enable cpufreq-dt on H5 CPU + +Uses OPPs shared with H3. + +Signed-off-by: Ondrej Jirman +--- + arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +index 60fc84a1fb44..acd90f390e88 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +@@ -52,6 +52,9 @@ + device_type = "cpu"; + reg = <0>; + enable-method = "psci"; ++ clocks = <&ccu CLK_CPUX>; ++ clock-names = "cpu"; ++ operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu@1 { +@@ -59,6 +62,7 @@ + device_type = "cpu"; + reg = <1>; + enable-method = "psci"; ++ operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu@2 { +@@ -66,6 +70,7 @@ + device_type = "cpu"; + reg = <2>; + enable-method = "psci"; ++ operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu@3 { +@@ -73,6 +78,7 @@ + device_type = "cpu"; + reg = <3>; + enable-method = "psci"; ++ operating-points-v2 = <&cpu0_opp_table>; + }; + }; +