diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index d23cca63e1..1f3d8ef833 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -52,6 +52,7 @@ rockchip_setup_macs() case "$board" in ezpro,mrkaio-m68s|\ + friendlyarm,nanopc-t6|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2s|\ lunzn,fastrhino-r66s|\ @@ -64,7 +65,6 @@ rockchip_setup_macs() wan_mac=$(macaddr_generate_from_mmc_cid mmcblk*) lan_mac=$(macaddr_add "$wan_mac" 1) ;; - friendlyarm,nanopc-t6|\ friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r4s|\ friendlyarm,nanopi-r5s|\ diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts deleted file mode 100644 index 7f01611b45..0000000000 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ /dev/null @@ -1,1105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyelec.com) - * - * Copyright (c) 2023 Thomas McKahan - * Copyright (c) 2023 Tianling Shen - */ - -/dts-v1/; - -#include -#include -#include -#include -#include -#include "rk3588.dtsi" - -/ { - model = "FriendlyElec NanoPC T6"; - compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; - - aliases { - mmc0 = &sdmmc; - mmc1 = &sdhci; - serial2 = &uart2; - - led-boot = &power_led; - led-failsafe = &power_led; - led-running = &power_led; - led-upgrade = &power_led; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - analog-sound { - compatible = "audio-graph-card"; - label = "realtek,rt5616-codec"; - - - widgets = "Headphone", "Headphones", - "Microphone", "Mic Jack"; - - routing = "Headphones", "HPOL", - "Headphones", "HPOR", - "MIC1", "Mic Jack", - "Mic Jack", "MICBIAS1"; - - dais = <&i2s0_8ch_p0>; - hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&hp_detect>; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&power_led_pin>, <&wan_led_pin>; - - power_led: led-power { - label = "red:power"; - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - }; - - led-wan { - label = "green:wan"; - gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; - }; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host_30: vcc5v0-host-30-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host_30"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc5v0_usb>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host30_en>; - }; - - vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie2x1l0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc5v0_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_0_vcc3v3_en>; - }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc5v0_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie3_vcc3v3_en>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_3v3_pcie20: vcc3v3-pcie20-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3_pcie20"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3_s3>; - }; - - vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <3000000>; - regulator-min-microvolt = <3000000>; - regulator-name = "vcc_3v3_sd_s0"; - enable-active-high; - gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc_3v3_s3>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_sd_en>; - }; - - vbus5v0_typec: vbus5v0-typec-regulator { - compatible = "regulator-fixed"; - regulator-name = "vbus5v0_typec"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc5v0_usb>; - pinctrl-names = "default"; - pinctrl-0 = <&vbus5v0_typec_en>; - }; - - vdd_4glte_3v3: vdd-4glte-3v3-regulator { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd_4glte_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - startup-delay-us = <10000>; - vin-supply = <&vcc5v0_sys>; - }; - -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy1_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; - mem-supply = <&vdd_cpu_lit_mem_s0>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; - mem-supply = <&vdd_cpu_big0_mem_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; - mem-supply = <&vdd_cpu_big1_mem_s0>; -}; - -&gpio0 { - gpio-line-names = /* GPIO0 A0-A7 */ - "", "", "", "", - "", "", "", "", - /* GPIO0 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO0 C0-C7 */ - "", "", "", "", - "HEADER_10", "HEADER_08", "HEADER_32", "", - /* GPIO0 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&gpio1 { - gpio-line-names = /* GPIO1 A0-A7 */ - "HEADER_27", "HEADER_28", "", "", - "", "", "", "HEADER_15", - /* GPIO1 B0-B7 */ - "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", - "HEADER_24", "HEADER_22", "", "", - /* GPIO1 C0-C7 */ - "", "", "", "", - "", "", "", "", - /* GPIO1 D0-D7 */ - "", "", "", "", - "", "", "HEADER_05", "HEADER_03"; -}; - -&gpio2 { - gpio-line-names = /* GPIO2 A0-A7 */ - "", "", "", "", - "", "", "", "", - /* GPIO2 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO2 C0-C7 */ - "", "CSI1_11", "CSI1_12", "", - "", "", "", "", - /* GPIO2 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&gpio3 { - gpio-line-names = /* GPIO3 A0-A7 */ - "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", - "HEADER_37", "", "DSI0_12", "", - /* GPIO3 B0-B7 */ - "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", - "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", - /* GPIO3 C0-C7 */ - "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", - "", "", "", "", - /* GPIO3 D0-D7 */ - "", "", "", "", - "", "DSI1_10", "", ""; -}; - -&gpio4 { - gpio-line-names = /* GPIO4 A0-A7 */ - "DSI1_08", "DSI1_14", "", "DSI1_12", - "", "", "", "", - /* GPIO4 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO4 C0-C7 */ - "", "", "", "", - "CSI0_11", "CSI0_12", "", "", - /* GPIO4 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - clock-frequency = <200000>; - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; - - usbc0: fusb302@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&usbc0_int>; - vbus-supply = <&vbus5v0_typec>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - usbc0_role_sw: endpoint@0 { - remote-endpoint = <&dwc3_0_role_switch>; - }; - }; - }; - - usb_con: connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - power-role = "dual"; - try-power-role = "sink"; - op-sink-microwatt = <1000000>; - sink-pdos = - ; - source-pdos = - ; - - altmodes { - #address-cells = <1>; - #size-cells = <0>; - - altmode@0 { - reg = <0>; - svid = <0xff01>; - vdo = <0xffffffff>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - usbc0_orien_sw: endpoint { - remote-endpoint = <&usbdp_phy0_orientation_switch>; - }; - }; - - port@1 { - reg = <1>; - dp_altmode_mux: endpoint { - remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; - }; - }; - }; - }; - }; -}; - -&i2c7 { - clock-frequency = <200000>; - status = "okay"; - - rt5616: audio-codec@1b { - compatible = "realtek,rt5616"; - reg = <0x1b>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - #sound-dai-cells = <0>; - - port { - rt5616_p0_0: endpoint { - remote-endpoint = <&i2s0_8ch_p0_0>; - }; - }; - }; -}; - -&i2s0_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; - - i2s0_8ch_p0: port { - i2s0_8ch_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&rt5616_p0_0>; - }; - }; -}; - -&pcie2x1l0 { - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie20>; - status = "okay"; - - pcie@0,0 { - reg = <0x00300000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_2: pcie@30,0 { - reg = <0x000000 0 0 0 0>; - label = "eth2"; - }; - }; -}; - -&pcie2x1l1 { - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; - status = "okay"; -}; - -&pcie2x1l2 { - reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie20>; - status = "okay"; - - pcie@0,0 { - reg = <0x00400000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_1: pcie@40,0 { - reg = <0x000000 0 0 0 0>; - label = "eth1"; - }; - }; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&pinctrl { - gpio-leds { - power_led_pin: power-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pcie2 { - pcie2_0_vcc3v3_en: pcie2-0-vcc-en { - rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie3 { - pcie3_vcc3v3_en: pcie3-vcc3v3-en { - rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rockchip-key { - reset_button_pin: reset-button-pin { - rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdmmc { - vcc3v3_sd_en: vcc3v3-sd-en { - rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sound { - hp_detect: hp-detect { - rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - usbc0_int: usbc0-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vbus5v0_typec_en: vbus5v0-typec-en { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_host30_en: vcc5v0-host30-en { - rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - }; -}; - -&rng { - status = "okay"; -}; - -&saradc { - vref-supply = <&avcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <200000000>; - mmc-hs200-1_8v; - no-sdio; - no-sd; - non-removable; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - no-sdio; - no-mmc; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; - vmmc-supply = <&vcc_3v3_sd_s0>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - num-cs = <1>; - - rk806single: rk806single@0 { - compatible = "rockchip,rk806"; - spi-max-frequency = <1000000>; - reg = <0x0>; - - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs1_slp: dvs1-slp-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun1"; - }; - - rk806_dvs1_pwrdn: dvs1-pwrdn-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun2"; - }; - - rk806_dvs1_rst: dvs1-rst-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun3"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_slp: dvs2-slp-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun1"; - }; - - rk806_dvs2_pwrdn: dvs2-pwrdn-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun2"; - }; - - rk806_dvs2_rst: dvs2-rst-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun3"; - }; - - rk806_dvs2_dvs: dvs2-dvs-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun4"; - }; - - rk806_dvs2_gpio: dvs2-gpio-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun5"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - rk806_dvs3_slp: dvs3-slp-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun1"; - }; - - rk806_dvs3_pwrdn: dvs3-pwrdn-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun2"; - }; - - rk806_dvs3_rst: dvs3-rst-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun3"; - }; - - rk806_dvs3_dvs: dvs3-dvs-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun4"; - }; - - rk806_dvs3_gpio: dvs3-gpio-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun5"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_log_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-init-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_2v0_pldo_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_3v3_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "avcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "avdd_1v2_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_sd_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "pldo6_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_ddr_pll_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "avdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_0v85_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&u2phy1 { - status = "okay"; -}; - -&u2phy1_otg { - phy-supply = <&vcc5v0_host_30>; - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - status = "okay"; -}; - -&usbdp_phy0 { - orientation-switch; - mode-switch; - rockchip,dp-lane-mux = <0 1 2 3>; - svid = <0xff01>; - sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; - sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; - - usbdp_phy0_orientation_switch: endpoint@0 { - reg = <0>; - remote-endpoint = <&usbc0_orien_sw>; - }; - - usbdp_phy0_dp_altmode_mux: endpoint@1 { - reg = <1>; - remote-endpoint = <&dp_altmode_mux>; - }; - }; -}; - -&usbdp_phy0_dp { - status = "okay"; -}; - -&usbdp_phy0_u3 { - status = "okay"; -}; - -&usbdp_phy1 { - status = "okay"; -}; - -&usbdp_phy1_u3 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "host"; - usb-role-switch; - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; - dwc3_0_role_switch: endpoint@0 { - reg = <0>; - remote-endpoint = <&usbc0_role_sw>; - }; - }; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; diff --git a/target/linux/rockchip/patches-6.1/054-01-v6.6-arm64-dts-rockchip-Add-NanoPC-T6.patch b/target/linux/rockchip/patches-6.1/054-01-v6.6-arm64-dts-rockchip-Add-NanoPC-T6.patch new file mode 100644 index 0000000000..20ed7f95e7 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/054-01-v6.6-arm64-dts-rockchip-Add-NanoPC-T6.patch @@ -0,0 +1,874 @@ +From 893c17716d0cf68f5ff4dc71c90e0c2bd1f7da46 Mon Sep 17 00:00:00 2001 +From: Thomas McKahan +Date: Wed, 9 Aug 2023 07:21:17 -0400 +Subject: [PATCH] arm64: dts: rockchip: Add NanoPC T6 + +Add the NanoPC T6, a single board computer from FriendlyElec based on +the RK3588. + +Initial device tree supports debug UART, SD, eMMC, PCIe 3, PMIC, +and 40 pin GPIO assignments. + +Signed-off-by: Thomas McKahan +Link: https://lore.kernel.org/r/20230809112120.99-3-tmckahan@singleboardsolutions.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 842 ++++++++++++++++++ + 2 files changed, 843 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -82,5 +82,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-na + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -0,0 +1,842 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2023 Thomas McKahan ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include "rk3588.dtsi" ++ ++/ { ++ model = "FriendlyElec NanoPC-T6"; ++ compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; ++ ++ aliases { ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc; ++ serial2 = &uart2; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ sys_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "system-led"; ++ linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sys_led_pin>; ++ }; ++ ++ usr_led: led-1 { ++ gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; ++ label = "user-led"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usr_led_pin>; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det>; ++ ++ simple-audio-card,name = "realtek,rt5616-codec"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; ++ simple-audio-card,hp-pin-name = "Headphones"; ++ ++ simple-audio-card,widgets = ++ "Headphone", "Headphones", ++ "Microphone", "Microphone Jack"; ++ simple-audio-card,routing = ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "MIC1", "Microphone Jack", ++ "Microphone Jack", "micbias1"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rt5616>; ++ }; ++ }; ++ ++ vcc12v_dcin: vcc12v-dcin-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ /* vcc5v0_sys powers peripherals */ ++ vcc5v0_sys: vcc5v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ /* vcc4v0_sys powers the RK806, RK860's */ ++ vcc4v0_sys: vcc4v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc4v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <4000000>; ++ regulator-max-microvolt = <4000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-1v1-nldo-s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc4v0_sys>; ++ }; ++ ++ vbus5v0_typec: vbus5v0-typec-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&typec5v_pwren>; ++ regulator-name = "vbus5v0_typec"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_pcie30: vcc3v3-pcie30-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_m2_0_pwren>; ++ regulator-name = "vcc3v3_pcie30"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_b0{ ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b1{ ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b2{ ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_b3{ ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&gpio0 { ++ gpio-line-names = /* GPIO0 A0-A7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO0 B0-B7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO0 C0-C7 */ ++ "", "", "", "", ++ "HEADER_10", "HEADER_08", "HEADER_32", "", ++ /* GPIO0 D0-D7 */ ++ "", "", "", "", ++ "", "", "", ""; ++}; ++ ++&gpio1 { ++ gpio-line-names = /* GPIO1 A0-A7 */ ++ "HEADER_27", "HEADER_28", "", "", ++ "", "", "", "HEADER_15", ++ /* GPIO1 B0-B7 */ ++ "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", ++ "HEADER_24", "HEADER_22", "", "", ++ /* GPIO1 C0-C7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO1 D0-D7 */ ++ "", "", "", "", ++ "", "", "HEADER_05", "HEADER_03"; ++}; ++ ++&gpio2 { ++ gpio-line-names = /* GPIO2 A0-A7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO2 B0-B7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO2 C0-C7 */ ++ "", "CSI1_11", "CSI1_12", "", ++ "", "", "", "", ++ /* GPIO2 D0-D7 */ ++ "", "", "", "", ++ "", "", "", ""; ++}; ++ ++&gpio3 { ++ gpio-line-names = /* GPIO3 A0-A7 */ ++ "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", ++ "HEADER_37", "", "DSI0_12", "", ++ /* GPIO3 B0-B7 */ ++ "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", ++ "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", ++ /* GPIO3 C0-C7 */ ++ "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", ++ "", "", "", "", ++ /* GPIO3 D0-D7 */ ++ "", "", "", "", ++ "", "DSI1_10", "", ""; ++}; ++ ++&gpio4 { ++ gpio-line-names = /* GPIO4 A0-A7 */ ++ "DSI1_08", "DSI1_14", "", "DSI1_12", ++ "", "", "", "", ++ /* GPIO4 B0-B7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO4 C0-C7 */ ++ "", "", "", "", ++ "CSI0_11", "CSI0_12", "", "", ++ /* GPIO4 D0-D7 */ ++ "", "", "", "", ++ "", "", "", ""; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0m2_xfer>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc4v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: regulator@43 { ++ compatible = "rockchip,rk8603", "rockchip,rk8602"; ++ reg = <0x43>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc4v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ ++ vdd_npu_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_npu_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc4v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c6 { ++ clock-frequency = <200000>; ++ status = "okay"; ++ ++ fusb302: typec-portc@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-0 = <&usbc0_int>; ++ pinctrl-names = "default"; ++ vbus-supply = <&vbus5v0_typec>; ++ ++ connector { ++ compatible = "usb-c-connector"; ++ data-role = "dual"; ++ label = "USB-C"; ++ power-role = "dual"; ++ try-power-role = "sink"; ++ source-pdos = ; ++ sink-pdos = ; ++ op-sink-microwatt = <1000000>; ++ }; ++ }; ++ ++ hym8563: rtc@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ wakeup-source; ++ }; ++}; ++ ++&i2c7 { ++ clock-frequency = <200000>; ++ status = "okay"; ++ ++ rt5616: codec@1b { ++ compatible = "realtek,rt5616"; ++ reg = <0x1b>; ++ clocks = <&cru I2S0_8CH_MCLKOUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clock-rates = <12288000>; ++ ++ port { ++ rt5616_p0_0: endpoint { ++ remote-endpoint = <&i2s0_8ch_p0_0>; ++ }; ++ }; ++ }; ++ ++ /* connected with MIPI-CSI1 */ ++}; ++ ++&i2c8 { ++ pinctrl-0 = <&i2c8m2_xfer>; ++}; ++ ++&i2s0_8ch { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_mclk ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++ status = "okay"; ++ ++ i2s0_8ch_p0: port { ++ i2s0_8ch_p0_0: endpoint { ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ remote-endpoint = <&rt5616_p0_0>; ++ }; ++ }; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++}; ++ ++&pcie3x4 { ++ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie30>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gpio-leds { ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ usr_led_pin: usr-led-pin { ++ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pcie { ++ pcie_m2_0_pwren: pcie-m20-pwren { ++ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ typec5v_pwren: typec5v-pwren { ++ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ usbc0_int: usbc0-int { ++ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm1 { ++ pinctrl-0 = <&pwm1m1_pins>; ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&avcc_1v8_s0>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ max-frequency = <200000000>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ max-frequency = <200000000>; ++ no-sdio; ++ no-mmc; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3_s3>; ++ vqmmc-supply = <&vccio_sd_s0>; ++ status = "okay"; ++}; ++ ++&spi2 { ++ status = "okay"; ++ assigned-clocks = <&cru CLK_SPI2>; ++ assigned-clock-rates = <200000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; ++ num-cs = <1>; ++ ++ pmic@0 { ++ compatible = "rockchip,rk806"; ++ spi-max-frequency = <1000000>; ++ reg = <0x0>; ++ ++ interrupt-parent = <&gpio0>; ++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, ++ <&rk806_dvs2_null>, <&rk806_dvs3_null>; ++ ++ vcc1-supply = <&vcc4v0_sys>; ++ vcc2-supply = <&vcc4v0_sys>; ++ vcc3-supply = <&vcc4v0_sys>; ++ vcc4-supply = <&vcc4v0_sys>; ++ vcc5-supply = <&vcc4v0_sys>; ++ vcc6-supply = <&vcc4v0_sys>; ++ vcc7-supply = <&vcc4v0_sys>; ++ vcc8-supply = <&vcc4v0_sys>; ++ vcc9-supply = <&vcc4v0_sys>; ++ vcc10-supply = <&vcc4v0_sys>; ++ vcc11-supply = <&vcc_2v0_pldo_s3>; ++ vcc12-supply = <&vcc4v0_sys>; ++ vcc13-supply = <&vcc_1v1_nldo_s3>; ++ vcc14-supply = <&vcc_1v1_nldo_s3>; ++ vcca-supply = <&vcc4v0_sys>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk806_dvs1_null: dvs1-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs2_null: dvs2-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs3_null: dvs3-null-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun0"; ++ }; ++ ++ regulators { ++ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_gpu_s0"; ++ regulator-enable-ramp-delay = <400>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_cpu_lit_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_log_s0: dcdc-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_log_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-init-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_vdenc_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_ddr_s0: dcdc-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <900000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vdd2_ddr_s3: dcdc-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vdd2_ddr_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_2v0_pldo_s3: dcdc-reg7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2000000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_2v0_pldo_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <2000000>; ++ }; ++ }; ++ ++ vcc_3v3_s3: dcdc-reg8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vddq_ddr_s0: dcdc-reg9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vddq_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s3: dcdc-reg10 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avcc_1v8_s0: pldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "avcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s0: pldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avdd_1v2_s0: pldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "avdd_1v2_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3_s0: pldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vcc_3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd_s0: pldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vccio_sd_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ pldo6_s3: pldo-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "pldo6_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_0v75_s3: nldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_ddr_pll_s0: nldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_ddr_pll_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ avdd_0v75_s0: nldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "avdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v85_s0: nldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_0v85_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v75_s0: nldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-0 = <&uart2m0_xfer>; ++ status = "okay"; ++}; ++ ++&u2phy2_host { ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ status = "okay"; ++}; ++ ++&u2phy2 { ++ status = "okay"; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-6.1/054-02-v6.6-arm64-dts-rockchip-Add-NanoPC-T6-PCIe-Ethernet-support.patch b/target/linux/rockchip/patches-6.1/054-02-v6.6-arm64-dts-rockchip-Add-NanoPC-T6-PCIe-Ethernet-support.patch new file mode 100644 index 0000000000..6715de1223 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/054-02-v6.6-arm64-dts-rockchip-Add-NanoPC-T6-PCIe-Ethernet-support.patch @@ -0,0 +1,90 @@ +From a721e28dfad2dec895a5aada85fb0fac0223e2d2 Mon Sep 17 00:00:00 2001 +From: John Clark +Date: Thu, 10 Aug 2023 00:31:56 +0000 +Subject: [PATCH] arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support + +Device tree entries for PCIe 2.5G Ethernet NICs + +Signed-off-by: John Clark +Link: https://lore.kernel.org/r/20230810003156.22123-1-inindev@gmail.com +Signed-off-by: Heiko Stuebner +--- + .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 46 +++++++++++++++++++ + 1 file changed, 46 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -115,6 +115,16 @@ + vin-supply = <&vcc4v0_sys>; + }; + ++ vcc_3v3_pcie20: vcc3v3-pcie20-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3_pcie20"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ + vbus5v0_typec: vbus5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -140,6 +150,18 @@ + }; + }; + ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy1_ps { ++ status = "okay"; ++}; ++ ++&combphy2_psu { ++ status = "okay"; ++}; ++ + &cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; + }; +@@ -391,6 +413,22 @@ + }; + }; + ++&pcie2x1l0 { ++ reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc_3v3_pcie20>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie2_0_rst>; ++ status = "okay"; ++}; ++ ++&pcie2x1l2 { ++ reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc_3v3_pcie20>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie2_2_rst>; ++ status = "okay"; ++}; ++ + &pcie30phy { + status = "okay"; + }; +@@ -425,6 +463,14 @@ + }; + + pcie { ++ pcie2_0_rst: pcie2-0-rst { ++ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie2_2_rst: pcie2-2-rst { ++ rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ + pcie_m2_0_pwren: pcie-m20-pwren { + rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; diff --git a/target/linux/rockchip/patches-6.1/054-03-v6.7-arm64-dts-rockchip-Add-NanoPC-T6-PCIe-e-key-support.patch b/target/linux/rockchip/patches-6.1/054-03-v6.7-arm64-dts-rockchip-Add-NanoPC-T6-PCIe-e-key-support.patch new file mode 100644 index 0000000000..f5cda50f81 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/054-03-v6.7-arm64-dts-rockchip-Add-NanoPC-T6-PCIe-e-key-support.patch @@ -0,0 +1,88 @@ +From ac76b786cc370b000c76f3115a5d2ee76ff05c08 Mon Sep 17 00:00:00 2001 +From: John Clark +Date: Wed, 6 Sep 2023 01:23:05 +0000 +Subject: [PATCH] arm64: dts: rockchip: Add NanoPC T6 PCIe e-key support + +before +~~~~ +0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) +0002:20:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) +0002:21:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) +0004:40:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) +0004:41:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) + +after +~~~ +0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) +0002:20:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) +0002:21:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) +0003:30:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) +0003:31:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8822CE 802.11ac PCIe Wireless Network Adapter +0004:40:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) +0004:41:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) + +Signed-off-by: John Clark +Link: https://lore.kernel.org/r/20230906012305.7113-1-inindev@gmail.com +Signed-off-by: Heiko Stuebner +--- + .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 28 +++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -137,6 +137,18 @@ + vin-supply = <&vcc5v0_sys>; + }; + ++ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_m2_1_pwren>; ++ regulator-name = "vcc3v3_pcie2x1l0"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ + vcc3v3_pcie30: vcc3v3-pcie30-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -421,6 +433,14 @@ + status = "okay"; + }; + ++&pcie2x1l1 { ++ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie2_1_rst>; ++ status = "okay"; ++}; ++ + &pcie2x1l2 { + reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc_3v3_pcie20>; +@@ -467,6 +487,10 @@ + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + ++ pcie2_1_rst: pcie2-1-rst { ++ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ + pcie2_2_rst: pcie2-2-rst { + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; +@@ -474,6 +498,10 @@ + pcie_m2_0_pwren: pcie-m20-pwren { + rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; ++ ++ pcie_m2_1_pwren: pcie-m21-pwren { ++ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; + }; + + usb { diff --git a/target/linux/rockchip/patches-6.1/100-rockchip-use-system-LED-for-OpenWrt.patch b/target/linux/rockchip/patches-6.1/100-rockchip-use-system-LED-for-OpenWrt.patch index 0955438b7a..8e99d9c8d1 100644 --- a/target/linux/rockchip/patches-6.1/100-rockchip-use-system-LED-for-OpenWrt.patch +++ b/target/linux/rockchip/patches-6.1/100-rockchip-use-system-LED-for-OpenWrt.patch @@ -336,6 +336,45 @@ Signed-off-by: David Bauer rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; }; }; +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -20,6 +20,11 @@ + mmc0 = &sdhci; + mmc1 = &sdmmc; + serial2 = &uart2; ++ ++ led-boot = &sys_led; ++ led-failsafe = &sys_led; ++ led-running = &sys_led; ++ led-upgrade = &sys_led; + }; + + chosen { +@@ -28,20 +33,17 @@ + + leds { + compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sys_led_pin>, <&usr_led_pin>; + + sys_led: led-0 { ++ label = "red:system"; + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; +- label = "system-led"; +- linux,default-trigger = "heartbeat"; +- pinctrl-names = "default"; +- pinctrl-0 = <&sys_led_pin>; + }; + + usr_led: led-1 { ++ label = "green:wan"; + gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; +- label = "user-led"; +- pinctrl-names = "default"; +- pinctrl-0 = <&usr_led_pin>; + }; + }; + --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -15,6 +15,11 @@ diff --git a/target/linux/rockchip/patches-6.1/103-arm64-dts-rockchip-lower-mmc-speed.patch b/target/linux/rockchip/patches-6.1/103-arm64-dts-rockchip-lower-mmc-speed.patch index b784bf1fc2..18b93f9c79 100644 --- a/target/linux/rockchip/patches-6.1/103-arm64-dts-rockchip-lower-mmc-speed.patch +++ b/target/linux/rockchip/patches-6.1/103-arm64-dts-rockchip-lower-mmc-speed.patch @@ -34,6 +34,27 @@ Signed-off-by: David Bauer &u2phy0_host { phy-supply = <&vdd_5v>; }; +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -533,8 +533,7 @@ + no-sd; + non-removable; + max-frequency = <200000000>; +- mmc-hs400-1_8v; +- mmc-hs400-enhanced-strobe; ++ mmc-hs200-1_8v; + status = "okay"; + }; + +@@ -546,7 +545,7 @@ + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; +- sd-uhs-sdr104; ++ sd-uhs-sdr50; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -360,8 +360,7 @@ diff --git a/target/linux/rockchip/patches-6.1/120-06-arm64-dts-rockchip-enable-RK3588-tsadc-by-default.patch b/target/linux/rockchip/patches-6.1/120-06-arm64-dts-rockchip-enable-RK3588-tsadc-by-default.patch new file mode 100644 index 0000000000..2db6bd32b1 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/120-06-arm64-dts-rockchip-enable-RK3588-tsadc-by-default.patch @@ -0,0 +1,22 @@ +From efdf918a1667bf01b167eb98d582d75e14147903 Mon Sep 17 00:00:00 2001 +From: Sebastian Reichel +Date: Thu, 25 May 2023 19:45:02 +0200 +Subject: [PATCH] arm64: dts: rockchip: enable RK3588 tsadc by default + +Enable the thermal ADC for all boards. + +Signed-off-by: Sebastian Reichel +--- + arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +@@ -2617,7 +2617,6 @@ + pinctrl-1 = <&tsadc_shut>; + pinctrl-names = "gpio", "otpout"; + #thermal-sensor-cells = <1>; +- status = "disabled"; + }; + + saradc: adc@fec10000 { diff --git a/target/linux/rockchip/patches-6.1/124-01-arm64-dts-rockchip-nanopc-t6-cpu-mem-regulator-info.patch b/target/linux/rockchip/patches-6.1/124-01-arm64-dts-rockchip-nanopc-t6-cpu-mem-regulator-info.patch new file mode 100644 index 0000000000..b522ca1fb3 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/124-01-arm64-dts-rockchip-nanopc-t6-cpu-mem-regulator-info.patch @@ -0,0 +1,45 @@ +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -178,34 +178,42 @@ + + &cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; ++ mem-supply = <&vdd_cpu_lit_mem_s0>; + }; + + &cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; ++ mem-supply = <&vdd_cpu_lit_mem_s0>; + }; + + &cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; ++ mem-supply = <&vdd_cpu_lit_mem_s0>; + }; + + &cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; ++ mem-supply = <&vdd_cpu_lit_mem_s0>; + }; + + &cpu_b0{ + cpu-supply = <&vdd_cpu_big0_s0>; ++ mem-supply = <&vdd_cpu_big0_s0>; + }; + + &cpu_b1{ + cpu-supply = <&vdd_cpu_big0_s0>; ++ mem-supply = <&vdd_cpu_big0_s0>; + }; + + &cpu_b2{ + cpu-supply = <&vdd_cpu_big1_s0>; ++ mem-supply = <&vdd_cpu_big1_s0>; + }; + + &cpu_b3{ + cpu-supply = <&vdd_cpu_big1_s0>; ++ mem-supply = <&vdd_cpu_big1_s0>; + }; + + &gpio0 { diff --git a/target/linux/rockchip/patches-6.1/124-02-arm64-dts-rockchip-nanopc-t6-add-lower-USB3-port.patch b/target/linux/rockchip/patches-6.1/124-02-arm64-dts-rockchip-nanopc-t6-add-lower-USB3-port.patch new file mode 100644 index 0000000000..7c729ee81a --- /dev/null +++ b/target/linux/rockchip/patches-6.1/124-02-arm64-dts-rockchip-nanopc-t6-add-lower-USB3-port.patch @@ -0,0 +1,88 @@ +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -107,6 +107,28 @@ + vin-supply = <&vcc12v_dcin>; + }; + ++ vcc5v0_usb: vcc5v0-usb-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_host_30: vcc5v0-host-30-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host_30"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc5v0_usb>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host30_en>; ++ }; ++ + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc-1v1-nldo-s3"; +@@ -522,6 +544,10 @@ + usbc0_int: usbc0-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; ++ ++ vcc5v0_host30_en: vcc5v0-host30-en { ++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; + }; + }; + +@@ -892,6 +918,11 @@ + status = "okay"; + }; + ++&u2phy1_otg { ++ phy-supply = <&vcc5v0_host_30>; ++ status = "okay"; ++}; ++ + &u2phy2_host { + status = "okay"; + }; +@@ -900,6 +931,10 @@ + status = "okay"; + }; + ++&u2phy1 { ++ status = "okay"; ++}; ++ + &u2phy2 { + status = "okay"; + }; +@@ -908,6 +943,14 @@ + status = "okay"; + }; + ++&usbdp_phy1 { ++ status = "okay"; ++}; ++ ++&usbdp_phy1_u3 { ++ status = "okay"; ++}; ++ + &usb_host0_ehci { + status = "okay"; + }; +@@ -923,3 +966,7 @@ + &usb_host1_ohci { + status = "okay"; + }; ++ ++&usb_host1_xhci { ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-6.1/124-03-arm64-dts-rockchip-nanopc-t6-add-USB-C-support.patch b/target/linux/rockchip/patches-6.1/124-03-arm64-dts-rockchip-nanopc-t6-add-USB-C-support.patch new file mode 100644 index 0000000000..be094f69f3 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/124-03-arm64-dts-rockchip-nanopc-t6-add-USB-C-support.patch @@ -0,0 +1,129 @@ +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -396,6 +396,48 @@ + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <1000000>; ++ ++ altmodes { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ altmode@0 { ++ reg = <0>; ++ svid = <0xff01>; ++ vdo = <0xffffffff>; ++ }; ++ }; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ usbc0_orien_sw: endpoint { ++ remote-endpoint = <&usbdp_phy0_orientation_switch>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ dp_altmode_mux: endpoint { ++ remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; ++ }; ++ }; ++ }; ++ }; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ usbc0_role_sw: endpoint@0 { ++ remote-endpoint = <&usb_host0_xhci_role_switch>; ++ }; ++ }; + }; + }; + +@@ -918,6 +960,10 @@ + status = "okay"; + }; + ++&u2phy0_otg { ++ status = "okay"; ++}; ++ + &u2phy1_otg { + phy-supply = <&vcc5v0_host_30>; + status = "okay"; +@@ -931,6 +977,10 @@ + status = "okay"; + }; + ++&u2phy0 { ++ status = "okay"; ++}; ++ + &u2phy1 { + status = "okay"; + }; +@@ -943,6 +993,33 @@ + status = "okay"; + }; + ++&usbdp_phy0 { ++ orientation-switch; ++ rockchip,dp-lane-mux = <0 1 2 3 >; ++ svid = <0xff01>; ++ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ++ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ usbdp_phy0_orientation_switch: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&usbc0_orien_sw>; ++ }; ++ ++ usbdp_phy0_dp_altmode_mux: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&dp_altmode_mux>; ++ }; ++ }; ++}; ++ ++&usbdp_phy0_u3 { ++ status = "okay"; ++}; ++ + &usbdp_phy1 { + status = "okay"; + }; +@@ -959,6 +1036,21 @@ + status = "okay"; + }; + ++&usb_host0_xhci { ++ dr_mode = "host"; ++ usb-role-switch; ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ usb_host0_xhci_role_switch: endpoint { ++ remote-endpoint = <&usbc0_role_sw>; ++ }; ++ }; ++}; ++ + &usb_host1_ehci { + status = "okay"; + }; diff --git a/target/linux/rockchip/patches-6.1/610-arm64-rockchip-add-OF-node-for-eth.patch b/target/linux/rockchip/patches-6.1/610-arm64-rockchip-add-OF-node-for-eth.patch index ec02ce8071..414b9bb1a8 100644 --- a/target/linux/rockchip/patches-6.1/610-arm64-rockchip-add-OF-node-for-eth.patch +++ b/target/linux/rockchip/patches-6.1/610-arm64-rockchip-add-OF-node-for-eth.patch @@ -174,3 +174,41 @@ Signed-off-by: David Bauer }; }; +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -505,6 +505,17 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_0_rst>; + status = "okay"; ++ ++ pcie@0,0 { ++ reg = <0x00200000 0 0 0 0>; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ ++ rtl8125_2: pcie@20,0 { ++ reg = <0x000000 0 0 0 0>; ++ label = "eth2"; ++ }; ++ }; + }; + + &pcie2x1l1 { +@@ -521,6 +532,17 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_rst>; + status = "okay"; ++ ++ pcie@0,0 { ++ reg = <0x00400000 0 0 0 0>; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ ++ rtl8125_1: pcie@40,0 { ++ reg = <0x000000 0 0 0 0>; ++ label = "eth1"; ++ }; ++ }; + }; + + &pcie30phy { diff --git a/target/linux/rockchip/patches-6.1/801-07-arm64-dts-rockchip-enable-hwrng-for-rockchip-boards.patch b/target/linux/rockchip/patches-6.1/801-07-arm64-dts-rockchip-enable-hwrng-for-rockchip-boards.patch index 8d6c651db3..c65128dfa8 100644 --- a/target/linux/rockchip/patches-6.1/801-07-arm64-dts-rockchip-enable-hwrng-for-rockchip-boards.patch +++ b/target/linux/rockchip/patches-6.1/801-07-arm64-dts-rockchip-enable-hwrng-for-rockchip-boards.patch @@ -50,6 +50,19 @@ &saradc { vref-supply = <&vcca_1v8>; status = "okay"; +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -620,6 +620,10 @@ + status = "okay"; + }; + ++&rng { ++ status = "okay"; ++}; ++ + &saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -431,6 +431,10 @@ @@ -63,3 +76,16 @@ &saradc { vref-supply = <&avcc_1v8_s0>; status = "okay"; +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +@@ -358,6 +358,10 @@ + status = "okay"; + }; + ++&rng { ++ status = "okay"; ++}; ++ + &saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; diff --git a/target/linux/rockchip/patches-6.1/900-arm64-boot-add-dts-files.patch b/target/linux/rockchip/patches-6.1/900-arm64-boot-add-dts-files.patch index 98fc7ca0b4..d3096b4f80 100644 --- a/target/linux/rockchip/patches-6.1/900-arm64-boot-add-dts-files.patch +++ b/target/linux/rockchip/patches-6.1/900-arm64-boot-add-dts-files.patch @@ -16,7 +16,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s-enterprise.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb -@@ -77,10 +79,14 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp +@@ -77,6 +79,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb @@ -24,9 +24,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb +@@ -84,4 +87,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ro dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb