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ramips: sync upstream source code

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This commit is contained in:
AmadeusGhost 2020-03-10 15:55:08 +08:00
parent 1ec2ee7211
commit abe8be8efe
28 changed files with 214 additions and 169 deletions
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89
target/linux/ramips/dts/mt7620a_tplink_re200-v1.dts
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@ -1,10 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7620a_tplink_re2x0-v1.dtsi"
/ {
compatible = "tplink,re200-v1", "ralink,mt7620a-soc";
@ -15,11 +12,6 @@
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &ethernet;
};
chosen {
bootargs = "console=ttyS0,57600n8";
};
leds {
@ -56,22 +48,6 @@
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
@ -82,46 +58,6 @@
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x20000 0x7c0000>;
};
partition@7e0000 {
label = "userconfig";
reg = <0x7e0000 0x10000>;
read-only;
};
radio: partition@7f0000 {
label = "radio";
reg = <0x7f0000 0x10000>;
read-only;
};
};
};
};
&gpio1 {
status = "okay";
};
@ -133,26 +69,3 @@
&gpio3 {
status = "okay";
};
&ethernet {
mtd-mac-address = <&uboot 0x1fc00>;
};
&wmac {
ralink,mtd-eeprom = <&radio 0x0>;
mtd-mac-address = <&uboot 0x1fc00>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <2>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

95
target/linux/ramips/dts/mt7620a_tplink_re210-v1.dts Normal file
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@ -0,0 +1,95 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7620a_tplink_re2x0-v1.dtsi"
/ {
compatible = "tplink,re210-v1", "ralink,mt7620a-soc";
model = "TP-Link RE210 v1";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "re210-v1:green:power";
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
};
rssi_high {
label = "re210-v1:green:rssi-high";
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
rssi_low {
label = "re210-v1:red:rssi-low";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "re210-v1:green:wlan2g";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wlan5g {
label = "re210-v1:green:wlan5g";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};
&keys {
led_power {
label = "LED power";
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
};
&state_default {
gpio {
ralink,group = "i2c", "uartf", "wled", "rgmii1";
ralink,function = "gpio";
};
};
&gsw {
mediatek,port4 = "gmac";
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins &mdio_pins>;
port@4 {
status = "okay";
phy-handle = <&phy4>;
phy-mode = "rgmii";
};
mdio-bus {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
};
&gpio1 {
status = "okay";
};
&gpio3 {
status = "okay";
};

95
target/linux/ramips/dts/mt7620a_tplink_re2x0-v1.dtsi Normal file
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@ -0,0 +1,95 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
label-mac-device = &ethernet;
};
chosen {
bootargs = "console=ttyS0,57600n8";
};
keys: keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x20000 0x7c0000>;
};
partition@7e0000 {
label = "config";
reg = <0x7e0000 0x10000>;
read-only;
};
radio: partition@7f0000 {
label = "radio";
reg = <0x7f0000 0x10000>;
read-only;
};
};
};
};
&ethernet {
mtd-mac-address = <&uboot 0x1fc00>;
};
&wmac {
ralink,mtd-eeprom = <&radio 0x0>;
mtd-mac-address = <&uboot 0x1fc00>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <2>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

30
target/linux/ramips/dts/mt7621_netgear_sercomm_bzv.dtsi
View File

@ -35,18 +35,6 @@
};
};
&xhci {
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
hub_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
&pcie {
status = "okay";
};
@ -73,13 +61,6 @@
mtd-mac-address = <&factory 0x4>;
};
&state_default {
gpio {
ralink,group = "uart3", "uart2", "jtag", "wdt";
ralink,function = "gpio";
};
};
&i2c {
status = "okay";
@ -88,19 +69,8 @@
#interrupt-cells = <2>;
compatible = "semtech,sx1503q";
reg = <0x20>;
interrupt-parent = <&gic>;
interrupts = <16 0>;
gpio-controller;
interrupt-controller;
pinctrl-names = "default";
pinctrl-0 = <&gpio4_cfg_pins>;
gpio4_cfg_pins: gpio4-cfg {
pins = "gpio4";
bias-pull-up;
};
};
};

2
target/linux/ramips/dts/mt7621_ubiquiti_edgerouterx-sfp.dts
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@ -2,8 +2,6 @@
#include "mt7621_ubiquiti_edgerouterx.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "UBNT-ERX-SFP";
compatible = "ubiquiti,edgerouterx-sfp", "mediatek,mt7621-soc";

1
target/linux/ramips/dts/mt7621_ubiquiti_edgerouterx.dts
View File

@ -4,4 +4,5 @@
/ {
model = "UBNT-ERX";
compatible = "ubiquiti,edgerouterx", "mediatek,mt7621-soc";
};

2
target/linux/ramips/dts/mt7621_ubiquiti_edgerouterx.dtsi
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@ -4,8 +4,6 @@
#include <dt-bindings/input/input.h>
/ {
compatible = "ubiquiti,edgerouterx", "mediatek,mt7621-soc";
aliases {
label-mac-device = &ethernet;
};

3
target/linux/ramips/dts/mt7621_unielec_u7621-06-16m.dts
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@ -36,9 +36,6 @@
#include "mt7621_unielec_u7621-06.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "unielec,u7621-06-16m", "unielec,u7621-06", "mediatek,mt7621-soc";
model = "UniElec U7621-06 (16M flash)";

3
target/linux/ramips/dts/mt7621_unielec_u7621-06-64m.dts
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@ -37,9 +37,6 @@
#include "mt7621_unielec_u7621-06.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "unielec,u7621-06-64m", "unielec,u7621-06", "mediatek,mt7621-soc";
model = "UniElec U7621-06 (64M flash)";

3
target/linux/ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi
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@ -1,6 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
bootargs = "console=ttyS0,115200";

3
target/linux/ramips/dts/mt7628an_tplink_8m.dtsi
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@ -1,5 +1,8 @@
#include "mt7628an.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
chosen {
bootargs = "console=ttyS0,115200";

3
target/linux/ramips/dts/mt7628an_tplink_archer-c20-v4.dts
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@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "tplink,archer-c20-v4", "mediatek,mt7628an-soc";
model = "TP-Link Archer C20 v4";

3
target/linux/ramips/dts/mt7628an_tplink_archer-c20-v5.dts
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@ -3,9 +3,6 @@
#include "mt7628an_tplink_8m-split-uboot.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,archer-c20-v5", "mediatek,mt7628an-soc";
model = "TP-Link Archer C20 v5";

3
target/linux/ramips/dts/mt7628an_tplink_archer-c50-v3.dts
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@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,archer-c50-v3", "mediatek,mt7628an-soc";
model = "TP-Link Archer C50 v3";

3
target/linux/ramips/dts/mt7628an_tplink_archer-c50-v4.dts
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@ -3,9 +3,6 @@
#include "mt7628an_tplink_8m-split-uboot.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,archer-c50-v4", "mediatek,mt7628an-soc";
model = "TP-Link Archer C50 v4";

3
target/linux/ramips/dts/mt7628an_tplink_tl-mr3420-v5.dts
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@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-mr3420-v5", "mediatek,mt7628an-soc";
model = "TP-Link TL-MR3420 v5";

3
target/linux/ramips/dts/mt7628an_tplink_tl-wa801nd-v5.dts
View File

@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-wa801nd-v5", "mediatek,mt7628an-soc";
model = "TP-Link TL-WA801ND v5";

3
target/linux/ramips/dts/mt7628an_tplink_tl-wr802n-v4.dts
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@ -3,9 +3,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-wr802n-v4", "mediatek,mt7628an-soc";
model = "TP-Link TL-WR802N v4";

3
target/linux/ramips/dts/mt7628an_tplink_tl-wr840n-v4.dts
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@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-wr840n-v4", "mediatek,mt7628an-soc";
model = "TP-Link TL-WR840N v4";

3
target/linux/ramips/dts/mt7628an_tplink_tl-wr841n-v13.dts
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@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-wr841n-v13", "mediatek,mt7628an-soc";
model = "TP-Link TL-WR841N v13";

3
target/linux/ramips/dts/mt7628an_tplink_tl-wr842n-v5.dts
View File

@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-wr842n-v5", "mediatek,mt7628an-soc";
model = "TP-Link TL-WR842N v5";

3
target/linux/ramips/dts/mt7628an_tplink_tl-wr902ac-v3.dts
View File

@ -2,9 +2,6 @@
#include "mt7628an_tplink_8m.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-wr902ac-v3", "mediatek,mt7628an-soc";
model = "TP-Link TL-WR902AC v3";

2
target/linux/ramips/dts/mt7628an_vocore_vocore2-lite.dts
View File

@ -2,8 +2,6 @@
#include "mt7628an_vocore_vocore2.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "vocore,vocore2-lite", "vocore,vocore2", "mediatek,mt7628an-soc";
model = "VoCore2-Lite";

2
target/linux/ramips/dts/mt7628an_vocore_vocore2.dts
View File

@ -2,8 +2,6 @@
#include "mt7628an_vocore_vocore2.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "vocore,vocore2", "mediatek,mt7628an-soc";
model = "VoCore2";

2
target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
View File

@ -1,5 +1,7 @@
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "vocore,vocore2", "mediatek,mt7628an-soc";

3
target/linux/ramips/dts/rt3883_belkin_f9k1109v1.dts
View File

@ -3,9 +3,6 @@
#include "rt3883_belkin_f9k110x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "belkin,f9k1109v1", "ralink,rt3883-soc";
model = "Belkin F9K1109 Version 1.0";

12
target/linux/ramips/image/mt7620.mk
View File

@ -942,6 +942,18 @@ define Device/tplink_re200-v1
endef
TARGET_DEVICES += tplink_re200-v1
define Device/tplink_re210-v1
$(Device/tplink-v1)
SOC := mt7620a
DEVICE_MODEL := RE210
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-mt76x0e
IMAGE_SIZE := 7936k
TPLINK_HWID := 0x02100001
TPLINK_FLASHLAYOUT := 8Mmtk
endef
TARGET_DEVICES += tplink_re210-v1
define Device/vonets_var11n-300
SOC := mt7620n
IMAGE_SIZE := 3776k

3
target/linux/ramips/mt7620/base-files/etc/board.d/02_network
View File

@ -50,8 +50,9 @@ ramips_setup_interfaces()
planex,mzk-ex300np|\
planex,mzk-ex750np|\
ravpower,wd03|\
sercomm,na930|\
tplink,re200-v1|\
sercomm,na930)
tplink,re210-v1)
ucidef_set_interface_lan "eth0"
;;
asus,rp-n53)