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rockchip: configure pad driver strength for orangepi r1 plus lts

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The default strength is not enough to provide stable connection
under 3.3v LDO voltage.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-12-16 12:02:45 +08:00
parent 2e68a7d289
commit b26299f319
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GPG Key ID: 6850B6345C862176
3 changed files with 38 additions and 16 deletions
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32
target/linux/rockchip/patches-6.1/104-arm64-dts-rockchip-configure-pad-driver-strength-for.patch Normal file
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@ -0,0 +1,32 @@
From f37aefd97d9c1abdba497b9af978f85754b0be8f Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@gmail.com>
Date: Wed, 13 Dec 2023 20:45:27 +0800
Subject: [PATCH] arm64: dts: rockchip: configure pad driver strength for
orangepi r1 plus lts
The default strength is not enough to provide stable connection
under 3.3v LDO voltage.
Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS")
Cc: stable@vger.kernel.org # 6.6+
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
@@ -26,9 +26,11 @@
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
+ motorcomm,auto-sleep-disabled;
motorcomm,clk-out-frequency-hz = <125000000>;
motorcomm,keep-pll-enabled;
- motorcomm,auto-sleep-disabled;
+ motorcomm,rx-clk-drv-microamp = <5020>;
+ motorcomm,rx-data-drv-microamp = <5020>;
pinctrl-0 = <&eth_phy_reset_pin>;
pinctrl-names = "default";

10
target/linux/rockchip/patches-6.1/104-fix-io-power-domain-for-orangepi-r1-plus-lts.patch
View File

@ -1,10 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
@@ -38,3 +38,7 @@
};
};
};
+
+&io_domains {
+ vccio4-supply = <&vcc_18>;
+};

12
target/linux/rockchip/patches-6.1/610-arm64-rockchip-add-OF-node-for-eth.patch
View File

@ -64,17 +64,17 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
@@ -29,6 +29,7 @@
motorcomm,clk-out-frequency-hz = <125000000>;
@@ -31,6 +31,7 @@
motorcomm,keep-pll-enabled;
motorcomm,auto-sleep-disabled;
motorcomm,rx-clk-drv-microamp = <5020>;
motorcomm,rx-data-drv-microamp = <5020>;
+ motorcomm,led-data = <0xe004 0x0 0x2600 0x0070 0x000a>;
pinctrl-0 = <&eth_phy_reset_pin>;
pinctrl-names = "default";
@@ -42,3 +43,7 @@
&io_domains {
vccio4-supply = <&vcc_18>;
@@ -40,3 +41,7 @@
};
};
};
+
+&rtl8153 {