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Merge Official Source

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Signed-off-by: ZiMing Mo <msylgj@immortalwrt.org>
This commit is contained in:
ZiMing Mo 2022-07-24 23:51:30 +08:00
commit b6716429af
No known key found for this signature in database
GPG Key ID: 1BED2E3A77AE5ECF
100 changed files with 4449 additions and 76 deletions
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22
include/image-commands.mk
View File

@ -112,6 +112,15 @@ define Build/append-squashfs-fakeroot-be
cat $@.fakesquashfs >> $@
endef
define Build/append-squashfs4-fakeroot
rm -rf $@.fakefs $@.fakesquashfs
mkdir $@.fakefs
$(STAGING_DIR_HOST)/bin/mksquashfs4 \
$@.fakefs $@.fakesquashfs \
-nopad -noappend -root-owned
cat $@.fakesquashfs >> $@
endef
define Build/append-string
echo -n $(1) >> $@
endef
@ -376,6 +385,19 @@ define Build/netgear-dni
mv $@.new $@
endef
define Build/netgear-encrypted-factory
$(TOPDIR)/scripts/netgear-encrypted-factory.py \
--input-file $@ \
--output-file $@ \
--model $(NETGEAR_ENC_MODEL) \
--region $(NETGEAR_ENC_REGION) \
--version V1.0.0.0.$(VERSION_DIST).$(firstword $(subst -, ,$(REVISION))) \
--encryption-block-size 0x20000 \
--openssl-bin "$(STAGING_DIR_HOST)/bin/openssl" \
--key 6865392d342b4d212964363d6d7e7765312c7132613364316e26322a5a5e2538 \
--iv 4a253169516c38243d6c6d2d3b384145
endef
define Build/openmesh-image
$(TOPDIR)/scripts/om-fwupgradecfg-gen.sh \
"$(call param_get_default,ce_type,$(1),$(DEVICE_NAME))" \

4
include/kernel-5.10
View File

@ -1,2 +1,2 @@
LINUX_VERSION-5.10 = .127
LINUX_KERNEL_HASH-5.10.127 = 419233ee0b1ee1dc2be8abf1b241545d10dad19d95f237180d6ccdc0cd221580
LINUX_VERSION-5.10 = .131
LINUX_KERNEL_HASH-5.10.131 = 8bc441442c16c330a7148fe3cca9edcd98bc0fc9f68304633c7eb641770d21ce

2
package/boot/tfa-layerscape/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/atf
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=500da1f5743255b2c301b89fba4df31d05a7dfbc731fbf137a88caf86f5568d0
PKG_MIRROR_HASH:=893f2d28a77dcc9d4413a619b4719ca5f1f4dc78dd824a8488e7d543e66bcf95
PKG_BUILD_DEPENDS:=tfa-layerscape/host
include $(INCLUDE_DIR)/host-build.mk

14
package/boot/uboot-envtools/files/ramips
View File

@ -38,10 +38,7 @@ buffalo,wsr-1166dhp|\
buffalo,wsr-600dhp|\
mediatek,linkit-smart-7688|\
samknows,whitebox-v8|\
xiaomi,mi-router-3g-v2|\
xiaomi,mi-router-4a-gigabit|\
xiaomi,mi-router-4c|\
xiaomi,miwifi-3c|\
xiaomi,miwifi-nano|\
zbtlink,zbt-wg2626|\
zte,mf283plus)
@ -63,13 +60,22 @@ linksys,ea7300-v2|\
linksys,ea7500-v2|\
linksys,ea8100-v1|\
linksys,ea8100-v2|\
mts,wg430223|\
mts,wg430223)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000"
;;
xiaomi,mi-router-3g-v2|\
xiaomi,mi-router-4a-gigabit|\
xiaomi,miwifi-3c)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x4000" "0x10000"
;;
xiaomi,mi-router-3g|\
xiaomi,mi-router-3-pro|\
xiaomi,mi-router-4|\
xiaomi,mi-router-ac2100|\
xiaomi,redmi-router-ac2100)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000"
ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x4000" "0x20000"
;;
zyxel,nr7101)
idx="$(find_mtd_index Config)"

2
package/boot/uboot-layerscape/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=874e871755ef84ebbf35cc247f0979ec18ed1946e4dca71006a83463b2899db1
PKG_MIRROR_HASH:=54909a98bdcc26c7f9b35b35fcae09b977ecbf044be7bffa6dad9306c47cccf6
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk

BIN
package/firmware/ipq-wifi/board-glinet_gl-b2200.qca4019
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BIN
package/firmware/ipq-wifi/board-glinet_gl-b2200.qca9888
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2
package/firmware/layerscape/fman-ucode/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/NXP/qoriq-fm-ucode.git
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=dc905ebe71cde24e9ebbe10a7b1f08cd2ecf142e39fe1535aa5fe3f349b031b9
PKG_MIRROR_HASH:=fc3c249c20b823e9554764f875c3d600b05f2e3659262d79f081e6765e891c96
PKG_FLAGS:=nonshared

2
package/firmware/layerscape/ls-ddr-phy/Makefile
View File

@ -12,7 +12,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/NXP/ddr-phy-binary.git
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=6ad8bba23a70ed50716c56093a4ee7eef3153f8c3b7446c4520412c83799bb08
PKG_MIRROR_HASH:=0fb35c697f4b4274577cce63223198f5c7715164a2c5d09a55c46ef17639ed4b
PKG_BUILD_DEPENDS:=tfa-layerscape/host
PKG_LICENSE:=EULA

2
package/firmware/layerscape/ls-dpl/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/mc-utils
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=56ea7db52c1bee43c2823cff0cabc64d76b24296dfa347c9a95bc4a9542d4ed8
PKG_MIRROR_HASH:=372498ff4b5c8a1ac64ead5856d03ee021332f57771989ed6fe066745372b242
PKG_FLAGS:=nonshared

2
package/firmware/layerscape/ls-mc/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/NXP/qoriq-mc-binary.git
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=a8b2398f7958bfc3d45b239d33e0ecd27bd46e8f34693d545590a870be22ca2b
PKG_MIRROR_HASH:=ab22c16b2bce37886c15ffeed7b068e5b46d619eae58e5a6a005028f5ddb06b6
PKG_FLAGS:=nonshared

2
package/firmware/layerscape/ls-rcw/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/rcw
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=c0202d07223bb5ab43d0c0145c0d83e2b8c34c559bba0ec3c2c2aa562623f546
PKG_MIRROR_HASH:=5b6ae3937d8c64f24c2d09d21e892e60b9f60de3573ca64ef19fa71072e6e346
PKG_FLAGS:=nonshared

2
package/firmware/layerscape/ppfe-firmware/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/NXP/qoriq-engine-pfe-bin.git
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=ba524b8a56c66cf8e7ebb8e742b0d6b66f9177b6fa821c405a09b6c8919e3db0
PKG_MIRROR_HASH:=f2591b12bc02dbfcf113dcb79cce2fc703d8492b7309ad75b3c4915b76966c64
PKG_FLAGS:=nonshared

16
package/kernel/linux/modules/netsupport.mk
View File

@ -1346,3 +1346,19 @@ define KernelPackage/wireguard/description
endef
$(eval $(call KernelPackage,wireguard))
define KernelPackage/netconsole
SUBMENU:=$(NETWORK_SUPPORT_MENU)
TITLE:=Network console logging support
KCONFIG:=CONFIG_NETCONSOLE \
CONFIG_NETCONSOLE_DYNAMIC=n
FILES:=$(LINUX_DIR)/drivers/net/netconsole.ko
AUTOLOAD:=$(call AutoProbe,netconsole)
endef
define KernelPackage/netconsole/description
Network console logging support.
endef
$(eval $(call KernelPackage,netconsole))

7
package/libs/libiconv-full/Makefile
View File

@ -15,6 +15,7 @@ PKG_SOURCE:=libiconv-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=@GNU/libiconv
PKG_HASH:=8f74213b56238c85a50a5329f77e06198771e70dd9a739779f4c02f65d971313
PKG_BUILD_DIR:=$(BUILD_DIR)/libiconv-$(PKG_VERSION)
HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/libiconv-$(PKG_VERSION)
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=LGPL-2.1-or-later
@ -25,6 +26,7 @@ PKG_INSTALL:=1
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/host-build.mk
define Package/libiconv-full/Default
URL:=https://www.gnu.org/software/libiconv/
@ -61,6 +63,10 @@ CONFIGURE_ARGS += \
--disable-rpath \
--enable-relocatable
HOST_CONFIGURE_ARGS += \
--disable-shared \
--with-pic
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/lib/libiconv-full/include
$(CP) $(PKG_INSTALL_DIR)/usr/include/iconv.h $(1)/usr/lib/libiconv-full/include/
@ -88,3 +94,4 @@ endef
$(eval $(call BuildPackage,libcharset))
$(eval $(call BuildPackage,libiconv-full))
$(eval $(call BuildPackage,iconv))
$(eval $(call HostBuild))

1
package/libs/mbedtls/Makefile
View File

@ -123,6 +123,7 @@ ifneq ($(CONFIG_LIBMBEDTLS_HAVE_ARMV8CE_AES),)
endif
CMAKE_OPTIONS += \
-DCMAKE_POSITION_INDEPENDENT_CODE=ON \
-DUSE_SHARED_MBEDTLS_LIBRARY:Bool=ON \
-DENABLE_TESTING:Bool=OFF \
-DENABLE_PROGRAMS:Bool=ON

2
package/libs/wolfssl/Config.in
View File

@ -72,7 +72,7 @@ config WOLFSSL_ASM_CAPABLE
choice
prompt "Hardware Acceleration"
default WOLFSSL_HAS_CPU_CRYPTO if WOLFSSL_ASM_CAPABLE
default WOLFSSL_HAS_CPU_CRYPTO if WOLFSSL_ASM_CAPABLE && !TARGET_armvirt
default WOLFSSL_HAS_NO_HW
config WOLFSSL_HAS_NO_HW

2
package/network/utils/layerscape/restool/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/restool
PKG_SOURCE_VERSION:=LSDK-21.08
PKG_MIRROR_HASH:=d793defa2e4cf907bebe7761d88feb2ac94e0ecdaabdb3bbc9dda83a82046bc5
PKG_MIRROR_HASH:=0396644927b8f3da20183227562f695c8063d3d4c6bb606e8f31dda450e962e4
PKG_FLAGS:=nonshared

6
package/system/fstools/Makefile
View File

@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/fstools.git
PKG_MIRROR_HASH:=1b16e5ef533c7b30b3ccc4b7001c18b23c44890021aa4ae54850dbec56e7dc7c
PKG_SOURCE_DATE:=2022-06-02
PKG_SOURCE_VERSION:=93369be040612c906bcbb1631f44a92fa4122d24
PKG_MIRROR_HASH:=b0cf3e4dea4f86883409d8597e89aa1d022118bd7087881165fe67622da5a903
PKG_SOURCE_DATE:=2022-07-17
PKG_SOURCE_VERSION:=ebf7e9028f2facf1a87c56dd261bda82ab9bcc59
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

2
package/system/gpio-cdev/nu801/Makefile
View File

@ -20,7 +20,7 @@ define Package/nu801
SECTION:=utils
CATEGORY:=Utilities
SUBMENU:=Userspace GPIO Drivers
DEPENDS:=@TARGET_x86||@TARGET_bcm53xx
DEPENDS:=@(TARGET_x86||TARGET_bcm53xx)
KCONFIG:=CONFIG_GPIO_CDEV=y
TITLE:=NU801 LED Driver
endef

6
package/system/procd/Makefile
View File

@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
PKG_MIRROR_HASH:=0d9b82919492e1ec0df4011b932a210b6256774d0cb1f1e3de24b6dbf36c6a77
PKG_SOURCE_DATE:=2022-06-01
PKG_SOURCE_VERSION:=7a0096853594874d4c60266ec338ac23728017df
PKG_MIRROR_HASH:=b03b6cd3321451813bb802647b8d574e25d39434167f36f271fef170ebd2f2c8
PKG_SOURCE_DATE:=2022-07-17
PKG_SOURCE_VERSION:=ef5d3e36e8b23ee2e1989c22717b21649dc9a388
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

5
package/utils/spidev_test/Makefile
View File

@ -10,7 +10,6 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=spidev-test
PKG_RELEASE:=$(LINUX_VERSION)
PKG_FLAGS:=nonshared
PKG_BUILD_DIR:=$(LINUX_DIR)/tools/spi-$(TARGET_DIR_NAME)
PKG_BUILD_PARALLEL:=1
@ -19,7 +18,7 @@ include $(INCLUDE_DIR)/package.mk
define Package/spidev-test
SECTION:=utils
CATEGORY:=Utilities
DEPENDS:=+PACKAGE_kmod-spi-dev:kmod-spi-dev @!IN_SDK
DEPENDS:=+kmod-spi-dev
TITLE:=SPI testing utility
VERSION:=$(LINUX_VERSION)-$(PKG_RELEASE)
URL:=http://www.kernel.org
@ -30,6 +29,8 @@ define Package/spidev-test/description
endef
define Build/Prepare
# For SDK: Sources are copied by target/sdk/Makefile's
# USERSPACE_UTILS(_FILES)
$(CP) $(LINUX_DIR)/tools/spi/* $(PKG_BUILD_DIR)/
endef

57
package/utils/uencrypt/Makefile Normal file
View File

@ -0,0 +1,57 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# Copyright (C) 2022 Eneas Ulir de Queiroz
include $(TOPDIR)/rules.mk
PKG_NAME:=uencrypt
PKG_RELEASE:=1
PKG_FLAGS:=nonshared
PKG_LICENSE:=GPL-2.0-or-later
PKG_MAINTAINER:=Eneas U de Queiroz <cotequeiroz@gmail.com>
PKG_CONFIG_DEPENDS:=\
CONFIG_UENCRYPT_OPENSSL \
CONFIG_UENCRYPT_WOLFSSL
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/cmake.mk
CMAKE_INSTALL:=1
CMAKE_OPTIONS+=$(if $(CONFIG_UENCRYPT_WOLFSSL),-DUSE_WOLFSSL=1)
define Package/uencrypt
SECTION:=utils
CATEGORY:=Base system
TITLE:=Decryption utility for Arcadyan WG4xx223
DEPENDS:=@TARGET_ramips_mt7621 +UENCRYPT_WOLFSSL:libwolfssl +UENCRYPT_OPENSSL:libopenssl
endef
define Package/uencrypt/description
This is a small AES-128-CBC encrypton/decryption program.
Even though it can be used for regular encryption and
decryption operations using AES-128-CBC, it is included
here to unencrypt the configuration from mtd on Arcadyan
WG430223 and WG443223 routers.
endef
define Package/uencrypt/config
if PACKAGE_uencrypt
choice
prompt "Crypto provider"
default UENCRYPT_WOLFSSL
config UENCRYPT_OPENSSL
bool "OpenSSL"
config UENCRYPT_WOLFSSL
bool "wolfSSL"
endchoice
endif
endef
define Package/uencrypt/install
$(INSTALL_DIR) $(1)/usr/bin
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/uencrypt $(1)/usr/bin
endef
$(eval $(call BuildPackage,uencrypt))

20
package/utils/uencrypt/src/CMakeLists.txt Normal file
View File

@ -0,0 +1,20 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# Copyright (C) 2022 Eneas Ulir de Queiroz
cmake_minimum_required(VERSION 2.8.12 FATAL_ERROR)
project(uencrypt LANGUAGES C)
option(USE_WOLFSSL "Use WolfSSL as crypto provider" OFF)
if (USE_WOLFSSL)
add_definitions(-DUSE_WOLFSSL)
find_library(WOLFSSL_LIBRARY wolfssl REQUIRED)
set(CRYPTO_LIBRARIES ${WOLFSSL_LIBRARY})
else()
find_package(OpenSSL REQUIRED)
set(CRYPTO_LIBRARIES ${OPENSSL_CRYPTO_LIBRARY})
endif()
add_executable(${PROJECT_NAME} ${PROJECT_NAME}.c)
target_link_libraries(${PROJECT_NAME} ${CRYPTO_LIBRARIES})
install(TARGETS ${PROJECT_NAME} RUNTIME DESTINATION bin)

117
package/utils/uencrypt/src/uencrypt.c Normal file
View File

@ -0,0 +1,117 @@
/* SPDX-License-Identifier: GPL-2.0-or-later
* Copyright (C) 2022 Eneas Ulir de Queiroz
*/
#include <errno.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#ifdef USE_WOLFSSL
# include <wolfssl/options.h>
# include <wolfssl/openssl/evp.h>
#else
# include <openssl/evp.h>
#endif
int do_crypt(FILE *infile, FILE *outfile, const char *key, const char *iv,
int enc, int padding)
{
EVP_CIPHER_CTX *ctx;
unsigned char inbuf[1024], outbuf[1024 + EVP_MAX_BLOCK_LENGTH];
int inlen, outlen;
ctx = EVP_CIPHER_CTX_new();
EVP_CipherInit_ex(ctx, EVP_aes_128_cbc(), NULL, key, iv, enc);
EVP_CIPHER_CTX_set_padding(ctx, padding);
for (;;) {
inlen = fread(inbuf, 1, 1024, infile);
if (inlen <= 0)
break;
if (!EVP_CipherUpdate(ctx, outbuf, &outlen, inbuf, inlen)) {
EVP_CIPHER_CTX_free(ctx);
return -1;
}
fwrite(outbuf, 1, outlen, outfile);
}
if (!EVP_CipherFinal_ex(ctx, outbuf, &outlen)) {
EVP_CIPHER_CTX_free(ctx);
return -1;
}
fwrite(outbuf, 1, outlen, outfile);
EVP_CIPHER_CTX_free(ctx);
return 0;
}
static void check_enc_dec(const int enc)
{
if (enc == -1)
return;
fprintf(stderr, "Error: both -d and -e were specified.\n");
exit(EXIT_FAILURE);
}
static void show_usage(const char* name)
{
fprintf(stderr, "Usage: %s: [-d | -e] [-n] -k key -i iv\n"
"-d = decrypt; -e = encrypt; -n = no padding\n", name);
}
int main(int argc, char *argv[])
{
int enc = -1;
unsigned char *iv = NULL;
unsigned char *key = NULL;
long len;
int opt;
int padding = 1;
int ret;
while ((opt = getopt(argc, argv, "dei:k:n")) != -1) {
switch (opt) {
case 'd':
check_enc_dec(enc);
enc = 0;
break;
case 'e':
check_enc_dec(enc);
enc = 1;
break;
case 'i':
iv = OPENSSL_hexstr2buf((const char *)optarg, &len);
if (iv == NULL || len != 16) {
fprintf(stderr, "Error setting IV to %s. The IV should be 16 bytes, encoded in hex.\n",
optarg);
exit(EINVAL);
}
break;
case 'k':
key = OPENSSL_hexstr2buf((const char *)optarg, &len);
if (key == NULL || len != 16) {
fprintf(stderr, "Error setting key to %s. The key should be 16 bytes, encoded in hex.\n",
optarg);
exit(EINVAL);
}
break;
case 'n':
padding = 0;
break;
default:
show_usage(argv[0]);
exit(EINVAL);
}
}
if (iv == NULL || key == NULL) {
fprintf(stderr, "Error: %s not set.\n", key ? "iv" : (iv ? "key" : "key and iv"));
show_usage(argv[0]);
exit(EXIT_FAILURE);
}
ret = do_crypt(stdin, stdout, key, iv, !!enc, padding);
if (ret)
fprintf(stderr, "Error during crypt operation.\n");
OPENSSL_free(iv);
OPENSSL_free(key);
return ret;
}

38
package/utils/zyxel-bootconfig/Makefile Normal file
View File

@ -0,0 +1,38 @@
#
# Copyright (C) 2022 David Bauer <mail@david-bauer.net>
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=zyxel-bootconfig
PKG_RELEASE:=1
include $(INCLUDE_DIR)/package.mk
define Package/zyxel-bootconfig
SECTION:=utils
CATEGORY:=Base system
TITLE:=Utility for handling ZyXEL Bootconfig settings
MAINTAINER:=David Bauer <mail@david-bauer.net>
endef
define Package/zyxel-bootconfig/description
This package contains an utility that allows handling ZyXEL Bootconfig settings.
endef
define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) \
CC="$(TARGET_CC)" \
CFLAGS="$(TARGET_CFLAGS) -Wall"
endef
define Package/zyxel-bootconfig/install
$(INSTALL_DIR) $(1)/usr/bin $(1)/lib/preinit
$(INSTALL_BIN) $(PKG_BUILD_DIR)/zyxel-bootconfig $(1)/usr/bin/
$(CP) ./files/95_apply_bootconfig $(1)/lib/preinit/95_apply_bootconfig
endef
$(eval $(call BuildPackage,zyxel-bootconfig))

16
package/utils/zyxel-bootconfig/files/95_apply_bootconfig Normal file
View File

@ -0,0 +1,16 @@
apply_bootconfig() {
. /lib/functions.sh
local part
case $(board_name) in
zyxel,nwa50ax|\
zyxel,nwa55axe)
mtd_idx=$(find_mtd_index "bootconfig")
zyxel-bootconfig "/dev/mtd$mtd_idx" set-image-status 0 valid
zyxel-bootconfig "/dev/mtd$mtd_idx" set-active-image 0
;;
esac
}
[ "$INITRAMFS" = "1" ] || boot_hook_add preinit_main apply_bootconfig

7
package/utils/zyxel-bootconfig/src/Makefile Normal file
View File

@ -0,0 +1,7 @@
all: zyxel-bootconfig
zyxel-bootconfig:
$(CC) $(CFLAGS) -Wall zyxel-bootconfig.c -o zyxel-bootconfig
clean:
rm -f zyxel-bootconfig

331
package/utils/zyxel-bootconfig/src/zyxel-bootconfig.c Normal file
View File

@ -0,0 +1,331 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Copyright (C) 2022 David Bauer <mail@david-bauer.net> */
/*
* First byte: Image status
*
* Possible status-codes:
* 0x0: none
* 0x1: new
* 0x2: valid
* 0x3: invalid
*
* Example: Image 0 valid; Image 1 invalid
* 11001000
* || ||
* img1||
* img0
*
* Second byte: Active Image
* Possible values:
* 0x0: Image0 active
* 0x1: Image1 active
*/
#include <stdio.h>
#include <stdbool.h>
#include <stdlib.h>
#include <stddef.h>
#include <fcntl.h>
#include <string.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <mtd/mtd-user.h>
#define BOOTCONFIG_SIZE 0x20
#define BOOTCONFIG_IMAGE_STATUS 0x0
#define BOOTCONFIG_ACTIVE_IMAGE 0x1
#define IMAGE_0_SHIFT 2
#define IMAGE_0_MASK 0x0c
#define IMAGE_1_SHIFT 6
#define IMAGE_1_MASK 0xc0
#define IMAGE_STATUS(img0, img1) (((img0 << IMAGE_0_SHIFT) & IMAGE_0_MASK) | ((img1 << IMAGE_1_SHIFT) & IMAGE_1_MASK))
#define ACTIVE_IMAGE_MASK 0x1
#define ACTIVE_IMAGE(img) (img & ACTIVE_IMAGE_MASK)
enum zyxel_bootconfig_image_status {
IMAGE_STATUS_NONE = 0x0,
IMAGE_STATUS_NEW = 0x1,
IMAGE_STATUS_VALID = 0x2,
IMAGE_STATUS_INVALID = 0x3,
__IMAGE_STATUS_EINVAL,
};
struct zyxel_bootconfig {
enum zyxel_bootconfig_image_status image0_status;
enum zyxel_bootconfig_image_status image1_status;
unsigned int active_image;
};
struct zyxel_bootconfig_mtd {
struct mtd_info_user mtd_info;
int fd;
};
struct zyxel_image_status {
enum zyxel_bootconfig_image_status code;
const char *name;
};
struct zyxel_image_status image_status_codes[] = {
{ .code = IMAGE_STATUS_NONE, .name = "none" },
{ .code = IMAGE_STATUS_NEW, .name = "new" },
{ .code = IMAGE_STATUS_VALID, .name = "valid" },
{ .code = IMAGE_STATUS_INVALID, .name = "invalid" },
{},
};
static enum zyxel_bootconfig_image_status zyxel_bootconfig_image_status_parse(const char *status) {
struct zyxel_image_status* s;
for (s = image_status_codes; s->name; s++) {
if (!strcmp(status, s->name)) {
return s->code;
}
}
return __IMAGE_STATUS_EINVAL;
}
const char *zyxel_bootconfig_image_status_name(const enum zyxel_bootconfig_image_status bootconfig) {
struct zyxel_image_status* s;
for (s = image_status_codes; s->name; s++) {
if (bootconfig == s->code) {
return s->name;
}
}
return "N/A";
}
static void zyxel_bootconfig_mtd_close(struct zyxel_bootconfig_mtd *mtd) {
close(mtd->fd);
}
static int zyxel_bootconfig_mtd_open(struct zyxel_bootconfig_mtd *mtd, const char *mtd_name) {
int ret = 0;
mtd->fd = open(mtd_name, O_RDWR | O_SYNC);
if (mtd->fd < 0) {
fprintf(stderr, "Could not open mtd device: %s\n", mtd_name);
ret = -1;
goto out;
}
if (ioctl(mtd->fd, MEMGETINFO, &mtd->mtd_info)) {
fprintf(stderr, "Could not get MTD device info from %s\n", mtd_name);
ret = -1;
zyxel_bootconfig_mtd_close(mtd);
goto out;
}
out:
return ret;
}
static int zyxel_bootconfig_read(struct zyxel_bootconfig *config, struct zyxel_bootconfig_mtd *mtd) {
char *args = NULL;
int ret = 0;
/* Allocate memory for reading boot-config partition */
args = calloc(1, mtd->mtd_info.erasesize);
if (!args) {
fprintf(stderr, "Could not allocate memory!\n");
ret = -1;
goto out;
}
/* Read bootconfig partition */
pread(mtd->fd, args, mtd->mtd_info.erasesize, 0);
/* Parse config */
memset(config, 0, sizeof(*config));
config->image0_status = (args[BOOTCONFIG_IMAGE_STATUS] & IMAGE_0_MASK) >> IMAGE_0_SHIFT;
config->image1_status = (args[BOOTCONFIG_IMAGE_STATUS] & IMAGE_1_MASK) >> IMAGE_1_SHIFT;
config->active_image = (args[BOOTCONFIG_ACTIVE_IMAGE] & ACTIVE_IMAGE_MASK);
out:
if (args)
free(args);
return ret;
}
static int zyxel_bootconfig_write(struct zyxel_bootconfig *config, struct zyxel_bootconfig_mtd *mtd)
{
struct erase_info_user erase_info;
char img_status, img_active;
char *args = NULL;
int ret = 0;
/* Allocate memory for reading boot-config partition */
args = calloc(1, mtd->mtd_info.erasesize);
if (!args) {
fprintf(stderr, "Could not allocate memory!\n");
ret = -1;
goto out;
}
/* Read bootconfig partition */
pread(mtd->fd, args, mtd->mtd_info.erasesize, 0);
img_status = IMAGE_STATUS(config->image0_status, config->image1_status);
img_active = ACTIVE_IMAGE(config->active_image);
/* Check if bootconfig has to be written */
if (args[BOOTCONFIG_IMAGE_STATUS] == img_status && args[BOOTCONFIG_ACTIVE_IMAGE] == img_active) {
ret = 0;
goto out;
}
/* Erase first block (containing the magic) */
erase_info.start = 0;
erase_info.length = mtd->mtd_info.erasesize;
ret = ioctl(mtd->fd, MEMERASE, &erase_info);
if (ret < 0) {
fprintf(stderr, "Failed to erase block: %i\n", ret);
goto out;
}
/* Write bootconfig */
args[BOOTCONFIG_IMAGE_STATUS] = img_status;
args[BOOTCONFIG_ACTIVE_IMAGE] = img_active;
if (pwrite(mtd->fd, args, mtd->mtd_info.erasesize, 0) != mtd->mtd_info.erasesize) {
fprintf(stderr, "Error writing bootconfig!\n");
ret = -1;
goto out;
}
out:
if (args)
free(args);
return ret;
}
static void zyxel_bootconfig_print_usage(char *programm)
{
struct zyxel_image_status* s = image_status_codes;
printf("Usage: %s <mtd-device> <command> [args]\n", programm);
printf("Available commands:\n");
printf(" get-status\n");
printf(" set-image-status [0/1] [");
while (s->name) {
printf("%s", s->name);
s++;
if (s->name)
printf(",");
}
printf("]\n");
printf(" set-active-image [0/1]\n");
}
int main(int argc, char *argv[])
{
enum zyxel_bootconfig_image_status image_status;
struct zyxel_bootconfig_mtd mtd;
struct zyxel_bootconfig config;
const char *mtd_name, *command;
bool writeback = false;
int image_idx;
if (argc < 3) {
zyxel_bootconfig_print_usage(argv[0]);
return 1;
}
mtd_name = argv[1];
command = argv[2];
if (zyxel_bootconfig_mtd_open(&mtd, mtd_name)) {
fprintf(stderr, "Error opening %s!\n", mtd_name);
return 1;
}
if (zyxel_bootconfig_read(&config, &mtd)) {
fprintf(stderr, "Error reading bootconfig!\n");
zyxel_bootconfig_mtd_close(&mtd);
return 1;
}
if (!strcmp(command, "set-image-status")) {
if (argc < 5) {
zyxel_bootconfig_print_usage(argv[0]);
zyxel_bootconfig_mtd_close(&mtd);
return 1;
}
image_idx = atoi(argv[3]);
if (image_idx > 1 || image_idx < 0) {
fprintf(stderr, "Invalid image-slot set!\n");
zyxel_bootconfig_mtd_close(&mtd);
return 1;
}
image_status = zyxel_bootconfig_image_status_parse(argv[4]);
if (image_status == __IMAGE_STATUS_EINVAL) {
fprintf(stderr, "Invalid image-status!\n");
zyxel_bootconfig_mtd_close(&mtd);
return 1;
}
if (image_idx == 0) {
config.image0_status = image_status;
} else {
config.image1_status = image_status;
}
writeback = true;
} else if (!strcmp(command, "set-active-image")) {
if (argc < 4) {
zyxel_bootconfig_print_usage(argv[0]);
zyxel_bootconfig_mtd_close(&mtd);
return 1;
}
image_idx = atoi(argv[3]);
if (image_idx > 1 || image_idx < 0) {
fprintf(stderr, "Invalid image-slot set!\n");
zyxel_bootconfig_mtd_close(&mtd);
return 1;
}
config.active_image = image_idx;
writeback = true;
} else if (!strcmp(command, "get-status")) {
printf("Active Image: %d\n", config.active_image);
printf("Image 0 Status: %s\n", zyxel_bootconfig_image_status_name(config.image0_status));
printf("Image 1 Status: %s\n", zyxel_bootconfig_image_status_name(config.image1_status));
writeback = false;
}
if (writeback) {
if (zyxel_bootconfig_write(&config, &mtd)) {
fprintf(stderr, "Error writing bootconfig!\n");
zyxel_bootconfig_mtd_close(&mtd);
return 1;
}
zyxel_bootconfig_mtd_close(&mtd);
}
return 0;
}

38
scripts/mkits-zyxel-fit.sh Executable file
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@ -0,0 +1,38 @@
#!/usr/bin/env bash
#
# Licensed under the terms of the GNU GPL License version 2 or later.
# Author: David Bauer <mail@david-bauer.net>, based on mkits-zyxel-factory.sh.
usage() {
echo "Usage: `basename $0` output file compat-models"
exit 1
}
# We need at least 3 arguments
[ "$#" -lt 3 ] && usage
# Target output file
OUTPUT="$1"; shift
FILE="$1"; shift
MODELS="$1"; shift
# Create a default, fully populated DTS file
echo "\
/dts-v1/;
/ {
description = \"Zyxel FIT (Flattened Image Tree)\";
compat-models = [${MODELS}];
#address-cells = <1>;
images {
firmware {
data = /incbin/(\"${FILE}\");
type = \"firmware\";
compression = \"none\";
hash@1 {
algo = \"sha1\";
};
};
};
};" > ${OUTPUT}

68
scripts/netgear-encrypted-factory.py Executable file
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@ -0,0 +1,68 @@
#!/usr/bin/env python3
import argparse
import re
import struct
import subprocess
import zlib
def main():
parser = argparse.ArgumentParser()
parser.add_argument('--input-file', type=str, required=True)
parser.add_argument('--output-file', type=str, required=True)
parser.add_argument('--model', type=str, required=True)
parser.add_argument('--region', type=str, required=True)
parser.add_argument('--version', type=str, required=True)
parser.add_argument('--encryption-block-size', type=str, required=True)
parser.add_argument('--openssl-bin', type=str, required=True)
parser.add_argument('--key', type=str, required=True)
parser.add_argument('--iv', type=str, required=True)
args = parser.parse_args()
assert re.match(r'V[0-9]\.[0-9]\.[0-9]\.[0-9]',
args.version), 'Version must start with Vx.x.x.x'
encryption_block_size = int(args.encryption_block_size, 0)
assert (encryption_block_size > 0 and encryption_block_size % 16 ==
0), 'Encryption block size must be a multiple of the AES block size (16)'
image = open(args.input_file, 'rb').read()
image_enc = []
for i in range(0, len(image), encryption_block_size):
chunk = image[i:i + encryption_block_size]
chunk += b'\x00' * ((-len(chunk)) % 16) # pad to AES block size (16)
res = subprocess.run([
args.openssl_bin,
'enc',
'-aes-256-cbc',
'-nosalt',
'-nopad',
'-K', args.key,
'-iv', args.iv
],
check=True, input=chunk, stdout=subprocess.PIPE)
image_enc.append(res.stdout)
image_enc = b''.join(image_enc)
image_with_header = struct.pack(
'>32s32s64s64s64s256s12sII',
args.model.encode('ascii'),
args.region.encode('ascii'),
args.version.encode('ascii'),
b'Thu Jan 1 00:00:00 1970', # static date for reproducibility
b'', # reserved
b'', # RSA signature - omitted for now
b'encrpted_img',
len(image_enc),
encryption_block_size,
) + image_enc
checksum = zlib.crc32(image_with_header, 0xffffffff) ^ 0xffffffff
with open(args.output_file, 'wb') as outfile:
outfile.write(image_with_header)
outfile.write(struct.pack('>I', checksum))
if __name__ == "__main__":
main()

4
target/linux/at91/patches-5.10/133-dmaengine-at_xdmac-add-support-for-sama7g5-based-at_.patch
View File

@ -256,7 +256,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
spin_unlock_irqrestore(&atchan->lock, flags);
@@ -1987,6 +2037,10 @@ static int at_xdmac_probe(struct platfor
@@ -1992,6 +2042,10 @@ static int at_xdmac_probe(struct platfor
atxdmac->regs = base;
atxdmac->irq = irq;
@ -267,7 +267,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
atxdmac->clk = devm_clk_get(&pdev->dev, "dma_clk");
if (IS_ERR(atxdmac->clk)) {
dev_err(&pdev->dev, "can't get dma_clk\n");
@@ -2129,6 +2183,10 @@ static const struct dev_pm_ops atmel_xdm
@@ -2134,6 +2188,10 @@ static const struct dev_pm_ops atmel_xdm
static const struct of_device_id atmel_xdmac_dt_ids[] = {
{
.compatible = "atmel,sama5d4-dma",

4
target/linux/at91/patches-5.10/134-dmaengine-at_xdmac-add-AXI-priority-support-and-reco.patch
View File

@ -71,7 +71,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
};
static inline void __iomem *at_xdmac_chan_reg_base(struct at_xdmac *atxdmac, unsigned int chan_nb)
@@ -1998,6 +2019,30 @@ static int atmel_xdmac_resume(struct dev
@@ -2003,6 +2024,30 @@ static int atmel_xdmac_resume(struct dev
}
#endif /* CONFIG_PM_SLEEP */
@ -102,7 +102,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
static int at_xdmac_probe(struct platform_device *pdev)
{
struct at_xdmac *atxdmac;
@@ -2142,6 +2187,8 @@ static int at_xdmac_probe(struct platfor
@@ -2147,6 +2192,8 @@ static int at_xdmac_probe(struct platfor
dev_info(&pdev->dev, "%d channels, mapped at 0x%p\n",
nr_channels, atxdmac->regs);

1
target/linux/bcm4908/config-5.10
View File

@ -118,6 +118,7 @@ CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_BCM63138=y
CONFIG_LEDS_GPIO=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y

10
target/linux/bcm4908/image/Makefile
View File

@ -86,6 +86,16 @@ define Device/asus_gt-ac5300
endef
TARGET_DEVICES += asus_gt-ac5300
define Device/asus_gt-ax6000
DEVICE_VENDOR := Asus
DEVICE_MODEL := GT-AX6000
DEVICE_DTS := broadcom/bcmbca/bcm4912-asus-gt-ax6000
IMAGES := pkgtb
IMAGE/pkgtb := append-rootfs | pkgtb
SOC := bcm4912
endef
# TARGET_DEVICES += asus_gt-ax6000
define Device/netgear_r8000p
DEVICE_VENDOR := Netgear
DEVICE_MODEL := R8000P

199
target/linux/bcm4908/patches-5.10/037-v5.20-0001-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM63158.patch Normal file
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@ -0,0 +1,199 @@
From 076dcedc6628c6bf92bd17bfcf8fb7b1af62bfb6 Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Wed, 1 Jun 2022 15:56:51 -0700
Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM63158
Add DTS for ARMv8 based broadband SoC BCM63158. bcm63158.dtsi is the
SoC description DTS header and bcm963158.dts is a simple DTS file for
Broadcom BCM963158 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 2 +
.../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm963158.dts | 30 ++++
4 files changed, 161 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/Makefile
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -6,5 +6,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
bcm2837-rpi-cm3-io3.dtb
subdir-y += bcm4908
+subdir-y += bcmbca
subdir-y += northstar2
subdir-y += stingray
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm63158", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm63158.dtsi"
+
+/ {
+ model = "Broadcom BCM963158 Reference Board";
+ compatible = "brcm,bcm963158", "brcm,bcm63158", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

191
target/linux/bcm4908/patches-5.10/037-v5.20-0002-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM4912.patch Normal file
View File

@ -0,0 +1,191 @@
From 1ba56aeb391401c4cb2126c39f90b3cdbfabdb3f Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Wed, 1 Jun 2022 13:17:34 -0700
Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM4912
Add DTS for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the
SoC description DTS header and bcm94912.dts is a simple DTS file for
Broadcom BCM94912 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++
3 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
+ bcm963158.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm4912", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ model = "Broadcom BCM94912 Reference Board";
+ compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

184
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@ -0,0 +1,184 @@
From e663e06bd3f21e64bc2163910f626af68add6308 Mon Sep 17 00:00:00 2001
From: Anand Gore <anand.gore@broadcom.com>
Date: Wed, 1 Jun 2022 13:19:56 -0700
Subject: [PATCH] ARM64: dts: Add DTS files for bcmbca SoC BCM6858
Add DTS for ARMv8 based broadband SoC BCM6858. bcm6858.dtsi is the SoC
description DTS header and bcm96858.dts is a simple DTS file for
Broadcom BCM96858 Reference board that only enables the UART port.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++
3 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
- bcm963158.dtb
+ bcm963158.dtb \
+ bcm96858.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6858", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x6000 0x2000>; /* GICV */
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x62000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6858.dtsi"
+
+/ {
+ model = "Broadcom BCM96858 Reference Board";
+ compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

174
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@ -0,0 +1,174 @@
From 82a58061ada60058ec00113c179380f945914709 Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Wed, 8 Jun 2022 11:00:59 -0700
Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM63146
Add DTS for ARMv8 based broadband SoC BCM63146. bcm63146.dtsi is the
SoC description DTS header and bcm963146.dts is a simple DTS file for
Broadcom BCM963146 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 110 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm963146.dts | 30 +++++
3 files changed, 142 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
bcm963158.dtb \
- bcm96858.dtb
+ bcm96858.dtb \
+ bcm963146.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm63146", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm63146.dtsi"
+
+/ {
+ model = "Broadcom BCM963146 Reference Board";
+ compatible = "brcm,bcm963146", "brcm,bcm63146", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

167
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@ -0,0 +1,167 @@
From 64eca7ad058cff861b48cdead8dee40dfc284e9e Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Wed, 8 Jun 2022 11:04:36 -0700
Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM6856
Add DTS for ARMv8 based broadband SoC BCM6856. bcm6856.dtsi is the
SoC description DTS header and bcm96856.dts is a simple DTS file for
Broadcom BCM96956 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6856.dtsi | 103 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96856.dts | 30 +++++
3 files changed, 135 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -2,4 +2,5 @@
dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
bcm963158.dtb \
bcm96858.dtb \
- bcm963146.dtb
+ bcm963146.dtb \
+ bcm96856.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6856", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x6000 0x2000>; /* GICV */
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6856.dtsi"
+
+/ {
+ model = "Broadcom BCM96856 Reference Board";
+ compatible = "brcm,bcm96856", "brcm,bcm6856", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

192
target/linux/bcm4908/patches-5.10/037-v5.20-0006-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6813.patch Normal file
View File

@ -0,0 +1,192 @@
From eab6bb0994b806525fc5e362e8b865f61c4a9e20 Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Thu, 9 Jun 2022 17:15:33 -0700
Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM6813
Add DTS for ARMv8 based broadband SoC BCM6813. bcm6813.dtsi is the
SoC description DTS header and bcm96813.dts is a simple DTS file for
Broadcom BCM96813 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6813.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96813.dts | 30 ++++
3 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -3,4 +3,5 @@ dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dt
bcm963158.dtb \
bcm96858.dtb \
bcm963146.dtb \
- bcm96856.dtb
+ bcm96856.dtb \
+ bcm96813.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6813", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6813.dtsi"
+
+/ {
+ model = "Broadcom BCM96813 Reference Board";
+ compatible = "brcm,bcm96813", "brcm,bcm6813", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

79
target/linux/bcm4908/patches-5.10/037-v5.20-0007-arm64-dts-broadcom-align-gpio-key-node-names-with-dt.patch Normal file
View File

@ -0,0 +1,79 @@
From ea559c81b61603d4044df6f826f10a832c42c98c Mon Sep 17 00:00:00 2001
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Wed, 15 Jun 2022 17:52:59 -0700
Subject: [PATCH] arm64: dts: broadcom: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-6-krzysztof.kozlowski@linaro.org
---
.../broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts | 8 ++++----
.../boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
@@ -83,25 +83,25 @@
compatible = "gpio-keys-polled";
poll-interval = <100>;
- brightness {
+ key-brightness {
label = "LEDs";
linux,code = <KEY_BRIGHTNESS_ZERO>;
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
};
- wps {
+ key-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
};
- wifi {
+ key-wifi {
label = "WiFi";
linux,code = <KEY_RFKILL>;
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
};
- restart {
+ key-restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -18,25 +18,25 @@
compatible = "gpio-keys-polled";
poll-interval = <100>;
- wifi {
+ key-wifi {
label = "WiFi";
linux,code = <KEY_RFKILL>;
gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
};
- wps {
+ key-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
- restart {
+ key-restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
};
- brightness {
+ key-brightness {
label = "LEDs";
linux,code = <KEY_BRIGHTNESS_ZERO>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;

33
target/linux/bcm4908/patches-5.10/037-v5.20-0008-arm64-dts-broadcom-bcm4908-Fix-timer-node-for-BCM490.patch Normal file
View File

@ -0,0 +1,33 @@
From b4a544e415e9be33b37d9bfa9d9f9f4d13f553d6 Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Fri, 8 Jul 2022 11:25:06 -0700
Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC
The cpu mask value in interrupt property inherits from bcm4908.dtsi
which sets to four cpus. Correct the value to two cpus for dual core
BCM4906 SoC.
Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
@@ -9,6 +9,14 @@
/delete-node/ cpu@3;
};
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

28
target/linux/bcm4908/patches-5.10/037-v5.20-0009-arm64-dts-broadcom-bcm4908-Fix-cpu-node-for-smp-boot.patch Normal file
View File

@ -0,0 +1,28 @@
From 8bd582ae9a71d7f14c4e0c735b2eacaf7516d626 Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Fri, 8 Jul 2022 11:25:07 -0700
Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix cpu node for smp boot
Add spin-table enable-method and cpu-release-addr properties for
cpu0 node. This is required by all ARMv8 SoC. Otherwise some
bootloader like u-boot can not update cpu-release-addr and linux
fails to start up secondary cpus.
Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -29,6 +29,8 @@
device_type = "cpu";
compatible = "brcm,brahma-b53";
reg = <0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
next-level-cache = <&l2>;
};

54
target/linux/bcm4908/patches-5.10/037-v5.20-0010-arm64-dts-Add-base-DTS-file-for-bcmbca-device-Asus-G.patch Normal file
View File

@ -0,0 +1,54 @@
From f3f575c4bef95384e68de552c7b29938fd0d9201 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 13 Jul 2022 22:03:51 +0200
Subject: [PATCH] arm64: dts: Add base DTS file for bcmbca device Asus
GT-AX6000
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a home router with 1 GiB of RAM, 6 Ethernet ports, 2 USB ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220713200351.28526-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 4 +++-
.../bcmbca/bcm4912-asus-gt-ax6000.dts | 19 +++++++++++++++++++
2 files changed, 22 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
+dtb-$(CONFIG_ARCH_BCMBCA) += \
+ bcm4912-asus-gt-ax6000.dtb \
+ bcm94912.dtb \
bcm963158.dtb \
bcm96858.dtb \
bcm963146.dtb \
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ compatible = "asus,gt-ax6000", "brcm,bcm4912", "brcm,bcmbca";
+ model = "Asus GT-AX6000";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00 0x00 0x00 0x40000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

4
target/linux/bcm4908/patches-5.10/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch
View File

@ -88,7 +88,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
offset = CORE_STS_OVERRIDE_GMIIP_PORT(port);
else
offset = CORE_STS_OVERRIDE_GMIIP2_PORT(port);
@@ -1134,6 +1137,30 @@ struct bcm_sf2_of_data {
@@ -1139,6 +1142,30 @@ struct bcm_sf2_of_data {
unsigned int num_cfp_rules;
};
@ -119,7 +119,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Register offsets for the SWITCH_REG_* block */
static const u16 bcm_sf2_7445_reg_offsets[] = {
[REG_SWITCH_CNTRL] = 0x00,
@@ -1182,6 +1209,9 @@ static const struct bcm_sf2_of_data bcm_
@@ -1187,6 +1214,9 @@ static const struct bcm_sf2_of_data bcm_
};
static const struct of_device_id bcm_sf2_of_match[] = {

10
target/linux/bcm4908/patches-5.10/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch
View File

@ -82,7 +82,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv)
{
intrl2_0_mask_set(priv, 0xffffffff);
@@ -875,6 +913,8 @@ static int bcm_sf2_sw_resume(struct dsa_
@@ -880,6 +918,8 @@ static int bcm_sf2_sw_resume(struct dsa_
return ret;
}
@ -91,7 +91,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = bcm_sf2_cfp_resume(ds);
if (ret)
return ret;
@@ -1146,6 +1186,7 @@ struct bcm_sf2_of_data {
@@ -1151,6 +1191,7 @@ struct bcm_sf2_of_data {
const u16 *reg_offsets;
unsigned int core_reg_align;
unsigned int num_cfp_rules;
@ -99,7 +99,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const u16 bcm_sf2_4908_reg_offsets[] = {
@@ -1170,6 +1211,7 @@ static const struct bcm_sf2_of_data bcm_
@@ -1175,6 +1216,7 @@ static const struct bcm_sf2_of_data bcm_
.core_reg_align = 0,
.reg_offsets = bcm_sf2_4908_reg_offsets,
.num_cfp_rules = 0, /* FIXME */
@ -107,7 +107,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
/* Register offsets for the SWITCH_REG_* block */
@@ -1280,6 +1322,7 @@ static int bcm_sf2_sw_probe(struct platf
@@ -1285,6 +1327,7 @@ static int bcm_sf2_sw_probe(struct platf
priv->reg_offsets = data->reg_offsets;
priv->core_reg_align = data->core_reg_align;
priv->num_cfp_rules = data->num_cfp_rules;
@ -115,7 +115,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
priv->rcdev = devm_reset_control_get_optional_exclusive(&pdev->dev,
"switch");
@@ -1353,6 +1396,8 @@ static int bcm_sf2_sw_probe(struct platf
@@ -1358,6 +1401,8 @@ static int bcm_sf2_sw_probe(struct platf
goto out_clk_mdiv;
}

2
target/linux/bcm4908/patches-5.10/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1210,7 +1210,7 @@ static const struct bcm_sf2_of_data bcm_
@@ -1215,7 +1215,7 @@ static const struct bcm_sf2_of_data bcm_
.type = BCM4908_DEVICE_ID,
.core_reg_align = 0,
.reg_offsets = bcm_sf2_4908_reg_offsets,

2
target/linux/bcm4908/patches-5.10/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch
View File

@ -33,7 +33,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
break;
default:
switch (port) {
@@ -1233,9 +1238,7 @@ static const u16 bcm_sf2_4908_reg_offset
@@ -1238,9 +1243,7 @@ static const u16 bcm_sf2_4908_reg_offset
[REG_PHY_REVISION] = 0x14,
[REG_SPHY_CNTRL] = 0x24,
[REG_CROSSBAR] = 0xc8,

2
target/linux/bcm4908/patches-5.10/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch
View File

@ -82,7 +82,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
}
@@ -1238,9 +1275,14 @@ static const u16 bcm_sf2_4908_reg_offset
@@ -1243,9 +1280,14 @@ static const u16 bcm_sf2_4908_reg_offset
[REG_SPHY_CNTRL] = 0x24,
[REG_CROSSBAR] = 0xc8,
[REG_RGMII_11_CNTRL] = 0x014c,

8
target/linux/bcm4908/patches-5.10/181-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch → target/linux/bcm4908/patches-5.10/089-v5.18-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch
View File

@ -1,3 +1,4 @@
From cd91fb2776967b2b2dea27307a3f23ba3d9bbb32 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 9 Feb 2022 21:32:02 +0100
Subject: [PATCH] watchdog: allow building BCM7038_WDT for BCM4908
@ -11,14 +12,17 @@ including the watchdog block. Allow building this driver for it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220209203202.26395-1-zajec5@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
---
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1800,7 +1800,7 @@ config BCM7038_WDT
tristate "BCM7038 Watchdog"
@@ -1779,7 +1779,7 @@ config BCM7038_WDT
tristate "BCM63xx/BCM7038 Watchdog"
select WATCHDOG_CORE
depends on HAS_IOMEM
- depends on ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST

10
target/linux/bcm4908/patches-5.10/182-watchdog-bcm7038_wdt-Support-BCM6345-compatible-stri.patch → target/linux/bcm4908/patches-5.10/090-v5.20-watchdog-bcm7038_wdt-Support-BCM6345-compatible-stri.patch
View File

@ -1,5 +1,6 @@
From 2dd441f16d6ad6104d85c4e5dfeb6dde4df26869 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 16 Feb 2022 07:28:34 +0100
Date: Wed, 16 Feb 2022 07:34:08 +0100
Subject: [PATCH] watchdog: bcm7038_wdt: Support BCM6345 compatible string
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -12,13 +13,18 @@ programmed just like the 7038 one.
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220216063408.23168-1-zajec5@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
---
drivers/watchdog/bcm7038_wdt.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/watchdog/bcm7038_wdt.c
+++ b/drivers/watchdog/bcm7038_wdt.c
@@ -193,6 +193,7 @@ static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_
@@ -218,6 +218,7 @@ static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_ops, bcm7038_wdt_suspend,
bcm7038_wdt_resume);
static const struct of_device_id bcm7038_wdt_match[] = {

112
target/linux/bcm4908/patches-5.10/130-0001-arm64-dts-broadcom-bcm4908-add-remaining-LED-pins.patch Normal file
View File

@ -0,0 +1,112 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 18 Jul 2022 13:16:05 +0200
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add remaining LED pins
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Include all 32 pins.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 75 +++++++++++++++++++
1 file changed, 75 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -352,6 +352,61 @@
groups = "led_9_grp_a";
};
+ pins_led_10_a: led_10-a-pins {
+ function = "led_10";
+ groups = "led_10_grp_a";
+ };
+
+ pins_led_11_a: led_11-a-pins {
+ function = "led_11";
+ groups = "led_11_grp_a";
+ };
+
+ pins_led_12_a: led_12-a-pins {
+ function = "led_12";
+ groups = "led_12_grp_a";
+ };
+
+ pins_led_13_a: led_13-a-pins {
+ function = "led_13";
+ groups = "led_13_grp_a";
+ };
+
+ pins_led_14_a: led_14-a-pins {
+ function = "led_14";
+ groups = "led_14_grp_a";
+ };
+
+ pins_led_15_a: led_15-a-pins {
+ function = "led_15";
+ groups = "led_15_grp_a";
+ };
+
+ pins_led_16_a: led_16-a-pins {
+ function = "led_16";
+ groups = "led_16_grp_a";
+ };
+
+ pins_led_17_a: led_17-a-pins {
+ function = "led_17";
+ groups = "led_17_grp_a";
+ };
+
+ pins_led_18_a: led_18-a-pins {
+ function = "led_18";
+ groups = "led_18_grp_a";
+ };
+
+ pins_led_19_a: led_19-a-pins {
+ function = "led_19";
+ groups = "led_19_grp_a";
+ };
+
+ pins_led_20_a: led_20-a-pins {
+ function = "led_20";
+ groups = "led_20_grp_a";
+ };
+
pins_led_21_a: led_21-a-pins {
function = "led_21";
groups = "led_21_grp_a";
@@ -362,6 +417,21 @@
groups = "led_22_grp_a";
};
+ pins_led_23_a: led_23-a-pins {
+ function = "led_23";
+ groups = "led_23_grp_a";
+ };
+
+ pins_led_24_a: led_24-a-pins {
+ function = "led_24";
+ groups = "led_24_grp_a";
+ };
+
+ pins_led_25_a: led_25-a-pins {
+ function = "led_25";
+ groups = "led_25_grp_a";
+ };
+
pins_led_26_a: led_26-a-pins {
function = "led_26";
groups = "led_26_grp_a";
@@ -387,6 +457,11 @@
groups = "led_30_grp_a";
};
+ pins_led_31_a: led_31-a-pins {
+ function = "led_31";
+ groups = "led_31_grp_a";
+ };
+
pins_hs_uart: hs_uart-pins {
function = "hs_uart";
groups = "hs_uart_grp";

32
target/linux/bcm4908/patches-5.10/130-0002-arm64-dts-broadcom-bcm4908-add-LEDs-controller-block.patch Normal file
View File

@ -0,0 +1,32 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 18 Jul 2022 13:17:57 +0200
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add LEDs controller block
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 includes LEDs controller that supports multiple brightness
levels & hardware blinking.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -517,6 +517,14 @@
status = "okay";
};
+ leds: leds@800 {
+ compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";
+ reg = <0x800 0xdc>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
nand-controller@1800 {
#address-cells = <1>;
#size-cells = <0>;

78
target/linux/bcm4908/patches-5.10/130-0003-arm64-dts-broadcom-bcm4908-add-Asus-GT-AC5300-LEDs.patch Normal file
View File

@ -0,0 +1,78 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 18 Jul 2022 13:21:54 +0200
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There are 5 software-controllable LEDs on PCB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
.../bcm4908/bcm4908-asus-gt-ac5300.dts | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -2,6 +2,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
#include "bcm4908.dtsi"
@@ -118,6 +119,53 @@
};
};
+&leds {
+ led-power@11 {
+ reg = <0x11>;
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_WHITE>;
+ default-state = "on";
+ active-low;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_led_17_a>;
+ };
+
+ led-wan-red@12 {
+ reg = <0x12>;
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_RED>;
+ active-low;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_led_18_a>;
+ };
+
+ led-wps@14 {
+ reg = <0x14>;
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_WHITE>;
+ active-low;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_led_20_a>;
+ };
+
+ led-wan-white@15 {
+ reg = <0x15>;
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_WHITE>;
+ active-low;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_led_21_a>;
+ };
+
+ led-lan@19 {
+ reg = <0x19>;
+ function = LED_FUNCTION_LAN;
+ color = <LED_COLOR_ID_WHITE>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_led_25_a>;
+ };
+};
+
&nandcs {
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;

2
target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcm4908-limit-amount-of-GPIOs.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -290,7 +290,7 @@
@@ -292,7 +292,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";

2
target/linux/bcm4908/patches-5.10/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch
View File

@ -29,7 +29,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1535,10 +1535,14 @@ static int bcm_sf2_sw_probe(struct platf
@@ -1540,10 +1540,14 @@ static int bcm_sf2_sw_probe(struct platf
rev = reg_readl(priv, REG_PHY_REVISION);
priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK;

2
target/linux/bcm4908/patches-5.10/701-net-dsa-bcm_sf2-keep-GPHY-enabled-on-the-BCM4908.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1549,6 +1549,12 @@ static int bcm_sf2_sw_probe(struct platf
@@ -1554,6 +1554,12 @@ static int bcm_sf2_sw_probe(struct platf
priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff,
priv->irq0, priv->irq1);

1
target/linux/bcm53xx/config-5.10
View File

@ -172,6 +172,7 @@ CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
# CONFIG_LEDS_BCM63138 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y

1
target/linux/bcm63xx/config-5.10
View File

@ -104,6 +104,7 @@ CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_BCM63138 is not set
CONFIG_LEDS_BCM6328=y
CONFIG_LEDS_BCM6358=y
CONFIG_LEDS_GPIO=y

1
target/linux/bcm63xx/config-5.15
View File

@ -109,6 +109,7 @@ CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_BCM63138 is not set
CONFIG_LEDS_BCM6328=y
CONFIG_LEDS_BCM6358=y
CONFIG_LEDS_GPIO=y

4
target/linux/generic/backport-5.10/610-v5.13-10-netfilter-nftables-update-table-flags-from-the-commi.patch
View File

@ -70,7 +70,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
nft_trans_table_update(trans) = true;
list_add_tail(&trans->list, &ctx->net->nft.commit_list);
return 0;
@@ -7916,11 +7920,10 @@ static int nf_tables_commit(struct net *
@@ -7923,11 +7927,10 @@ static int nf_tables_commit(struct net *
switch (trans->msg_type) {
case NFT_MSG_NEWTABLE:
if (nft_trans_table_update(trans)) {
@ -86,7 +86,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
} else {
nft_clear(net, trans->ctx.table);
}
@@ -8133,11 +8136,9 @@ static int __nf_tables_abort(struct net
@@ -8140,11 +8143,9 @@ static int __nf_tables_abort(struct net
switch (trans->msg_type) {
case NFT_MSG_NEWTABLE:
if (nft_trans_table_update(trans)) {

125
target/linux/generic/backport-5.10/845-v5.20-0001-dt-bindings-leds-add-Broadcom-s-BCM63138-controller.patch Normal file
View File

@ -0,0 +1,125 @@
From 13344f8ce8a0d98aa7f5d69ce3b47393c73a343b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 27 Dec 2021 15:59:04 +0100
Subject: [PATCH] dt-bindings: leds: add Broadcom's BCM63138 controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom used 2 LEDs hardware blocks for their BCM63xx SoCs:
1. Older one (BCM6318, BCM6328, BCM6362, BCM63268, BCM6838)
2. Newer one (BCM6848, BCM6858, BCM63138, BCM63148, BCM63381, BCM68360)
The newer one was also later also used on BCM4908 SoC.
Old block is already documented in the leds-bcm6328.yaml. This binding
documents the new one which uses different registers & programming. It's
first used in BCM63138 thus the binding name.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
.../bindings/leds/leds-bcm63138.yaml | 95 +++++++++++++++++++
1 file changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/leds/leds-bcm63138.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom's BCM63138 LEDs controller
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+description: |
+ This LEDs controller was first used on BCM63138 and later reused on BCM4908,
+ BCM6848, BCM6858, BCM63138, BCM63148, BCM63381 and BCM68360 SoCs.
+
+ It supports up to 32 LEDs that can be connected parallelly or serially. It
+ also includes limited support for hardware blinking.
+
+ Binding serially connected LEDs isn't documented yet.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - brcm,bcm4908-leds
+ - brcm,bcm6848-leds
+ - brcm,bcm6858-leds
+ - brcm,bcm63148-leds
+ - brcm,bcm63381-leds
+ - brcm,bcm68360-leds
+ - const: brcm,bcm63138-leds
+ - const: brcm,bcm63138-leds
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^led@[a-f0-9]+$":
+ type: object
+
+ $ref: common.yaml#
+
+ properties:
+ reg:
+ maxItems: 1
+ description: LED pin number
+
+ active-low:
+ type: boolean
+ description: Makes LED active low.
+
+ required:
+ - reg
+
+ unevaluatedProperties: false
+
+required:
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/leds/common.h>
+
+ leds@ff800800 {
+ compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";
+ reg = <0xff800800 0xdc>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0x0>;
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ };
+
+ led@3 {
+ reg = <0x3>;
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ active-low;
+ };
+ };

371
target/linux/generic/backport-5.10/845-v5.20-0002-leds-bcm63138-add-support-for-BCM63138-controller.patch Normal file
View File

@ -0,0 +1,371 @@
From a0ba692072d89075d0a75c7ad9df31f2c1ee9a1c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 27 Dec 2021 15:59:05 +0100
Subject: [PATCH] leds: bcm63138: add support for BCM63138 controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a new controller first introduced in BCM63138 SoC. Later it was
also used in BCM4908, some BCM68xx and some BCM63xxx SoCs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
drivers/leds/blink/Kconfig | 12 ++
drivers/leds/blink/Makefile | 1 +
drivers/leds/blink/leds-bcm63138.c | 308 +++++++++++++++++++++++++++++
3 files changed, 321 insertions(+)
create mode 100644 drivers/leds/blink/leds-bcm63138.c
--- /dev/null
+++ b/drivers/leds/blink/Kconfig
@@ -0,0 +1,11 @@
+config LEDS_BCM63138
+ tristate "LED Support for Broadcom BCM63138 SoC"
+ depends on LEDS_CLASS
+ depends on ARCH_BCM4908 || ARCH_BCM_5301X || BCM63XX || COMPILE_TEST
+ depends on HAS_IOMEM
+ depends on OF
+ default ARCH_BCM4908
+ help
+ This option enables support for LED controller that is part of
+ BCM63138 SoC. The same hardware block is known to be also used
+ in BCM4908, BCM6848, BCM6858, BCM63148, BCM63381 and BCM68360.
--- /dev/null
+++ b/drivers/leds/blink/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_LEDS_BCM63138) += leds-bcm63138.o
--- /dev/null
+++ b/drivers/leds/blink/leds-bcm63138.c
@@ -0,0 +1,308 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
+ */
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/platform_device.h>
+#include <linux/spinlock.h>
+
+#define BCM63138_MAX_LEDS 32
+#define BCM63138_MAX_BRIGHTNESS 9
+
+#define BCM63138_LED_BITS 4 /* how many bits control a single LED */
+#define BCM63138_LED_MASK ((1 << BCM63138_LED_BITS) - 1) /* 0xf */
+#define BCM63138_LEDS_PER_REG (32 / BCM63138_LED_BITS) /* 8 */
+
+#define BCM63138_GLB_CTRL 0x00
+#define BCM63138_GLB_CTRL_SERIAL_LED_DATA_PPOL 0x00000002
+#define BCM63138_GLB_CTRL_SERIAL_LED_EN_POL 0x00000008
+#define BCM63138_MASK 0x04
+#define BCM63138_HW_LED_EN 0x08
+#define BCM63138_SERIAL_LED_SHIFT_SEL 0x0c
+#define BCM63138_FLASH_RATE_CTRL1 0x10
+#define BCM63138_FLASH_RATE_CTRL2 0x14
+#define BCM63138_FLASH_RATE_CTRL3 0x18
+#define BCM63138_FLASH_RATE_CTRL4 0x1c
+#define BCM63138_BRIGHT_CTRL1 0x20
+#define BCM63138_BRIGHT_CTRL2 0x24
+#define BCM63138_BRIGHT_CTRL3 0x28
+#define BCM63138_BRIGHT_CTRL4 0x2c
+#define BCM63138_POWER_LED_CFG 0x30
+#define BCM63138_HW_POLARITY 0xb4
+#define BCM63138_SW_DATA 0xb8
+#define BCM63138_SW_POLARITY 0xbc
+#define BCM63138_PARALLEL_LED_POLARITY 0xc0
+#define BCM63138_SERIAL_LED_POLARITY 0xc4
+#define BCM63138_HW_LED_STATUS 0xc8
+#define BCM63138_FLASH_CTRL_STATUS 0xcc
+#define BCM63138_FLASH_BRT_CTRL 0xd0
+#define BCM63138_FLASH_P_LED_OUT_STATUS 0xd4
+#define BCM63138_FLASH_S_LED_OUT_STATUS 0xd8
+
+struct bcm63138_leds {
+ struct device *dev;
+ void __iomem *base;
+ spinlock_t lock;
+};
+
+struct bcm63138_led {
+ struct bcm63138_leds *leds;
+ struct led_classdev cdev;
+ u32 pin;
+ bool active_low;
+};
+
+/*
+ * I/O access
+ */
+
+static void bcm63138_leds_write(struct bcm63138_leds *leds, unsigned int reg,
+ u32 data)
+{
+ writel(data, leds->base + reg);
+}
+
+static unsigned long bcm63138_leds_read(struct bcm63138_leds *leds,
+ unsigned int reg)
+{
+ return readl(leds->base + reg);
+}
+
+static void bcm63138_leds_update_bits(struct bcm63138_leds *leds,
+ unsigned int reg, u32 mask, u32 val)
+{
+ WARN_ON(val & ~mask);
+
+ bcm63138_leds_write(leds, reg, (bcm63138_leds_read(leds, reg) & ~mask) | (val & mask));
+}
+
+/*
+ * Helpers
+ */
+
+static void bcm63138_leds_set_flash_rate(struct bcm63138_leds *leds,
+ struct bcm63138_led *led,
+ u8 value)
+{
+ int reg_offset = (led->pin >> fls((BCM63138_LEDS_PER_REG - 1))) * 4;
+ int shift = (led->pin & (BCM63138_LEDS_PER_REG - 1)) * BCM63138_LED_BITS;
+
+ bcm63138_leds_update_bits(leds, BCM63138_FLASH_RATE_CTRL1 + reg_offset,
+ BCM63138_LED_MASK << shift, value << shift);
+}
+
+static void bcm63138_leds_set_bright(struct bcm63138_leds *leds,
+ struct bcm63138_led *led,
+ u8 value)
+{
+ int reg_offset = (led->pin >> fls((BCM63138_LEDS_PER_REG - 1))) * 4;
+ int shift = (led->pin & (BCM63138_LEDS_PER_REG - 1)) * BCM63138_LED_BITS;
+
+ bcm63138_leds_update_bits(leds, BCM63138_BRIGHT_CTRL1 + reg_offset,
+ BCM63138_LED_MASK << shift, value << shift);
+}
+
+static void bcm63138_leds_enable_led(struct bcm63138_leds *leds,
+ struct bcm63138_led *led,
+ enum led_brightness value)
+{
+ u32 bit = BIT(led->pin);
+
+ bcm63138_leds_update_bits(leds, BCM63138_SW_DATA, bit,
+ value == LED_OFF ? 0 : bit);
+}
+
+/*
+ * API callbacks
+ */
+
+static void bcm63138_leds_brightness_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct bcm63138_led *led = container_of(led_cdev, struct bcm63138_led, cdev);
+ struct bcm63138_leds *leds = led->leds;
+ unsigned long flags;
+
+ spin_lock_irqsave(&leds->lock, flags);
+
+ bcm63138_leds_enable_led(leds, led, value);
+ if (!value)
+ bcm63138_leds_set_flash_rate(leds, led, 0);
+ else
+ bcm63138_leds_set_bright(leds, led, value);
+
+ spin_unlock_irqrestore(&leds->lock, flags);
+}
+
+static int bcm63138_leds_blink_set(struct led_classdev *led_cdev,
+ unsigned long *delay_on,
+ unsigned long *delay_off)
+{
+ struct bcm63138_led *led = container_of(led_cdev, struct bcm63138_led, cdev);
+ struct bcm63138_leds *leds = led->leds;
+ unsigned long flags;
+ u8 value;
+
+ if (!*delay_on && !*delay_off) {
+ *delay_on = 640;
+ *delay_off = 640;
+ }
+
+ if (*delay_on != *delay_off) {
+ dev_dbg(led_cdev->dev, "Blinking at unequal delays is not supported\n");
+ return -EINVAL;
+ }
+
+ switch (*delay_on) {
+ case 1152 ... 1408: /* 1280 ms ± 10% */
+ value = 0x7;
+ break;
+ case 576 ... 704: /* 640 ms ± 10% */
+ value = 0x6;
+ break;
+ case 288 ... 352: /* 320 ms ± 10% */
+ value = 0x5;
+ break;
+ case 126 ... 154: /* 140 ms ± 10% */
+ value = 0x4;
+ break;
+ case 59 ... 72: /* 65 ms ± 10% */
+ value = 0x3;
+ break;
+ default:
+ dev_dbg(led_cdev->dev, "Blinking delay value %lu is unsupported\n",
+ *delay_on);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&leds->lock, flags);
+
+ bcm63138_leds_enable_led(leds, led, BCM63138_MAX_BRIGHTNESS);
+ bcm63138_leds_set_flash_rate(leds, led, value);
+
+ spin_unlock_irqrestore(&leds->lock, flags);
+
+ return 0;
+}
+
+/*
+ * LED driver
+ */
+
+static void bcm63138_leds_create_led(struct bcm63138_leds *leds,
+ struct device_node *np)
+{
+ struct led_init_data init_data = {
+ .fwnode = of_fwnode_handle(np),
+ };
+ struct device *dev = leds->dev;
+ struct bcm63138_led *led;
+ struct pinctrl *pinctrl;
+ u32 bit;
+ int err;
+
+ led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL);
+ if (!led) {
+ dev_err(dev, "Failed to alloc LED\n");
+ return;
+ }
+
+ led->leds = leds;
+
+ if (of_property_read_u32(np, "reg", &led->pin)) {
+ dev_err(dev, "Missing \"reg\" property in %pOF\n", np);
+ goto err_free;
+ }
+
+ if (led->pin >= BCM63138_MAX_LEDS) {
+ dev_err(dev, "Invalid \"reg\" value %d\n", led->pin);
+ goto err_free;
+ }
+
+ led->active_low = of_property_read_bool(np, "active-low");
+
+ led->cdev.max_brightness = BCM63138_MAX_BRIGHTNESS;
+ led->cdev.brightness_set = bcm63138_leds_brightness_set;
+ led->cdev.blink_set = bcm63138_leds_blink_set;
+
+ err = devm_led_classdev_register_ext(dev, &led->cdev, &init_data);
+ if (err) {
+ dev_err(dev, "Failed to register LED %pOF: %d\n", np, err);
+ goto err_free;
+ }
+
+ pinctrl = devm_pinctrl_get_select_default(led->cdev.dev);
+ if (IS_ERR(pinctrl) && PTR_ERR(pinctrl) != -ENODEV) {
+ dev_warn(led->cdev.dev, "Failed to select %pOF pinctrl: %ld\n",
+ np, PTR_ERR(pinctrl));
+ }
+
+ bit = BIT(led->pin);
+ bcm63138_leds_update_bits(leds, BCM63138_PARALLEL_LED_POLARITY, bit,
+ led->active_low ? 0 : bit);
+ bcm63138_leds_update_bits(leds, BCM63138_HW_LED_EN, bit, 0);
+ bcm63138_leds_set_flash_rate(leds, led, 0);
+ bcm63138_leds_enable_led(leds, led, led->cdev.brightness);
+
+ return;
+
+err_free:
+ devm_kfree(dev, led);
+}
+
+static int bcm63138_leds_probe(struct platform_device *pdev)
+{
+ struct device_node *np = dev_of_node(&pdev->dev);
+ struct device *dev = &pdev->dev;
+ struct bcm63138_leds *leds;
+ struct device_node *child;
+
+ leds = devm_kzalloc(dev, sizeof(*leds), GFP_KERNEL);
+ if (!leds)
+ return -ENOMEM;
+
+ leds->dev = dev;
+
+ leds->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(leds->base))
+ return PTR_ERR(leds->base);
+
+ spin_lock_init(&leds->lock);
+
+ bcm63138_leds_write(leds, BCM63138_GLB_CTRL,
+ BCM63138_GLB_CTRL_SERIAL_LED_DATA_PPOL |
+ BCM63138_GLB_CTRL_SERIAL_LED_EN_POL);
+ bcm63138_leds_write(leds, BCM63138_HW_LED_EN, 0);
+ bcm63138_leds_write(leds, BCM63138_SERIAL_LED_POLARITY, 0);
+ bcm63138_leds_write(leds, BCM63138_PARALLEL_LED_POLARITY, 0);
+
+ for_each_available_child_of_node(np, child) {
+ bcm63138_leds_create_led(leds, child);
+ }
+
+ return 0;
+}
+
+static const struct of_device_id bcm63138_leds_of_match_table[] = {
+ { .compatible = "brcm,bcm63138-leds", },
+ { },
+};
+
+static struct platform_driver bcm63138_leds_driver = {
+ .probe = bcm63138_leds_probe,
+ .driver = {
+ .name = "leds-bcm63xxx",
+ .of_match_table = bcm63138_leds_of_match_table,
+ },
+};
+
+module_platform_driver(bcm63138_leds_driver);
+
+MODULE_AUTHOR("Rafał Miłecki");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(of, bcm63138_leds_of_match_table);
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -929,6 +929,8 @@ config LEDS_ACER_A500
This option enables support for the Power Button LED of
Acer Iconia Tab A500.
+source "drivers/leds/blink/Kconfig"
+
comment "LED Triggers"
source "drivers/leds/trigger/Kconfig"
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -105,3 +105,6 @@ obj-$(CONFIG_LEDS_USER) += uleds.o
# LED Triggers
obj-$(CONFIG_LEDS_TRIGGERS) += trigger/
+
+# LED Blink
+obj-y += blink/

30
target/linux/generic/backport-5.10/846-v5.20-0001-dt-bindings-leds-leds-bcm63138-unify-full-stops-in-d.patch Normal file
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@ -0,0 +1,30 @@
From 13b64a0c19059b38150c79d65d350ae44034c5df Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 17 Jul 2022 14:42:46 +0200
Subject: [PATCH] dt-bindings: leds: leds-bcm63138: unify full stops in
descriptions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Description of "reg" doesn't have full stop at the end. It makes sense
as it's a one-sentence only. Use the same style for "active-low".
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
Documentation/devicetree/bindings/leds/leds-bcm63138.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
+++ b/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
@@ -54,7 +54,7 @@ patternProperties:
active-low:
type: boolean
- description: Makes LED active low.
+ description: Makes LED active low
required:
- reg

25
target/linux/generic/backport-5.10/846-v5.20-0002-leds-add-help-info-about-BCM63138-module-name.patch Normal file
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@ -0,0 +1,25 @@
From bcc607cdbb1f931111196699426f0cb83bfb296a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 17 Jul 2022 14:42:47 +0200
Subject: [PATCH] leds: add help info about BCM63138 module name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's what we do for all other LEDs drivers.
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
drivers/leds/blink/Kconfig | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/leds/blink/Kconfig
+++ b/drivers/leds/blink/Kconfig
@@ -9,3 +9,5 @@ config LEDS_BCM63138
This option enables support for LED controller that is part of
BCM63138 SoC. The same hardware block is known to be also used
in BCM4908, BCM6848, BCM6858, BCM63148, BCM63381 and BCM68360.
+
+ If compiled as module it will be called leds-bcm63138.

30
target/linux/generic/backport-5.10/846-v5.20-0003-leds-leds-bcm63138-get-rid-of-LED_OFF.patch Normal file
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@ -0,0 +1,30 @@
From 92cfc71ee2ddfb499ed53e21b28bdf8739bc70bc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 17 Jul 2022 14:42:48 +0200
Subject: [PATCH] leds: leds-bcm63138: get rid of LED_OFF
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The whole "enum led_brightness" is marked as obsolete. Replace it with a
(non-)zero check.
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
drivers/leds/blink/leds-bcm63138.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- a/drivers/leds/blink/leds-bcm63138.c
+++ b/drivers/leds/blink/leds-bcm63138.c
@@ -113,8 +113,7 @@ static void bcm63138_leds_enable_led(str
{
u32 bit = BIT(led->pin);
- bcm63138_leds_update_bits(leds, BCM63138_SW_DATA, bit,
- value == LED_OFF ? 0 : bit);
+ bcm63138_leds_update_bits(leds, BCM63138_SW_DATA, bit, value ? bit : 0);
}
/*

28
target/linux/generic/backport-5.15/702-v5.19-34-eth-mtk_ppe-fix-up-after-merge.patch Normal file
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@ -0,0 +1,28 @@
From: Jakub Kicinski <kuba@kernel.org>
Date: Thu, 19 May 2022 18:25:55 -0700
Subject: [PATCH] eth: mtk_ppe: fix up after merge
I missed this in the barrage of GCC 12 warnings. Commit cf2df74e202d
("net: fix dev_fill_forward_path with pppoe + bridge") changed
the pointer into an array.
Fixes: d7e6f5836038 ("Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net")
Link: https://lore.kernel.org/r/20220520012555.2262461-1-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
@@ -90,10 +90,11 @@ mtk_flow_get_wdma_info(struct net_device
{
struct net_device_path_ctx ctx = {
.dev = dev,
- .daddr = addr,
};
struct net_device_path path = {};
+ memcpy(ctx.daddr, addr, sizeof(ctx.daddr));
+
if (!IS_ENABLED(CONFIG_NET_MEDIATEK_SOC_WED))
return -1;

125
target/linux/generic/backport-5.15/800-v5.20-0001-dt-bindings-leds-add-Broadcom-s-BCM63138-controller.patch Normal file
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@ -0,0 +1,125 @@
From 13344f8ce8a0d98aa7f5d69ce3b47393c73a343b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 27 Dec 2021 15:59:04 +0100
Subject: [PATCH] dt-bindings: leds: add Broadcom's BCM63138 controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom used 2 LEDs hardware blocks for their BCM63xx SoCs:
1. Older one (BCM6318, BCM6328, BCM6362, BCM63268, BCM6838)
2. Newer one (BCM6848, BCM6858, BCM63138, BCM63148, BCM63381, BCM68360)
The newer one was also later also used on BCM4908 SoC.
Old block is already documented in the leds-bcm6328.yaml. This binding
documents the new one which uses different registers & programming. It's
first used in BCM63138 thus the binding name.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
.../bindings/leds/leds-bcm63138.yaml | 95 +++++++++++++++++++
1 file changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/leds/leds-bcm63138.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom's BCM63138 LEDs controller
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+description: |
+ This LEDs controller was first used on BCM63138 and later reused on BCM4908,
+ BCM6848, BCM6858, BCM63138, BCM63148, BCM63381 and BCM68360 SoCs.
+
+ It supports up to 32 LEDs that can be connected parallelly or serially. It
+ also includes limited support for hardware blinking.
+
+ Binding serially connected LEDs isn't documented yet.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - brcm,bcm4908-leds
+ - brcm,bcm6848-leds
+ - brcm,bcm6858-leds
+ - brcm,bcm63148-leds
+ - brcm,bcm63381-leds
+ - brcm,bcm68360-leds
+ - const: brcm,bcm63138-leds
+ - const: brcm,bcm63138-leds
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^led@[a-f0-9]+$":
+ type: object
+
+ $ref: common.yaml#
+
+ properties:
+ reg:
+ maxItems: 1
+ description: LED pin number
+
+ active-low:
+ type: boolean
+ description: Makes LED active low.
+
+ required:
+ - reg
+
+ unevaluatedProperties: false
+
+required:
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/leds/common.h>
+
+ leds@ff800800 {
+ compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";
+ reg = <0xff800800 0xdc>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0x0>;
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ };
+
+ led@3 {
+ reg = <0x3>;
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ active-low;
+ };
+ };

356
target/linux/generic/backport-5.15/800-v5.20-0002-leds-bcm63138-add-support-for-BCM63138-controller.patch Normal file
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@ -0,0 +1,356 @@
From a0ba692072d89075d0a75c7ad9df31f2c1ee9a1c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 27 Dec 2021 15:59:05 +0100
Subject: [PATCH] leds: bcm63138: add support for BCM63138 controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a new controller first introduced in BCM63138 SoC. Later it was
also used in BCM4908, some BCM68xx and some BCM63xxx SoCs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
drivers/leds/blink/Kconfig | 12 ++
drivers/leds/blink/Makefile | 1 +
drivers/leds/blink/leds-bcm63138.c | 308 +++++++++++++++++++++++++++++
3 files changed, 321 insertions(+)
create mode 100644 drivers/leds/blink/leds-bcm63138.c
--- a/drivers/leds/blink/Kconfig
+++ b/drivers/leds/blink/Kconfig
@@ -1,3 +1,15 @@
+config LEDS_BCM63138
+ tristate "LED Support for Broadcom BCM63138 SoC"
+ depends on LEDS_CLASS
+ depends on ARCH_BCM4908 || ARCH_BCM_5301X || BCM63XX || COMPILE_TEST
+ depends on HAS_IOMEM
+ depends on OF
+ default ARCH_BCM4908
+ help
+ This option enables support for LED controller that is part of
+ BCM63138 SoC. The same hardware block is known to be also used
+ in BCM4908, BCM6848, BCM6858, BCM63148, BCM63381 and BCM68360.
+
config LEDS_LGM
tristate "LED support for LGM SoC series"
depends on X86 || COMPILE_TEST
--- a/drivers/leds/blink/Makefile
+++ b/drivers/leds/blink/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_LEDS_BCM63138) += leds-bcm63138.o
obj-$(CONFIG_LEDS_LGM) += leds-lgm-sso.o
--- /dev/null
+++ b/drivers/leds/blink/leds-bcm63138.c
@@ -0,0 +1,308 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
+ */
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/platform_device.h>
+#include <linux/spinlock.h>
+
+#define BCM63138_MAX_LEDS 32
+#define BCM63138_MAX_BRIGHTNESS 9
+
+#define BCM63138_LED_BITS 4 /* how many bits control a single LED */
+#define BCM63138_LED_MASK ((1 << BCM63138_LED_BITS) - 1) /* 0xf */
+#define BCM63138_LEDS_PER_REG (32 / BCM63138_LED_BITS) /* 8 */
+
+#define BCM63138_GLB_CTRL 0x00
+#define BCM63138_GLB_CTRL_SERIAL_LED_DATA_PPOL 0x00000002
+#define BCM63138_GLB_CTRL_SERIAL_LED_EN_POL 0x00000008
+#define BCM63138_MASK 0x04
+#define BCM63138_HW_LED_EN 0x08
+#define BCM63138_SERIAL_LED_SHIFT_SEL 0x0c
+#define BCM63138_FLASH_RATE_CTRL1 0x10
+#define BCM63138_FLASH_RATE_CTRL2 0x14
+#define BCM63138_FLASH_RATE_CTRL3 0x18
+#define BCM63138_FLASH_RATE_CTRL4 0x1c
+#define BCM63138_BRIGHT_CTRL1 0x20
+#define BCM63138_BRIGHT_CTRL2 0x24
+#define BCM63138_BRIGHT_CTRL3 0x28
+#define BCM63138_BRIGHT_CTRL4 0x2c
+#define BCM63138_POWER_LED_CFG 0x30
+#define BCM63138_HW_POLARITY 0xb4
+#define BCM63138_SW_DATA 0xb8
+#define BCM63138_SW_POLARITY 0xbc
+#define BCM63138_PARALLEL_LED_POLARITY 0xc0
+#define BCM63138_SERIAL_LED_POLARITY 0xc4
+#define BCM63138_HW_LED_STATUS 0xc8
+#define BCM63138_FLASH_CTRL_STATUS 0xcc
+#define BCM63138_FLASH_BRT_CTRL 0xd0
+#define BCM63138_FLASH_P_LED_OUT_STATUS 0xd4
+#define BCM63138_FLASH_S_LED_OUT_STATUS 0xd8
+
+struct bcm63138_leds {
+ struct device *dev;
+ void __iomem *base;
+ spinlock_t lock;
+};
+
+struct bcm63138_led {
+ struct bcm63138_leds *leds;
+ struct led_classdev cdev;
+ u32 pin;
+ bool active_low;
+};
+
+/*
+ * I/O access
+ */
+
+static void bcm63138_leds_write(struct bcm63138_leds *leds, unsigned int reg,
+ u32 data)
+{
+ writel(data, leds->base + reg);
+}
+
+static unsigned long bcm63138_leds_read(struct bcm63138_leds *leds,
+ unsigned int reg)
+{
+ return readl(leds->base + reg);
+}
+
+static void bcm63138_leds_update_bits(struct bcm63138_leds *leds,
+ unsigned int reg, u32 mask, u32 val)
+{
+ WARN_ON(val & ~mask);
+
+ bcm63138_leds_write(leds, reg, (bcm63138_leds_read(leds, reg) & ~mask) | (val & mask));
+}
+
+/*
+ * Helpers
+ */
+
+static void bcm63138_leds_set_flash_rate(struct bcm63138_leds *leds,
+ struct bcm63138_led *led,
+ u8 value)
+{
+ int reg_offset = (led->pin >> fls((BCM63138_LEDS_PER_REG - 1))) * 4;
+ int shift = (led->pin & (BCM63138_LEDS_PER_REG - 1)) * BCM63138_LED_BITS;
+
+ bcm63138_leds_update_bits(leds, BCM63138_FLASH_RATE_CTRL1 + reg_offset,
+ BCM63138_LED_MASK << shift, value << shift);
+}
+
+static void bcm63138_leds_set_bright(struct bcm63138_leds *leds,
+ struct bcm63138_led *led,
+ u8 value)
+{
+ int reg_offset = (led->pin >> fls((BCM63138_LEDS_PER_REG - 1))) * 4;
+ int shift = (led->pin & (BCM63138_LEDS_PER_REG - 1)) * BCM63138_LED_BITS;
+
+ bcm63138_leds_update_bits(leds, BCM63138_BRIGHT_CTRL1 + reg_offset,
+ BCM63138_LED_MASK << shift, value << shift);
+}
+
+static void bcm63138_leds_enable_led(struct bcm63138_leds *leds,
+ struct bcm63138_led *led,
+ enum led_brightness value)
+{
+ u32 bit = BIT(led->pin);
+
+ bcm63138_leds_update_bits(leds, BCM63138_SW_DATA, bit,
+ value == LED_OFF ? 0 : bit);
+}
+
+/*
+ * API callbacks
+ */
+
+static void bcm63138_leds_brightness_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct bcm63138_led *led = container_of(led_cdev, struct bcm63138_led, cdev);
+ struct bcm63138_leds *leds = led->leds;
+ unsigned long flags;
+
+ spin_lock_irqsave(&leds->lock, flags);
+
+ bcm63138_leds_enable_led(leds, led, value);
+ if (!value)
+ bcm63138_leds_set_flash_rate(leds, led, 0);
+ else
+ bcm63138_leds_set_bright(leds, led, value);
+
+ spin_unlock_irqrestore(&leds->lock, flags);
+}
+
+static int bcm63138_leds_blink_set(struct led_classdev *led_cdev,
+ unsigned long *delay_on,
+ unsigned long *delay_off)
+{
+ struct bcm63138_led *led = container_of(led_cdev, struct bcm63138_led, cdev);
+ struct bcm63138_leds *leds = led->leds;
+ unsigned long flags;
+ u8 value;
+
+ if (!*delay_on && !*delay_off) {
+ *delay_on = 640;
+ *delay_off = 640;
+ }
+
+ if (*delay_on != *delay_off) {
+ dev_dbg(led_cdev->dev, "Blinking at unequal delays is not supported\n");
+ return -EINVAL;
+ }
+
+ switch (*delay_on) {
+ case 1152 ... 1408: /* 1280 ms ± 10% */
+ value = 0x7;
+ break;
+ case 576 ... 704: /* 640 ms ± 10% */
+ value = 0x6;
+ break;
+ case 288 ... 352: /* 320 ms ± 10% */
+ value = 0x5;
+ break;
+ case 126 ... 154: /* 140 ms ± 10% */
+ value = 0x4;
+ break;
+ case 59 ... 72: /* 65 ms ± 10% */
+ value = 0x3;
+ break;
+ default:
+ dev_dbg(led_cdev->dev, "Blinking delay value %lu is unsupported\n",
+ *delay_on);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&leds->lock, flags);
+
+ bcm63138_leds_enable_led(leds, led, BCM63138_MAX_BRIGHTNESS);
+ bcm63138_leds_set_flash_rate(leds, led, value);
+
+ spin_unlock_irqrestore(&leds->lock, flags);
+
+ return 0;
+}
+
+/*
+ * LED driver
+ */
+
+static void bcm63138_leds_create_led(struct bcm63138_leds *leds,
+ struct device_node *np)
+{
+ struct led_init_data init_data = {
+ .fwnode = of_fwnode_handle(np),
+ };
+ struct device *dev = leds->dev;
+ struct bcm63138_led *led;
+ struct pinctrl *pinctrl;
+ u32 bit;
+ int err;
+
+ led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL);
+ if (!led) {
+ dev_err(dev, "Failed to alloc LED\n");
+ return;
+ }
+
+ led->leds = leds;
+
+ if (of_property_read_u32(np, "reg", &led->pin)) {
+ dev_err(dev, "Missing \"reg\" property in %pOF\n", np);
+ goto err_free;
+ }
+
+ if (led->pin >= BCM63138_MAX_LEDS) {
+ dev_err(dev, "Invalid \"reg\" value %d\n", led->pin);
+ goto err_free;
+ }
+
+ led->active_low = of_property_read_bool(np, "active-low");
+
+ led->cdev.max_brightness = BCM63138_MAX_BRIGHTNESS;
+ led->cdev.brightness_set = bcm63138_leds_brightness_set;
+ led->cdev.blink_set = bcm63138_leds_blink_set;
+
+ err = devm_led_classdev_register_ext(dev, &led->cdev, &init_data);
+ if (err) {
+ dev_err(dev, "Failed to register LED %pOF: %d\n", np, err);
+ goto err_free;
+ }
+
+ pinctrl = devm_pinctrl_get_select_default(led->cdev.dev);
+ if (IS_ERR(pinctrl) && PTR_ERR(pinctrl) != -ENODEV) {
+ dev_warn(led->cdev.dev, "Failed to select %pOF pinctrl: %ld\n",
+ np, PTR_ERR(pinctrl));
+ }
+
+ bit = BIT(led->pin);
+ bcm63138_leds_update_bits(leds, BCM63138_PARALLEL_LED_POLARITY, bit,
+ led->active_low ? 0 : bit);
+ bcm63138_leds_update_bits(leds, BCM63138_HW_LED_EN, bit, 0);
+ bcm63138_leds_set_flash_rate(leds, led, 0);
+ bcm63138_leds_enable_led(leds, led, led->cdev.brightness);
+
+ return;
+
+err_free:
+ devm_kfree(dev, led);
+}
+
+static int bcm63138_leds_probe(struct platform_device *pdev)
+{
+ struct device_node *np = dev_of_node(&pdev->dev);
+ struct device *dev = &pdev->dev;
+ struct bcm63138_leds *leds;
+ struct device_node *child;
+
+ leds = devm_kzalloc(dev, sizeof(*leds), GFP_KERNEL);
+ if (!leds)
+ return -ENOMEM;
+
+ leds->dev = dev;
+
+ leds->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(leds->base))
+ return PTR_ERR(leds->base);
+
+ spin_lock_init(&leds->lock);
+
+ bcm63138_leds_write(leds, BCM63138_GLB_CTRL,
+ BCM63138_GLB_CTRL_SERIAL_LED_DATA_PPOL |
+ BCM63138_GLB_CTRL_SERIAL_LED_EN_POL);
+ bcm63138_leds_write(leds, BCM63138_HW_LED_EN, 0);
+ bcm63138_leds_write(leds, BCM63138_SERIAL_LED_POLARITY, 0);
+ bcm63138_leds_write(leds, BCM63138_PARALLEL_LED_POLARITY, 0);
+
+ for_each_available_child_of_node(np, child) {
+ bcm63138_leds_create_led(leds, child);
+ }
+
+ return 0;
+}
+
+static const struct of_device_id bcm63138_leds_of_match_table[] = {
+ { .compatible = "brcm,bcm63138-leds", },
+ { },
+};
+
+static struct platform_driver bcm63138_leds_driver = {
+ .probe = bcm63138_leds_probe,
+ .driver = {
+ .name = "leds-bcm63xxx",
+ .of_match_table = bcm63138_leds_of_match_table,
+ },
+};
+
+module_platform_driver(bcm63138_leds_driver);
+
+MODULE_AUTHOR("Rafał Miłecki");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(of, bcm63138_leds_of_match_table);

30
target/linux/generic/backport-5.15/801-v5.20-0001-dt-bindings-leds-leds-bcm63138-unify-full-stops-in-d.patch Normal file
View File

@ -0,0 +1,30 @@
From 13b64a0c19059b38150c79d65d350ae44034c5df Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 17 Jul 2022 14:42:46 +0200
Subject: [PATCH] dt-bindings: leds: leds-bcm63138: unify full stops in
descriptions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Description of "reg" doesn't have full stop at the end. It makes sense
as it's a one-sentence only. Use the same style for "active-low".
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
Documentation/devicetree/bindings/leds/leds-bcm63138.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
+++ b/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
@@ -54,7 +54,7 @@ patternProperties:
active-low:
type: boolean
- description: Makes LED active low.
+ description: Makes LED active low
required:
- reg

28
target/linux/generic/backport-5.15/801-v5.20-0002-leds-add-help-info-about-BCM63138-module-name.patch Normal file
View File

@ -0,0 +1,28 @@
From bcc607cdbb1f931111196699426f0cb83bfb296a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 17 Jul 2022 14:42:47 +0200
Subject: [PATCH] leds: add help info about BCM63138 module name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's what we do for all other LEDs drivers.
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
drivers/leds/blink/Kconfig | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/leds/blink/Kconfig
+++ b/drivers/leds/blink/Kconfig
@@ -10,6 +10,8 @@ config LEDS_BCM63138
BCM63138 SoC. The same hardware block is known to be also used
in BCM4908, BCM6848, BCM6858, BCM63148, BCM63381 and BCM68360.
+ If compiled as module it will be called leds-bcm63138.
+
config LEDS_LGM
tristate "LED support for LGM SoC series"
depends on X86 || COMPILE_TEST

30
target/linux/generic/backport-5.15/801-v5.20-0003-leds-leds-bcm63138-get-rid-of-LED_OFF.patch Normal file
View File

@ -0,0 +1,30 @@
From 92cfc71ee2ddfb499ed53e21b28bdf8739bc70bc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 17 Jul 2022 14:42:48 +0200
Subject: [PATCH] leds: leds-bcm63138: get rid of LED_OFF
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The whole "enum led_brightness" is marked as obsolete. Replace it with a
(non-)zero check.
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
---
drivers/leds/blink/leds-bcm63138.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- a/drivers/leds/blink/leds-bcm63138.c
+++ b/drivers/leds/blink/leds-bcm63138.c
@@ -113,8 +113,7 @@ static void bcm63138_leds_enable_led(str
{
u32 bit = BIT(led->pin);
- bcm63138_leds_update_bits(leds, BCM63138_SW_DATA, bit,
- value == LED_OFF ? 0 : bit);
+ bcm63138_leds_update_bits(leds, BCM63138_SW_DATA, bit, value ? bit : 0);
}
/*

1
target/linux/generic/config-5.15
View File

@ -928,6 +928,7 @@ CONFIG_CIFS_XATTR=y
# CONFIG_CLEANCACHE is not set
# CONFIG_CLKSRC_PISTACHIO is not set
# CONFIG_CLKSRC_VERSATILE is not set
# CONFIG_CLKSRC_PISTACHIO is not set
# CONFIG_CLK_GFM_LPASS_SM8250 is not set
# CONFIG_CLK_HSDK is not set
# CONFIG_CLK_QORIQ is not set

2
target/linux/generic/hack-5.10/221-module_exports.patch
View File

@ -104,7 +104,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* note on .section use: we specify progbits since usage of the "M" (SHF_MERGE)
* section flag requires it. Use '%progbits' instead of '@progbits' since the
@@ -42,7 +42,7 @@
@@ -39,7 +45,7 @@
__ksymtab_\name:
__put \val, __kstrtab_\name
.previous

30
target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch Normal file
View File

@ -0,0 +1,30 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 19 Jul 2022 06:17:48 +0200
Subject: [PATCH] Revert "Revert "Revert "driver core: Set fw_devlink=on by
default"""
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This reverts commit ea718c699055c8566eb64432388a04974c43b2ea.
With of_platform_populate() called for MTD partitions that commit breaks
probing devices which reference MTD in device tree.
Link: https://lore.kernel.org/all/696cb2da-20b9-b3dd-46d9-de4bf91a1506@gmail.com/T/#u
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/base/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -1561,7 +1561,7 @@ static void device_links_purge(struct de
#define FW_DEVLINK_FLAGS_RPM (FW_DEVLINK_FLAGS_ON | \
DL_FLAG_PM_RUNTIME)
-static u32 fw_devlink_flags = FW_DEVLINK_FLAGS_ON;
+static u32 fw_devlink_flags = FW_DEVLINK_FLAGS_PERMISSIVE;
static int __init fw_devlink_setup(char *arg)
{
if (!arg)

16
target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
View File

@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
/*
* Allocate a dst for local (unicast / anycast) address.
*/
@@ -4929,7 +4959,8 @@ static int rtm_to_fib6_config(struct sk_
@@ -4936,7 +4966,8 @@ static int rtm_to_fib6_config(struct sk_
if (rtm->rtm_type == RTN_UNREACHABLE ||
rtm->rtm_type == RTN_BLACKHOLE ||
rtm->rtm_type == RTN_PROHIBIT ||
@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
@@ -6128,6 +6159,8 @@ static int ip6_route_dev_notify(struct n
@@ -6135,6 +6166,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
@@ -6139,6 +6172,7 @@ static int ip6_route_dev_notify(struct n
@@ -6146,6 +6179,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
@@ -6330,6 +6364,8 @@ static int __net_init ip6_route_net_init
@@ -6337,6 +6371,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
@@ -6340,11 +6376,21 @@ static int __net_init ip6_route_net_init
@@ -6347,11 +6383,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
@@ -6371,6 +6417,8 @@ out:
@@ -6378,6 +6424,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
@@ -6390,6 +6438,7 @@ static void __net_exit ip6_route_net_exi
@@ -6397,6 +6445,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
@@ -6467,6 +6516,9 @@ void __init ip6_route_init_special_entri
@@ -6474,6 +6523,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);

3
target/linux/ipq40xx/base-files/etc/board.d/02_network
View File

@ -90,7 +90,8 @@ ipq40xx_setup_interfaces()
;;
compex,wpj419|\
compex,wpj428|\
engenius,eap2200)
engenius,eap2200|\
mikrotik,wap-ac)
ucidef_set_interface_lan "eth0 eth1"
;;
buffalo,wtr-m2133hp)

12
target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
View File

@ -120,7 +120,8 @@ case "$FIRMWARE" in
;;
mikrotik,cap-ac |\
mikrotik,hap-ac2 |\
mikrotik,hap-ac3)
mikrotik,hap-ac3 |\
mikrotik,wap-ac)
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x0 0x2f20 ) || \
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_0" 0x0 0x2f20 )
@ -202,7 +203,8 @@ case "$FIRMWARE" in
mikrotik,cap-ac |\
mikrotik,hap-ac2 |\
mikrotik,hap-ac3 |\
mikrotik,sxtsq-5-ac)
mikrotik,sxtsq-5-ac |\
mikrotik,wap-ac)
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x8000 0x2f20 ) || \
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_2" 0x0 0x2f20 )
@ -225,7 +227,8 @@ case "$FIRMWARE" in
case "$board" in
mikrotik,cap-ac |\
mikrotik,hap-ac2 |\
mikrotik,hap-ac3)
mikrotik,hap-ac3 |\
mikrotik,wap-ac)
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x2f20 0x2f20 ) || \
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_0" 0x2f20 0x2f20 )
@ -237,7 +240,8 @@ case "$FIRMWARE" in
mikrotik,cap-ac |\
mikrotik,hap-ac2 |\
mikrotik,hap-ac3 |\
mikrotik,sxtsq-5-ac)
mikrotik,sxtsq-5-ac |\
mikrotik,wap-ac)
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0xaf20 0x2f20 ) || \
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_2" 0x2f20 0x2f20 )

5
target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
View File

@ -26,6 +26,11 @@ preinit_set_mac_address() {
mac_lan=$(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66)
[ -n "$mac_lan" ] && ip link set dev eth0 address "$mac_lan"
;;
mikrotik,wap-ac)
base_mac=$(cat /sys/firmware/mikrotik/hard_config/mac_base)
ip link set dev eth0 address "$base_mac"
ip link set dev eth1 address $(macaddr_add "$base_mac" 1)
;;
zyxel,nbg6617)
base_mac=$(cat /sys/class/net/eth0/address)
ip link set dev eth0 address $(macaddr_add "$base_mac" 2)

3
target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
View File

@ -175,7 +175,8 @@ platform_do_upgrade() {
mikrotik,cap-ac|\
mikrotik,hap-ac2|\
mikrotik,lhgg-60ad|\
mikrotik,sxtsq-5-ac)
mikrotik,sxtsq-5-ac|\
mikrotik,wap-ac)
[ "$(rootfs_type)" = "tmpfs" ] && mtd erase firmware
default_do_upgrade "$1"
;;

221
target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts Normal file
View File

@ -0,0 +1,221 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "MikroTik wAP ac";
compatible = "mikrotik,wap-ac";
memory {
device_type = "memory";
reg = <0x80000000 0x08000000>;
};
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
led-boot = &led_user;
led-failsafe = &led_user;
led-running = &led_user;
led-upgrade = &led_user;
};
soc {
counter@4a1000 {
compatible = "qcom,qca-gcnt";
reg = <0x4a1000 0x4>;
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
power {
label = "blue:power";
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
default-state = "keep";
};
led_user: user {
label = "green:user";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
panic-indicator;
};
};
};
&prng {
status = "okay";
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <2>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
status = "okay";
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Qualcomm";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
compatible = "mikrotik,routerboot-partitions";
#address-cells = <1>;
#size-cells = <1>;
label = "RouterBoot";
reg = <0x80000 0x80000>;
hard_config {
read-only;
size = <0x2000>;
};
dtb_config {
read-only;
};
soft_config {
};
};
partition@100000 {
compatible = "mikrotik,minor";
label = "firmware";
reg = <0x100000 0xf00000>;
};
};
};
};
&blsp1_uart1 {
status = "okay";
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&watchdog {
status = "okay";
};
&mdio {
status = "okay";
};
&gmac0 {
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <2 0x20>;
};
&gmac1 {
qcom,phy_mdio_addr = <3>;
vlan_tag = <1 0x10>;
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "MikroTik-wAP-ac";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "MikroTik-wAP-ac";
};

8
target/linux/ipq40xx/image/mikrotik.mk
View File

@ -62,3 +62,11 @@ define Device/mikrotik_sxtsq-5-ac
DEVICE_PACKAGES := rssileds
endef
TARGET_DEVICES += mikrotik_sxtsq-5-ac
define Device/mikrotik_wap-ac
$(call Device/mikrotik_nor)
DEVICE_MODEL := wAP ac
SOC := qcom-ipq4018
DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
endef
TARGET_DEVICES += mikrotik_wap-ac

3
target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -903,11 +903,78 @@ dtb-$(CONFIG_ARCH_QCOM) += \
@@ -903,11 +903,79 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8074-dragonboard.dtb \
qcom-apq8084-ifc6540.dtb \
qcom-apq8084-mtp.dtb \
@ -40,6 +40,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+ qcom-ipq4018-rt-ac58u.dtb \
+ qcom-ipq4018-rutx10.dtb \
+ qcom-ipq4018-wac510.dtb \
+ qcom-ipq4018-wap-ac.dtb \
+ qcom-ipq4018-whw01-v1.dtb \
+ qcom-ipq4018-wre6606.dtb \
+ qcom-ipq4018-wrtq-329acn.dtb \

3
target/linux/ipq40xx/patches-5.15/901-arm-boot-add-dts-files.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -951,11 +951,77 @@ dtb-$(CONFIG_ARCH_QCOM) += \
@@ -951,11 +951,78 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4018-ap120c-ac.dtb \
qcom-ipq4018-ap120c-ac-bit.dtb \
qcom-ipq4018-jalapeno.dtb \
@ -39,6 +39,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+ qcom-ipq4018-rt-ac58u.dtb \
+ qcom-ipq4018-rutx10.dtb \
+ qcom-ipq4018-wac510.dtb \
+ qcom-ipq4018-wap-ac.dtb \
+ qcom-ipq4018-whw01-v1.dtb \
+ qcom-ipq4018-wre6606.dtb \
+ qcom-ipq4018-wrtq-329acn.dtb \

6
target/linux/ipq806x/base-files/etc/board.d/02_network
View File

@ -27,8 +27,7 @@ compex,wpq864 |\
netgear,d7800 |\
netgear,r7500 |\
netgear,r7500v2 |\
qcom,ipq8064-ap148 |\
tplink,vr2600v)
qcom,ipq8064-ap148)
ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0"
;;
@ -61,7 +60,8 @@ nec,wg2600hp3)
;;
netgear,r7800 |\
netgear,xr500 |\
tplink,c2600)
tplink,c2600 |\
tplink,vr2600v)
ucidef_add_switch "switch0" \
"1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "6@eth1" "5:wan" "0@eth0"
;;

4
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts
View File

@ -149,12 +149,12 @@
&gswip_mdio {
phy0: ethernet-phy@0 {
reg = <0x0>;
gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
reg = <0x1>;
gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};
phy11: ethernet-phy@11 {

25
target/linux/mediatek/patches-5.15/722-remove-300Hz-to-prevent-freeze.patch Normal file
View File

@ -0,0 +1,25 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -23,11 +23,17 @@
cpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
- opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-microvolt = <950000>;
- };
-
+ /* Due to the bug described at the link below, remove the 300 MHz clock to avoid a low
+ * voltage condition that can cause a hang when rebooting the RT3200/E8450.
+ *
+ * https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490
+ *
+ * opp-300000000 {
+ * opp-hz = /bits/ 64 <300000000>;
+ * opp-microvolt = <950000>;
+ * };
+ *
+ */
opp-437500000 {
opp-hz = /bits/ 64 <437500000>;
opp-microvolt = <1000000>;

277
target/linux/ramips/dts/mt7621_netgear_wax202.dts Normal file
View File

@ -0,0 +1,277 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "netgear,wax202", "mediatek,mt7621-soc";
model = "Netgear WAX202";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_orange;
led-running = &led_power_green;
led-upgrade = &led_power_orange;
};
chosen {
bootargs = "console=ttyS0,115200";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
};
led_power_orange: power_orange {
label = "orange:power";
gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
};
led_net_green: net_green {
label = "green:net";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
};
led_net_blue: net_blue {
label = "blue:net";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
led_lan1_green: lan1_green {
label = "green:lan1";
gpios = <&switch0 3 GPIO_ACTIVE_LOW>;
};
led_lan1_orange: lan1_orange {
label = "orange:lan1";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
led_lan2_green: lan2_green {
label = "green:lan2";
gpios = <&switch0 6 GPIO_ACTIVE_LOW>;
};
led_lan2_orange: lan2_orange {
label = "orange:lan2";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
led_lan3_green: lan3_green {
label = "green:lan3";
gpios = <&switch0 12 GPIO_ACTIVE_LOW>;
};
led_lan3_orange: lan3_orange {
label = "orange:lan3";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
led_wifi2g_green: wifi2g_green {
label = "green:wifi2g";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0radio";
};
led_wifi2g_blue: wifi2g_blue {
label = "blue:wifi2g";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
};
led_wifi5g_green: wifi5g_green {
label = "green:wifi5g";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1radio";
};
led_wifi5g_blue: wifi5g_blue {
label = "blue:wifi5g";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
};
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "Config";
reg = <0x80000 0x80000>;
read-only;
};
factory: partition@100000 {
label = "Factory";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "firmware";
reg = <0x180000 0x2600000>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x400000>;
};
partition@400000 {
label = "ubi";
reg = <0x400000 0x2200000>;
};
};
partition@2780000 {
label = "firmware_backup";
reg = <0x2780000 0x2600000>;
read-only;
};
partition@4d80000 {
label = "CFG";
reg = <0x4d80000 0x800000>;
read-only;
};
partition@5580000 {
label = "RAE";
reg = <0x5580000 0x400000>;
read-only;
};
partition@5980000 {
label = "POT";
reg = <0x5980000 0x100000>;
read-only;
};
partition@5a80000 {
label = "Language";
reg = <0x5a80000 0x400000>;
read-only;
};
partition@5e80000 {
label = "Traffic";
reg = <0x5e80000 0x200000>;
read-only;
};
partition@6080000 {
label = "Cert";
reg = <0x6080000 0x100000>;
read-only;
};
partition@6180000 {
label = "NTGRcryptK";
reg = <0x6180000 0x100000>;
read-only;
};
partition@6280000 {
label = "NTGRcryptD";
reg = <0x6280000 0x500000>;
read-only;
};
partition@6780000 {
label = "LOG";
reg = <0x6780000 0x100000>;
read-only;
};
partition@6880000 {
label = "User_data";
reg = <0x6880000 0x640000>;
read-only;
};
};
};
&pcie {
status = "okay";
};
&pcie1 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0>;
};
};
&pcie2 {
status = "disabled";
};
&state_default {
gpio {
groups = "uart3", "uart2", "jtag", "wdt";
function = "gpio";
};
};
&switch0 {
gpio-controller;
#gpio-cells = <2>;
ports {
port@0 {
status = "okay";
label = "wan";
};
port@1 {
status = "okay";
label = "lan1";
};
port@2 {
status = "okay";
label = "lan2";
};
/* port@3 is not used */
port@4 {
status = "okay";
label = "lan3";
};
};
};
&xhci {
status = "disabled";
};

151
target/linux/ramips/dts/mt7621_zyxel_nwa-ax.dtsi Normal file
View File

@ -0,0 +1,151 @@
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
label-mac-device = &gmac0;
};
};
&nand {
status = "okay";
mediatek,nmbm;
mediatek,bmt-max-ratio = <15>;
mediatek,bmt-max-reserved-blocks = <64>;
mediatek,bmt-remap-range =
<0x0 0x980000>,
<0x2980000 0x7800000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "u-boot-env";
reg = <0x80000 0x80000>;
read-only;
};
factory: partition@100000 {
label = "factory";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "firmware";
reg = <0x180000 0x2800000>;
/* This concatenates kernel1 & kernel2 & rootfs */
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x800000>;
};
partition@400000 {
label = "ubi";
reg = <0x800000 0x2000000>;
};
};
partition@2980000 {
label = "zy_firmware_1";
reg = <0x2980000 0x2800000>;
read-only;
};
partition@5180000 {
label = "zy_rootfs_data";
reg = <0x5180000 0x1400000>;
read-only;
};
partition@6580000 {
label = "zy_logs";
reg = <0x6580000 0xd00000>;
read-only;
};
partition@7280000 {
label = "myzyxel";
reg = <0x7280000 0x480000>;
read-only;
};
partition@7700000 {
label = "bootconfig";
reg = <0x7700000 0x80000>;
};
mrd: partition@7780000 {
label = "mrd";
reg = <0x7780000 0x80000>;
read-only;
};
};
};
&pcie {
status = "okay";
};
&pcie1 {
wlan_5g: wifi@0,0 {
reg = <0x0 0 0 0 0>;
compatible = "mediatek,mt76";
mediatek,mtd-eeprom = <&factory 0x0>;
/* MAC-Address set in userspace */
};
};
&gmac0 {
nvmem-cells = <&macaddr_mrd_1fff8>;
nvmem-cell-names = "mac-address";
};
&switch0 {
ports {
port@4 {
status = "okay";
label = "lan";
};
};
};
&mrd {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_mrd_1fff8: macaddr@1fff8 {
reg = <0x1fff8 0x6>;
};
};
&state_default {
gpio {
groups = "uart3", "rgmii2";
function = "gpio";
};
};
&ethernet {
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
};

45
target/linux/ramips/dts/mt7621_zyxel_nwa50ax.dts Normal file
View File

@ -0,0 +1,45 @@
#include "mt7621_zyxel_nwa-ax.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "zyxel,nwa50ax", "mediatek,mt7621-soc";
model = "ZyXEL NWA50AX";
aliases {
led-boot = &led_system_green;
led-failsafe = &led_system_red;
led-running = &led_system_green;
led-upgrade = &led_system_red;
};
leds {
compatible = "gpio-leds";
led_system_red: system_red {
label = "red:system";
gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
};
led_system_green: system_green {
label = "green:system";
gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
};
system_blue {
label = "blue:system";
gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};

6
target/linux/ramips/dts/mt7621_zyxel_nwa55axe.dts Normal file
View File

@ -0,0 +1,6 @@
#include "mt7621_zyxel_nwa-ax.dtsi"
/ {
compatible = "zyxel,nwa55axe", "mediatek,mt7621-soc";
model = "ZyXEL NWA55AX";
};

57
target/linux/ramips/image/mt7621.mk
View File

@ -95,6 +95,13 @@ define Build/zytrx-header
mv $@.new $@
endef
define Build/zyxel-nwa-fit
$(TOPDIR)/scripts/mkits-zyxel-fit.sh \
$@.its $@ "6b e1 6f e1 ff ff ff ff ff ff"
PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $@.its $@.new
@mv $@.new $@
endef
define Device/dsa-migration
DEVICE_COMPAT_VERSION := 1.1
DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA
@ -1428,6 +1435,29 @@ define Device/netgear_wac124
endef
TARGET_DEVICES += netgear_wac124
define Device/netgear_wax202
$(Device/dsa-migration)
DEVICE_VENDOR := NETGEAR
DEVICE_MODEL := WAX202
DEVICE_PACKAGES := kmod-mt7915e
NETGEAR_ENC_MODEL := WAX202
NETGEAR_ENC_REGION := US
BLOCKSIZE := 128k
PAGESIZE := 2048
UBINIZE_OPTS := -E 5
IMAGE_SIZE := 38912k
KERNEL_SIZE := 4096k
KERNEL_LOADADDR := 0x82000000
KERNEL := kernel-bin | relocate-kernel 0x80001000 | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb | \
append-squashfs4-fakeroot
IMAGES += factory.img
IMAGE/factory.img := append-kernel | pad-to $$(KERNEL_SIZE) | \
append-ubi | check-size | netgear-encrypted-factory
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += netgear_wax202
define Device/netgear_wndr3700-v5
$(Device/dsa-migration)
$(Device/netgear_sercomm_nor)
@ -2189,6 +2219,33 @@ define Device/zyxel_nr7101
endef
TARGET_DEVICES += zyxel_nr7101
define Device/zyxel_nwa-ax
$(Device/dsa-migration)
DEVICE_VENDOR := ZyXEL
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_SIZE := 8192k
UBINIZE_OPTS := -E 5
DEVICE_PACKAGES := kmod-mt7915e uboot-envtools zyxel-bootconfig
KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
IMAGES += factory.bin ramboot-factory.bin
IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | zyxel-nwa-fit
IMAGE/ramboot-factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/zyxel_nwa50ax
$(Device/zyxel_nwa-ax)
DEVICE_MODEL := NWA50AX
endef
TARGET_DEVICES += zyxel_nwa50ax
define Device/zyxel_nwa55axe
$(Device/zyxel_nwa-ax)
DEVICE_MODEL := NWA55AXE
endef
TARGET_DEVICES += zyxel_nwa55axe
define Device/zyxel_wap6805
$(Device/dsa-migration)
BLOCKSIZE := 128k

6
target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
View File

@ -116,6 +116,12 @@ netgear,r7450)
ucidef_set_led_netdev "lan3" "LAN3" "white:lan3" "lan3"
ucidef_set_led_netdev "lan4" "LAN4" "white:lan4" "lan4"
;;
netgear,wax202)
ucidef_set_led_netdev "internet" "Internet" "green:net" "wan"
ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
;;
oraybox,x3a)
ucidef_set_led_netdev "wan" "wan link" "red:status" "wan"
ucidef_set_led_netdev "lan" "lan link" "green:status" "br-lan"

10
target/linux/ramips/mt7621/base-files/etc/board.d/02_network
View File

@ -21,12 +21,15 @@ ramips_setup_interfaces()
tplink,re650-v1|\
tplink,re650-v2|\
ubnt,unifi-6-lite|\
ubnt,unifi-nanohd)
ubnt,unifi-nanohd|\
zyxel,nwa50ax|\
zyxel,nwa55axe)
ucidef_set_interface_lan "lan"
;;
ampedwireless,ally-r1900k|\
gehua,ghl-r-001|\
hiwifi,hc5962|\
netgear,wax202|\
xiaomi,mi-router-3-pro|\
xiaomi,mi-router-ac2100|\
xiaomi,mi-router-cr6606|\
@ -197,6 +200,11 @@ ramips_setup_macs()
wan_mac=$label_mac
lan_mac=$(macaddr_add $label_mac 1)
;;
netgear,wax202)
lan_mac=$(mtd_get_mac_ascii Config mac)
wan_mac=$(macaddr_add "$lan_mac" 1)
label_mac=$lan_mac
;;
raisecom,msg1500-x-00)
lan_mac=$(mtd_get_mac_ascii Config protest_lan_mac)
wan_mac=$(mtd_get_mac_ascii Config protest_wan_mac)

11
target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
View File

@ -76,6 +76,11 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
;;
netgear,wax202)
hw_mac_addr=$(mtd_get_mac_ascii Config mac)
[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress
;;
oraybox,x3a)
if [ "$PHYNBR" = "1" ]; then
hw_mac_addr="$(mtd_get_mac_binary factory 0x4)"
@ -99,4 +104,10 @@ case "$board" in
[ "$PHYNBR" = "1" ] && \
macaddr_setbit_la "$(mtd_get_mac_binary Factory 0xe000)" > /sys${DEVPATH}/macaddress
;;
zyxel,nwa50ax|\
zyxel,nwa55axe)
hw_mac_addr="$(mtd_get_mac_binary mrd 0x1fff8)"
[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
;;
esac

5
target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
View File

@ -84,6 +84,7 @@ platform_do_upgrade() {
netgear,r7450|\
netgear,wac104|\
netgear,wac124|\
netgear,wax202|\
netis,wf2881|\
raisecom,msg1500-x-00|\
sercomm,na502|\
@ -95,7 +96,9 @@ platform_do_upgrade() {
xiaomi,mi-router-cr6606|\
xiaomi,mi-router-cr6608|\
xiaomi,mi-router-cr6609|\
xiaomi,redmi-router-ac2100)
xiaomi,redmi-router-ac2100|\
zyxel,nwa50ax|\
zyxel,nwa55axe)
nand_do_upgrade "$1"
;;
iodata,wn-ax1167gr2|\

30
target/linux/realtek/patches-5.10/317-gpio-realtek-otto-clear-spurious-interrups.patch Normal file
View File

@ -0,0 +1,30 @@
realtek: clear spurious GPIO interrupts
The interrupt controller in the internal GPIO peripheral will sometimes
generate spurious interrupts. If these are not properly acknowledged, the
system will be held busy until reboot. These spurious interrupts are identified
by the fact that there is no system IRQ number associated, since the interrupt
line was never allocated. Although most prevalent on RTL839x, RTL838x SoCs have
also displayed this behaviour.
Reported-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> # DGS-1210-52
Reported-by: Birger Koblitz <mail@birger-koblitz.de> # Netgear GS724TP v2
Reported-by: Jan Hoffmann <jan@3e8.eu> # HPE 1920-16G
Signed-off-by: Sander Vanheule <sander@svanheule.net>
---
drivers/gpio/gpio-realtek-otto.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/gpio/gpio-realtek-otto.c
+++ b/drivers/gpio/gpio-realtek-otto.c
@@ -251,6 +251,10 @@ static void realtek_gpio_irq_handler(str
port_pin_count = min(gc->ngpio - lines_done, 8U);
for_each_set_bit(offset, &status, port_pin_count) {
irq = irq_find_mapping(gc->irq.domain, offset + lines_done);
+ if (unlikely(!irq)) {
+ realtek_gpio_clear_isr(ctrl, lines_done / 8, BIT(offset));
+ continue;
+ }
generic_handle_irq(irq);
}
}

15
target/sdk/Makefile
View File

@ -82,6 +82,18 @@ KERNEL_FILES_BASE := \
KERNEL_FILES := $(patsubst $(TOPDIR)/%,%,$(wildcard $(addprefix $(LINUX_DIR)/,$(KERNEL_FILES_BASE))))
# The kernel source hosts various userspace utilities sources.
# These are packaged separately from the kernel and kernel modules.
# The source has to be included here to be buildable by the SDK.
#
USERSPACE_UTILS_FILES := \
tools/build \
tools/scripts \
tools/usb/usbip \
tools/spi
USERSPACE_FILES := $(patsubst $(TOPDIR)/%,%,$(wildcard $(addprefix $(LINUX_DIR)/,$(USERSPACE_UTILS_FILES))))
all: compile
$(BIN_DIR)/$(SDK_NAME).tar.xz: clean
@ -100,8 +112,7 @@ $(BIN_DIR)/$(SDK_NAME).tar.xz: clean
$(SDK_DIRS) $(KERNEL_FILES) | \
$(TAR) -xf - -C $(SDK_BUILD_DIR)
# Copy usbip sources, this is required for the usbip userspace packages to be buildable by the SDK.
$(TAR) -cf - -C $(TOPDIR) $(KDIR_BASE)/tools/usb/usbip/ | \
$(TAR) -cf - -C $(TOPDIR) $(USERSPACE_FILES) | \
$(TAR) -xf - -C $(SDK_BUILD_DIR)
(cd $(SDK_BUILD_DIR); find $(STAGING_SUBDIR_HOST)/bin $(STAGING_SUBDIR_HOST)/usr/bin \

4
tools/libressl/Makefile
View File

@ -8,8 +8,8 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libressl
PKG_VERSION:=3.4.3
PKG_HASH:=ff88bffe354818b3ccf545e3cafe454c5031c7a77217074f533271d63c37f08d
PKG_VERSION:=3.5.3
PKG_HASH:=3ab5e5eaef69ce20c6b170ee64d785b42235f48f2e62b095fca5d7b6672b8b28
PKG_RELEASE:=1
PKG_CPE_ID:=cpe:/a:openbsd:libressl