Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2021-11-16 22:31:16 +08:00
commit ba3b754396
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
66 changed files with 1427 additions and 572 deletions

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@ -349,6 +349,19 @@ config KERNEL_PREEMPT_TRACER
enabled. This option and the irqs-off timing option can be
used together or separately.)
config KERNEL_HIST_TRIGGERS
bool "Histogram triggers"
depends on KERNEL_FTRACE
help
Hist triggers allow one or more arbitrary trace event fields to be
aggregated into hash tables and dumped to stdout by reading a
debugfs/tracefs file. They're useful for gathering quick and dirty
(though precise) summaries of event activity as an initial guide for
further investigation using more advanced tools.
Inter-event tracing of quantities such as latencies is also
supported using hist triggers under this option.
config KERNEL_DEBUG_KERNEL
bool
default n

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@ -64,7 +64,7 @@ BPF_CFLAGS := \
-O2 -emit-llvm -Xclang -disable-llvm-passes
ifeq ($(DUMP),)
CLANG_VER:=$(shell clang -dM -E - < /dev/null | grep __clang_major__ | cut -d' ' -f3)
CLANG_VER:=$(shell $(CLANG) -dM -E - < /dev/null | grep __clang_major__ | cut -d' ' -f3)
CLANG_VER_VALID:=$(shell [ "$(CLANG_VER)" -ge "$(CLANG_MIN_VER)" ] && echo 1 )
ifeq ($(CLANG_VER_VALID),)
$(error ERROR: LLVM/clang version too old. Minimum required: $(CLANG_MIN_VER), found: $(CLANG_VER))

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@ -7,10 +7,10 @@ ifdef CONFIG_TESTING_KERNEL
endif
LINUX_VERSION-5.4 = .158
LINUX_VERSION-5.10 = .78
LINUX_VERSION-5.10 = .79
LINUX_KERNEL_HASH-5.4.158 = 6e018fecdc8fc24553756e582d83b82d65b10a6b03ef36262a24911f839b8d59
LINUX_KERNEL_HASH-5.10.78 = be806c98e222ea581530727a8e83b0b96fcd678afd12944eb530e58776a6050f
LINUX_KERNEL_HASH-5.10.79 = e49955e16a2ee26d0b3ca1521912daba5ab8f7a6b2c9e5f538bb0ae7b837a8ad
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

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@ -4,7 +4,7 @@
ifeq ($(DUMP),)
define BuildTarget/bin
TARGET_VARIANT=$(if $(ALL_VARIANTS),$(if $(VARIANT),$(VARIANT),$(firstword $(ALL_VARIANTS))))
TARGET_VARIANT=$(if $(ALL_VARIANTS),$(if $(VARIANT),$(filter-out *,$(VARIANT)),$(firstword $(ALL_VARIANTS))))
ifeq ($(if $(TARGET_VARIANT),$(BUILD_VARIANT)),$(TARGET_VARIANT))
ifdef Package/$(1)/install
ifneq ($(CONFIG_PACKAGE_$(1))$(DEVELOPER),)

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@ -105,7 +105,7 @@ ifeq ($(DUMP),)
IDIR_$(1):=$(PKG_BUILD_DIR)/ipkg-$(PKGARCH)/$(1)
KEEP_$(1):=$(strip $(call Package/$(1)/conffiles))
TARGET_VARIANT:=$$(if $(ALL_VARIANTS),$$(if $$(VARIANT),$$(VARIANT),$(firstword $(ALL_VARIANTS))))
TARGET_VARIANT:=$$(if $(ALL_VARIANTS),$$(if $$(VARIANT),$$(filter-out *,$$(VARIANT)),$(firstword $(ALL_VARIANTS))))
ifeq ($(BUILD_VARIANT),$$(if $$(TARGET_VARIANT),$$(TARGET_VARIANT),$(BUILD_VARIANT)))
do_install=
ifdef Package/$(1)/install

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@ -69,7 +69,7 @@ define subdir
$(if $(call diralias,$(bd)),$(call warn_eval,$(1)/$(bd),l,T,$(1)/$(call diralias,$(bd))/$(btype)/$(target): $(1)/$(bd)/$(btype)/$(target)))
)
$(call warn_eval,$(1)/$(bd),t,T,$(1)/$(bd)/$(target): $(if $(NO_DEPS)$(QUILT),,$($(1)/$(bd)/$(target)) $(call $(1)//$(target),$(1)/$(bd))))
$(foreach variant,$(if $(BUILD_VARIANT),$(BUILD_VARIANT),$(if $(strip $($(1)/$(bd)/variants)),$($(1)/$(bd)/variants),$(if $($(1)/$(bd)/default-variant),$($(1)/$(bd)/default-variant),__default))),
$(foreach variant,$(filter-out *,$(if $(BUILD_VARIANT),$(BUILD_VARIANT),$(if $(strip $($(1)/$(bd)/variants)),$($(1)/$(bd)/variants),$(if $($(1)/$(bd)/default-variant),$($(1)/$(bd)/default-variant),__default)))),
$(if $(BUILD_LOG),@mkdir -p $(BUILD_LOG_DIR)/$(1)/$(bd)/$(filter-out __default,$(variant)))
$(if $($(1)/autoremove),$(call rebuild_check,$(1)/$(bd),$(target),,$(filter-out __default,$(variant)),$($(1)/$(bd)/variants)))
$(call log_make,$(1)/$(bd),$(target),,$(filter-out __default,$(variant)),$($(1)/$(bd)/variants)) \

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@ -97,12 +97,15 @@ kill_remaining() { # [ <signal> [ <loop> ] ]
[ -f "$stat" ] || continue
local pid name state ppid rest
read pid name state ppid rest < $stat
name="${name#(}"; name="${name%)}"
read pid rest < $stat
name="${rest#\(}" ; rest="${name##*\) }" ; name="${name%\)*}"
set -- $rest ; state="$1" ; ppid="$2"
# Skip PID1, our parent, ourself and our children
[ $pid -ne 1 -a $pid -ne $proc_ppid -a $pid -ne $$ -a $ppid -ne $$ ] || continue
[ -f "/proc/$pid/cmdline" ] || continue
local cmdline
read cmdline < /proc/$pid/cmdline

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@ -0,0 +1,48 @@
From a40a6e16ed76e5e26a0f60226b64c311d4a62c9f Mon Sep 17 00:00:00 2001
From: Mathias Kresin <dev@kresin.me>
Date: Sun, 31 Oct 2021 23:04:54 +0100
Subject: [PATCH] lzma: force 8bit reads
At least since gcc 7.3.0 (OpenWrt 18.06) lwr/lwl are used in the
assembly of LzmaProps_Decode. While the decission made by the compiler
looks perfect fine, it triggers some obscure hang on lantiq danube-s
v1.5 with MX29LV640EB NOR flash chips.
Only if the offset 1 is used, the hang can be observed. Using any other
offset works fine:
lwl s0,0(a1) - s0 == 0x6d000080
lwl s0,1(a1) - hangs
lwl s0,2(a1) - s0 == 0x0080xxxx
lwl s0,3(a1) - s0 == 0x80xxxxxx
It isn't clear whether it is a limitation of the flash chip, the EBU or
something else.
Force 8bit reads to prevent gcc optimizing the read with lwr/lwl
instructions.
Signed-off-by: Mathias Kresin <dev@kresin.me>
---
lib/lzma/LzmaDec.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/lib/lzma/LzmaDec.c
+++ b/lib/lzma/LzmaDec.c
@@ -7,6 +7,7 @@
#include "LzmaDec.h"
#include <linux/string.h>
+#include <asm/io.h>
#define kNumTopBits 24
#define kTopValue ((UInt32)1 << kNumTopBits)
@@ -929,7 +930,7 @@ SRes LzmaProps_Decode(CLzmaProps *p, con
if (size < LZMA_PROPS_SIZE)
return SZ_ERROR_UNSUPPORTED;
else
- dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24);
+ dicSize = readb(&data[1]) | ((UInt32)readb(&data[2]) << 8) | ((UInt32)readb(&data[3]) << 16) | ((UInt32)readb(&data[4]) << 24);
if (dicSize < LZMA_DIC_MIN)
dicSize = LZMA_DIC_MIN;

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@ -0,0 +1,62 @@
From d9527989b2d63749d6c6678fa3a1b658eb26c225 Mon Sep 17 00:00:00 2001
From: Mathias Kresin <dev@kresin.me>
Date: Tue, 2 Nov 2021 21:24:29 +0100
Subject: [PATCH] dma: lantiq: fix out of bounds cache invalidate
With gcc10 the variables are placed more tightly to each other, which
uncovers a long existing bug in the lantiq DMA code. It can be observed
when using tftpboot with the filename parameter, which gets reset during
the tftpboot execution.
NetRxPackets[] points to cache line size aligned addresses. In
ltq_eth_rx_packet_align() the address NetRxPackets[] points to is
increased by LTQ_ETH_IP_ALIGN and the resulting not cache aligned
address is used further on. While doing so, the length/size is never
updated.
The "not cache aligned address" + len/size for a cache aligned address
is passed to invalidate_dcache_range(). Hence, invalidate_dcache_range()
invalidates the next 32 bit as well, which flashes the BootFile variable
as well.
variable BootFile is at address: 0x83ffe12c
NetRxPackets[] points to 0x83ffdb20 (len is 0x600)
data points to: 0x83ffdb22 (len is 0x600)
ltq_dma_dcache_inv: 0x83ffdb22 (for len 0x600)
invalidate_dcache_range: 0x83ffdb20 to 0x83ffe120 (size: 32)
invalidate_dcache_range: 0x83ffdb20 to 0x83ffdb40 (Bootfile: a.bin)
...
invalidate_dcache_range: 0x83ffe100 to 0x83ffe120 (Bootfile: a.bin)
invalidate_dcache_range: 0x83ffe120 to 0x83ffe140 (Bootfile: )
In ltq_dma_tx_map() and ltq_dma_rx_map() the start address passed to
ltq_dma_dcache_wb_inv() is incorrect. By considering the offset, the
start address passed to flush_dcache_range() is always aligned to 32, 64
or 128 bytes dependent on configured DMA burst size.
Signed-off-by: Mathias Kresin <dev@kresin.me>
---
drivers/dma/lantiq_dma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/dma/lantiq_dma.c
+++ b/drivers/dma/lantiq_dma.c
@@ -280,7 +280,7 @@ int ltq_dma_rx_map(struct ltq_dma_device
offset = dma_addr % ltq_dma_burst_align(dev->rx_burst_len);
- ltq_dma_dcache_inv(data, len);
+ ltq_dma_dcache_inv(data - offset, len);
#if 0
printf("%s: index %d, data %p, dma_addr %08x, offset %u, len %d\n",
@@ -355,7 +355,7 @@ int ltq_dma_tx_map(struct ltq_dma_device
__func__, index, desc, data, dma_addr, offset, len);
#endif
- ltq_dma_dcache_wb_inv(data, len);
+ ltq_dma_dcache_wb_inv(data - offset, len);
desc->addr = dma_addr - offset;
desc->ctl = DMA_DESC_OWN | DMA_DESC_SOP | DMA_DESC_EOP |

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@ -0,0 +1,34 @@
From 65f1f160139c2bac83650c9c7c4aee4e5fd74c7c Mon Sep 17 00:00:00 2001
From: Mathias Kresin <dev@kresin.me>
Date: Sun, 2 May 2021 02:03:05 +0200
Subject: [PATCH] MIPS: lantiq: danube: fix SPL boot
On danube we only have 0x6800 bytes of usable SRAM. Everything behind
can't be written to and a SPL u-boot locks up during boot.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
---
arch/mips/include/asm/arch-danube/config.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/mips/include/asm/arch-danube/config.h
+++ b/arch/mips/include/asm/arch-danube/config.h
@@ -61,7 +61,7 @@
/* SRAM */
#define CONFIG_SYS_SRAM_BASE 0xBE1A0000
-#define CONFIG_SYS_SRAM_SIZE 0x10000
+#define CONFIG_SYS_SRAM_SIZE 0x6800
/* ASC/UART driver and console */
#define CONFIG_LANTIQ_SERIAL
@@ -117,7 +117,7 @@
#define CONFIG_CMD_NET
#endif
-#define CONFIG_SPL_MAX_SIZE (32 * 1024)
+#define CONFIG_SPL_MAX_SIZE (18 * 1024)
#define CONFIG_SPL_BSS_MAX_SIZE (8 * 1024)
#define CONFIG_SPL_STACK_MAX_SIZE (8 * 1024)
#define CONFIG_SPL_MALLOC_MAX_SIZE (32 * 1024)

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@ -0,0 +1,56 @@
From ad739ffebf689abdbcddbe4e1b0bf847d7931a92 Mon Sep 17 00:00:00 2001
From: Mathias Kresin <dev@kresin.me>
Date: Fri, 20 Jan 2017 13:59:53 +0100
Subject: [PATCH] MIPS: lantiq: reduce stack size
On lantiq a lot of stuff expects to be loaded to and executed at
0x80002000, including our own second stage bootloader.
For all build u-boots, the initial stack pointer is at 0x80008000. After
loading data to 0x80002000, every further stack operation corrupts the
loaded code.
Set the initial stack pointer to 0x80002000, to not overwrite code
loaded in memory. A stack of 0x2000 bytes has been proven as enough in
all done tests.
Signed-off-by: Mathias Kresin <dev@kresin.me>
---
arch/mips/include/asm/arch-arx100/config.h | 2 +-
arch/mips/include/asm/arch-danube/config.h | 2 +-
arch/mips/include/asm/arch-vrx200/config.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
--- a/arch/mips/include/asm/arch-arx100/config.h
+++ b/arch/mips/include/asm/arch-arx100/config.h
@@ -66,7 +66,7 @@
#define CONFIG_SYS_MEMTEST_END 0x82000000
#define CONFIG_SYS_LOAD_ADDR 0x81000000
#define CONFIG_SYS_LOAD_SIZE (2 * 1024 * 1024)
-#define CONFIG_SYS_INIT_SP_OFFSET (32 * 1024)
+#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
/* SRAM */
#define CONFIG_SYS_SRAM_BASE 0xBE1A0000
--- a/arch/mips/include/asm/arch-danube/config.h
+++ b/arch/mips/include/asm/arch-danube/config.h
@@ -57,7 +57,7 @@
#define CONFIG_SYS_MEMTEST_END 0x82000000
#define CONFIG_SYS_LOAD_ADDR 0x81000000
#define CONFIG_SYS_LOAD_SIZE (2 * 1024 * 1024)
-#define CONFIG_SYS_INIT_SP_OFFSET 0x4000
+#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
/* SRAM */
#define CONFIG_SYS_SRAM_BASE 0xBE1A0000
--- a/arch/mips/include/asm/arch-vrx200/config.h
+++ b/arch/mips/include/asm/arch-vrx200/config.h
@@ -69,7 +69,7 @@
#define CONFIG_SYS_MEMTEST_END 0x82000000
#define CONFIG_SYS_LOAD_ADDR 0x81000000
#define CONFIG_SYS_LOAD_SIZE (2 * 1024 * 1024)
-#define CONFIG_SYS_INIT_SP_OFFSET (32 * 1024)
+#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
/* SRAM */
#define CONFIG_SYS_SRAM_BASE 0xBE220000

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@ -48,6 +48,7 @@ ALLWIFIBOARDS:= \
mobipromo_cm520-79f \
p2w_r619ac \
nec_wg2600hp3 \
p2w_r619ac \
plasmacloud_pa1200 \
plasmacloud_pa2200 \
qxwlan_e2600ac
@ -134,6 +135,7 @@ $(eval $(call generate-ipq-wifi-package,mikrotik_sxtsq-5-ac,MikroTik SXTsq 5 ac)
$(eval $(call generate-ipq-wifi-package,mobipromo_cm520-79f,MobiPromo CM520-79F))
$(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC))
$(eval $(call generate-ipq-wifi-package,nec_wg2600hp3,NEC Platforms WG2600HP3))
$(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC))
$(eval $(call generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200))
$(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200))
$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))

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@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=ltq-vdsl-fw
PKG_VERSION:=6.8.6
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>

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@ -1,9 +1,9 @@
#!/bin/sh
FW="/tmp/firmware-speedport-w921v-1.46.000.bin"
URL="https://www.telekom.de/hilfe/downloads/firmware-speedport-w921v-1.46.000.bin"
URL="https://www.telekom.de/hilfe/downloads/firmware-speedport-w-921v-1.48.000.bin"
FW_TAPI="vr9_tapi_fw.bin"
FW_DSL="vr9_dsl_fw_annex_b.bin"
MD5_FW="188734c0773b225f8c130984b279621a"
MD5_FW="afa25146119daced87f67c9b66ef94b3"
MD5_TAPI="57f2d07f59e11250ce1219bad99c1eda"
MD5_DSL="655442e31deaa42c9c68944869361ec0"

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@ -26,7 +26,7 @@
#include "LzmaWrapper.h"
#define FW_NAME "/tmp/firmware-speedport-w921v-1.46.000.bin"
#define FW_NAME "/tmp/firmware-speedport-w-921v-1.48.000.bin"
#define MAGIC 0x50
#define MAGIC_SZ 0x3FFC00
@ -78,7 +78,7 @@ int main(int argc, char **argv)
if (stat(FW_NAME, &s) != 0) {
printf("Failed to find %s\n", FW_NAME);
printf("Ask Google or try https://www.telekom.de/hilfe/downloads/firmware-speedport-w921v-1.45.000.bin\n");
printf("Ask Google or try https://www.telekom.de/hilfe/downloads/firmware-speedport-w-921v-1.48.000.bin\n");
return -1;
}

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@ -137,24 +137,26 @@
};
/* policy for the key attributes */
@@ -3325,6 +3326,20 @@ static int nl80211_set_wiphy(struct sk_b
@@ -3324,6 +3325,22 @@ static int nl80211_set_wiphy(struct sk_b
if (result)
goto out;
}
+
+ if (info->attrs[NL80211_ATTR_WIPHY_ANTENNA_GAIN]) {
+ int idx, dbi = 0;
+
+ if (!rdev->ops->set_antenna_gain)
+ return -EOPNOTSUPP;
+ if (!rdev->ops->set_antenna_gain) {
+ result = -EOPNOTSUPP;
+ goto out;
+ }
+
+ idx = NL80211_ATTR_WIPHY_ANTENNA_GAIN;
+ dbi = nla_get_u32(info->attrs[idx]);
+
+ result = rdev->ops->set_antenna_gain(&rdev->wiphy, dbi);
+ if (result)
+ return result;
+ goto out;
+ }
+
if (info->attrs[NL80211_ATTR_WIPHY_TX_POWER_SETTING]) {
struct wireless_dev *txp_wdev = wdev;
enum nl80211_tx_power_setting type;

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@ -5,13 +5,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=firewall4
PKG_RELEASE:=1
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firewall4.git
PKG_SOURCE_DATE:=2021-09-01
PKG_SOURCE_VERSION:=cf835cecc8a449b2d2019f1ef4f085e535d5c1c1
PKG_MIRROR_HASH:=5798b76846107dde69a2a1ff3467f735b9a91a74106fbd6299d8a26eff70b9c2
PKG_SOURCE_DATE:=2021-10-25
PKG_SOURCE_VERSION:=eb0a3ee812d48f1faecbf6258c293e475b4016a0
PKG_MIRROR_HASH:=46b5bdea13a285dbd1b3432fe8cfd8cb98a2797b86b176d7762e0987ec2f230c
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=ISC

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@ -11,9 +11,9 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=qosify
PKG_SOURCE_URL=$(PROJECT_GIT)/project/qosify.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-11-08.1
PKG_SOURCE_VERSION:=3a420e272c187885120b964059abdf3e06f10199
PKG_MIRROR_HASH:=49a6bbb0801b790ce603aa8e3dfa73e681dc3f58fb9cbd524956bffe4c36eb7e
PKG_SOURCE_DATE:=2021-11-12
PKG_SOURCE_VERSION:=bfc2cafe2a8c66ffab88a7e5c1ad1b0a4d886271
PKG_MIRROR_HASH:=88990d5816f37ba1e334499e7ee53a364fa0ba1e5751a91ef0a94934cd2a5451
PKG_LICENSE:=GPL-2.0
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

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@ -2,12 +2,24 @@ config defaults
list defaults /etc/qosify/*.conf
option dscp_prio CS5
option dscp_icmp CS6
option dscp_bulk CS0
option dscp_bulk bulk
option dscp_default_udp CS4
option bulk_trigger_timeout 5
option bulk_trigger_pps 100
option prio_max_avg_pkt_len 500
config alias bulk
option ingress LE
option egress LE
config alias video
option ingress AF41
option egress AF41
config alias voice
option ingress CS6
option egress CS6
config interface wan
option name wan
option disabled 1

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@ -71,6 +71,20 @@ add_interface() {
json_close_object
}
add_alias() {
local cfg="$1"
config_get value "$cfg" value
config_get ingress "$cfg" ingress
config_get egress "$cfg" egress
json_add_array "$cfg"
json_add_string ingress "${ingress:-$value}"
json_add_string egress "${egress:-$value}"
json_close_array
}
reload_service() {
json_init
@ -82,6 +96,10 @@ reload_service() {
config_foreach add_interface interface
json_close_object
json_add_object aliases
config_foreach add_alias alias
json_close_object
json_add_object devices
config_foreach add_interface device
json_close_object

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@ -7,6 +7,9 @@
},
"hotplug.neigh": {
"methods": [ "call" ]
},
"hotplug.tftp": {
"methods": [ "call" ]
}
}
}

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@ -60,17 +60,17 @@
+ *dest = blobmsg_get_string(val);
+}
+
+static bool ubus_dns_doctor(const char *name, int ttl, void *p, int af)
+static int ubus_dns_doctor(const char *name, int ttl, void *p, int af)
+{
+ struct blob_buf *b;
+ char *addr;
+
+ if (!name)
+ return false;
+ return 0;
+
+ b = ubus_dns_notify_prepare();
+ if (!b)
+ return false;
+ return 0;
+
+ blobmsg_add_string(b, "name", name);
+
@ -80,7 +80,7 @@
+
+ addr = blobmsg_alloc_string_buffer(b, "address", INET6_ADDRSTRLEN);
+ if (!addr)
+ return false;
+ return 0;
+
+ inet_ntop(af, p, addr, INET6_ADDRSTRLEN);
+ blobmsg_add_string_buffer(b);
@ -89,14 +89,14 @@
+ ubus_dns_notify("dns_result", ubus_dns_doctor_cb, &addr);
+
+ if (!addr)
+ return false;
+ return 0;
+
+ return inet_pton(af, addr, p) == 1;
+}
+#else
+static bool ubus_dns_doctor(const char *name, int ttl, void *p, int af)
+static int ubus_dns_doctor(const char *name, int ttl, void *p, int af)
+{
+ return false;
+ return 0;
+}
+#endif
+

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@ -426,6 +426,7 @@ define Package/hostapd-utils
TITLE:=IEEE 802.1x Authenticator (utils)
URL:=http://hostap.epitest.fi/
DEPENDS:=@$(subst $(space),||,$(foreach pkg,$(HOSTAPD_PROVIDERS),PACKAGE_$(pkg)))
VARIANT:=*
endef
define Package/hostapd-utils/description
@ -439,6 +440,7 @@ define Package/wpa-cli
SUBMENU:=WirelessAPD
DEPENDS:=@$(subst $(space),||,$(foreach pkg,$(SUPPLICANT_PROVIDERS),PACKAGE_$(pkg)))
TITLE:=WPA Supplicant command line control utility
VARIANT:=*
endef
define Package/eapol-test/Default

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@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=lldpd
PKG_VERSION:=1.0.12
PKG_RELEASE:=1
PKG_VERSION:=1.0.13
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://media.luffy.cx/files/lldpd
PKG_HASH:=d194c65b5b9c98d194a2842ddc75ba17ebdee7ebd5499f81a98d24031628daf1
PKG_HASH:=d639827fd8a27720d1bfd94bc52eca24af63ddcc3c9d2da60788778889d84701
PKG_MAINTAINER:=Stijn Tintel <stijn@linux-ipv6.be>
PKG_LICENSE:=ISC

View File

@ -56,6 +56,10 @@ write_lldpd_conf()
[ -e $LLDPD_CONFS_DIR ] || ln -s /etc/lldpd.d $LLDPD_CONFS_DIR
}
service_triggers() {
procd_add_reload_trigger "lldpd"
}
start_service() {
local enable_cdp
@ -84,8 +88,7 @@ start_service() {
write_lldpd_conf
procd_open_instance
procd_set_param command /usr/sbin/lldpd
procd_append_param command -d # don't daemonize, procd will handle that for us
procd_set_param command /usr/sbin/lldpd -d
[ $enable_cdp -gt 0 ] && procd_append_param command '-c'
[ $enable_fdp -gt 0 ] && procd_append_param command '-f'

View File

@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=iproute2
PKG_VERSION:=5.14.0
PKG_VERSION:=5.15.0
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/linux/utils/net/iproute2
PKG_HASH:=210fa785a52f3763c4287fd5ae63e246f6311bfaa48c424baab6d383bb7591d4
PKG_HASH:=38e3e4a5f9a7f5575c015027a10df097c149111eeb739993128e5b2b35b291ff
PKG_BUILD_PARALLEL:=1
PKG_BUILD_DEPENDS:=iptables
PKG_LICENSE:=GPL-2.0

View File

@ -30,7 +30,7 @@
"Usage: ip [ OPTIONS ] OBJECT { COMMAND | help }\n"
" ip [ -force ] -batch filename\n"
+#ifndef IPROUTE2_TINY
"where OBJECT := { address | addrlabel | fou | help | ila | l2tp | link |\n"
"where OBJECT := { address | addrlabel | fou | help | ila | ioam | l2tp | link |\n"
" macsec | maddress | monitor | mptcp | mroute | mrule |\n"
" neighbor | neighbour | netconf | netns | nexthop | ntable |\n"
" ntbl | route | rule | sr | tap | tcpmetrics |\n"
@ -43,7 +43,7 @@
" OPTIONS := { -V[ersion] | -s[tatistics] | -d[etails] | -r[esolve] |\n"
" -h[uman-readable] | -iec | -j[son] | -p[retty] |\n"
" -f[amily] { inet | inet6 | mpls | bridge | link } |\n"
@@ -91,36 +97,50 @@ static const struct cmd {
@@ -91,37 +97,51 @@ static const struct cmd {
int (*func)(int argc, char **argv);
} cmds[] = {
{ "address", do_ipaddr },
@ -90,6 +90,7 @@
+#ifndef IPROUTE2_TINY
{ "nexthop", do_ipnh },
{ "mptcp", do_mptcp },
{ "ioam", do_ioam6 },
+#endif
{ "help", do_help },
{ 0 }

View File

@ -61,7 +61,7 @@ env_init() {
mkdir -p "$ENVDIR" || error "Failed to create the environment directory"
cd "$ENVDIR" || error "Failed to switch to the environment directory"
[ -d .git ] || {
git init &&
git init -b master &&
touch .config &&
mkdir files &&
git add . &&

View File

@ -21,7 +21,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -678,6 +678,10 @@ int ehci_setup(struct usb_hcd *hcd)
@@ -687,6 +687,10 @@ int ehci_setup(struct usb_hcd *hcd)
/* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);

View File

@ -0,0 +1,47 @@
From 5f15d392dcb4aa250a63d6f2c5adfc26c0aedc78 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Tue, 2 Nov 2021 19:30:41 +0100
Subject: net: dsa: qca8k: make sure PAD0 MAC06 exchange is disabled
Some device set MAC06 exchange in the bootloader. This cause some
problem as we don't support this strange mode and we just set the port6
as the primary CPU port. With MAC06 exchange, PAD0 reg configure port6
instead of port0. Add an extra check and explicitly disable MAC06 exchange
to correctly configure the port PAD config.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Fixes: 3fcf734aa482 ("net: dsa: qca8k: add support for cpu port 6")
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/qca8k.c | 8 ++++++++
drivers/net/dsa/qca8k.h | 1 +
2 files changed, 9 insertions(+)
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -1109,6 +1109,14 @@ qca8k_setup(struct dsa_switch *ds)
if (ret)
return ret;
+ /* Make sure MAC06 is disabled */
+ ret = qca8k_reg_clear(priv, QCA8K_REG_PORT0_PAD_CTRL,
+ QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN);
+ if (ret) {
+ dev_err(priv->dev, "failed disabling MAC06 exchange");
+ return ret;
+ }
+
/* Enable CPU Port */
ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
--- a/drivers/net/dsa/qca8k.h
+++ b/drivers/net/dsa/qca8k.h
@@ -34,6 +34,7 @@
#define QCA8K_MASK_CTRL_DEVICE_ID_MASK GENMASK(15, 8)
#define QCA8K_MASK_CTRL_DEVICE_ID(x) ((x) >> 8)
#define QCA8K_REG_PORT0_PAD_CTRL 0x004
+#define QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN BIT(31)
#define QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE BIT(19)
#define QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE BIT(18)
#define QCA8K_REG_PORT5_PAD_CTRL 0x008

View File

@ -26,7 +26,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -651,7 +651,7 @@ static int ehci_run (struct usb_hcd *hcd
@@ -660,7 +660,7 @@ static int ehci_run (struct usb_hcd *hcd
"USB %x.%x started, EHCI %x.%02x%s\n",
((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
temp >> 8, temp & 0xff,
@ -57,7 +57,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
/*
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -327,6 +327,8 @@ static int ehci_platform_probe(struct pl
@@ -333,6 +333,8 @@ static int ehci_platform_probe(struct pl
hcd->has_tt = 1;
if (pdata->reset_on_resume)
priv->reset_on_resume = true;
@ -68,10 +68,10 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
if (ehci->big_endian_mmio) {
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -218,6 +218,7 @@ struct ehci_hcd { /* one per controlle
unsigned frame_index_bug:1; /* MosChip (AKA NetMos) */
@@ -219,6 +219,7 @@ struct ehci_hcd { /* one per controlle
unsigned need_oc_pp_cycle:1; /* MPC834X port power */
unsigned imx28_write_fix:1; /* For Freescale i.MX28 */
unsigned is_aspeed:1;
+ unsigned spurious_oc:1;
/* required for usb32 quirk */

View File

@ -1,7 +1,7 @@
From 639dba857aa554f2a78572adc4cf3c32de9ec2e2 Mon Sep 17 00:00:00 2001
From 844c273286f328acf0dab5fbd5d864366b4904dc Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Tue, 30 Mar 2021 18:21:14 +0200
Subject: [PATCH 2/2] of_net: add mac-address-increment support
Subject: [PATCH] of_net: add mac-address-increment support
Lots of embedded devices use the mac-address of other interface
extracted from nvmem cells and increments it by one or two. Add two
@ -15,12 +15,12 @@ early has to be increased.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/of/of_net.c | 59 ++++++++++++++++++++++++++++++++++-----------
1 file changed, 45 insertions(+), 14 deletions(-)
drivers/of/of_net.c | 43 +++++++++++++++++++++++++++++++++++++++----
1 file changed, 39 insertions(+), 4 deletions(-)
--- a/drivers/of/of_net.c
+++ b/drivers/of/of_net.c
@@ -115,27 +115,52 @@ static int of_get_mac_addr_nvmem(struct
@@ -115,27 +115,62 @@ static int of_get_mac_addr_nvmem(struct
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*
@ -28,15 +28,17 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+ * using:
+ * - mac-address-increment-byte to decide what byte to increase
+ * (if not defined is increased the last byte)
+ * - mac-address-increment to decide how much to increase. The value will
+ * not overflow to other bytes if the increment is over 255.
+ * (example 00:01:02:03:04:ff + 1 == 00:01:02:03:04:00)
+ * - mac-address-increment to decide how much to increase. The value WILL
+ * overflow to other bytes if the increment is over 255 or the total
+ * increment will exceed 255 of the current byte.
+ * (example 00:01:02:03:04:ff + 1 == 00:01:02:03:05:00)
+ * (example 00:01:02:03:04:fe + 5 == 00:01:02:03:05:03)
+ *
* Return: 0 on success and errno in case of error.
*/
int of_get_mac_address(struct device_node *np, u8 *addr)
{
+ u32 inc_idx, mac_inc;
+ u32 inc_idx, mac_inc, mac_val;
int ret;
+ /* Check first if the increment byte is present and valid.
@ -70,8 +72,16 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+ return ret;
+
+found:
+ if (!of_property_read_u32(np, "mac-address-increment", &mac_inc))
+ addr[inc_idx] += mac_inc;
+ if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) {
+ /* Convert to a contiguous value */
+ mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5];
+ mac_val += mac_inc << 8 * (5-inc_idx);
+
+ /* Apply the incremented value handling overflow case */
+ addr[3] = (mac_val >> 16) & 0xff;
+ addr[4] = (mac_val >> 8) & 0xff;
+ addr[5] = (mac_val >> 0) & 0xff;
+ }
- return of_get_mac_addr_nvmem(np, addr);
+ return ret;

View File

@ -28,9 +28,9 @@
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
@@ -161,6 +182,7 @@ found:
if (!of_property_read_u32(np, "mac-address-increment", &mac_inc))
addr[inc_idx] += mac_inc;
@@ -171,6 +192,7 @@ found:
addr[5] = (mac_val >> 0) & 0xff;
}
+ of_add_mac_address(np, addr);
return ret;

View File

@ -1,7 +1,7 @@
From 639dba857aa554f2a78572adc4cf3c32de9ec2e2 Mon Sep 17 00:00:00 2001
From 844c273286f328acf0dab5fbd5d864366b4904dc Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Tue, 30 Mar 2021 18:21:14 +0200
Subject: [PATCH 2/2] of_net: add mac-address-increment support
Subject: [PATCH] of_net: add mac-address-increment support
Lots of embedded devices use the mac-address of other interface
extracted from nvmem cells and increments it by one or two. Add two
@ -15,12 +15,12 @@ early has to be increased.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/of/of_net.c | 59 ++++++++++++++++++++++++++++++++++-----------
1 file changed, 45 insertions(+), 14 deletions(-)
drivers/of/of_net.c | 43 +++++++++++++++++++++++++++++++++++++++----
1 file changed, 39 insertions(+), 4 deletions(-)
--- a/drivers/of/of_net.c
+++ b/drivers/of/of_net.c
@@ -109,27 +109,52 @@ static int of_get_mac_addr_nvmem(struct
@@ -109,27 +109,62 @@ static int of_get_mac_addr_nvmem(struct
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*
@ -28,15 +28,17 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+ * using:
+ * - mac-address-increment-byte to decide what byte to increase
+ * (if not defined is increased the last byte)
+ * - mac-address-increment to decide how much to increase. The value will
+ * not overflow to other bytes if the increment is over 255.
+ * (example 00:01:02:03:04:ff + 1 == 00:01:02:03:04:00)
+ * - mac-address-increment to decide how much to increase. The value WILL
+ * overflow to other bytes if the increment is over 255 or the total
+ * increment will exceed 255 of the current byte.
+ * (example 00:01:02:03:04:ff + 1 == 00:01:02:03:05:00)
+ * (example 00:01:02:03:04:fe + 5 == 00:01:02:03:05:03)
+ *
* Return: 0 on success and errno in case of error.
*/
int of_get_mac_address(struct device_node *np, u8 *addr)
{
+ u32 inc_idx, mac_inc;
+ u32 inc_idx, mac_inc, mac_val;
int ret;
+ /* Check first if the increment byte is present and valid.
@ -70,8 +72,16 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+ return ret;
+
+found:
+ if (!of_property_read_u32(np, "mac-address-increment", &mac_inc))
+ addr[inc_idx] += mac_inc;
+ if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) {
+ /* Convert to a contiguous value */
+ mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5];
+ mac_val += mac_inc << 8 * (5-inc_idx);
+
+ /* Apply the incremented value handling overflow case */
+ addr[3] = (mac_val >> 16) & 0xff;
+ addr[4] = (mac_val >> 8) & 0xff;
+ addr[5] = (mac_val >> 0) & 0xff;
+ }
- return of_get_mac_addr_nvmem(np, addr);
+ return ret;

View File

@ -28,9 +28,9 @@
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
@@ -155,6 +176,7 @@ found:
if (!of_property_read_u32(np, "mac-address-increment", &mac_inc))
addr[inc_idx] += mac_inc;
@@ -165,6 +186,7 @@ found:
addr[5] = (mac_val >> 0) & 0xff;
}
+ of_add_mac_address(np, addr);
return ret;

View File

@ -50,7 +50,7 @@ ipq40xx_setup_interfaces()
;;
asus,rt-ac58u|\
mikrotik,hap-ac2|\
p2w,r619ac|\
p2w,r619ac-64m|\
p2w,r619ac-128m|\
zyxel,nbg6617)
ucidef_set_interfaces_lan_wan "eth0" "eth1"

View File

@ -70,7 +70,7 @@ case "$FIRMWARE" in
glinet,gl-s1300 |\
linksys,ea6350v3 |\
mobipromo,cm520-79f |\
p2w,r619ac |\
p2w,r619ac-64m |\
p2w,r619ac-128m |\
qcom,ap-dk01.1-c1)
caldata_extract "ART" 0x1000 0x2f20
@ -192,7 +192,7 @@ case "$FIRMWARE" in
glinet,gl-s1300 |\
linksys,ea6350v3 |\
mobipromo,cm520-79f |\
p2w,r619ac |\
p2w,r619ac-64m |\
p2w,r619ac-128m |\
qcom,ap-dk01.1-c1)
caldata_extract "ART" 0x5000 0x2f20

View File

@ -73,6 +73,8 @@ platform_do_upgrade() {
luma,wrtq-329acn |\
mobipromo,cm520-79f |\
netgear,wac510 |\
p2w,r619ac-64m |\
p2w,r619ac-128m |\
qxwlan,e2600ac-c2)
nand_do_upgrade "$1"
;;

View File

@ -5,14 +5,14 @@
/ {
model = "P&W R619AC 128M";
compatible = "p2w,r619ac-128m";
chosen {
bootargs-append = " root=/dev/ubiblock0_1 rootfstype=squashfs";
};
};
&rootfs_part1 {
&nand_rootfs {
/*
* Watch out: stock MIBIB is set up for a 64MiB chip.
* If a 128MiB flash chip is used, make sure to have
* the right values in MIBIB or the device might not
* boot.
*/
reg = <0x0 0x8000000>;
};
/delete-node/ &rootfs_part2;

View File

@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019-r619ac.dtsi"
/ {
model = "P&W R619AC 64M";
compatible = "p2w,r619ac-64m";
};
&nand_rootfs {
reg = <0x0 0x4000000>;
};

View File

@ -4,8 +4,13 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
#include <dt-bindings/leds/common.h>
/ {
chosen {
bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
};
aliases {
led-boot = &led_sys;
led-failsafe = &led_sys;
@ -80,24 +85,30 @@
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_sys: sys {
led_sys: led-0 {
label = "blue:sys";
gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
};
wlan2g {
led-1 {
label = "blue:wlan2g";
gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
function-enumerator = <0>;
};
wlan5g {
led-2 {
label = "blue:wlan5g";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1tpt";
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
function-enumerator = <1>;
};
};
@ -129,19 +140,69 @@
#address-cells = <1>;
#size-cells = <1>;
partition@1 {
label = "Bootloader";
reg = <0x0 0x170000>;
partition@0 {
label = "SBL1";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "QSEE";
reg = <0x60000 0x60000>;
read-only;
};
partition@c0000 {
label = "CDT";
reg = <0xc0000 0x10000>;
read-only;
};
partition@d0000 {
label = "DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
partition@e0000 {
label = "APPSBLENV";
reg = <0xe0000 0x10000>;
read-only;
};
partition@f0000 {
label = "APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
partition@170000 {
label = "ART";
reg = <0x170000 0x10000>;
read-only;
};
};
};
};
partition@180000 {
label = "unused";
reg = <0x180000 0xe80000>;
&nand {
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
nand_rootfs: partition@0 {
label = "ubi";
/* reg defined in 64M/128M variant dts. */
};
};
};
@ -157,33 +218,11 @@
status = "okay";
};
&nand {
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
rootfs_part1: partition@0 {
label = "rootfs";
reg = <0x0 0x4000000>;
};
rootfs_part2: partition@4000000 {
label = "unused1";
reg = <0x4000000 0x4000000>;
};
};
};
};
&pcie0 {
status = "okay";
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
perst-gpio = <&tlmm 4 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie_pins>;
perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>;
/* Free slot for use */
@ -211,8 +250,8 @@
mux {
pins = "gpio2";
function = "gpio";
bias-pull-down;
output-low;
bias-pull-down;
};
};
@ -251,29 +290,6 @@
bias-disable;
};
};
led_pins: led_pinmux {
mux {
pins = "gpio32", "gpio39", "gpio50";
function = "gpio";
bias-pull-up;
output-low;
};
mux_1 {
pins = "gpio52";
function = "gpio";
bias-pull-up;
output-high;
};
mux_2 {
pins = "gpio61";
function = "gpio";
bias-pull-down;
output-high;
};
};
};
&ethphy0 {
@ -324,10 +340,10 @@
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "R619AC";
qcom,ath10k-calibration-variant = "P&W R619AC";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "R619AC";
qcom,ath10k-calibration-variant = "P&W R619AC";
};

View File

@ -753,6 +753,32 @@ define Device/openmesh_a62
endef
TARGET_DEVICES += openmesh_a62
define Device/p2w_r619ac
$(call Device/FitzImage)
$(call Device/UbiFit)
DEVICE_VENDOR := P&W
DEVICE_MODEL := R619AC
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@10
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := ipq-wifi-p2w_r619ac
endef
define Device/p2w_r619ac-64m
$(call Device/p2w_r619ac)
DEVICE_VARIANT := 64M NAND
IMAGES += nand-factory.bin
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += p2w_r619ac-64m
define Device/p2w_r619ac-128m
$(call Device/p2w_r619ac)
DEVICE_VARIANT := 128M NAND
endef
TARGET_DEVICES += p2w_r619ac-128m
define Device/plasmacloud_pa1200
$(call Device/FitImageLzma)
DEVICE_VENDOR := Plasma Cloud
@ -785,35 +811,6 @@ define Device/plasmacloud_pa2200
endef
TARGET_DEVICES += plasmacloud_pa2200
define Device/p2w_r619ac
$(call Device/FitzImage)
$(call Device/UbiFit)
DEVICE_VENDOR := P&W
DEVICE_MODEL := R619AC
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@10
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGES += nand-factory.bin
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
DEVICE_PACKAGES := ipq-wifi-p2w_r619ac
endef
TARGET_DEVICES += p2w_r619ac
define Device/p2w_r619ac-128m
$(call Device/FitzImage)
$(call Device/UbiFit)
DEVICE_VENDOR := P&W
DEVICE_MODEL := R619AC
DEVICE_VARIANT := 128M
SOC := qcom-ipq4019
DEVICE_DTS_CONFIG := config@10
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_PACKAGES := ipq-wifi-p2w_r619ac
endef
TARGET_DEVICES += p2w_r619ac-128m
define Device/qcom_ap-dk01.1-c1
DEVICE_VENDOR := Qualcomm Atheros
DEVICE_MODEL := AP-DK01.1
@ -909,7 +906,6 @@ define Device/zyxel_nbg6617
IMAGE/factory.bin := append-rootfs | pad-rootfs | pad-to 64k | check-size $$$$(ROOTFS_SIZE) | zyxel-ras-image separate-kernel
IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | check-size $$$$(ROOTFS_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata
DEVICE_PACKAGES := kmod-usb-ledtrig-usbport
DEFAULT := n
endef
TARGET_DEVICES += zyxel_nbg6617

View File

@ -58,7 +58,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+ qcom-ipq4019-map-ac2200.dtb \
+ qcom-ipq4019-mr8300.dtb \
+ qcom-ipq4019-pa2200.dtb \
+ qcom-ipq4019-r619ac.dtb \
+ qcom-ipq4019-r619ac-64m.dtb \
+ qcom-ipq4019-r619ac-128m.dtb \
+ qcom-ipq4019-rbr50.dtb \
+ qcom-ipq4019-rbs50.dtb \

View File

@ -236,6 +236,8 @@
interrupts = <105 109>;
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
lantiq,tx-burst-length = <4>;
lantiq,rx-burst-length = <4>;
};
};

View File

@ -385,9 +385,10 @@
0xe108000 0x200>;
interrupt-parent = <&icu0>;
interrupts = <73 72>;
mac-address = [ 00 11 22 33 44 55 ];
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
lantiq,tx-burst-length = <8>;
lantiq,rx-burst-length = <8>;
};
ppe@e234000 {

View File

@ -299,7 +299,8 @@
reg = <0xe180000 0x40000>;
interrupt-parent = <&icu0>;
interrupts = <73 78>;
mac-address = [ 00 11 22 33 44 55 ];
lantiq,tx-burst-length = <4>;
lantiq,rx-burst-length = <4>;
};
ppe@e234000 {

View File

@ -488,6 +488,8 @@
interrupt-names = "tx", "rx";
resets = <&reset0 21 16>, <&reset0 8 8>, <&reset0 3 3>;
reset-names = "switch", "ppe", "ppe_dsp";
lantiq,tx-burst-length = <8>;
lantiq,rx-burst-length = <8>;
#address-cells = <1>;
#size-cells = <0>;

View File

@ -0,0 +1,32 @@
From 497acc03cd3918baabe25d46e30c5c62b998e24d Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 19 Jun 2021 13:38:12 +0200
Subject: [PATCH 1/5] MIPS: lantiq: dma: add small delay after reset
Reading the DMA registers immediately after the reset causes
Data Bus Error. Adding a small delay fixes this problem.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
arch/mips/lantiq/xway/dma.c | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -11,6 +11,7 @@
#include <linux/export.h>
#include <linux/spinlock.h>
#include <linux/clk.h>
+#include <linux/delay.h>
#include <linux/err.h>
#include <lantiq_soc.h>
@@ -221,6 +222,8 @@ ltq_dma_init(struct platform_device *pde
clk_enable(clk);
ltq_dma_w32_mask(0, DMA_RESET, LTQ_DMA_CTRL);
+ usleep_range(1, 10);
+
/* disable all interrupts */
ltq_dma_w32(0, LTQ_DMA_IRNEN);

View File

@ -0,0 +1,68 @@
From d31260c2f6a5cdddb052ab7cb09560eb23ce6597 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 15 Apr 2021 21:28:24 +0200
Subject: [PATCH 2/5] MIPS: lantiq: dma: reset correct number of channel
Different SoCs have a different number of channels, e.g .:
* amazon-se has 10 channels,
* danube+ar9 have 20 channels,
* vr9 has 28 channels,
* ar10 has 24 channels.
We can read the ID register and, depending on the reported
number of channels, reset the appropriate number of channels.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
arch/mips/lantiq/xway/dma.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -30,6 +30,7 @@
#define LTQ_DMA_PCTRL 0x44
#define LTQ_DMA_IRNEN 0xf4
+#define DMA_ID_CHNR GENMASK(26, 20) /* channel number */
#define DMA_DESCPT BIT(3) /* descriptor complete irq */
#define DMA_TX BIT(8) /* TX channel direction */
#define DMA_CHAN_ON BIT(0) /* channel on / off bit */
@@ -40,7 +41,6 @@
#define DMA_POLL BIT(31) /* turn on channel polling */
#define DMA_CLK_DIV4 BIT(6) /* polling clock divider */
#define DMA_2W_BURST BIT(1) /* 2 word burst length */
-#define DMA_MAX_CHANNEL 20 /* the soc has 20 channels */
#define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */
#define DMA_WEIGHT (BIT(17) | BIT(16)) /* default channel wheight */
@@ -206,7 +206,7 @@ ltq_dma_init(struct platform_device *pde
{
struct clk *clk;
struct resource *res;
- unsigned id;
+ unsigned int id, nchannels;
int i;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -228,17 +228,18 @@ ltq_dma_init(struct platform_device *pde
ltq_dma_w32(0, LTQ_DMA_IRNEN);
/* reset/configure each channel */
- for (i = 0; i < DMA_MAX_CHANNEL; i++) {
+ id = ltq_dma_r32(LTQ_DMA_ID);
+ nchannels = ((id & DMA_ID_CHNR) >> 20);
+ for (i = 0; i < nchannels; i++) {
ltq_dma_w32(i, LTQ_DMA_CS);
ltq_dma_w32(DMA_CHAN_RST, LTQ_DMA_CCTRL);
ltq_dma_w32(DMA_POLL | DMA_CLK_DIV4, LTQ_DMA_CPOLL);
ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
}
- id = ltq_dma_r32(LTQ_DMA_ID);
dev_info(&pdev->dev,
"Init done - hw rev: %X, ports: %d, channels: %d\n",
- id & 0x1f, (id >> 16) & 0xf, id >> 20);
+ id & 0x1f, (id >> 16) & 0xf, nchannels);
return 0;
}

View File

@ -0,0 +1,41 @@
From 7d9ea9052d6680d2910b8b005c397d95b3a8b012 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Wed, 7 Apr 2021 21:04:39 +0200
Subject: [PATCH 3/5] MIPS: lantiq: dma: fix burst length for DEU
The current definition of 2W burst length is invalid.
This patch fixes it. Current downstream DEU driver doesn't
use DMA. An incorrect burst length value doesn't cause any
errors. This patch also adds other burst length values.
Fixes: dfec1a827d2b ("MIPS: Lantiq: Add DMA support")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
arch/mips/lantiq/xway/dma.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -40,7 +40,11 @@
#define DMA_IRQ_ACK 0x7e /* IRQ status register */
#define DMA_POLL BIT(31) /* turn on channel polling */
#define DMA_CLK_DIV4 BIT(6) /* polling clock divider */
-#define DMA_2W_BURST BIT(1) /* 2 word burst length */
+#define DMA_PCTRL_2W_BURST 0x1 /* 2 word burst length */
+#define DMA_PCTRL_4W_BURST 0x2 /* 4 word burst length */
+#define DMA_PCTRL_8W_BURST 0x3 /* 8 word burst length */
+#define DMA_TX_BURST_SHIFT 4 /* tx burst shift */
+#define DMA_RX_BURST_SHIFT 2 /* rx burst shift */
#define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */
#define DMA_WEIGHT (BIT(17) | BIT(16)) /* default channel wheight */
@@ -191,7 +195,8 @@ ltq_dma_init_port(int p)
break;
case DMA_PORT_DEU:
- ltq_dma_w32((DMA_2W_BURST << 4) | (DMA_2W_BURST << 2),
+ ltq_dma_w32((DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT) |
+ (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
LTQ_DMA_PCTRL);
break;

View File

@ -0,0 +1,84 @@
From 6615eeb39f7a110a196f20acbfb3a017da4d75d2 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Fri, 14 May 2021 21:25:08 +0200
Subject: [PATCH 4/5] MIPS: lantiq: dma: make a burst length configurable in
drivers
Make a burst length configurable in drivers.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
.../include/asm/mach-lantiq/xway/xway_dma.h | 2 +-
arch/mips/lantiq/xway/dma.c | 38 ++++++++++++++++---
2 files changed, 34 insertions(+), 6 deletions(-)
--- a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
@@ -45,6 +45,6 @@ extern void ltq_dma_close(struct ltq_dma
extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
extern void ltq_dma_free(struct ltq_dma_channel *ch);
-extern void ltq_dma_init_port(int p);
+extern void ltq_dma_init_port(int p, int tx_burst, int rx_burst);
#endif
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -181,7 +181,7 @@ ltq_dma_free(struct ltq_dma_channel *ch)
EXPORT_SYMBOL_GPL(ltq_dma_free);
void
-ltq_dma_init_port(int p)
+ltq_dma_init_port(int p, int tx_burst, int rx_burst)
{
ltq_dma_w32(p, LTQ_DMA_PS);
switch (p) {
@@ -190,16 +190,44 @@ ltq_dma_init_port(int p)
* Tell the DMA engine to swap the endianness of data frames and
* drop packets if the channel arbitration fails.
*/
- ltq_dma_w32_mask(0, DMA_ETOP_ENDIANNESS | DMA_PDEN,
+ ltq_dma_w32_mask(0, (DMA_ETOP_ENDIANNESS | DMA_PDEN),
LTQ_DMA_PCTRL);
break;
- case DMA_PORT_DEU:
- ltq_dma_w32((DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT) |
- (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
+ default:
+ break;
+ }
+
+ switch (rx_burst) {
+ case 8:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_8W_BURST << DMA_RX_BURST_SHIFT),
LTQ_DMA_PCTRL);
break;
+ case 4:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_4W_BURST << DMA_RX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 2:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ default:
+ break;
+ }
+ switch (tx_burst) {
+ case 8:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_8W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 4:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_4W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 2:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
default:
break;
}

View File

@ -0,0 +1,124 @@
From ec1a17a11aced3cd756e59d91ad6f50b7a2fabfb Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sun, 16 May 2021 15:52:06 +0200
Subject: [PATCH 5/5] net: lantiq: configure burst length for ethernet
Configure the burst length for Ethernet. This improves Ethernet
performance by 58%. According to the vendor BSP, 8W burst length
is supported by ar9 and newer SoCs.
The NAT benchmark results on xRX200 (Down/Up):
* 2W: 330 Mb/s
* 4W: 432 Mb/s 372 Mb/s
* 8W: 520 Mb/s 389 Mb/s
Tested on xRX200 and xRX330.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
drivers/net/ethernet/lantiq_etop.c | 21 ++++++++++++++++++---
drivers/net/ethernet/lantiq_xrx200.c | 21 ++++++++++++++++++---
2 files changed, 36 insertions(+), 6 deletions(-)
--- a/drivers/net/ethernet/lantiq_etop.c
+++ b/drivers/net/ethernet/lantiq_etop.c
@@ -148,6 +148,9 @@ struct ltq_etop_priv {
struct ltq_etop_chan txch;
struct ltq_etop_chan rxch;
+ int tx_burst_len;
+ int rx_burst_len;
+
int tx_irq;
int rx_irq;
@@ -399,7 +402,7 @@ ltq_etop_dma_init(struct net_device *dev
int rx = priv->rx_irq - LTQ_DMA_ETOP;
int err;
- ltq_dma_init_port(DMA_PORT_ETOP);
+ ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, priv->rx_burst_len);
priv->txch.dma.nr = tx;
priv->txch.dma.dev = &priv->pdev->dev;
@@ -676,8 +679,8 @@ ltq_etop_tx(struct sk_buff *skb, struct
return NETDEV_TX_BUSY;
}
- /* dma needs to start on a 16 byte aligned address */
- byte_offset = CPHYSADDR(skb->data) % 16;
+ /* dma needs to start on a burst length value aligned address */
+ byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4);
priv->txch.skb[priv->txch.dma.desc] = skb;
netif_trans_update(dev);
@@ -925,6 +928,18 @@ static int ltq_etop_probe(struct platfor
spin_lock_init(&priv->lock);
SET_NETDEV_DEV(dev, &pdev->dev);
+ err = device_property_read_u32(&pdev->dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
+ if (err < 0) {
+ dev_err(&pdev->dev, "unable to read tx-burst-length property\n");
+ return err;
+ }
+
+ err = device_property_read_u32(&pdev->dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
+ if (err < 0) {
+ dev_err(&pdev->dev, "unable to read rx-burst-length property\n");
+ return err;
+ }
+
netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8);
netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32);
priv->txch.netdev = dev;
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -71,6 +71,9 @@ struct xrx200_priv {
struct net_device *net_dev;
struct device *dev;
+ int tx_burst_len;
+ int rx_burst_len;
+
__iomem void *pmac_reg;
};
@@ -316,8 +319,8 @@ static netdev_tx_t xrx200_start_xmit(str
if (unlikely(dma_mapping_error(priv->dev, mapping)))
goto err_drop;
- /* dma needs to start on a 16 byte aligned address */
- byte_offset = mapping % 16;
+ /* dma needs to start on a burst length value aligned address */
+ byte_offset = mapping % (priv->tx_burst_len * 4);
desc->addr = mapping - byte_offset;
/* Make sure the address is written before we give it to HW */
@@ -369,7 +372,7 @@ static int xrx200_dma_init(struct xrx200
int ret = 0;
int i;
- ltq_dma_init_port(DMA_PORT_ETOP);
+ ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, priv->rx_burst_len);
ch_rx->dma.nr = XRX200_DMA_RX;
ch_rx->dma.dev = priv->dev;
@@ -487,6 +490,18 @@ static int xrx200_probe(struct platform_
if (err)
eth_hw_addr_random(net_dev);
+ err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
+ if (err < 0) {
+ dev_err(dev, "unable to read tx-burst-length property\n");
+ return err;
+ }
+
+ err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
+ if (err < 0) {
+ dev_err(dev, "unable to read rx-burst-length property\n");
+ return err;
+ }
+
/* bring up the dma engine and IP core */
err = xrx200_dma_init(priv);
if (err)

View File

@ -0,0 +1,32 @@
From 497acc03cd3918baabe25d46e30c5c62b998e24d Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sat, 19 Jun 2021 13:38:12 +0200
Subject: [PATCH 1/5] MIPS: lantiq: dma: add small delay after reset
Reading the DMA registers immediately after the reset causes
Data Bus Error. Adding a small delay fixes this problem.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
arch/mips/lantiq/xway/dma.c | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -11,6 +11,7 @@
#include <linux/export.h>
#include <linux/spinlock.h>
#include <linux/clk.h>
+#include <linux/delay.h>
#include <linux/err.h>
#include <lantiq_soc.h>
@@ -221,6 +222,8 @@ ltq_dma_init(struct platform_device *pde
clk_enable(clk);
ltq_dma_w32_mask(0, DMA_RESET, LTQ_DMA_CTRL);
+ usleep_range(1, 10);
+
/* disable all interrupts */
ltq_dma_w32(0, LTQ_DMA_IRNEN);

View File

@ -0,0 +1,68 @@
From d31260c2f6a5cdddb052ab7cb09560eb23ce6597 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Thu, 15 Apr 2021 21:28:24 +0200
Subject: [PATCH 2/5] MIPS: lantiq: dma: reset correct number of channel
Different SoCs have a different number of channels, e.g .:
* amazon-se has 10 channels,
* danube+ar9 have 20 channels,
* vr9 has 28 channels,
* ar10 has 24 channels.
We can read the ID register and, depending on the reported
number of channels, reset the appropriate number of channels.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
arch/mips/lantiq/xway/dma.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -30,6 +30,7 @@
#define LTQ_DMA_PCTRL 0x44
#define LTQ_DMA_IRNEN 0xf4
+#define DMA_ID_CHNR GENMASK(26, 20) /* channel number */
#define DMA_DESCPT BIT(3) /* descriptor complete irq */
#define DMA_TX BIT(8) /* TX channel direction */
#define DMA_CHAN_ON BIT(0) /* channel on / off bit */
@@ -40,7 +41,6 @@
#define DMA_POLL BIT(31) /* turn on channel polling */
#define DMA_CLK_DIV4 BIT(6) /* polling clock divider */
#define DMA_2W_BURST BIT(1) /* 2 word burst length */
-#define DMA_MAX_CHANNEL 20 /* the soc has 20 channels */
#define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */
#define DMA_WEIGHT (BIT(17) | BIT(16)) /* default channel wheight */
@@ -206,7 +206,7 @@ ltq_dma_init(struct platform_device *pde
{
struct clk *clk;
struct resource *res;
- unsigned id;
+ unsigned int id, nchannels;
int i;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -228,17 +228,18 @@ ltq_dma_init(struct platform_device *pde
ltq_dma_w32(0, LTQ_DMA_IRNEN);
/* reset/configure each channel */
- for (i = 0; i < DMA_MAX_CHANNEL; i++) {
+ id = ltq_dma_r32(LTQ_DMA_ID);
+ nchannels = ((id & DMA_ID_CHNR) >> 20);
+ for (i = 0; i < nchannels; i++) {
ltq_dma_w32(i, LTQ_DMA_CS);
ltq_dma_w32(DMA_CHAN_RST, LTQ_DMA_CCTRL);
ltq_dma_w32(DMA_POLL | DMA_CLK_DIV4, LTQ_DMA_CPOLL);
ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
}
- id = ltq_dma_r32(LTQ_DMA_ID);
dev_info(&pdev->dev,
"Init done - hw rev: %X, ports: %d, channels: %d\n",
- id & 0x1f, (id >> 16) & 0xf, id >> 20);
+ id & 0x1f, (id >> 16) & 0xf, nchannels);
return 0;
}

View File

@ -0,0 +1,41 @@
From 7d9ea9052d6680d2910b8b005c397d95b3a8b012 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Wed, 7 Apr 2021 21:04:39 +0200
Subject: [PATCH 3/5] MIPS: lantiq: dma: fix burst length for DEU
The current definition of 2W burst length is invalid.
This patch fixes it. Current downstream DEU driver doesn't
use DMA. An incorrect burst length value doesn't cause any
errors. This patch also adds other burst length values.
Fixes: dfec1a827d2b ("MIPS: Lantiq: Add DMA support")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
arch/mips/lantiq/xway/dma.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -40,7 +40,11 @@
#define DMA_IRQ_ACK 0x7e /* IRQ status register */
#define DMA_POLL BIT(31) /* turn on channel polling */
#define DMA_CLK_DIV4 BIT(6) /* polling clock divider */
-#define DMA_2W_BURST BIT(1) /* 2 word burst length */
+#define DMA_PCTRL_2W_BURST 0x1 /* 2 word burst length */
+#define DMA_PCTRL_4W_BURST 0x2 /* 4 word burst length */
+#define DMA_PCTRL_8W_BURST 0x3 /* 8 word burst length */
+#define DMA_TX_BURST_SHIFT 4 /* tx burst shift */
+#define DMA_RX_BURST_SHIFT 2 /* rx burst shift */
#define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */
#define DMA_WEIGHT (BIT(17) | BIT(16)) /* default channel wheight */
@@ -191,7 +195,8 @@ ltq_dma_init_port(int p)
break;
case DMA_PORT_DEU:
- ltq_dma_w32((DMA_2W_BURST << 4) | (DMA_2W_BURST << 2),
+ ltq_dma_w32((DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT) |
+ (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
LTQ_DMA_PCTRL);
break;

View File

@ -0,0 +1,84 @@
From 6615eeb39f7a110a196f20acbfb3a017da4d75d2 Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Fri, 14 May 2021 21:25:08 +0200
Subject: [PATCH 4/5] MIPS: lantiq: dma: make a burst length configurable in
drivers
Make a burst length configurable in drivers.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
.../include/asm/mach-lantiq/xway/xway_dma.h | 2 +-
arch/mips/lantiq/xway/dma.c | 38 ++++++++++++++++---
2 files changed, 34 insertions(+), 6 deletions(-)
--- a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
@@ -45,6 +45,6 @@ extern void ltq_dma_close(struct ltq_dma
extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
extern void ltq_dma_free(struct ltq_dma_channel *ch);
-extern void ltq_dma_init_port(int p);
+extern void ltq_dma_init_port(int p, int tx_burst, int rx_burst);
#endif
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -181,7 +181,7 @@ ltq_dma_free(struct ltq_dma_channel *ch)
EXPORT_SYMBOL_GPL(ltq_dma_free);
void
-ltq_dma_init_port(int p)
+ltq_dma_init_port(int p, int tx_burst, int rx_burst)
{
ltq_dma_w32(p, LTQ_DMA_PS);
switch (p) {
@@ -190,16 +190,44 @@ ltq_dma_init_port(int p)
* Tell the DMA engine to swap the endianness of data frames and
* drop packets if the channel arbitration fails.
*/
- ltq_dma_w32_mask(0, DMA_ETOP_ENDIANNESS | DMA_PDEN,
+ ltq_dma_w32_mask(0, (DMA_ETOP_ENDIANNESS | DMA_PDEN),
LTQ_DMA_PCTRL);
break;
- case DMA_PORT_DEU:
- ltq_dma_w32((DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT) |
- (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
+ default:
+ break;
+ }
+
+ switch (rx_burst) {
+ case 8:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_8W_BURST << DMA_RX_BURST_SHIFT),
LTQ_DMA_PCTRL);
break;
+ case 4:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_4W_BURST << DMA_RX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 2:
+ ltq_dma_w32_mask(0x0c, (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ default:
+ break;
+ }
+ switch (tx_burst) {
+ case 8:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_8W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 4:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_4W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
+ case 2:
+ ltq_dma_w32_mask(0x30, (DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT),
+ LTQ_DMA_PCTRL);
+ break;
default:
break;
}

View File

@ -0,0 +1,124 @@
From ec1a17a11aced3cd756e59d91ad6f50b7a2fabfb Mon Sep 17 00:00:00 2001
From: Aleksander Jan Bajkowski <olek2@wp.pl>
Date: Sun, 16 May 2021 15:52:06 +0200
Subject: [PATCH 5/5] net: lantiq: configure burst length for ethernet
Configure the burst length for Ethernet. This improves Ethernet
performance by 58%. According to the vendor BSP, 8W burst length
is supported by ar9 and newer SoCs.
The NAT benchmark results on xRX200 (Down/Up):
* 2W: 330 Mb/s
* 4W: 432 Mb/s 372 Mb/s
* 8W: 520 Mb/s 389 Mb/s
Tested on xRX200 and xRX330.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
drivers/net/ethernet/lantiq_etop.c | 21 ++++++++++++++++++---
drivers/net/ethernet/lantiq_xrx200.c | 21 ++++++++++++++++++---
2 files changed, 36 insertions(+), 6 deletions(-)
--- a/drivers/net/ethernet/lantiq_etop.c
+++ b/drivers/net/ethernet/lantiq_etop.c
@@ -148,6 +148,9 @@ struct ltq_etop_priv {
struct ltq_etop_chan txch;
struct ltq_etop_chan rxch;
+ int tx_burst_len;
+ int rx_burst_len;
+
int tx_irq;
int rx_irq;
@@ -399,7 +402,7 @@ ltq_etop_dma_init(struct net_device *dev
int rx = priv->rx_irq - LTQ_DMA_ETOP;
int err;
- ltq_dma_init_port(DMA_PORT_ETOP);
+ ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, priv->rx_burst_len);
priv->txch.dma.nr = tx;
priv->txch.dma.dev = &priv->pdev->dev;
@@ -676,8 +679,8 @@ ltq_etop_tx(struct sk_buff *skb, struct
return NETDEV_TX_BUSY;
}
- /* dma needs to start on a 16 byte aligned address */
- byte_offset = CPHYSADDR(skb->data) % 16;
+ /* dma needs to start on a burst length value aligned address */
+ byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4);
priv->txch.skb[priv->txch.dma.desc] = skb;
netif_trans_update(dev);
@@ -930,6 +933,18 @@ static int ltq_etop_probe(struct platfor
spin_lock_init(&priv->lock);
SET_NETDEV_DEV(dev, &pdev->dev);
+ err = device_property_read_u32(&pdev->dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
+ if (err < 0) {
+ dev_err(&pdev->dev, "unable to read tx-burst-length property\n");
+ return err;
+ }
+
+ err = device_property_read_u32(&pdev->dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
+ if (err < 0) {
+ dev_err(&pdev->dev, "unable to read rx-burst-length property\n");
+ return err;
+ }
+
netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8);
netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32);
priv->txch.netdev = dev;
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -71,6 +71,9 @@ struct xrx200_priv {
struct net_device *net_dev;
struct device *dev;
+ int tx_burst_len;
+ int rx_burst_len;
+
__iomem void *pmac_reg;
};
@@ -315,8 +318,8 @@ static int xrx200_start_xmit(struct sk_b
if (unlikely(dma_mapping_error(priv->dev, mapping)))
goto err_drop;
- /* dma needs to start on a 16 byte aligned address */
- byte_offset = mapping % 16;
+ /* dma needs to start on a burst length value aligned address */
+ byte_offset = mapping % (priv->tx_burst_len * 4);
desc->addr = mapping - byte_offset;
/* Make sure the address is written before we give it to HW */
@@ -368,7 +371,7 @@ static int xrx200_dma_init(struct xrx200
int ret = 0;
int i;
- ltq_dma_init_port(DMA_PORT_ETOP);
+ ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, priv->rx_burst_len);
ch_rx->dma.nr = XRX200_DMA_RX;
ch_rx->dma.dev = priv->dev;
@@ -486,6 +489,18 @@ static int xrx200_probe(struct platform_
if (err)
eth_hw_addr_random(net_dev);
+ err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
+ if (err < 0) {
+ dev_err(dev, "unable to read tx-burst-length property\n");
+ return err;
+ }
+
+ err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
+ if (err < 0) {
+ dev_err(dev, "unable to read rx-burst-length property\n");
+ return err;
+ }
+
/* bring up the dma engine and IP core */
err = xrx200_dma_init(priv);
if (err)

View File

@ -1,5 +1,5 @@
REQUIRE_IMAGE_METADATA=1
RAMFS_COPY_BIN='fw_printenv fw_setenv blockdev'
RAMFS_COPY_BIN='fw_printenv fw_setenv fwtool'
RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
platform_do_upgrade() {
@ -12,17 +12,12 @@ platform_do_upgrade() {
export_partdevice rootdev 0
case "$rootdev" in
mmc*)
blockdev --rereadpt /dev/$rootdev || return 1
local fitpart=$(find_mmc_part "production" $rootdev)
[ "$fitpart" ] || return 1
dd if=/dev/zero of=$fitpart bs=4096 count=1 2>/dev/null
blockdev --rereadpt /dev/$rootdev
get_image "$1" | dd of=$fitpart
blockdev --rereadpt /dev/$rootdev
local datapart=$(find_mmc_part "rootfs_data" $rootdev)
[ "$datapart" ] || return 0
dd if=/dev/zero of=$datapart bs=4096 count=1 2>/dev/null
echo $datapart > /tmp/sysupgrade.datapart
sync
export UPGRADE_MMC_PARTDEV=$(find_mmc_part "production" $rootdev)
[ "$UPGRADE_MMC_PARTDEV" ] || return 1
export UPGRADE_MMC_IMAGE_BLOCKS=$(($(get_image "$1" | fwtool -i /dev/null -T - | dd of=$UPGRADE_MMC_PARTDEV bs=512 2>&1 | grep "records out" | cut -d' ' -f1)))
[ "$UPGRADE_MMC_IMAGE_BLOCKS" ] || return 0
dd if=/dev/zero of=$UPGRADE_MMC_PARTDEV bs=512 seek=$UPGRADE_MMC_IMAGE_BLOCKS count=8
;;
*)
CI_KERNPART="fit"
@ -92,10 +87,12 @@ platform_check_image() {
}
platform_copy_config_mmc() {
[ -e "$UPGRADE_BACKUP" ] || return
local datapart=$(cat /tmp/sysupgrade.datapart)
[ "$datapart" ] || echo "no rootfs_data partition, cannot keep configuration." >&2
dd if="$UPGRADE_BACKUP" of=$datapart
if [ ! -e "$UPGRADE_BACKUP" ] ||
[ ! -e "$UPGRADE_MMC_PARTDEV" ] ||
[ ! "$UPGRADE_MMC_IMAGE_BLOCKS" ]; then
return
fi
dd if="$UPGRADE_BACKUP" of="$UPGRADE_MMC_PARTDEV" bs=512 seek=$UPGRADE_MMC_IMAGE_BLOCKS
sync
}

View File

@ -2,7 +2,7 @@ ARCH:=aarch64
SUBTARGET:=mt7622
BOARDNAME:=MT7622
CPU_TYPE:=cortex-a53
DEFAULT_PACKAGES += kmod-mt7615e kmod-mt7615-firmware wpad-basic-wolfssl blockdev uboot-envtools
DEFAULT_PACKAGES += kmod-mt7615e kmod-mt7615-firmware wpad-basic-wolfssl uboot-envtools
KERNELNAME:=Image dtbs
define Target/Description

View File

@ -1,6 +1,6 @@
REQUIRE_IMAGE_METADATA=1
RAMFS_COPY_BIN='blockdev'
RAMFS_COPY_BIN='fwtool'
# Full system upgrade including preloader for MediaTek SoCs on eMMC or SD
mtk_mmc_full_upgrade() {
@ -84,19 +84,14 @@ platform_do_upgrade() {
case "$board" in
bananapi,bpi-r2)
sync
export_bootdevice
export_partdevice rootdev 0
blockdev --rereadpt /dev/$rootdev || return 1
export_partdevice fitpart 3
[ "$fitpart" ] || return 1
dd if=/dev/zero of=$fitpart bs=4096 count=1 2>/dev/null
blockdev --rereadpt /dev/$rootdev
get_image "$1" | dd of=$fitpart
blockdev --rereadpt /dev/$rootdev
local datapart=$(find_mmc_part "rootfs_data" $rootdev)
[ "$datapart" ] || return 0
dd if=/dev/zero of=$datapart bs=4096 count=1 2>/dev/null
echo $datapart > /tmp/sysupgrade.datapart
export UPGRADE_MMC_PARTDEV="/dev/$fitpart"
export UPGRADE_MMC_IMAGE_BLOCKS=$(($(get_image "$1" | fwtool -i /dev/null -T - | dd of=$UPGRADE_MMC_PARTDEV bs=512 2>&1 | grep "records out" | cut -d' ' -f1)))
[ "$UPGRADE_MMC_IMAGE_BLOCKS" ] || return 0
dd if=/dev/zero of=$UPGRADE_MMC_PARTDEV bs=512 seek=$UPGRADE_MMC_IMAGE_BLOCKS count=8
;;
unielec,u7623-02-emmc-512m)
@ -172,10 +167,12 @@ platform_check_image() {
}
platform_copy_config_mmc() {
[ -e "$UPGRADE_BACKUP" ] || return
local datapart=$(cat /tmp/sysupgrade.datapart)
[ "$datapart" ] || echo "no rootfs_data partition, cannot keep configuration." >&2
dd if="$UPGRADE_BACKUP" of=$datapart
if [ ! -e "$UPGRADE_BACKUP" ] ||
[ ! -e "$UPGRADE_MMC_PARTDEV" ] ||
[ ! "$UPGRADE_MMC_IMAGE_BLOCKS" ]; then
return
fi
dd if="$UPGRADE_BACKUP" of="$UPGRADE_MMC_PARTDEV" bs=512 seek=$UPGRADE_MMC_IMAGE_BLOCKS
sync
}

View File

@ -9,7 +9,7 @@ CPU_TYPE:=cortex-a7
CPU_SUBTYPE:=neon-vfpv4
KERNELNAME:=Image dtbs zImage
FEATURES+=display usbgadget
DEFAULT_PACKAGES+=blockdev uboot-envtools
DEFAULT_PACKAGES+=uboot-envtools
define Target/Description
Build firmware images for MediaTek mt7623 ARM based boards.

View File

@ -10,8 +10,8 @@ BOARDNAME:=Freescale i.MX23/i.MX28
FEATURES:=ext4 rtc usb gpio
CPU_TYPE:=arm926ej-s
KERNEL_PATCHVER:=5.4
KERNEL_TESTING_PATCHVER:=5.10
KERNEL_PATCHVER:=5.10
KERNELNAME:=zImage dtbs
define Target/Description

View File

@ -1,301 +0,0 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_KCOV=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_CPU_AUTO=y
# CONFIG_ARCH_MULTI_V4 is not set
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
CONFIG_ARCH_MULTI_V5=y
CONFIG_ARCH_MXS=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_SP805_WATCHDOG is not set
CONFIG_ARM_THUMB=y
CONFIG_ATAGS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_COMMON_CLK=y
CONFIG_COREDUMP=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
CONFIG_CPU_ARM926T=y
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_PM=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRC16=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEV_MXS_DCP=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
# CONFIG_DEBUG_USER is not set
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DTC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXT4_FS=y
CONFIG_EXTCON=y
CONFIG_FEC=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FRAME_POINTER=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_GIANFAR is not set
CONFIG_GLOB=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_MXS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_EBPF_JIT=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HZ_FIXED=0
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_ALGOPCA=y
CONFIG_I2C_ALGOPCF=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_MXS=y
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_KFIFO_BUF=y
CONFIG_IIO_SYSFS_TRIGGER=y
CONFIG_IIO_TRIGGER=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MXS=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_CORE=y
CONFIG_MFD_MXS_LRADC=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_MXS=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MTD_PHYSMAP_OF is not set
CONFIG_MXS_DMA=y
# CONFIG_MXS_LRADC_ADC is not set
CONFIG_MXS_TIMER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NLS=y
CONFIG_NO_BOOTMEM=y
CONFIG_NVMEM=y
CONFIG_NVMEM_MXS_OCOTP=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX23=y
CONFIG_PINCTRL_IMX28=y
CONFIG_PINCTRL_MXS=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
# CONFIG_PM_DEBUG is not set
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_RATIONAL=y
CONFIG_REFCOUNT_FULL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_STMP=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_MXS_AUART=y
CONFIG_SERIAL_MXS_AUART_CONSOLE=y
CONFIG_SMSC_PHY=y
CONFIG_SOC_BUS=y
CONFIG_SOC_IMX23=y
CONFIG_SOC_IMX28=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MXS=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SRCU=y
CONFIG_STMP3XXX_RTC_WATCHDOG=y
CONFIG_STMP_DEVICE=y
CONFIG_SWPHY=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_USB=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_CHIPIDEA_OF=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_GADGET=y
CONFIG_USB_MXS_PHY=y
CONFIG_USB_OTG=y
CONFIG_USB_PHY=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ULPI_BUS=y
CONFIG_USE_OF=y
# CONFIG_VFP is not set
CONFIG_WATCHDOG_CORE=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0

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@ -1,54 +0,0 @@
From e4fdac5def509ffb723b49d6a91f9043009119f9 Mon Sep 17 00:00:00 2001
From: Michael Heimpold <mhei@heimpold.de>
Date: Sun, 8 Mar 2020 23:21:44 +0100
Subject: [PATCH] ARM: dts: imx23: introduce mmc0_sck_cfg
The Olimex Olinuxino board has a user led connected to SSP1_DETECT.
But since this pin is listed in mmc0_pins_fixup, it is already claimed
by MMC driver and this results in this error during boot:
[ 1.390000] imx23-pinctrl 80018000.pinctrl: pin SSP1_DETECT already
requested by 80010000.spi; cannot claim for leds
[ 1.400000] imx23-pinctrl 80018000.pinctrl: pin-65 (leds) status -22
[ 1.410000] imx23-pinctrl 80018000.pinctrl: could not request pin 65
(SSP1_DETECT) from group led_gpio2_1.0 on device 80018000.pinctrl
[ 1.420000] leds-gpio leds: Error applying setting, reverse things back
[ 1.430000] leds-gpio: probe of leds failed with error -22
This fix it, introduce mmc0_sck_cfg and switch the Olinuxino board to it.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
---
arch/arm/boot/dts/imx23-olinuxino.dts | 2 +-
arch/arm/boot/dts/imx23.dtsi | 8 ++++++++
2 files changed, 9 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -23,7 +23,7 @@
ssp0: spi@80010000 {
compatible = "fsl,imx23-mmc";
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>;
+ pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_sck_cfg>;
bus-width = <4>;
broken-cd;
status = "okay";
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -267,6 +267,14 @@
fsl,pull-up = <MXS_PULL_DISABLE>;
};
+ mmc0_sck_cfg: mmc0-sck-cfg@0 {
+ reg = <0>;
+ fsl,pinmux-ids = <
+ MX23_PAD_SSP1_SCK__SSP1_SCK
+ >;
+ fsl,pull-up = <MXS_PULL_DISABLE>;
+ };
+
mmc1_4bit_pins_a: mmc1-4bit@0 {
reg = <0>;
fsl,pinmux-ids = <

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@ -0,0 +1,160 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Tue, 16 Nov 2021 10:39:51 +0100
Subject: [PATCH] Revert "Cleanup range of address calculations."
This reverts commit 47923622c663ffad8b14aa93706183290d4f6791.
This commit is causing issues with offset of struct members.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103255
---
delete mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr78655.c
--- a/gcc/gimple-range.cc
+++ b/gcc/gimple-range.cc
@@ -431,9 +431,8 @@ gimple_ranger::range_of_range_op (irange
m_cache.register_dependency (lhs, op2);
}
- if (gimple_code (s) == GIMPLE_ASSIGN
- && gimple_assign_rhs_code (s) == ADDR_EXPR)
- return range_of_address (r, s);
+ if (range_of_non_trivial_assignment (r, s))
+ return true;
if (range_of_expr (range1, op1, s))
{
@@ -447,84 +446,48 @@ gimple_ranger::range_of_range_op (irange
return true;
}
-// Calculate the range of an assignment containing an ADDR_EXPR.
+// Calculate the range of a non-trivial assignment. That is, is one
+// inolving arithmetic on an SSA name (for example, an ADDR_EXPR).
// Return the range in R.
-// If a range cannot be calculated, set it to VARYING and return true.
+//
+// If a range cannot be calculated, return false.
bool
-gimple_ranger::range_of_address (irange &r, gimple *stmt)
+gimple_ranger::range_of_non_trivial_assignment (irange &r, gimple *stmt)
{
- gcc_checking_assert (gimple_code (stmt) == GIMPLE_ASSIGN);
- gcc_checking_assert (gimple_assign_rhs_code (stmt) == ADDR_EXPR);
+ if (gimple_code (stmt) != GIMPLE_ASSIGN)
+ return false;
- bool strict_overflow_p;
- tree expr = gimple_assign_rhs1 (stmt);
- poly_int64 bitsize, bitpos;
- tree offset;
- machine_mode mode;
- int unsignedp, reversep, volatilep;
- tree base = get_inner_reference (TREE_OPERAND (expr, 0), &bitsize,
- &bitpos, &offset, &mode, &unsignedp,
- &reversep, &volatilep);
-
-
- if (base != NULL_TREE
- && TREE_CODE (base) == MEM_REF
- && TREE_CODE (TREE_OPERAND (base, 0)) == SSA_NAME)
+ tree base = gimple_range_base_of_assignment (stmt);
+ if (base)
{
- tree ssa = TREE_OPERAND (base, 0);
- gcc_checking_assert (irange::supports_type_p (TREE_TYPE (ssa)));
- range_of_expr (r, ssa, stmt);
- range_cast (r, TREE_TYPE (gimple_assign_rhs1 (stmt)));
-
- poly_offset_int off = 0;
- bool off_cst = false;
- if (offset == NULL_TREE || TREE_CODE (offset) == INTEGER_CST)
+ if (TREE_CODE (base) == MEM_REF)
{
- off = mem_ref_offset (base);
- if (offset)
- off += poly_offset_int::from (wi::to_poly_wide (offset),
- SIGNED);
- off <<= LOG2_BITS_PER_UNIT;
- off += bitpos;
- off_cst = true;
+ if (TREE_CODE (TREE_OPERAND (base, 0)) == SSA_NAME)
+ {
+ int_range_max range1;
+ tree ssa = TREE_OPERAND (base, 0);
+ if (range_of_expr (range1, ssa, stmt))
+ {
+ tree type = TREE_TYPE (ssa);
+ range_operator *op = range_op_handler (POINTER_PLUS_EXPR,
+ type);
+ int_range<2> offset (TREE_OPERAND (base, 1),
+ TREE_OPERAND (base, 1));
+ op->fold_range (r, type, range1, offset);
+ return true;
+ }
+ }
+ return false;
}
- /* If &X->a is equal to X, the range of X is the result. */
- if (off_cst && known_eq (off, 0))
- return true;
- else if (flag_delete_null_pointer_checks
- && !TYPE_OVERFLOW_WRAPS (TREE_TYPE (expr)))
- {
- /* For -fdelete-null-pointer-checks -fno-wrapv-pointer we don't
- allow going from non-NULL pointer to NULL. */
- if(!range_includes_zero_p (&r))
- return true;
- }
- /* If MEM_REF has a "positive" offset, consider it non-NULL
- always, for -fdelete-null-pointer-checks also "negative"
- ones. Punt for unknown offsets (e.g. variable ones). */
- if (!TYPE_OVERFLOW_WRAPS (TREE_TYPE (expr))
- && off_cst
- && known_ne (off, 0)
- && (flag_delete_null_pointer_checks || known_gt (off, 0)))
+ if (gimple_assign_rhs_code (stmt) == ADDR_EXPR)
{
+ // Handle "= &a" and return non-zero.
r = range_nonzero (TREE_TYPE (gimple_assign_rhs1 (stmt)));
return true;
}
- r = int_range<2> (TREE_TYPE (gimple_assign_rhs1 (stmt)));
- return true;
- }
-
- // Handle "= &a".
- if (tree_single_nonzero_warnv_p (expr, &strict_overflow_p))
- {
- r = range_nonzero (TREE_TYPE (gimple_assign_rhs1 (stmt)));
- return true;
}
-
- // Otherwise return varying.
- r = int_range<2> (TREE_TYPE (gimple_assign_rhs1 (stmt)));
- return true;
+ return false;
}
// Calculate a range for phi statement S and return it in R.
--- a/gcc/gimple-range.h
+++ b/gcc/gimple-range.h
@@ -62,7 +62,7 @@ protected:
ranger_cache m_cache;
private:
bool range_of_phi (irange &r, gphi *phi);
- bool range_of_address (irange &r, gimple *s);
+ bool range_of_non_trivial_assignment (irange &r, gimple *s);
bool range_of_builtin_call (irange &r, gcall *call);
bool range_with_loop_info (irange &r, tree name);
void range_of_ssa_name_with_loop_info (irange &, tree, class loop *,
--- a/gcc/range-op.cc
+++ b/gcc/range-op.cc
@@ -3447,7 +3447,6 @@ pointer_table::pointer_table ()
set (GT_EXPR, op_gt);
set (GE_EXPR, op_ge);
set (SSA_NAME, op_identity);
- set (INTEGER_CST, op_integer_cst);
set (ADDR_EXPR, op_addr);
set (NOP_EXPR, op_convert);
set (CONVERT_EXPR, op_convert);