Merge Official Source

This commit is contained in:
AmadeusGhost 2020-08-13 11:35:21 +08:00
commit bca020e005
89 changed files with 1904 additions and 1531 deletions

View File

@ -69,7 +69,7 @@ define prepare_rootfs
@( \
cd $(1); \
for script in ./usr/lib/opkg/info/*.postinst; do \
IPKG_INSTROOT=$(1) $$(which bash) $$script; \
IPKG_INSTROOT=$(1) $$(command -v bash) $$script; \
ret=$$?; \
if [ $$ret -ne 0 ]; then \
echo "postinst script $$script has failed with exit code $$ret" >&2; \
@ -79,10 +79,10 @@ define prepare_rootfs
for script in ./etc/init.d/*; do \
grep '#!/bin/sh /etc/rc.common' $$script >/dev/null || continue; \
if ! echo " $(3) " | grep -q " $$(basename $$script) "; then \
IPKG_INSTROOT=$(1) $$(which bash) ./etc/rc.common $$script enable; \
IPKG_INSTROOT=$(1) $$(command -v bash) ./etc/rc.common $$script enable; \
echo "Enabling" $$(basename $$script); \
else \
IPKG_INSTROOT=$(1) $$(which bash) ./etc/rc.common $$script disable; \
IPKG_INSTROOT=$(1) $$(command -v bash) ./etc/rc.common $$script disable; \
echo "Disabling" $$(basename $$script); \
fi; \
done || true \

View File

@ -260,7 +260,7 @@ package/symlinks-clean:
./scripts/feeds uninstall -a
help:
cat README
cat README.md
distclean: cacheclean
rm -rf bin build_dir .config* dl feeds key-build* logs package/feeds package/openwrt-packages staging_dir tmp

View File

@ -12,7 +12,7 @@ include $(INCLUDE_DIR)/version.mk
include $(INCLUDE_DIR)/feeds.mk
PKG_NAME:=base-files
PKG_RELEASE:=226
PKG_RELEASE:=227
PKG_FLAGS:=nonshared
PKG_FILE_DEPENDS:=$(PLATFORM_DIR)/ $(GENERIC_PLATFORM_DIR)/base-files/

View File

@ -45,7 +45,7 @@ switch_to_ramfs() {
snapshot snapshot_tool \
$RAMFS_COPY_BIN
do
local file="$(which "$binary" 2>/dev/null)"
local file="$(command -v "$binary" 2>/dev/null)"
[ -n "$file" ] && install_bin "$file"
done
install_file /etc/resolv.conf /lib/*.sh /lib/functions/*.sh /lib/upgrade/*.sh /lib/upgrade/do_stage2 /usr/share/libubox/jshn.sh $RAMFS_COPY_DATA

View File

@ -1,6 +1,6 @@
From eca387ea507bde160558a0e5301bf2e0f1985b3b Mon Sep 17 00:00:00 2001
From e05fdd93645dab2217bb5bfabcc04845415cf7ed Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw2@infradead.org>
Date: Fri, 19 Jun 2020 11:34:32 +0100
Date: Fri, 19 Jun 2020 12:40:20 +0100
Subject: [PATCH] pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
The pins for the MMC controller weren't being set up correctly because the
@ -8,6 +8,7 @@ pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
handle the special cases with PUPD/R0/R1 control.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
---
drivers/pinctrl/mediatek/pinctrl-mt7623.c | 129 ++++++++++++++++++
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 19 ++-
@ -162,7 +163,7 @@ index d58d840e08..0f5dcb2c63 100644
static const struct mtk_pin_desc mt7623_pins[] = {
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index 5fdc150295..f5199fc574 100644
index e8187a3780..6553dde45c 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -296,7 +296,7 @@ static const struct pinconf_param mtk_conf_params[] = {

View File

@ -1,22 +1,28 @@
From fb2810b2c7209d4ed690e48e5bffa52d1af2eda3 Mon Sep 17 00:00:00 2001
From 6731bef6966ea2b26cdcfe0109ff5a950003fd03 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw2@infradead.org>
Date: Fri, 19 Jun 2020 22:57:04 +0100
Date: Fri, 19 Jun 2020 23:07:17 +0100
Subject: [PATCH] env/fat.c: allow loading from a FAT partition on the MMC boot
device
I don't want to have to specify the device; only the partition.
This allows me to use the same image on internal eMMC or SD card for
Banana Pi R2, and it finds its own environment either way.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[trini: Add #if/#else/#endif logic around CONFIG_SYS_MMC_ENV_DEV usage,
whitespace changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
env/Kconfig | 4 ++++
env/fat.c | 31 +++++++++++++++++++++++++++++--
2 files changed, 33 insertions(+), 2 deletions(-)
env/fat.c | 32 ++++++++++++++++++++++++++++++--
2 files changed, 34 insertions(+), 2 deletions(-)
diff --git a/env/Kconfig b/env/Kconfig
index 0d6f559b39..a2020a8661 100644
index 38e7fadbb9..5784136674 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -432,6 +432,10 @@ config ENV_FAT_DEVICE_AND_PART
@@ -434,6 +434,10 @@ config ENV_FAT_DEVICE_AND_PART
If none, first valid partition in device D. If no
partition table then means device D.
@ -28,17 +34,21 @@ index 0d6f559b39..a2020a8661 100644
string "Name of the FAT file to use for the environment"
depends on ENV_IS_IN_FAT
diff --git a/env/fat.c b/env/fat.c
index 1836556f36..1c32d17bd5 100644
index 35a1955e63..63aced9317 100644
--- a/env/fat.c
+++ b/env/fat.c
@@ -31,6 +31,33 @@
@@ -29,6 +29,36 @@
# endif
#endif
+#if defined(CMD_SAVEENV) || defined(CMD_LOADENV)
+__weak int mmc_get_env_dev(void)
+{
+ return CONFIG_SYS_MMC_ENV_DEV;
+#ifdef CONFIG_SYS_MMC_ENV_DEV
+ return CONFIG_SYS_MMC_ENV_DEV;
+#else
+ return 0;
+#endif
+}
+
+static char *env_fat_device_and_part(void)
@ -48,8 +58,7 @@ index 1836556f36..1c32d17bd5 100644
+
+ if (!part_str) {
+ part_str = CONFIG_ENV_FAT_DEVICE_AND_PART;
+ if (!strcmp(CONFIG_ENV_FAT_INTERFACE, "mmc")
+ && part_str[0] == ':') {
+ if (!strcmp(CONFIG_ENV_FAT_INTERFACE, "mmc") && part_str[0] == ':') {
+ part_str = "0" CONFIG_ENV_FAT_DEVICE_AND_PART;
+ part_str[0] += mmc_get_env_dev();
+ }
@ -65,7 +74,7 @@ index 1836556f36..1c32d17bd5 100644
#ifdef CMD_SAVEENV
static int env_fat_save(void)
{
@@ -46,7 +73,7 @@ static int env_fat_save(void)
@@ -43,7 +71,7 @@ static int env_fat_save(void)
return err;
part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
@ -74,7 +83,7 @@ index 1836556f36..1c32d17bd5 100644
&dev_desc, &info, 1);
if (part < 0)
return 1;
@@ -93,7 +120,7 @@ static int env_fat_load(void)
@@ -89,7 +117,7 @@ static int env_fat_load(void)
#endif
part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,

View File

@ -1,6 +1,6 @@
From b0d1b85fb25a28a9532eaa9dda064b40a0e25f25 Mon Sep 17 00:00:00 2001
From e3cc511eef5d99491e0c51324be499b688dde8de Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw2@infradead.org>
Date: Sun, 12 Jul 2020 23:19:09 +0100
Date: Sun, 12 Jul 2020 23:33:01 +0100
Subject: [PATCH 1/3] board: mediatek: fix mmc_get_boot_dev() for platforms
without external SD

View File

@ -1,6 +1,6 @@
From d13abe5b2c5b85228bdd34584fcbd642f1883668 Mon Sep 17 00:00:00 2001
From 3fad1ca28d4c87346d18b89438bf2084fb2c3896 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw2@infradead.org>
Date: Sun, 12 Jul 2020 23:23:05 +0100
Date: Sun, 12 Jul 2020 23:33:03 +0100
Subject: [PATCH 3/3] board: mediatek: Add support for UniElec U7623 board
This is an MT7623A-based board, very similar to the Banana Pi R2.
@ -11,16 +11,17 @@ Signed-off-by: David Woodhouse <dwmw2@infradead.org>
---
arch/arm/dts/Makefile | 1 +
.../arm/dts/mt7623a-unielec-u7623-02-emmc.dts | 211 ++++++++++++++++++
board/mediatek/mt7623/MAINTAINERS | 7 +
configs/mt7623a_unielec_u7623_02_defconfig | 54 +++++
3 files changed, 266 insertions(+)
4 files changed, 273 insertions(+)
create mode 100644 arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
create mode 100644 configs/mt7623a_unielec_u7623_02_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 89fa448818..a140b1c8d4 100644
index a3a1e3fbe4..caa7756c5d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -938,6 +938,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
@@ -949,6 +949,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7622-rfb.dtb \
@ -245,6 +246,21 @@ index 0000000000..fdeec75b05
+ pinctrl-0 = <&uart2_pins_b>;
+ status = "okay";
+};
diff --git a/board/mediatek/mt7623/MAINTAINERS b/board/mediatek/mt7623/MAINTAINERS
index eeb0375d70..1a8d796bd3 100644
--- a/board/mediatek/mt7623/MAINTAINERS
+++ b/board/mediatek/mt7623/MAINTAINERS
@@ -5,3 +5,10 @@ S: Maintained
F: board/mediatek/mt7623
F: include/configs/mt7623.h
F: configs/mt7623n_bpir2_defconfig
+
+UNIELEC U7623
+M: Ryder Lee <ryder.lee@mediatek.com>
+M: David Woodhouse <dwmw2@infradead.org>
+S: Maintained
+F: arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
+F: configs/mt7623a_unielec_u7623_02_defconfig
diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
new file mode 100644
index 0000000000..72b5f31092

View File

@ -1,8 +1,8 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ath10k-ct-firmware
PKG_VERSION:=2020-04-24
PKG_RELEASE:=2
PKG_VERSION:=2020-07-02
PKG_RELEASE:=1
include $(INCLUDE_DIR)/package.mk
@ -95,14 +95,14 @@ define Download/ct-firmware-htt
URL_FILE:=$($(1)_FIRMWARE_FILE_CT_HTT)
endef
QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-22.bin.lede.018
QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-22.bin.lede.019
define Download/ath10k-firmware-qca988x-ct
$(call Download/ct-firmware,QCA988X,)
HASH:=8b4c99253aa309d35f2e060c190091b8db1b84dbda06a6a15c83ac0f9a938126
endef
$(eval $(call Download,ath10k-firmware-qca988x-ct))
QCA988X_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community-22.bin.lede.018
QCA988X_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community-22.bin.lede.019
define Download/ath10k-firmware-qca988x-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA988X,)
HASH:=a7168916d6aa5e4d7858f8b620c0c980c76d03f390929db6f4077685ce2051e7
@ -110,14 +110,14 @@ endef
$(eval $(call Download,ath10k-firmware-qca988x-ct-full-htt))
QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-22.bin.lede.018
QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-22.bin.lede.019
define Download/ath10k-firmware-qca9887-ct
$(call Download/ct-firmware,QCA9887,ath10k-9887)
HASH:=459692deb186a63ab8eeddb7ad5d54779266e68ca686e7c46062554db6dca12b
endef
$(eval $(call Download,ath10k-firmware-qca9887-ct))
QCA9887_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community-22.bin.lede.018
QCA9887_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community-22.bin.lede.019
define Download/ath10k-firmware-qca9887-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA9887,ath10k-9887)
HASH:=fd126a457d0927d0c8ea10d66ef5b67d5e1e0741f8692bb3016bb602d0af3098
@ -125,90 +125,90 @@ endef
$(eval $(call Download,ath10k-firmware-qca9887-ct-full-htt))
QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.018
QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.019
define Download/ath10k-firmware-qca99x0-ct
$(call Download/ct-firmware,QCA99X0,ath10k-10-4b)
HASH:=cf26eb37524de54af51fe9b2efffc85e0e70ab849e8607ef63ce5a8ecffeaa42
HASH:=7dc934f934bc4973c9273a4f22cfead8e26ec6f579647af31b718a860eca0a4b
endef
$(eval $(call Download,ath10k-firmware-qca99x0-ct))
QCA99X0_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.018
QCA99X0_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca99x0-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA99X0,ath10k-10-4b)
HASH:=e9737538d7379e13ad4e4c8c519a63659b5e34a35455ed9ac4399ae8097caabc
HASH:=71a27b245a382fe009938d2826d5c97a90dceb10ddf638325268df91837ea302
endef
$(eval $(call Download,ath10k-firmware-qca99x0-ct-full-htt))
QCA99X0_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.018
QCA99X0_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca99x0-ct-htt
$(call Download/ct-firmware-htt,QCA99X0,ath10k-10-4b)
HASH:=4d4f74afca487d452f244cd48304cf9710d8941eb97a6346a949ed6b6877d657
HASH:=9ed4fe41e5b0f30172f71ae0fe382dc0aab8aa4f8a898417af4f7ee936575ef6
endef
$(eval $(call Download,ath10k-firmware-qca99x0-ct-htt))
QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.018
QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.019
define Download/ath10k-firmware-qca9984-ct
$(call Download/ct-firmware,QCA9984,ath10k-9984-10-4b)
HASH:=a6b3d66efe640a430a837f238e91eddcd423eed6b887d3ae19716d87a71fd0b1
HASH:=32d13f432691fe759ded7d027052e925233adb436cd8f729f85ec3d19ccd1dfd
endef
$(eval $(call Download,ath10k-firmware-qca9984-ct))
QCA9984_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.018
QCA9984_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca9984-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA9984,ath10k-9984-10-4b)
HASH:=96060227e372b3b210badccbe6b0bd75d9a35335a7a0f2966964e9e89f66b00f
HASH:=e8ab69777bd00b5fc6b1b7acccb55b903553a99932a5b0351602b5f690106588
endef
$(eval $(call Download,ath10k-firmware-qca9984-ct-full-htt))
QCA9984_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.018
QCA9984_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca9984-ct-htt
$(call Download/ct-firmware-htt,QCA9984,ath10k-9984-10-4b)
HASH:=ee593fb5724d75c372de02ac7894e1630ee9f909fcb2e2bbf17aadef67cb9d43
HASH:=74449b303b626e0713b3fd4f2d6103d65859403b2dd7bdd8882aa772b69b59c7
endef
$(eval $(call Download,ath10k-firmware-qca9984-ct-htt))
QCA4019_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.018
QCA4019_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.019
define Download/ath10k-firmware-qca4019-ct
$(call Download/ct-firmware,QCA4019,ath10k-4019-10-4b)
HASH:=46d8f8f1e780813299dc8780eedcfceda103c6b4d8908589ad1adbef921714c0
HASH:=4b89763087c7ed9b56046c4e621b7f045e452436d8d9b430a5d171179e313592
endef
$(eval $(call Download,ath10k-firmware-qca4019-ct))
QCA4019_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.018
QCA4019_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca4019-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA4019,ath10k-4019-10-4b)
HASH:=d884624fc34f4b5de7a3ec0534627c46cea25fca45657f3a2f6bb85f6c5893d7
HASH:=fba591e5777c53b82542ba16cae69d9bb4684837f2fa4cee1b9b26f648096748
endef
$(eval $(call Download,ath10k-firmware-qca4019-ct-full-htt))
QCA4019_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.018
QCA4019_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca4019-ct-htt
$(call Download/ct-firmware-htt,QCA4019,ath10k-4019-10-4b)
HASH:=51fe06f66365771647d16039cca8b541de3d642c45271977a4cfd433c2c5d45b
HASH:=0d534c3c424184b8ec2773f15c8933bdab0d39b6f664d2578c6602b0eb7035d1
endef
$(eval $(call Download,ath10k-firmware-qca4019-ct-htt))
QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.018
QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.019
define Download/ath10k-firmware-qca9888-ct
$(call Download/ct-firmware,QCA9888,ath10k-9888-10-4b)
HASH:=d01f1429aaf0bfac07eee3547e5821d19136840b2f983e75e76979a5ac19b6f0
HASH:=048f4300725e6ebbf94a6bf4f3f4e4592c446fcdbe1d801aaac024b15e89e0c9
endef
$(eval $(call Download,ath10k-firmware-qca9888-ct))
QCA9888_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.018
QCA9888_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca9888-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA9888,ath10k-9888-10-4b)
HASH:=68c42f8e0dcf77f18d4813ac93174bf06ff5cf5aa4f69befe7f35f9fae1de1e3
HASH:=d2a7e9fea6bd854721b3fc03a3a00d379d303b2bce339377ee87a1c14a60312d
endef
$(eval $(call Download,ath10k-firmware-qca9888-ct-full-htt))
QCA9888_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.018
QCA9888_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.019
define Download/ath10k-firmware-qca9888-ct-htt
$(call Download/ct-firmware-htt,QCA9888,ath10k-9888-10-4b)
HASH:=6c692141155f5bb74c0117553d5d48ff2aaba73bd4d5e90a5044a5e2ec0faab0
HASH:=e52a6db33347c641ee791fd9a3a57a2503cdda1adc6b8d943e336431528b9d2a
endef
$(eval $(call Download,ath10k-firmware-qca9888-ct-htt))

View File

@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=broadcom-wl
PKG_VERSION:=5.10.56.27.3
PKG_RELEASE:=9
PKG_RELEASE:=10
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)_$(ARCH).tar.bz2
PKG_SOURCE_URL:=http://downloads.openwrt.org/sources

View File

@ -223,7 +223,7 @@ enable_broadcom() {
}
local _c=0
local nas="$(which nas)"
local nas="$(command -v nas)"
local if_pre_up if_up nas_cmd
local vif vif_pre_up vif_post_up vif_do_up vif_txpower
local bssmax=$(wlc ifname "$device" bssmax)

View File

@ -70,24 +70,6 @@ endef
$(eval $(call KernelPackage,usb-phy-nop))
define KernelPackage/usb-phy-qcom-dwc3
TITLE:=DWC3 USB QCOM PHY driver
DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x)
KCONFIG:= CONFIG_PHY_QCOM_DWC3
FILES:= \
$(LINUX_DIR)/drivers/phy/qualcomm/phy-qcom-dwc3.ko
AUTOLOAD:=$(call AutoLoad,45,phy-qcom-dwc3,1)
$(call AddDepends/usb)
endef
define KernelPackage/usb-phy-qcom-dwc3/description
This driver provides support for the integrated DesignWare
USB3 IP Core within the QCOM SoCs.
endef
$(eval $(call KernelPackage,usb-phy-qcom-dwc3))
define KernelPackage/phy-ath79-usb
TITLE:=Support for ATH79 USB PHY
KCONFIG:=CONFIG_PHY_AR7100_USB \

View File

@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
PKG_SOURCE_URL:=https://github.com/openwrt/mt76
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2020-07-22
PKG_SOURCE_VERSION:=b5df0fbb1847a51f0a11f03a3fa8dc9d98d4df82
PKG_MIRROR_HASH:=70aca7f8912b89af975c7b63fdf25d41be831c434e0c991fcbdaa60127d4acd5
PKG_SOURCE_DATE:=2020-08-12
PKG_SOURCE_VERSION:=27670514328f9ec4e64b57ea7cb54d8594dcefa0
PKG_MIRROR_HASH:=88c1af5529e49dd92ce5b8e992a84f33a8e768ee514df7a7eb31a595070551ae
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_BUILD_PARALLEL:=1

View File

@ -9,29 +9,24 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=json-c
PKG_VERSION:=0.14
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-nodoc.tar.gz
PKG_SOURCE_URL:=https://s3.amazonaws.com/json-c_releases/releases/
PKG_HASH:=99914e644a25201d82ccefa20430f7515c110923360f9ef46755527c02412afa
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=MIT
PKG_LICENSE_FILES:=COPYING
PKG_CPE_ID:=cpe:/a:json-c_project:json-c
CMAKE_INSTALL:=1
CMAKE_OPTIONS += -DCMAKE_INSTALL_INCLUDEDIR=$(STAGING_DIR)/usr/include
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_BUILD_PARALLEL:=1
HOST_BUILD_PREFIX:=$(STAGING_DIR_HOST)
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/host-build.mk
include $(INCLUDE_DIR)/cmake.mk
TARGET_CFLAGS += $(FPIC) -Wno-implicit-fallthrough
HOST_CFLAGS += -Wno-implicit-fallthrough
HOST_BUILD_PREFIX:=$(STAGING_DIR_HOST)
define Package/libjson-c
SECTION:=libs
CATEGORY:=Libraries
@ -44,6 +39,12 @@ define Package/libjson-c/description
This package contains a library for javascript object notation backends.
endef
define Build/InstallDev
$(call Build/InstallDev/cmake,$(1))
$(SED) 's,/usr/include,$$$${prefix}/include,g' $(1)/usr/lib/pkgconfig/json-c.pc
$(SED) 's,/usr/lib,$$$${exec_prefix}/lib,g' $(1)/usr/lib/pkgconfig/json-c.pc
endef
define Package/libjson-c/install
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib/libjson-c.so.* $(1)/usr/lib/

View File

@ -53,9 +53,9 @@ define Package/dropbear
CATEGORY:=Base system
TITLE:=Small SSH2 client/server
DEPENDS:= +DROPBEAR_ZLIB:zlib
ALTERNATIVES:=\
100:/usr/bin/ssh:/usr/sbin/dropbear \
100:/usr/bin/scp:/usr/sbin/dropbear \
ALTERNATIVES:=100:/usr/bin/scp:/usr/sbin/dropbear
$(if $(CONFIG_DROPBEAR_DBCLIENT),ALTERNATIVES+= \
100:/usr/bin/ssh:/usr/sbin/dropbear,)
endef

View File

@ -13,9 +13,9 @@ PKG_RELEASE:=5
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/paulusmack/ppp
PKG_SOURCE_DATE:=2020-05-25
PKG_SOURCE_VERSION:=ddd57c279f467e18c4fb3a661f21a069a5a37a1f
PKG_MIRROR_HASH:=aac65e65dd25eaf8978a7a0b3258c863d90e29e247dd33d95276c0c189bcd424
PKG_SOURCE_DATE:=2020-08-07
PKG_SOURCE_VERSION:=045169401601639b9163e1df00f868a0a49131ce
PKG_MIRROR_HASH:=0ceb3e649d191c1fe225be580135aa181d9d3ba3689503691c4c9469ddac64a3
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=BSD-4-Clause
PKG_CPE_ID:=cpe:/a:samba:ppp

View File

@ -150,7 +150,7 @@
} else {
--- a/pppd/ipv6cp.c
+++ b/pppd/ipv6cp.c
@@ -1252,7 +1252,7 @@ ipv6cp_up(f)
@@ -1258,7 +1258,7 @@ ipv6cp_up(f)
if (sif6defaultroute(f->unit, go->ourid, ho->hisid))
default_route_set[f->unit] = 1;
}

View File

@ -137,7 +137,7 @@ Signed-off-by: Jo-Philipp Wich <jo@mein.io>
.B disconnect \fIscript
Execute the command specified by \fIscript\fR, by passing it to a
shell, after
@@ -751,7 +756,12 @@ disable both forms of hardware flow cont
@@ -756,7 +761,12 @@ disable both forms of hardware flow cont
.TP
.B nodefaultroute
Disable the \fIdefaultroute\fR option. The system administrator who

View File

@ -48,7 +48,7 @@ Signed-off-by: Jo-Philipp Wich <jo@mein.io>
"Enable multilink operation", OPT_PRIO | 1 },
--- a/pppd/ipv6cp.c
+++ b/pppd/ipv6cp.c
@@ -1294,7 +1294,7 @@ ipv6cp_up(f)
@@ -1300,7 +1300,7 @@ ipv6cp_up(f)
*/
if (ipv6cp_script_state == s_down && ipv6cp_script_pid == 0) {
ipv6cp_script_state = s_up;
@ -57,7 +57,7 @@ Signed-off-by: Jo-Philipp Wich <jo@mein.io>
}
}
@@ -1346,7 +1346,7 @@ ipv6cp_down(f)
@@ -1352,7 +1352,7 @@ ipv6cp_down(f)
/* Execute the ipv6-down script */
if (ipv6cp_script_state == s_up && ipv6cp_script_pid == 0) {
ipv6cp_script_state = s_down;
@ -66,7 +66,7 @@ Signed-off-by: Jo-Philipp Wich <jo@mein.io>
}
}
@@ -1389,13 +1389,13 @@ ipv6cp_script_done(arg)
@@ -1395,13 +1395,13 @@ ipv6cp_script_done(arg)
case s_up:
if (ipv6cp_fsm[0].state != OPENED) {
ipv6cp_script_state = s_down;

View File

@ -1473,7 +1473,7 @@ Signed-off-by: Jo-Philipp Wich <jo@mein.io>
--- a/pppd/chap_ms.c
+++ b/pppd/chap_ms.c
@@ -962,13 +962,17 @@ set_mppe_enc_types(int policy, int types
@@ -964,13 +964,17 @@ set_mppe_enc_types(int policy, int types
/*
* Disable undesirable encryption types. Note that we don't ENABLE
* any encryption types, to avoid overriding manual configuration.

View File

@ -8,7 +8,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=zram-swap
PKG_RELEASE:=5
PKG_RELEASE:=6
PKG_BUILD_DIR := $(BUILD_DIR)/$(PKG_NAME)

View File

@ -35,17 +35,17 @@ zram_applicable()
return 1
}
which mkswap >/dev/null || {
command -v mkswap >/dev/null || {
logger -s -t zram_applicable -p daemon.err "[ERROR] 'mkswap' not installed"
return 1
}
which swapon >/dev/null || {
command -v swapon >/dev/null || {
logger -s -t zram_applicable -p daemon.err "[ERROR] 'swapon' not installed"
return 1
}
which swapoff >/dev/null || {
command -v swapoff >/dev/null || {
logger -s -t zram_applicable -p daemon.err "[ERROR] 'swapoff' not installed"
return 1
}

View File

@ -1,13 +0,0 @@
--- a/scripts/kconfig/mconf.c
+++ b/scripts/kconfig/mconf.c
@@ -31,6 +31,10 @@
#define SIGWINCH 28
#endif
+#ifndef SIGWINCH
+#define SIGWINCH 28
+#endif
+
#define LKC_DIRECT_LINK
#include "lkc.h"

View File

@ -10,10 +10,10 @@
set -e
version=1.0
FIND="$(which find)"
FIND="${FIND:-$(which gfind)}"
TAR="${TAR:-$(which tar)}"
GZIP="$(which gzip)"
FIND="$(command -v find)"
FIND="${FIND:-$(command -v gfind)}"
TAR="${TAR:-$(command -v tar)}"
GZIP="$(command -v gzip)"
# try to use fixed source epoch
if [ -n "$SOURCE_DATE_EPOCH" ]; then
@ -21,10 +21,10 @@ if [ -n "$SOURCE_DATE_EPOCH" ]; then
# look up date of last commit
elif [ -d "$TOPDIR/.git" ]; then
GIT="$(which git)"
GIT="$(command -v git)"
TIMESTAMP=$(cd $TOPDIR; $GIT log -1 -s --format=%ci)
elif [ -d "$TOPDIR/.svn" ]; then
SVN="$(which svn)"
SVN="$(command -v svn)"
TIMESTAMP=$($SVN info "$TOPDIR" | sed -n "s/^Last Changed Date: \(.*\)/\1/p")
else
TIMESTAMP=$(date)

View File

@ -0,0 +1,193 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9344.dtsi"
/ {
compatible = "mikrotik,routerboard-sxt-5n", "qca,ar9344";
model = "MikroTik SXT 5N platform";
aliases {
led-boot = &led_user;
led-failsafe = &led_user;
led-running = &led_user;
led-upgrade = &led_user;
serial0 = &uart;
};
leds {
compatible = "gpio-leds";
power {
label = "mikrotik:green:power";
gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
rssilow {
label = "mikrotik:green:rssilow";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
rssimediumlow {
label = "mikrotik:green:rssimediumlow";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
rssimedium {
label = "mikrotik:green:rssimedium";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
rssimediumhigh {
label = "mikrotik:green:rssimediumhigh";
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
rssihigh {
label = "mikrotik:green:rssihigh";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
};
led_user: user {
label = "mikrotik:green:user";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-export {
compatible = "gpio-export";
gpio_nand_power {
gpio-export,name = "sxt5n:power:nand";
gpio-export,output = <0>;
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
};
beeper {
compatible = "gpio-beeper";
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "RouterBoot";
reg = <0x0 0x20000>;
read-only;
compatible = "mikrotik,routerboot-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader1";
reg = <0x0 0x0>;
read-only;
};
hard_config: hard_config {
read-only;
};
bios {
size = <0x1000>;
read-only;
};
partition@10000 {
label = "bootloader2";
reg = <0x10000 0x0>;
read-only;
};
soft_config {
};
};
};
};
};
&nand {
status = "okay";
nand-ecc-mode = "soft";
qca,nand-swap-dma;
qca,nand-scan-fixup;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "booter";
reg = <0x0000000 0x0040000>;
read-only;
};
partition@40000 {
label = "kernel";
reg = <0x0040000 0x03c0000>;
};
partition@400000 {
label = "ubi";
reg = <0x0400000 0x7c00000>;
};
};
};
&uart {
status = "okay";
};
&eth0 {
status = "okay";
phy-handle = <&swphy0>;
gmac-config {
device = <&gmac>;
switch-phy-swap = <1>;
};
};
&eth1 {
status = "okay";
compatible = "syscon", "simple-mfd";
};
&wmac {
status = "okay";
qca,no-eeprom;
};

View File

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar9344_mikrotik_routerboard-sxt-5n.dtsi"
/ {
compatible = "mikrotik,routerboard-sxt-5nd-r2", "qca,ar9344";
model = "MikroTik RouterBOARD SXT 5nD r2 (SXT Lite5)";
};

View File

@ -93,6 +93,7 @@
status = "okay";
phy-handle = <&swphy0>;
mtd-mac-address = <&art 0x6>;
gmac-config {
@ -104,8 +105,6 @@
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x0>;
};

View File

@ -124,7 +124,9 @@
&eth0 {
status = "okay";
phy-handle = <&swphy0>;
mtd-mac-address = <&art 0x1002>;
gmac-config {
@ -134,7 +136,6 @@
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x0>;
};

View File

@ -139,12 +139,13 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x6>;
};

View File

@ -124,8 +124,10 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
@ -134,6 +136,7 @@
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};

View File

@ -115,6 +115,7 @@
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
mtd-mac-address-increment = <1>;
};

View File

@ -105,10 +105,6 @@
};
};
&eth1 {
mtd-mac-address = <&uboot 0x2e018>;
};
&eth0 {
status = "okay";
@ -117,6 +113,10 @@
mtd-mac-address = <&uboot 0x2e010>;
};
&eth1 {
mtd-mac-address = <&uboot 0x2e018>;
};
&wmac {
status = "okay";

View File

@ -136,10 +136,6 @@
phy-handle = <&swphy4>;
};
&eth1 {
status = "okay";
};
&wmac {
status = "okay";

View File

@ -150,8 +150,10 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {

View File

@ -132,8 +132,10 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
@ -143,5 +145,6 @@
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};

View File

@ -124,8 +124,9 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {

View File

@ -121,8 +121,10 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
@ -132,5 +134,6 @@
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};

View File

@ -122,9 +122,9 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {

View File

@ -146,10 +146,6 @@
};
};
&eth1 {
mtd-mac-address = <&romfile 0xf100>;
};
&eth0 {
status = "okay";
@ -159,6 +155,10 @@
mtd-mac-address-increment = <1>;
};
&eth1 {
mtd-mac-address = <&romfile 0xf100>;
};
&wmac {
status = "okay";

View File

@ -173,10 +173,6 @@
};
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&eth0 {
status = "okay";
@ -186,6 +182,10 @@
mtd-mac-address-increment = <1>;
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&wmac {
status = "okay";

View File

@ -55,21 +55,6 @@
};
};
&eth0 {
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
mtd-mac-address = <&art 0x6>;
};
&pcie0 {
status = "okay";
};
&spi {
status = "okay";
@ -115,6 +100,22 @@
status = "okay";
};
&eth0 {
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
mtd-mac-address = <&art 0x6>;
};
&pcie0 {
status = "okay";
};
&wmac {
status = "okay";

View File

@ -139,13 +139,12 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x1002>;
gmac-config {

View File

@ -0,0 +1,87 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca953x.dtsi"
/ {
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "RouterBoot";
reg = <0x0 0x20000>;
read-only;
compatible = "mikrotik,routerboot-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader1";
reg = <0x0 0x0>;
read-only;
};
hard_config: hard_config {
read-only;
};
bios {
size = <0x1000>;
read-only;
};
partition@10000 {
label = "bootloader2";
reg = <0x10000 0x0>;
read-only;
};
soft_config {
label = "soft_config";
};
};
partition@20000 {
compatible = "mikrotik,minor";
label = "firmware";
reg = <0x020000 0xfe0000>;
};
};
};
};
&uart {
status = "okay";
};
&wmac {
status = "okay";
qca,no-eeprom;
};

View File

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "qca9533_mikrotik_routerboard-lhg-hb.dtsi"
/ {
compatible = "mikrotik,routerboard-lhg-2nd", "qca,qca9533";
model = "MikroTik RouterBOARD LHG 2nD";
};

View File

@ -0,0 +1,88 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9533_mikrotik_routerboard-16m.dtsi"
/ {
compatible = "mikrotik,routerboard-lhg-hb", "qca,qca9533";
model = "MikroTik RouterBOARD LHG-HB platform";
aliases {
led-boot = &led_user;
led-failsafe = &led_user;
led-upgrade = &led_user;
led-running = &led_user;
serial0 = &uart;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_wan_pin>;
power {
label = "mikrotik:blue:power";
gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_user: user {
label = "mikrotik:green:user";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
lan {
label = "mikrotik:green:lan";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
wlan {
label = "mikrotik:green:wlan";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
rssilow {
label = "mikrotik:green:rssilow";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
};
rssimediumlow {
label = "mikrotik:green:rssimediumlow";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
rssimediumhigh {
label = "mikrotik:green:rssimediumhigh";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
/* The rssihigh LED GPIO 16 is shared with the reset button, so it remains
unregistered here to avoid conflict.
rssihigh {
label = "mikrotik:green:rssihigh";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
*/
};
};
&eth0 {
compatible = "syscon", "simple-mfd";
};
&eth1 {
status = "okay";
phy-handle = <&swphy0>;
gmac-config {
device = <&gmac>;
};
};
&pinmux {
led_wan_pin: pinmux_led_wan_pin {
pinctrl-single,bits = <0x4 0x0 0xff>;
};
};

View File

@ -21,8 +21,6 @@
};
&eth1 {
status = "okay";
mtd-mac-address = <&info 0x8>;
gmac-config {

View File

@ -109,13 +109,6 @@
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&info 0x8>;
};
&eth0 {
status = "okay";
@ -123,3 +116,10 @@
mtd-mac-address = <&info 0x8>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&info 0x8>;
};

View File

@ -140,13 +140,6 @@
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&config 0x10008>;
};
&eth0 {
status = "okay";
@ -158,3 +151,10 @@
&eth1 {
compatible = "syscon", "simple-mfd";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&config 0x10008>;
};

View File

@ -74,13 +74,6 @@
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};
&eth0 {
status = "okay";
@ -93,3 +86,10 @@
&eth1 {
compatible = "syscon", "simple-mfd";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};

View File

@ -109,10 +109,6 @@
};
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&eth0 {
status = "okay";
@ -122,6 +118,10 @@
mtd-mac-address-increment = <1>;
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&wmac {
status = "okay";

View File

@ -150,10 +150,6 @@
};
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&eth0 {
status = "okay";
@ -163,6 +159,10 @@
mtd-mac-address-increment = <1>;
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&wmac {
status = "okay";

View File

@ -79,12 +79,13 @@
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x6>;
gmac-config {

View File

@ -91,10 +91,6 @@
};
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&eth0 {
status = "okay";
@ -104,6 +100,10 @@
mtd-mac-address-increment = <1>;
};
&eth1 {
mtd-mac-address = <&uboot 0x1fc00>;
};
&wmac {
status = "okay";

View File

@ -0,0 +1,30 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "qca9558_mikrotik_routerboard-92x.dtsi"
/ {
compatible = "mikrotik,routerboard-921gs-5hpacd-15s", "qca,qca9558";
model = "MikroTik RouterBOARD 921GS-5HPacD-15s";
ath10k-leds {
compatible = "gpio-leds";
wlan5g {
label = "mikrotik:green:wlan5g";
gpios = <&ath10k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};
&pcie1 {
status = "okay";
ath10k: wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0 0 0 0 0>;
#gpio-cells = <2>;
gpio-controller;
};
};

View File

@ -1,31 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca955x.dtsi"
#include "qca9558_mikrotik_routerboard-92x.dtsi"
/ {
compatible = "mikrotik,routerboard-922uags-5hpacd", "qca,qca9558";
model = "MikroTik RouterBOARD 922UAGS-5HPacD";
aliases {
led-boot = &led_user;
led-failsafe = &led_user;
led-upgrade = &led_user;
serial0 = &uart;
};
leds {
compatible = "gpio-leds";
led_user: user {
label = "mikrotik:green:user";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};
ath10k-leds {
compatible = "gpio-leds";
@ -36,120 +17,15 @@
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-export {
compatible = "gpio-export";
gpio_usb_power {
gpio-export,name = "mikrotik:power:usb";
gpio-export,output = <0>;
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
};
gpio_nand_power {
gpio-export,name = "mikrotik:power:nand";
gpio-export,output = <0>;
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
};
};
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
pll-data = <0x8f000000 0xa0000101 0xa0001313>;
gmac-config {
device = <&gmac>;
rgmii-enabled = <1>;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "mikrotik,routerboot-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "routerboot";
reg = <0x0 0x0>;
read-only;
};
hard_config: hard_config {
read-only;
};
bios {
read-only;
};
soft_config {
};
};
};
};
&nand {
status = "okay";
nand-ecc-mode = "soft";
qca,nand-swap-dma;
qca,nand-scan-fixup;
partitions {
compatible = "fixed-partitions";
#size-cells = <1>;
partition@0 {
label = "booter";
reg = <0x0000000 0x0040000>;
read-only;
};
partition@40000 {
label = "kernel";
reg = <0x0040000 0x03c0000>;
};
partition@400000 {
label = "ubi";
reg = <0x0400000 0x7c00000>;
};
};
};
&uart {
status = "okay";
};
&pcie0 {
status = "okay";

View File

@ -0,0 +1,132 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca955x.dtsi"
/ {
aliases {
led-boot = &led_user;
led-failsafe = &led_user;
led-upgrade = &led_user;
serial0 = &uart;
};
leds {
compatible = "gpio-leds";
led_user: user {
label = "mikrotik:green:user";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-export {
compatible = "gpio-export";
gpio_nand_power {
gpio-export,name = "mikrotik:power:nand";
gpio-export,output = <0>;
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
};
};
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
pll-data = <0x8f000000 0xa0000101 0xa0001313>;
gmac-config {
device = <&gmac>;
rgmii-enabled = <1>;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "mikrotik,routerboot-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "routerboot";
reg = <0x0 0x0>;
read-only;
};
hard_config: hard_config {
read-only;
};
bios {
size = <0x1000>;
read-only;
};
soft_config {
};
};
};
};
&nand {
status = "okay";
nand-ecc-mode = "soft";
qca,nand-swap-dma;
qca,nand-scan-fixup;
partitions {
compatible = "fixed-partitions";
#size-cells = <1>;
partition@0 {
label = "booter";
reg = <0x0000000 0x0040000>;
read-only;
};
partition@40000 {
label = "kernel";
reg = <0x0040000 0x03c0000>;
};
partition@400000 {
label = "ubi";
reg = <0x0400000 0x7c00000>;
};
};
};
&uart {
status = "okay";
};

View File

@ -9,6 +9,15 @@ define Device/mikrotik_routerboard-493g
endef
TARGET_DEVICES += mikrotik_routerboard-493g
define Device/mikrotik_routerboard-921gs-5hpacd-15s
$(Device/mikrotik_nand)
SOC := qca9558
DEVICE_MODEL := RouterBOARD 921GS-5HPacD-15s (mANTBox 15s)
DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct
SUPPORTED_DEVICES += rb-921gs-5hpacd-r2
endef
TARGET_DEVICES += mikrotik_routerboard-921gs-5hpacd-15s
define Device/mikrotik_routerboard-922uags-5hpacd
$(Device/mikrotik_nand)
SOC := qca9558
@ -18,6 +27,23 @@ define Device/mikrotik_routerboard-922uags-5hpacd
endef
TARGET_DEVICES += mikrotik_routerboard-922uags-5hpacd
define Device/mikrotik_routerboard-lhg-2nd
$(Device/mikrotik_nor)
SOC := qca9533
DEVICE_MODEL := RouterBOARD LHG 2nD (LHG 2)
IMAGE_SIZE := 16256k
endef
TARGET_DEVICES += mikrotik_routerboard-lhg-2nd
define Device/mikrotik_routerboard-sxt-5nd-r2
$(Device/mikrotik_nand)
SOC := ar9344
DEVICE_MODEL := RouterBOARD SXT 5nD r2 (SXT Lite5)
DEVICE_PACKAGES += rssileds kmod-gpio-beeper
SUPPORTED_DEVICES += rb-sxt5n
endef
TARGET_DEVICES += mikrotik_routerboard-sxt-5nd-r2
define Device/mikrotik_routerboard-wap-g-5hact2hnd
$(Device/mikrotik_nor)
SOC := qca9556

View File

@ -0,0 +1,26 @@
#!/bin/sh
. /lib/functions/uci-defaults.sh
board_config_update
board=$(board_name)
boardname="${board##*,}"
case "$board" in
mikrotik,routerboard-lhg-2nd)
ucidef_set_led_netdev "lan" "lan" "mikrotik:green:lan" "eth0"
;;
mikrotik,routerboard-sxt-5nd-r2)
ucidef_set_rssimon "wlan0" "200000" "1"
ucidef_set_led_rssi "rssilow" "rssilow" "sxt5n:green:rssilow" "wlan0" "1" "100"
ucidef_set_led_rssi "rssimediumlow" "rssimediumlow" "sxt5n:green:rssimediumlow" "wlan0" "20" "100"
ucidef_set_led_rssi "rssimedium" "rssimedium" "sxt5n:green:rssimedium" "wlan0" "40" "100"
ucidef_set_led_rssi "rssimediumhigh" "rssimediumhigh" "sxt5n:green:rssimediumhigh" "wlan0" "60" "100"
ucidef_set_led_rssi "rssihigh" "rssihigh" "sxt5n:green:rssihigh" "wlan0" "80" "100"
;;
esac
board_config_flush
exit 0

View File

@ -15,7 +15,10 @@ ath79_setup_interfaces()
ucidef_add_switch "switch1" \
"0@eth1" "1:lan:4" "2:lan:1" "3:lan:2" "4:lan:3"
;;
mikrotik,routerboard-921gs-5hpacd-15s|\
mikrotik,routerboard-922uags-5hpacd|\
mikrotik,routerboard-lhg-2nd|\
mikrotik,routerboard-sxt-5nd-r2|\
mikrotik,routerboard-wap-g-5hact2hnd)
ucidef_set_interface_lan "eth0"
;;
@ -34,6 +37,9 @@ ath79_setup_macs()
local mac_base="$(cat /sys/firmware/mikrotik/hard_config/mac_base)"
case "$board" in
mikrotik,routerboard-921gs-5hpacd-15s|\
mikrotik,routerboard-lhg-2nd|\
mikrotik,routerboard-sxt-5nd-r2|\
mikrotik,routerboard-wap-g-5hact2hnd)
label_mac="$mac_base"
lan_mac="$mac_base"

View File

@ -12,6 +12,13 @@ board=$(board_name)
case "$FIRMWARE" in
"ath9k-eeprom-ahb-18100000.wmac.bin")
case $board in
mikrotik,routerboard-lhg-2nd|\
mikrotik,routerboard-sxt-5nd-r2)
caldata_from_file $wlan_data 0x1000 0x440 /tmp/$FIRMWARE
ath9k_patch_mac $(macaddr_add "$mac_base" +1) /tmp/$FIRMWARE
caldata_sysfsload_from_file /tmp/$FIRMWARE 0x0 0x440
rm -f /tmp/$FIRMWARE
;;
mikrotik,routerboard-wap-g-5hact2hnd)
caldata_from_file $wlan_data 0x1000 0x440 /tmp/$FIRMWARE
ath9k_patch_mac $(macaddr_add "$mac_base" +2) /tmp/$FIRMWARE

View File

@ -11,6 +11,7 @@ board=$(board_name)
case "$FIRMWARE" in
"ath10k/cal-pci-0000:00:00.0.bin")
case $board in
mikrotik,routerboard-921gs-5hpacd-15s|\
mikrotik,routerboard-wap-g-5hact2hnd)
caldata_sysfsload_from_file $wlan_data 0x5000 0x844
;;

View File

@ -32,7 +32,9 @@ platform_do_upgrade() {
case "$board" in
mikrotik,routerboard-493g|\
mikrotik,routerboard-922uags-5hpacd)
mikrotik,routerboard-921gs-5hpacd-15s|\
mikrotik,routerboard-922uags-5hpacd|\
mikrotik,routerboard-sxt-5nd-r2)
platform_do_upgrade_mikrotik_nand "$1"
;;
*)

View File

@ -3,7 +3,7 @@
#################################################
# BCM4705 with tg3
define Device/linksys-wrt300n-v1.1
define Device/linksys_wrt300n-v1.1
DEVICE_MODEL := WRT300N
DEVICE_VARIANT := v1.1
DEVICE_PACKAGES := kmod-tg3 kmod-b43
@ -11,9 +11,9 @@ define Device/linksys-wrt300n-v1.1
DEVICE_ID := EWC2
VERSION := 1.51.2
endef
TARGET_DEVICES += linksys-wrt300n-v1.1
TARGET_DEVICES += linksys_wrt300n-v1.1
define Device/linksys-wrt310n-v1
define Device/linksys_wrt310n-v1
DEVICE_MODEL := WRT310N
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-tg3 kmod-b43
@ -21,9 +21,9 @@ define Device/linksys-wrt310n-v1
DEVICE_ID := 310N
VERSION := 1.0.10
endef
TARGET_DEVICES += linksys-wrt310n-v1
TARGET_DEVICES += linksys_wrt310n-v1
define Device/linksys-wrt350n-v1
define Device/linksys_wrt350n-v1
DEVICE_MODEL := WRT350N
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-tg3 kmod-b43 $(USB2_PACKAGES)
@ -31,9 +31,9 @@ define Device/linksys-wrt350n-v1
DEVICE_ID := EWCG
VERSION := 1.04.1
endef
TARGET_DEVICES += linksys-wrt350n-v1
TARGET_DEVICES += linksys_wrt350n-v1
define Device/linksys-wrt610n-v1
define Device/linksys_wrt610n-v1
DEVICE_MODEL := WRT610N
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-tg3 kmod-b43 $(USB2_PACKAGES)
@ -41,10 +41,10 @@ define Device/linksys-wrt610n-v1
DEVICE_ID := 610N
VERSION := 1.0.1
endef
TARGET_DEVICES += linksys-wrt610n-v1
TARGET_DEVICES += linksys_wrt610n-v1
# BCMA SoC with SSB WiFi
define Device/linksys-wrt610n-v2
define Device/linksys_wrt610n-v2
DEVICE_MODEL := WRT610N
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-bgmac kmod-b43 $(USB2_PACKAGES)
@ -52,9 +52,9 @@ define Device/linksys-wrt610n-v2
DEVICE_ID := 610N
VERSION := 2.0.0
endef
TARGET_DEVICES += linksys-wrt610n-v2
TARGET_DEVICES += linksys_wrt610n-v2
define Device/linksys-e3000-v1
define Device/linksys_e3000-v1
DEVICE_MODEL := E3000
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-bgmac kmod-b43 $(USB2_PACKAGES)
@ -62,7 +62,7 @@ define Device/linksys-e3000-v1
DEVICE_ID := 61XN
VERSION := 1.0.3
endef
TARGET_DEVICES += linksys-e3000-v1
TARGET_DEVICES += linksys_e3000-v1
# generic has Ethernet drivers as modules so overwrite standard image
define Device/standard

View File

@ -2,107 +2,107 @@
# Subtarget legacy
#################################################
define Device/asus-wl-300g
define Device/asus_wl-300g
DEVICE_MODEL := WL-300g
DEVICE_PACKAGES := kmod-b43 kmod-b43legacy
$(Device/asus)
PRODUCTID := "WL300g "
endef
TARGET_DEVICES += asus-wl-300g
TARGET_DEVICES += asus_wl-300g
define Device/asus-wl-320gp
define Device/asus_wl-320gp
DEVICE_MODEL := WL-320gP
DEVICE_PACKAGES := kmod-b43
$(Device/asus)
PRODUCTID := "WL320gP "
endef
TARGET_DEVICES += asus-wl-320gp
TARGET_DEVICES += asus_wl-320gp
define Device/asus-wl-330ge
define Device/asus_wl-330ge
DEVICE_MODEL := WL-330gE
DEVICE_PACKAGES := kmod-b43
$(Device/asus)
PRODUCTID := "WL-330gE "
endef
TARGET_DEVICES += asus-wl-330ge
TARGET_DEVICES += asus_wl-330ge
define Device/asus-wl-500gd
define Device/asus_wl-500gd
DEVICE_MODEL := WL-500g Deluxe
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := "WL500gx "
endef
TARGET_DEVICES += asus-wl-500gd
TARGET_DEVICES += asus_wl-500gd
define Device/asus-wl-500gp-v1
define Device/asus_wl-500gp-v1
DEVICE_MODEL := WL-500gP
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := "WL500gp "
endef
TARGET_DEVICES += asus-wl-500gp-v1
TARGET_DEVICES += asus_wl-500gp-v1
define Device/asus-wl-500gp-v2
define Device/asus_wl-500gp-v2
DEVICE_MODEL := WL-500gP
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := "WL500gpv2 "
endef
TARGET_DEVICES += asus-wl-500gp-v2
TARGET_DEVICES += asus_wl-500gp-v2
define Device/asus-wl-500w
define Device/asus_wl-500w
DEVICE_MODEL := WL-500W
DEVICE_PACKAGES := kmod-b43 kmod-usb-uhci kmod-usb2-pci
$(Device/asus)
PRODUCTID := "WL500W "
endef
TARGET_DEVICES += asus-wl-500w
TARGET_DEVICES += asus_wl-500w
define Device/asus-wl-520gu
define Device/asus_wl-520gu
DEVICE_MODEL := WL-520gU
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := "WL520gu "
endef
TARGET_DEVICES += asus-wl-520gu
TARGET_DEVICES += asus_wl-520gu
define Device/asus-wl-550ge
define Device/asus_wl-550ge
DEVICE_MODEL := WL-550gE
DEVICE_PACKAGES := kmod-b43
$(Device/asus)
PRODUCTID := "WL550gE "
endef
TARGET_DEVICES += asus-wl-550ge
TARGET_DEVICES += asus_wl-550ge
define Device/asus-wl-hdd25
define Device/asus_wl-hdd25
DEVICE_MODEL := WL-HDD25
DEVICE_PACKAGES := kmod-b43 kmod-b43legacy $(USB1_PACKAGES)
$(Device/asus)
PRODUCTID := "WLHDD "
endef
TARGET_DEVICES += asus-wl-hdd25
TARGET_DEVICES += asus_wl-hdd25
define Device/dlink-dwl-3150
define Device/dlink_dwl-3150
DEVICE_VENDOR := D-Link
DEVICE_MODEL := DWL-3150
IMAGES := bin
IMAGE/bin := append-rootfs | trx-with-loader | tailed-bin
BIN_TAIL := BCM-5352-2050-0000000-01
endef
TARGET_DEVICES += dlink-dwl-3150
TARGET_DEVICES += dlink_dwl-3150
define Device/edimax-ps1208-mfg
define Device/edimax_ps1208-mfg
DEVICE_VENDOR := Edimax
DEVICE_MODEL := PS-1208MFg
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
IMAGES := bin
IMAGE/bin := append-rootfs | trx-with-loader | edimax-bin
endef
TARGET_DEVICES += edimax-ps1208-mfg
TARGET_DEVICES += edimax_ps1208-mfg
define Device/huawei-e970
define Device/huawei_e970
DEVICE_VENDOR := Huawei
DEVICE_MODEL := E970
DEVICE_PACKAGES := kmod-b43
@ -110,26 +110,26 @@ define Device/huawei-e970
IMAGES := bin
IMAGE/bin := append-rootfs | trx-without-loader | huawei-bin
endef
TARGET_DEVICES += huawei-e970
TARGET_DEVICES += huawei_e970
define Device/linksys-wrt54g3g
define Device/linksys_wrt54g3g
DEVICE_MODEL := WRT54G3G
DEVICE_PACKAGES := kmod-b43
$(Device/linksys)
DEVICE_ID := W54F
VERSION := 2.20.1
endef
TARGET_DEVICES += linksys-wrt54g3g
TARGET_DEVICES += linksys_wrt54g3g
define Device/linksys-wrt54g3g-em
define Device/linksys_wrt54g3g-em
DEVICE_MODEL := WRT54G3G-EM
$(Device/linksys)
DEVICE_ID := W3GN
VERSION := 2.20.1
endef
TARGET_DEVICES += linksys-wrt54g3g-em
TARGET_DEVICES += linksys_wrt54g3g-em
define Device/linksys-wrt54g3gv2-vf
define Device/linksys_wrt54g3gv2-vf
DEVICE_VENDOR := Linksys
DEVICE_MODEL := WRT54G3GV2-VF
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -141,18 +141,18 @@ define Device/linksys-wrt54g3gv2-vf
VERSION := 3.00.24
SERIAL := 6
endef
TARGET_DEVICES += linksys-wrt54g3gv2-vf
TARGET_DEVICES += linksys_wrt54g3gv2-vf
define Device/linksys-wrt54g
define Device/linksys_wrt54g
DEVICE_MODEL := WRT54G
DEVICE_PACKAGES := kmod-b43 kmod-b43legacy
$(Device/linksys)
DEVICE_ID := W54G
VERSION := 4.71.1
endef
TARGET_DEVICES += linksys-wrt54g
TARGET_DEVICES += linksys_wrt54g
define Device/linksys-wrt54gs
define Device/linksys_wrt54gs
DEVICE_MODEL := WRT54GS
DEVICE_VARIANT := v1/v2/v3
DEVICE_ALT0_VENDOR := Linksys
@ -164,9 +164,9 @@ define Device/linksys-wrt54gs
DEVICE_ID := W54S
VERSION := 4.80.1
endef
TARGET_DEVICES += linksys-wrt54gs
TARGET_DEVICES += linksys_wrt54gs
define Device/linksys-wrt54gs-v4
define Device/linksys_wrt54gs-v4
DEVICE_MODEL := WRT54GS
DEVICE_VARIANT := v4
DEVICE_PACKAGES := kmod-b43
@ -174,9 +174,9 @@ define Device/linksys-wrt54gs-v4
DEVICE_ID := W54s
VERSION := 1.09.1
endef
TARGET_DEVICES += linksys-wrt54gs-v4
TARGET_DEVICES += linksys_wrt54gs-v4
define Device/linksys-wrtsl54gs
define Device/linksys_wrtsl54gs
DEVICE_MODEL := WRTSL54GS
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/linksys)
@ -184,18 +184,18 @@ define Device/linksys-wrtsl54gs
DEVICE_ID := W54U
VERSION := 2.08.1
endef
TARGET_DEVICES += linksys-wrtsl54gs
TARGET_DEVICES += linksys_wrtsl54gs
define Device/linksys-wrt150n
define Device/linksys_wrt150n
DEVICE_MODEL := WRT150N
DEVICE_PACKAGES := kmod-b43
$(Device/linksys)
DEVICE_ID := N150
VERSION := 1.51.3
endef
TARGET_DEVICES += linksys-wrt150n
TARGET_DEVICES += linksys_wrt150n
define Device/linksys-wrt160n-v1
define Device/linksys_wrt160n-v1
DEVICE_MODEL := WRT160N
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -203,9 +203,9 @@ define Device/linksys-wrt160n-v1
DEVICE_ID := N150
VERSION := 1.50.1
endef
TARGET_DEVICES += linksys-wrt160n-v1
TARGET_DEVICES += linksys_wrt160n-v1
define Device/linksys-wrt300n-v1
define Device/linksys_wrt300n-v1
DEVICE_MODEL := WRT300N
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -214,33 +214,33 @@ define Device/linksys-wrt300n-v1
DEVICE_ID := EWCB
VERSION := 1.03.6
endef
TARGET_DEVICES += linksys-wrt300n-v1
TARGET_DEVICES += linksys_wrt300n-v1
define Device/motorola-wa840g
define Device/motorola_wa840g
DEVICE_MODEL := WA840G
DEVICE_PACKAGES := kmod-b43 kmod-b43legacy
$(Device/motorola)
MOTOROLA_DEVICE := 2
endef
TARGET_DEVICES += motorola-wa840g
TARGET_DEVICES += motorola_wa840g
define Device/motorola-we800g
define Device/motorola_we800g
DEVICE_MODEL := WE800G
DEVICE_PACKAGES := kmod-b43 kmod-b43legacy
$(Device/motorola)
MOTOROLA_DEVICE := 3
endef
TARGET_DEVICES += motorola-we800g
TARGET_DEVICES += motorola_we800g
define Device/motorola-wr850g
define Device/motorola_wr850g
DEVICE_MODEL := WR850G
DEVICE_PACKAGES := kmod-b43 kmod-b43legacy
$(Device/motorola)
MOTOROLA_DEVICE := 1
endef
TARGET_DEVICES += motorola-wr850g
TARGET_DEVICES += motorola_wr850g
define Device/netgear-wgr614-v8
define Device/netgear_wgr614-v8
DEVICE_MODEL := WGR614
DEVICE_VARIANT := v8
DEVICE_PACKAGES := kmod-b43
@ -248,9 +248,9 @@ define Device/netgear-wgr614-v8
NETGEAR_BOARD_ID := U12H072T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wgr614-v8
TARGET_DEVICES += netgear_wgr614-v8
define Device/netgear-wgt634u
define Device/netgear_wgt634u
DEVICE_VENDOR := NETGEAR
DEVICE_MODEL := WGT634U
DEVICE_PACKAGES := kmod-ath5k $(USB2_PACKAGES)
@ -258,9 +258,9 @@ define Device/netgear-wgt634u
IMAGES := bin
IMAGE/bin := append-rootfs | trx-with-loader | prepend-with-elf
endef
TARGET_DEVICES += netgear-wgt634u
TARGET_DEVICES += netgear_wgt634u
define Device/netgear-wndr3300-v1
define Device/netgear_wndr3300-v1
DEVICE_MODEL := WNDR3300
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -268,9 +268,9 @@ define Device/netgear-wndr3300-v1
NETGEAR_BOARD_ID := U12H093T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wndr3300-v1
TARGET_DEVICES += netgear_wndr3300-v1
define Device/netgear-wnr834b-v2
define Device/netgear_wnr834b-v2
DEVICE_MODEL := WNR834B
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-b43
@ -278,15 +278,15 @@ define Device/netgear-wnr834b-v2
NETGEAR_BOARD_ID := U12H081T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wnr834b-v2
TARGET_DEVICES += netgear_wnr834b-v2
define Device/usrobotics-usr5461
define Device/usrobotics_usr5461
DEVICE_VENDOR := US Robotics
DEVICE_MODEL := USR5461
DEVICE_PACKAGES := kmod-b43 $(USB1_PACKAGES)
IMAGES := bin
IMAGE/bin := append-rootfs | trx-with-loader | usrobotics-bin
endef
TARGET_DEVICES += usrobotics-usr5461
TARGET_DEVICES += usrobotics_usr5461
TARGET_DEVICES += standard standard-noloader-gz

View File

@ -2,155 +2,155 @@
# Subtarget mips74k
#################################################
define Device/asus-rt-ac53u
define Device/asus_rt-ac53u
DEVICE_MODEL := RT-AC53U
DEVICE_PACKAGES := $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-AC53U
endef
TARGET_DEVICES += asus-rt-ac53u
TARGET_DEVICES += asus_rt-ac53u
define Device/asus-rt-ac66u
define Device/asus_rt-ac66u
DEVICE_MODEL := RT-AC66U
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-AC66U
DEFAULT := n
endef
TARGET_DEVICES += asus-rt-ac66u
TARGET_DEVICES += asus_rt-ac66u
define Device/asus-rt-n10
define Device/asus_rt-n10
DEVICE_MODEL := RT-N10
DEVICE_PACKAGES := kmod-b43
$(Device/asus)
PRODUCTID := "RT-N10 "
endef
TARGET_DEVICES += asus-rt-n10
TARGET_DEVICES += asus_rt-n10
define Device/asus-rt-n10p
define Device/asus_rt-n10p
DEVICE_MODEL := RT-N10P
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
$(Device/asus)
PRODUCTID := RT-N10P
endef
TARGET_DEVICES += asus-rt-n10p
TARGET_DEVICES += asus_rt-n10p
define Device/asus-rt-n10p-v2
define Device/asus_rt-n10p-v2
DEVICE_MODEL := RT-N10P
DEVICE_VARIANT := v2
$(Device/asus)
PRODUCTID := RT-N10PV2
endef
TARGET_DEVICES += asus-rt-n10p-v2
TARGET_DEVICES += asus_rt-n10p-v2
define Device/asus-rt-n10u
define Device/asus_rt-n10u
DEVICE_MODEL := RT-N10U
DEVICE_VARIANT := A
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-N10U
endef
TARGET_DEVICES += asus-rt-n10u
TARGET_DEVICES += asus_rt-n10u
define Device/asus-rt-n10u-b
define Device/asus_rt-n10u-b
DEVICE_MODEL := RT-N10U
DEVICE_VARIANT := B
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-N10U
endef
TARGET_DEVICES += asus-rt-n10u-b
TARGET_DEVICES += asus_rt-n10u-b
define Device/asus-rt-n12
define Device/asus_rt-n12
DEVICE_MODEL := RT-N12
DEVICE_VARIANT := A1
DEVICE_PACKAGES := kmod-b43
$(Device/asus)
PRODUCTID := "RT-N12 "
endef
TARGET_DEVICES += asus-rt-n12
TARGET_DEVICES += asus_rt-n12
define Device/asus-rt-n12-b1
define Device/asus_rt-n12-b1
DEVICE_MODEL := RT-N12
DEVICE_VARIANT := B1
$(Device/asus)
PRODUCTID := RT-N12B1
endef
TARGET_DEVICES += asus-rt-n12-b1
TARGET_DEVICES += asus_rt-n12-b1
define Device/asus-rt-n12-c1
define Device/asus_rt-n12-c1
DEVICE_MODEL := RT-N12
DEVICE_VARIANT := C1
$(Device/asus)
PRODUCTID := RT-N12C1
endef
TARGET_DEVICES += asus-rt-n12-c1
TARGET_DEVICES += asus_rt-n12-c1
define Device/asus-rt-n12-d1
define Device/asus_rt-n12-d1
DEVICE_MODEL := RT-N12
DEVICE_VARIANT := D1
$(Device/asus)
PRODUCTID := RT-N12D1
endef
TARGET_DEVICES += asus-rt-n12-d1
TARGET_DEVICES += asus_rt-n12-d1
define Device/asus-rt-n12hp
define Device/asus_rt-n12hp
DEVICE_MODEL := RT-N12HP
$(Device/asus)
PRODUCTID := RT-N12HP
endef
TARGET_DEVICES += asus-rt-n12hp
TARGET_DEVICES += asus_rt-n12hp
define Device/asus-rt-n14uhp
define Device/asus_rt-n14uhp
DEVICE_MODEL := RT-N14UHP
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-N14UHP
endef
TARGET_DEVICES += asus-rt-n14uhp
TARGET_DEVICES += asus_rt-n14uhp
define Device/asus-rt-n15u
define Device/asus_rt-n15u
DEVICE_MODEL := RT-N15U
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-N15U
endef
TARGET_DEVICES += asus-rt-n15u
TARGET_DEVICES += asus_rt-n15u
define Device/asus-rt-n16
define Device/asus_rt-n16
DEVICE_MODEL := RT-N16
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-N16
endef
TARGET_DEVICES += asus-rt-n16
TARGET_DEVICES += asus_rt-n16
define Device/asus-rt-n53
define Device/asus_rt-n53
DEVICE_MODEL := RT-N53
DEVICE_PACKAGES := kmod-b43
$(Device/asus)
PRODUCTID := RT-N53
endef
TARGET_DEVICES += asus-rt-n53
TARGET_DEVICES += asus_rt-n53
define Device/asus-rt-n66u
define Device/asus_rt-n66u
DEVICE_MODEL := RT-N66U
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-N66U
endef
TARGET_DEVICES += asus-rt-n66u
TARGET_DEVICES += asus_rt-n66u
define Device/asus-rt-n66w
define Device/asus_rt-n66w
DEVICE_MODEL := RT-N66W
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
$(Device/asus)
PRODUCTID := RT-N66U
endef
TARGET_DEVICES += asus-rt-n66w
TARGET_DEVICES += asus_rt-n66w
define Device/linksys-wrt160n-v3
define Device/linksys_wrt160n-v3
DEVICE_MODEL := WRT160N
DEVICE_VARIANT := v3
DEVICE_PACKAGES := kmod-b43
@ -159,9 +159,9 @@ define Device/linksys-wrt160n-v3
VERSION := 3.0.3
DEFAULT := n
endef
TARGET_DEVICES += linksys-wrt160n-v3
TARGET_DEVICES += linksys_wrt160n-v3
define Device/linksys-wrt310n-v2
define Device/linksys_wrt310n-v2
DEVICE_MODEL := WRT310N
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-b43
@ -169,9 +169,9 @@ define Device/linksys-wrt310n-v2
DEVICE_ID := 310N
VERSION := 2.0.1
endef
TARGET_DEVICES += linksys-wrt310n-v2
TARGET_DEVICES += linksys_wrt310n-v2
define Device/linksys-wrt320n-v1
define Device/linksys_wrt320n-v1
DEVICE_MODEL := WRT320N
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -179,18 +179,18 @@ define Device/linksys-wrt320n-v1
DEVICE_ID := 320N
VERSION := 1.0.5
endef
TARGET_DEVICES += linksys-wrt320n-v1
TARGET_DEVICES += linksys_wrt320n-v1
define Device/linksys-e900-v1
define Device/linksys_e900-v1
DEVICE_MODEL := E900
DEVICE_VARIANT := v1
$(Device/linksys)
DEVICE_ID := E900
VERSION := 1.0.4
endef
TARGET_DEVICES += linksys-e900-v1
TARGET_DEVICES += linksys_e900-v1
define Device/linksys-e1000
define Device/linksys_e1000
DEVICE_MODEL := E1000
DEVICE_VARIANT := v1/v2/v2.1
DEVICE_PACKAGES := kmod-b43
@ -198,36 +198,36 @@ define Device/linksys-e1000
DEVICE_ID := E100
VERSION := 1.1.3
endef
TARGET_DEVICES += linksys-e1000
TARGET_DEVICES += linksys_e1000
define Device/linksys-e1200-v1
define Device/linksys_e1200-v1
DEVICE_MODEL := E1200
DEVICE_VARIANT := v1
$(Device/linksys)
DEVICE_ID := E120
VERSION := 1.0.3
endef
TARGET_DEVICES += linksys-e1200-v1
TARGET_DEVICES += linksys_e1200-v1
define Device/linksys-e1200-v2
define Device/linksys_e1200-v2
DEVICE_MODEL := E1200
DEVICE_VARIANT := v2
$(Device/linksys)
DEVICE_ID := E122
VERSION := 1.0.4
endef
TARGET_DEVICES += linksys-e1200-v2
TARGET_DEVICES += linksys_e1200-v2
define Device/linksys-e1500-v1
define Device/linksys_e1500-v1
DEVICE_MODEL := E1500
DEVICE_VARIANT := v1
$(Device/linksys)
DEVICE_ID := E150
VERSION := 1.0.5
endef
TARGET_DEVICES += linksys-e1500-v1
TARGET_DEVICES += linksys_e1500-v1
define Device/linksys-e1550-v1
define Device/linksys_e1550-v1
DEVICE_MODEL := E1550
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -235,9 +235,9 @@ define Device/linksys-e1550-v1
DEVICE_ID := 1550
VERSION := 1.0.3
endef
TARGET_DEVICES += linksys-e1550-v1
TARGET_DEVICES += linksys_e1550-v1
define Device/linksys-e2000-v1
define Device/linksys_e2000-v1
DEVICE_MODEL := E2000
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -245,9 +245,9 @@ define Device/linksys-e2000-v1
DEVICE_ID := 32XN
VERSION := 1.0.4
endef
TARGET_DEVICES += linksys-e2000-v1
TARGET_DEVICES += linksys_e2000-v1
define Device/linksys-e2500-v1
define Device/linksys_e2500-v1
DEVICE_MODEL := E2500
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -255,9 +255,9 @@ define Device/linksys-e2500-v1
DEVICE_ID := E25X
VERSION := 1.0.7
endef
TARGET_DEVICES += linksys-e2500-v1
TARGET_DEVICES += linksys_e2500-v1
define Device/linksys-e2500-v2
define Device/linksys_e2500-v2
DEVICE_MODEL := E2500
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-b43
@ -265,9 +265,9 @@ define Device/linksys-e2500-v2
DEVICE_ID := E25X
VERSION := 2.0.0
endef
TARGET_DEVICES += linksys-e2500-v2
TARGET_DEVICES += linksys_e2500-v2
define Device/linksys-e2500-v2.1
define Device/linksys_e2500-v2.1
DEVICE_MODEL := E2500
DEVICE_VARIANT := v2.1
DEVICE_PACKAGES := kmod-b43
@ -275,9 +275,9 @@ define Device/linksys-e2500-v2.1
DEVICE_ID := 25RU
VERSION := 2.1.0
endef
TARGET_DEVICES += linksys-e2500-v2.1
TARGET_DEVICES += linksys_e2500-v2.1
define Device/linksys-e2500-v3
define Device/linksys_e2500-v3
DEVICE_MODEL := E2500
DEVICE_VARIANT := v3
DEVICE_PACKAGES := kmod-b43
@ -285,9 +285,9 @@ define Device/linksys-e2500-v3
DEVICE_ID := 25V3
VERSION := 3.0.0
endef
TARGET_DEVICES += linksys-e2500-v3
TARGET_DEVICES += linksys_e2500-v3
define Device/linksys-e3200-v1
define Device/linksys_e3200-v1
DEVICE_MODEL := E3200
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -295,9 +295,9 @@ define Device/linksys-e3200-v1
DEVICE_ID := 3200
VERSION := 1.0.1
endef
TARGET_DEVICES += linksys-e3200-v1
TARGET_DEVICES += linksys_e3200-v1
define Device/linksys-e4200-v1
define Device/linksys_e4200-v1
DEVICE_MODEL := E4200
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -305,9 +305,9 @@ define Device/linksys-e4200-v1
DEVICE_ID := 4200
VERSION := 1.0.5
endef
TARGET_DEVICES += linksys-e4200-v1
TARGET_DEVICES += linksys_e4200-v1
define Device/netgear-r6200-v1
define Device/netgear_r6200-v1
DEVICE_MODEL := R6200
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -315,27 +315,27 @@ define Device/netgear-r6200-v1
NETGEAR_BOARD_ID := U12H192T00_NETGEAR
NETGEAR_REGION := 1
endef
TARGET_DEVICES += netgear-r6200-v1
TARGET_DEVICES += netgear_r6200-v1
define Device/netgear-wgr614-v10-na
define Device/netgear_wgr614-v10-na
DEVICE_MODEL := WGR614
DEVICE_VARIANT := v10 (NA)
$(Device/netgear)
NETGEAR_BOARD_ID := U12H139T01_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wgr614-v10-na
TARGET_DEVICES += netgear_wgr614-v10-na
define Device/netgear-wgr614-v10
define Device/netgear_wgr614-v10
DEVICE_MODEL := WGR614
DEVICE_VARIANT := v10
$(Device/netgear)
NETGEAR_BOARD_ID := U12H139T01_NETGEAR
NETGEAR_REGION := 1
endef
TARGET_DEVICES += netgear-wgr614-v10
TARGET_DEVICES += netgear_wgr614-v10
define Device/netgear-wn2500rp-v1
define Device/netgear_wn2500rp-v1
DEVICE_MODEL := WN2500RP
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43
@ -343,17 +343,17 @@ define Device/netgear-wn2500rp-v1
NETGEAR_BOARD_ID := U12H197T00_NETGEAR
NETGEAR_REGION := 1
endef
TARGET_DEVICES += netgear-wn2500rp-v1
TARGET_DEVICES += netgear_wn2500rp-v1
define Device/netgear-wn3000rp
define Device/netgear_wn3000rp
DEVICE_MODEL := WN3000RP
$(Device/netgear)
NETGEAR_BOARD_ID := U12H163T01_NETGEAR
NETGEAR_REGION := 1
endef
TARGET_DEVICES += netgear-wn3000rp
TARGET_DEVICES += netgear_wn3000rp
define Device/netgear-wndr3400-v1
define Device/netgear_wndr3400-v1
DEVICE_MODEL := WNDR3400
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -361,9 +361,9 @@ define Device/netgear-wndr3400-v1
NETGEAR_BOARD_ID := U12H155T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wndr3400-v1
TARGET_DEVICES += netgear_wndr3400-v1
define Device/netgear-wndr3400-v2
define Device/netgear_wndr3400-v2
DEVICE_MODEL := WNDR3400
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -371,9 +371,9 @@ define Device/netgear-wndr3400-v2
NETGEAR_BOARD_ID := U12H187T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wndr3400-v2
TARGET_DEVICES += netgear_wndr3400-v2
define Device/netgear-wndr3400-v3
define Device/netgear_wndr3400-v3
DEVICE_MODEL := WNDR3400
DEVICE_VARIANT := v3
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -381,9 +381,9 @@ define Device/netgear-wndr3400-v3
NETGEAR_BOARD_ID := U12H208T00_NETGEAR
NETGEAR_REGION := 1
endef
TARGET_DEVICES += netgear-wndr3400-v3
TARGET_DEVICES += netgear_wndr3400-v3
define Device/netgear-wndr3700-v3
define Device/netgear_wndr3700-v3
DEVICE_MODEL := WNDR3700
DEVICE_VARIANT := v3
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -391,9 +391,9 @@ define Device/netgear-wndr3700-v3
NETGEAR_BOARD_ID := U12H194T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wndr3700-v3
TARGET_DEVICES += netgear_wndr3700-v3
define Device/netgear-wndr3400-vcna
define Device/netgear_wndr3400-vcna
DEVICE_MODEL := WNDR3400
DEVICE_VARIANT := vcna
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -402,9 +402,9 @@ define Device/netgear-wndr3400-vcna
NETGEAR_REGION := 2
DEFAULT := n
endef
TARGET_DEVICES += netgear-wndr3400-vcna
TARGET_DEVICES += netgear_wndr3400-vcna
define Device/netgear-wndr4000
define Device/netgear_wndr4000
DEVICE_MODEL := WNDR4000
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -412,18 +412,18 @@ define Device/netgear-wndr4000
NETGEAR_BOARD_ID := U12H181T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wndr4000
TARGET_DEVICES += netgear_wndr4000
define Device/netgear-wnr1000-v3
define Device/netgear_wnr1000-v3
DEVICE_MODEL := WNR1000
DEVICE_VARIANT := v3
$(Device/netgear)
NETGEAR_BOARD_ID := U12H139T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wnr1000-v3
TARGET_DEVICES += netgear_wnr1000-v3
define Device/netgear-wnr2000v2
define Device/netgear_wnr2000v2
DEVICE_MODEL := WNR2000
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-b43
@ -431,9 +431,9 @@ define Device/netgear-wnr2000v2
NETGEAR_BOARD_ID := U12H114T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wnr2000v2
TARGET_DEVICES += netgear_wnr2000v2
define Device/netgear-wnr3500l-v1-na
define Device/netgear_wnr3500l-v1-na
DEVICE_MODEL := WNR3500L
DEVICE_VARIANT := v1 (NA)
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -441,9 +441,9 @@ define Device/netgear-wnr3500l-v1-na
NETGEAR_BOARD_ID := U12H136T99_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wnr3500l-v1-na
TARGET_DEVICES += netgear_wnr3500l-v1-na
define Device/netgear-wnr3500l-v1
define Device/netgear_wnr3500l-v1
DEVICE_MODEL := WNR3500L
DEVICE_VARIANT := v1 (ROW)
DEVICE_PACKAGES := kmod-b43 $(USB2_PACKAGES)
@ -451,9 +451,9 @@ define Device/netgear-wnr3500l-v1
NETGEAR_BOARD_ID := U12H136T99_NETGEAR
NETGEAR_REGION := 1
endef
TARGET_DEVICES += netgear-wnr3500l-v1
TARGET_DEVICES += netgear_wnr3500l-v1
define Device/netgear-wnr3500l-v2
define Device/netgear_wnr3500l-v2
DEVICE_MODEL := WNR3500L
DEVICE_VARIANT := v2
DEVICE_PACKAGES := $(USB2_PACKAGES)
@ -461,9 +461,9 @@ define Device/netgear-wnr3500l-v2
NETGEAR_BOARD_ID := U12H172T00_NETGEAR
NETGEAR_REGION := 1
endef
TARGET_DEVICES += netgear-wnr3500l-v2
TARGET_DEVICES += netgear_wnr3500l-v2
define Device/netgear-wnr3500u
define Device/netgear_wnr3500u
DEVICE_MODEL := WNR3500U
DEVICE_PACKAGES := $(USB2_PACKAGES)
$(Device/netgear)
@ -471,9 +471,9 @@ define Device/netgear-wnr3500u
NETGEAR_REGION := 2
DEFAULT := n
endef
TARGET_DEVICES += netgear-wnr3500u
TARGET_DEVICES += netgear_wnr3500u
define Device/netgear-wnr3500-v2
define Device/netgear_wnr3500-v2
DEVICE_MODEL := WNR3500
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-b43
@ -481,9 +481,9 @@ define Device/netgear-wnr3500-v2
NETGEAR_BOARD_ID := U12H127T00_NETGEAR
NETGEAR_REGION := 2
endef
TARGET_DEVICES += netgear-wnr3500-v2
TARGET_DEVICES += netgear_wnr3500-v2
define Device/netgear-wnr3500-v2-vc
define Device/netgear_wnr3500-v2-vc
DEVICE_MODEL := WNR3500
DEVICE_VARIANT := v2 (VC)
DEVICE_PACKAGES := kmod-b43
@ -492,6 +492,6 @@ define Device/netgear-wnr3500-v2-vc
NETGEAR_REGION := 2
DEFAULT := n
endef
TARGET_DEVICES += netgear-wnr3500-v2-vc
TARGET_DEVICES += netgear_wnr3500-v2-vc
TARGET_DEVICES += standard standard-noloader-nodictionarylzma

View File

@ -87,7 +87,6 @@ CONFIG_BOUNCE=y
CONFIG_BROADCOM_PHY=y
CONFIG_CACHE_L2X0=y
CONFIG_CC_HAS_KASAN_GENERIC=y
# CONFIG_CGROUPS is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
CONFIG_CLKSRC_MMIO=y

View File

@ -125,7 +125,7 @@ USB3_PACKAGES := $(USB2_PACKAGES) kmod-usb3 kmod-phy-bcm-ns-usb3
define Device/Default
# .dtb files are prefixed by SoC type, e.g. bcm4708- which is not included in device/image names
# extract the full dtb name based on the device info
DEVICE_DTS := $(patsubst %.dtb,%,$(notdir $(wildcard $(if $(IB),$(KDIR),$(DTS_DIR))/*-$(1).dtb)))
DEVICE_DTS := $(patsubst %.dtb,%,$(notdir $(wildcard $(if $(IB),$(KDIR),$(DTS_DIR))/*-$(subst _,-,$(1)).dtb)))
KERNEL := kernel-bin | append-dtb | lzma-d16
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_INITRAMFS_SUFFIX := .trx
@ -145,37 +145,37 @@ define Device/asus
IMAGE/trx := append-ubi | trx-nand | asus-trx
endef
define Device/asus-rt-ac56u
define Device/asus_rt-ac56u
$(call Device/asus)
DEVICE_MODEL := RT-AC56U
DEVICE_PACKAGES := $(B43) $(USB3_PACKAGES)
ASUS_PRODUCTID := RT-AC56U
endef
TARGET_DEVICES += asus-rt-ac56u
TARGET_DEVICES += asus_rt-ac56u
define Device/asus-rt-ac68u
define Device/asus_rt-ac68u
$(call Device/asus)
DEVICE_MODEL := RT-AC68U
DEVICE_PACKAGES := $(USB3_PACKAGES)
ASUS_PRODUCTID := RT-AC68U
endef
TARGET_DEVICES += asus-rt-ac68u
TARGET_DEVICES += asus_rt-ac68u
define Device/asus-rt-ac87u
define Device/asus_rt-ac87u
$(call Device/asus)
DEVICE_MODEL := RT-AC87U
DEVICE_PACKAGES := $(USB3_PACKAGES)
ASUS_PRODUCTID := RT-AC87U
endef
TARGET_DEVICES += asus-rt-ac87u
TARGET_DEVICES += asus_rt-ac87u
define Device/asus-rt-n18u
define Device/asus_rt-n18u
$(call Device/asus)
DEVICE_MODEL := RT-N18U
DEVICE_PACKAGES := $(USB3_PACKAGES)
ASUS_PRODUCTID := RT-N18U
endef
TARGET_DEVICES += asus-rt-n18u
TARGET_DEVICES += asus_rt-n18u
# Buffalo devices have TFTP recovery mode which can work nicely with initramfs
# kernels.
@ -188,21 +188,21 @@ define Device/buffalo/Default
KERNEL_INITRAMFS = $$(KERNEL)
endef
define Device/buffalo-wxr-1900dhp
define Device/buffalo_wxr-1900dhp
$(call Device/buffalo/Default)
DEVICE_MODEL := WXR-1900DHP
DEVICE_PACKAGES := $(USB3_PACKAGES)
endef
TARGET_DEVICES += buffalo-wxr-1900dhp
TARGET_DEVICES += buffalo_wxr-1900dhp
define Device/buffalo-wzr-600dhp2
define Device/buffalo_wzr-600dhp2
$(call Device/buffalo/Default)
DEVICE_MODEL := WZR-600DHP2
DEVICE_PACKAGES := $(B43) $(USB2_PACKAGES)
endef
TARGET_DEVICES += buffalo-wzr-600dhp2
TARGET_DEVICES += buffalo_wzr-600dhp2
define Device/buffalo-wzr-900dhp
define Device/buffalo_wzr-900dhp
$(call Device/buffalo/Default)
DEVICE_MODEL := WZR-900DHP
DEVICE_PACKAGES := $(B43) $(USB3_PACKAGES)
@ -221,14 +221,14 @@ define Device/buffalo-wzr-900dhp
buffalo-tag-dhp WZR-900DHP2 JP jp | buffalo-enc-tag | \
buffalo-dhp-image
endef
TARGET_DEVICES += buffalo-wzr-900dhp
TARGET_DEVICES += buffalo_wzr-900dhp
define Device/buffalo-wzr-1750dhp
define Device/buffalo_wzr-1750dhp
$(call Device/buffalo/Default)
DEVICE_MODEL := WZR-1750DHP
DEVICE_PACKAGES := $(B43) $(USB3_PACKAGES)
endef
TARGET_DEVICES += buffalo-wzr-1750dhp
TARGET_DEVICES += buffalo_wzr-1750dhp
define Device/dlink
DEVICE_VENDOR := D-Link
@ -236,49 +236,49 @@ define Device/dlink
IMAGE/bin := append-ubi | seama-nand
endef
define Device/dlink-dir-885l
define Device/dlink_dir-885l
DEVICE_MODEL := DIR-885L
DEVICE_PACKAGES := $(BRCMFMAC_4366B1) $(USB3_PACKAGES)
$(Device/dlink)
SIGNATURE := wrgac42_dlink.2015_dir885l
endef
TARGET_DEVICES += dlink-dir-885l
TARGET_DEVICES += dlink_dir-885l
# Linksys devices are disabled due to problem with 2 TRX partitions
define Device/linksys-ea6300-v1
define Device/linksys_ea6300-v1
DEVICE_VENDOR := Linksys
DEVICE_MODEL := EA6300
DEVICE_VARIANT := v1
DEVICE_PACKAGES := $(B43) $(USB3_PACKAGES)
BROKEN := y
endef
TARGET_DEVICES += linksys-ea6300-v1
TARGET_DEVICES += linksys_ea6300-v1
define Device/linksys-ea6500-v2
define Device/linksys_ea6500-v2
DEVICE_VENDOR := Linksys
DEVICE_MODEL := EA6500
DEVICE_VARIANT := v2
DEVICE_PACKAGES := $(B43) $(USB3_PACKAGES)
endef
TARGET_DEVICES += linksys-ea6500-v2
TARGET_DEVICES += linksys_ea6500-v2
define Device/linksys-ea9200
define Device/linksys_ea9200
DEVICE_VENDOR := Linksys
DEVICE_MODEL := EA9200
DEVICE_VARIANT := v1
DEVICE_PACKAGES := $(BRCMFMAC_43602A1) $(USB3_PACKAGES)
BROKEN := y
endef
TARGET_DEVICES += linksys-ea9200
TARGET_DEVICES += linksys_ea9200
define Device/linksys-ea9500
define Device/linksys_ea9500
DEVICE_VENDOR := Linksys
DEVICE_MODEL := EA9500
DEVICE_PACKAGES := $(BRCMFMAC_4366C0) $(USB3_PACKAGES)
DEVICE_DTS := bcm47094-linksys-panamera
BROKEN := y
endef
TARGET_DEVICES += linksys-ea9500
TARGET_DEVICES += linksys_ea9500
define Device/luxul
DEVICE_VENDOR := Luxul
@ -286,39 +286,39 @@ define Device/luxul
IMAGE/lxl := append-ubi | trx-nand | luxul-lxl
endef
define Device/luxul-abr-4500
define Device/luxul_abr-4500
$(Device/luxul)
DEVICE_MODEL := ABR-4500
DEVICE_PACKAGES := $(USB3_PACKAGES)
LUXUL_BOARD := ABR-4500
endef
TARGET_DEVICES += luxul-abr-4500
TARGET_DEVICES += luxul_abr-4500
define Device/luxul-xap-1610
define Device/luxul_xap-1610
$(Device/luxul)
DEVICE_MODEL := XAP-1610
DEVICE_PACKAGES := $(BRCMFMAC_4366C0)
IMAGE/lxl := append-rootfs | trx-serial | luxul-lxl
LUXUL_BOARD := XAP-1610
endef
TARGET_DEVICES += luxul-xap-1610
TARGET_DEVICES += luxul_xap-1610
define Device/luxul-xbr-4500
define Device/luxul_xbr-4500
$(Device/luxul)
DEVICE_MODEL := XBR-4500
DEVICE_PACKAGES := $(USB3_PACKAGES)
LUXUL_BOARD := XBR-4500
endef
TARGET_DEVICES += luxul-xbr-4500
TARGET_DEVICES += luxul_xbr-4500
define Device/luxul-xwr-3150
define Device/luxul_xwr-3150
$(Device/luxul)
DEVICE_MODEL := XWR-3150
DEVICE_PACKAGES := $(BRCMFMAC_4366C0) $(USB3_PACKAGES)
DEVICE_DTS := bcm47094-luxul-xwr-3150-v1
LUXUL_BOARD := XWR-3150
endef
TARGET_DEVICES += luxul-xwr-3150
TARGET_DEVICES += luxul_xwr-3150
define Device/netgear
DEVICE_VENDOR := NETGEAR
@ -327,57 +327,57 @@ define Device/netgear
NETGEAR_REGION := 1
endef
define Device/netgear-r6250
define Device/netgear_r6250
DEVICE_MODEL := R6250
DEVICE_PACKAGES := $(B43) $(USB3_PACKAGES)
$(Device/netgear)
NETGEAR_BOARD_ID := U12H245T00_NETGEAR
endef
TARGET_DEVICES += netgear-r6250
TARGET_DEVICES += netgear_r6250
define Device/netgear-r6300-v2
define Device/netgear_r6300-v2
DEVICE_MODEL := R6300
DEVICE_VARIANT := v2
DEVICE_PACKAGES := $(B43) $(USB3_PACKAGES)
$(Device/netgear)
NETGEAR_BOARD_ID := U12H240T00_NETGEAR
endef
TARGET_DEVICES += netgear-r6300-v2
TARGET_DEVICES += netgear_r6300-v2
define Device/netgear-r7000
define Device/netgear_r7000
DEVICE_MODEL := R7000
DEVICE_PACKAGES := $(USB3_PACKAGES)
$(Device/netgear)
NETGEAR_BOARD_ID := U12H270T00_NETGEAR
endef
TARGET_DEVICES += netgear-r7000
TARGET_DEVICES += netgear_r7000
define Device/netgear-r7900
define Device/netgear_r7900
DEVICE_MODEL := R7900
DEVICE_PACKAGES := $(BRCMFMAC_43602A1) $(USB3_PACKAGES)
$(Device/netgear)
NETGEAR_BOARD_ID := U12H315T30_NETGEAR
endef
TARGET_DEVICES += netgear-r7900
TARGET_DEVICES += netgear_r7900
define Device/netgear-r8000
define Device/netgear_r8000
DEVICE_MODEL := R8000
DEVICE_PACKAGES := $(BRCMFMAC_43602A1) $(USB3_PACKAGES)
$(Device/netgear)
NETGEAR_BOARD_ID := U12H315T00_NETGEAR
endef
TARGET_DEVICES += netgear-r8000
TARGET_DEVICES += netgear_r8000
define Device/netgear-r8500
define Device/netgear_r8500
DEVICE_MODEL := R8500
DEVICE_PACKAGES := $(BRCMFMAC_4366B1) $(USB3_PACKAGES)
$(Device/netgear)
NETGEAR_BOARD_ID := U12H334T00_NETGEAR
DEFAULT := n
endef
TARGET_DEVICES += netgear-r8500
TARGET_DEVICES += netgear_r8500
define Device/smartrg-sr400ac
define Device/smartrg_sr400ac
DEVICE_VENDOR := SmartRG
DEVICE_MODEL := SR400ac
DEVICE_PACKAGES := $(BRCMFMAC_43602A1) $(USB3_PACKAGES)
@ -386,26 +386,26 @@ define Device/smartrg-sr400ac
KERNEL_INITRAMFS_SUFFIX := .bin
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma-d16
endef
TARGET_DEVICES += smartrg-sr400ac
TARGET_DEVICES += smartrg_sr400ac
define Device/phicomm-k3
define Device/phicomm_k3
DEVICE_VENDOR := PHICOMM
DEVICE_MODEL := K3
DEVICE_PACKAGES := $(BRCMFMAC_4366C0) $(USB3_PACKAGES) luci-app-k3screenctrl
IMAGES := trx
endef
TARGET_DEVICES += phicomm-k3
TARGET_DEVICES += phicomm_k3
define Device/tenda-ac9
define Device/tenda_ac9
DEVICE_VENDOR := Tenda
DEVICE_MODEL := AC9
DEVICE_PACKAGES := $(B43) $(USB2_PACKAGES)
IMAGES := trx
IMAGE/trx := append-rootfs | trx-serial
endef
TARGET_DEVICES += tenda-ac9
TARGET_DEVICES += tenda_ac9
define Device/tplink-archer-c5-v2
define Device/tplink_archer-c5-v2
DEVICE_VENDOR := TP-LINK
DEVICE_MODEL := Archer C5
DEVICE_VARIANT := v2
@ -415,9 +415,9 @@ define Device/tplink-archer-c5-v2
TPLINK_BOARD := ARCHER-C5-V2
BROKEN := y
endef
TARGET_DEVICES += tplink-archer-c5-v2
TARGET_DEVICES += tplink_archer-c5-v2
define Device/tplink-archer-c9-v1
define Device/tplink_archer-c9-v1
DEVICE_VENDOR := TP-LINK
DEVICE_MODEL := Archer C9
DEVICE_VARIANT := v1
@ -427,6 +427,6 @@ define Device/tplink-archer-c9-v1
TPLINK_BOARD := ARCHERC9
BROKEN := y
endef
TARGET_DEVICES += tplink-archer-c9-v1
TARGET_DEVICES += tplink_archer-c9-v1
$(eval $(call BuildImage))

View File

@ -336,13 +336,13 @@ Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
+ action = READ_ONCE(ca->tcf_action);
+
+ wlen = skb_network_offset(skb);
+ if (tc_skb_protocol(skb) == htons(ETH_P_IP)) {
+ if (skb_protocol(skb, true) == htons(ETH_P_IP)) {
+ wlen += sizeof(struct iphdr);
+ if (!pskb_may_pull(skb, wlen))
+ goto out;
+
+ proto = NFPROTO_IPV4;
+ } else if (tc_skb_protocol(skb) == htons(ETH_P_IPV6)) {
+ } else if (skb_protocol(skb, true) == htons(ETH_P_IPV6)) {
+ wlen += sizeof(struct ipv6hdr);
+ if (!pskb_may_pull(skb, wlen))
+ goto out;

View File

@ -725,6 +725,7 @@ CONFIG_CC_STACKPROTECTOR_NONE=y
# CONFIG_CFG80211 is not set
# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
# CONFIG_CFQ_GROUP_IOSCHED is not set
# CONFIG_CGROUPS is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
# CONFIG_CHARGER_BQ24257 is not set
@ -2064,6 +2065,7 @@ CONFIG_INPUT_MISC=y
# CONFIG_INV_MPU6050_IIO is not set
# CONFIG_INV_MPU6050_SPI is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_IOSCHED_BFQ is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_NOOP=y
@ -5154,7 +5156,6 @@ CONFIG_TTY=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
# CONFIG_UBIFS_ATIME_SUPPORT is not set
# CONFIG_UBIFS_FS_ENCRYPTION is not set
CONFIG_UBIFS_FS_FORMAT4=y
# CONFIG_UBIFS_FS_SECURITY is not set
# CONFIG_UBSAN is not set
# CONFIG_UCB1400_CORE is not set

View File

@ -743,6 +743,7 @@ CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CEPH_LIB is not set
# CONFIG_CFG80211 is not set
# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
# CONFIG_CGROUPS is not set
# CONFIG_CHARGER_ADP5061 is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
@ -2186,6 +2187,7 @@ CONFIG_INPUT_MISC=y
# CONFIG_INV_MPU6050_IIO is not set
# CONFIG_INV_MPU6050_SPI is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_IOSCHED_BFQ is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_NOOP=y
@ -5428,7 +5430,6 @@ CONFIG_TTY=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
# CONFIG_UBIFS_ATIME_SUPPORT is not set
# CONFIG_UBIFS_FS_ENCRYPTION is not set
CONFIG_UBIFS_FS_FORMAT4=y
# CONFIG_UBIFS_FS_SECURITY is not set
# CONFIG_UBIFS_FS_XATTR is not set
# CONFIG_UBSAN is not set

View File

@ -791,6 +791,7 @@ CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CEPH_LIB is not set
# CONFIG_CFG80211 is not set
# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
# CONFIG_CGROUPS is not set
# CONFIG_CHARGER_ADP5061 is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
@ -2345,6 +2346,7 @@ CONFIG_INPUT_MISC=y
# CONFIG_INV_MPU6050_SPI is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_IONIC is not set
# CONFIG_IOSCHED_BFQ is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_NOOP=y
@ -5793,7 +5795,6 @@ CONFIG_TTY=y
# CONFIG_UBIFS_ATIME_SUPPORT is not set
# CONFIG_UBIFS_FS_AUTHENTICATION is not set
# CONFIG_UBIFS_FS_ENCRYPTION is not set
CONFIG_UBIFS_FS_FORMAT4=y
# CONFIG_UBIFS_FS_SECURITY is not set
# CONFIG_UBIFS_FS_XATTR is not set
# CONFIG_UBSAN is not set

View File

@ -1,63 +0,0 @@
From 93c33e6a7f3b0aef99d02252e6232a3d8b80f2d5 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 21 Jan 2018 15:47:50 +0100
Subject: ubifs: Add option to create UBI FS version 4 on empty UBI volume
Instead of creating an ubifs file system with format version 5 by
default on empty UBI volumes add a compile option to create an older ubi
with file system format version 4 instated. This allows it to be mount
as a volume on kernel versions < 4.10, which does not support format
version 5.
We saw that some people can not access their older data when they
downgraded from kernel 4.14 to kernel 4.9 to prevent this this option
would help.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
fs/ubifs/Kconfig | 13 +++++++++++++
fs/ubifs/sb.c | 6 ++++++
2 files changed, 19 insertions(+)
--- a/fs/ubifs/Kconfig
+++ b/fs/ubifs/Kconfig
@@ -74,3 +74,16 @@ config UBIFS_FS_SECURITY
the extended attribute support in advance.
If you are not using a security module, say N.
+
+config UBIFS_FS_FORMAT4
+ bool "Use file system format version 4 for new file systems"
+ depends on UBIFS_FS
+ help
+ Instead of creating new file systems with the new ubifs file
+ system version 5, use the old format version 4 for implicitly
+ by the driver created file systems on an empty UBI volume. This
+ makes it possible to mount these file systems also with kernel
+ versions before 4.10. The driver will still support file system
+ format version 5 for ubifs file systems created with version 5.
+
+ If you are unsure, say N.
--- a/fs/ubifs/sb.c
+++ b/fs/ubifs/sb.c
@@ -176,7 +176,9 @@ static int create_default_filesystem(str
tmp64 = (long long)max_buds * c->leb_size;
if (big_lpt)
sup_flags |= UBIFS_FLG_BIGLPT;
+#ifndef CONFIG_UBIFS_FS_FORMAT4
sup_flags |= UBIFS_FLG_DOUBLE_HASH;
+#endif
sup->ch.node_type = UBIFS_SB_NODE;
sup->key_hash = UBIFS_KEY_HASH_R5;
@@ -192,7 +194,11 @@ static int create_default_filesystem(str
sup->jhead_cnt = cpu_to_le32(DEFAULT_JHEADS_CNT);
sup->fanout = cpu_to_le32(DEFAULT_FANOUT);
sup->lsave_cnt = cpu_to_le32(c->lsave_cnt);
+#ifdef CONFIG_UBIFS_FS_FORMAT4
+ sup->fmt_version = cpu_to_le32(4);
+#else
sup->fmt_version = cpu_to_le32(UBIFS_FORMAT_VERSION);
+#endif
sup->time_gran = cpu_to_le32(DEFAULT_TIME_GRAN);
if (c->mount_opts.override_compr)
sup->default_compr = cpu_to_le16(c->mount_opts.compr_type);

View File

@ -1,63 +0,0 @@
From 93c33e6a7f3b0aef99d02252e6232a3d8b80f2d5 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 21 Jan 2018 15:47:50 +0100
Subject: ubifs: Add option to create UBI FS version 4 on empty UBI volume
Instead of creating an ubifs file system with format version 5 by
default on empty UBI volumes add a compile option to create an older ubi
with file system format version 4 instated. This allows it to be mount
as a volume on kernel versions < 4.10, which does not support format
version 5.
We saw that some people can not access their older data when they
downgraded from kernel 4.14 to kernel 4.9 to prevent this this option
would help.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
fs/ubifs/Kconfig | 13 +++++++++++++
fs/ubifs/sb.c | 6 ++++++
2 files changed, 19 insertions(+)
--- a/fs/ubifs/Kconfig
+++ b/fs/ubifs/Kconfig
@@ -85,3 +85,16 @@ config UBIFS_FS_SECURITY
the extended attribute support in advance.
If you are not using a security module, say N.
+
+config UBIFS_FS_FORMAT4
+ bool "Use file system format version 4 for new file systems"
+ depends on UBIFS_FS
+ help
+ Instead of creating new file systems with the new ubifs file
+ system version 5, use the old format version 4 for implicitly
+ by the driver created file systems on an empty UBI volume. This
+ makes it possible to mount these file systems also with kernel
+ versions before 4.10. The driver will still support file system
+ format version 5 for ubifs file systems created with version 5.
+
+ If you are unsure, say N.
--- a/fs/ubifs/sb.c
+++ b/fs/ubifs/sb.c
@@ -176,7 +176,9 @@ static int create_default_filesystem(str
tmp64 = (long long)max_buds * c->leb_size;
if (big_lpt)
sup_flags |= UBIFS_FLG_BIGLPT;
+#ifndef CONFIG_UBIFS_FS_FORMAT4
sup_flags |= UBIFS_FLG_DOUBLE_HASH;
+#endif
sup->ch.node_type = UBIFS_SB_NODE;
sup->key_hash = UBIFS_KEY_HASH_R5;
@@ -192,7 +194,11 @@ static int create_default_filesystem(str
sup->jhead_cnt = cpu_to_le32(DEFAULT_JHEADS_CNT);
sup->fanout = cpu_to_le32(DEFAULT_FANOUT);
sup->lsave_cnt = cpu_to_le32(c->lsave_cnt);
+#ifdef CONFIG_UBIFS_FS_FORMAT4
+ sup->fmt_version = cpu_to_le32(4);
+#else
sup->fmt_version = cpu_to_le32(UBIFS_FORMAT_VERSION);
+#endif
sup->time_gran = cpu_to_le32(DEFAULT_TIME_GRAN);
if (c->mount_opts.override_compr)
sup->default_compr = cpu_to_le16(c->mount_opts.compr_type);

View File

@ -1,66 +0,0 @@
From 93c33e6a7f3b0aef99d02252e6232a3d8b80f2d5 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 21 Jan 2018 15:47:50 +0100
Subject: ubifs: Add option to create UBI FS version 4 on empty UBI volume
Instead of creating an ubifs file system with format version 5 by
default on empty UBI volumes add a compile option to create an older ubi
with file system format version 4 instated. This allows it to be mount
as a volume on kernel versions < 4.10, which does not support format
version 5.
We saw that some people can not access their older data when they
downgraded from kernel 4.14 to kernel 4.9 to prevent this this option
would help.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
fs/ubifs/Kconfig | 13 +++++++++++++
fs/ubifs/sb.c | 6 ++++++
2 files changed, 19 insertions(+)
--- a/fs/ubifs/Kconfig
+++ b/fs/ubifs/Kconfig
@@ -85,6 +85,19 @@ config UBIFS_FS_SECURITY
If you are not using a security module, say N.
+config UBIFS_FS_FORMAT4
+ bool "Use file system format version 4 for new file systems"
+ depends on UBIFS_FS
+ help
+ Instead of creating new file systems with the new ubifs file
+ system version 5, use the old format version 4 for implicitly
+ by the driver created file systems on an empty UBI volume. This
+ makes it possible to mount these file systems also with kernel
+ versions before 4.10. The driver will still support file system
+ format version 5 for ubifs file systems created with version 5.
+
+ If you are unsure, say N.
+
config UBIFS_FS_AUTHENTICATION
bool "UBIFS authentication support"
select KEYS
--- a/fs/ubifs/sb.c
+++ b/fs/ubifs/sb.c
@@ -175,7 +175,9 @@ static int create_default_filesystem(str
tmp64 = (long long)max_buds * c->leb_size;
if (big_lpt)
sup_flags |= UBIFS_FLG_BIGLPT;
+#ifndef CONFIG_UBIFS_FS_FORMAT4
sup_flags |= UBIFS_FLG_DOUBLE_HASH;
+#endif
if (ubifs_authenticated(c)) {
sup_flags |= UBIFS_FLG_AUTHENTICATION;
@@ -201,7 +203,11 @@ static int create_default_filesystem(str
sup->jhead_cnt = cpu_to_le32(DEFAULT_JHEADS_CNT);
sup->fanout = cpu_to_le32(DEFAULT_FANOUT);
sup->lsave_cnt = cpu_to_le32(c->lsave_cnt);
+#ifdef CONFIG_UBIFS_FS_FORMAT4
+ sup->fmt_version = cpu_to_le32(4);
+#else
sup->fmt_version = cpu_to_le32(UBIFS_FORMAT_VERSION);
+#endif
sup->time_gran = cpu_to_le32(DEFAULT_TIME_GRAN);
if (c->mount_opts.override_compr)
sup->default_compr = cpu_to_le16(c->mount_opts.compr_type);

View File

@ -19,8 +19,8 @@ DEFAULT_PACKAGES += \
kmod-leds-gpio kmod-gpio-button-hotplug swconfig \
kmod-ata-ahci kmod-ata-ahci-platform \
kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \
kmod-usb-phy-qcom-dwc3 kmod-usb3 kmod-usb-dwc3-qcom \
kmod-ath10k-ct wpad-openssl \
kmod-phy-qcom-ipq806x-usb kmod-usb3 kmod-usb-dwc3-qcom \
kmod-ath10k-ct wpad-basic \
uboot-envtools
$(eval $(call BuildTarget))

View File

@ -31,13 +31,13 @@
};
&ss_phy_0 {
rx_eq = <2>;
tx_deamp_3_5db = <32>;
mpll = <0xa0>;
qcom,rx-eq = <2>;
qcom,tx-deamp_3_5db = <32>;
qcom,mpll = <5>;
};
&ss_phy_1 {
rx_eq = <2>;
tx_deamp_3_5db = <32>;
mpll = <0xa0>;
qcom,rx-eq = <2>;
qcom,tx-deamp_3_5db = <32>;
qcom,mpll = <5>;
};

View File

@ -46,15 +46,15 @@
};
&ss_phy_0 {
rx_eq = <2>;
tx_deamp_3_5db = <32>;
mpll = <0xa0>;
qcom,rx-eq = <2>;
qcom,tx-deamp_3_5db = <32>;
qcom,mpll = <5>;
};
&ss_phy_1 {
rx_eq = <2>;
tx_deamp_3_5db = <32>;
mpll = <0xa0>;
qcom,rx-eq = <2>;
qcom,tx-deamp_3_5db = <32>;
qcom,mpll = <5>;
};
&opp_table0 {

View File

@ -0,0 +1,16 @@
define KernelPackage/phy-qcom-ipq806x-usb
TITLE:=Qualcomm IPQ806x DWC3 USB PHY driver
DEPENDS:=@TARGET_ipq806x
KCONFIG:= CONFIG_PHY_QCOM_IPQ806X_USB
FILES:= \
$(LINUX_DIR)/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.ko
AUTOLOAD:=$(call AutoLoad,45,phy-qcom-ipq806x-usb,1)
$(call AddDepends/usb)
endef
define KernelPackage/phy-qcom-ipq806x-usb/description
This driver provides support for the integrated DesignWare
USB3 IP Core within the QCOM SoCs.
endef
$(eval $(call KernelPackage,phy-qcom-ipq806x-usb))

View File

@ -1,614 +0,0 @@
From b9004f4fd23e4c614d71c972f3a9311665480e29 Mon Sep 17 00:00:00 2001
From: Andy Gross <agross@codeaurora.org>
Date: Thu, 9 Mar 2017 08:19:18 +0100
Subject: [PATCH 32/69] phy: add qcom dwc3 phy
Signed-off-by: Andy Gross <agross@codeaurora.org>
---
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
@@ -91,3 +91,15 @@ config PHY_QCOM_USB_HSIC
select GENERIC_PHY
help
Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
+config PHY_QCOM_DWC3
+ tristate "QCOM DWC3 USB PHY support"
+ depends on ARCH_QCOM
+ depends on HAS_IOMEM
+ depends on OF
+ select GENERIC_PHY
+ help
+ This option enables support for the Synopsis PHYs present inside the
+ Qualcomm USB3.0 DWC3 controller. This driver supports both HS and SS
+ PHY controllers.
+
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_PHY_QCOM_UFS_14NM) += phy-
obj-$(CONFIG_PHY_QCOM_UFS_20NM) += phy-qcom-ufs-qmp-20nm.o
obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
+obj-$(CONFIG_PHY_QCOM_DWC3) += phy-qcom-dwc3.o
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-dwc3.c
@@ -0,0 +1,578 @@
+/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*/
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+
+/**
+ * USB QSCRATCH Hardware registers
+ */
+#define QSCRATCH_GENERAL_CFG (0x08)
+#define HSUSB_PHY_CTRL_REG (0x10)
+
+/* PHY_CTRL_REG */
+#define HSUSB_CTRL_DMSEHV_CLAMP BIT(24)
+#define HSUSB_CTRL_USB2_SUSPEND BIT(23)
+#define HSUSB_CTRL_UTMI_CLK_EN BIT(21)
+#define HSUSB_CTRL_UTMI_OTG_VBUS_VALID BIT(20)
+#define HSUSB_CTRL_USE_CLKCORE BIT(18)
+#define HSUSB_CTRL_DPSEHV_CLAMP BIT(17)
+#define HSUSB_CTRL_COMMONONN BIT(11)
+#define HSUSB_CTRL_ID_HV_CLAMP BIT(9)
+#define HSUSB_CTRL_OTGSESSVLD_CLAMP BIT(8)
+#define HSUSB_CTRL_CLAMP_EN BIT(7)
+#define HSUSB_CTRL_RETENABLEN BIT(1)
+#define HSUSB_CTRL_POR BIT(0)
+
+/* QSCRATCH_GENERAL_CFG */
+#define HSUSB_GCFG_XHCI_REV BIT(2)
+
+/**
+ * USB QSCRATCH Hardware registers
+ */
+#define SSUSB_PHY_CTRL_REG (0x30)
+#define SSUSB_PHY_PARAM_CTRL_1 (0x34)
+#define SSUSB_PHY_PARAM_CTRL_2 (0x38)
+#define CR_PROTOCOL_DATA_IN_REG (0x3c)
+#define CR_PROTOCOL_DATA_OUT_REG (0x40)
+#define CR_PROTOCOL_CAP_ADDR_REG (0x44)
+#define CR_PROTOCOL_CAP_DATA_REG (0x48)
+#define CR_PROTOCOL_READ_REG (0x4c)
+#define CR_PROTOCOL_WRITE_REG (0x50)
+
+/* PHY_CTRL_REG */
+#define SSUSB_CTRL_REF_USE_PAD BIT(28)
+#define SSUSB_CTRL_TEST_POWERDOWN BIT(27)
+#define SSUSB_CTRL_LANE0_PWR_PRESENT BIT(24)
+#define SSUSB_CTRL_SS_PHY_EN BIT(8)
+#define SSUSB_CTRL_SS_PHY_RESET BIT(7)
+
+/* SSPHY control registers - Does this need 0x30? */
+#define SSPHY_CTRL_RX_OVRD_IN_HI(lane) (0x1006 + 0x100 * lane)
+#define SSPHY_CTRL_TX_OVRD_DRV_LO(lane) (0x1002 + 0x100 * lane)
+
+/* SSPHY SoC version specific values */
+#define SSPHY_RX_EQ_VALUE 4 /* Override value for rx_eq */
+#define SSPHY_TX_DEEMPH_3_5DB 23 /* Override value for transmit
+ preemphasis */
+#define SSPHY_MPLL_VALUE 0 /* Override value for mpll */
+
+/* QSCRATCH PHY_PARAM_CTRL1 fields */
+#define PHY_PARAM_CTRL1_TX_FULL_SWING_MASK 0x07f00000u
+#define PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK 0x000fc000u
+#define PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK 0x00003f00u
+#define PHY_PARAM_CTRL1_LOS_BIAS_MASK 0x000000f8u
+
+#define PHY_PARAM_CTRL1_MASK \
+ (PHY_PARAM_CTRL1_TX_FULL_SWING_MASK | \
+ PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK | \
+ PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK | \
+ PHY_PARAM_CTRL1_LOS_BIAS_MASK)
+
+#define PHY_PARAM_CTRL1_TX_FULL_SWING(x) \
+ (((x) << 20) & PHY_PARAM_CTRL1_TX_FULL_SWING_MASK)
+#define PHY_PARAM_CTRL1_TX_DEEMPH_6DB(x) \
+ (((x) << 14) & PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK)
+#define PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB(x) \
+ (((x) << 8) & PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK)
+#define PHY_PARAM_CTRL1_LOS_BIAS(x) \
+ (((x) << 3) & PHY_PARAM_CTRL1_LOS_BIAS_MASK)
+
+/* RX OVRD IN HI bits */
+#define RX_OVRD_IN_HI_RX_RESET_OVRD BIT(13)
+#define RX_OVRD_IN_HI_RX_RX_RESET BIT(12)
+#define RX_OVRD_IN_HI_RX_EQ_OVRD BIT(11)
+#define RX_OVRD_IN_HI_RX_EQ_MASK 0x0700
+#define RX_OVRD_IN_HI_RX_EQ_SHIFT 8
+#define RX_OVRD_IN_HI_RX_EQ_EN_OVRD BIT(7)
+#define RX_OVRD_IN_HI_RX_EQ_EN BIT(6)
+#define RX_OVRD_IN_HI_RX_LOS_FILTER_OVRD BIT(5)
+#define RX_OVRD_IN_HI_RX_LOS_FILTER_MASK 0x0018
+#define RX_OVRD_IN_HI_RX_RATE_OVRD BIT(2)
+#define RX_OVRD_IN_HI_RX_RATE_MASK 0x0003
+
+/* TX OVRD DRV LO register bits */
+#define TX_OVRD_DRV_LO_AMPLITUDE_MASK 0x007F
+#define TX_OVRD_DRV_LO_PREEMPH_MASK 0x3F80
+#define TX_OVRD_DRV_LO_PREEMPH_SHIFT 7
+#define TX_OVRD_DRV_LO_EN BIT(14)
+
+/* SS CAP register bits */
+#define SS_CR_CAP_ADDR_REG BIT(0)
+#define SS_CR_CAP_DATA_REG BIT(0)
+#define SS_CR_READ_REG BIT(0)
+#define SS_CR_WRITE_REG BIT(0)
+
+struct qcom_dwc3_usb_phy {
+ struct regmap *base;
+ struct device *dev;
+ struct clk *xo_clk;
+ struct clk *ref_clk;
+ u32 rx_eq;
+ u32 tx_deamp_3_5db;
+ u32 mpll;
+};
+
+struct qcom_dwc3_phy_drvdata {
+ struct phy_ops ops;
+ u32 clk_rate;
+};
+
+/**
+ * Write register and read back masked value to confirm it is written
+ *
+ * @base - QCOM DWC3 PHY base virtual address.
+ * @offset - register offset.
+ * @mask - register bitmask specifying what should be updated
+ * @val - value to write.
+ */
+static inline void qcom_dwc3_phy_write_readback(
+ struct qcom_dwc3_usb_phy *phy_dwc3, u32 offset,
+ const u32 mask, u32 val)
+{
+ u32 write_val, tmp;
+
+ tmp = regmap_read(phy_dwc3->base, offset, &tmp);
+ tmp &= ~mask; /* retain other bits */
+ write_val = tmp | val;
+
+ regmap_write(phy_dwc3->base, offset, write_val);
+
+ /* Read back to see if val was written */
+ regmap_read(phy_dwc3->base, offset, &tmp);
+ tmp &= mask; /* clear other bits */
+
+ if (tmp != val)
+ dev_err(phy_dwc3->dev, "write: %x to QSCRATCH: %x FAILED\n",
+ val, offset);
+}
+
+static int wait_for_latch(struct regmap *base, u32 addr)
+{
+ u32 retry = 10, data;
+
+ while (true) {
+ regmap_read(base, addr, &data);
+ if (!data)
+ break;
+
+ if (--retry == 0)
+ return -ETIMEDOUT;
+
+ usleep_range(10, 20);
+ }
+
+ return 0;
+}
+
+/**
+ * Write SSPHY register
+ *
+ * @base - QCOM DWC3 PHY base virtual address.
+ * @addr - SSPHY address to write.
+ * @val - value to write.
+ */
+static int qcom_dwc3_ss_write_phycreg(struct qcom_dwc3_usb_phy *phy_dwc3,
+ u32 addr, u32 val)
+{
+ int ret;
+
+ regmap_write(phy_dwc3->base, CR_PROTOCOL_DATA_IN_REG, addr);
+ regmap_write(phy_dwc3->base, CR_PROTOCOL_CAP_ADDR_REG, SS_CR_CAP_ADDR_REG);
+
+ ret = wait_for_latch(phy_dwc3->base, CR_PROTOCOL_CAP_ADDR_REG);
+ if (ret)
+ goto err_wait;
+
+ regmap_write(phy_dwc3->base, CR_PROTOCOL_DATA_IN_REG, val);
+ regmap_write(phy_dwc3->base, CR_PROTOCOL_CAP_DATA_REG, SS_CR_CAP_DATA_REG);
+
+ ret = wait_for_latch(phy_dwc3->base, CR_PROTOCOL_CAP_DATA_REG);
+ if (ret)
+ goto err_wait;
+
+ regmap_write(phy_dwc3->base, CR_PROTOCOL_WRITE_REG, SS_CR_WRITE_REG);
+
+ ret = wait_for_latch(phy_dwc3->base, CR_PROTOCOL_WRITE_REG);
+
+err_wait:
+ if (ret)
+ dev_err(phy_dwc3->dev, "timeout waiting for latch\n");
+ return ret;
+}
+
+/**
+ * Read SSPHY register.
+ *
+ * @base - QCOM DWC3 PHY base virtual address.
+ * @addr - SSPHY address to read.
+ */
+static int qcom_dwc3_ss_read_phycreg(struct regmap *base, u32 addr, u32 *val)
+{
+ int ret;
+
+ regmap_write(base, CR_PROTOCOL_DATA_IN_REG, addr);
+ regmap_write(base, CR_PROTOCOL_CAP_ADDR_REG, SS_CR_CAP_ADDR_REG);
+
+ ret = wait_for_latch(base, CR_PROTOCOL_CAP_ADDR_REG);
+ if (ret)
+ goto err_wait;
+
+ /*
+ * Due to hardware bug, first read of SSPHY register might be
+ * incorrect. Hence as workaround, SW should perform SSPHY register
+ * read twice, but use only second read and ignore first read.
+ */
+ regmap_write(base, CR_PROTOCOL_READ_REG, SS_CR_READ_REG);
+
+ ret = wait_for_latch(base, CR_PROTOCOL_READ_REG);
+ if (ret)
+ goto err_wait;
+
+ /* throwaway read */
+ regmap_read(base, CR_PROTOCOL_DATA_OUT_REG, &ret);
+
+ regmap_write(base, CR_PROTOCOL_READ_REG, SS_CR_READ_REG);
+
+ ret = wait_for_latch(base, CR_PROTOCOL_READ_REG);
+ if (ret)
+ goto err_wait;
+
+ regmap_read(base, CR_PROTOCOL_DATA_OUT_REG, val);
+
+err_wait:
+ return ret;
+}
+
+static int qcom_dwc3_hs_phy_init(struct phy *phy)
+{
+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+ int ret;
+ u32 val;
+
+ ret = clk_prepare_enable(phy_dwc3->xo_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(phy_dwc3->ref_clk);
+ if (ret) {
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+ return ret;
+ }
+
+ /*
+ * HSPHY Initialization: Enable UTMI clock, select 19.2MHz fsel
+ * enable clamping, and disable RETENTION (power-on default is ENABLED)
+ */
+ val = HSUSB_CTRL_DPSEHV_CLAMP | HSUSB_CTRL_DMSEHV_CLAMP |
+ HSUSB_CTRL_RETENABLEN | HSUSB_CTRL_COMMONONN |
+ HSUSB_CTRL_OTGSESSVLD_CLAMP | HSUSB_CTRL_ID_HV_CLAMP |
+ HSUSB_CTRL_DPSEHV_CLAMP | HSUSB_CTRL_UTMI_OTG_VBUS_VALID |
+ HSUSB_CTRL_UTMI_CLK_EN | HSUSB_CTRL_CLAMP_EN | 0x70;
+
+ /* use core clock if external reference is not present */
+ if (!phy_dwc3->xo_clk)
+ val |= HSUSB_CTRL_USE_CLKCORE;
+
+ regmap_write(phy_dwc3->base, HSUSB_PHY_CTRL_REG, val);
+ usleep_range(2000, 2200);
+
+ /* Disable (bypass) VBUS and ID filters */
+ regmap_write(phy_dwc3->base, QSCRATCH_GENERAL_CFG, HSUSB_GCFG_XHCI_REV);
+
+ return 0;
+}
+
+static int qcom_dwc3_hs_phy_exit(struct phy *phy)
+{
+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+
+ clk_disable_unprepare(phy_dwc3->ref_clk);
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+
+ return 0;
+}
+
+static int qcom_dwc3_ss_phy_init(struct phy *phy)
+{
+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+ int ret;
+ u32 data = 0;
+
+ ret = clk_prepare_enable(phy_dwc3->xo_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(phy_dwc3->ref_clk);
+ if (ret) {
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+ return ret;
+ }
+
+ /* reset phy */
+ regmap_read(phy_dwc3->base, SSUSB_PHY_CTRL_REG, &data);
+ regmap_write(phy_dwc3->base, SSUSB_PHY_CTRL_REG,
+ data | SSUSB_CTRL_SS_PHY_RESET);
+ usleep_range(2000, 2200);
+ regmap_write(phy_dwc3->base, SSUSB_PHY_CTRL_REG, data);
+
+ /* clear REF_PAD if we don't have XO clk */
+ if (!phy_dwc3->xo_clk)
+ data &= ~SSUSB_CTRL_REF_USE_PAD;
+ else
+ data |= SSUSB_CTRL_REF_USE_PAD;
+
+ regmap_write(phy_dwc3->base, SSUSB_PHY_CTRL_REG, data);
+
+ /* wait for ref clk to become stable, this can take up to 30ms */
+ msleep(30);
+
+ data |= SSUSB_CTRL_SS_PHY_EN | SSUSB_CTRL_LANE0_PWR_PRESENT;
+ regmap_write(phy_dwc3->base, SSUSB_PHY_CTRL_REG, data);
+
+ /*
+ * WORKAROUND: There is SSPHY suspend bug due to which USB enumerates
+ * in HS mode instead of SS mode. Workaround it by asserting
+ * LANE0.TX_ALT_BLOCK.EN_ALT_BUS to enable TX to use alt bus mode
+ */
+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base, 0x102D, &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data |= (1 << 7);
+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3, 0x102D, data);
+ if (ret)
+ goto err_phy_trans;
+
+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base, 0x1010, &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data &= ~0xff0;
+ data |= 0x20;
+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3, 0x1010, data);
+ if (ret)
+ goto err_phy_trans;
+
+ /*
+ * Fix RX Equalization setting as follows
+ * LANE0.RX_OVRD_IN_HI. RX_EQ_EN set to 0
+ * LANE0.RX_OVRD_IN_HI.RX_EQ_EN_OVRD set to 1
+ * LANE0.RX_OVRD_IN_HI.RX_EQ set based on SoC version
+ * LANE0.RX_OVRD_IN_HI.RX_EQ_OVRD set to 1
+ */
+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base,
+ SSPHY_CTRL_RX_OVRD_IN_HI(0), &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data &= ~RX_OVRD_IN_HI_RX_EQ_EN;
+ data |= RX_OVRD_IN_HI_RX_EQ_EN_OVRD;
+ data &= ~RX_OVRD_IN_HI_RX_EQ_MASK;
+ data |= phy_dwc3->rx_eq << RX_OVRD_IN_HI_RX_EQ_SHIFT;
+ data |= RX_OVRD_IN_HI_RX_EQ_OVRD;
+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3,
+ SSPHY_CTRL_RX_OVRD_IN_HI(0), data);
+ if (ret)
+ goto err_phy_trans;
+
+ /*
+ * Set EQ and TX launch amplitudes as follows
+ * LANE0.TX_OVRD_DRV_LO.PREEMPH set based on SoC version
+ * LANE0.TX_OVRD_DRV_LO.AMPLITUDE set to 110
+ * LANE0.TX_OVRD_DRV_LO.EN set to 1.
+ */
+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base,
+ SSPHY_CTRL_TX_OVRD_DRV_LO(0), &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data &= ~TX_OVRD_DRV_LO_PREEMPH_MASK;
+ data |= phy_dwc3->tx_deamp_3_5db << TX_OVRD_DRV_LO_PREEMPH_SHIFT;
+ data &= ~TX_OVRD_DRV_LO_AMPLITUDE_MASK;
+ data |= 0x6E;
+ data |= TX_OVRD_DRV_LO_EN;
+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3,
+ SSPHY_CTRL_TX_OVRD_DRV_LO(0), data);
+ if (ret)
+ goto err_phy_trans;
+
+ qcom_dwc3_ss_write_phycreg(phy_dwc3, 0x30, phy_dwc3->mpll);
+
+ /*
+ * Set the QSCRATCH PHY_PARAM_CTRL1 parameters as follows
+ * TX_FULL_SWING [26:20] amplitude to 110
+ * TX_DEEMPH_6DB [19:14] to 32
+ * TX_DEEMPH_3_5DB [13:8] set based on SoC version
+ * LOS_BIAS [7:3] to 9
+ */
+ regmap_read(phy_dwc3->base, SSUSB_PHY_PARAM_CTRL_1, &data);
+
+ data &= ~PHY_PARAM_CTRL1_MASK;
+
+ data |= PHY_PARAM_CTRL1_TX_FULL_SWING(0x6e) |
+ PHY_PARAM_CTRL1_TX_DEEMPH_6DB(0x20) |
+ PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB(phy_dwc3->tx_deamp_3_5db) |
+ PHY_PARAM_CTRL1_LOS_BIAS(0x9);
+
+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_PARAM_CTRL_1,
+ PHY_PARAM_CTRL1_MASK, data);
+
+err_phy_trans:
+ return ret;
+}
+
+static int qcom_dwc3_ss_phy_exit(struct phy *phy)
+{
+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+
+ /* Sequence to put SSPHY in low power state:
+ * 1. Clear REF_PHY_EN in PHY_CTRL_REG
+ * 2. Clear REF_USE_PAD in PHY_CTRL_REG
+ * 3. Set TEST_POWERED_DOWN in PHY_CTRL_REG to enable PHY retention
+ */
+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
+ SSUSB_CTRL_SS_PHY_EN, 0x0);
+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
+ SSUSB_CTRL_REF_USE_PAD, 0x0);
+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
+ SSUSB_CTRL_TEST_POWERDOWN, 0x0);
+
+ clk_disable_unprepare(phy_dwc3->ref_clk);
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+
+ return 0;
+}
+
+static const struct qcom_dwc3_phy_drvdata qcom_dwc3_hs_drvdata = {
+ .ops = {
+ .init = qcom_dwc3_hs_phy_init,
+ .exit = qcom_dwc3_hs_phy_exit,
+ .owner = THIS_MODULE,
+ },
+ .clk_rate = 60000000,
+};
+
+static const struct qcom_dwc3_phy_drvdata qcom_dwc3_ss_drvdata = {
+ .ops = {
+ .init = qcom_dwc3_ss_phy_init,
+ .exit = qcom_dwc3_ss_phy_exit,
+ .owner = THIS_MODULE,
+ },
+ .clk_rate = 125000000,
+};
+
+static const struct of_device_id qcom_dwc3_phy_table[] = {
+ { .compatible = "qcom,dwc3-hs-usb-phy", .data = &qcom_dwc3_hs_drvdata },
+ { .compatible = "qcom,dwc3-ss-usb-phy", .data = &qcom_dwc3_ss_drvdata },
+ { /* Sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, qcom_dwc3_phy_table);
+
+static int qcom_dwc3_phy_probe(struct platform_device *pdev)
+{
+ struct qcom_dwc3_usb_phy *phy_dwc3;
+ struct phy_provider *phy_provider;
+ struct phy *generic_phy;
+ struct resource *res;
+ const struct of_device_id *match;
+ const struct qcom_dwc3_phy_drvdata *data;
+ struct device_node *np;
+
+ phy_dwc3 = devm_kzalloc(&pdev->dev, sizeof(*phy_dwc3), GFP_KERNEL);
+ if (!phy_dwc3)
+ return -ENOMEM;
+
+ match = of_match_node(qcom_dwc3_phy_table, pdev->dev.of_node);
+ data = match->data;
+
+ phy_dwc3->dev = &pdev->dev;
+
+ phy_dwc3->base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "regmap");
+ if (IS_ERR_OR_NULL(phy_dwc3->base))
+ return PTR_ERR_OR_ZERO(phy_dwc3->base) ? : -EINVAL;
+
+ phy_dwc3->ref_clk = devm_clk_get(phy_dwc3->dev, "ref");
+ if (IS_ERR(phy_dwc3->ref_clk)) {
+ dev_dbg(phy_dwc3->dev, "cannot get reference clock\n");
+ return PTR_ERR(phy_dwc3->ref_clk);
+ }
+
+ clk_set_rate(phy_dwc3->ref_clk, data->clk_rate);
+
+ phy_dwc3->xo_clk = devm_clk_get(phy_dwc3->dev, "xo");
+ if (IS_ERR(phy_dwc3->xo_clk)) {
+ dev_dbg(phy_dwc3->dev, "cannot get TCXO clock\n");
+ phy_dwc3->xo_clk = NULL;
+ }
+
+ /* Parse device node to probe HSIO settings */
+ np = of_node_get(pdev->dev.of_node);
+ if (!of_compat_cmp(match->compatible, "qcom,dwc3-ss-usb-phy",
+ strlen(match->compatible))) {
+
+ if (of_property_read_u32(np, "rx_eq", &phy_dwc3->rx_eq) ||
+ of_property_read_u32(np, "tx_deamp_3_5db",
+ &phy_dwc3->tx_deamp_3_5db) ||
+ of_property_read_u32(np, "mpll", &phy_dwc3->mpll)) {
+
+ dev_err(phy_dwc3->dev, "cannot get HSIO settings from device node, using default values\n");
+
+ /* Default HSIO settings */
+ phy_dwc3->rx_eq = SSPHY_RX_EQ_VALUE;
+ phy_dwc3->tx_deamp_3_5db = SSPHY_TX_DEEMPH_3_5DB;
+ phy_dwc3->mpll = SSPHY_MPLL_VALUE;
+ }
+ }
+
+ generic_phy = devm_phy_create(phy_dwc3->dev, pdev->dev.of_node,
+ &data->ops);
+
+ if (IS_ERR(generic_phy))
+ return PTR_ERR(generic_phy);
+
+ phy_set_drvdata(generic_phy, phy_dwc3);
+ platform_set_drvdata(pdev, phy_dwc3);
+
+ phy_provider = devm_of_phy_provider_register(phy_dwc3->dev,
+ of_phy_simple_xlate);
+
+ if (IS_ERR(phy_provider))
+ return PTR_ERR(phy_provider);
+
+ return 0;
+}
+
+static struct platform_driver qcom_dwc3_phy_driver = {
+ .probe = qcom_dwc3_phy_probe,
+ .driver = {
+ .name = "qcom-dwc3-usb-phy",
+ .owner = THIS_MODULE,
+ .of_match_table = qcom_dwc3_phy_table,
+ },
+};
+
+module_platform_driver(qcom_dwc3_phy_driver);
+
+MODULE_ALIAS("platform:phy-qcom-dwc3");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
+MODULE_AUTHOR("Ivan T. Ivanov <iivanov@mm-sol.com>");
+MODULE_DESCRIPTION("DesignWare USB3 QCOM PHY driver");

View File

@ -1,29 +0,0 @@
--- a/drivers/phy/qualcomm/phy-qcom-dwc3.c
+++ b/drivers/phy/qualcomm/phy-qcom-dwc3.c
@@ -491,7 +491,6 @@ static int qcom_dwc3_phy_probe(struct pl
struct qcom_dwc3_usb_phy *phy_dwc3;
struct phy_provider *phy_provider;
struct phy *generic_phy;
- struct resource *res;
const struct of_device_id *match;
const struct qcom_dwc3_phy_drvdata *data;
struct device_node *np;
@@ -505,7 +504,17 @@ static int qcom_dwc3_phy_probe(struct pl
phy_dwc3->dev = &pdev->dev;
- phy_dwc3->base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "regmap");
+ np = of_parse_phandle(pdev->dev.of_node, "regmap", 0);
+ if (!np)
+ return -ENODEV;
+
+ if (!of_device_is_compatible(np, "syscon"))
+ return -EINVAL;
+
+ phy_dwc3->base = device_node_to_regmap(np);
+
+ of_node_put(np);
+
if (IS_ERR_OR_NULL(phy_dwc3->base))
return PTR_ERR_OR_ZERO(phy_dwc3->base) ? : -EINVAL;

View File

@ -67,7 +67,7 @@
+ };
+
+ opp_table0: opp_table0 {
+ compatible = "operating-points-v2-qcom-cpu";
+ compatible = "operating-points-v2-kryo-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+
+ opp-384000000 {
@ -718,16 +718,16 @@
+ };
+
+ hs_phy_0: hs_phy_0 {
+ compatible = "qcom,dwc3-hs-usb-phy";
+ regmap = <&usb3_0>;
+ compatible = "qcom,ipq806x-usb-phy-hs";
+ reg = <0x110f8800 0x30>;
+ clocks = <&gcc USB30_0_UTMI_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
+
+ ss_phy_0: ss_phy_0 {
+ compatible = "qcom,dwc3-ss-usb-phy";
+ regmap = <&usb3_0>;
+ compatible = "qcom,ipq806x-usb-phy-ss";
+ reg = <0x110f8830 0x30>;
+ clocks = <&gcc USB30_0_MASTER_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
@ -760,16 +760,16 @@
+ };
+
+ hs_phy_1: hs_phy_1 {
+ compatible = "qcom,dwc3-hs-usb-phy";
+ regmap = <&usb3_1>;
+ compatible = "qcom,ipq806x-usb-phy-hs";
+ reg = <0x100f8800 0x30>;
+ clocks = <&gcc USB30_1_UTMI_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
+
+ ss_phy_1: ss_phy_1 {
+ compatible = "qcom,dwc3-ss-usb-phy";
+ regmap = <&usb3_1>;
+ compatible = "qcom,ipq806x-usb-phy-ss";
+ reg = <0x100f8830 0x30>;
+ clocks = <&gcc USB30_1_MASTER_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;

View File

@ -1,13 +1,7 @@
Subject: [PATCH v12 14/14] cpufreq: qcom: Add support for krait based socs
Date: Tue, 14 Aug 2018 17:42:33 +0530
Message-Id: <1534248753-2440-15-git-send-email-sricharan@codeaurora.org>
X-Mailer: git-send-email 1.9.1
In-Reply-To: <1534248753-2440-1-git-send-email-sricharan@codeaurora.org>
References: <1534248753-2440-1-git-send-email-sricharan@codeaurora.org>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
From a8811ec764f95a04ba82f6f457e28c5e9e36e36b Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Fri, 13 Mar 2020 18:52:13 +0100
Subject: cpufreq: qcom: Add support for krait based socs
In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
that has KRAIT processors the voltage/current value of each OPP
@ -18,27 +12,27 @@ the efuse value. This is similar to the existing code for
kryo cores. So adding support for krait cores here.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
.../devicetree/bindings/opp/qcom-nvmem-cpufreq.txt | 3 +-
drivers/cpufreq/Kconfig.arm | 2 +-
drivers/cpufreq/cpufreq-dt-platdev.c | 5 +
drivers/cpufreq/qcom-cpufreq-nvmem.c | 151 +++++++++++++++++++--
4 files changed, 149 insertions(+), 12 deletions(-)
drivers/cpufreq/qcom-cpufreq-nvmem.c | 191 +++++++++++++++++++--
4 files changed, 183 insertions(+), 18 deletions(-)
# diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
# index 6dcdfcd..7bc0f1a 100644
# --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
# +++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
# @@ -19,7 +19,8 @@ In 'cpus' nodes:
--- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
+++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
@@ -19,7 +19,8 @@ In 'cpu' nodes:
# In 'operating-points-v2' table:
# - compatible: Should be
# - - 'operating-points-v2-qcom-cpu' for apq8096 and msm8996.
# + - 'operating-points-v2-qcom-cpu' for apq8096, msm8996, msm8974,
# + apq8064, msm8960 and ipq8074.
# - nvmem-cells: A phandle pointing to a nvmem-cells node representing the
# efuse registers that has information about the
# speedbin that is used to select the right frequency/voltage
In 'operating-points-v2' table:
- compatible: Should be
- - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
+ - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
+ apq8064, ipq8064, msm8960 and ipq8074.
Optional properties:
--------------------
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -134,7 +134,7 @@ config ARM_OMAP2PLUS_CPUFREQ
@ -77,16 +71,17 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
struct qcom_cpufreq_drv {
- struct opp_table **opp_tables;
+ struct opp_table **opp_tables1;
+ struct opp_table **opp_tables2;
+ struct opp_table **names_opp_tables;
+ struct opp_table **hw_opp_tables;
struct opp_table **genpd_opp_tables;
u32 versions;
const struct qcom_cpufreq_match_data *data;
@@ -62,6 +64,79 @@ struct qcom_cpufreq_drv {
@@ -62,6 +64,84 @@ struct qcom_cpufreq_drv {
static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev;
+static void get_krait_bin_format_a(int *speed, int *pvs, int *pvs_ver,
+static void get_krait_bin_format_a(struct device *cpu_dev,
+ int *speed, int *pvs, int *pvs_ver,
+ struct nvmem_cell *pvs_nvmem, u8 *buf)
+{
+ u32 pte_efuse;
@ -99,9 +94,9 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+
+ if (*speed == 0xf) {
+ *speed = 0;
+ pr_warn("Speed bin: Defaulting to %d\n", *speed);
+ dev_warn(cpu_dev, "Speed bin: Defaulting to %d\n", *speed);
+ } else {
+ pr_info("Speed bin: %d\n", *speed);
+ dev_dbg(cpu_dev, "Speed bin: %d\n", *speed);
+ }
+
+ *pvs = (pte_efuse >> 10) & 0x7;
@ -110,39 +105,43 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+
+ if (*pvs == 0x7) {
+ *pvs = 0;
+ pr_warn("PVS bin: Defaulting to %d\n", *pvs);
+ dev_warn(cpu_dev, "PVS bin: Defaulting to %d\n", *pvs);
+ } else {
+ pr_info("PVS bin: %d\n", *pvs);
+ dev_dbg(cpu_dev, "PVS bin: %d\n", *pvs);
+ }
+}
+
+static void get_krait_bin_format_b(int *speed, int *pvs, int *pvs_ver,
+static void get_krait_bin_format_b(struct device *cpu_dev,
+ int *speed, int *pvs, int *pvs_ver,
+ struct nvmem_cell *pvs_nvmem, u8 *buf)
+{
+ u32 pte_efuse, redundant_sel;
+
+ pte_efuse = *((u32 *)buf);
+ redundant_sel = (pte_efuse >> 24) & 0x7;
+ *speed = pte_efuse & 0x7;
+
+ /* 4 bits of PVS are in efuse register bits 31, 8-6. */
+ *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7);
+ *pvs_ver = (pte_efuse >> 4) & 0x3;
+
+ switch (redundant_sel) {
+ case 1:
+ *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7);
+ *speed = (pte_efuse >> 27) & 0xf;
+ break;
+ case 2:
+ *pvs = (pte_efuse >> 27) & 0xf;
+ *speed = pte_efuse & 0x7;
+ break;
+ default:
+ /* 4 bits of PVS are in efuse register bits 31, 8-6. */
+ *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7);
+ *speed = pte_efuse & 0x7;
+ }
+
+ /* Check SPEED_BIN_BLOW_STATUS */
+ if (pte_efuse & BIT(3)) {
+ pr_info("Speed bin: %d\n", *speed);
+ dev_dbg(cpu_dev, "Speed bin: %d\n", *speed);
+ } else {
+ pr_warn("Speed bin not set. Defaulting to 0!\n");
+ dev_warn(cpu_dev, "Speed bin not set. Defaulting to 0!\n");
+ *speed = 0;
+ }
+
@ -150,19 +149,19 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+ pte_efuse = *(((u32 *)buf) + 4);
+ pte_efuse &= BIT(21);
+ if (pte_efuse) {
+ pr_info("PVS bin: %d\n", *pvs);
+ dev_dbg(cpu_dev, "PVS bin: %d\n", *pvs);
+ } else {
+ pr_warn("PVS bin not set. Defaulting to 0!\n");
+ dev_warn(cpu_dev, "PVS bin not set. Defaulting to 0!\n");
+ *pvs = 0;
+ }
+
+ pr_info("PVS version: %d\n", *pvs_ver);
+ dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver);
+}
+
static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
{
size_t len;
@@ -93,11 +168,13 @@ static enum _msm8996_version qcom_cpufre
@@ -93,11 +173,13 @@ static enum _msm8996_version qcom_cpufre
static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
struct nvmem_cell *speedbin_nvmem,
@ -176,7 +175,7 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
msm8996_version = qcom_cpufreq_get_msm_id();
if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
@@ -125,10 +202,44 @@ static int qcom_cpufreq_kryo_name_versio
@@ -125,10 +207,51 @@ static int qcom_cpufreq_kryo_name_versio
return 0;
}
@ -190,13 +189,20 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+ size_t len;
+
+ speedbin = nvmem_cell_read(speedbin_nvmem, &len);
+ if (len == 4) {
+ get_krait_bin_format_a(&speed, &pvs, &pvs_ver,
+
+ if (IS_ERR(speedbin))
+ return PTR_ERR(speedbin);
+
+ switch (len) {
+ case 4:
+ get_krait_bin_format_a(cpu_dev, &speed, &pvs, &pvs_ver,
+ speedbin_nvmem, speedbin);
+ } else if (len == 8) {
+ get_krait_bin_format_b(&speed, &pvs, &pvs_ver,
+ break;
+ case 8:
+ get_krait_bin_format_b(cpu_dev, &speed, &pvs, &pvs_ver,
+ speedbin_nvmem, speedbin);
+ } else {
+ break;
+ default:
+ dev_err(cpu_dev, "Unable to read nvmem data. Defaulting to 0!\n");
+ return -ENODEV;
+ }
@ -221,7 +227,7 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
static const char *qcs404_genpd_names[] = { "cpr", NULL };
static const struct qcom_cpufreq_match_data match_data_qcs404 = {
@@ -141,6 +252,7 @@ static int qcom_cpufreq_probe(struct pla
@@ -141,6 +264,7 @@ static int qcom_cpufreq_probe(struct pla
struct nvmem_cell *speedbin_nvmem;
struct device_node *np;
struct device *cpu_dev;
@ -229,7 +235,7 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
unsigned cpu;
const struct of_device_id *match;
int ret;
@@ -153,7 +265,7 @@ static int qcom_cpufreq_probe(struct pla
@@ -153,7 +277,7 @@ static int qcom_cpufreq_probe(struct pla
if (!np)
return -ENOENT;
@ -238,106 +244,111 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
if (!ret) {
of_node_put(np);
return -ENOENT;
@@ -181,7 +293,7 @@ static int qcom_cpufreq_probe(struct pla
@@ -181,7 +305,8 @@ static int qcom_cpufreq_probe(struct pla
goto free_drv;
}
- ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv);
+ ret = drv->data->get_version(cpu_dev, speedbin_nvmem, &pvs_name, drv);
+ ret = drv->data->get_version(cpu_dev,
+ speedbin_nvmem, &pvs_name, drv);
if (ret) {
nvmem_cell_put(speedbin_nvmem);
goto free_drv;
@@ -190,12 +302,18 @@ static int qcom_cpufreq_probe(struct pla
@@ -190,12 +315,20 @@ static int qcom_cpufreq_probe(struct pla
}
of_node_put(np);
- drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables),
+ drv->opp_tables1 = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables1),
+ drv->names_opp_tables = kcalloc(num_possible_cpus(),
+ sizeof(*drv->names_opp_tables),
GFP_KERNEL);
- if (!drv->opp_tables) {
+ if (!drv->opp_tables1) {
+ if (!drv->names_opp_tables) {
ret = -ENOMEM;
goto free_drv;
}
+ drv->opp_tables2 = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables2),
+ drv->hw_opp_tables = kcalloc(num_possible_cpus(),
+ sizeof(*drv->hw_opp_tables),
+ GFP_KERNEL);
+ if (!drv->opp_tables2) {
+ if (!drv->hw_opp_tables) {
+ ret = -ENOMEM;
+ goto free_opp1;
+ goto free_opp_names;
+ }
drv->genpd_opp_tables = kcalloc(num_possible_cpus(),
sizeof(*drv->genpd_opp_tables),
@@ -213,11 +331,22 @@ static int qcom_cpufreq_probe(struct pla
@@ -213,11 +346,23 @@ static int qcom_cpufreq_probe(struct pla
}
if (drv->data->get_version) {
- drv->opp_tables[cpu] =
- dev_pm_opp_set_supported_hw(cpu_dev,
- &drv->versions, 1);
- if (IS_ERR(drv->opp_tables[cpu])) {
- ret = PTR_ERR(drv->opp_tables[cpu]);
+
+ if (pvs_name) {
+ drv->opp_tables1[cpu] = dev_pm_opp_set_prop_name(cpu_dev,
+ drv->names_opp_tables[cpu] = dev_pm_opp_set_prop_name(
+ cpu_dev,
+ pvs_name);
+ if (IS_ERR(drv->opp_tables1[cpu])) {
+ ret = PTR_ERR(drv->opp_tables1[cpu]);
+ if (IS_ERR(drv->names_opp_tables[cpu])) {
+ ret = PTR_ERR(drv->names_opp_tables[cpu]);
+ dev_err(cpu_dev, "Failed to add OPP name %s\n",
+ pvs_name);
+ goto free_opp;
+ }
+ }
+
+ drv->opp_tables2[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
&drv->versions, 1);
- if (IS_ERR(drv->opp_tables[cpu])) {
- ret = PTR_ERR(drv->opp_tables[cpu]);
+ if (IS_ERR(drv->opp_tables2[cpu])) {
+ ret = PTR_ERR(drv->opp_tables2[cpu]);
+ drv->hw_opp_tables[cpu] = dev_pm_opp_set_supported_hw(
+ cpu_dev, &drv->versions, 1);
+ if (IS_ERR(drv->hw_opp_tables[cpu])) {
+ ret = PTR_ERR(drv->hw_opp_tables[cpu]);
dev_err(cpu_dev,
"Failed to set supported hardware\n");
goto free_genpd_opp;
@@ -259,11 +388,18 @@ free_genpd_opp:
@@ -259,11 +404,18 @@ free_genpd_opp:
kfree(drv->genpd_opp_tables);
free_opp:
for_each_possible_cpu(cpu) {
- if (IS_ERR_OR_NULL(drv->opp_tables[cpu]))
+ if (IS_ERR_OR_NULL(drv->opp_tables1[cpu]))
+ if (IS_ERR_OR_NULL(drv->names_opp_tables[cpu]))
+ break;
+ dev_pm_opp_put_prop_name(drv->opp_tables1[cpu]);
+ dev_pm_opp_put_prop_name(drv->names_opp_tables[cpu]);
+ }
+ for_each_possible_cpu(cpu) {
+ if (IS_ERR_OR_NULL(drv->opp_tables2[cpu]))
+ if (IS_ERR_OR_NULL(drv->hw_opp_tables[cpu]))
break;
- dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
+ dev_pm_opp_put_supported_hw(drv->opp_tables2[cpu]);
+ dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]);
}
- kfree(drv->opp_tables);
+ kfree(drv->opp_tables2);
+free_opp1:
+ kfree(drv->opp_tables1);
+ kfree(drv->hw_opp_tables);
+free_opp_names:
+ kfree(drv->names_opp_tables);
free_drv:
kfree(drv);
@@ -278,13 +414,16 @@ static int qcom_cpufreq_remove(struct pl
@@ -278,13 +430,16 @@ static int qcom_cpufreq_remove(struct pl
platform_device_unregister(cpufreq_dt_pdev);
for_each_possible_cpu(cpu) {
- if (drv->opp_tables[cpu])
- dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
+ if (drv->opp_tables1[cpu])
+ dev_pm_opp_put_supported_hw(drv->opp_tables1[cpu]);
+ if (drv->opp_tables2[cpu])
+ dev_pm_opp_put_supported_hw(drv->opp_tables2[cpu]);
+ if (drv->names_opp_tables[cpu])
+ dev_pm_opp_put_supported_hw(drv->names_opp_tables[cpu]);
+ if (drv->hw_opp_tables[cpu])
+ dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]);
if (drv->genpd_opp_tables[cpu])
dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
}
- kfree(drv->opp_tables);
+ kfree(drv->opp_tables1);
+ kfree(drv->opp_tables2);
+ kfree(drv->names_opp_tables);
+ kfree(drv->hw_opp_tables);
kfree(drv->genpd_opp_tables);
kfree(drv);
@@ -303,6 +442,10 @@ static const struct of_device_id qcom_cp
@@ -303,6 +458,10 @@ static const struct of_device_id qcom_cp
{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },

View File

@ -0,0 +1,26 @@
From 2dea651680cea1f3a29925de51002f33d1f55711 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Fri, 1 May 2020 00:22:25 +0200
Subject: cpufreq: qcom: fix wrong compatible binding
Binding in Documentation is still "operating-points-v2-kryo-cpu".
Restore the old binding to fix the compatibility problem.
Fixes: a8811ec764f9 ("cpufreq: qcom: Add support for krait based socs")
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/cpufreq/qcom-cpufreq-nvmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -277,7 +277,7 @@ static int qcom_cpufreq_probe(struct pla
if (!np)
return -ENOENT;
- ret = of_device_is_compatible(np, "operating-points-v2-qcom-cpu");
+ ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
if (!ret) {
of_node_put(np);
return -ENOENT;

View File

@ -0,0 +1,621 @@
From ef19b117b83466e1c030368101a24367a34be7f0 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Fri, 17 Jul 2020 15:16:31 +0200
Subject: phy: qualcomm: add qcom ipq806x dwc usb phy driver
This has lost in the original push for the dwc3 qcom driver.
This is needed for ipq806x SoC as without this the usb ports
doesn't work at all.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200717131635.11076-1-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
Light modification to Kconfig as some config are missing in kernel 5.4
drivers/phy/qualcomm/Kconfig | 10 +
drivers/phy/qualcomm/Makefile | 1 +
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c | 571 ++++++++++++++++++++++++++++
3 files changed, 582 insertions(+)
create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
@@ -91,3 +91,13 @@ config PHY_QCOM_USB_HSIC
select GENERIC_PHY
help
Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
+config PHY_QCOM_IPQ806X_USB
+ tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
+ depends on HAS_IOMEM
+ depends on OF && (ARCH_QCOM || COMPILE_TEST)
+ select GENERIC_PHY
+ help
+ This option enables support for the Synopsis PHYs present inside the
+ Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
+ both HS and SS PHY controllers.
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_PHY_QCOM_UFS_14NM) += phy-
obj-$(CONFIG_PHY_QCOM_UFS_20NM) += phy-qcom-ufs-qmp-20nm.o
obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
+obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
@@ -0,0 +1,571 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+
+/* USB QSCRATCH Hardware registers */
+#define QSCRATCH_GENERAL_CFG (0x08)
+#define HSUSB_PHY_CTRL_REG (0x10)
+
+/* PHY_CTRL_REG */
+#define HSUSB_CTRL_DMSEHV_CLAMP BIT(24)
+#define HSUSB_CTRL_USB2_SUSPEND BIT(23)
+#define HSUSB_CTRL_UTMI_CLK_EN BIT(21)
+#define HSUSB_CTRL_UTMI_OTG_VBUS_VALID BIT(20)
+#define HSUSB_CTRL_USE_CLKCORE BIT(18)
+#define HSUSB_CTRL_DPSEHV_CLAMP BIT(17)
+#define HSUSB_CTRL_COMMONONN BIT(11)
+#define HSUSB_CTRL_ID_HV_CLAMP BIT(9)
+#define HSUSB_CTRL_OTGSESSVLD_CLAMP BIT(8)
+#define HSUSB_CTRL_CLAMP_EN BIT(7)
+#define HSUSB_CTRL_RETENABLEN BIT(1)
+#define HSUSB_CTRL_POR BIT(0)
+
+/* QSCRATCH_GENERAL_CFG */
+#define HSUSB_GCFG_XHCI_REV BIT(2)
+
+/* USB QSCRATCH Hardware registers */
+#define SSUSB_PHY_CTRL_REG (0x00)
+#define SSUSB_PHY_PARAM_CTRL_1 (0x04)
+#define SSUSB_PHY_PARAM_CTRL_2 (0x08)
+#define CR_PROTOCOL_DATA_IN_REG (0x0c)
+#define CR_PROTOCOL_DATA_OUT_REG (0x10)
+#define CR_PROTOCOL_CAP_ADDR_REG (0x14)
+#define CR_PROTOCOL_CAP_DATA_REG (0x18)
+#define CR_PROTOCOL_READ_REG (0x1c)
+#define CR_PROTOCOL_WRITE_REG (0x20)
+
+/* PHY_CTRL_REG */
+#define SSUSB_CTRL_REF_USE_PAD BIT(28)
+#define SSUSB_CTRL_TEST_POWERDOWN BIT(27)
+#define SSUSB_CTRL_LANE0_PWR_PRESENT BIT(24)
+#define SSUSB_CTRL_SS_PHY_EN BIT(8)
+#define SSUSB_CTRL_SS_PHY_RESET BIT(7)
+
+/* SSPHY control registers - Does this need 0x30? */
+#define SSPHY_CTRL_RX_OVRD_IN_HI(lane) (0x1006 + 0x100 * (lane))
+#define SSPHY_CTRL_TX_OVRD_DRV_LO(lane) (0x1002 + 0x100 * (lane))
+
+/* SSPHY SoC version specific values */
+#define SSPHY_RX_EQ_VALUE 4 /* Override value for rx_eq */
+/* Override value for transmit preemphasis */
+#define SSPHY_TX_DEEMPH_3_5DB 23
+/* Override value for mpll */
+#define SSPHY_MPLL_VALUE 0
+
+/* QSCRATCH PHY_PARAM_CTRL1 fields */
+#define PHY_PARAM_CTRL1_TX_FULL_SWING_MASK GENMASK(26, 19)
+#define PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK GENMASK(19, 13)
+#define PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK GENMASK(13, 7)
+#define PHY_PARAM_CTRL1_LOS_BIAS_MASK GENMASK(7, 2)
+
+#define PHY_PARAM_CTRL1_MASK \
+ (PHY_PARAM_CTRL1_TX_FULL_SWING_MASK | \
+ PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK | \
+ PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK | \
+ PHY_PARAM_CTRL1_LOS_BIAS_MASK)
+
+#define PHY_PARAM_CTRL1_TX_FULL_SWING(x) \
+ (((x) << 20) & PHY_PARAM_CTRL1_TX_FULL_SWING_MASK)
+#define PHY_PARAM_CTRL1_TX_DEEMPH_6DB(x) \
+ (((x) << 14) & PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK)
+#define PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB(x) \
+ (((x) << 8) & PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK)
+#define PHY_PARAM_CTRL1_LOS_BIAS(x) \
+ (((x) << 3) & PHY_PARAM_CTRL1_LOS_BIAS_MASK)
+
+/* RX OVRD IN HI bits */
+#define RX_OVRD_IN_HI_RX_RESET_OVRD BIT(13)
+#define RX_OVRD_IN_HI_RX_RX_RESET BIT(12)
+#define RX_OVRD_IN_HI_RX_EQ_OVRD BIT(11)
+#define RX_OVRD_IN_HI_RX_EQ_MASK GENMASK(10, 7)
+#define RX_OVRD_IN_HI_RX_EQ(x) ((x) << 8)
+#define RX_OVRD_IN_HI_RX_EQ_EN_OVRD BIT(7)
+#define RX_OVRD_IN_HI_RX_EQ_EN BIT(6)
+#define RX_OVRD_IN_HI_RX_LOS_FILTER_OVRD BIT(5)
+#define RX_OVRD_IN_HI_RX_LOS_FILTER_MASK GENMASK(4, 2)
+#define RX_OVRD_IN_HI_RX_RATE_OVRD BIT(2)
+#define RX_OVRD_IN_HI_RX_RATE_MASK GENMASK(2, 0)
+
+/* TX OVRD DRV LO register bits */
+#define TX_OVRD_DRV_LO_AMPLITUDE_MASK GENMASK(6, 0)
+#define TX_OVRD_DRV_LO_PREEMPH_MASK GENMASK(13, 6)
+#define TX_OVRD_DRV_LO_PREEMPH(x) ((x) << 7)
+#define TX_OVRD_DRV_LO_EN BIT(14)
+
+/* MPLL bits */
+#define SSPHY_MPLL_MASK GENMASK(8, 5)
+#define SSPHY_MPLL(x) ((x) << 5)
+
+/* SS CAP register bits */
+#define SS_CR_CAP_ADDR_REG BIT(0)
+#define SS_CR_CAP_DATA_REG BIT(0)
+#define SS_CR_READ_REG BIT(0)
+#define SS_CR_WRITE_REG BIT(0)
+
+struct usb_phy {
+ void __iomem *base;
+ struct device *dev;
+ struct clk *xo_clk;
+ struct clk *ref_clk;
+ u32 rx_eq;
+ u32 tx_deamp_3_5db;
+ u32 mpll;
+};
+
+struct phy_drvdata {
+ struct phy_ops ops;
+ u32 clk_rate;
+};
+
+/**
+ * Write register and read back masked value to confirm it is written
+ *
+ * @base - QCOM DWC3 PHY base virtual address.
+ * @offset - register offset.
+ * @mask - register bitmask specifying what should be updated
+ * @val - value to write.
+ */
+static inline void usb_phy_write_readback(struct usb_phy *phy_dwc3,
+ u32 offset,
+ const u32 mask, u32 val)
+{
+ u32 write_val, tmp = readl(phy_dwc3->base + offset);
+
+ tmp &= ~mask; /* retain other bits */
+ write_val = tmp | val;
+
+ writel(write_val, phy_dwc3->base + offset);
+
+ /* Read back to see if val was written */
+ tmp = readl(phy_dwc3->base + offset);
+ tmp &= mask; /* clear other bits */
+
+ if (tmp != val)
+ dev_err(phy_dwc3->dev, "write: %x to QSCRATCH: %x FAILED\n", val, offset);
+}
+
+static int wait_for_latch(void __iomem *addr)
+{
+ u32 retry = 10;
+
+ while (true) {
+ if (!readl(addr))
+ break;
+
+ if (--retry == 0)
+ return -ETIMEDOUT;
+
+ usleep_range(10, 20);
+ }
+
+ return 0;
+}
+
+/**
+ * Write SSPHY register
+ *
+ * @base - QCOM DWC3 PHY base virtual address.
+ * @addr - SSPHY address to write.
+ * @val - value to write.
+ */
+static int usb_ss_write_phycreg(struct usb_phy *phy_dwc3,
+ u32 addr, u32 val)
+{
+ int ret;
+
+ writel(addr, phy_dwc3->base + CR_PROTOCOL_DATA_IN_REG);
+ writel(SS_CR_CAP_ADDR_REG,
+ phy_dwc3->base + CR_PROTOCOL_CAP_ADDR_REG);
+
+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_CAP_ADDR_REG);
+ if (ret)
+ goto err_wait;
+
+ writel(val, phy_dwc3->base + CR_PROTOCOL_DATA_IN_REG);
+ writel(SS_CR_CAP_DATA_REG,
+ phy_dwc3->base + CR_PROTOCOL_CAP_DATA_REG);
+
+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_CAP_DATA_REG);
+ if (ret)
+ goto err_wait;
+
+ writel(SS_CR_WRITE_REG, phy_dwc3->base + CR_PROTOCOL_WRITE_REG);
+
+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_WRITE_REG);
+
+err_wait:
+ if (ret)
+ dev_err(phy_dwc3->dev, "timeout waiting for latch\n");
+ return ret;
+}
+
+/**
+ * Read SSPHY register.
+ *
+ * @base - QCOM DWC3 PHY base virtual address.
+ * @addr - SSPHY address to read.
+ */
+static int usb_ss_read_phycreg(struct usb_phy *phy_dwc3,
+ u32 addr, u32 *val)
+{
+ int ret;
+
+ writel(addr, phy_dwc3->base + CR_PROTOCOL_DATA_IN_REG);
+ writel(SS_CR_CAP_ADDR_REG,
+ phy_dwc3->base + CR_PROTOCOL_CAP_ADDR_REG);
+
+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_CAP_ADDR_REG);
+ if (ret)
+ goto err_wait;
+
+ /*
+ * Due to hardware bug, first read of SSPHY register might be
+ * incorrect. Hence as workaround, SW should perform SSPHY register
+ * read twice, but use only second read and ignore first read.
+ */
+ writel(SS_CR_READ_REG, phy_dwc3->base + CR_PROTOCOL_READ_REG);
+
+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_READ_REG);
+ if (ret)
+ goto err_wait;
+
+ /* throwaway read */
+ readl(phy_dwc3->base + CR_PROTOCOL_DATA_OUT_REG);
+
+ writel(SS_CR_READ_REG, phy_dwc3->base + CR_PROTOCOL_READ_REG);
+
+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_READ_REG);
+ if (ret)
+ goto err_wait;
+
+ *val = readl(phy_dwc3->base + CR_PROTOCOL_DATA_OUT_REG);
+
+err_wait:
+ return ret;
+}
+
+static int qcom_ipq806x_usb_hs_phy_init(struct phy *phy)
+{
+ struct usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+ int ret;
+ u32 val;
+
+ ret = clk_prepare_enable(phy_dwc3->xo_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(phy_dwc3->ref_clk);
+ if (ret) {
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+ return ret;
+ }
+
+ /*
+ * HSPHY Initialization: Enable UTMI clock, select 19.2MHz fsel
+ * enable clamping, and disable RETENTION (power-on default is ENABLED)
+ */
+ val = HSUSB_CTRL_DPSEHV_CLAMP | HSUSB_CTRL_DMSEHV_CLAMP |
+ HSUSB_CTRL_RETENABLEN | HSUSB_CTRL_COMMONONN |
+ HSUSB_CTRL_OTGSESSVLD_CLAMP | HSUSB_CTRL_ID_HV_CLAMP |
+ HSUSB_CTRL_DPSEHV_CLAMP | HSUSB_CTRL_UTMI_OTG_VBUS_VALID |
+ HSUSB_CTRL_UTMI_CLK_EN | HSUSB_CTRL_CLAMP_EN | 0x70;
+
+ /* use core clock if external reference is not present */
+ if (!phy_dwc3->xo_clk)
+ val |= HSUSB_CTRL_USE_CLKCORE;
+
+ writel(val, phy_dwc3->base + HSUSB_PHY_CTRL_REG);
+ usleep_range(2000, 2200);
+
+ /* Disable (bypass) VBUS and ID filters */
+ writel(HSUSB_GCFG_XHCI_REV, phy_dwc3->base + QSCRATCH_GENERAL_CFG);
+
+ return 0;
+}
+
+static int qcom_ipq806x_usb_hs_phy_exit(struct phy *phy)
+{
+ struct usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+
+ clk_disable_unprepare(phy_dwc3->ref_clk);
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+
+ return 0;
+}
+
+static int qcom_ipq806x_usb_ss_phy_init(struct phy *phy)
+{
+ struct usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+ int ret;
+ u32 data;
+
+ ret = clk_prepare_enable(phy_dwc3->xo_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(phy_dwc3->ref_clk);
+ if (ret) {
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+ return ret;
+ }
+
+ /* reset phy */
+ data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG);
+ writel(data | SSUSB_CTRL_SS_PHY_RESET,
+ phy_dwc3->base + SSUSB_PHY_CTRL_REG);
+ usleep_range(2000, 2200);
+ writel(data, phy_dwc3->base + SSUSB_PHY_CTRL_REG);
+
+ /* clear REF_PAD if we don't have XO clk */
+ if (!phy_dwc3->xo_clk)
+ data &= ~SSUSB_CTRL_REF_USE_PAD;
+ else
+ data |= SSUSB_CTRL_REF_USE_PAD;
+
+ writel(data, phy_dwc3->base + SSUSB_PHY_CTRL_REG);
+
+ /* wait for ref clk to become stable, this can take up to 30ms */
+ msleep(30);
+
+ data |= SSUSB_CTRL_SS_PHY_EN | SSUSB_CTRL_LANE0_PWR_PRESENT;
+ writel(data, phy_dwc3->base + SSUSB_PHY_CTRL_REG);
+
+ /*
+ * WORKAROUND: There is SSPHY suspend bug due to which USB enumerates
+ * in HS mode instead of SS mode. Workaround it by asserting
+ * LANE0.TX_ALT_BLOCK.EN_ALT_BUS to enable TX to use alt bus mode
+ */
+ ret = usb_ss_read_phycreg(phy_dwc3, 0x102D, &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data |= (1 << 7);
+ ret = usb_ss_write_phycreg(phy_dwc3, 0x102D, data);
+ if (ret)
+ goto err_phy_trans;
+
+ ret = usb_ss_read_phycreg(phy_dwc3, 0x1010, &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data &= ~0xff0;
+ data |= 0x20;
+ ret = usb_ss_write_phycreg(phy_dwc3, 0x1010, data);
+ if (ret)
+ goto err_phy_trans;
+
+ /*
+ * Fix RX Equalization setting as follows
+ * LANE0.RX_OVRD_IN_HI. RX_EQ_EN set to 0
+ * LANE0.RX_OVRD_IN_HI.RX_EQ_EN_OVRD set to 1
+ * LANE0.RX_OVRD_IN_HI.RX_EQ set based on SoC version
+ * LANE0.RX_OVRD_IN_HI.RX_EQ_OVRD set to 1
+ */
+ ret = usb_ss_read_phycreg(phy_dwc3, SSPHY_CTRL_RX_OVRD_IN_HI(0), &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data &= ~RX_OVRD_IN_HI_RX_EQ_EN;
+ data |= RX_OVRD_IN_HI_RX_EQ_EN_OVRD;
+ data &= ~RX_OVRD_IN_HI_RX_EQ_MASK;
+ data |= RX_OVRD_IN_HI_RX_EQ(phy_dwc3->rx_eq);
+ data |= RX_OVRD_IN_HI_RX_EQ_OVRD;
+ ret = usb_ss_write_phycreg(phy_dwc3,
+ SSPHY_CTRL_RX_OVRD_IN_HI(0), data);
+ if (ret)
+ goto err_phy_trans;
+
+ /*
+ * Set EQ and TX launch amplitudes as follows
+ * LANE0.TX_OVRD_DRV_LO.PREEMPH set based on SoC version
+ * LANE0.TX_OVRD_DRV_LO.AMPLITUDE set to 110
+ * LANE0.TX_OVRD_DRV_LO.EN set to 1.
+ */
+ ret = usb_ss_read_phycreg(phy_dwc3,
+ SSPHY_CTRL_TX_OVRD_DRV_LO(0), &data);
+ if (ret)
+ goto err_phy_trans;
+
+ data &= ~TX_OVRD_DRV_LO_PREEMPH_MASK;
+ data |= TX_OVRD_DRV_LO_PREEMPH(phy_dwc3->tx_deamp_3_5db);
+ data &= ~TX_OVRD_DRV_LO_AMPLITUDE_MASK;
+ data |= 0x6E;
+ data |= TX_OVRD_DRV_LO_EN;
+ ret = usb_ss_write_phycreg(phy_dwc3,
+ SSPHY_CTRL_TX_OVRD_DRV_LO(0), data);
+ if (ret)
+ goto err_phy_trans;
+
+ data = 0;
+ data &= ~SSPHY_MPLL_MASK;
+ data |= SSPHY_MPLL(phy_dwc3->mpll);
+ usb_ss_write_phycreg(phy_dwc3, 0x30, data);
+
+ /*
+ * Set the QSCRATCH PHY_PARAM_CTRL1 parameters as follows
+ * TX_FULL_SWING [26:20] amplitude to 110
+ * TX_DEEMPH_6DB [19:14] to 32
+ * TX_DEEMPH_3_5DB [13:8] set based on SoC version
+ * LOS_BIAS [7:3] to 9
+ */
+ data = readl(phy_dwc3->base + SSUSB_PHY_PARAM_CTRL_1);
+
+ data &= ~PHY_PARAM_CTRL1_MASK;
+
+ data |= PHY_PARAM_CTRL1_TX_FULL_SWING(0x6e) |
+ PHY_PARAM_CTRL1_TX_DEEMPH_6DB(0x20) |
+ PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB(phy_dwc3->tx_deamp_3_5db) |
+ PHY_PARAM_CTRL1_LOS_BIAS(0x9);
+
+ usb_phy_write_readback(phy_dwc3, SSUSB_PHY_PARAM_CTRL_1,
+ PHY_PARAM_CTRL1_MASK, data);
+
+err_phy_trans:
+ return ret;
+}
+
+static int qcom_ipq806x_usb_ss_phy_exit(struct phy *phy)
+{
+ struct usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+
+ /* Sequence to put SSPHY in low power state:
+ * 1. Clear REF_PHY_EN in PHY_CTRL_REG
+ * 2. Clear REF_USE_PAD in PHY_CTRL_REG
+ * 3. Set TEST_POWERED_DOWN in PHY_CTRL_REG to enable PHY retention
+ */
+ usb_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
+ SSUSB_CTRL_SS_PHY_EN, 0x0);
+ usb_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
+ SSUSB_CTRL_REF_USE_PAD, 0x0);
+ usb_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
+ SSUSB_CTRL_TEST_POWERDOWN, 0x0);
+
+ clk_disable_unprepare(phy_dwc3->ref_clk);
+ clk_disable_unprepare(phy_dwc3->xo_clk);
+
+ return 0;
+}
+
+static const struct phy_drvdata qcom_ipq806x_usb_hs_drvdata = {
+ .ops = {
+ .init = qcom_ipq806x_usb_hs_phy_init,
+ .exit = qcom_ipq806x_usb_hs_phy_exit,
+ .owner = THIS_MODULE,
+ },
+ .clk_rate = 60000000,
+};
+
+static const struct phy_drvdata qcom_ipq806x_usb_ss_drvdata = {
+ .ops = {
+ .init = qcom_ipq806x_usb_ss_phy_init,
+ .exit = qcom_ipq806x_usb_ss_phy_exit,
+ .owner = THIS_MODULE,
+ },
+ .clk_rate = 125000000,
+};
+
+static const struct of_device_id qcom_ipq806x_usb_phy_table[] = {
+ { .compatible = "qcom,ipq806x-usb-phy-hs",
+ .data = &qcom_ipq806x_usb_hs_drvdata },
+ { .compatible = "qcom,ipq806x-usb-phy-ss",
+ .data = &qcom_ipq806x_usb_ss_drvdata },
+ { /* Sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, qcom_ipq806x_usb_phy_table);
+
+static int qcom_ipq806x_usb_phy_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ resource_size_t size;
+ struct phy *generic_phy;
+ struct usb_phy *phy_dwc3;
+ const struct phy_drvdata *data;
+ struct phy_provider *phy_provider;
+
+ phy_dwc3 = devm_kzalloc(&pdev->dev, sizeof(*phy_dwc3), GFP_KERNEL);
+ if (!phy_dwc3)
+ return -ENOMEM;
+
+ data = of_device_get_match_data(&pdev->dev);
+
+ phy_dwc3->dev = &pdev->dev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -EINVAL;
+ size = resource_size(res);
+ phy_dwc3->base = devm_ioremap(phy_dwc3->dev, res->start, size);
+
+ if (IS_ERR(phy_dwc3->base)) {
+ dev_err(phy_dwc3->dev, "failed to map reg\n");
+ return PTR_ERR(phy_dwc3->base);
+ }
+
+ phy_dwc3->ref_clk = devm_clk_get(phy_dwc3->dev, "ref");
+ if (IS_ERR(phy_dwc3->ref_clk)) {
+ dev_dbg(phy_dwc3->dev, "cannot get reference clock\n");
+ return PTR_ERR(phy_dwc3->ref_clk);
+ }
+
+ clk_set_rate(phy_dwc3->ref_clk, data->clk_rate);
+
+ phy_dwc3->xo_clk = devm_clk_get(phy_dwc3->dev, "xo");
+ if (IS_ERR(phy_dwc3->xo_clk)) {
+ dev_dbg(phy_dwc3->dev, "cannot get TCXO clock\n");
+ phy_dwc3->xo_clk = NULL;
+ }
+
+ /* Parse device node to probe HSIO settings */
+ if (device_property_read_u32(&pdev->dev, "qcom,rx-eq",
+ &phy_dwc3->rx_eq))
+ phy_dwc3->rx_eq = SSPHY_RX_EQ_VALUE;
+
+ if (device_property_read_u32(&pdev->dev, "qcom,tx-deamp_3_5db",
+ &phy_dwc3->tx_deamp_3_5db))
+ phy_dwc3->rx_eq = SSPHY_TX_DEEMPH_3_5DB;
+
+ if (device_property_read_u32(&pdev->dev, "qcom,mpll", &phy_dwc3->mpll))
+ phy_dwc3->mpll = SSPHY_MPLL_VALUE;
+
+ generic_phy = devm_phy_create(phy_dwc3->dev, pdev->dev.of_node, &data->ops);
+
+ if (IS_ERR(generic_phy))
+ return PTR_ERR(generic_phy);
+
+ phy_set_drvdata(generic_phy, phy_dwc3);
+ platform_set_drvdata(pdev, phy_dwc3);
+
+ phy_provider = devm_of_phy_provider_register(phy_dwc3->dev,
+ of_phy_simple_xlate);
+
+ if (IS_ERR(phy_provider))
+ return PTR_ERR(phy_provider);
+
+ return 0;
+}
+
+static struct platform_driver qcom_ipq806x_usb_phy_driver = {
+ .probe = qcom_ipq806x_usb_phy_probe,
+ .driver = {
+ .name = "qcom-ipq806x-usb-phy",
+ .owner = THIS_MODULE,
+ .of_match_table = qcom_ipq806x_usb_phy_table,
+ },
+};
+
+module_platform_driver(qcom_ipq806x_usb_phy_driver);
+
+MODULE_ALIAS("platform:phy-qcom-ipq806x-usb");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
+MODULE_AUTHOR("Ivan T. Ivanov <iivanov@mm-sol.com>");
+MODULE_DESCRIPTION("DesignWare USB3 QCOM PHY driver");

View File

@ -0,0 +1,31 @@
From 3d7b0ca5300bd01b176f2b4c10e173db802560d8 Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Tue, 21 Jul 2020 16:06:13 +0100
Subject: phy: qualcomm: fix setting of tx_deamp_3_5db when device property
read fails
Currently when reading of the device property for "qcom,tx-deamp_3_5db"
fails the default is being assigned incorrectly to phy_dwc3->rx_eq. This
looks like a copy-n-paste error and in fact should be assigning the
default instead to phy_dwc3->tx_deamp_3_5db
Addresses-Coverity: ("Copy-paste error")
Fixes: ef19b117b834 ("phy: qualcomm: add qcom ipq806x dwc usb phy driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200721150613.416876-1-colin.king@canonical.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
@@ -531,7 +531,7 @@ static int qcom_ipq806x_usb_phy_probe(st
if (device_property_read_u32(&pdev->dev, "qcom,tx-deamp_3_5db",
&phy_dwc3->tx_deamp_3_5db))
- phy_dwc3->rx_eq = SSPHY_TX_DEEMPH_3_5DB;
+ phy_dwc3->tx_deamp_3_5db = SSPHY_TX_DEEMPH_3_5DB;
if (device_property_read_u32(&pdev->dev, "qcom,mpll", &phy_dwc3->mpll))
phy_dwc3->mpll = SSPHY_MPLL_VALUE;

View File

@ -40,7 +40,6 @@ CONFIG_BOOT_ELF32=y
CONFIG_BOUNCE=y
CONFIG_BUILTIN_DTB=y
CONFIG_CEVT_R4K=y
# CONFIG_CGROUPS is not set
CONFIG_CLKBLD_I8253=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKEVT_I8253=y

View File

@ -169,10 +169,13 @@
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
mt7615@0,0 {
};
&slot0 {
mt7615@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x05000>;
};
};
};
&pio {
@ -433,7 +436,7 @@
};
&btif {
status = "okay";
status = "disabled";
};
&cir {

View File

@ -52,15 +52,17 @@
};
};
beeper {
compatible = "gpio-beeper";
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
};
gpio_export {
compatible = "gpio-export";
#size-cells = <0>;
buzzer {
/* Beeper requires PWM for frequency selection */
gpio-export,name = "buzzer";
gpio-export,output = <0>;
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
};
usb_power {
gpio-export,name = "usb_power";
gpio-export,output = <1>;

View File

@ -703,7 +703,7 @@ endef
define Device/mikrotik_routerboard-750gr3
$(Device/MikroTik)
DEVICE_MODEL := RouterBOARD 750Gr3
DEVICE_PACKAGES += kmod-gpio-beeper -wpad-basic
DEVICE_PACKAGES += -wpad-basic
SUPPORTED_DEVICES += mikrotik,rb750gr3
endef
TARGET_DEVICES += mikrotik_routerboard-750gr3