uboot-rockchip: drop ugly hacks from friendlyarm

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit 974443992e)
This commit is contained in:
Tianling Shen 2021-08-08 15:00:45 +08:00
parent ffad2f5a30
commit bd3df9f3ce
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3 changed files with 1 additions and 331 deletions

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@ -198,7 +198,7 @@ Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_NANOPI4_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s"

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@ -1,74 +0,0 @@
From a765bb2678b6d1666caafef0fcf88fba88b5b26f Mon Sep 17 00:00:00 2001
From: hmz007 <hmz007@gmail.com>
Date: Fri, 18 Dec 2020 17:10:35 +0800
Subject: [PATCH] rockchip: rk3399: split nanopi-r4-rk3399 out of evb_rk3399
nanopi-r4-rk3399 board has multiple DDR types. Currently we don't have any code
are compatible with these devices. Since multiple DDR types is specific to
nanopi-r4-rk3399 board, split it into its own board file and add code
support here.
Signed-off-by: hmz007 <hmz007@gmail.com>
[Improved commit message and Kconfig description]
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
---
arch/arm/mach-rockchip/rk3399/Kconfig | 15 +++
board/friendlyarm/nanopi4/Kconfig | 15 +++
board/friendlyarm/nanopi4/MAINTAINERS | 5 +
board/friendlyarm/nanopi4/Makefile | 8 ++
board/friendlyarm/nanopi4/hwrev.c | 185 ++++++++++++++++++++++++++
board/friendlyarm/nanopi4/hwrev.h | 27 ++++
board/friendlyarm/nanopi4/nanopi4.c | 148 +++++++++++++++++++++
drivers/clk/rockchip/clk_rk3399.c | 2 +
include/configs/nanopi4.h | 24 ++++
9 files changed, 429 insertions(+)
create mode 100644 board/friendlyarm/nanopi4/Kconfig
create mode 100644 board/friendlyarm/nanopi4/MAINTAINERS
create mode 100644 board/friendlyarm/nanopi4/Makefile
create mode 100644 board/friendlyarm/nanopi4/hwrev.c
create mode 100644 board/friendlyarm/nanopi4/hwrev.h
create mode 100644 board/friendlyarm/nanopi4/nanopi4.c
create mode 100644 include/configs/nanopi4.h
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -109,6 +109,20 @@ config TARGET_ROC_PC_RK3399
* wide voltage input(5V-15V), dual cell battery
* Wifi/BT accessible via expansion board M.2
+config TARGET_NANOPI4_RK3399
+ bool "FriendlyElec NanoPi4 board"
+ help
+ NanoPi4 is SBC produced by FriendlyElec. Key features:
+
+ * Rockchip RK3399
+ * 1/2/4GB Dual-Channel DDR3/LPDDR4
+ * SD card slot
+ * Gigabit ethernet
+ * PCIe
+ * USB 3.0, 2.0
+ * USB Type C power
+ * GPIO expansion ports
+
endchoice
config ROCKCHIP_BOOT_MODE_REG
@@ -152,6 +166,7 @@ config SYS_BOOTCOUNT_ADDR
endif # BOOTCOUNT_LIMIT
source "board/firefly/roc-pc-rk3399/Kconfig"
+source "board/friendlyarm/nanopi4/Kconfig"
source "board/google/gru/Kconfig"
source "board/pine64/pinebook-pro-rk3399/Kconfig"
source "board/pine64/rockpro64_rk3399/Kconfig"
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1372,6 +1372,8 @@ static void rkclk_init(struct rockchip_c
pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
+
+ rk3399_saradc_set_clk(cru, 1000000);
}
static int rk3399_clk_probe(struct udevice *dev)

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@ -1,256 +0,0 @@
From a9447b7b60a3c5195d0fabbe5aa9c32d047ec997 Mon Sep 17 00:00:00 2001
From: hmz007 <hmz007@gmail.com>
Date: Sat, 19 Dec 2020 19:39:14 +0800
Subject: [PATCH] ram: rk3399: Add support for multiple DDR types
Move rockchip,sdram-params to named subnode to include
multiple sdram parameters, and then read the parameters
(by subnode name, first subnode or current node) before
rk3399_dmc_init().
Signed-off-by: hmz007 <hmz007@gmail.com>
---
arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 6 ++-
arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi | 5 +-
arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi | 6 ++-
.../arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi | 3 ++
.../arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi | 3 ++
.../rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi | 3 ++
arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi | 3 ++
drivers/ram/rockchip/sdram_rk3399.c | 49 +++++++++++++++----
8 files changed, 64 insertions(+), 14 deletions(-)
--- a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
@@ -4,7 +4,9 @@
*/
&dmc {
- rockchip,sdram-params = <
+ ddr3-1333 {
+ u-boot,dm-pre-reloc;
+ rockchip,sdram-params = <
0x1
0xa
0x3
@@ -1536,5 +1538,5 @@
0x01010000
0x00000000
>;
+ };
};
-
--- a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
@@ -4,7 +4,9 @@
*/
&dmc {
- rockchip,sdram-params = <
+ ddr3-1600 {
+ u-boot,dm-pre-reloc;
+ rockchip,sdram-params = <
0x1
0xa
0x3
@@ -1536,4 +1538,5 @@
0x01010000
0x00000000
>;
+ };
};
--- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
@@ -4,7 +4,9 @@
*/
&dmc {
- rockchip,sdram-params = <
+ ddr3-1866 {
+ u-boot,dm-pre-reloc;
+ rockchip,sdram-params = <
0x1
0xa
0x3
@@ -1536,5 +1538,5 @@
0x01010000
0x00000000
>;
+ };
};
-
--- a/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
@@ -5,6 +5,8 @@
*/
&dmc {
+ lpddr3-2GB-1600 {
+ u-boot,dm-pre-reloc;
rockchip,sdram-params = <
0x1
0xa
@@ -1537,4 +1539,5 @@
0x01010000
0x00000000
>;
+ };
};
--- a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
@@ -4,6 +4,8 @@
*/
&dmc {
+ lpddr3-4GB-1600 {
+ u-boot,dm-pre-reloc;
rockchip,sdram-params = <
0x2
0xa
@@ -1536,4 +1538,5 @@
0x01010000
0x00000000
>;
+ };
};
--- a/arch/arm/dts/rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi
@@ -4,6 +4,8 @@
*/
&dmc {
+ lpddr3-samsung-4GB-1866 {
+ u-boot,dm-pre-reloc;
rockchip,sdram-params = <
0x2
0xa
@@ -1543,4 +1545,5 @@
0x01010000 /* DENALI_PHY_957_DATA */
0x00000000 /* DENALI_PHY_958_DATA */
>;
+ };
};
--- a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
@@ -6,6 +6,8 @@
*/
&dmc {
+ lpddr4-100 {
+ u-boot,dm-pre-reloc;
rockchip,sdram-params = <
0x2
0xa
@@ -1538,4 +1540,5 @@
0x01010000
0x00000000
>;
+ };
};
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1625,7 +1625,6 @@ static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride)
rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10, stride << 10);
}
-#if !defined(CONFIG_RAM_RK3399_LPDDR4)
static int data_training_first(struct dram_info *dram, u32 channel, u8 rank,
struct rk3399_sdram_params *params)
{
@@ -1715,8 +1714,8 @@ void modify_param(const struct chan_info *chan,
clrsetbits_le32(&denali_pi_params[76], 0x1 << 24, 0x1 << 24);
clrsetbits_le32(&denali_pi_params[77], 0x1, 0x1);
}
-#else
+#if defined(CONFIG_RAM_RK3399_LPDDR4)
struct rk3399_sdram_params dfs_cfgs_lpddr4[] = {
#include "sdram-rk3399-lpddr4-400.inc"
#include "sdram-rk3399-lpddr4-800.inc"
@@ -3011,20 +3010,40 @@ static int sdram_init(struct dram_info *dram,
return 0;
}
+__weak const char *rk3399_get_ddrtype(void)
+{
+ return NULL;
+}
+
static int rk3399_dmc_of_to_plat(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rockchip_dmc_plat *plat = dev_get_plat(dev);
+ ofnode node = { .np = NULL };
+ const char *name;
int ret;
- ret = dev_read_u32_array(dev, "rockchip,sdram-params",
- (u32 *)&plat->sdram_params,
- sizeof(plat->sdram_params) / sizeof(u32));
+ name = rk3399_get_ddrtype();
+ if (name)
+ node = dev_read_subnode(dev, name);
+ if (!ofnode_valid(node)) {
+ debug("Failed to read subnode %s\n", name);
+ node = dev_read_first_subnode(dev);
+ }
+
+ /* fallback to current node */
+ if (!ofnode_valid(node))
+ node = dev_ofnode(dev);
+
+ ret = ofnode_read_u32_array(node, "rockchip,sdram-params",
+ (u32 *)&plat->sdram_params,
+ sizeof(plat->sdram_params) / sizeof(u32));
if (ret) {
printf("%s: Cannot read rockchip,sdram-params %d\n",
__func__, ret);
return ret;
}
+
ret = regmap_init_mem(dev_ofnode(dev), &plat->map);
if (ret)
printf("%s: regmap failed %d\n", __func__, ret);
@@ -3050,18 +3069,20 @@ static int conv_of_plat(struct udevice *dev)
#endif
static const struct sdram_rk3399_ops rk3399_ops = {
-#if !defined(CONFIG_RAM_RK3399_LPDDR4)
.data_training_first = data_training_first,
.set_rate_index = switch_to_phy_index1,
.modify_param = modify_param,
.get_phy_index_params = get_phy_index_params,
-#else
+};
+
+#if defined(CONFIG_RAM_RK3399_LPDDR4)
+static const struct sdram_rk3399_ops lpddr4_ops = {
.data_training_first = lpddr4_mr_detect,
.set_rate_index = lpddr4_set_rate,
.modify_param = lpddr4_modify_param,
.get_phy_index_params = lpddr4_get_phy_index_params,
-#endif
};
+#endif
static int rk3399_dmc_init(struct udevice *dev)
{
@@ -3080,7 +3101,17 @@ static int rk3399_dmc_init(struct udevice *dev)
return ret;
#endif
- priv->ops = &rk3399_ops;
+ if (params->base.dramtype == LPDDR4) {
+#if defined(CONFIG_RAM_RK3399_LPDDR4)
+ priv->ops = &lpddr4_ops;
+#else
+ printf("LPDDR4 support is disable\n");
+ return -EINVAL;
+#endif
+ } else {
+ priv->ops = &rk3399_ops;
+ }
+
priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC);
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);