target/rockchip: backport more patches
Reference: jayanta525/openwrt-nanopi-r2s.
This commit is contained in:
CN_SZTL
parent
abc3581f44
commit
c2bc3f5e91
@ -323,6 +323,7 @@ CONFIG_PHY_ROCKCHIP_DP=y
|
||||
CONFIG_PHY_ROCKCHIP_EMMC=y
|
||||
# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB3=y
|
||||
CONFIG_PHY_ROCKCHIP_PCIE=y
|
||||
CONFIG_PHY_ROCKCHIP_TYPEC=y
|
||||
CONFIG_PHY_ROCKCHIP_USB=y
|
||||
@ -481,6 +482,8 @@ CONFIG_TYPEC_TCPM=y
|
||||
CONFIG_UNINLINE_SPIN_UNLOCK=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWC2=y
|
||||
CONFIG_USB_DWC2_DUAL_ROLE=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_DUAL_ROLE=y
|
||||
CONFIG_USB_DWC3_HOST=y
|
||||
|
||||
@ -0,0 +1,71 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Robin Murphy <robin.murphy@arm.com>
|
||||
Date: Sun, 29 Dec 2019 20:16:17 +0000
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add RK3328 idle state
|
||||
|
||||
Downstream RK3328 DTBs describe a CPU idle state matching that present
|
||||
on other SoCs like RK3399. This works with upstream Trusted Firmware-A
|
||||
too, so let's add it here.
|
||||
|
||||
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
|
||||
Link: https://lore.kernel.org/r/a8c83e705d387446ea8121516d410e38b2d9c57b.1577640736.git.robin.murphy@arm.com
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 17 +++++++++++++++++
|
||||
1 file changed, 17 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
index 91306ebed4da..c9ff1188bd7b 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -41,6 +41,7 @@
|
||||
reg = <0x0 0x0>;
|
||||
clocks = <&cru ARMCLK>;
|
||||
#cooling-cells = <2>;
|
||||
+ cpu-idle-states = <&CPU_SLEEP>;
|
||||
dynamic-power-coefficient = <120>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
@@ -53,6 +54,7 @@
|
||||
reg = <0x0 0x1>;
|
||||
clocks = <&cru ARMCLK>;
|
||||
#cooling-cells = <2>;
|
||||
+ cpu-idle-states = <&CPU_SLEEP>;
|
||||
dynamic-power-coefficient = <120>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
@@ -65,6 +67,7 @@
|
||||
reg = <0x0 0x2>;
|
||||
clocks = <&cru ARMCLK>;
|
||||
#cooling-cells = <2>;
|
||||
+ cpu-idle-states = <&CPU_SLEEP>;
|
||||
dynamic-power-coefficient = <120>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
@@ -77,12 +80,26 @@
|
||||
reg = <0x0 0x3>;
|
||||
clocks = <&cru ARMCLK>;
|
||||
#cooling-cells = <2>;
|
||||
+ cpu-idle-states = <&CPU_SLEEP>;
|
||||
dynamic-power-coefficient = <120>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
+ idle-states {
|
||||
+ entry-method = "psci";
|
||||
+
|
||||
+ CPU_SLEEP: cpu-sleep {
|
||||
+ compatible = "arm,idle-state";
|
||||
+ local-timer-stop;
|
||||
+ arm,psci-suspend-param = <0x0010000>;
|
||||
+ entry-latency-us = <120>;
|
||||
+ exit-latency-us = <250>;
|
||||
+ min-residency-us = <900>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
l2: l2-cache0 {
|
||||
compatible = "cache";
|
||||
};
|
||||
@ -1,62 +0,0 @@
|
||||
From: William Wu <william.wu@rock-chips.com>
|
||||
|
||||
RK3328 has one USB 3.0 OTG controller which uses DWC_USB3
|
||||
core's general architecture. It can act as static xHCI host
|
||||
controller, static device controller, USB 3.0/2.0 OTG basing
|
||||
on ID of USB3.0 PHY.
|
||||
|
||||
Signed-off-by: William Wu <william.wu@rock-chips.com>
|
||||
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
|
||||
|
||||
---
|
||||
|
||||
NOTE: This binding still has issues. From the original thread:
|
||||
|
||||
the rk3328 usb3-phy has an issue with detecting any plugin events
|
||||
after a previous device got removed - see the inno-usb3-phy driver
|
||||
in the vendor kernel.
|
||||
|
||||
The current state is good-enough for enabling the USB3 attached LAN
|
||||
port of the NanoPi R2S. However, it might explode depending on your
|
||||
use-case. You've been warned.
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++
|
||||
1 file changed, 27 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -936,6 +936,33 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ usbdrd3: usb@ff600000 {
|
||||
+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3";
|
||||
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
|
||||
+ <&cru ACLK_USB3OTG>;
|
||||
+ clock-names = "ref_clk", "suspend_clk",
|
||||
+ "bus_clk";
|
||||
+ #address-cells = <2>;
|
||||
+ #size-cells = <2>;
|
||||
+ ranges;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ usbdrd_dwc3: dwc3@ff600000 {
|
||||
+ compatible = "snps,dwc3";
|
||||
+ reg = <0x0 0xff600000 0x0 0x100000>;
|
||||
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ dr_mode = "otg";
|
||||
+ phy_type = "utmi_wide";
|
||||
+ snps,dis_enblslpm_quirk;
|
||||
+ snps,dis-u2-freeclk-exists-quirk;
|
||||
+ snps,dis_u2_susphy_quirk;
|
||||
+ snps,dis_u3_susphy_quirk;
|
||||
+ snps,dis-del-phy-power-chg-quirk;
|
||||
+ snps,dis-tx-ipgap-linecheck-quirk;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
gic: interrupt-controller@ff811000 {
|
||||
compatible = "arm,gic-400";
|
||||
#interrupt-cells = <3>;
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,52 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Stefan Schaeckeler <schaecsn@gmx.net>
|
||||
Date: Wed, 11 Dec 2019 22:17:02 -0800
|
||||
Subject: [RESEND PATCH] thermal: rockchip: enable hwmon
|
||||
|
||||
By default, of-based thermal drivers do not enable hwmon.
|
||||
Explicitly enable hwmon for both, the soc and gpu temperature
|
||||
sensor.
|
||||
|
||||
Signed-off-by: Stefan Schaeckeler <schaecsn@gmx.net>
|
||||
---
|
||||
drivers/thermal/rockchip_thermal.c | 12 +++++++++++-
|
||||
1 file changed, 11 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
|
||||
index 343c2f5c5a25..e47c60010259 100644
|
||||
--- a/drivers/thermal/rockchip_thermal.c
|
||||
+++ b/drivers/thermal/rockchip_thermal.c
|
||||
@@ -19,6 +19,8 @@
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
|
||||
+#include "thermal_hwmon.h"
|
||||
+
|
||||
/**
|
||||
* If the temperature over a period of time High,
|
||||
* the resulting TSHUT gave CRU module,let it reset the entire chip,
|
||||
@@ -1321,8 +1323,15 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
|
||||
|
||||
thermal->chip->control(thermal->regs, true);
|
||||
|
||||
- for (i = 0; i < thermal->chip->chn_num; i++)
|
||||
+ for (i = 0; i < thermal->chip->chn_num; i++) {
|
||||
rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
|
||||
+ thermal->sensors[i].tzd->tzp->no_hwmon = false;
|
||||
+ error = thermal_add_hwmon_sysfs(thermal->sensors[i].tzd);
|
||||
+ if (error)
|
||||
+ dev_warn(&pdev->dev,
|
||||
+ "failed to register sensor %d with hwmon: %d\n",
|
||||
+ i, error);
|
||||
+ }
|
||||
|
||||
platform_set_drvdata(pdev, thermal);
|
||||
|
||||
@@ -1344,6 +1353,7 @@ static int rockchip_thermal_remove(struct platform_device *pdev)
|
||||
for (i = 0; i < thermal->chip->chn_num; i++) {
|
||||
struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
|
||||
|
||||
+ thermal_remove_hwmon_sysfs(sensor->tzd);
|
||||
rockchip_thermal_toggle_sensor(sensor, false);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user